avrdude: Version 6.3-20171130 Copyright (c) 2000-2005 Brian Dean, http://www.bdmicro.com/ Copyright (c) 2007-2014 Joerg Wunsch System wide configuration file is "/etc/avrdude.conf" User configuration file is "/home/lkostka/.avrduderc" User configuration file does not exist or is not a regular file, skipping Using Port : /dev/ttyUSB2 Using Programmer : stk500v2 STK500V2: stk500v2_open() STK500V2: stk500v2_getsync() STK500V2: stk500v2_send(0x1b 0x01 0x00 0x01 0x0e 0x01 0x14 , 7) avrdude: Send: . [1b] . [01] . [00] . [01] . [0e] . [01] . [14] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [01] 0x01 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [0b] 0x0b hoping for size MSB... msg is 11 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [01] 0x01 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [08] 0x08 avrdude: Recv: S [53] 0x53 avrdude: Recv: T [54] 0x54 avrdude: Recv: K [4b] 0x4b avrdude: Recv: 5 [35] 0x35 avrdude: Recv: 0 [30] 0x30 avrdude: Recv: 0 [30] 0x30 avrdude: Recv: _ [5f] 0x5f avrdude: Recv: 2 [32] 0x32 avrdude: Recv: . [02] 0x02 avrdude: stk500v2_getsync(): found STK500 programmer AVR Part : ATmega32 Chip Erase delay : 9000 us PAGEL : PD7 BS2 : PA0 RESET disposition : dedicated RETRY pulse : SCK serial program mode : yes parallel program mode : yes Timeout : 200 StabDelay : 100 CmdexeDelay : 25 SyncLoops : 32 ByteDelay : 0 PollIndex : 3 PollValue : 0x53 Memory Detail : Block Poll Page Polled Memory Type Mode Delay Size Indx Paged Size Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- eeprom 4 10 64 0 no 1024 4 0 9000 9000 0xff 0xff Memory Ops: Oeration Inst Bit Bit Type Bitno Value ----------- -------- -------- ----- ----- READ 31 VALUE 7 1 30 VALUE 6 0 29 VALUE 5 1 28 VALUE 4 0 27 VALUE 3 0 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 IGNORE 5 0 20 IGNORE 4 0 19 IGNORE 3 0 18 IGNORE 2 0 17 ADDRESS 9 0 16 ADDRESS 8 0 15 ADDRESS 7 0 14 ADDRESS 6 0 13 ADDRESS 5 0 12 ADDRESS 4 0 11 ADDRESS 3 0 10 ADDRESS 2 0 9 ADDRESS 1 0 8 ADDRESS 0 0 7 OUTPUT 7 0 6 OUTPUT 6 0 5 OUTPUT 5 0 4 OUTPUT 4 0 3 OUTPUT 3 0 2 OUTPUT 2 0 1 OUTPUT 1 0 0 OUTPUT 0 0 WRITE 31 VALUE 7 1 30 VALUE 6 1 29 VALUE 5 0 28 VALUE 4 0 27 VALUE 3 0 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 IGNORE 5 0 20 IGNORE 4 0 19 IGNORE 3 0 18 IGNORE 2 0 17 ADDRESS 9 0 16 ADDRESS 8 0 15 ADDRESS 7 0 14 ADDRESS 6 0 13 ADDRESS 5 0 12 ADDRESS 4 0 11 ADDRESS 3 0 10 ADDRESS 2 0 9 ADDRESS 1 0 8 ADDRESS 0 0 7 INPUT 7 0 6 INPUT 6 0 5 INPUT 5 0 4 INPUT 4 0 3 INPUT 3 0 2 INPUT 2 0 1 INPUT 1 0 0 INPUT 0 0 LOADPAGE_LO 31 VALUE 7 1 30 VALUE 6 1 29 VALUE 5 0 28 VALUE 4 0 27 VALUE 3 0 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 1 23 VALUE 7 0 22 VALUE 6 0 21 VALUE 5 0 20 VALUE 4 0 19 VALUE 3 0 18 VALUE 2 0 17 VALUE 1 0 16 VALUE 0 0 15 VALUE 7 0 14 VALUE 6 0 13 VALUE 5 0 12 VALUE 4 0 11 VALUE 3 0 10 VALUE 2 0 9 ADDRESS 1 0 8 ADDRESS 0 0 7 INPUT 7 0 6 INPUT 6 0 5 INPUT 5 0 4 INPUT 4 0 3 INPUT 3 0 2 INPUT 2 0 1 INPUT 1 0 0 INPUT 0 0 WRITEPAGE 31 VALUE 7 1 30 VALUE 6 1 29 VALUE 5 0 28 VALUE 4 0 27 VALUE 3 0 26 VALUE 2 0 25 VALUE 1 1 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 IGNORE 5 0 20 IGNORE 4 0 19 IGNORE 3 0 18 IGNORE 2 0 17 ADDRESS 9 0 16 ADDRESS 8 0 15 ADDRESS 7 0 14 ADDRESS 6 0 13 ADDRESS 5 0 12 ADDRESS 4 0 11 ADDRESS 3 0 10 ADDRESS 2 0 9 VALUE 1 0 8 VALUE 0 0 7 IGNORE 7 0 6 IGNORE 6 0 5 IGNORE 5 0 4 IGNORE 4 0 3 IGNORE 3 0 2 IGNORE 2 0 1 IGNORE 1 0 0 IGNORE 0 0 Block Poll Page Polled Memory Type Mode Delay Size Indx Paged Size Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- flash 33 6 64 0 yes 32768 128 256 4500 4500 0xff 0xff Memory Ops: Oeration Inst Bit Bit Type Bitno Value ----------- -------- -------- ----- ----- READ_LO 31 VALUE 7 0 30 VALUE 6 0 29 VALUE 5 1 28 VALUE 4 0 27 VALUE 3 0 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 ADDRESS 13 0 20 ADDRESS 12 0 19 ADDRESS 11 0 18 ADDRESS 10 0 17 ADDRESS 9 0 16 ADDRESS 8 0 15 ADDRESS 7 0 14 ADDRESS 6 0 13 ADDRESS 5 0 12 ADDRESS 4 0 11 ADDRESS 3 0 10 ADDRESS 2 0 9 ADDRESS 1 0 8 ADDRESS 0 0 7 OUTPUT 7 0 6 OUTPUT 6 0 5 OUTPUT 5 0 4 OUTPUT 4 0 3 OUTPUT 3 0 2 OUTPUT 2 0 1 OUTPUT 1 0 0 OUTPUT 0 0 READ_HI 31 VALUE 7 0 30 VALUE 6 0 29 VALUE 5 1 28 VALUE 4 0 27 VALUE 3 1 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 ADDRESS 13 0 20 ADDRESS 12 0 19 ADDRESS 11 0 18 ADDRESS 10 0 17 ADDRESS 9 0 16 ADDRESS 8 0 15 ADDRESS 7 0 14 ADDRESS 6 0 13 ADDRESS 5 0 12 ADDRESS 4 0 11 ADDRESS 3 0 10 ADDRESS 2 0 9 ADDRESS 1 0 8 ADDRESS 0 0 7 OUTPUT 7 0 6 OUTPUT 6 0 5 OUTPUT 5 0 4 OUTPUT 4 0 3 OUTPUT 3 0 2 OUTPUT 2 0 1 OUTPUT 1 0 0 OUTPUT 0 0 LOADPAGE_LO 31 VALUE 7 0 30 VALUE 6 1 29 VALUE 5 0 28 VALUE 4 0 27 VALUE 3 0 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 IGNORE 5 0 20 IGNORE 4 0 19 IGNORE 3 0 18 IGNORE 2 0 17 IGNORE 1 0 16 IGNORE 0 0 15 IGNORE 7 0 14 IGNORE 6 0 13 ADDRESS 5 0 12 ADDRESS 4 0 11 ADDRESS 3 0 10 ADDRESS 2 0 9 ADDRESS 1 0 8 ADDRESS 0 0 7 INPUT 7 0 6 INPUT 6 0 5 INPUT 5 0 4 INPUT 4 0 3 INPUT 3 0 2 INPUT 2 0 1 INPUT 1 0 0 INPUT 0 0 LOADPAGE_HI 31 VALUE 7 0 30 VALUE 6 1 29 VALUE 5 0 28 VALUE 4 0 27 VALUE 3 1 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 IGNORE 5 0 20 IGNORE 4 0 19 IGNORE 3 0 18 IGNORE 2 0 17 IGNORE 1 0 16 IGNORE 0 0 15 IGNORE 7 0 14 IGNORE 6 0 13 ADDRESS 5 0 12 ADDRESS 4 0 11 ADDRESS 3 0 10 ADDRESS 2 0 9 ADDRESS 1 0 8 ADDRESS 0 0 7 INPUT 7 0 6 INPUT 6 0 5 INPUT 5 0 4 INPUT 4 0 3 INPUT 3 0 2 INPUT 2 0 1 INPUT 1 0 0 INPUT 0 0 WRITEPAGE 31 VALUE 7 0 30 VALUE 6 1 29 VALUE 5 0 28 VALUE 4 0 27 VALUE 3 1 26 VALUE 2 1 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 ADDRESS 13 0 20 ADDRESS 12 0 19 ADDRESS 11 0 18 ADDRESS 10 0 17 ADDRESS 9 0 16 ADDRESS 8 0 15 ADDRESS 7 0 14 ADDRESS 6 0 13 IGNORE 5 0 12 IGNORE 4 0 11 IGNORE 3 0 10 IGNORE 2 0 9 IGNORE 1 0 8 IGNORE 0 0 7 IGNORE 7 0 6 IGNORE 6 0 5 IGNORE 5 0 4 IGNORE 4 0 3 IGNORE 3 0 2 IGNORE 2 0 1 IGNORE 1 0 0 IGNORE 0 0 Block Poll Page Polled Memory Type Mode Delay Size Indx Paged Size Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- lfuse 0 0 0 0 no 1 0 0 2000 2000 0x00 0x00 Memory Ops: Oeration Inst Bit Bit Type Bitno Value ----------- -------- -------- ----- ----- READ 31 VALUE 7 0 30 VALUE 6 1 29 VALUE 5 0 28 VALUE 4 1 27 VALUE 3 0 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 VALUE 5 0 20 VALUE 4 0 19 VALUE 3 0 18 VALUE 2 0 17 VALUE 1 0 16 VALUE 0 0 15 IGNORE 7 0 14 IGNORE 6 0 13 IGNORE 5 0 12 IGNORE 4 0 11 IGNORE 3 0 10 IGNORE 2 0 9 IGNORE 1 0 8 IGNORE 0 0 7 OUTPUT 7 0 6 OUTPUT 6 0 5 OUTPUT 5 0 4 OUTPUT 4 0 3 OUTPUT 3 0 2 OUTPUT 2 0 1 OUTPUT 1 0 0 OUTPUT 0 0 WRITE 31 VALUE 7 1 30 VALUE 6 0 29 VALUE 5 1 28 VALUE 4 0 27 VALUE 3 1 26 VALUE 2 1 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 1 22 VALUE 6 0 21 VALUE 5 1 20 VALUE 4 0 19 VALUE 3 0 18 VALUE 2 0 17 VALUE 1 0 16 VALUE 0 0 15 IGNORE 7 0 14 IGNORE 6 0 13 IGNORE 5 0 12 IGNORE 4 0 11 IGNORE 3 0 10 IGNORE 2 0 9 IGNORE 1 0 8 IGNORE 0 0 7 INPUT 7 0 6 INPUT 6 0 5 INPUT 5 0 4 INPUT 4 0 3 INPUT 3 0 2 INPUT 2 0 1 INPUT 1 0 0 INPUT 0 0 Block Poll Page Polled Memory Type Mode Delay Size Indx Paged Size Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- hfuse 0 0 0 0 no 1 0 0 2000 2000 0x00 0x00 Memory Ops: Oeration Inst Bit Bit Type Bitno Value ----------- -------- -------- ----- ----- READ 31 VALUE 7 0 30 VALUE 6 1 29 VALUE 5 0 28 VALUE 4 1 27 VALUE 3 1 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 VALUE 5 0 20 VALUE 4 0 19 VALUE 3 1 18 VALUE 2 0 17 VALUE 1 0 16 VALUE 0 0 15 IGNORE 7 0 14 IGNORE 6 0 13 IGNORE 5 0 12 IGNORE 4 0 11 IGNORE 3 0 10 IGNORE 2 0 9 IGNORE 1 0 8 IGNORE 0 0 7 OUTPUT 7 0 6 OUTPUT 6 0 5 OUTPUT 5 0 4 OUTPUT 4 0 3 OUTPUT 3 0 2 OUTPUT 2 0 1 OUTPUT 1 0 0 OUTPUT 0 0 WRITE 31 VALUE 7 1 30 VALUE 6 0 29 VALUE 5 1 28 VALUE 4 0 27 VALUE 3 1 26 VALUE 2 1 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 1 22 VALUE 6 0 21 VALUE 5 1 20 VALUE 4 0 19 VALUE 3 1 18 VALUE 2 0 17 VALUE 1 0 16 VALUE 0 0 15 IGNORE 7 0 14 IGNORE 6 0 13 IGNORE 5 0 12 IGNORE 4 0 11 IGNORE 3 0 10 IGNORE 2 0 9 IGNORE 1 0 8 IGNORE 0 0 7 INPUT 7 0 6 INPUT 6 0 5 INPUT 5 0 4 INPUT 4 0 3 INPUT 3 0 2 INPUT 2 0 1 INPUT 1 0 0 INPUT 0 0 Block Poll Page Polled Memory Type Mode Delay Size Indx Paged Size Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- lock 0 0 0 0 no 1 0 0 2000 2000 0x00 0x00 Memory Ops: Oeration Inst Bit Bit Type Bitno Value ----------- -------- -------- ----- ----- READ 31 VALUE 7 0 30 VALUE 6 1 29 VALUE 5 0 28 VALUE 4 1 27 VALUE 3 1 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 VALUE 5 0 20 VALUE 4 0 19 VALUE 3 0 18 VALUE 2 0 17 VALUE 1 0 16 VALUE 0 0 15 IGNORE 7 0 14 IGNORE 6 0 13 IGNORE 5 0 12 IGNORE 4 0 11 IGNORE 3 0 10 IGNORE 2 0 9 IGNORE 1 0 8 IGNORE 0 0 7 OUTPUT 7 0 6 OUTPUT 6 0 5 OUTPUT 5 0 4 OUTPUT 4 0 3 OUTPUT 3 0 2 OUTPUT 2 0 1 OUTPUT 1 0 0 OUTPUT 0 0 WRITE 31 VALUE 7 1 30 VALUE 6 0 29 VALUE 5 1 28 VALUE 4 0 27 VALUE 3 1 26 VALUE 2 1 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 1 22 VALUE 6 1 21 VALUE 5 1 20 IGNORE 4 0 19 IGNORE 3 0 18 IGNORE 2 0 17 IGNORE 1 0 16 IGNORE 0 0 15 IGNORE 7 0 14 IGNORE 6 0 13 IGNORE 5 0 12 IGNORE 4 0 11 IGNORE 3 0 10 IGNORE 2 0 9 IGNORE 1 0 8 IGNORE 0 0 7 VALUE 7 1 6 VALUE 6 1 5 INPUT 5 0 4 INPUT 4 0 3 INPUT 3 0 2 INPUT 2 0 1 INPUT 1 0 0 INPUT 0 0 Block Poll Page Polled Memory Type Mode Delay Size Indx Paged Size Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- signature 0 0 0 0 no 3 0 0 0 0 0x00 0x00 Memory Ops: Oeration Inst Bit Bit Type Bitno Value ----------- -------- -------- ----- ----- READ 31 VALUE 7 0 30 VALUE 6 0 29 VALUE 5 1 28 VALUE 4 1 27 VALUE 3 0 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 IGNORE 7 0 22 IGNORE 6 0 21 IGNORE 5 0 20 IGNORE 4 0 19 IGNORE 3 0 18 IGNORE 2 0 17 IGNORE 1 0 16 IGNORE 0 0 15 IGNORE 7 0 14 IGNORE 6 0 13 IGNORE 5 0 12 IGNORE 4 0 11 IGNORE 3 0 10 IGNORE 2 0 9 ADDRESS 1 0 8 ADDRESS 0 0 7 OUTPUT 7 0 6 OUTPUT 6 0 5 OUTPUT 5 0 4 OUTPUT 4 0 3 OUTPUT 3 0 2 OUTPUT 2 0 1 OUTPUT 1 0 0 OUTPUT 0 0 Block Poll Page Polled Memory Type Mode Delay Size Indx Paged Size Size #Pages MinW MaxW ReadBack ----------- ---- ----- ----- ---- ------ ------ ---- ------ ----- ----- --------- calibration 0 0 0 0 no 4 0 0 0 0 0x00 0x00 Memory Ops: Oeration Inst Bit Bit Type Bitno Value ----------- -------- -------- ----- ----- READ 31 VALUE 7 0 30 VALUE 6 0 29 VALUE 5 1 28 VALUE 4 1 27 VALUE 3 1 26 VALUE 2 0 25 VALUE 1 0 24 VALUE 0 0 23 VALUE 7 0 22 VALUE 6 0 21 IGNORE 5 0 20 IGNORE 4 0 19 IGNORE 3 0 18 IGNORE 2 0 17 IGNORE 1 0 16 IGNORE 0 0 15 VALUE 7 0 14 VALUE 6 0 13 VALUE 5 0 12 VALUE 4 0 11 VALUE 3 0 10 VALUE 2 0 9 ADDRESS 1 0 8 ADDRESS 0 0 7 OUTPUT 7 0 6 OUTPUT 6 0 5 OUTPUT 5 0 4 OUTPUT 4 0 3 OUTPUT 3 0 2 OUTPUT 2 0 1 OUTPUT 1 0 0 OUTPUT 0 0 Programmer Type : STK500V2 Description : Atmel STK500 Version 2.x firmware Programmer Model: STK500 STK500V2: stk500v2_command(0x03 0x90 , 2) STK500V2: stk500v2_send(0x1b 0x02 0x00 0x02 0x0e 0x03 0x90 0x86 , 8) avrdude: Send: . [1b] . [02] . [00] . [02] . [0e] . [03] . [90] . [86] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [02] 0x02 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [03] 0x03 hoping for size MSB... msg is 3 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [03] 0x03 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [01] 0x01 avrdude: Recv: . [16] 0x16 = 9 STK500V2: stk500v2_command(0x03 0x91 , 2) STK500V2: stk500v2_send(0x1b 0x03 0x00 0x02 0x0e 0x03 0x91 0x86 , 8) avrdude: Send: . [1b] . [03] . [00] . [02] . [0e] . [03] . [91] . [86] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [03] 0x03 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [03] 0x03 hoping for size MSB... msg is 3 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [03] 0x03 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [02] 0x02 avrdude: Recv: . [14] 0x14 = 9 STK500V2: stk500v2_command(0x03 0x92 , 2) STK500V2: stk500v2_send(0x1b 0x04 0x00 0x02 0x0e 0x03 0x92 0x82 , 8) avrdude: Send: . [1b] . [04] . [00] . [02] . [0e] . [03] . [92] . [82] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [04] 0x04 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [03] 0x03 hoping for size MSB... msg is 3 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [03] 0x03 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [10] 0x10 avrdude: Recv: . [01] 0x01 = 9 Hardware Version: 1 Firmware Version Master : 2.16 STK500V2: stk500v2_command(0x03 0x9a , 2) STK500V2: stk500v2_send(0x1b 0x05 0x00 0x02 0x0e 0x03 0x9a 0x8b , 8) avrdude: Send: . [1b] . [05] . [00] . [02] . [0e] . [03] . [9a] . [8b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [05] 0x05 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [03] 0x03 hoping for size MSB... msg is 3 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [03] 0x03 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8c] 0x8c avrdude: Recv: . [9c] 0x9c = 9 Topcard : Unknown STK500V2: stk500v2_command(0x03 0x94 , 2) STK500V2: stk500v2_send(0x1b 0x06 0x00 0x02 0x0e 0x03 0x94 0x86 , 8) avrdude: Send: . [1b] . [06] . [00] . [02] . [0e] . [03] . [94] . [86] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [06] 0x06 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [03] 0x03 hoping for size MSB... msg is 3 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [03] 0x03 avrdude: Recv: . [00] 0x00 avrdude: Recv: 2 [32] 0x32 avrdude: Recv: ! [21] 0x21 = 9 Vtarget : 5.0 V STK500V2: stk500v2_command(0x03 0x98 , 2) STK500V2: stk500v2_send(0x1b 0x07 0x00 0x02 0x0e 0x03 0x98 0x8b , 8) avrdude: Send: . [1b] . [07] . [00] . [02] . [0e] . [03] . [98] . [8b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [07] 0x07 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [03] 0x03 hoping for size MSB... msg is 3 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [03] 0x03 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [01] 0x01 avrdude: Recv: . [13] 0x13 = 9 STK500V2: stk500v2_command(0x03 0x95 , 2) STK500V2: stk500v2_send(0x1b 0x08 0x00 0x02 0x0e 0x03 0x95 0x89 , 8) avrdude: Send: . [1b] . [08] . [00] . [02] . [0e] . [03] . [95] . [89] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [08] 0x08 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [03] 0x03 hoping for size MSB... msg is 3 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [03] 0x03 avrdude: Recv: . [00] 0x00 avrdude: Recv: 2 [32] 0x32 avrdude: Recv: / [2f] 0x2f = 9 STK500V2: stk500v2_command(0x03 0x96 , 2) STK500V2: stk500v2_send(0x1b 0x09 0x00 0x02 0x0e 0x03 0x96 0x8b , 8) avrdude: Send: . [1b] . [09] . [00] . [02] . [0e] . [03] . [96] . [8b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [09] 0x09 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [03] 0x03 hoping for size MSB... msg is 3 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [03] 0x03 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [02] 0x02 avrdude: Recv: . [1e] 0x1e = 9 STK500V2: stk500v2_command(0x03 0x97 , 2) STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x02 0x0e 0x03 0x97 0x89 , 8) avrdude: Send: . [1b] . [0a] . [00] . [02] . [0e] . [03] . [97] . [89] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0a] 0x0a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [03] 0x03 hoping for size MSB... msg is 3 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [03] 0x03 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [01] 0x01 avrdude: Recv: . [1e] 0x1e = 9 SCK period : 2.2 us Varef : 5.0 V Oscillator : 230.400 kHz STK500V2: stk500v2_command(0x02 0x9e 0x01 , 3) STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x03 0x0e 0x02 0x9e 0x01 0x80 , 9) avrdude: Send: . [1b] . [0b] . [00] . [03] . [0e] . [02] . [9e] . [01] . [80] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0b] 0x0b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [02] 0x02 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1e] 0x1e = 8 STK500V2: stk500v2_command(0x10 0xc8 0x64 0x19 0x20 0x00 0x53 0x03 0xac 0x53 0x00 0x00 , 12) STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x0c 0x0e 0x10 0xc8 0x64 0x19 0x20 0x00 0x53 0x03 0xac 0x53 0x00 0x00 0x3f , 18) avrdude: Send: . [1b] . [0c] . [00] . [0c] . [0e] . [10] . [c8] d [64] . [19] [20] . [00] S [53] . [03] . [ac] S [53] . [00] . [00] ? [3f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0c] 0x0c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [10] 0x10 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0b] 0x0b = 8 avrdude: AVR device initialized and ready to accept instructions Reading | avrdude: stk500isp_read_byte(.., signature, 0x0, ...) avrdude: stk500isp_read_byte(): Sending read memory command: STK500V2: stk500v2_command(0x1b 0x04 0x30 0x00 0x00 0x00 , 6) STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x06 0x0e 0x1b 0x04 0x30 0x00 0x00 0x00 0x31 , 12) avrdude: Send: . [1b] . [0d] . [00] . [06] . [0e] . [1b] . [04] 0 [30] . [00] . [00] . [00] 1 [31] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0d] 0x0d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [04] 0x04 hoping for size MSB... msg is 4 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [1b] 0x1b avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1e] 0x1e avrdude: Recv: . [00] 0x00 avrdude: Recv: . [19] 0x19 = 10 avrdude: stk500isp_read_byte(.., signature, 0x1, ...) avrdude: stk500isp_read_byte(): Sending read memory command: STK500V2: stk500v2_command(0x1b 0x04 0x30 0x00 0x01 0x00 , 6) STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x06 0x0e 0x1b 0x04 0x30 0x00 0x01 0x00 0x33 , 12) avrdude: Send: . [1b] . [0e] . [00] . [06] . [0e] . [1b] . [04] 0 [30] . [00] . [01] . [00] 3 [33] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0e] 0x0e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [04] 0x04 hoping for size MSB... msg is 4 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [1b] 0x1b avrdude: Recv: . [00] 0x00 avrdude: Recv: . [95] 0x95 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [91] 0x91 = 10 ################avrdude: stk500isp_read_byte(.., signature, 0x2, ...) avrdude: stk500isp_read_byte(): Sending read memory command: STK500V2: stk500v2_command(0x1b 0x04 0x30 0x00 0x02 0x00 , 6) STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x06 0x0e 0x1b 0x04 0x30 0x00 0x02 0x00 0x31 , 12) avrdude: Send: . [1b] . [0f] . [00] . [06] . [0e] . [1b] . [04] 0 [30] . [00] . [02] . [00] 1 [31] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0f] 0x0f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [04] 0x04 hoping for size MSB... msg is 4 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [1b] 0x1b avrdude: Recv: . [00] 0x00 avrdude: Recv: . [02] 0x02 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [07] 0x07 = 10 ################################## | 100% 0.10s avrdude: Device signature = 0x1e9502 (probably m32) avrdude: reading flash memory: Reading | STK500V2: stk500v2_paged_load(..,flash,128,0,128) block_size at addr 0 is 128 STK500V2: stk500v2_loadaddr(0) STK500V2: stk500v2_command(0x06 0x00 0x00 0x00 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x10 0x00 0x05 0x0e 0x06 0x00 0x00 0x00 0x00 0x06 , 11) avrdude: Send: . [1b] . [10] . [00] . [05] . [0e] . [06] . [00] . [00] . [00] . [00] . [06] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [10] 0x10 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [01] 0x01 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x11 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xb4 , 10) avrdude: Send: . [1b] . [11] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [b4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [11] 0x11 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: * [2a] 0x2a avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: ? [3f] 0x3f avrdude: Recv: . [00] 0x00 avrdude: Recv: . [11] 0x11 avrdude: Recv: $ [24] 0x24 avrdude: Recv: . [1f] 0x1f avrdude: Recv: . [be] 0xbe avrdude: Recv: . [cf] 0xcf avrdude: Recv: . [e5] 0xe5 avrdude: Recv: . [d8] 0xd8 avrdude: Recv: . [e0] 0xe0 avrdude: Recv: . [de] 0xde avrdude: Recv: . [bf] 0xbf avrdude: Recv: . [cd] 0xcd avrdude: Recv: . [bf] 0xbf avrdude: Recv: . [10] 0x10 avrdude: Recv: . [e0] 0xe0 avrdude: Recv: . [a0] 0xa0 avrdude: Recv: . [e6] 0xe6 avrdude: Recv: . [b0] 0xb0 avrdude: Recv: . [e0] 0xe0 avrdude: Recv: . [ea] 0xea avrdude: Recv: . [e4] 0xe4 avrdude: Recv: . [f1] 0xf1 avrdude: Recv: . [e0] 0xe0 avrdude: Recv: . [02] 0x02 avrdude: Recv: . [c0] 0xc0 avrdude: Recv: . [05] 0x05 avrdude: Recv: . [90] 0x90 avrdude: Recv: . [0d] 0x0d avrdude: Recv: . [92] 0x92 avrdude: Recv: . [aa] 0xaa avrdude: Recv: 7 [37] 0x37 avrdude: Recv: . [b1] 0xb1 avrdude: Recv: . [07] 0x07 avrdude: Recv: . [d9] 0xd9 avrdude: Recv: . [f7] 0xf7 avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [94] 0x94 avrdude: Recv: K [4b] 0x4b avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: . [a3] 0xa3 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0c] 0x0c avrdude: Recv: . [94] 0x94 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f2] 0xf2 = 137 STK500V2: stk500v2_paged_load(..,flash,128,128,128) block_size at addr 128 is 128 STK500V2: stk500v2_loadaddr(64) STK500V2: stk500v2_command(0x06 0x00 0x00 0x00 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x12 0x00 0x05 0x0e 0x06 0x00 0x00 0x00 0x40 0x44 , 11) avrdude: Send: . [1b] . [12] . [00] . [05] . [0e] . [06] . [00] . [00] . [00] @ [40] D [44] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [12] 0x12 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [03] 0x03 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x13 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xb6 , 10) avrdude: Send: . [1b] . [13] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [b6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [13] 0x13 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [fc] 0xfc avrdude: Recv: . [01] 0x01 avrdude: Recv: . [81] 0x81 avrdude: Recv: . [91] 0x91 avrdude: Recv: . [88] 0x88 avrdude: Recv: # [23] 0x23 avrdude: Recv: ) [29] 0x29 avrdude: Recv: . [f0] 0xf0 avrdude: Recv: ] [5d] 0x5d avrdude: Recv: . [9b] 0x9b avrdude: Recv: . [fe] 0xfe avrdude: Recv: . [cf] 0xcf avrdude: Recv: . [8c] 0x8c avrdude: Recv: . [b9] 0xb9 avrdude: Recv: . [cf] 0xcf avrdude: Recv: . [01] 0x01 avrdude: Recv: . [f7] 0xf7 avrdude: Recv: . [cf] 0xcf avrdude: Recv: . [08] 0x08 avrdude: Recv: . [95] 0x95 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d0] 0xd0 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d0] 0xd0 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d0] 0xd0 avrdude: Recv: . [cd] 0xcd avrdude: Recv: . [b7] 0xb7 avrdude: Recv: . [de] 0xde avrdude: Recv: . [b7] 0xb7 avrdude: Recv: . [bf] 0xbf avrdude: Recv: . [9a] 0x9a avrdude: Recv: . [bc] 0xbc avrdude: Recv: . [9a] 0x9a avrdude: Recv: . [bd] 0xbd avrdude: Recv: . [9a] 0x9a avrdude: Recv: l [6c] 0x6c avrdude: Recv: . [9a] 0x9a avrdude: Recv: j [6a] 0x6a avrdude: Recv: . [98] 0x98 avrdude: Recv: k [6b] 0x6b avrdude: Recv: . [98] 0x98 avrdude: Recv: p [70] 0x70 avrdude: Recv: . [9a] 0x9a avrdude: Recv: h [68] 0x68 avrdude: Recv: . [98] 0x98 avrdude: Recv: i [69] 0x69 avrdude: Recv: . [98] 0x98 avrdude: Recv: n [6e] 0x6e avrdude: Recv: . [9a] 0x9a avrdude: Recv: . [bc] 0xbc avrdude: Recv: . [9a] 0x9a avrdude: Recv: . [c4] 0xc4 avrdude: Recv: . [9a] 0x9a avrdude: Recv: x [78] 0x78 avrdude: Recv: . [94] 0x94 avrdude: Recv: . [80] 0x80 avrdude: Recv: . [b5] 0xb5 avrdude: Recv: . [8f] 0x8f avrdude: Recv: w [77] 0x77 avrdude: Recv: . [80] 0x80 avrdude: Recv: . [bd] 0xbd avrdude: Recv: . [10] 0x10 avrdude: Recv: . [bc] 0xbc avrdude: Recv: . [85] 0x85 avrdude: Recv: . [e0] 0xe0 avrdude: Recv: . [89] 0x89 avrdude: Recv: . [b9] 0xb9 avrdude: Recv: Y [59] 0x59 avrdude: Recv: . [98] 0x98 avrdude: Recv: S [53] 0x53 avrdude: Recv: . [9a] 0x9a avrdude: Recv: . [80] 0x80 avrdude: Recv: . [e6] 0xe6 avrdude: Recv: . [90] 0x90 avrdude: Recv: . [e0] 0xe0 avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [94] 0x94 avrdude: Recv: A [41] 0x41 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [87] 0x87 avrdude: Recv: . [e7] 0xe7 avrdude: Recv: . [90] 0x90 avrdude: Recv: . [e0] 0xe0 avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [94] 0x94 avrdude: Recv: A [41] 0x41 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ce] 0xce avrdude: Recv: . [01] 0x01 avrdude: Recv: . [05] 0x05 avrdude: Recv: . [96] 0x96 avrdude: Recv: . [9e] 0x9e avrdude: Recv: . [01] 0x01 avrdude: Recv: ) [29] 0x29 avrdude: Recv: _ [5f] 0x5f avrdude: Recv: ? [3f] 0x3f avrdude: Recv: O [4f] 0x4f avrdude: Recv: O [4f] 0x4f avrdude: Recv: . [e3] 0xe3 avrdude: Recv: _ [5f] 0x5f avrdude: Recv: . [ef] 0xef avrdude: Recv: ` [60] 0x60 avrdude: Recv: . [e3] 0xe3 avrdude: Recv: q [71] 0x71 avrdude: Recv: . [e0] 0xe0 avrdude: Recv: . [9a] 0x9a avrdude: Recv: . [83] 0x83 avrdude: Recv: . [89] 0x89 avrdude: Recv: . [83] 0x83 avrdude: Recv: < [3c] 0x3c avrdude: Recv: . [83] 0x83 avrdude: Recv: + [2b] 0x2b avrdude: Recv: . [83] 0x83 avrdude: Recv: M [4d] 0x4d avrdude: Recv: . [83] 0x83 avrdude: Recv: ^ [5e] 0x5e avrdude: Recv: . [83] 0x83 avrdude: Recv: . [c4] 0xc4 avrdude: Recv: . [98] 0x98 avrdude: Recv: . [e9] 0xe9 avrdude: Recv: . [81] 0x81 avrdude: Recv: . [fa] 0xfa avrdude: Recv: . [81] 0x81 avrdude: Recv: . [0b] 0x0b avrdude: Recv: . [81] 0x81 avrdude: Recv: . [00] 0x00 avrdude: Recv: " [22] 0x22 = 137 STK500V2: stk500v2_paged_load(..,flash,128,256,128) block_size at addr 256 is 128 STK500V2: stk500v2_loadaddr(128) STK500V2: stk500v2_command(0x06 0x00 0x00 0x00 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x14 0x00 0x05 0x0e 0x06 0x00 0x00 0x00 0x80 0x82 , 11) avrdude: Send: . [1b] . [14] . [00] . [05] . [0e] . [06] . [00] . [00] . [00] . [80] . [82] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [14] 0x14 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [05] 0x05 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x15 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xb0 , 10) avrdude: Send: . [1b] . [15] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [b0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [15] 0x15 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1c] 0x1c avrdude: Recv: . [81] 0x81 avrdude: Recv: . [e0] 0xe0 avrdude: Recv: . [17] 0x17 avrdude: Recv: . [f1] 0xf1 avrdude: Recv: . [07] 0x07 avrdude: Recv: 9 [39] 0x39 avrdude: Recv: . [f0] 0xf0 avrdude: Recv: . [a0] 0xa0 avrdude: Recv: . [81] 0x81 avrdude: Recv: . [af] 0xaf avrdude: Recv: . [b9] 0xb9 avrdude: Recv: w [77] 0x77 avrdude: Recv: . [9b] 0x9b avrdude: Recv: . [fe] 0xfe avrdude: Recv: . [cf] 0xcf avrdude: Recv: . [af] 0xaf avrdude: Recv: . [b1] 0xb1 avrdude: Recv: . [a1] 0xa1 avrdude: Recv: . [93] 0x93 avrdude: Recv: . [f6] 0xf6 avrdude: Recv: . [cf] 0xcf avrdude: Recv: . [c4] 0xc4 avrdude: Recv: . [9a] 0x9a avrdude: Recv: . [9a] 0x9a avrdude: Recv: . [83] 0x83 avrdude: Recv: . [89] 0x89 avrdude: Recv: . [83] 0x83 avrdude: Recv: < [3c] 0x3c avrdude: Recv: . [83] 0x83 avrdude: Recv: + [2b] 0x2b avrdude: Recv: . [83] 0x83 avrdude: Recv: m [6d] 0x6d avrdude: Recv: . [83] 0x83 avrdude: Recv: ~ [7e] 0x7e avrdude: Recv: . [83] 0x83 avrdude: Recv: . [c4] 0xc4 avrdude: Recv: . [98] 0x98 avrdude: Recv: . [e9] 0xe9 avrdude: Recv: . [81] 0x81 avrdude: Recv: . [fa] 0xfa avrdude: Recv: . [81] 0x81 avrdude: Recv: . [0b] 0x0b avrdude: Recv: . [81] 0x81 avrdude: Recv: . [1c] 0x1c avrdude: Recv: . [81] 0x81 avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [17] 0x17 avrdude: Recv: . [1f] 0x1f avrdude: Recv: . [07] 0x07 avrdude: Recv: 9 [39] 0x39 avrdude: Recv: . [f0] 0xf0 avrdude: Recv: . [a0] 0xa0 avrdude: Recv: . [81] 0x81 avrdude: Recv: . [af] 0xaf avrdude: Recv: . [b9] 0xb9 avrdude: Recv: w [77] 0x77 avrdude: Recv: . [9b] 0x9b avrdude: Recv: . [fe] 0xfe avrdude: Recv: . [cf] 0xcf avrdude: Recv: . [af] 0xaf avrdude: Recv: . [b1] 0xb1 avrdude: Recv: . [a1] 0xa1 avrdude: Recv: . [93] 0x93 avrdude: Recv: . [f6] 0xf6 avrdude: Recv: . [cf] 0xcf avrdude: Recv: . [c4] 0xc4 avrdude: Recv: . [9a] 0x9a avrdude: Recv: . [d3] 0xd3 avrdude: Recv: . [cf] 0xcf avrdude: Recv: . [f8] 0xf8 avrdude: Recv: . [94] 0x94 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [cf] 0xcf avrdude: Recv: S [53] 0x53 avrdude: Recv: e [65] 0x65 avrdude: Recv: n [6e] 0x6e avrdude: Recv: d [64] 0x64 avrdude: Recv: i [69] 0x69 avrdude: Recv: n [6e] 0x6e avrdude: Recv: g [67] 0x67 avrdude: Recv: [20] 0x20 avrdude: Recv: b [62] 0x62 avrdude: Recv: y [79] 0x79 avrdude: Recv: t [74] 0x74 avrdude: Recv: e [65] 0x65 avrdude: Recv: s [73] 0x73 avrdude: Recv: [20] 0x20 avrdude: Recv: o [6f] 0x6f avrdude: Recv: v [76] 0x76 avrdude: Recv: e [65] 0x65 avrdude: Recv: r [72] 0x72 avrdude: Recv: [20] 0x20 avrdude: Recv: S [53] 0x53 avrdude: Recv: P [50] 0x50 avrdude: Recv: I [49] 0x49 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0d] 0x0d avrdude: Recv: . [0a] 0x0a avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: C [43] 0x43 = 137 STK500V2: stk500v2_paged_load(..,flash,128,384,128) block_size at addr 384 is 128 STK500V2: stk500v2_loadaddr(192) STK500V2: stk500v2_command(0x06 0x00 0x00 0x00 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x16 0x00 0x05 0x0e 0x06 0x00 0x00 0x00 0xc0 0xc0 , 11) avrdude: Send: . [1b] . [16] . [00] . [05] . [0e] . [06] . [00] . [00] . [00] . [c0] . [c0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [16] 0x16 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [07] 0x07 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x17 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xb2 , 10) avrdude: Send: . [1b] . [17] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [b2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [17] 0x17 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [95] 0x95 = 137 STK500V2: stk500v2_paged_load(..,flash,128,512,128) block_size at addr 512 is 128 STK500V2: stk500v2_loadaddr(256) STK500V2: stk500v2_command(0x06 0x00 0x00 0x01 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x18 0x00 0x05 0x0e 0x06 0x00 0x00 0x01 0x00 0x0f , 11) avrdude: Send: . [1b] . [18] . [00] . [05] . [0e] . [06] . [00] . [00] . [01] . [00] . [0f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [18] 0x18 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [09] 0x09 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x19 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xbc , 10) avrdude: Send: . [1b] . [19] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [bc] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [19] 0x19 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9b] 0x9b = 137 STK500V2: stk500v2_paged_load(..,flash,128,640,128) block_size at addr 640 is 128 STK500V2: stk500v2_loadaddr(320) STK500V2: stk500v2_command(0x06 0x00 0x00 0x01 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x1a 0x00 0x05 0x0e 0x06 0x00 0x00 0x01 0x40 0x4d , 11) avrdude: Send: . [1b] . [1a] . [00] . [05] . [0e] . [06] . [00] . [00] . [01] @ [40] M [4d] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1a] 0x1a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0b] 0x0b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x1b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xbe , 10) avrdude: Send: . [1b] . [1b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [be] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1b] 0x1b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [99] 0x99 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,768,128) block_size at addr 768 is 128 STK500V2: stk500v2_loadaddr(384) STK500V2: stk500v2_command(0x06 0x00 0x00 0x01 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x1c 0x00 0x05 0x0e 0x06 0x00 0x00 0x01 0x80 0x8b , 11) avrdude: Send: . [1b] . [1c] . [00] . [05] . [0e] . [06] . [00] . [00] . [01] . [80] . [8b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1c] 0x1c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0d] 0x0d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x1d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xb8 , 10) avrdude: Send: . [1b] . [1d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [b8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1d] 0x1d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9f] 0x9f = 137 STK500V2: stk500v2_paged_load(..,flash,128,896,128) block_size at addr 896 is 128 STK500V2: stk500v2_loadaddr(448) STK500V2: stk500v2_command(0x06 0x00 0x00 0x01 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x1e 0x00 0x05 0x0e 0x06 0x00 0x00 0x01 0xc0 0xc9 , 11) avrdude: Send: . [1b] . [1e] . [00] . [05] . [0e] . [06] . [00] . [00] . [01] . [c0] . [c9] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1e] 0x1e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0f] 0x0f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x1f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xba , 10) avrdude: Send: . [1b] . [1f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ba] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1f] 0x1f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9d] 0x9d = 137 STK500V2: stk500v2_paged_load(..,flash,128,1024,128) block_size at addr 1024 is 128 STK500V2: stk500v2_loadaddr(512) STK500V2: stk500v2_command(0x06 0x00 0x00 0x02 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x20 0x00 0x05 0x0e 0x06 0x00 0x00 0x02 0x00 0x34 , 11) avrdude: Send: . [1b] [20] . [00] . [05] . [0e] . [06] . [00] . [00] . [02] . [00] 4 [34] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: [20] 0x20 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: 1 [31] 0x31 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x21 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x84 , 10) avrdude: Send: . [1b] ! [21] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [84] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ! [21] 0x21 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a3] 0xa3 = 137 STK500V2: stk500v2_paged_load(..,flash,128,1152,128) block_size at addr 1152 is 128 STK500V2: stk500v2_loadaddr(576) STK500V2: stk500v2_command(0x06 0x00 0x00 0x02 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x22 0x00 0x05 0x0e 0x06 0x00 0x00 0x02 0x40 0x76 , 11) avrdude: Send: . [1b] " [22] . [00] . [05] . [0e] . [06] . [00] . [00] . [02] @ [40] v [76] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: " [22] 0x22 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: 3 [33] 0x33 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x23 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x86 , 10) avrdude: Send: . [1b] # [23] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [86] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: # [23] 0x23 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a1] 0xa1 = 137 STK500V2: stk500v2_paged_load(..,flash,128,1280,128) block_size at addr 1280 is 128 STK500V2: stk500v2_loadaddr(640) STK500V2: stk500v2_command(0x06 0x00 0x00 0x02 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x24 0x00 0x05 0x0e 0x06 0x00 0x00 0x02 0x80 0xb0 , 11) avrdude: Send: . [1b] $ [24] . [00] . [05] . [0e] . [06] . [00] . [00] . [02] . [80] . [b0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: $ [24] 0x24 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: 5 [35] 0x35 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x25 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x80 , 10) avrdude: Send: . [1b] % [25] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [80] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: % [25] 0x25 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a7] 0xa7 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,1408,128) block_size at addr 1408 is 128 STK500V2: stk500v2_loadaddr(704) STK500V2: stk500v2_command(0x06 0x00 0x00 0x02 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x26 0x00 0x05 0x0e 0x06 0x00 0x00 0x02 0xc0 0xf2 , 11) avrdude: Send: . [1b] & [26] . [00] . [05] . [0e] . [06] . [00] . [00] . [02] . [c0] . [f2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: & [26] 0x26 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: 7 [37] 0x37 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x27 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x82 , 10) avrdude: Send: . [1b] ' [27] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [82] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ' [27] 0x27 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a5] 0xa5 = 137 STK500V2: stk500v2_paged_load(..,flash,128,1536,128) block_size at addr 1536 is 128 STK500V2: stk500v2_loadaddr(768) STK500V2: stk500v2_command(0x06 0x00 0x00 0x03 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x28 0x00 0x05 0x0e 0x06 0x00 0x00 0x03 0x00 0x3d , 11) avrdude: Send: . [1b] ( [28] . [00] . [05] . [0e] . [06] . [00] . [00] . [03] . [00] = [3d] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ( [28] 0x28 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: 9 [39] 0x39 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x29 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x8c , 10) avrdude: Send: . [1b] ) [29] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [8c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ) [29] 0x29 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ab] 0xab = 137 STK500V2: stk500v2_paged_load(..,flash,128,1664,128) block_size at addr 1664 is 128 STK500V2: stk500v2_loadaddr(832) STK500V2: stk500v2_command(0x06 0x00 0x00 0x03 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x2a 0x00 0x05 0x0e 0x06 0x00 0x00 0x03 0x40 0x7f , 11) avrdude: Send: . [1b] * [2a] . [00] . [05] . [0e] . [06] . [00] . [00] . [03] @ [40] . [7f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: * [2a] 0x2a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ; [3b] 0x3b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x2b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x8e , 10) avrdude: Send: . [1b] + [2b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [8e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: + [2b] 0x2b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a9] 0xa9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,1792,128) block_size at addr 1792 is 128 STK500V2: stk500v2_loadaddr(896) STK500V2: stk500v2_command(0x06 0x00 0x00 0x03 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x2c 0x00 0x05 0x0e 0x06 0x00 0x00 0x03 0x80 0xb9 , 11) avrdude: Send: . [1b] , [2c] . [00] . [05] . [0e] . [06] . [00] . [00] . [03] . [80] . [b9] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: , [2c] 0x2c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: = [3d] 0x3d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x2d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x88 , 10) avrdude: Send: . [1b] - [2d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [88] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: - [2d] 0x2d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [af] 0xaf = 137 STK500V2: stk500v2_paged_load(..,flash,128,1920,128) block_size at addr 1920 is 128 STK500V2: stk500v2_loadaddr(960) STK500V2: stk500v2_command(0x06 0x00 0x00 0x03 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x2e 0x00 0x05 0x0e 0x06 0x00 0x00 0x03 0xc0 0xfb , 11) avrdude: Send: . [1b] . [2e] . [00] . [05] . [0e] . [06] . [00] . [00] . [03] . [c0] . [fb] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [2e] 0x2e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ? [3f] 0x3f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x2f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x8a , 10) avrdude: Send: . [1b] / [2f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [8a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: / [2f] 0x2f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ad] 0xad = 137 #STK500V2: stk500v2_paged_load(..,flash,128,2048,128) block_size at addr 2048 is 128 STK500V2: stk500v2_loadaddr(1024) STK500V2: stk500v2_command(0x06 0x00 0x00 0x04 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x30 0x00 0x05 0x0e 0x06 0x00 0x00 0x04 0x00 0x22 , 11) avrdude: Send: . [1b] 0 [30] . [00] . [05] . [0e] . [06] . [00] . [00] . [04] . [00] " [22] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 0 [30] 0x30 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ! [21] 0x21 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x31 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x94 , 10) avrdude: Send: . [1b] 1 [31] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [94] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 1 [31] 0x31 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b3] 0xb3 = 137 STK500V2: stk500v2_paged_load(..,flash,128,2176,128) block_size at addr 2176 is 128 STK500V2: stk500v2_loadaddr(1088) STK500V2: stk500v2_command(0x06 0x00 0x00 0x04 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x32 0x00 0x05 0x0e 0x06 0x00 0x00 0x04 0x40 0x60 , 11) avrdude: Send: . [1b] 2 [32] . [00] . [05] . [0e] . [06] . [00] . [00] . [04] @ [40] ` [60] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 2 [32] 0x32 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: # [23] 0x23 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x33 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x96 , 10) avrdude: Send: . [1b] 3 [33] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [96] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 3 [33] 0x33 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b1] 0xb1 = 137 STK500V2: stk500v2_paged_load(..,flash,128,2304,128) block_size at addr 2304 is 128 STK500V2: stk500v2_loadaddr(1152) STK500V2: stk500v2_command(0x06 0x00 0x00 0x04 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x34 0x00 0x05 0x0e 0x06 0x00 0x00 0x04 0x80 0xa6 , 11) avrdude: Send: . [1b] 4 [34] . [00] . [05] . [0e] . [06] . [00] . [00] . [04] . [80] . [a6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 4 [34] 0x34 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: % [25] 0x25 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x35 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x90 , 10) avrdude: Send: . [1b] 5 [35] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [90] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 5 [35] 0x35 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b7] 0xb7 = 137 STK500V2: stk500v2_paged_load(..,flash,128,2432,128) block_size at addr 2432 is 128 STK500V2: stk500v2_loadaddr(1216) STK500V2: stk500v2_command(0x06 0x00 0x00 0x04 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x36 0x00 0x05 0x0e 0x06 0x00 0x00 0x04 0xc0 0xe4 , 11) avrdude: Send: . [1b] 6 [36] . [00] . [05] . [0e] . [06] . [00] . [00] . [04] . [c0] . [e4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 6 [36] 0x36 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ' [27] 0x27 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x37 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x92 , 10) avrdude: Send: . [1b] 7 [37] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [92] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 7 [37] 0x37 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b5] 0xb5 = 137 STK500V2: stk500v2_paged_load(..,flash,128,2560,128) block_size at addr 2560 is 128 STK500V2: stk500v2_loadaddr(1280) STK500V2: stk500v2_command(0x06 0x00 0x00 0x05 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x38 0x00 0x05 0x0e 0x06 0x00 0x00 0x05 0x00 0x2b , 11) avrdude: Send: . [1b] 8 [38] . [00] . [05] . [0e] . [06] . [00] . [00] . [05] . [00] + [2b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 8 [38] 0x38 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ) [29] 0x29 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x39 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x9c , 10) avrdude: Send: . [1b] 9 [39] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [9c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 9 [39] 0x39 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bb] 0xbb = 137 #STK500V2: stk500v2_paged_load(..,flash,128,2688,128) block_size at addr 2688 is 128 STK500V2: stk500v2_loadaddr(1344) STK500V2: stk500v2_command(0x06 0x00 0x00 0x05 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x3a 0x00 0x05 0x0e 0x06 0x00 0x00 0x05 0x40 0x69 , 11) avrdude: Send: . [1b] : [3a] . [00] . [05] . [0e] . [06] . [00] . [00] . [05] @ [40] i [69] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: : [3a] 0x3a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: + [2b] 0x2b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x3b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x9e , 10) avrdude: Send: . [1b] ; [3b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [9e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ; [3b] 0x3b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b9] 0xb9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,2816,128) block_size at addr 2816 is 128 STK500V2: stk500v2_loadaddr(1408) STK500V2: stk500v2_command(0x06 0x00 0x00 0x05 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x3c 0x00 0x05 0x0e 0x06 0x00 0x00 0x05 0x80 0xaf , 11) avrdude: Send: . [1b] < [3c] . [00] . [05] . [0e] . [06] . [00] . [00] . [05] . [80] . [af] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: < [3c] 0x3c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: - [2d] 0x2d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x3d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x98 , 10) avrdude: Send: . [1b] = [3d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [98] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: = [3d] 0x3d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bf] 0xbf = 137 STK500V2: stk500v2_paged_load(..,flash,128,2944,128) block_size at addr 2944 is 128 STK500V2: stk500v2_loadaddr(1472) STK500V2: stk500v2_command(0x06 0x00 0x00 0x05 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x3e 0x00 0x05 0x0e 0x06 0x00 0x00 0x05 0xc0 0xed , 11) avrdude: Send: . [1b] > [3e] . [00] . [05] . [0e] . [06] . [00] . [00] . [05] . [c0] . [ed] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: > [3e] 0x3e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: / [2f] 0x2f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x3f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x9a , 10) avrdude: Send: . [1b] ? [3f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [9a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ? [3f] 0x3f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bd] 0xbd = 137 STK500V2: stk500v2_paged_load(..,flash,128,3072,128) block_size at addr 3072 is 128 STK500V2: stk500v2_loadaddr(1536) STK500V2: stk500v2_command(0x06 0x00 0x00 0x06 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x40 0x00 0x05 0x0e 0x06 0x00 0x00 0x06 0x00 0x50 , 11) avrdude: Send: . [1b] @ [40] . [00] . [05] . [0e] . [06] . [00] . [00] . [06] . [00] P [50] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: @ [40] 0x40 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: Q [51] 0x51 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x41 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xe4 , 10) avrdude: Send: . [1b] A [41] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [e4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: A [41] 0x41 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c3] 0xc3 = 137 STK500V2: stk500v2_paged_load(..,flash,128,3200,128) block_size at addr 3200 is 128 STK500V2: stk500v2_loadaddr(1600) STK500V2: stk500v2_command(0x06 0x00 0x00 0x06 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x42 0x00 0x05 0x0e 0x06 0x00 0x00 0x06 0x40 0x12 , 11) avrdude: Send: . [1b] B [42] . [00] . [05] . [0e] . [06] . [00] . [00] . [06] @ [40] . [12] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: B [42] 0x42 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: S [53] 0x53 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x43 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xe6 , 10) avrdude: Send: . [1b] C [43] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [e6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: C [43] 0x43 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c1] 0xc1 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,3328,128) block_size at addr 3328 is 128 STK500V2: stk500v2_loadaddr(1664) STK500V2: stk500v2_command(0x06 0x00 0x00 0x06 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x44 0x00 0x05 0x0e 0x06 0x00 0x00 0x06 0x80 0xd4 , 11) avrdude: Send: . [1b] D [44] . [00] . [05] . [0e] . [06] . [00] . [00] . [06] . [80] . [d4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: D [44] 0x44 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: U [55] 0x55 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x45 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xe0 , 10) avrdude: Send: . [1b] E [45] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [e0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: E [45] 0x45 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c7] 0xc7 = 137 STK500V2: stk500v2_paged_load(..,flash,128,3456,128) block_size at addr 3456 is 128 STK500V2: stk500v2_loadaddr(1728) STK500V2: stk500v2_command(0x06 0x00 0x00 0x06 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x46 0x00 0x05 0x0e 0x06 0x00 0x00 0x06 0xc0 0x96 , 11) avrdude: Send: . [1b] F [46] . [00] . [05] . [0e] . [06] . [00] . [00] . [06] . [c0] . [96] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: F [46] 0x46 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: W [57] 0x57 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x47 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xe2 , 10) avrdude: Send: . [1b] G [47] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [e2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: G [47] 0x47 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c5] 0xc5 = 137 STK500V2: stk500v2_paged_load(..,flash,128,3584,128) block_size at addr 3584 is 128 STK500V2: stk500v2_loadaddr(1792) STK500V2: stk500v2_command(0x06 0x00 0x00 0x07 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x48 0x00 0x05 0x0e 0x06 0x00 0x00 0x07 0x00 0x59 , 11) avrdude: Send: . [1b] H [48] . [00] . [05] . [0e] . [06] . [00] . [00] . [07] . [00] Y [59] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: H [48] 0x48 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: Y [59] 0x59 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x49 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xec , 10) avrdude: Send: . [1b] I [49] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ec] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: I [49] 0x49 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cb] 0xcb = 137 STK500V2: stk500v2_paged_load(..,flash,128,3712,128) block_size at addr 3712 is 128 STK500V2: stk500v2_loadaddr(1856) STK500V2: stk500v2_command(0x06 0x00 0x00 0x07 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x4a 0x00 0x05 0x0e 0x06 0x00 0x00 0x07 0x40 0x1b , 11) avrdude: Send: . [1b] J [4a] . [00] . [05] . [0e] . [06] . [00] . [00] . [07] @ [40] . [1b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: J [4a] 0x4a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: [ [5b] 0x5b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x4b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xee , 10) avrdude: Send: . [1b] K [4b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ee] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: K [4b] 0x4b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c9] 0xc9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,3840,128) block_size at addr 3840 is 128 STK500V2: stk500v2_loadaddr(1920) STK500V2: stk500v2_command(0x06 0x00 0x00 0x07 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x4c 0x00 0x05 0x0e 0x06 0x00 0x00 0x07 0x80 0xdd , 11) avrdude: Send: . [1b] L [4c] . [00] . [05] . [0e] . [06] . [00] . [00] . [07] . [80] . [dd] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: L [4c] 0x4c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ] [5d] 0x5d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x4d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xe8 , 10) avrdude: Send: . [1b] M [4d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [e8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: M [4d] 0x4d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cf] 0xcf = 137 #STK500V2: stk500v2_paged_load(..,flash,128,3968,128) block_size at addr 3968 is 128 STK500V2: stk500v2_loadaddr(1984) STK500V2: stk500v2_command(0x06 0x00 0x00 0x07 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x4e 0x00 0x05 0x0e 0x06 0x00 0x00 0x07 0xc0 0x9f , 11) avrdude: Send: . [1b] N [4e] . [00] . [05] . [0e] . [06] . [00] . [00] . [07] . [c0] . [9f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: N [4e] 0x4e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: _ [5f] 0x5f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x4f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xea , 10) avrdude: Send: . [1b] O [4f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ea] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: O [4f] 0x4f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cd] 0xcd = 137 STK500V2: stk500v2_paged_load(..,flash,128,4096,128) block_size at addr 4096 is 128 STK500V2: stk500v2_loadaddr(2048) STK500V2: stk500v2_command(0x06 0x00 0x00 0x08 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x50 0x00 0x05 0x0e 0x06 0x00 0x00 0x08 0x00 0x4e , 11) avrdude: Send: . [1b] P [50] . [00] . [05] . [0e] . [06] . [00] . [00] . [08] . [00] N [4e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: P [50] 0x50 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: A [41] 0x41 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x51 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xf4 , 10) avrdude: Send: . [1b] Q [51] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [f4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: Q [51] 0x51 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d3] 0xd3 = 137 STK500V2: stk500v2_paged_load(..,flash,128,4224,128) block_size at addr 4224 is 128 STK500V2: stk500v2_loadaddr(2112) STK500V2: stk500v2_command(0x06 0x00 0x00 0x08 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x52 0x00 0x05 0x0e 0x06 0x00 0x00 0x08 0x40 0x0c , 11) avrdude: Send: . [1b] R [52] . [00] . [05] . [0e] . [06] . [00] . [00] . [08] @ [40] . [0c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: R [52] 0x52 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: C [43] 0x43 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x53 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xf6 , 10) avrdude: Send: . [1b] S [53] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [f6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: S [53] 0x53 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d1] 0xd1 = 137 STK500V2: stk500v2_paged_load(..,flash,128,4352,128) block_size at addr 4352 is 128 STK500V2: stk500v2_loadaddr(2176) STK500V2: stk500v2_command(0x06 0x00 0x00 0x08 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x54 0x00 0x05 0x0e 0x06 0x00 0x00 0x08 0x80 0xca , 11) avrdude: Send: . [1b] T [54] . [00] . [05] . [0e] . [06] . [00] . [00] . [08] . [80] . [ca] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: T [54] 0x54 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: E [45] 0x45 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x55 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xf0 , 10) avrdude: Send: . [1b] U [55] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [f0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: U [55] 0x55 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d7] 0xd7 = 137 STK500V2: stk500v2_paged_load(..,flash,128,4480,128) block_size at addr 4480 is 128 STK500V2: stk500v2_loadaddr(2240) STK500V2: stk500v2_command(0x06 0x00 0x00 0x08 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x56 0x00 0x05 0x0e 0x06 0x00 0x00 0x08 0xc0 0x88 , 11) avrdude: Send: . [1b] V [56] . [00] . [05] . [0e] . [06] . [00] . [00] . [08] . [c0] . [88] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: V [56] 0x56 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: G [47] 0x47 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x57 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xf2 , 10) avrdude: Send: . [1b] W [57] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [f2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: W [57] 0x57 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d5] 0xd5 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,4608,128) block_size at addr 4608 is 128 STK500V2: stk500v2_loadaddr(2304) STK500V2: stk500v2_command(0x06 0x00 0x00 0x09 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x58 0x00 0x05 0x0e 0x06 0x00 0x00 0x09 0x00 0x47 , 11) avrdude: Send: . [1b] X [58] . [00] . [05] . [0e] . [06] . [00] . [00] . [09] . [00] G [47] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: X [58] 0x58 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: I [49] 0x49 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x59 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xfc , 10) avrdude: Send: . [1b] Y [59] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [fc] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: Y [59] 0x59 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [db] 0xdb = 137 STK500V2: stk500v2_paged_load(..,flash,128,4736,128) block_size at addr 4736 is 128 STK500V2: stk500v2_loadaddr(2368) STK500V2: stk500v2_command(0x06 0x00 0x00 0x09 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x5a 0x00 0x05 0x0e 0x06 0x00 0x00 0x09 0x40 0x05 , 11) avrdude: Send: . [1b] Z [5a] . [00] . [05] . [0e] . [06] . [00] . [00] . [09] @ [40] . [05] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: Z [5a] 0x5a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: K [4b] 0x4b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x5b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xfe , 10) avrdude: Send: . [1b] [ [5b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [fe] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: [ [5b] 0x5b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d9] 0xd9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,4864,128) block_size at addr 4864 is 128 STK500V2: stk500v2_loadaddr(2432) STK500V2: stk500v2_command(0x06 0x00 0x00 0x09 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x5c 0x00 0x05 0x0e 0x06 0x00 0x00 0x09 0x80 0xc3 , 11) avrdude: Send: . [1b] \ [5c] . [00] . [05] . [0e] . [06] . [00] . [00] . [09] . [80] . [c3] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: \ [5c] 0x5c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: M [4d] 0x4d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x5d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xf8 , 10) avrdude: Send: . [1b] ] [5d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [f8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ] [5d] 0x5d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [df] 0xdf = 137 STK500V2: stk500v2_paged_load(..,flash,128,4992,128) block_size at addr 4992 is 128 STK500V2: stk500v2_loadaddr(2496) STK500V2: stk500v2_command(0x06 0x00 0x00 0x09 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x5e 0x00 0x05 0x0e 0x06 0x00 0x00 0x09 0xc0 0x81 , 11) avrdude: Send: . [1b] ^ [5e] . [00] . [05] . [0e] . [06] . [00] . [00] . [09] . [c0] . [81] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ^ [5e] 0x5e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: O [4f] 0x4f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x5f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xfa , 10) avrdude: Send: . [1b] _ [5f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [fa] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: _ [5f] 0x5f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [dd] 0xdd = 137 STK500V2: stk500v2_paged_load(..,flash,128,5120,128) block_size at addr 5120 is 128 STK500V2: stk500v2_loadaddr(2560) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0a 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x60 0x00 0x05 0x0e 0x06 0x00 0x00 0x0a 0x00 0x7c , 11) avrdude: Send: . [1b] ` [60] . [00] . [05] . [0e] . [06] . [00] . [00] . [0a] . [00] | [7c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ` [60] 0x60 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: q [71] 0x71 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x61 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xc4 , 10) avrdude: Send: . [1b] a [61] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [c4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: a [61] 0x61 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e3] 0xe3 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,5248,128) block_size at addr 5248 is 128 STK500V2: stk500v2_loadaddr(2624) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0a 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x62 0x00 0x05 0x0e 0x06 0x00 0x00 0x0a 0x40 0x3e , 11) avrdude: Send: . [1b] b [62] . [00] . [05] . [0e] . [06] . [00] . [00] . [0a] @ [40] > [3e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: b [62] 0x62 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: s [73] 0x73 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x63 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xc6 , 10) avrdude: Send: . [1b] c [63] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [c6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: c [63] 0x63 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e1] 0xe1 = 137 STK500V2: stk500v2_paged_load(..,flash,128,5376,128) block_size at addr 5376 is 128 STK500V2: stk500v2_loadaddr(2688) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0a 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x64 0x00 0x05 0x0e 0x06 0x00 0x00 0x0a 0x80 0xf8 , 11) avrdude: Send: . [1b] d [64] . [00] . [05] . [0e] . [06] . [00] . [00] . [0a] . [80] . [f8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: d [64] 0x64 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: u [75] 0x75 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x65 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xc0 , 10) avrdude: Send: . [1b] e [65] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [c0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: e [65] 0x65 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e7] 0xe7 = 137 STK500V2: stk500v2_paged_load(..,flash,128,5504,128) block_size at addr 5504 is 128 STK500V2: stk500v2_loadaddr(2752) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0a 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x66 0x00 0x05 0x0e 0x06 0x00 0x00 0x0a 0xc0 0xba , 11) avrdude: Send: . [1b] f [66] . [00] . [05] . [0e] . [06] . [00] . [00] . [0a] . [c0] . [ba] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: f [66] 0x66 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: w [77] 0x77 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x67 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xc2 , 10) avrdude: Send: . [1b] g [67] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [c2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: g [67] 0x67 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e5] 0xe5 = 137 STK500V2: stk500v2_paged_load(..,flash,128,5632,128) block_size at addr 5632 is 128 STK500V2: stk500v2_loadaddr(2816) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0b 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x68 0x00 0x05 0x0e 0x06 0x00 0x00 0x0b 0x00 0x75 , 11) avrdude: Send: . [1b] h [68] . [00] . [05] . [0e] . [06] . [00] . [00] . [0b] . [00] u [75] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: h [68] 0x68 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: y [79] 0x79 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x69 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xcc , 10) avrdude: Send: . [1b] i [69] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [cc] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: i [69] 0x69 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [eb] 0xeb = 137 STK500V2: stk500v2_paged_load(..,flash,128,5760,128) block_size at addr 5760 is 128 STK500V2: stk500v2_loadaddr(2880) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0b 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x6a 0x00 0x05 0x0e 0x06 0x00 0x00 0x0b 0x40 0x37 , 11) avrdude: Send: . [1b] j [6a] . [00] . [05] . [0e] . [06] . [00] . [00] . [0b] @ [40] 7 [37] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: j [6a] 0x6a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: { [7b] 0x7b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x6b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xce , 10) avrdude: Send: . [1b] k [6b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ce] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: k [6b] 0x6b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e9] 0xe9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,5888,128) block_size at addr 5888 is 128 STK500V2: stk500v2_loadaddr(2944) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0b 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x6c 0x00 0x05 0x0e 0x06 0x00 0x00 0x0b 0x80 0xf1 , 11) avrdude: Send: . [1b] l [6c] . [00] . [05] . [0e] . [06] . [00] . [00] . [0b] . [80] . [f1] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: l [6c] 0x6c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: } [7d] 0x7d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x6d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xc8 , 10) avrdude: Send: . [1b] m [6d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [c8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: m [6d] 0x6d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ef] 0xef = 137 #STK500V2: stk500v2_paged_load(..,flash,128,6016,128) block_size at addr 6016 is 128 STK500V2: stk500v2_loadaddr(3008) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0b 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x6e 0x00 0x05 0x0e 0x06 0x00 0x00 0x0b 0xc0 0xb3 , 11) avrdude: Send: . [1b] n [6e] . [00] . [05] . [0e] . [06] . [00] . [00] . [0b] . [c0] . [b3] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: n [6e] 0x6e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [7f] 0x7f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x6f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xca , 10) avrdude: Send: . [1b] o [6f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ca] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: o [6f] 0x6f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ed] 0xed = 137 STK500V2: stk500v2_paged_load(..,flash,128,6144,128) block_size at addr 6144 is 128 STK500V2: stk500v2_loadaddr(3072) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0c 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x70 0x00 0x05 0x0e 0x06 0x00 0x00 0x0c 0x00 0x6a , 11) avrdude: Send: . [1b] p [70] . [00] . [05] . [0e] . [06] . [00] . [00] . [0c] . [00] j [6a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: p [70] 0x70 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: a [61] 0x61 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x71 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xd4 , 10) avrdude: Send: . [1b] q [71] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [d4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: q [71] 0x71 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f3] 0xf3 = 137 STK500V2: stk500v2_paged_load(..,flash,128,6272,128) block_size at addr 6272 is 128 STK500V2: stk500v2_loadaddr(3136) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0c 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x72 0x00 0x05 0x0e 0x06 0x00 0x00 0x0c 0x40 0x28 , 11) avrdude: Send: . [1b] r [72] . [00] . [05] . [0e] . [06] . [00] . [00] . [0c] @ [40] ( [28] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: r [72] 0x72 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: c [63] 0x63 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x73 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xd6 , 10) avrdude: Send: . [1b] s [73] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [d6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: s [73] 0x73 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f1] 0xf1 = 137 STK500V2: stk500v2_paged_load(..,flash,128,6400,128) block_size at addr 6400 is 128 STK500V2: stk500v2_loadaddr(3200) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0c 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x74 0x00 0x05 0x0e 0x06 0x00 0x00 0x0c 0x80 0xee , 11) avrdude: Send: . [1b] t [74] . [00] . [05] . [0e] . [06] . [00] . [00] . [0c] . [80] . [ee] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: t [74] 0x74 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: e [65] 0x65 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x75 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xd0 , 10) avrdude: Send: . [1b] u [75] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [d0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: u [75] 0x75 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f7] 0xf7 = 137 STK500V2: stk500v2_paged_load(..,flash,128,6528,128) block_size at addr 6528 is 128 STK500V2: stk500v2_loadaddr(3264) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0c 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x76 0x00 0x05 0x0e 0x06 0x00 0x00 0x0c 0xc0 0xac , 11) avrdude: Send: . [1b] v [76] . [00] . [05] . [0e] . [06] . [00] . [00] . [0c] . [c0] . [ac] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: v [76] 0x76 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: g [67] 0x67 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x77 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xd2 , 10) avrdude: Send: . [1b] w [77] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [d2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: w [77] 0x77 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f5] 0xf5 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,6656,128) block_size at addr 6656 is 128 STK500V2: stk500v2_loadaddr(3328) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0d 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x78 0x00 0x05 0x0e 0x06 0x00 0x00 0x0d 0x00 0x63 , 11) avrdude: Send: . [1b] x [78] . [00] . [05] . [0e] . [06] . [00] . [00] . [0d] . [00] c [63] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: x [78] 0x78 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: i [69] 0x69 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x79 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xdc , 10) avrdude: Send: . [1b] y [79] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [dc] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: y [79] 0x79 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [fb] 0xfb = 137 STK500V2: stk500v2_paged_load(..,flash,128,6784,128) block_size at addr 6784 is 128 STK500V2: stk500v2_loadaddr(3392) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0d 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x7a 0x00 0x05 0x0e 0x06 0x00 0x00 0x0d 0x40 0x21 , 11) avrdude: Send: . [1b] z [7a] . [00] . [05] . [0e] . [06] . [00] . [00] . [0d] @ [40] ! [21] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: z [7a] 0x7a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: k [6b] 0x6b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x7b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xde , 10) avrdude: Send: . [1b] { [7b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [de] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: { [7b] 0x7b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f9] 0xf9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,6912,128) block_size at addr 6912 is 128 STK500V2: stk500v2_loadaddr(3456) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0d 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x7c 0x00 0x05 0x0e 0x06 0x00 0x00 0x0d 0x80 0xe7 , 11) avrdude: Send: . [1b] | [7c] . [00] . [05] . [0e] . [06] . [00] . [00] . [0d] . [80] . [e7] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: | [7c] 0x7c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: m [6d] 0x6d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x7d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xd8 , 10) avrdude: Send: . [1b] } [7d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [d8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: } [7d] 0x7d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff = 137 STK500V2: stk500v2_paged_load(..,flash,128,7040,128) block_size at addr 7040 is 128 STK500V2: stk500v2_loadaddr(3520) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0d 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x7e 0x00 0x05 0x0e 0x06 0x00 0x00 0x0d 0xc0 0xa5 , 11) avrdude: Send: . [1b] ~ [7e] . [00] . [05] . [0e] . [06] . [00] . [00] . [0d] . [c0] . [a5] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ~ [7e] 0x7e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: o [6f] 0x6f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x7f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xda , 10) avrdude: Send: . [1b] . [7f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [da] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [7f] 0x7f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [fd] 0xfd = 137 STK500V2: stk500v2_paged_load(..,flash,128,7168,128) block_size at addr 7168 is 128 STK500V2: stk500v2_loadaddr(3584) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0e 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x80 0x00 0x05 0x0e 0x06 0x00 0x00 0x0e 0x00 0x98 , 11) avrdude: Send: . [1b] . [80] . [00] . [05] . [0e] . [06] . [00] . [00] . [0e] . [00] . [98] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [80] 0x80 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [91] 0x91 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x81 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x24 , 10) avrdude: Send: . [1b] . [81] . [00] . [04] . [0e] . [14] . [00] . [80] [20] $ [24] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [81] 0x81 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [03] 0x03 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,7296,128) block_size at addr 7296 is 128 STK500V2: stk500v2_loadaddr(3648) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0e 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x82 0x00 0x05 0x0e 0x06 0x00 0x00 0x0e 0x40 0xda , 11) avrdude: Send: . [1b] . [82] . [00] . [05] . [0e] . [06] . [00] . [00] . [0e] @ [40] . [da] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [82] 0x82 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [93] 0x93 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x83 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x26 , 10) avrdude: Send: . [1b] . [83] . [00] . [04] . [0e] . [14] . [00] . [80] [20] & [26] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [83] 0x83 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [01] 0x01 = 137 STK500V2: stk500v2_paged_load(..,flash,128,7424,128) block_size at addr 7424 is 128 STK500V2: stk500v2_loadaddr(3712) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0e 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x84 0x00 0x05 0x0e 0x06 0x00 0x00 0x0e 0x80 0x1c , 11) avrdude: Send: . [1b] . [84] . [00] . [05] . [0e] . [06] . [00] . [00] . [0e] . [80] . [1c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [84] 0x84 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [95] 0x95 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x85 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x20 , 10) avrdude: Send: . [1b] . [85] . [00] . [04] . [0e] . [14] . [00] . [80] [20] [20] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [85] 0x85 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [07] 0x07 = 137 STK500V2: stk500v2_paged_load(..,flash,128,7552,128) block_size at addr 7552 is 128 STK500V2: stk500v2_loadaddr(3776) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0e 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x86 0x00 0x05 0x0e 0x06 0x00 0x00 0x0e 0xc0 0x5e , 11) avrdude: Send: . [1b] . [86] . [00] . [05] . [0e] . [06] . [00] . [00] . [0e] . [c0] ^ [5e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [86] 0x86 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [97] 0x97 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x87 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x22 , 10) avrdude: Send: . [1b] . [87] . [00] . [04] . [0e] . [14] . [00] . [80] [20] " [22] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [87] 0x87 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [05] 0x05 = 137 STK500V2: stk500v2_paged_load(..,flash,128,7680,128) block_size at addr 7680 is 128 STK500V2: stk500v2_loadaddr(3840) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0f 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x88 0x00 0x05 0x0e 0x06 0x00 0x00 0x0f 0x00 0x91 , 11) avrdude: Send: . [1b] . [88] . [00] . [05] . [0e] . [06] . [00] . [00] . [0f] . [00] . [91] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [88] 0x88 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [99] 0x99 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x89 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x2c , 10) avrdude: Send: . [1b] . [89] . [00] . [04] . [0e] . [14] . [00] . [80] [20] , [2c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [89] 0x89 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0b] 0x0b = 137 STK500V2: stk500v2_paged_load(..,flash,128,7808,128) block_size at addr 7808 is 128 STK500V2: stk500v2_loadaddr(3904) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0f 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x8a 0x00 0x05 0x0e 0x06 0x00 0x00 0x0f 0x40 0xd3 , 11) avrdude: Send: . [1b] . [8a] . [00] . [05] . [0e] . [06] . [00] . [00] . [0f] @ [40] . [d3] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8a] 0x8a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9b] 0x9b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x8b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x2e , 10) avrdude: Send: . [1b] . [8b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [2e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8b] 0x8b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [09] 0x09 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,7936,128) block_size at addr 7936 is 128 STK500V2: stk500v2_loadaddr(3968) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0f 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x8c 0x00 0x05 0x0e 0x06 0x00 0x00 0x0f 0x80 0x15 , 11) avrdude: Send: . [1b] . [8c] . [00] . [05] . [0e] . [06] . [00] . [00] . [0f] . [80] . [15] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8c] 0x8c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9d] 0x9d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x8d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x28 , 10) avrdude: Send: . [1b] . [8d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] ( [28] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8d] 0x8d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0f] 0x0f = 137 STK500V2: stk500v2_paged_load(..,flash,128,8064,128) block_size at addr 8064 is 128 STK500V2: stk500v2_loadaddr(4032) STK500V2: stk500v2_command(0x06 0x00 0x00 0x0f 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x8e 0x00 0x05 0x0e 0x06 0x00 0x00 0x0f 0xc0 0x57 , 11) avrdude: Send: . [1b] . [8e] . [00] . [05] . [0e] . [06] . [00] . [00] . [0f] . [c0] W [57] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8e] 0x8e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9f] 0x9f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x8f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x2a , 10) avrdude: Send: . [1b] . [8f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] * [2a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8f] 0x8f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0d] 0x0d = 137 STK500V2: stk500v2_paged_load(..,flash,128,8192,128) block_size at addr 8192 is 128 STK500V2: stk500v2_loadaddr(4096) STK500V2: stk500v2_command(0x06 0x00 0x00 0x10 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x90 0x00 0x05 0x0e 0x06 0x00 0x00 0x10 0x00 0x96 , 11) avrdude: Send: . [1b] . [90] . [00] . [05] . [0e] . [06] . [00] . [00] . [10] . [00] . [96] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [90] 0x90 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [81] 0x81 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x91 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x34 , 10) avrdude: Send: . [1b] . [91] . [00] . [04] . [0e] . [14] . [00] . [80] [20] 4 [34] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [91] 0x91 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [13] 0x13 = 137 STK500V2: stk500v2_paged_load(..,flash,128,8320,128) block_size at addr 8320 is 128 STK500V2: stk500v2_loadaddr(4160) STK500V2: stk500v2_command(0x06 0x00 0x00 0x10 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x92 0x00 0x05 0x0e 0x06 0x00 0x00 0x10 0x40 0xd4 , 11) avrdude: Send: . [1b] . [92] . [00] . [05] . [0e] . [06] . [00] . [00] . [10] @ [40] . [d4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [92] 0x92 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [83] 0x83 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x93 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x36 , 10) avrdude: Send: . [1b] . [93] . [00] . [04] . [0e] . [14] . [00] . [80] [20] 6 [36] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [93] 0x93 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [11] 0x11 = 137 STK500V2: stk500v2_paged_load(..,flash,128,8448,128) block_size at addr 8448 is 128 STK500V2: stk500v2_loadaddr(4224) STK500V2: stk500v2_command(0x06 0x00 0x00 0x10 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x94 0x00 0x05 0x0e 0x06 0x00 0x00 0x10 0x80 0x12 , 11) avrdude: Send: . [1b] . [94] . [00] . [05] . [0e] . [06] . [00] . [00] . [10] . [80] . [12] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [94] 0x94 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [85] 0x85 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x95 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x30 , 10) avrdude: Send: . [1b] . [95] . [00] . [04] . [0e] . [14] . [00] . [80] [20] 0 [30] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [95] 0x95 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [17] 0x17 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,8576,128) block_size at addr 8576 is 128 STK500V2: stk500v2_loadaddr(4288) STK500V2: stk500v2_command(0x06 0x00 0x00 0x10 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x96 0x00 0x05 0x0e 0x06 0x00 0x00 0x10 0xc0 0x50 , 11) avrdude: Send: . [1b] . [96] . [00] . [05] . [0e] . [06] . [00] . [00] . [10] . [c0] P [50] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [96] 0x96 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [87] 0x87 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x97 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x32 , 10) avrdude: Send: . [1b] . [97] . [00] . [04] . [0e] . [14] . [00] . [80] [20] 2 [32] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [97] 0x97 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [15] 0x15 = 137 STK500V2: stk500v2_paged_load(..,flash,128,8704,128) block_size at addr 8704 is 128 STK500V2: stk500v2_loadaddr(4352) STK500V2: stk500v2_command(0x06 0x00 0x00 0x11 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x98 0x00 0x05 0x0e 0x06 0x00 0x00 0x11 0x00 0x9f , 11) avrdude: Send: . [1b] . [98] . [00] . [05] . [0e] . [06] . [00] . [00] . [11] . [00] . [9f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [98] 0x98 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [89] 0x89 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x99 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x3c , 10) avrdude: Send: . [1b] . [99] . [00] . [04] . [0e] . [14] . [00] . [80] [20] < [3c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [99] 0x99 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1b] 0x1b = 137 STK500V2: stk500v2_paged_load(..,flash,128,8832,128) block_size at addr 8832 is 128 STK500V2: stk500v2_loadaddr(4416) STK500V2: stk500v2_command(0x06 0x00 0x00 0x11 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x9a 0x00 0x05 0x0e 0x06 0x00 0x00 0x11 0x40 0xdd , 11) avrdude: Send: . [1b] . [9a] . [00] . [05] . [0e] . [06] . [00] . [00] . [11] @ [40] . [dd] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9a] 0x9a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8b] 0x8b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x9b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x3e , 10) avrdude: Send: . [1b] . [9b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] > [3e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9b] 0x9b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [19] 0x19 = 137 STK500V2: stk500v2_paged_load(..,flash,128,8960,128) block_size at addr 8960 is 128 STK500V2: stk500v2_loadaddr(4480) STK500V2: stk500v2_command(0x06 0x00 0x00 0x11 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x9c 0x00 0x05 0x0e 0x06 0x00 0x00 0x11 0x80 0x1b , 11) avrdude: Send: . [1b] . [9c] . [00] . [05] . [0e] . [06] . [00] . [00] . [11] . [80] . [1b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9c] 0x9c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8d] 0x8d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x9d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x38 , 10) avrdude: Send: . [1b] . [9d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] 8 [38] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9d] 0x9d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1f] 0x1f = 137 STK500V2: stk500v2_paged_load(..,flash,128,9088,128) block_size at addr 9088 is 128 STK500V2: stk500v2_loadaddr(4544) STK500V2: stk500v2_command(0x06 0x00 0x00 0x11 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x9e 0x00 0x05 0x0e 0x06 0x00 0x00 0x11 0xc0 0x59 , 11) avrdude: Send: . [1b] . [9e] . [00] . [05] . [0e] . [06] . [00] . [00] . [11] . [c0] Y [59] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9e] 0x9e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8f] 0x8f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x9f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x3a , 10) avrdude: Send: . [1b] . [9f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] : [3a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9f] 0x9f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1d] 0x1d = 137 #STK500V2: stk500v2_paged_load(..,flash,128,9216,128) block_size at addr 9216 is 128 STK500V2: stk500v2_loadaddr(4608) STK500V2: stk500v2_command(0x06 0x00 0x00 0x12 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xa0 0x00 0x05 0x0e 0x06 0x00 0x00 0x12 0x00 0xa4 , 11) avrdude: Send: . [1b] . [a0] . [00] . [05] . [0e] . [06] . [00] . [00] . [12] . [00] . [a4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a0] 0xa0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b1] 0xb1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xa1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x04 , 10) avrdude: Send: . [1b] . [a1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [04] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a1] 0xa1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: # [23] 0x23 = 137 STK500V2: stk500v2_paged_load(..,flash,128,9344,128) block_size at addr 9344 is 128 STK500V2: stk500v2_loadaddr(4672) STK500V2: stk500v2_command(0x06 0x00 0x00 0x12 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xa2 0x00 0x05 0x0e 0x06 0x00 0x00 0x12 0x40 0xe6 , 11) avrdude: Send: . [1b] . [a2] . [00] . [05] . [0e] . [06] . [00] . [00] . [12] @ [40] . [e6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a2] 0xa2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b3] 0xb3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xa3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x06 , 10) avrdude: Send: . [1b] . [a3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [06] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a3] 0xa3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ! [21] 0x21 = 137 STK500V2: stk500v2_paged_load(..,flash,128,9472,128) block_size at addr 9472 is 128 STK500V2: stk500v2_loadaddr(4736) STK500V2: stk500v2_command(0x06 0x00 0x00 0x12 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xa4 0x00 0x05 0x0e 0x06 0x00 0x00 0x12 0x80 0x20 , 11) avrdude: Send: . [1b] . [a4] . [00] . [05] . [0e] . [06] . [00] . [00] . [12] . [80] [20] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a4] 0xa4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b5] 0xb5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xa5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x00 , 10) avrdude: Send: . [1b] . [a5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [00] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a5] 0xa5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ' [27] 0x27 = 137 STK500V2: stk500v2_paged_load(..,flash,128,9600,128) block_size at addr 9600 is 128 STK500V2: stk500v2_loadaddr(4800) STK500V2: stk500v2_command(0x06 0x00 0x00 0x12 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xa6 0x00 0x05 0x0e 0x06 0x00 0x00 0x12 0xc0 0x62 , 11) avrdude: Send: . [1b] . [a6] . [00] . [05] . [0e] . [06] . [00] . [00] . [12] . [c0] b [62] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a6] 0xa6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b7] 0xb7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xa7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x02 , 10) avrdude: Send: . [1b] . [a7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [02] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a7] 0xa7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: % [25] 0x25 = 137 STK500V2: stk500v2_paged_load(..,flash,128,9728,128) block_size at addr 9728 is 128 STK500V2: stk500v2_loadaddr(4864) STK500V2: stk500v2_command(0x06 0x00 0x00 0x13 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xa8 0x00 0x05 0x0e 0x06 0x00 0x00 0x13 0x00 0xad , 11) avrdude: Send: . [1b] . [a8] . [00] . [05] . [0e] . [06] . [00] . [00] . [13] . [00] . [ad] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a8] 0xa8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b9] 0xb9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xa9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x0c , 10) avrdude: Send: . [1b] . [a9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [0c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a9] 0xa9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: + [2b] 0x2b = 137 #STK500V2: stk500v2_paged_load(..,flash,128,9856,128) block_size at addr 9856 is 128 STK500V2: stk500v2_loadaddr(4928) STK500V2: stk500v2_command(0x06 0x00 0x00 0x13 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xaa 0x00 0x05 0x0e 0x06 0x00 0x00 0x13 0x40 0xef , 11) avrdude: Send: . [1b] . [aa] . [00] . [05] . [0e] . [06] . [00] . [00] . [13] @ [40] . [ef] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [aa] 0xaa hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bb] 0xbb = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xab 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x0e , 10) avrdude: Send: . [1b] . [ab] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [0e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ab] 0xab hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ) [29] 0x29 = 137 STK500V2: stk500v2_paged_load(..,flash,128,9984,128) block_size at addr 9984 is 128 STK500V2: stk500v2_loadaddr(4992) STK500V2: stk500v2_command(0x06 0x00 0x00 0x13 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xac 0x00 0x05 0x0e 0x06 0x00 0x00 0x13 0x80 0x29 , 11) avrdude: Send: . [1b] . [ac] . [00] . [05] . [0e] . [06] . [00] . [00] . [13] . [80] ) [29] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ac] 0xac hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bd] 0xbd = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xad 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x08 , 10) avrdude: Send: . [1b] . [ad] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [08] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ad] 0xad hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: / [2f] 0x2f = 137 STK500V2: stk500v2_paged_load(..,flash,128,10112,128) block_size at addr 10112 is 128 STK500V2: stk500v2_loadaddr(5056) STK500V2: stk500v2_command(0x06 0x00 0x00 0x13 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xae 0x00 0x05 0x0e 0x06 0x00 0x00 0x13 0xc0 0x6b , 11) avrdude: Send: . [1b] . [ae] . [00] . [05] . [0e] . [06] . [00] . [00] . [13] . [c0] k [6b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ae] 0xae hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bf] 0xbf = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xaf 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x0a , 10) avrdude: Send: . [1b] . [af] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [0a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [af] 0xaf hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: - [2d] 0x2d = 137 STK500V2: stk500v2_paged_load(..,flash,128,10240,128) block_size at addr 10240 is 128 STK500V2: stk500v2_loadaddr(5120) STK500V2: stk500v2_command(0x06 0x00 0x00 0x14 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xb0 0x00 0x05 0x0e 0x06 0x00 0x00 0x14 0x00 0xb2 , 11) avrdude: Send: . [1b] . [b0] . [00] . [05] . [0e] . [06] . [00] . [00] . [14] . [00] . [b2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b0] 0xb0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a1] 0xa1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xb1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x14 , 10) avrdude: Send: . [1b] . [b1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [14] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b1] 0xb1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: 3 [33] 0x33 = 137 STK500V2: stk500v2_paged_load(..,flash,128,10368,128) block_size at addr 10368 is 128 STK500V2: stk500v2_loadaddr(5184) STK500V2: stk500v2_command(0x06 0x00 0x00 0x14 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xb2 0x00 0x05 0x0e 0x06 0x00 0x00 0x14 0x40 0xf0 , 11) avrdude: Send: . [1b] . [b2] . [00] . [05] . [0e] . [06] . [00] . [00] . [14] @ [40] . [f0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b2] 0xb2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a3] 0xa3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xb3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x16 , 10) avrdude: Send: . [1b] . [b3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [16] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b3] 0xb3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: 1 [31] 0x31 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,10496,128) block_size at addr 10496 is 128 STK500V2: stk500v2_loadaddr(5248) STK500V2: stk500v2_command(0x06 0x00 0x00 0x14 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xb4 0x00 0x05 0x0e 0x06 0x00 0x00 0x14 0x80 0x36 , 11) avrdude: Send: . [1b] . [b4] . [00] . [05] . [0e] . [06] . [00] . [00] . [14] . [80] 6 [36] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b4] 0xb4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a5] 0xa5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xb5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x10 , 10) avrdude: Send: . [1b] . [b5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [10] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b5] 0xb5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: 7 [37] 0x37 = 137 STK500V2: stk500v2_paged_load(..,flash,128,10624,128) block_size at addr 10624 is 128 STK500V2: stk500v2_loadaddr(5312) STK500V2: stk500v2_command(0x06 0x00 0x00 0x14 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xb6 0x00 0x05 0x0e 0x06 0x00 0x00 0x14 0xc0 0x74 , 11) avrdude: Send: . [1b] . [b6] . [00] . [05] . [0e] . [06] . [00] . [00] . [14] . [c0] t [74] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b6] 0xb6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a7] 0xa7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xb7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x12 , 10) avrdude: Send: . [1b] . [b7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [12] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b7] 0xb7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: 5 [35] 0x35 = 137 STK500V2: stk500v2_paged_load(..,flash,128,10752,128) block_size at addr 10752 is 128 STK500V2: stk500v2_loadaddr(5376) STK500V2: stk500v2_command(0x06 0x00 0x00 0x15 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xb8 0x00 0x05 0x0e 0x06 0x00 0x00 0x15 0x00 0xbb , 11) avrdude: Send: . [1b] . [b8] . [00] . [05] . [0e] . [06] . [00] . [00] . [15] . [00] . [bb] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b8] 0xb8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a9] 0xa9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xb9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x1c , 10) avrdude: Send: . [1b] . [b9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [1c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b9] 0xb9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ; [3b] 0x3b = 137 STK500V2: stk500v2_paged_load(..,flash,128,10880,128) block_size at addr 10880 is 128 STK500V2: stk500v2_loadaddr(5440) STK500V2: stk500v2_command(0x06 0x00 0x00 0x15 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xba 0x00 0x05 0x0e 0x06 0x00 0x00 0x15 0x40 0xf9 , 11) avrdude: Send: . [1b] . [ba] . [00] . [05] . [0e] . [06] . [00] . [00] . [15] @ [40] . [f9] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ba] 0xba hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ab] 0xab = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xbb 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x1e , 10) avrdude: Send: . [1b] . [bb] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [1e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [bb] 0xbb hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: 9 [39] 0x39 = 137 STK500V2: stk500v2_paged_load(..,flash,128,11008,128) block_size at addr 11008 is 128 STK500V2: stk500v2_loadaddr(5504) STK500V2: stk500v2_command(0x06 0x00 0x00 0x15 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xbc 0x00 0x05 0x0e 0x06 0x00 0x00 0x15 0x80 0x3f , 11) avrdude: Send: . [1b] . [bc] . [00] . [05] . [0e] . [06] . [00] . [00] . [15] . [80] ? [3f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [bc] 0xbc hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ad] 0xad = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xbd 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x18 , 10) avrdude: Send: . [1b] . [bd] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [18] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [bd] 0xbd hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ? [3f] 0x3f = 137 STK500V2: stk500v2_paged_load(..,flash,128,11136,128) block_size at addr 11136 is 128 STK500V2: stk500v2_loadaddr(5568) STK500V2: stk500v2_command(0x06 0x00 0x00 0x15 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xbe 0x00 0x05 0x0e 0x06 0x00 0x00 0x15 0xc0 0x7d , 11) avrdude: Send: . [1b] . [be] . [00] . [05] . [0e] . [06] . [00] . [00] . [15] . [c0] } [7d] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [be] 0xbe hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [af] 0xaf = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xbf 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x1a , 10) avrdude: Send: . [1b] . [bf] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [1a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [bf] 0xbf hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: = [3d] 0x3d = 137 #STK500V2: stk500v2_paged_load(..,flash,128,11264,128) block_size at addr 11264 is 128 STK500V2: stk500v2_loadaddr(5632) STK500V2: stk500v2_command(0x06 0x00 0x00 0x16 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xc0 0x00 0x05 0x0e 0x06 0x00 0x00 0x16 0x00 0xc0 , 11) avrdude: Send: . [1b] . [c0] . [00] . [05] . [0e] . [06] . [00] . [00] . [16] . [00] . [c0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c0] 0xc0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d1] 0xd1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xc1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x64 , 10) avrdude: Send: . [1b] . [c1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] d [64] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c1] 0xc1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: C [43] 0x43 = 137 STK500V2: stk500v2_paged_load(..,flash,128,11392,128) block_size at addr 11392 is 128 STK500V2: stk500v2_loadaddr(5696) STK500V2: stk500v2_command(0x06 0x00 0x00 0x16 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xc2 0x00 0x05 0x0e 0x06 0x00 0x00 0x16 0x40 0x82 , 11) avrdude: Send: . [1b] . [c2] . [00] . [05] . [0e] . [06] . [00] . [00] . [16] @ [40] . [82] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c2] 0xc2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d3] 0xd3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xc3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x66 , 10) avrdude: Send: . [1b] . [c3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] f [66] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c3] 0xc3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: A [41] 0x41 = 137 STK500V2: stk500v2_paged_load(..,flash,128,11520,128) block_size at addr 11520 is 128 STK500V2: stk500v2_loadaddr(5760) STK500V2: stk500v2_command(0x06 0x00 0x00 0x16 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xc4 0x00 0x05 0x0e 0x06 0x00 0x00 0x16 0x80 0x44 , 11) avrdude: Send: . [1b] . [c4] . [00] . [05] . [0e] . [06] . [00] . [00] . [16] . [80] D [44] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c4] 0xc4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d5] 0xd5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xc5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x60 , 10) avrdude: Send: . [1b] . [c5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] ` [60] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c5] 0xc5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: G [47] 0x47 = 137 STK500V2: stk500v2_paged_load(..,flash,128,11648,128) block_size at addr 11648 is 128 STK500V2: stk500v2_loadaddr(5824) STK500V2: stk500v2_command(0x06 0x00 0x00 0x16 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xc6 0x00 0x05 0x0e 0x06 0x00 0x00 0x16 0xc0 0x06 , 11) avrdude: Send: . [1b] . [c6] . [00] . [05] . [0e] . [06] . [00] . [00] . [16] . [c0] . [06] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c6] 0xc6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d7] 0xd7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xc7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x62 , 10) avrdude: Send: . [1b] . [c7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] b [62] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c7] 0xc7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: E [45] 0x45 = 137 STK500V2: stk500v2_paged_load(..,flash,128,11776,128) block_size at addr 11776 is 128 STK500V2: stk500v2_loadaddr(5888) STK500V2: stk500v2_command(0x06 0x00 0x00 0x17 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xc8 0x00 0x05 0x0e 0x06 0x00 0x00 0x17 0x00 0xc9 , 11) avrdude: Send: . [1b] . [c8] . [00] . [05] . [0e] . [06] . [00] . [00] . [17] . [00] . [c9] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c8] 0xc8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d9] 0xd9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xc9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x6c , 10) avrdude: Send: . [1b] . [c9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] l [6c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c9] 0xc9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: K [4b] 0x4b = 137 #STK500V2: stk500v2_paged_load(..,flash,128,11904,128) block_size at addr 11904 is 128 STK500V2: stk500v2_loadaddr(5952) STK500V2: stk500v2_command(0x06 0x00 0x00 0x17 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xca 0x00 0x05 0x0e 0x06 0x00 0x00 0x17 0x40 0x8b , 11) avrdude: Send: . [1b] . [ca] . [00] . [05] . [0e] . [06] . [00] . [00] . [17] @ [40] . [8b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ca] 0xca hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [db] 0xdb = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xcb 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x6e , 10) avrdude: Send: . [1b] . [cb] . [00] . [04] . [0e] . [14] . [00] . [80] [20] n [6e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [cb] 0xcb hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: I [49] 0x49 = 137 STK500V2: stk500v2_paged_load(..,flash,128,12032,128) block_size at addr 12032 is 128 STK500V2: stk500v2_loadaddr(6016) STK500V2: stk500v2_command(0x06 0x00 0x00 0x17 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xcc 0x00 0x05 0x0e 0x06 0x00 0x00 0x17 0x80 0x4d , 11) avrdude: Send: . [1b] . [cc] . [00] . [05] . [0e] . [06] . [00] . [00] . [17] . [80] M [4d] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [cc] 0xcc hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [dd] 0xdd = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xcd 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x68 , 10) avrdude: Send: . [1b] . [cd] . [00] . [04] . [0e] . [14] . [00] . [80] [20] h [68] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [cd] 0xcd hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: O [4f] 0x4f = 137 STK500V2: stk500v2_paged_load(..,flash,128,12160,128) block_size at addr 12160 is 128 STK500V2: stk500v2_loadaddr(6080) STK500V2: stk500v2_command(0x06 0x00 0x00 0x17 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xce 0x00 0x05 0x0e 0x06 0x00 0x00 0x17 0xc0 0x0f , 11) avrdude: Send: . [1b] . [ce] . [00] . [05] . [0e] . [06] . [00] . [00] . [17] . [c0] . [0f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ce] 0xce hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [df] 0xdf = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xcf 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x6a , 10) avrdude: Send: . [1b] . [cf] . [00] . [04] . [0e] . [14] . [00] . [80] [20] j [6a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [cf] 0xcf hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: M [4d] 0x4d = 137 STK500V2: stk500v2_paged_load(..,flash,128,12288,128) block_size at addr 12288 is 128 STK500V2: stk500v2_loadaddr(6144) STK500V2: stk500v2_command(0x06 0x00 0x00 0x18 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xd0 0x00 0x05 0x0e 0x06 0x00 0x00 0x18 0x00 0xde , 11) avrdude: Send: . [1b] . [d0] . [00] . [05] . [0e] . [06] . [00] . [00] . [18] . [00] . [de] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d0] 0xd0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c1] 0xc1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xd1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x74 , 10) avrdude: Send: . [1b] . [d1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] t [74] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d1] 0xd1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: S [53] 0x53 = 137 STK500V2: stk500v2_paged_load(..,flash,128,12416,128) block_size at addr 12416 is 128 STK500V2: stk500v2_loadaddr(6208) STK500V2: stk500v2_command(0x06 0x00 0x00 0x18 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xd2 0x00 0x05 0x0e 0x06 0x00 0x00 0x18 0x40 0x9c , 11) avrdude: Send: . [1b] . [d2] . [00] . [05] . [0e] . [06] . [00] . [00] . [18] @ [40] . [9c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d2] 0xd2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c3] 0xc3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xd3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x76 , 10) avrdude: Send: . [1b] . [d3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] v [76] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d3] 0xd3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: Q [51] 0x51 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,12544,128) block_size at addr 12544 is 128 STK500V2: stk500v2_loadaddr(6272) STK500V2: stk500v2_command(0x06 0x00 0x00 0x18 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xd4 0x00 0x05 0x0e 0x06 0x00 0x00 0x18 0x80 0x5a , 11) avrdude: Send: . [1b] . [d4] . [00] . [05] . [0e] . [06] . [00] . [00] . [18] . [80] Z [5a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d4] 0xd4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c5] 0xc5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xd5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x70 , 10) avrdude: Send: . [1b] . [d5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] p [70] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d5] 0xd5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: W [57] 0x57 = 137 STK500V2: stk500v2_paged_load(..,flash,128,12672,128) block_size at addr 12672 is 128 STK500V2: stk500v2_loadaddr(6336) STK500V2: stk500v2_command(0x06 0x00 0x00 0x18 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xd6 0x00 0x05 0x0e 0x06 0x00 0x00 0x18 0xc0 0x18 , 11) avrdude: Send: . [1b] . [d6] . [00] . [05] . [0e] . [06] . [00] . [00] . [18] . [c0] . [18] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d6] 0xd6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c7] 0xc7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xd7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x72 , 10) avrdude: Send: . [1b] . [d7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] r [72] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d7] 0xd7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: U [55] 0x55 = 137 STK500V2: stk500v2_paged_load(..,flash,128,12800,128) block_size at addr 12800 is 128 STK500V2: stk500v2_loadaddr(6400) STK500V2: stk500v2_command(0x06 0x00 0x00 0x19 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xd8 0x00 0x05 0x0e 0x06 0x00 0x00 0x19 0x00 0xd7 , 11) avrdude: Send: . [1b] . [d8] . [00] . [05] . [0e] . [06] . [00] . [00] . [19] . [00] . [d7] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d8] 0xd8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c9] 0xc9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xd9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x7c , 10) avrdude: Send: . [1b] . [d9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] | [7c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d9] 0xd9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: [ [5b] 0x5b = 137 STK500V2: stk500v2_paged_load(..,flash,128,12928,128) block_size at addr 12928 is 128 STK500V2: stk500v2_loadaddr(6464) STK500V2: stk500v2_command(0x06 0x00 0x00 0x19 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xda 0x00 0x05 0x0e 0x06 0x00 0x00 0x19 0x40 0x95 , 11) avrdude: Send: . [1b] . [da] . [00] . [05] . [0e] . [06] . [00] . [00] . [19] @ [40] . [95] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [da] 0xda hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cb] 0xcb = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xdb 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x7e , 10) avrdude: Send: . [1b] . [db] . [00] . [04] . [0e] . [14] . [00] . [80] [20] ~ [7e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [db] 0xdb hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: Y [59] 0x59 = 137 STK500V2: stk500v2_paged_load(..,flash,128,13056,128) block_size at addr 13056 is 128 STK500V2: stk500v2_loadaddr(6528) STK500V2: stk500v2_command(0x06 0x00 0x00 0x19 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xdc 0x00 0x05 0x0e 0x06 0x00 0x00 0x19 0x80 0x53 , 11) avrdude: Send: . [1b] . [dc] . [00] . [05] . [0e] . [06] . [00] . [00] . [19] . [80] S [53] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [dc] 0xdc hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cd] 0xcd = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xdd 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x78 , 10) avrdude: Send: . [1b] . [dd] . [00] . [04] . [0e] . [14] . [00] . [80] [20] x [78] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [dd] 0xdd hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: _ [5f] 0x5f = 137 #STK500V2: stk500v2_paged_load(..,flash,128,13184,128) block_size at addr 13184 is 128 STK500V2: stk500v2_loadaddr(6592) STK500V2: stk500v2_command(0x06 0x00 0x00 0x19 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xde 0x00 0x05 0x0e 0x06 0x00 0x00 0x19 0xc0 0x11 , 11) avrdude: Send: . [1b] . [de] . [00] . [05] . [0e] . [06] . [00] . [00] . [19] . [c0] . [11] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [de] 0xde hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cf] 0xcf = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xdf 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x7a , 10) avrdude: Send: . [1b] . [df] . [00] . [04] . [0e] . [14] . [00] . [80] [20] z [7a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [df] 0xdf hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ] [5d] 0x5d = 137 STK500V2: stk500v2_paged_load(..,flash,128,13312,128) block_size at addr 13312 is 128 STK500V2: stk500v2_loadaddr(6656) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1a 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xe0 0x00 0x05 0x0e 0x06 0x00 0x00 0x1a 0x00 0xec , 11) avrdude: Send: . [1b] . [e0] . [00] . [05] . [0e] . [06] . [00] . [00] . [1a] . [00] . [ec] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e0] 0xe0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f1] 0xf1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xe1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x44 , 10) avrdude: Send: . [1b] . [e1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] D [44] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e1] 0xe1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: c [63] 0x63 = 137 STK500V2: stk500v2_paged_load(..,flash,128,13440,128) block_size at addr 13440 is 128 STK500V2: stk500v2_loadaddr(6720) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1a 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xe2 0x00 0x05 0x0e 0x06 0x00 0x00 0x1a 0x40 0xae , 11) avrdude: Send: . [1b] . [e2] . [00] . [05] . [0e] . [06] . [00] . [00] . [1a] @ [40] . [ae] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e2] 0xe2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f3] 0xf3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xe3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x46 , 10) avrdude: Send: . [1b] . [e3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] F [46] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e3] 0xe3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: a [61] 0x61 = 137 STK500V2: stk500v2_paged_load(..,flash,128,13568,128) block_size at addr 13568 is 128 STK500V2: stk500v2_loadaddr(6784) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1a 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xe4 0x00 0x05 0x0e 0x06 0x00 0x00 0x1a 0x80 0x68 , 11) avrdude: Send: . [1b] . [e4] . [00] . [05] . [0e] . [06] . [00] . [00] . [1a] . [80] h [68] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e4] 0xe4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f5] 0xf5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xe5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x40 , 10) avrdude: Send: . [1b] . [e5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] @ [40] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e5] 0xe5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: g [67] 0x67 = 137 STK500V2: stk500v2_paged_load(..,flash,128,13696,128) block_size at addr 13696 is 128 STK500V2: stk500v2_loadaddr(6848) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1a 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xe6 0x00 0x05 0x0e 0x06 0x00 0x00 0x1a 0xc0 0x2a , 11) avrdude: Send: . [1b] . [e6] . [00] . [05] . [0e] . [06] . [00] . [00] . [1a] . [c0] * [2a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e6] 0xe6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f7] 0xf7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xe7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x42 , 10) avrdude: Send: . [1b] . [e7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] B [42] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e7] 0xe7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: e [65] 0x65 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,13824,128) block_size at addr 13824 is 128 STK500V2: stk500v2_loadaddr(6912) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1b 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xe8 0x00 0x05 0x0e 0x06 0x00 0x00 0x1b 0x00 0xe5 , 11) avrdude: Send: . [1b] . [e8] . [00] . [05] . [0e] . [06] . [00] . [00] . [1b] . [00] . [e5] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e8] 0xe8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f9] 0xf9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xe9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x4c , 10) avrdude: Send: . [1b] . [e9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] L [4c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e9] 0xe9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: k [6b] 0x6b = 137 STK500V2: stk500v2_paged_load(..,flash,128,13952,128) block_size at addr 13952 is 128 STK500V2: stk500v2_loadaddr(6976) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1b 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xea 0x00 0x05 0x0e 0x06 0x00 0x00 0x1b 0x40 0xa7 , 11) avrdude: Send: . [1b] . [ea] . [00] . [05] . [0e] . [06] . [00] . [00] . [1b] @ [40] . [a7] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ea] 0xea hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [fb] 0xfb = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xeb 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x4e , 10) avrdude: Send: . [1b] . [eb] . [00] . [04] . [0e] . [14] . [00] . [80] [20] N [4e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [eb] 0xeb hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: i [69] 0x69 = 137 STK500V2: stk500v2_paged_load(..,flash,128,14080,128) block_size at addr 14080 is 128 STK500V2: stk500v2_loadaddr(7040) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1b 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xec 0x00 0x05 0x0e 0x06 0x00 0x00 0x1b 0x80 0x61 , 11) avrdude: Send: . [1b] . [ec] . [00] . [05] . [0e] . [06] . [00] . [00] . [1b] . [80] a [61] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ec] 0xec hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [fd] 0xfd = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xed 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x48 , 10) avrdude: Send: . [1b] . [ed] . [00] . [04] . [0e] . [14] . [00] . [80] [20] H [48] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ed] 0xed hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: o [6f] 0x6f = 137 STK500V2: stk500v2_paged_load(..,flash,128,14208,128) block_size at addr 14208 is 128 STK500V2: stk500v2_loadaddr(7104) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1b 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xee 0x00 0x05 0x0e 0x06 0x00 0x00 0x1b 0xc0 0x23 , 11) avrdude: Send: . [1b] . [ee] . [00] . [05] . [0e] . [06] . [00] . [00] . [1b] . [c0] # [23] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ee] 0xee hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xef 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x4a , 10) avrdude: Send: . [1b] . [ef] . [00] . [04] . [0e] . [14] . [00] . [80] [20] J [4a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ef] 0xef hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: m [6d] 0x6d = 137 STK500V2: stk500v2_paged_load(..,flash,128,14336,128) block_size at addr 14336 is 128 STK500V2: stk500v2_loadaddr(7168) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1c 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xf0 0x00 0x05 0x0e 0x06 0x00 0x00 0x1c 0x00 0xfa , 11) avrdude: Send: . [1b] . [f0] . [00] . [05] . [0e] . [06] . [00] . [00] . [1c] . [00] . [fa] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f0] 0xf0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e1] 0xe1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xf1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x54 , 10) avrdude: Send: . [1b] . [f1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] T [54] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f1] 0xf1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: s [73] 0x73 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,14464,128) block_size at addr 14464 is 128 STK500V2: stk500v2_loadaddr(7232) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1c 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xf2 0x00 0x05 0x0e 0x06 0x00 0x00 0x1c 0x40 0xb8 , 11) avrdude: Send: . [1b] . [f2] . [00] . [05] . [0e] . [06] . [00] . [00] . [1c] @ [40] . [b8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f2] 0xf2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e3] 0xe3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xf3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x56 , 10) avrdude: Send: . [1b] . [f3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] V [56] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f3] 0xf3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: q [71] 0x71 = 137 STK500V2: stk500v2_paged_load(..,flash,128,14592,128) block_size at addr 14592 is 128 STK500V2: stk500v2_loadaddr(7296) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1c 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xf4 0x00 0x05 0x0e 0x06 0x00 0x00 0x1c 0x80 0x7e , 11) avrdude: Send: . [1b] . [f4] . [00] . [05] . [0e] . [06] . [00] . [00] . [1c] . [80] ~ [7e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f4] 0xf4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e5] 0xe5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xf5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x50 , 10) avrdude: Send: . [1b] . [f5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] P [50] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f5] 0xf5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: w [77] 0x77 = 137 STK500V2: stk500v2_paged_load(..,flash,128,14720,128) block_size at addr 14720 is 128 STK500V2: stk500v2_loadaddr(7360) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1c 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xf6 0x00 0x05 0x0e 0x06 0x00 0x00 0x1c 0xc0 0x3c , 11) avrdude: Send: . [1b] . [f6] . [00] . [05] . [0e] . [06] . [00] . [00] . [1c] . [c0] < [3c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f6] 0xf6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e7] 0xe7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xf7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x52 , 10) avrdude: Send: . [1b] . [f7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] R [52] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f7] 0xf7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: u [75] 0x75 = 137 STK500V2: stk500v2_paged_load(..,flash,128,14848,128) block_size at addr 14848 is 128 STK500V2: stk500v2_loadaddr(7424) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1d 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xf8 0x00 0x05 0x0e 0x06 0x00 0x00 0x1d 0x00 0xf3 , 11) avrdude: Send: . [1b] . [f8] . [00] . [05] . [0e] . [06] . [00] . [00] . [1d] . [00] . [f3] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f8] 0xf8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e9] 0xe9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xf9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x5c , 10) avrdude: Send: . [1b] . [f9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] \ [5c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f9] 0xf9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: { [7b] 0x7b = 137 STK500V2: stk500v2_paged_load(..,flash,128,14976,128) block_size at addr 14976 is 128 STK500V2: stk500v2_loadaddr(7488) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1d 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xfa 0x00 0x05 0x0e 0x06 0x00 0x00 0x1d 0x40 0xb1 , 11) avrdude: Send: . [1b] . [fa] . [00] . [05] . [0e] . [06] . [00] . [00] . [1d] @ [40] . [b1] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [fa] 0xfa hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [eb] 0xeb = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xfb 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x5e , 10) avrdude: Send: . [1b] . [fb] . [00] . [04] . [0e] . [14] . [00] . [80] [20] ^ [5e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [fb] 0xfb hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: y [79] 0x79 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,15104,128) block_size at addr 15104 is 128 STK500V2: stk500v2_loadaddr(7552) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1d 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xfc 0x00 0x05 0x0e 0x06 0x00 0x00 0x1d 0x80 0x77 , 11) avrdude: Send: . [1b] . [fc] . [00] . [05] . [0e] . [06] . [00] . [00] . [1d] . [80] w [77] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [fc] 0xfc hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ed] 0xed = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xfd 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x58 , 10) avrdude: Send: . [1b] . [fd] . [00] . [04] . [0e] . [14] . [00] . [80] [20] X [58] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [fd] 0xfd hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [7f] 0x7f = 137 STK500V2: stk500v2_paged_load(..,flash,128,15232,128) block_size at addr 15232 is 128 STK500V2: stk500v2_loadaddr(7616) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1d 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xfe 0x00 0x05 0x0e 0x06 0x00 0x00 0x1d 0xc0 0x35 , 11) avrdude: Send: . [1b] . [fe] . [00] . [05] . [0e] . [06] . [00] . [00] . [1d] . [c0] 5 [35] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [fe] 0xfe hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ef] 0xef = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xff 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x5a , 10) avrdude: Send: . [1b] . [ff] . [00] . [04] . [0e] . [14] . [00] . [80] [20] Z [5a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ff] 0xff hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: } [7d] 0x7d = 137 STK500V2: stk500v2_paged_load(..,flash,128,15360,128) block_size at addr 15360 is 128 STK500V2: stk500v2_loadaddr(7680) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1e 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x00 0x00 0x05 0x0e 0x06 0x00 0x00 0x1e 0x00 0x08 , 11) avrdude: Send: . [1b] . [00] . [00] . [05] . [0e] . [06] . [00] . [00] . [1e] . [00] . [08] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [00] 0x00 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [11] 0x11 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x01 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xa4 , 10) avrdude: Send: . [1b] . [01] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [a4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [01] 0x01 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [83] 0x83 = 137 STK500V2: stk500v2_paged_load(..,flash,128,15488,128) block_size at addr 15488 is 128 STK500V2: stk500v2_loadaddr(7744) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1e 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x02 0x00 0x05 0x0e 0x06 0x00 0x00 0x1e 0x40 0x4a , 11) avrdude: Send: . [1b] . [02] . [00] . [05] . [0e] . [06] . [00] . [00] . [1e] @ [40] J [4a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [02] 0x02 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [13] 0x13 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x03 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xa6 , 10) avrdude: Send: . [1b] . [03] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [a6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [03] 0x03 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [81] 0x81 = 137 STK500V2: stk500v2_paged_load(..,flash,128,15616,128) block_size at addr 15616 is 128 STK500V2: stk500v2_loadaddr(7808) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1e 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x04 0x00 0x05 0x0e 0x06 0x00 0x00 0x1e 0x80 0x8c , 11) avrdude: Send: . [1b] . [04] . [00] . [05] . [0e] . [06] . [00] . [00] . [1e] . [80] . [8c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [04] 0x04 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [15] 0x15 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x05 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xa0 , 10) avrdude: Send: . [1b] . [05] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [a0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [05] 0x05 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [87] 0x87 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,15744,128) block_size at addr 15744 is 128 STK500V2: stk500v2_loadaddr(7872) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1e 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x06 0x00 0x05 0x0e 0x06 0x00 0x00 0x1e 0xc0 0xce , 11) avrdude: Send: . [1b] . [06] . [00] . [05] . [0e] . [06] . [00] . [00] . [1e] . [c0] . [ce] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [06] 0x06 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [17] 0x17 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x07 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xa2 , 10) avrdude: Send: . [1b] . [07] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [a2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [07] 0x07 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [85] 0x85 = 137 STK500V2: stk500v2_paged_load(..,flash,128,15872,128) block_size at addr 15872 is 128 STK500V2: stk500v2_loadaddr(7936) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1f 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x08 0x00 0x05 0x0e 0x06 0x00 0x00 0x1f 0x00 0x01 , 11) avrdude: Send: . [1b] . [08] . [00] . [05] . [0e] . [06] . [00] . [00] . [1f] . [00] . [01] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [08] 0x08 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [19] 0x19 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x09 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xac , 10) avrdude: Send: . [1b] . [09] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ac] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [09] 0x09 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8b] 0x8b = 137 STK500V2: stk500v2_paged_load(..,flash,128,16000,128) block_size at addr 16000 is 128 STK500V2: stk500v2_loadaddr(8000) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1f 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x05 0x0e 0x06 0x00 0x00 0x1f 0x40 0x43 , 11) avrdude: Send: . [1b] . [0a] . [00] . [05] . [0e] . [06] . [00] . [00] . [1f] @ [40] C [43] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0a] 0x0a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1b] 0x1b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xae , 10) avrdude: Send: . [1b] . [0b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ae] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0b] 0x0b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [89] 0x89 = 137 STK500V2: stk500v2_paged_load(..,flash,128,16128,128) block_size at addr 16128 is 128 STK500V2: stk500v2_loadaddr(8064) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1f 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x05 0x0e 0x06 0x00 0x00 0x1f 0x80 0x85 , 11) avrdude: Send: . [1b] . [0c] . [00] . [05] . [0e] . [06] . [00] . [00] . [1f] . [80] . [85] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0c] 0x0c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1d] 0x1d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xa8 , 10) avrdude: Send: . [1b] . [0d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [a8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0d] 0x0d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8f] 0x8f = 137 STK500V2: stk500v2_paged_load(..,flash,128,16256,128) block_size at addr 16256 is 128 STK500V2: stk500v2_loadaddr(8128) STK500V2: stk500v2_command(0x06 0x00 0x00 0x1f 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x05 0x0e 0x06 0x00 0x00 0x1f 0xc0 0xc7 , 11) avrdude: Send: . [1b] . [0e] . [00] . [05] . [0e] . [06] . [00] . [00] . [1f] . [c0] . [c7] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0e] 0x0e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1f] 0x1f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xaa , 10) avrdude: Send: . [1b] . [0f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [aa] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0f] 0x0f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8d] 0x8d = 137 #STK500V2: stk500v2_paged_load(..,flash,128,16384,128) block_size at addr 16384 is 128 STK500V2: stk500v2_loadaddr(8192) STK500V2: stk500v2_command(0x06 0x00 0x00 0x20 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x10 0x00 0x05 0x0e 0x06 0x00 0x00 0x20 0x00 0x26 , 11) avrdude: Send: . [1b] . [10] . [00] . [05] . [0e] . [06] . [00] . [00] [20] . [00] & [26] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [10] 0x10 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [01] 0x01 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x11 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xb4 , 10) avrdude: Send: . [1b] . [11] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [b4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [11] 0x11 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [93] 0x93 = 137 STK500V2: stk500v2_paged_load(..,flash,128,16512,128) block_size at addr 16512 is 128 STK500V2: stk500v2_loadaddr(8256) STK500V2: stk500v2_command(0x06 0x00 0x00 0x20 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x12 0x00 0x05 0x0e 0x06 0x00 0x00 0x20 0x40 0x64 , 11) avrdude: Send: . [1b] . [12] . [00] . [05] . [0e] . [06] . [00] . [00] [20] @ [40] d [64] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [12] 0x12 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [03] 0x03 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x13 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xb6 , 10) avrdude: Send: . [1b] . [13] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [b6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [13] 0x13 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [91] 0x91 = 137 STK500V2: stk500v2_paged_load(..,flash,128,16640,128) block_size at addr 16640 is 128 STK500V2: stk500v2_loadaddr(8320) STK500V2: stk500v2_command(0x06 0x00 0x00 0x20 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x14 0x00 0x05 0x0e 0x06 0x00 0x00 0x20 0x80 0xa2 , 11) avrdude: Send: . [1b] . [14] . [00] . [05] . [0e] . [06] . [00] . [00] [20] . [80] . [a2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [14] 0x14 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [05] 0x05 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x15 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xb0 , 10) avrdude: Send: . [1b] . [15] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [b0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [15] 0x15 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [97] 0x97 = 137 STK500V2: stk500v2_paged_load(..,flash,128,16768,128) block_size at addr 16768 is 128 STK500V2: stk500v2_loadaddr(8384) STK500V2: stk500v2_command(0x06 0x00 0x00 0x20 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x16 0x00 0x05 0x0e 0x06 0x00 0x00 0x20 0xc0 0xe0 , 11) avrdude: Send: . [1b] . [16] . [00] . [05] . [0e] . [06] . [00] . [00] [20] . [c0] . [e0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [16] 0x16 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [07] 0x07 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x17 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xb2 , 10) avrdude: Send: . [1b] . [17] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [b2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [17] 0x17 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [95] 0x95 = 137 STK500V2: stk500v2_paged_load(..,flash,128,16896,128) block_size at addr 16896 is 128 STK500V2: stk500v2_loadaddr(8448) STK500V2: stk500v2_command(0x06 0x00 0x00 0x21 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x18 0x00 0x05 0x0e 0x06 0x00 0x00 0x21 0x00 0x2f , 11) avrdude: Send: . [1b] . [18] . [00] . [05] . [0e] . [06] . [00] . [00] ! [21] . [00] / [2f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [18] 0x18 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [09] 0x09 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x19 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xbc , 10) avrdude: Send: . [1b] . [19] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [bc] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [19] 0x19 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9b] 0x9b = 137 STK500V2: stk500v2_paged_load(..,flash,128,17024,128) block_size at addr 17024 is 128 STK500V2: stk500v2_loadaddr(8512) STK500V2: stk500v2_command(0x06 0x00 0x00 0x21 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x1a 0x00 0x05 0x0e 0x06 0x00 0x00 0x21 0x40 0x6d , 11) avrdude: Send: . [1b] . [1a] . [00] . [05] . [0e] . [06] . [00] . [00] ! [21] @ [40] m [6d] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1a] 0x1a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0b] 0x0b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x1b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xbe , 10) avrdude: Send: . [1b] . [1b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [be] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1b] 0x1b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [99] 0x99 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,17152,128) block_size at addr 17152 is 128 STK500V2: stk500v2_loadaddr(8576) STK500V2: stk500v2_command(0x06 0x00 0x00 0x21 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x1c 0x00 0x05 0x0e 0x06 0x00 0x00 0x21 0x80 0xab , 11) avrdude: Send: . [1b] . [1c] . [00] . [05] . [0e] . [06] . [00] . [00] ! [21] . [80] . [ab] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1c] 0x1c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0d] 0x0d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x1d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xb8 , 10) avrdude: Send: . [1b] . [1d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [b8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1d] 0x1d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9f] 0x9f = 137 STK500V2: stk500v2_paged_load(..,flash,128,17280,128) block_size at addr 17280 is 128 STK500V2: stk500v2_loadaddr(8640) STK500V2: stk500v2_command(0x06 0x00 0x00 0x21 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x1e 0x00 0x05 0x0e 0x06 0x00 0x00 0x21 0xc0 0xe9 , 11) avrdude: Send: . [1b] . [1e] . [00] . [05] . [0e] . [06] . [00] . [00] ! [21] . [c0] . [e9] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1e] 0x1e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0f] 0x0f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x1f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xba , 10) avrdude: Send: . [1b] . [1f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ba] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [1f] 0x1f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9d] 0x9d = 137 STK500V2: stk500v2_paged_load(..,flash,128,17408,128) block_size at addr 17408 is 128 STK500V2: stk500v2_loadaddr(8704) STK500V2: stk500v2_command(0x06 0x00 0x00 0x22 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x20 0x00 0x05 0x0e 0x06 0x00 0x00 0x22 0x00 0x14 , 11) avrdude: Send: . [1b] [20] . [00] . [05] . [0e] . [06] . [00] . [00] " [22] . [00] . [14] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: [20] 0x20 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: 1 [31] 0x31 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x21 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x84 , 10) avrdude: Send: . [1b] ! [21] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [84] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ! [21] 0x21 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a3] 0xa3 = 137 STK500V2: stk500v2_paged_load(..,flash,128,17536,128) block_size at addr 17536 is 128 STK500V2: stk500v2_loadaddr(8768) STK500V2: stk500v2_command(0x06 0x00 0x00 0x22 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x22 0x00 0x05 0x0e 0x06 0x00 0x00 0x22 0x40 0x56 , 11) avrdude: Send: . [1b] " [22] . [00] . [05] . [0e] . [06] . [00] . [00] " [22] @ [40] V [56] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: " [22] 0x22 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: 3 [33] 0x33 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x23 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x86 , 10) avrdude: Send: . [1b] # [23] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [86] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: # [23] 0x23 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a1] 0xa1 = 137 STK500V2: stk500v2_paged_load(..,flash,128,17664,128) block_size at addr 17664 is 128 STK500V2: stk500v2_loadaddr(8832) STK500V2: stk500v2_command(0x06 0x00 0x00 0x22 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x24 0x00 0x05 0x0e 0x06 0x00 0x00 0x22 0x80 0x90 , 11) avrdude: Send: . [1b] $ [24] . [00] . [05] . [0e] . [06] . [00] . [00] " [22] . [80] . [90] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: $ [24] 0x24 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: 5 [35] 0x35 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x25 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x80 , 10) avrdude: Send: . [1b] % [25] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [80] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: % [25] 0x25 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a7] 0xa7 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,17792,128) block_size at addr 17792 is 128 STK500V2: stk500v2_loadaddr(8896) STK500V2: stk500v2_command(0x06 0x00 0x00 0x22 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x26 0x00 0x05 0x0e 0x06 0x00 0x00 0x22 0xc0 0xd2 , 11) avrdude: Send: . [1b] & [26] . [00] . [05] . [0e] . [06] . [00] . [00] " [22] . [c0] . [d2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: & [26] 0x26 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: 7 [37] 0x37 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x27 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x82 , 10) avrdude: Send: . [1b] ' [27] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [82] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ' [27] 0x27 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a5] 0xa5 = 137 STK500V2: stk500v2_paged_load(..,flash,128,17920,128) block_size at addr 17920 is 128 STK500V2: stk500v2_loadaddr(8960) STK500V2: stk500v2_command(0x06 0x00 0x00 0x23 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x28 0x00 0x05 0x0e 0x06 0x00 0x00 0x23 0x00 0x1d , 11) avrdude: Send: . [1b] ( [28] . [00] . [05] . [0e] . [06] . [00] . [00] # [23] . [00] . [1d] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ( [28] 0x28 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: 9 [39] 0x39 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x29 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x8c , 10) avrdude: Send: . [1b] ) [29] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [8c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ) [29] 0x29 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ab] 0xab = 137 STK500V2: stk500v2_paged_load(..,flash,128,18048,128) block_size at addr 18048 is 128 STK500V2: stk500v2_loadaddr(9024) STK500V2: stk500v2_command(0x06 0x00 0x00 0x23 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x2a 0x00 0x05 0x0e 0x06 0x00 0x00 0x23 0x40 0x5f , 11) avrdude: Send: . [1b] * [2a] . [00] . [05] . [0e] . [06] . [00] . [00] # [23] @ [40] _ [5f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: * [2a] 0x2a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ; [3b] 0x3b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x2b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x8e , 10) avrdude: Send: . [1b] + [2b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [8e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: + [2b] 0x2b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a9] 0xa9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,18176,128) block_size at addr 18176 is 128 STK500V2: stk500v2_loadaddr(9088) STK500V2: stk500v2_command(0x06 0x00 0x00 0x23 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x2c 0x00 0x05 0x0e 0x06 0x00 0x00 0x23 0x80 0x99 , 11) avrdude: Send: . [1b] , [2c] . [00] . [05] . [0e] . [06] . [00] . [00] # [23] . [80] . [99] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: , [2c] 0x2c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: = [3d] 0x3d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x2d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x88 , 10) avrdude: Send: . [1b] - [2d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [88] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: - [2d] 0x2d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [af] 0xaf = 137 STK500V2: stk500v2_paged_load(..,flash,128,18304,128) block_size at addr 18304 is 128 STK500V2: stk500v2_loadaddr(9152) STK500V2: stk500v2_command(0x06 0x00 0x00 0x23 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x2e 0x00 0x05 0x0e 0x06 0x00 0x00 0x23 0xc0 0xdb , 11) avrdude: Send: . [1b] . [2e] . [00] . [05] . [0e] . [06] . [00] . [00] # [23] . [c0] . [db] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [2e] 0x2e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ? [3f] 0x3f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x2f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x8a , 10) avrdude: Send: . [1b] / [2f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [8a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: / [2f] 0x2f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ad] 0xad = 137 #STK500V2: stk500v2_paged_load(..,flash,128,18432,128) block_size at addr 18432 is 128 STK500V2: stk500v2_loadaddr(9216) STK500V2: stk500v2_command(0x06 0x00 0x00 0x24 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x30 0x00 0x05 0x0e 0x06 0x00 0x00 0x24 0x00 0x02 , 11) avrdude: Send: . [1b] 0 [30] . [00] . [05] . [0e] . [06] . [00] . [00] $ [24] . [00] . [02] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 0 [30] 0x30 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ! [21] 0x21 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x31 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x94 , 10) avrdude: Send: . [1b] 1 [31] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [94] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 1 [31] 0x31 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b3] 0xb3 = 137 STK500V2: stk500v2_paged_load(..,flash,128,18560,128) block_size at addr 18560 is 128 STK500V2: stk500v2_loadaddr(9280) STK500V2: stk500v2_command(0x06 0x00 0x00 0x24 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x32 0x00 0x05 0x0e 0x06 0x00 0x00 0x24 0x40 0x40 , 11) avrdude: Send: . [1b] 2 [32] . [00] . [05] . [0e] . [06] . [00] . [00] $ [24] @ [40] @ [40] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 2 [32] 0x32 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: # [23] 0x23 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x33 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x96 , 10) avrdude: Send: . [1b] 3 [33] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [96] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 3 [33] 0x33 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b1] 0xb1 = 137 STK500V2: stk500v2_paged_load(..,flash,128,18688,128) block_size at addr 18688 is 128 STK500V2: stk500v2_loadaddr(9344) STK500V2: stk500v2_command(0x06 0x00 0x00 0x24 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x34 0x00 0x05 0x0e 0x06 0x00 0x00 0x24 0x80 0x86 , 11) avrdude: Send: . [1b] 4 [34] . [00] . [05] . [0e] . [06] . [00] . [00] $ [24] . [80] . [86] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 4 [34] 0x34 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: % [25] 0x25 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x35 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x90 , 10) avrdude: Send: . [1b] 5 [35] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [90] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 5 [35] 0x35 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b7] 0xb7 = 137 STK500V2: stk500v2_paged_load(..,flash,128,18816,128) block_size at addr 18816 is 128 STK500V2: stk500v2_loadaddr(9408) STK500V2: stk500v2_command(0x06 0x00 0x00 0x24 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x36 0x00 0x05 0x0e 0x06 0x00 0x00 0x24 0xc0 0xc4 , 11) avrdude: Send: . [1b] 6 [36] . [00] . [05] . [0e] . [06] . [00] . [00] $ [24] . [c0] . [c4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 6 [36] 0x36 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ' [27] 0x27 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x37 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x92 , 10) avrdude: Send: . [1b] 7 [37] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [92] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 7 [37] 0x37 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b5] 0xb5 = 137 STK500V2: stk500v2_paged_load(..,flash,128,18944,128) block_size at addr 18944 is 128 STK500V2: stk500v2_loadaddr(9472) STK500V2: stk500v2_command(0x06 0x00 0x00 0x25 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x38 0x00 0x05 0x0e 0x06 0x00 0x00 0x25 0x00 0x0b , 11) avrdude: Send: . [1b] 8 [38] . [00] . [05] . [0e] . [06] . [00] . [00] % [25] . [00] . [0b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 8 [38] 0x38 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ) [29] 0x29 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x39 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x9c , 10) avrdude: Send: . [1b] 9 [39] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [9c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: 9 [39] 0x39 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bb] 0xbb = 137 #STK500V2: stk500v2_paged_load(..,flash,128,19072,128) block_size at addr 19072 is 128 STK500V2: stk500v2_loadaddr(9536) STK500V2: stk500v2_command(0x06 0x00 0x00 0x25 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x3a 0x00 0x05 0x0e 0x06 0x00 0x00 0x25 0x40 0x49 , 11) avrdude: Send: . [1b] : [3a] . [00] . [05] . [0e] . [06] . [00] . [00] % [25] @ [40] I [49] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: : [3a] 0x3a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: + [2b] 0x2b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x3b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x9e , 10) avrdude: Send: . [1b] ; [3b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [9e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ; [3b] 0x3b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b9] 0xb9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,19200,128) block_size at addr 19200 is 128 STK500V2: stk500v2_loadaddr(9600) STK500V2: stk500v2_command(0x06 0x00 0x00 0x25 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x3c 0x00 0x05 0x0e 0x06 0x00 0x00 0x25 0x80 0x8f , 11) avrdude: Send: . [1b] < [3c] . [00] . [05] . [0e] . [06] . [00] . [00] % [25] . [80] . [8f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: < [3c] 0x3c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: - [2d] 0x2d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x3d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x98 , 10) avrdude: Send: . [1b] = [3d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [98] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: = [3d] 0x3d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bf] 0xbf = 137 STK500V2: stk500v2_paged_load(..,flash,128,19328,128) block_size at addr 19328 is 128 STK500V2: stk500v2_loadaddr(9664) STK500V2: stk500v2_command(0x06 0x00 0x00 0x25 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x3e 0x00 0x05 0x0e 0x06 0x00 0x00 0x25 0xc0 0xcd , 11) avrdude: Send: . [1b] > [3e] . [00] . [05] . [0e] . [06] . [00] . [00] % [25] . [c0] . [cd] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: > [3e] 0x3e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: / [2f] 0x2f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x3f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x9a , 10) avrdude: Send: . [1b] ? [3f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [9a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ? [3f] 0x3f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bd] 0xbd = 137 STK500V2: stk500v2_paged_load(..,flash,128,19456,128) block_size at addr 19456 is 128 STK500V2: stk500v2_loadaddr(9728) STK500V2: stk500v2_command(0x06 0x00 0x00 0x26 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x40 0x00 0x05 0x0e 0x06 0x00 0x00 0x26 0x00 0x70 , 11) avrdude: Send: . [1b] @ [40] . [00] . [05] . [0e] . [06] . [00] . [00] & [26] . [00] p [70] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: @ [40] 0x40 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: Q [51] 0x51 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x41 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xe4 , 10) avrdude: Send: . [1b] A [41] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [e4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: A [41] 0x41 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c3] 0xc3 = 137 STK500V2: stk500v2_paged_load(..,flash,128,19584,128) block_size at addr 19584 is 128 STK500V2: stk500v2_loadaddr(9792) STK500V2: stk500v2_command(0x06 0x00 0x00 0x26 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x42 0x00 0x05 0x0e 0x06 0x00 0x00 0x26 0x40 0x32 , 11) avrdude: Send: . [1b] B [42] . [00] . [05] . [0e] . [06] . [00] . [00] & [26] @ [40] 2 [32] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: B [42] 0x42 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: S [53] 0x53 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x43 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xe6 , 10) avrdude: Send: . [1b] C [43] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [e6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: C [43] 0x43 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c1] 0xc1 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,19712,128) block_size at addr 19712 is 128 STK500V2: stk500v2_loadaddr(9856) STK500V2: stk500v2_command(0x06 0x00 0x00 0x26 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x44 0x00 0x05 0x0e 0x06 0x00 0x00 0x26 0x80 0xf4 , 11) avrdude: Send: . [1b] D [44] . [00] . [05] . [0e] . [06] . [00] . [00] & [26] . [80] . [f4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: D [44] 0x44 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: U [55] 0x55 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x45 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xe0 , 10) avrdude: Send: . [1b] E [45] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [e0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: E [45] 0x45 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c7] 0xc7 = 137 STK500V2: stk500v2_paged_load(..,flash,128,19840,128) block_size at addr 19840 is 128 STK500V2: stk500v2_loadaddr(9920) STK500V2: stk500v2_command(0x06 0x00 0x00 0x26 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x46 0x00 0x05 0x0e 0x06 0x00 0x00 0x26 0xc0 0xb6 , 11) avrdude: Send: . [1b] F [46] . [00] . [05] . [0e] . [06] . [00] . [00] & [26] . [c0] . [b6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: F [46] 0x46 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: W [57] 0x57 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x47 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xe2 , 10) avrdude: Send: . [1b] G [47] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [e2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: G [47] 0x47 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c5] 0xc5 = 137 STK500V2: stk500v2_paged_load(..,flash,128,19968,128) block_size at addr 19968 is 128 STK500V2: stk500v2_loadaddr(9984) STK500V2: stk500v2_command(0x06 0x00 0x00 0x27 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x48 0x00 0x05 0x0e 0x06 0x00 0x00 0x27 0x00 0x79 , 11) avrdude: Send: . [1b] H [48] . [00] . [05] . [0e] . [06] . [00] . [00] ' [27] . [00] y [79] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: H [48] 0x48 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: Y [59] 0x59 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x49 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xec , 10) avrdude: Send: . [1b] I [49] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ec] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: I [49] 0x49 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cb] 0xcb = 137 STK500V2: stk500v2_paged_load(..,flash,128,20096,128) block_size at addr 20096 is 128 STK500V2: stk500v2_loadaddr(10048) STK500V2: stk500v2_command(0x06 0x00 0x00 0x27 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x4a 0x00 0x05 0x0e 0x06 0x00 0x00 0x27 0x40 0x3b , 11) avrdude: Send: . [1b] J [4a] . [00] . [05] . [0e] . [06] . [00] . [00] ' [27] @ [40] ; [3b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: J [4a] 0x4a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: [ [5b] 0x5b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x4b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xee , 10) avrdude: Send: . [1b] K [4b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ee] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: K [4b] 0x4b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c9] 0xc9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,20224,128) block_size at addr 20224 is 128 STK500V2: stk500v2_loadaddr(10112) STK500V2: stk500v2_command(0x06 0x00 0x00 0x27 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x4c 0x00 0x05 0x0e 0x06 0x00 0x00 0x27 0x80 0xfd , 11) avrdude: Send: . [1b] L [4c] . [00] . [05] . [0e] . [06] . [00] . [00] ' [27] . [80] . [fd] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: L [4c] 0x4c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: ] [5d] 0x5d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x4d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xe8 , 10) avrdude: Send: . [1b] M [4d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [e8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: M [4d] 0x4d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cf] 0xcf = 137 #STK500V2: stk500v2_paged_load(..,flash,128,20352,128) block_size at addr 20352 is 128 STK500V2: stk500v2_loadaddr(10176) STK500V2: stk500v2_command(0x06 0x00 0x00 0x27 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x4e 0x00 0x05 0x0e 0x06 0x00 0x00 0x27 0xc0 0xbf , 11) avrdude: Send: . [1b] N [4e] . [00] . [05] . [0e] . [06] . [00] . [00] ' [27] . [c0] . [bf] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: N [4e] 0x4e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: _ [5f] 0x5f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x4f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xea , 10) avrdude: Send: . [1b] O [4f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ea] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: O [4f] 0x4f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cd] 0xcd = 137 STK500V2: stk500v2_paged_load(..,flash,128,20480,128) block_size at addr 20480 is 128 STK500V2: stk500v2_loadaddr(10240) STK500V2: stk500v2_command(0x06 0x00 0x00 0x28 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x50 0x00 0x05 0x0e 0x06 0x00 0x00 0x28 0x00 0x6e , 11) avrdude: Send: . [1b] P [50] . [00] . [05] . [0e] . [06] . [00] . [00] ( [28] . [00] n [6e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: P [50] 0x50 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: A [41] 0x41 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x51 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xf4 , 10) avrdude: Send: . [1b] Q [51] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [f4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: Q [51] 0x51 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d3] 0xd3 = 137 STK500V2: stk500v2_paged_load(..,flash,128,20608,128) block_size at addr 20608 is 128 STK500V2: stk500v2_loadaddr(10304) STK500V2: stk500v2_command(0x06 0x00 0x00 0x28 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x52 0x00 0x05 0x0e 0x06 0x00 0x00 0x28 0x40 0x2c , 11) avrdude: Send: . [1b] R [52] . [00] . [05] . [0e] . [06] . [00] . [00] ( [28] @ [40] , [2c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: R [52] 0x52 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: C [43] 0x43 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x53 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xf6 , 10) avrdude: Send: . [1b] S [53] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [f6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: S [53] 0x53 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d1] 0xd1 = 137 STK500V2: stk500v2_paged_load(..,flash,128,20736,128) block_size at addr 20736 is 128 STK500V2: stk500v2_loadaddr(10368) STK500V2: stk500v2_command(0x06 0x00 0x00 0x28 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x54 0x00 0x05 0x0e 0x06 0x00 0x00 0x28 0x80 0xea , 11) avrdude: Send: . [1b] T [54] . [00] . [05] . [0e] . [06] . [00] . [00] ( [28] . [80] . [ea] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: T [54] 0x54 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: E [45] 0x45 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x55 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xf0 , 10) avrdude: Send: . [1b] U [55] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [f0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: U [55] 0x55 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d7] 0xd7 = 137 STK500V2: stk500v2_paged_load(..,flash,128,20864,128) block_size at addr 20864 is 128 STK500V2: stk500v2_loadaddr(10432) STK500V2: stk500v2_command(0x06 0x00 0x00 0x28 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x56 0x00 0x05 0x0e 0x06 0x00 0x00 0x28 0xc0 0xa8 , 11) avrdude: Send: . [1b] V [56] . [00] . [05] . [0e] . [06] . [00] . [00] ( [28] . [c0] . [a8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: V [56] 0x56 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: G [47] 0x47 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x57 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xf2 , 10) avrdude: Send: . [1b] W [57] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [f2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: W [57] 0x57 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d5] 0xd5 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,20992,128) block_size at addr 20992 is 128 STK500V2: stk500v2_loadaddr(10496) STK500V2: stk500v2_command(0x06 0x00 0x00 0x29 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x58 0x00 0x05 0x0e 0x06 0x00 0x00 0x29 0x00 0x67 , 11) avrdude: Send: . [1b] X [58] . [00] . [05] . [0e] . [06] . [00] . [00] ) [29] . [00] g [67] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: X [58] 0x58 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: I [49] 0x49 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x59 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xfc , 10) avrdude: Send: . [1b] Y [59] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [fc] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: Y [59] 0x59 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [db] 0xdb = 137 STK500V2: stk500v2_paged_load(..,flash,128,21120,128) block_size at addr 21120 is 128 STK500V2: stk500v2_loadaddr(10560) STK500V2: stk500v2_command(0x06 0x00 0x00 0x29 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x5a 0x00 0x05 0x0e 0x06 0x00 0x00 0x29 0x40 0x25 , 11) avrdude: Send: . [1b] Z [5a] . [00] . [05] . [0e] . [06] . [00] . [00] ) [29] @ [40] % [25] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: Z [5a] 0x5a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: K [4b] 0x4b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x5b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xfe , 10) avrdude: Send: . [1b] [ [5b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [fe] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: [ [5b] 0x5b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d9] 0xd9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,21248,128) block_size at addr 21248 is 128 STK500V2: stk500v2_loadaddr(10624) STK500V2: stk500v2_command(0x06 0x00 0x00 0x29 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x5c 0x00 0x05 0x0e 0x06 0x00 0x00 0x29 0x80 0xe3 , 11) avrdude: Send: . [1b] \ [5c] . [00] . [05] . [0e] . [06] . [00] . [00] ) [29] . [80] . [e3] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: \ [5c] 0x5c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: M [4d] 0x4d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x5d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xf8 , 10) avrdude: Send: . [1b] ] [5d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [f8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ] [5d] 0x5d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [df] 0xdf = 137 STK500V2: stk500v2_paged_load(..,flash,128,21376,128) block_size at addr 21376 is 128 STK500V2: stk500v2_loadaddr(10688) STK500V2: stk500v2_command(0x06 0x00 0x00 0x29 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x5e 0x00 0x05 0x0e 0x06 0x00 0x00 0x29 0xc0 0xa1 , 11) avrdude: Send: . [1b] ^ [5e] . [00] . [05] . [0e] . [06] . [00] . [00] ) [29] . [c0] . [a1] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ^ [5e] 0x5e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: O [4f] 0x4f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x5f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xfa , 10) avrdude: Send: . [1b] _ [5f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [fa] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: _ [5f] 0x5f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [dd] 0xdd = 137 STK500V2: stk500v2_paged_load(..,flash,128,21504,128) block_size at addr 21504 is 128 STK500V2: stk500v2_loadaddr(10752) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2a 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x60 0x00 0x05 0x0e 0x06 0x00 0x00 0x2a 0x00 0x5c , 11) avrdude: Send: . [1b] ` [60] . [00] . [05] . [0e] . [06] . [00] . [00] * [2a] . [00] \ [5c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ` [60] 0x60 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: q [71] 0x71 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x61 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xc4 , 10) avrdude: Send: . [1b] a [61] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [c4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: a [61] 0x61 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e3] 0xe3 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,21632,128) block_size at addr 21632 is 128 STK500V2: stk500v2_loadaddr(10816) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2a 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x62 0x00 0x05 0x0e 0x06 0x00 0x00 0x2a 0x40 0x1e , 11) avrdude: Send: . [1b] b [62] . [00] . [05] . [0e] . [06] . [00] . [00] * [2a] @ [40] . [1e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: b [62] 0x62 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: s [73] 0x73 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x63 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xc6 , 10) avrdude: Send: . [1b] c [63] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [c6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: c [63] 0x63 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e1] 0xe1 = 137 STK500V2: stk500v2_paged_load(..,flash,128,21760,128) block_size at addr 21760 is 128 STK500V2: stk500v2_loadaddr(10880) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2a 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x64 0x00 0x05 0x0e 0x06 0x00 0x00 0x2a 0x80 0xd8 , 11) avrdude: Send: . [1b] d [64] . [00] . [05] . [0e] . [06] . [00] . [00] * [2a] . [80] . [d8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: d [64] 0x64 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: u [75] 0x75 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x65 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xc0 , 10) avrdude: Send: . [1b] e [65] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [c0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: e [65] 0x65 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e7] 0xe7 = 137 STK500V2: stk500v2_paged_load(..,flash,128,21888,128) block_size at addr 21888 is 128 STK500V2: stk500v2_loadaddr(10944) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2a 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x66 0x00 0x05 0x0e 0x06 0x00 0x00 0x2a 0xc0 0x9a , 11) avrdude: Send: . [1b] f [66] . [00] . [05] . [0e] . [06] . [00] . [00] * [2a] . [c0] . [9a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: f [66] 0x66 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: w [77] 0x77 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x67 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xc2 , 10) avrdude: Send: . [1b] g [67] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [c2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: g [67] 0x67 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e5] 0xe5 = 137 STK500V2: stk500v2_paged_load(..,flash,128,22016,128) block_size at addr 22016 is 128 STK500V2: stk500v2_loadaddr(11008) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2b 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x68 0x00 0x05 0x0e 0x06 0x00 0x00 0x2b 0x00 0x55 , 11) avrdude: Send: . [1b] h [68] . [00] . [05] . [0e] . [06] . [00] . [00] + [2b] . [00] U [55] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: h [68] 0x68 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: y [79] 0x79 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x69 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xcc , 10) avrdude: Send: . [1b] i [69] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [cc] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: i [69] 0x69 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [eb] 0xeb = 137 STK500V2: stk500v2_paged_load(..,flash,128,22144,128) block_size at addr 22144 is 128 STK500V2: stk500v2_loadaddr(11072) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2b 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x6a 0x00 0x05 0x0e 0x06 0x00 0x00 0x2b 0x40 0x17 , 11) avrdude: Send: . [1b] j [6a] . [00] . [05] . [0e] . [06] . [00] . [00] + [2b] @ [40] . [17] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: j [6a] 0x6a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: { [7b] 0x7b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x6b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xce , 10) avrdude: Send: . [1b] k [6b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ce] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: k [6b] 0x6b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e9] 0xe9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,22272,128) block_size at addr 22272 is 128 STK500V2: stk500v2_loadaddr(11136) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2b 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x6c 0x00 0x05 0x0e 0x06 0x00 0x00 0x2b 0x80 0xd1 , 11) avrdude: Send: . [1b] l [6c] . [00] . [05] . [0e] . [06] . [00] . [00] + [2b] . [80] . [d1] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: l [6c] 0x6c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: } [7d] 0x7d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x6d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xc8 , 10) avrdude: Send: . [1b] m [6d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [c8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: m [6d] 0x6d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ef] 0xef = 137 #STK500V2: stk500v2_paged_load(..,flash,128,22400,128) block_size at addr 22400 is 128 STK500V2: stk500v2_loadaddr(11200) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2b 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x6e 0x00 0x05 0x0e 0x06 0x00 0x00 0x2b 0xc0 0x93 , 11) avrdude: Send: . [1b] n [6e] . [00] . [05] . [0e] . [06] . [00] . [00] + [2b] . [c0] . [93] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: n [6e] 0x6e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [7f] 0x7f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x6f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xca , 10) avrdude: Send: . [1b] o [6f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ca] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: o [6f] 0x6f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ed] 0xed = 137 STK500V2: stk500v2_paged_load(..,flash,128,22528,128) block_size at addr 22528 is 128 STK500V2: stk500v2_loadaddr(11264) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2c 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x70 0x00 0x05 0x0e 0x06 0x00 0x00 0x2c 0x00 0x4a , 11) avrdude: Send: . [1b] p [70] . [00] . [05] . [0e] . [06] . [00] . [00] , [2c] . [00] J [4a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: p [70] 0x70 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: a [61] 0x61 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x71 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xd4 , 10) avrdude: Send: . [1b] q [71] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [d4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: q [71] 0x71 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f3] 0xf3 = 137 STK500V2: stk500v2_paged_load(..,flash,128,22656,128) block_size at addr 22656 is 128 STK500V2: stk500v2_loadaddr(11328) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2c 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x72 0x00 0x05 0x0e 0x06 0x00 0x00 0x2c 0x40 0x08 , 11) avrdude: Send: . [1b] r [72] . [00] . [05] . [0e] . [06] . [00] . [00] , [2c] @ [40] . [08] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: r [72] 0x72 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: c [63] 0x63 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x73 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xd6 , 10) avrdude: Send: . [1b] s [73] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [d6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: s [73] 0x73 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f1] 0xf1 = 137 STK500V2: stk500v2_paged_load(..,flash,128,22784,128) block_size at addr 22784 is 128 STK500V2: stk500v2_loadaddr(11392) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2c 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x74 0x00 0x05 0x0e 0x06 0x00 0x00 0x2c 0x80 0xce , 11) avrdude: Send: . [1b] t [74] . [00] . [05] . [0e] . [06] . [00] . [00] , [2c] . [80] . [ce] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: t [74] 0x74 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: e [65] 0x65 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x75 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xd0 , 10) avrdude: Send: . [1b] u [75] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [d0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: u [75] 0x75 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f7] 0xf7 = 137 STK500V2: stk500v2_paged_load(..,flash,128,22912,128) block_size at addr 22912 is 128 STK500V2: stk500v2_loadaddr(11456) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2c 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x76 0x00 0x05 0x0e 0x06 0x00 0x00 0x2c 0xc0 0x8c , 11) avrdude: Send: . [1b] v [76] . [00] . [05] . [0e] . [06] . [00] . [00] , [2c] . [c0] . [8c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: v [76] 0x76 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: g [67] 0x67 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x77 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xd2 , 10) avrdude: Send: . [1b] w [77] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [d2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: w [77] 0x77 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f5] 0xf5 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,23040,128) block_size at addr 23040 is 128 STK500V2: stk500v2_loadaddr(11520) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2d 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x78 0x00 0x05 0x0e 0x06 0x00 0x00 0x2d 0x00 0x43 , 11) avrdude: Send: . [1b] x [78] . [00] . [05] . [0e] . [06] . [00] . [00] - [2d] . [00] C [43] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: x [78] 0x78 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: i [69] 0x69 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x79 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xdc , 10) avrdude: Send: . [1b] y [79] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [dc] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: y [79] 0x79 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [fb] 0xfb = 137 STK500V2: stk500v2_paged_load(..,flash,128,23168,128) block_size at addr 23168 is 128 STK500V2: stk500v2_loadaddr(11584) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2d 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x7a 0x00 0x05 0x0e 0x06 0x00 0x00 0x2d 0x40 0x01 , 11) avrdude: Send: . [1b] z [7a] . [00] . [05] . [0e] . [06] . [00] . [00] - [2d] @ [40] . [01] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: z [7a] 0x7a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: k [6b] 0x6b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x7b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xde , 10) avrdude: Send: . [1b] { [7b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [de] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: { [7b] 0x7b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f9] 0xf9 = 137 STK500V2: stk500v2_paged_load(..,flash,128,23296,128) block_size at addr 23296 is 128 STK500V2: stk500v2_loadaddr(11648) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2d 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x7c 0x00 0x05 0x0e 0x06 0x00 0x00 0x2d 0x80 0xc7 , 11) avrdude: Send: . [1b] | [7c] . [00] . [05] . [0e] . [06] . [00] . [00] - [2d] . [80] . [c7] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: | [7c] 0x7c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: m [6d] 0x6d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x7d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xd8 , 10) avrdude: Send: . [1b] } [7d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [d8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: } [7d] 0x7d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff = 137 STK500V2: stk500v2_paged_load(..,flash,128,23424,128) block_size at addr 23424 is 128 STK500V2: stk500v2_loadaddr(11712) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2d 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x7e 0x00 0x05 0x0e 0x06 0x00 0x00 0x2d 0xc0 0x85 , 11) avrdude: Send: . [1b] ~ [7e] . [00] . [05] . [0e] . [06] . [00] . [00] - [2d] . [c0] . [85] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: ~ [7e] 0x7e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: o [6f] 0x6f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x7f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xda , 10) avrdude: Send: . [1b] . [7f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [da] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [7f] 0x7f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [fd] 0xfd = 137 STK500V2: stk500v2_paged_load(..,flash,128,23552,128) block_size at addr 23552 is 128 STK500V2: stk500v2_loadaddr(11776) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2e 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x80 0x00 0x05 0x0e 0x06 0x00 0x00 0x2e 0x00 0xb8 , 11) avrdude: Send: . [1b] . [80] . [00] . [05] . [0e] . [06] . [00] . [00] . [2e] . [00] . [b8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [80] 0x80 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [91] 0x91 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x81 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x24 , 10) avrdude: Send: . [1b] . [81] . [00] . [04] . [0e] . [14] . [00] . [80] [20] $ [24] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [81] 0x81 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [03] 0x03 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,23680,128) block_size at addr 23680 is 128 STK500V2: stk500v2_loadaddr(11840) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2e 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x82 0x00 0x05 0x0e 0x06 0x00 0x00 0x2e 0x40 0xfa , 11) avrdude: Send: . [1b] . [82] . [00] . [05] . [0e] . [06] . [00] . [00] . [2e] @ [40] . [fa] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [82] 0x82 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [93] 0x93 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x83 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x26 , 10) avrdude: Send: . [1b] . [83] . [00] . [04] . [0e] . [14] . [00] . [80] [20] & [26] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [83] 0x83 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [01] 0x01 = 137 STK500V2: stk500v2_paged_load(..,flash,128,23808,128) block_size at addr 23808 is 128 STK500V2: stk500v2_loadaddr(11904) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2e 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x84 0x00 0x05 0x0e 0x06 0x00 0x00 0x2e 0x80 0x3c , 11) avrdude: Send: . [1b] . [84] . [00] . [05] . [0e] . [06] . [00] . [00] . [2e] . [80] < [3c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [84] 0x84 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [95] 0x95 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x85 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x20 , 10) avrdude: Send: . [1b] . [85] . [00] . [04] . [0e] . [14] . [00] . [80] [20] [20] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [85] 0x85 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [07] 0x07 = 137 STK500V2: stk500v2_paged_load(..,flash,128,23936,128) block_size at addr 23936 is 128 STK500V2: stk500v2_loadaddr(11968) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2e 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x86 0x00 0x05 0x0e 0x06 0x00 0x00 0x2e 0xc0 0x7e , 11) avrdude: Send: . [1b] . [86] . [00] . [05] . [0e] . [06] . [00] . [00] . [2e] . [c0] ~ [7e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [86] 0x86 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [97] 0x97 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x87 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x22 , 10) avrdude: Send: . [1b] . [87] . [00] . [04] . [0e] . [14] . [00] . [80] [20] " [22] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [87] 0x87 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [05] 0x05 = 137 STK500V2: stk500v2_paged_load(..,flash,128,24064,128) block_size at addr 24064 is 128 STK500V2: stk500v2_loadaddr(12032) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2f 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x88 0x00 0x05 0x0e 0x06 0x00 0x00 0x2f 0x00 0xb1 , 11) avrdude: Send: . [1b] . [88] . [00] . [05] . [0e] . [06] . [00] . [00] / [2f] . [00] . [b1] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [88] 0x88 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [99] 0x99 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x89 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x2c , 10) avrdude: Send: . [1b] . [89] . [00] . [04] . [0e] . [14] . [00] . [80] [20] , [2c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [89] 0x89 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0b] 0x0b = 137 STK500V2: stk500v2_paged_load(..,flash,128,24192,128) block_size at addr 24192 is 128 STK500V2: stk500v2_loadaddr(12096) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2f 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x8a 0x00 0x05 0x0e 0x06 0x00 0x00 0x2f 0x40 0xf3 , 11) avrdude: Send: . [1b] . [8a] . [00] . [05] . [0e] . [06] . [00] . [00] / [2f] @ [40] . [f3] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8a] 0x8a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9b] 0x9b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x8b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x2e , 10) avrdude: Send: . [1b] . [8b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [2e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8b] 0x8b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [09] 0x09 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,24320,128) block_size at addr 24320 is 128 STK500V2: stk500v2_loadaddr(12160) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2f 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x8c 0x00 0x05 0x0e 0x06 0x00 0x00 0x2f 0x80 0x35 , 11) avrdude: Send: . [1b] . [8c] . [00] . [05] . [0e] . [06] . [00] . [00] / [2f] . [80] 5 [35] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8c] 0x8c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9d] 0x9d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x8d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x28 , 10) avrdude: Send: . [1b] . [8d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] ( [28] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8d] 0x8d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0f] 0x0f = 137 STK500V2: stk500v2_paged_load(..,flash,128,24448,128) block_size at addr 24448 is 128 STK500V2: stk500v2_loadaddr(12224) STK500V2: stk500v2_command(0x06 0x00 0x00 0x2f 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x8e 0x00 0x05 0x0e 0x06 0x00 0x00 0x2f 0xc0 0x77 , 11) avrdude: Send: . [1b] . [8e] . [00] . [05] . [0e] . [06] . [00] . [00] / [2f] . [c0] w [77] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8e] 0x8e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [9f] 0x9f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x8f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x2a , 10) avrdude: Send: . [1b] . [8f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] * [2a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [8f] 0x8f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [0d] 0x0d = 137 STK500V2: stk500v2_paged_load(..,flash,128,24576,128) block_size at addr 24576 is 128 STK500V2: stk500v2_loadaddr(12288) STK500V2: stk500v2_command(0x06 0x00 0x00 0x30 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x90 0x00 0x05 0x0e 0x06 0x00 0x00 0x30 0x00 0xb6 , 11) avrdude: Send: . [1b] . [90] . [00] . [05] . [0e] . [06] . [00] . [00] 0 [30] . [00] . [b6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [90] 0x90 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [81] 0x81 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x91 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x34 , 10) avrdude: Send: . [1b] . [91] . [00] . [04] . [0e] . [14] . [00] . [80] [20] 4 [34] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [91] 0x91 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [13] 0x13 = 137 STK500V2: stk500v2_paged_load(..,flash,128,24704,128) block_size at addr 24704 is 128 STK500V2: stk500v2_loadaddr(12352) STK500V2: stk500v2_command(0x06 0x00 0x00 0x30 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x92 0x00 0x05 0x0e 0x06 0x00 0x00 0x30 0x40 0xf4 , 11) avrdude: Send: . [1b] . [92] . [00] . [05] . [0e] . [06] . [00] . [00] 0 [30] @ [40] . [f4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [92] 0x92 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [83] 0x83 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x93 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x36 , 10) avrdude: Send: . [1b] . [93] . [00] . [04] . [0e] . [14] . [00] . [80] [20] 6 [36] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [93] 0x93 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [11] 0x11 = 137 STK500V2: stk500v2_paged_load(..,flash,128,24832,128) block_size at addr 24832 is 128 STK500V2: stk500v2_loadaddr(12416) STK500V2: stk500v2_command(0x06 0x00 0x00 0x30 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x94 0x00 0x05 0x0e 0x06 0x00 0x00 0x30 0x80 0x32 , 11) avrdude: Send: . [1b] . [94] . [00] . [05] . [0e] . [06] . [00] . [00] 0 [30] . [80] 2 [32] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [94] 0x94 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [85] 0x85 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x95 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x30 , 10) avrdude: Send: . [1b] . [95] . [00] . [04] . [0e] . [14] . [00] . [80] [20] 0 [30] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [95] 0x95 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [17] 0x17 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,24960,128) block_size at addr 24960 is 128 STK500V2: stk500v2_loadaddr(12480) STK500V2: stk500v2_command(0x06 0x00 0x00 0x30 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x96 0x00 0x05 0x0e 0x06 0x00 0x00 0x30 0xc0 0x70 , 11) avrdude: Send: . [1b] . [96] . [00] . [05] . [0e] . [06] . [00] . [00] 0 [30] . [c0] p [70] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [96] 0x96 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [87] 0x87 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x97 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x32 , 10) avrdude: Send: . [1b] . [97] . [00] . [04] . [0e] . [14] . [00] . [80] [20] 2 [32] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [97] 0x97 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [15] 0x15 = 137 STK500V2: stk500v2_paged_load(..,flash,128,25088,128) block_size at addr 25088 is 128 STK500V2: stk500v2_loadaddr(12544) STK500V2: stk500v2_command(0x06 0x00 0x00 0x31 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x98 0x00 0x05 0x0e 0x06 0x00 0x00 0x31 0x00 0xbf , 11) avrdude: Send: . [1b] . [98] . [00] . [05] . [0e] . [06] . [00] . [00] 1 [31] . [00] . [bf] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [98] 0x98 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [89] 0x89 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x99 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x3c , 10) avrdude: Send: . [1b] . [99] . [00] . [04] . [0e] . [14] . [00] . [80] [20] < [3c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [99] 0x99 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1b] 0x1b = 137 STK500V2: stk500v2_paged_load(..,flash,128,25216,128) block_size at addr 25216 is 128 STK500V2: stk500v2_loadaddr(12608) STK500V2: stk500v2_command(0x06 0x00 0x00 0x31 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x9a 0x00 0x05 0x0e 0x06 0x00 0x00 0x31 0x40 0xfd , 11) avrdude: Send: . [1b] . [9a] . [00] . [05] . [0e] . [06] . [00] . [00] 1 [31] @ [40] . [fd] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9a] 0x9a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8b] 0x8b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x9b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x3e , 10) avrdude: Send: . [1b] . [9b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] > [3e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9b] 0x9b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [19] 0x19 = 137 STK500V2: stk500v2_paged_load(..,flash,128,25344,128) block_size at addr 25344 is 128 STK500V2: stk500v2_loadaddr(12672) STK500V2: stk500v2_command(0x06 0x00 0x00 0x31 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x9c 0x00 0x05 0x0e 0x06 0x00 0x00 0x31 0x80 0x3b , 11) avrdude: Send: . [1b] . [9c] . [00] . [05] . [0e] . [06] . [00] . [00] 1 [31] . [80] ; [3b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9c] 0x9c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8d] 0x8d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x9d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x38 , 10) avrdude: Send: . [1b] . [9d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] 8 [38] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9d] 0x9d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1f] 0x1f = 137 STK500V2: stk500v2_paged_load(..,flash,128,25472,128) block_size at addr 25472 is 128 STK500V2: stk500v2_loadaddr(12736) STK500V2: stk500v2_command(0x06 0x00 0x00 0x31 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x9e 0x00 0x05 0x0e 0x06 0x00 0x00 0x31 0xc0 0x79 , 11) avrdude: Send: . [1b] . [9e] . [00] . [05] . [0e] . [06] . [00] . [00] 1 [31] . [c0] y [79] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9e] 0x9e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8f] 0x8f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x9f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x3a , 10) avrdude: Send: . [1b] . [9f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] : [3a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [9f] 0x9f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1d] 0x1d = 137 #STK500V2: stk500v2_paged_load(..,flash,128,25600,128) block_size at addr 25600 is 128 STK500V2: stk500v2_loadaddr(12800) STK500V2: stk500v2_command(0x06 0x00 0x00 0x32 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xa0 0x00 0x05 0x0e 0x06 0x00 0x00 0x32 0x00 0x84 , 11) avrdude: Send: . [1b] . [a0] . [00] . [05] . [0e] . [06] . [00] . [00] 2 [32] . [00] . [84] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a0] 0xa0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b1] 0xb1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xa1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x04 , 10) avrdude: Send: . [1b] . [a1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [04] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a1] 0xa1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: # [23] 0x23 = 137 STK500V2: stk500v2_paged_load(..,flash,128,25728,128) block_size at addr 25728 is 128 STK500V2: stk500v2_loadaddr(12864) STK500V2: stk500v2_command(0x06 0x00 0x00 0x32 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xa2 0x00 0x05 0x0e 0x06 0x00 0x00 0x32 0x40 0xc6 , 11) avrdude: Send: . [1b] . [a2] . [00] . [05] . [0e] . [06] . [00] . [00] 2 [32] @ [40] . [c6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a2] 0xa2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b3] 0xb3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xa3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x06 , 10) avrdude: Send: . [1b] . [a3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [06] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a3] 0xa3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ! [21] 0x21 = 137 STK500V2: stk500v2_paged_load(..,flash,128,25856,128) block_size at addr 25856 is 128 STK500V2: stk500v2_loadaddr(12928) STK500V2: stk500v2_command(0x06 0x00 0x00 0x32 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xa4 0x00 0x05 0x0e 0x06 0x00 0x00 0x32 0x80 0x00 , 11) avrdude: Send: . [1b] . [a4] . [00] . [05] . [0e] . [06] . [00] . [00] 2 [32] . [80] . [00] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a4] 0xa4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b5] 0xb5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xa5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x00 , 10) avrdude: Send: . [1b] . [a5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [00] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a5] 0xa5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ' [27] 0x27 = 137 STK500V2: stk500v2_paged_load(..,flash,128,25984,128) block_size at addr 25984 is 128 STK500V2: stk500v2_loadaddr(12992) STK500V2: stk500v2_command(0x06 0x00 0x00 0x32 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xa6 0x00 0x05 0x0e 0x06 0x00 0x00 0x32 0xc0 0x42 , 11) avrdude: Send: . [1b] . [a6] . [00] . [05] . [0e] . [06] . [00] . [00] 2 [32] . [c0] B [42] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a6] 0xa6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b7] 0xb7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xa7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x02 , 10) avrdude: Send: . [1b] . [a7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [02] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a7] 0xa7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: % [25] 0x25 = 137 STK500V2: stk500v2_paged_load(..,flash,128,26112,128) block_size at addr 26112 is 128 STK500V2: stk500v2_loadaddr(13056) STK500V2: stk500v2_command(0x06 0x00 0x00 0x33 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xa8 0x00 0x05 0x0e 0x06 0x00 0x00 0x33 0x00 0x8d , 11) avrdude: Send: . [1b] . [a8] . [00] . [05] . [0e] . [06] . [00] . [00] 3 [33] . [00] . [8d] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a8] 0xa8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [b9] 0xb9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xa9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x0c , 10) avrdude: Send: . [1b] . [a9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [0c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [a9] 0xa9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: + [2b] 0x2b = 137 #STK500V2: stk500v2_paged_load(..,flash,128,26240,128) block_size at addr 26240 is 128 STK500V2: stk500v2_loadaddr(13120) STK500V2: stk500v2_command(0x06 0x00 0x00 0x33 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xaa 0x00 0x05 0x0e 0x06 0x00 0x00 0x33 0x40 0xcf , 11) avrdude: Send: . [1b] . [aa] . [00] . [05] . [0e] . [06] . [00] . [00] 3 [33] @ [40] . [cf] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [aa] 0xaa hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bb] 0xbb = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xab 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x0e , 10) avrdude: Send: . [1b] . [ab] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [0e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ab] 0xab hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ) [29] 0x29 = 137 STK500V2: stk500v2_paged_load(..,flash,128,26368,128) block_size at addr 26368 is 128 STK500V2: stk500v2_loadaddr(13184) STK500V2: stk500v2_command(0x06 0x00 0x00 0x33 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xac 0x00 0x05 0x0e 0x06 0x00 0x00 0x33 0x80 0x09 , 11) avrdude: Send: . [1b] . [ac] . [00] . [05] . [0e] . [06] . [00] . [00] 3 [33] . [80] . [09] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ac] 0xac hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bd] 0xbd = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xad 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x08 , 10) avrdude: Send: . [1b] . [ad] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [08] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ad] 0xad hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: / [2f] 0x2f = 137 STK500V2: stk500v2_paged_load(..,flash,128,26496,128) block_size at addr 26496 is 128 STK500V2: stk500v2_loadaddr(13248) STK500V2: stk500v2_command(0x06 0x00 0x00 0x33 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xae 0x00 0x05 0x0e 0x06 0x00 0x00 0x33 0xc0 0x4b , 11) avrdude: Send: . [1b] . [ae] . [00] . [05] . [0e] . [06] . [00] . [00] 3 [33] . [c0] K [4b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ae] 0xae hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [bf] 0xbf = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xaf 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x0a , 10) avrdude: Send: . [1b] . [af] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [0a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [af] 0xaf hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: - [2d] 0x2d = 137 STK500V2: stk500v2_paged_load(..,flash,128,26624,128) block_size at addr 26624 is 128 STK500V2: stk500v2_loadaddr(13312) STK500V2: stk500v2_command(0x06 0x00 0x00 0x34 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xb0 0x00 0x05 0x0e 0x06 0x00 0x00 0x34 0x00 0x92 , 11) avrdude: Send: . [1b] . [b0] . [00] . [05] . [0e] . [06] . [00] . [00] 4 [34] . [00] . [92] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b0] 0xb0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a1] 0xa1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xb1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x14 , 10) avrdude: Send: . [1b] . [b1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [14] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b1] 0xb1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: 3 [33] 0x33 = 137 STK500V2: stk500v2_paged_load(..,flash,128,26752,128) block_size at addr 26752 is 128 STK500V2: stk500v2_loadaddr(13376) STK500V2: stk500v2_command(0x06 0x00 0x00 0x34 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xb2 0x00 0x05 0x0e 0x06 0x00 0x00 0x34 0x40 0xd0 , 11) avrdude: Send: . [1b] . [b2] . [00] . [05] . [0e] . [06] . [00] . [00] 4 [34] @ [40] . [d0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b2] 0xb2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a3] 0xa3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xb3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x16 , 10) avrdude: Send: . [1b] . [b3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [16] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b3] 0xb3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: 1 [31] 0x31 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,26880,128) block_size at addr 26880 is 128 STK500V2: stk500v2_loadaddr(13440) STK500V2: stk500v2_command(0x06 0x00 0x00 0x34 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xb4 0x00 0x05 0x0e 0x06 0x00 0x00 0x34 0x80 0x16 , 11) avrdude: Send: . [1b] . [b4] . [00] . [05] . [0e] . [06] . [00] . [00] 4 [34] . [80] . [16] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b4] 0xb4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a5] 0xa5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xb5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x10 , 10) avrdude: Send: . [1b] . [b5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [10] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b5] 0xb5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: 7 [37] 0x37 = 137 STK500V2: stk500v2_paged_load(..,flash,128,27008,128) block_size at addr 27008 is 128 STK500V2: stk500v2_loadaddr(13504) STK500V2: stk500v2_command(0x06 0x00 0x00 0x34 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xb6 0x00 0x05 0x0e 0x06 0x00 0x00 0x34 0xc0 0x54 , 11) avrdude: Send: . [1b] . [b6] . [00] . [05] . [0e] . [06] . [00] . [00] 4 [34] . [c0] T [54] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b6] 0xb6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a7] 0xa7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xb7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x12 , 10) avrdude: Send: . [1b] . [b7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [12] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b7] 0xb7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: 5 [35] 0x35 = 137 STK500V2: stk500v2_paged_load(..,flash,128,27136,128) block_size at addr 27136 is 128 STK500V2: stk500v2_loadaddr(13568) STK500V2: stk500v2_command(0x06 0x00 0x00 0x35 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xb8 0x00 0x05 0x0e 0x06 0x00 0x00 0x35 0x00 0x9b , 11) avrdude: Send: . [1b] . [b8] . [00] . [05] . [0e] . [06] . [00] . [00] 5 [35] . [00] . [9b] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b8] 0xb8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [a9] 0xa9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xb9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x1c , 10) avrdude: Send: . [1b] . [b9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [1c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [b9] 0xb9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ; [3b] 0x3b = 137 STK500V2: stk500v2_paged_load(..,flash,128,27264,128) block_size at addr 27264 is 128 STK500V2: stk500v2_loadaddr(13632) STK500V2: stk500v2_command(0x06 0x00 0x00 0x35 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xba 0x00 0x05 0x0e 0x06 0x00 0x00 0x35 0x40 0xd9 , 11) avrdude: Send: . [1b] . [ba] . [00] . [05] . [0e] . [06] . [00] . [00] 5 [35] @ [40] . [d9] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ba] 0xba hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ab] 0xab = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xbb 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x1e , 10) avrdude: Send: . [1b] . [bb] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [1e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [bb] 0xbb hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: 9 [39] 0x39 = 137 STK500V2: stk500v2_paged_load(..,flash,128,27392,128) block_size at addr 27392 is 128 STK500V2: stk500v2_loadaddr(13696) STK500V2: stk500v2_command(0x06 0x00 0x00 0x35 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xbc 0x00 0x05 0x0e 0x06 0x00 0x00 0x35 0x80 0x1f , 11) avrdude: Send: . [1b] . [bc] . [00] . [05] . [0e] . [06] . [00] . [00] 5 [35] . [80] . [1f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [bc] 0xbc hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ad] 0xad = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xbd 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x18 , 10) avrdude: Send: . [1b] . [bd] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [18] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [bd] 0xbd hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ? [3f] 0x3f = 137 STK500V2: stk500v2_paged_load(..,flash,128,27520,128) block_size at addr 27520 is 128 STK500V2: stk500v2_loadaddr(13760) STK500V2: stk500v2_command(0x06 0x00 0x00 0x35 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xbe 0x00 0x05 0x0e 0x06 0x00 0x00 0x35 0xc0 0x5d , 11) avrdude: Send: . [1b] . [be] . [00] . [05] . [0e] . [06] . [00] . [00] 5 [35] . [c0] ] [5d] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [be] 0xbe hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [af] 0xaf = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xbf 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x1a , 10) avrdude: Send: . [1b] . [bf] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [1a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [bf] 0xbf hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: = [3d] 0x3d = 137 #STK500V2: stk500v2_paged_load(..,flash,128,27648,128) block_size at addr 27648 is 128 STK500V2: stk500v2_loadaddr(13824) STK500V2: stk500v2_command(0x06 0x00 0x00 0x36 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xc0 0x00 0x05 0x0e 0x06 0x00 0x00 0x36 0x00 0xe0 , 11) avrdude: Send: . [1b] . [c0] . [00] . [05] . [0e] . [06] . [00] . [00] 6 [36] . [00] . [e0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c0] 0xc0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d1] 0xd1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xc1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x64 , 10) avrdude: Send: . [1b] . [c1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] d [64] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c1] 0xc1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: C [43] 0x43 = 137 STK500V2: stk500v2_paged_load(..,flash,128,27776,128) block_size at addr 27776 is 128 STK500V2: stk500v2_loadaddr(13888) STK500V2: stk500v2_command(0x06 0x00 0x00 0x36 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xc2 0x00 0x05 0x0e 0x06 0x00 0x00 0x36 0x40 0xa2 , 11) avrdude: Send: . [1b] . [c2] . [00] . [05] . [0e] . [06] . [00] . [00] 6 [36] @ [40] . [a2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c2] 0xc2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d3] 0xd3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xc3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x66 , 10) avrdude: Send: . [1b] . [c3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] f [66] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c3] 0xc3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: A [41] 0x41 = 137 STK500V2: stk500v2_paged_load(..,flash,128,27904,128) block_size at addr 27904 is 128 STK500V2: stk500v2_loadaddr(13952) STK500V2: stk500v2_command(0x06 0x00 0x00 0x36 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xc4 0x00 0x05 0x0e 0x06 0x00 0x00 0x36 0x80 0x64 , 11) avrdude: Send: . [1b] . [c4] . [00] . [05] . [0e] . [06] . [00] . [00] 6 [36] . [80] d [64] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c4] 0xc4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d5] 0xd5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xc5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x60 , 10) avrdude: Send: . [1b] . [c5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] ` [60] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c5] 0xc5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: G [47] 0x47 = 137 STK500V2: stk500v2_paged_load(..,flash,128,28032,128) block_size at addr 28032 is 128 STK500V2: stk500v2_loadaddr(14016) STK500V2: stk500v2_command(0x06 0x00 0x00 0x36 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xc6 0x00 0x05 0x0e 0x06 0x00 0x00 0x36 0xc0 0x26 , 11) avrdude: Send: . [1b] . [c6] . [00] . [05] . [0e] . [06] . [00] . [00] 6 [36] . [c0] & [26] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c6] 0xc6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d7] 0xd7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xc7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x62 , 10) avrdude: Send: . [1b] . [c7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] b [62] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c7] 0xc7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: E [45] 0x45 = 137 STK500V2: stk500v2_paged_load(..,flash,128,28160,128) block_size at addr 28160 is 128 STK500V2: stk500v2_loadaddr(14080) STK500V2: stk500v2_command(0x06 0x00 0x00 0x37 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xc8 0x00 0x05 0x0e 0x06 0x00 0x00 0x37 0x00 0xe9 , 11) avrdude: Send: . [1b] . [c8] . [00] . [05] . [0e] . [06] . [00] . [00] 7 [37] . [00] . [e9] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c8] 0xc8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [d9] 0xd9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xc9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x6c , 10) avrdude: Send: . [1b] . [c9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] l [6c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [c9] 0xc9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: K [4b] 0x4b = 137 #STK500V2: stk500v2_paged_load(..,flash,128,28288,128) block_size at addr 28288 is 128 STK500V2: stk500v2_loadaddr(14144) STK500V2: stk500v2_command(0x06 0x00 0x00 0x37 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xca 0x00 0x05 0x0e 0x06 0x00 0x00 0x37 0x40 0xab , 11) avrdude: Send: . [1b] . [ca] . [00] . [05] . [0e] . [06] . [00] . [00] 7 [37] @ [40] . [ab] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ca] 0xca hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [db] 0xdb = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xcb 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x6e , 10) avrdude: Send: . [1b] . [cb] . [00] . [04] . [0e] . [14] . [00] . [80] [20] n [6e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [cb] 0xcb hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: I [49] 0x49 = 137 STK500V2: stk500v2_paged_load(..,flash,128,28416,128) block_size at addr 28416 is 128 STK500V2: stk500v2_loadaddr(14208) STK500V2: stk500v2_command(0x06 0x00 0x00 0x37 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xcc 0x00 0x05 0x0e 0x06 0x00 0x00 0x37 0x80 0x6d , 11) avrdude: Send: . [1b] . [cc] . [00] . [05] . [0e] . [06] . [00] . [00] 7 [37] . [80] m [6d] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [cc] 0xcc hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [dd] 0xdd = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xcd 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x68 , 10) avrdude: Send: . [1b] . [cd] . [00] . [04] . [0e] . [14] . [00] . [80] [20] h [68] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [cd] 0xcd hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: O [4f] 0x4f = 137 STK500V2: stk500v2_paged_load(..,flash,128,28544,128) block_size at addr 28544 is 128 STK500V2: stk500v2_loadaddr(14272) STK500V2: stk500v2_command(0x06 0x00 0x00 0x37 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xce 0x00 0x05 0x0e 0x06 0x00 0x00 0x37 0xc0 0x2f , 11) avrdude: Send: . [1b] . [ce] . [00] . [05] . [0e] . [06] . [00] . [00] 7 [37] . [c0] / [2f] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ce] 0xce hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [df] 0xdf = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xcf 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x6a , 10) avrdude: Send: . [1b] . [cf] . [00] . [04] . [0e] . [14] . [00] . [80] [20] j [6a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [cf] 0xcf hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: M [4d] 0x4d = 137 STK500V2: stk500v2_paged_load(..,flash,128,28672,128) block_size at addr 28672 is 128 STK500V2: stk500v2_loadaddr(14336) STK500V2: stk500v2_command(0x06 0x00 0x00 0x38 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xd0 0x00 0x05 0x0e 0x06 0x00 0x00 0x38 0x00 0xfe , 11) avrdude: Send: . [1b] . [d0] . [00] . [05] . [0e] . [06] . [00] . [00] 8 [38] . [00] . [fe] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d0] 0xd0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c1] 0xc1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xd1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x74 , 10) avrdude: Send: . [1b] . [d1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] t [74] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d1] 0xd1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: S [53] 0x53 = 137 STK500V2: stk500v2_paged_load(..,flash,128,28800,128) block_size at addr 28800 is 128 STK500V2: stk500v2_loadaddr(14400) STK500V2: stk500v2_command(0x06 0x00 0x00 0x38 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xd2 0x00 0x05 0x0e 0x06 0x00 0x00 0x38 0x40 0xbc , 11) avrdude: Send: . [1b] . [d2] . [00] . [05] . [0e] . [06] . [00] . [00] 8 [38] @ [40] . [bc] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d2] 0xd2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c3] 0xc3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xd3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x76 , 10) avrdude: Send: . [1b] . [d3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] v [76] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d3] 0xd3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: Q [51] 0x51 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,28928,128) block_size at addr 28928 is 128 STK500V2: stk500v2_loadaddr(14464) STK500V2: stk500v2_command(0x06 0x00 0x00 0x38 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xd4 0x00 0x05 0x0e 0x06 0x00 0x00 0x38 0x80 0x7a , 11) avrdude: Send: . [1b] . [d4] . [00] . [05] . [0e] . [06] . [00] . [00] 8 [38] . [80] z [7a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d4] 0xd4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c5] 0xc5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xd5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x70 , 10) avrdude: Send: . [1b] . [d5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] p [70] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d5] 0xd5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: W [57] 0x57 = 137 STK500V2: stk500v2_paged_load(..,flash,128,29056,128) block_size at addr 29056 is 128 STK500V2: stk500v2_loadaddr(14528) STK500V2: stk500v2_command(0x06 0x00 0x00 0x38 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xd6 0x00 0x05 0x0e 0x06 0x00 0x00 0x38 0xc0 0x38 , 11) avrdude: Send: . [1b] . [d6] . [00] . [05] . [0e] . [06] . [00] . [00] 8 [38] . [c0] 8 [38] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d6] 0xd6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c7] 0xc7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xd7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x72 , 10) avrdude: Send: . [1b] . [d7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] r [72] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d7] 0xd7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: U [55] 0x55 = 137 STK500V2: stk500v2_paged_load(..,flash,128,29184,128) block_size at addr 29184 is 128 STK500V2: stk500v2_loadaddr(14592) STK500V2: stk500v2_command(0x06 0x00 0x00 0x39 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xd8 0x00 0x05 0x0e 0x06 0x00 0x00 0x39 0x00 0xf7 , 11) avrdude: Send: . [1b] . [d8] . [00] . [05] . [0e] . [06] . [00] . [00] 9 [39] . [00] . [f7] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d8] 0xd8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [c9] 0xc9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xd9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x7c , 10) avrdude: Send: . [1b] . [d9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] | [7c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [d9] 0xd9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: [ [5b] 0x5b = 137 STK500V2: stk500v2_paged_load(..,flash,128,29312,128) block_size at addr 29312 is 128 STK500V2: stk500v2_loadaddr(14656) STK500V2: stk500v2_command(0x06 0x00 0x00 0x39 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xda 0x00 0x05 0x0e 0x06 0x00 0x00 0x39 0x40 0xb5 , 11) avrdude: Send: . [1b] . [da] . [00] . [05] . [0e] . [06] . [00] . [00] 9 [39] @ [40] . [b5] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [da] 0xda hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cb] 0xcb = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xdb 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x7e , 10) avrdude: Send: . [1b] . [db] . [00] . [04] . [0e] . [14] . [00] . [80] [20] ~ [7e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [db] 0xdb hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: Y [59] 0x59 = 137 STK500V2: stk500v2_paged_load(..,flash,128,29440,128) block_size at addr 29440 is 128 STK500V2: stk500v2_loadaddr(14720) STK500V2: stk500v2_command(0x06 0x00 0x00 0x39 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xdc 0x00 0x05 0x0e 0x06 0x00 0x00 0x39 0x80 0x73 , 11) avrdude: Send: . [1b] . [dc] . [00] . [05] . [0e] . [06] . [00] . [00] 9 [39] . [80] s [73] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [dc] 0xdc hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cd] 0xcd = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xdd 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x78 , 10) avrdude: Send: . [1b] . [dd] . [00] . [04] . [0e] . [14] . [00] . [80] [20] x [78] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [dd] 0xdd hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: _ [5f] 0x5f = 137 #STK500V2: stk500v2_paged_load(..,flash,128,29568,128) block_size at addr 29568 is 128 STK500V2: stk500v2_loadaddr(14784) STK500V2: stk500v2_command(0x06 0x00 0x00 0x39 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xde 0x00 0x05 0x0e 0x06 0x00 0x00 0x39 0xc0 0x31 , 11) avrdude: Send: . [1b] . [de] . [00] . [05] . [0e] . [06] . [00] . [00] 9 [39] . [c0] 1 [31] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [de] 0xde hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [cf] 0xcf = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xdf 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x7a , 10) avrdude: Send: . [1b] . [df] . [00] . [04] . [0e] . [14] . [00] . [80] [20] z [7a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [df] 0xdf hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: ] [5d] 0x5d = 137 STK500V2: stk500v2_paged_load(..,flash,128,29696,128) block_size at addr 29696 is 128 STK500V2: stk500v2_loadaddr(14848) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3a 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xe0 0x00 0x05 0x0e 0x06 0x00 0x00 0x3a 0x00 0xcc , 11) avrdude: Send: . [1b] . [e0] . [00] . [05] . [0e] . [06] . [00] . [00] : [3a] . [00] . [cc] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e0] 0xe0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f1] 0xf1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xe1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x44 , 10) avrdude: Send: . [1b] . [e1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] D [44] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e1] 0xe1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: c [63] 0x63 = 137 STK500V2: stk500v2_paged_load(..,flash,128,29824,128) block_size at addr 29824 is 128 STK500V2: stk500v2_loadaddr(14912) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3a 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xe2 0x00 0x05 0x0e 0x06 0x00 0x00 0x3a 0x40 0x8e , 11) avrdude: Send: . [1b] . [e2] . [00] . [05] . [0e] . [06] . [00] . [00] : [3a] @ [40] . [8e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e2] 0xe2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f3] 0xf3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xe3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x46 , 10) avrdude: Send: . [1b] . [e3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] F [46] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e3] 0xe3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: a [61] 0x61 = 137 STK500V2: stk500v2_paged_load(..,flash,128,29952,128) block_size at addr 29952 is 128 STK500V2: stk500v2_loadaddr(14976) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3a 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xe4 0x00 0x05 0x0e 0x06 0x00 0x00 0x3a 0x80 0x48 , 11) avrdude: Send: . [1b] . [e4] . [00] . [05] . [0e] . [06] . [00] . [00] : [3a] . [80] H [48] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e4] 0xe4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f5] 0xf5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xe5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x40 , 10) avrdude: Send: . [1b] . [e5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] @ [40] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e5] 0xe5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: g [67] 0x67 = 137 STK500V2: stk500v2_paged_load(..,flash,128,30080,128) block_size at addr 30080 is 128 STK500V2: stk500v2_loadaddr(15040) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3a 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xe6 0x00 0x05 0x0e 0x06 0x00 0x00 0x3a 0xc0 0x0a , 11) avrdude: Send: . [1b] . [e6] . [00] . [05] . [0e] . [06] . [00] . [00] : [3a] . [c0] . [0a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e6] 0xe6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f7] 0xf7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xe7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x42 , 10) avrdude: Send: . [1b] . [e7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] B [42] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e7] 0xe7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: e [65] 0x65 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,30208,128) block_size at addr 30208 is 128 STK500V2: stk500v2_loadaddr(15104) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3b 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xe8 0x00 0x05 0x0e 0x06 0x00 0x00 0x3b 0x00 0xc5 , 11) avrdude: Send: . [1b] . [e8] . [00] . [05] . [0e] . [06] . [00] . [00] ; [3b] . [00] . [c5] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e8] 0xe8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [f9] 0xf9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xe9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x4c , 10) avrdude: Send: . [1b] . [e9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] L [4c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [e9] 0xe9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: k [6b] 0x6b = 137 STK500V2: stk500v2_paged_load(..,flash,128,30336,128) block_size at addr 30336 is 128 STK500V2: stk500v2_loadaddr(15168) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3b 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xea 0x00 0x05 0x0e 0x06 0x00 0x00 0x3b 0x40 0x87 , 11) avrdude: Send: . [1b] . [ea] . [00] . [05] . [0e] . [06] . [00] . [00] ; [3b] @ [40] . [87] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ea] 0xea hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [fb] 0xfb = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xeb 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x4e , 10) avrdude: Send: . [1b] . [eb] . [00] . [04] . [0e] . [14] . [00] . [80] [20] N [4e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [eb] 0xeb hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: i [69] 0x69 = 137 STK500V2: stk500v2_paged_load(..,flash,128,30464,128) block_size at addr 30464 is 128 STK500V2: stk500v2_loadaddr(15232) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3b 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xec 0x00 0x05 0x0e 0x06 0x00 0x00 0x3b 0x80 0x41 , 11) avrdude: Send: . [1b] . [ec] . [00] . [05] . [0e] . [06] . [00] . [00] ; [3b] . [80] A [41] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ec] 0xec hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [fd] 0xfd = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xed 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x48 , 10) avrdude: Send: . [1b] . [ed] . [00] . [04] . [0e] . [14] . [00] . [80] [20] H [48] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ed] 0xed hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: o [6f] 0x6f = 137 STK500V2: stk500v2_paged_load(..,flash,128,30592,128) block_size at addr 30592 is 128 STK500V2: stk500v2_loadaddr(15296) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3b 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xee 0x00 0x05 0x0e 0x06 0x00 0x00 0x3b 0xc0 0x03 , 11) avrdude: Send: . [1b] . [ee] . [00] . [05] . [0e] . [06] . [00] . [00] ; [3b] . [c0] . [03] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ee] 0xee hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xef 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x4a , 10) avrdude: Send: . [1b] . [ef] . [00] . [04] . [0e] . [14] . [00] . [80] [20] J [4a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ef] 0xef hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: m [6d] 0x6d = 137 STK500V2: stk500v2_paged_load(..,flash,128,30720,128) block_size at addr 30720 is 128 STK500V2: stk500v2_loadaddr(15360) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3c 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xf0 0x00 0x05 0x0e 0x06 0x00 0x00 0x3c 0x00 0xda , 11) avrdude: Send: . [1b] . [f0] . [00] . [05] . [0e] . [06] . [00] . [00] < [3c] . [00] . [da] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f0] 0xf0 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e1] 0xe1 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xf1 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x54 , 10) avrdude: Send: . [1b] . [f1] . [00] . [04] . [0e] . [14] . [00] . [80] [20] T [54] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f1] 0xf1 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: s [73] 0x73 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,30848,128) block_size at addr 30848 is 128 STK500V2: stk500v2_loadaddr(15424) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3c 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xf2 0x00 0x05 0x0e 0x06 0x00 0x00 0x3c 0x40 0x98 , 11) avrdude: Send: . [1b] . [f2] . [00] . [05] . [0e] . [06] . [00] . [00] < [3c] @ [40] . [98] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f2] 0xf2 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e3] 0xe3 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xf3 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x56 , 10) avrdude: Send: . [1b] . [f3] . [00] . [04] . [0e] . [14] . [00] . [80] [20] V [56] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f3] 0xf3 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: q [71] 0x71 = 137 STK500V2: stk500v2_paged_load(..,flash,128,30976,128) block_size at addr 30976 is 128 STK500V2: stk500v2_loadaddr(15488) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3c 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xf4 0x00 0x05 0x0e 0x06 0x00 0x00 0x3c 0x80 0x5e , 11) avrdude: Send: . [1b] . [f4] . [00] . [05] . [0e] . [06] . [00] . [00] < [3c] . [80] ^ [5e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f4] 0xf4 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e5] 0xe5 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xf5 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x50 , 10) avrdude: Send: . [1b] . [f5] . [00] . [04] . [0e] . [14] . [00] . [80] [20] P [50] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f5] 0xf5 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: w [77] 0x77 = 137 STK500V2: stk500v2_paged_load(..,flash,128,31104,128) block_size at addr 31104 is 128 STK500V2: stk500v2_loadaddr(15552) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3c 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xf6 0x00 0x05 0x0e 0x06 0x00 0x00 0x3c 0xc0 0x1c , 11) avrdude: Send: . [1b] . [f6] . [00] . [05] . [0e] . [06] . [00] . [00] < [3c] . [c0] . [1c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f6] 0xf6 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e7] 0xe7 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xf7 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x52 , 10) avrdude: Send: . [1b] . [f7] . [00] . [04] . [0e] . [14] . [00] . [80] [20] R [52] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f7] 0xf7 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: u [75] 0x75 = 137 STK500V2: stk500v2_paged_load(..,flash,128,31232,128) block_size at addr 31232 is 128 STK500V2: stk500v2_loadaddr(15616) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3d 0x00 , 5) STK500V2: stk500v2_send(0x1b 0xf8 0x00 0x05 0x0e 0x06 0x00 0x00 0x3d 0x00 0xd3 , 11) avrdude: Send: . [1b] . [f8] . [00] . [05] . [0e] . [06] . [00] . [00] = [3d] . [00] . [d3] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f8] 0xf8 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [e9] 0xe9 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xf9 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x5c , 10) avrdude: Send: . [1b] . [f9] . [00] . [04] . [0e] . [14] . [00] . [80] [20] \ [5c] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [f9] 0xf9 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: { [7b] 0x7b = 137 STK500V2: stk500v2_paged_load(..,flash,128,31360,128) block_size at addr 31360 is 128 STK500V2: stk500v2_loadaddr(15680) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3d 0x40 , 5) STK500V2: stk500v2_send(0x1b 0xfa 0x00 0x05 0x0e 0x06 0x00 0x00 0x3d 0x40 0x91 , 11) avrdude: Send: . [1b] . [fa] . [00] . [05] . [0e] . [06] . [00] . [00] = [3d] @ [40] . [91] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [fa] 0xfa hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [eb] 0xeb = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xfb 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x5e , 10) avrdude: Send: . [1b] . [fb] . [00] . [04] . [0e] . [14] . [00] . [80] [20] ^ [5e] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [fb] 0xfb hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: y [79] 0x79 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,31488,128) block_size at addr 31488 is 128 STK500V2: stk500v2_loadaddr(15744) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3d 0x80 , 5) STK500V2: stk500v2_send(0x1b 0xfc 0x00 0x05 0x0e 0x06 0x00 0x00 0x3d 0x80 0x57 , 11) avrdude: Send: . [1b] . [fc] . [00] . [05] . [0e] . [06] . [00] . [00] = [3d] . [80] W [57] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [fc] 0xfc hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ed] 0xed = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xfd 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x58 , 10) avrdude: Send: . [1b] . [fd] . [00] . [04] . [0e] . [14] . [00] . [80] [20] X [58] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [fd] 0xfd hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [7f] 0x7f = 137 STK500V2: stk500v2_paged_load(..,flash,128,31616,128) block_size at addr 31616 is 128 STK500V2: stk500v2_loadaddr(15808) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3d 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0xfe 0x00 0x05 0x0e 0x06 0x00 0x00 0x3d 0xc0 0x15 , 11) avrdude: Send: . [1b] . [fe] . [00] . [05] . [0e] . [06] . [00] . [00] = [3d] . [c0] . [15] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [fe] 0xfe hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ef] 0xef = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0xff 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0x5a , 10) avrdude: Send: . [1b] . [ff] . [00] . [04] . [0e] . [14] . [00] . [80] [20] Z [5a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [ff] 0xff hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: } [7d] 0x7d = 137 STK500V2: stk500v2_paged_load(..,flash,128,31744,128) block_size at addr 31744 is 128 STK500V2: stk500v2_loadaddr(15872) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3e 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x00 0x00 0x05 0x0e 0x06 0x00 0x00 0x3e 0x00 0x28 , 11) avrdude: Send: . [1b] . [00] . [00] . [05] . [0e] . [06] . [00] . [00] > [3e] . [00] ( [28] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [00] 0x00 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [11] 0x11 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x01 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xa4 , 10) avrdude: Send: . [1b] . [01] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [a4] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [01] 0x01 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [83] 0x83 = 137 STK500V2: stk500v2_paged_load(..,flash,128,31872,128) block_size at addr 31872 is 128 STK500V2: stk500v2_loadaddr(15936) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3e 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x02 0x00 0x05 0x0e 0x06 0x00 0x00 0x3e 0x40 0x6a , 11) avrdude: Send: . [1b] . [02] . [00] . [05] . [0e] . [06] . [00] . [00] > [3e] @ [40] j [6a] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [02] 0x02 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [13] 0x13 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x03 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xa6 , 10) avrdude: Send: . [1b] . [03] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [a6] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [03] 0x03 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [81] 0x81 = 137 STK500V2: stk500v2_paged_load(..,flash,128,32000,128) block_size at addr 32000 is 128 STK500V2: stk500v2_loadaddr(16000) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3e 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x04 0x00 0x05 0x0e 0x06 0x00 0x00 0x3e 0x80 0xac , 11) avrdude: Send: . [1b] . [04] . [00] . [05] . [0e] . [06] . [00] . [00] > [3e] . [80] . [ac] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [04] 0x04 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [15] 0x15 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x05 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xa0 , 10) avrdude: Send: . [1b] . [05] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [a0] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [05] 0x05 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [87] 0x87 = 137 #STK500V2: stk500v2_paged_load(..,flash,128,32128,128) block_size at addr 32128 is 128 STK500V2: stk500v2_loadaddr(16064) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3e 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x06 0x00 0x05 0x0e 0x06 0x00 0x00 0x3e 0xc0 0xee , 11) avrdude: Send: . [1b] . [06] . [00] . [05] . [0e] . [06] . [00] . [00] > [3e] . [c0] . [ee] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [06] 0x06 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [17] 0x17 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x07 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xa2 , 10) avrdude: Send: . [1b] . [07] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [a2] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [07] 0x07 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [85] 0x85 = 137 STK500V2: stk500v2_paged_load(..,flash,128,32256,128) block_size at addr 32256 is 128 STK500V2: stk500v2_loadaddr(16128) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3f 0x00 , 5) STK500V2: stk500v2_send(0x1b 0x08 0x00 0x05 0x0e 0x06 0x00 0x00 0x3f 0x00 0x21 , 11) avrdude: Send: . [1b] . [08] . [00] . [05] . [0e] . [06] . [00] . [00] ? [3f] . [00] ! [21] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [08] 0x08 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [19] 0x19 = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x09 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xac , 10) avrdude: Send: . [1b] . [09] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ac] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [09] 0x09 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8b] 0x8b = 137 STK500V2: stk500v2_paged_load(..,flash,128,32384,128) block_size at addr 32384 is 128 STK500V2: stk500v2_loadaddr(16192) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3f 0x40 , 5) STK500V2: stk500v2_send(0x1b 0x0a 0x00 0x05 0x0e 0x06 0x00 0x00 0x3f 0x40 0x63 , 11) avrdude: Send: . [1b] . [0a] . [00] . [05] . [0e] . [06] . [00] . [00] ? [3f] @ [40] c [63] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0a] 0x0a hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1b] 0x1b = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x0b 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xae , 10) avrdude: Send: . [1b] . [0b] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [ae] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0b] 0x0b hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [89] 0x89 = 137 STK500V2: stk500v2_paged_load(..,flash,128,32512,128) block_size at addr 32512 is 128 STK500V2: stk500v2_loadaddr(16256) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3f 0x80 , 5) STK500V2: stk500v2_send(0x1b 0x0c 0x00 0x05 0x0e 0x06 0x00 0x00 0x3f 0x80 0xa5 , 11) avrdude: Send: . [1b] . [0c] . [00] . [05] . [0e] . [06] . [00] . [00] ? [3f] . [80] . [a5] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0c] 0x0c hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1d] 0x1d = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x0d 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xa8 , 10) avrdude: Send: . [1b] . [0d] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [a8] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0d] 0x0d hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8f] 0x8f = 137 STK500V2: stk500v2_paged_load(..,flash,128,32640,128) block_size at addr 32640 is 128 STK500V2: stk500v2_loadaddr(16320) STK500V2: stk500v2_command(0x06 0x00 0x00 0x3f 0xc0 , 5) STK500V2: stk500v2_send(0x1b 0x0e 0x00 0x05 0x0e 0x06 0x00 0x00 0x3f 0xc0 0xe7 , 11) avrdude: Send: . [1b] . [0e] . [00] . [05] . [0e] . [06] . [00] . [00] ? [3f] . [c0] . [e7] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0e] 0x0e hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [06] 0x06 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [1f] 0x1f = 8 STK500V2: stk500v2_command(0x14 0x00 0x80 0x20 , 4) STK500V2: stk500v2_send(0x1b 0x0f 0x00 0x04 0x0e 0x14 0x00 0x80 0x20 0xaa , 10) avrdude: Send: . [1b] . [0f] . [00] . [04] . [0e] . [14] . [00] . [80] [20] . [aa] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [0f] 0x0f hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [83] 0x83 hoping for size MSB... msg is 131 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [14] 0x14 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [ff] 0xff avrdude: Recv: . [00] 0x00 avrdude: Recv: . [8d] 0x8d = 137 # | 100% 18.62s avrdude: writing output file "flash.bin" STK500V2: stk500v2_command(0x11 0x01 0x01 , 3) STK500V2: stk500v2_send(0x1b 0x10 0x00 0x03 0x0e 0x11 0x01 0x01 0x17 , 9) avrdude: Send: . [1b] . [10] . [00] . [03] . [0e] . [11] . [01] . [01] . [17] STK500V2: stk500v2_recv(): avrdude: Recv: . [1b] 0x1b hoping for start token...got it avrdude: Recv: . [10] 0x10 hoping for sequence... got it, incrementing avrdude: Recv: . [00] 0x00 hoping for size LSB avrdude: Recv: . [02] 0x02 hoping for size MSB... msg is 2 bytes avrdude: Recv: . [0e] 0x0e avrdude: Recv: . [11] 0x11 avrdude: Recv: . [00] 0x00 avrdude: Recv: . [16] 0x16 = 8 STK500V2: stk500v2_close() avrdude done. Thank you.