EFM32PG1B 5.8.2 Silicon Labs EFM32PG1B Cortex-M MCUs *******************************************************************************\n * @version 5.8.2 \n *******************************************************************************\n * # License \n * Copyright 2019 Silicon Laboratories Inc. www.silabs.com \n *******************************************************************************\n * \n * SPDX-License-Identifier: Zlib \n * \n * The licensor of this software is Silicon Laboratories Inc. \n * \n * This software is provided 'as-is', without any express or implied \n * warranty. In no event will the authors be held liable for any damages \n * arising from the use of this software. \n * \n * Permission is granted to anyone to use this software for any purpose, \n * including commercial applications, and to alter it and redistribute it \n * freely, subject to the following restrictions: \n * \n * 1. The origin of this software must not be misrepresented; you must not \n * claim that you wrote the original software. If you use this software \n * in a product, an acknowledgment in the product documentation would be \n * appreciated but is not required. \n * 2. Altered source versions must be plainly marked as such, and must not be \n * misrepresented as being the original software. \n * 3. This notice may not be removed or altered from any source distribution. \n * \n ******************************************************************************* CM4 r0p1 little true true 3 false 8 32 MSC 5.8.2 MSC 0x400E0000 0 0x00000800 registers MSC 24 CTRL Memory System Control Register 0x000 32 read-write 0x00000001 0x0000000F ADDRFAULTEN Invalid Address Bus Fault Response Enable 0 1 read-write CLKDISFAULTEN Clock-disabled Bus Fault Response Enable 1 1 read-write PWRUPONDEMAND Power Up on Demand During Wake Up 2 1 read-write IFCREADCLEAR IFC Read Clears IF 3 1 read-write READCTRL Read Control Register 0x004 32 read-write 0x01000100 0x13000338 IFCDIS Internal Flash Cache Disable 3 1 read-write AIDIS Automatic Invalidate Disable 4 1 read-write ICCDIS Interrupt Context Cache Disable 5 1 read-write PREFETCH Prefetch Mode 8 1 read-write USEHPROT AHB_HPROT Mode 9 1 read-write MODE Read Mode 24 2 read-write WS0 Zero wait-states inserted in fetch or read transfers 0x00000000 WS1 One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details 0x00000001 SCBTP Suppress Conditional Branch Target Perfetch 28 1 read-write WRITECTRL Write Control Register 0x008 32 read-write 0x00000000 0x00000003 WREN Enable Write/Erase Controller 0 1 read-write IRQERASEABORT Abort Page Erase on Interrupt 1 1 read-write WRITECMD Write Command Register 0x00C 32 write-only 0x00000000 0x0000113F LADDRIM Load MSC_ADDRB Into ADDR 0 1 write-only ERASEPAGE Erase Page 1 1 write-only WRITEEND End Write Mode 2 1 write-only WRITEONCE Word Write-Once Trigger 3 1 write-only WRITETRIG Word Write Sequence Trigger 4 1 write-only ERASEABORT Abort Erase Sequence 5 1 write-only ERASEMAIN0 Mass Erase Region 0 8 1 write-only CLEARWDATA Clear WDATA State 12 1 write-only ADDRB Page Erase/Write Address Buffer 0x010 32 read-write 0x00000000 0xFFFFFFFF ADDRB Page Erase or Write Address Buffer 0 32 read-write WDATA Write Data Register 0x018 32 read-write 0x00000000 0xFFFFFFFF WDATA Write Data 0 32 read-write STATUS Status Register 0x01C 32 read-only 0x00000008 0x0000007F BUSY Erase/Write Busy 0 1 read-only LOCKED Access Locked 1 1 read-only INVADDR Invalid Write Address or Erase Page 2 1 read-only WDATAREADY WDATA Write Ready 3 1 read-only WORDTIMEOUT Flash Write Word Timeout 4 1 read-only ERASEABORTED The Current Flash Erase Operation Aborted 5 1 read-only PCRUNNING Performance Counters Running 6 1 read-only IF Interrupt Flag Register 0x030 32 read-only 0x00000000 0x0000003F ERASE Erase Done Interrupt Read Flag 0 1 read-only WRITE Write Done Interrupt Read Flag 1 1 read-only CHOF Cache Hits Overflow Interrupt Flag 2 1 read-only CMOF Cache Misses Overflow Interrupt Flag 3 1 read-only PWRUPF Flash Power Up Sequence Complete Flag 4 1 read-only ICACHERR ICache RAM Parity Error Flag 5 1 read-only IFS Interrupt Flag Set Register 0x034 32 write-only 0x00000000 0x0000003F ERASE Set ERASE Interrupt Flag 0 1 write-only WRITE Set WRITE Interrupt Flag 1 1 write-only CHOF Set CHOF Interrupt Flag 2 1 write-only CMOF Set CMOF Interrupt Flag 3 1 write-only PWRUPF Set PWRUPF Interrupt Flag 4 1 write-only ICACHERR Set ICACHERR Interrupt Flag 5 1 write-only IFC Interrupt Flag Clear Register 0x038 32 write-only 0x00000000 0x0000003F ERASE Clear ERASE Interrupt Flag 0 1 write-only WRITE Clear WRITE Interrupt Flag 1 1 write-only CHOF Clear CHOF Interrupt Flag 2 1 write-only CMOF Clear CMOF Interrupt Flag 3 1 write-only PWRUPF Clear PWRUPF Interrupt Flag 4 1 write-only ICACHERR Clear ICACHERR Interrupt Flag 5 1 write-only IEN Interrupt Enable Register 0x03C 32 read-write 0x00000000 0x0000003F ERASE ERASE Interrupt Enable 0 1 read-write WRITE WRITE Interrupt Enable 1 1 read-write CHOF CHOF Interrupt Enable 2 1 read-write CMOF CMOF Interrupt Enable 3 1 read-write PWRUPF PWRUPF Interrupt Enable 4 1 read-write ICACHERR ICACHERR Interrupt Enable 5 1 read-write LOCK Configuration Lock Register 0x040 32 read-write 0x00000000 0x0000FFFF LOCKKEY Configuration Lock 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 CACHECMD Flash Cache Command Register 0x044 32 write-only 0x00000000 0x00000007 INVCACHE Invalidate Instruction Cache 0 1 write-only STARTPC Start Performance Counters 1 1 write-only STOPPC Stop Performance Counters 2 1 write-only CACHEHITS Cache Hits Performance Counter 0x048 32 read-only 0x00000000 0x000FFFFF CACHEHITS Cache Hits Since Last Performance Counter Start Command 0 20 read-only CACHEMISSES Cache Misses Performance Counter 0x04C 32 read-only 0x00000000 0x000FFFFF CACHEMISSES Cache Misses Since Last Performance Counter Start Command 0 20 read-only MASSLOCK Mass Erase Lock Register 0x054 32 read-write 0x00000001 0x0000FFFF LOCKKEY Mass Erase Lock 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 STARTUP Startup Control 0x05C 32 read-write 0x1300104D 0x773FF3FF STDLY0 Startup Delay 0 0 10 read-write STDLY1 Startup Delay 0 12 10 read-write ASTWAIT Active Startup Wait 24 1 read-write STWSEN Startup Waitstates Enable 25 1 read-write STWSAEN Startup Waitstates Always Enable 26 1 read-write STWS Startup Waitstates 28 3 read-write CMD Command Register 0x074 32 write-only 0x00000000 0x00000001 PWRUP Flash Power Up Command 0 1 write-only EMU 5.8.2 EMU 0x400E3000 0 0x00000400 registers EMU 0 CTRL Control Register 0x000 32 read-write 0x00000000 0x00000002 EM2BLOCK Energy Mode 2 Block 1 1 read-write STATUS Status Register 0x004 32 read-only 0x00000000 0x0010011F VMONRDY VMON Ready 0 1 read-only VMONAVDD VMON AVDD Channel 1 1 read-only VMONALTAVDD Alternate VMON AVDD Channel 2 1 read-only VMONDVDD VMON DVDD Channel 3 1 read-only VMONIO0 VMON IOVDD0 Channel 4 1 read-only VMONFVDD VMON VDDFLASH Channel 8 1 read-only EM4IORET IO Retention Status 20 1 read-only LOCK Configuration Lock Register 0x008 32 read-write 0x00000000 0x0000FFFF LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 RAM0CTRL Memory Control Register 0x00C 32 read-write 0x00000000 0x0000000F RAMPOWERDOWN RAM0 Blockset Power-down 0 4 read-write NONE None of the RAM blocks powered down 0x00000000 BLK4 Power down RAM blocks 4 and above 0x00000008 BLK3TO4 Power down RAM blocks 3 and above 0x0000000C BLK2TO4 Power down RAM blocks 2 and above 0x0000000E BLK1TO4 Power down RAM blocks 1 and above 0x0000000F CMD Command Register 0x010 32 write-only 0x00000000 0x00000001 EM4UNLATCH EM4 Unlatch 0 1 write-only EM4CTRL EM4 Control Register 0x018 32 read-write 0x00000000 0x0003003F EM4STATE Energy Mode 4 State 0 1 read-write RETAINLFRCO LFRCO Retain During EM4 1 1 read-write RETAINLFXO LFXO Retain During EM4 2 1 read-write RETAINULFRCO ULFRCO Retain During EM4S 3 1 read-write EM4IORETMODE EM4 IO Retention Disable 4 2 read-write DISABLE No Retention: Pads enter reset state when entering EM4 0x00000000 EM4EXIT Retention through EM4: Pads enter reset state when exiting EM4 0x00000001 SWUNLATCH Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention 0x00000002 EM4ENTRY Energy Mode 4 Entry 16 2 write-only TEMPLIMITS Temperature Limits for Interrupt Generation 0x01C 32 read-write 0x0000FF00 0x0001FFFF TEMPLOW Temperature Low Limit 0 8 read-write TEMPHIGH Temperature High Limit 8 8 read-write EM4WUEN Enable EM4 Wakeup Due to Low/high Temperature 16 1 read-write TEMP Value of Last Temperature Measurement 0x020 32 read-only 0x00000000 0x000000FF TEMP Temperature Measurement 0 8 read-only IF Interrupt Flag Register 0x024 32 read-only 0x00000000 0xE11FC0FF VMONAVDDFALL VMON AVDD Channel Fall 0 1 read-only VMONAVDDRISE VMON AVDD Channel Rise 1 1 read-only VMONALTAVDDFALL Alternate VMON AVDD Channel Fall 2 1 read-only VMONALTAVDDRISE Alternate VMON AVDD Channel Rise 3 1 read-only VMONDVDDFALL VMON DVDD Channel Fall 4 1 read-only VMONDVDDRISE VMON DVDD Channel Rise 5 1 read-only VMONIO0FALL VMON IOVDD0 Channel Fall 6 1 read-only VMONIO0RISE VMON IOVDD0 Channel Rise 7 1 read-only VMONFVDDFALL VMON VDDFLASH Channel Fall 14 1 read-only VMONFVDDRISE VMON VDDFLASH Channel Rise 15 1 read-only PFETOVERCURRENTLIMIT PFET Current Limit Hit 16 1 read-only NFETOVERCURRENTLIMIT NFET Current Limit Hit 17 1 read-only DCDCLPRUNNING LP Mode is Running 18 1 read-only DCDCLNRUNNING LN Mode is Running 19 1 read-only DCDCINBYPASS DCDC is in Bypass 20 1 read-only EM23WAKEUP Wakeup IRQ From EM2 and EM3 24 1 read-only TEMP New Temperature Measurement Valid 29 1 read-only TEMPLOW Temperature Low Limit Reached 30 1 read-only TEMPHIGH Temperature High Limit Reached 31 1 read-only IFS Interrupt Flag Set Register 0x028 32 write-only 0x00000000 0xE11FC0FF VMONAVDDFALL Set VMONAVDDFALL Interrupt Flag 0 1 write-only VMONAVDDRISE Set VMONAVDDRISE Interrupt Flag 1 1 write-only VMONALTAVDDFALL Set VMONALTAVDDFALL Interrupt Flag 2 1 write-only VMONALTAVDDRISE Set VMONALTAVDDRISE Interrupt Flag 3 1 write-only VMONDVDDFALL Set VMONDVDDFALL Interrupt Flag 4 1 write-only VMONDVDDRISE Set VMONDVDDRISE Interrupt Flag 5 1 write-only VMONIO0FALL Set VMONIO0FALL Interrupt Flag 6 1 write-only VMONIO0RISE Set VMONIO0RISE Interrupt Flag 7 1 write-only VMONFVDDFALL Set VMONFVDDFALL Interrupt Flag 14 1 write-only VMONFVDDRISE Set VMONFVDDRISE Interrupt Flag 15 1 write-only PFETOVERCURRENTLIMIT Set PFETOVERCURRENTLIMIT Interrupt Flag 16 1 write-only NFETOVERCURRENTLIMIT Set NFETOVERCURRENTLIMIT Interrupt Flag 17 1 write-only DCDCLPRUNNING Set DCDCLPRUNNING Interrupt Flag 18 1 write-only DCDCLNRUNNING Set DCDCLNRUNNING Interrupt Flag 19 1 write-only DCDCINBYPASS Set DCDCINBYPASS Interrupt Flag 20 1 write-only EM23WAKEUP Set EM23WAKEUP Interrupt Flag 24 1 write-only TEMP Set TEMP Interrupt Flag 29 1 write-only TEMPLOW Set TEMPLOW Interrupt Flag 30 1 write-only TEMPHIGH Set TEMPHIGH Interrupt Flag 31 1 write-only IFC Interrupt Flag Clear Register 0x02C 32 write-only 0x00000000 0xE11FC0FF VMONAVDDFALL Clear VMONAVDDFALL Interrupt Flag 0 1 write-only VMONAVDDRISE Clear VMONAVDDRISE Interrupt Flag 1 1 write-only VMONALTAVDDFALL Clear VMONALTAVDDFALL Interrupt Flag 2 1 write-only VMONALTAVDDRISE Clear VMONALTAVDDRISE Interrupt Flag 3 1 write-only VMONDVDDFALL Clear VMONDVDDFALL Interrupt Flag 4 1 write-only VMONDVDDRISE Clear VMONDVDDRISE Interrupt Flag 5 1 write-only VMONIO0FALL Clear VMONIO0FALL Interrupt Flag 6 1 write-only VMONIO0RISE Clear VMONIO0RISE Interrupt Flag 7 1 write-only VMONFVDDFALL Clear VMONFVDDFALL Interrupt Flag 14 1 write-only VMONFVDDRISE Clear VMONFVDDRISE Interrupt Flag 15 1 write-only PFETOVERCURRENTLIMIT Clear PFETOVERCURRENTLIMIT Interrupt Flag 16 1 write-only NFETOVERCURRENTLIMIT Clear NFETOVERCURRENTLIMIT Interrupt Flag 17 1 write-only DCDCLPRUNNING Clear DCDCLPRUNNING Interrupt Flag 18 1 write-only DCDCLNRUNNING Clear DCDCLNRUNNING Interrupt Flag 19 1 write-only DCDCINBYPASS Clear DCDCINBYPASS Interrupt Flag 20 1 write-only EM23WAKEUP Clear EM23WAKEUP Interrupt Flag 24 1 write-only TEMP Clear TEMP Interrupt Flag 29 1 write-only TEMPLOW Clear TEMPLOW Interrupt Flag 30 1 write-only TEMPHIGH Clear TEMPHIGH Interrupt Flag 31 1 write-only IEN Interrupt Enable Register 0x030 32 read-write 0x00000000 0xE11FC0FF VMONAVDDFALL VMONAVDDFALL Interrupt Enable 0 1 read-write VMONAVDDRISE VMONAVDDRISE Interrupt Enable 1 1 read-write VMONALTAVDDFALL VMONALTAVDDFALL Interrupt Enable 2 1 read-write VMONALTAVDDRISE VMONALTAVDDRISE Interrupt Enable 3 1 read-write VMONDVDDFALL VMONDVDDFALL Interrupt Enable 4 1 read-write VMONDVDDRISE VMONDVDDRISE Interrupt Enable 5 1 read-write VMONIO0FALL VMONIO0FALL Interrupt Enable 6 1 read-write VMONIO0RISE VMONIO0RISE Interrupt Enable 7 1 read-write VMONFVDDFALL VMONFVDDFALL Interrupt Enable 14 1 read-write VMONFVDDRISE VMONFVDDRISE Interrupt Enable 15 1 read-write PFETOVERCURRENTLIMIT PFETOVERCURRENTLIMIT Interrupt Enable 16 1 read-write NFETOVERCURRENTLIMIT NFETOVERCURRENTLIMIT Interrupt Enable 17 1 read-write DCDCLPRUNNING DCDCLPRUNNING Interrupt Enable 18 1 read-write DCDCLNRUNNING DCDCLNRUNNING Interrupt Enable 19 1 read-write DCDCINBYPASS DCDCINBYPASS Interrupt Enable 20 1 read-write EM23WAKEUP EM23WAKEUP Interrupt Enable 24 1 read-write TEMP TEMP Interrupt Enable 29 1 read-write TEMPLOW TEMPLOW Interrupt Enable 30 1 read-write TEMPHIGH TEMPHIGH Interrupt Enable 31 1 read-write PWRLOCK Regulator and Supply Lock Register 0x034 32 read-write 0x00000000 0x0000FFFF LOCKKEY Regulator and Supply Configuration Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 PWRCFG Power Configuration Register 0x038 32 read-write 0x00000000 0x0000000F PWRCFG Power Configuration 0 4 read-write STARTUP Power up configuration. Works with any external configuration. 0x00000000 DCDCTODVDD DCDC is enabled and routed to DVDD. 0x00000002 PWRCTRL Power Control Register 0x03C 32 read-write 0x00000000 0x00000020 ANASW Analog Switch Selection 5 1 read-write DCDCCTRL DCDC Control 0x040 32 read-write 0x00000030 0x00000033 DCDCMODE Regulator Mode 0 2 read-write BYPASS DCDC regulator is operating in bypass mode. Prior to configuring DCDCMODE=BYPASS, software must set EMU_DCDCCLIMCTRL.BYPLIMEN=1 to prevent excessive current between VREGVDD and DVDD supplies. 0x00000000 LOWNOISE DCDC regulator is operating in low noise mode. 0x00000001 LOWPOWER DCDC regulator is operating in low power mode. 0x00000002 OFF DCDC regulator is off and the bypass switch is off. Note: DVDD must be supplied externally 0x00000003 DCDCMODEEM23 DCDC Mode EM23 4 1 read-write DCDCMODEEM4 DCDC Mode EM4H 5 1 read-write DCDCMISCCTRL DCDC Miscellaneous Control Register 0x04C 32 read-write 0x33307700 0x377FFF01 LNFORCECCM Force DCDC Into CCM Mode in Low Noise Operation 0 1 read-write PFETCNT PFET Switch Number Selection 8 4 read-write NFETCNT NFET Switch Number Selection 12 4 read-write BYPLIMSEL Current Limit in Bypass Mode 16 4 read-write LPCLIMILIMSEL Current Limit Level Selection for Current Limiter in LP Mode 20 3 read-write LNCLIMILIMSEL Current Limit Level Selection for Current Limiter in LN Mode 24 3 read-write LPCMPBIAS LP Mode Comparator Bias Selection 28 2 read-write BIAS0 Maximum load current less than 75uA. 0x00000000 BIAS1 Maximum load current less than 500uA. 0x00000001 BIAS2 Maximum load current less than 2.5mA. 0x00000002 BIAS3 Maximum load current less than 10mA. 0x00000003 DCDCZDETCTRL DCDC Power Train NFET Zero Current Detector Control Register 0x050 32 read-write 0x00000130 0x00000370 ZDETILIMSEL Reverse Current Limit Level Selection for Zero Detector 4 3 read-write ZDETBLANKDLY Reserved for internal use. Do not change. 8 2 read-write DCDCCLIMCTRL DCDC Power Train PFET Current Limiter Control Register 0x054 32 read-write 0x00002100 0x00002300 CLIMBLANKDLY Reserved for internal use. Do not change. 8 2 read-write BYPLIMEN Bypass Current Limit Enable 13 1 read-write DCDCLNCOMPCTRL DCDC Low Noise Compensator Control Register 0x058 32 read-write 0x57204077 0xF730F1F7 COMPENR1 Low Noise Mode Compensator R1 Trim Value 0 3 read-write COMPENR2 Low Noise Mode Compensator R2 Trim Value 4 5 read-write COMPENR3 Low Noise Mode Compensator R3 Trim Value 12 4 read-write COMPENC1 Low Noise Mode Compensator C1 Trim Value 20 2 read-write COMPENC2 Low Noise Mode Compensator C2 Trim Value 24 3 read-write COMPENC3 Low Noise Mode Compensator C3 Trim Value 28 4 read-write DCDCLNVCTRL DCDC Low Noise Voltage Register 0x05C 32 read-write 0x00007100 0x00007F02 LNATT Low Noise Mode Feedback Attenuation 1 1 read-write LNVREF Low Noise Mode VREF Trim 8 7 read-write DCDCTIMING DCDC Controller Timing Value Register 0x060 32 read-write 0x0FF1F8FF 0x6FF1F8FF LPINITWAIT Low Power Initialization Wait Time 0 8 read-write COMPENPRCHGEN LN Mode Precharge Enable 11 1 read-write LNWAIT Low Noise Controller Initialization Wait Time 12 5 read-write BYPWAIT Bypass Mode Transition From Low Power or Low Noise Modes Wait Wait 20 8 read-write DUTYSCALE Select Bias Duty Cycle Clock 29 2 read-write DCDCLPVCTRL DCDC Low Power Voltage Register 0x064 32 read-write 0x00000168 0x000001FF LPATT Low Power Feedback Attenuation 0 1 read-write LPVREF LP Mode Reference Selection for EM23 and EM4H 1 8 read-write DCDCLPCTRL DCDC Low Power Control Register 0x06C 32 read-write 0x00007000 0x0700F000 LPCMPHYSSEL LP Mode Hysteresis Selection 12 4 read-write LPVREFDUTYEN LP Mode Duty Cycling Enable 24 1 read-write LPBLANK Reserved for internal use. Do not change. 25 2 read-write DCDCLNFREQCTRL DCDC Low Noise Controller Frequency Control 0x070 32 read-write 0x10000000 0x1F000007 RCOBAND LN Mode RCO Frequency Band Selection 0 3 read-write RCOTRIM Reserved for internal use. Do not change. 24 5 read-write DCDCSYNC DCDC Read Status Register 0x078 32 read-only 0x00000000 0x00000001 DCDCCTRLBUSY DCDC CTRL Register Transfer Busy 0 1 read-only VMONAVDDCTRL VMON AVDD Channel Control 0x090 32 read-write 0x00000000 0x00FFFF0D EN Enable 0 1 read-write RISEWU Rise Wakeup 2 1 read-write FALLWU Fall Wakeup 3 1 read-write FALLTHRESFINE Falling Threshold Fine Adjust 8 4 read-write FALLTHRESCOARSE Falling Threshold Coarse Adjust 12 4 read-write RISETHRESFINE Rising Threshold Fine Adjust 16 4 read-write RISETHRESCOARSE Rising Threshold Coarse Adjust 20 4 read-write VMONALTAVDDCTRL Alternate VMON AVDD Channel Control 0x094 32 read-write 0x00000000 0x0000FF0D EN Enable 0 1 read-write RISEWU Rise Wakeup 2 1 read-write FALLWU Fall Wakeup 3 1 read-write THRESFINE Threshold Fine Adjust 8 4 read-write THRESCOARSE Threshold Coarse Adjust 12 4 read-write VMONDVDDCTRL VMON DVDD Channel Control 0x098 32 read-write 0x00000000 0x0000FF0D EN Enable 0 1 read-write RISEWU Rise Wakeup 2 1 read-write FALLWU Fall Wakeup 3 1 read-write THRESFINE Threshold Fine Adjust 8 4 read-write THRESCOARSE Threshold Coarse Adjust 12 4 read-write VMONIO0CTRL VMON IOVDD0 Channel Control 0x09C 32 read-write 0x00000000 0x0000FF1D EN Enable 0 1 read-write RISEWU Rise Wakeup 2 1 read-write FALLWU Fall Wakeup 3 1 read-write RETDIS EM4 IO0 Retention Disable 4 1 read-write THRESFINE Threshold Fine Adjust 8 4 read-write THRESCOARSE Threshold Coarse Adjust 12 4 read-write BIASCONF Configurations Related to the Bias 0x164 32 read-write 0x000000F8 0x000000FC NADUTYEM01 NA DUTY in EM01 2 1 read-write LPEM01 LP in EM01 3 1 read-write GMCEM23 GMC in EM234 4 1 read-write UADUTYEM23 UADUTY in EM234 5 1 read-write NADUTYEM23 NA DUTY in EM234 6 1 read-write LPEM23 LP in EM234 7 1 read-write TESTLOCK Test Lock Register 0x190 32 read-write 0x00000000 0x0000FFFF LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 BIASTESTCTRL Test Control Register for Regulator and BIAS 0x19C 32 read-write 0x00000000 0x00000008 BIAS_RIP_RESET Reset Bias Ripple Counter 3 1 read-write RMU 5.8.2 RMU 0x400E5000 0 0x00000400 registers CTRL Control Register 0x000 32 read-write 0x00004224 0x03007777 WDOGRMODE WDOG Reset Mode 0 3 read-write DISABLED Reset request is blocked. This disable bit is redundant with enable/disable bit in WDOG 0x00000000 LIMITED The CRYOTIMER, DEBUGGER, RTCC, are not reset. 0x00000001 EXTENDED The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. 0x00000002 FULL The entire device is reset except some EMU and RMU registers. 0x00000004 LOCKUPRMODE Core LOCKUP Reset Mode 4 3 read-write DISABLED Reset request is blocked. 0x00000000 LIMITED The CRYOTIMER, DEBUGGER, RTCC, are not reset. 0x00000001 EXTENDED The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. 0x00000002 FULL The entire device is reset except some EMU and RMU registers. 0x00000004 SYSRMODE Core Sysreset Reset Mode 8 3 read-write DISABLED Reset request is blocked. 0x00000000 LIMITED The CRYOTIMER, DEBUGGER, RTCC, are not reset. 0x00000001 EXTENDED The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. 0x00000002 FULL The entire device is reset except some EMU and RMU registers. 0x00000004 PINRMODE PIN Reset Mode 12 3 read-write DISABLED Reset request is blocked. 0x00000000 LIMITED The CRYOTIMER, DEBUGGER, RTCC, are not reset. 0x00000001 EXTENDED The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. 0x00000002 FULL The entire device is reset except some EMU and RMU registers. 0x00000004 RESETSTATE System Software Reset State 24 2 read-write RSTCAUSE Reset Cause Register 0x004 32 read-only 0x00000000 0x00010F1D PORST Power on Reset 0 1 read-only AVDDBOD Brown Out Detector AVDD Reset 2 1 read-only DVDDBOD Brown Out Detector DVDD Reset 3 1 read-only DECBOD Brown Out Detector Decouple Domain Reset 4 1 read-only EXTRST External Pin Reset 8 1 read-only LOCKUPRST LOCKUP Reset 9 1 read-only SYSREQRST System Request Reset 10 1 read-only WDOGRST Watchdog Reset 11 1 read-only EM4RST EM4 Reset 16 1 read-only CMD Command Register 0x008 32 write-only 0x00000000 0x00000001 RCCLR Reset Cause Clear 0 1 write-only RST Reset Control Register 0x00C 32 read-write 0x00000000 0x00000000 LOCK Configuration Lock Register 0x010 32 read-write 0x00000000 0x0000FFFF LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 CMU 5.8.2 CMU 0x400E4000 0 0x00000400 registers CMU 23 CTRL CMU Control Register 0x000 32 read-write 0x00100000 0x001101EF CLKOUTSEL0 Clock Output Select 0 0 4 read-write DISABLED Disabled 0x00000000 ULFRCO ULFRCO (directly from oscillator) 0x00000001 LFRCO LFRCO (directly from oscillator) 0x00000002 LFXO LFXO (directly from oscillator) 0x00000003 HFXO HFXO (directly from oscillator) 0x00000006 HFEXPCLK HFEXPCLK 0x00000007 ULFRCOQ ULFRCO (qualified) 0x00000009 LFRCOQ LFRCO (qualified) 0x0000000A LFXOQ LFXO (qualified) 0x0000000B HFRCOQ HFRCO (qualified) 0x0000000C AUXHFRCOQ AUXHFRCO (qualified) 0x0000000D HFXOQ HFXO (qualified) 0x0000000E HFSRCCLK HFSRCCLK 0x0000000F CLKOUTSEL1 Clock Output Select 1 5 4 read-write DISABLED Disabled 0x00000000 ULFRCO ULFRCO (directly from oscillator) 0x00000001 LFRCO LFRCO (directly from oscillator) 0x00000002 LFXO LFXO (directly from oscillator) 0x00000003 HFXO HFXO (directly from oscillator) 0x00000006 HFEXPCLK HFEXPCLK 0x00000007 ULFRCOQ ULFRCO (qualified) 0x00000009 LFRCOQ LFRCO (qualified) 0x0000000A LFXOQ LFXO (qualified) 0x0000000B HFRCOQ HFRCO (qualified) 0x0000000C AUXHFRCOQ AUXHFRCO (qualified) 0x0000000D HFXOQ HFXO (qualified) 0x0000000E HFSRCCLK HFSRCCLK 0x0000000F WSHFLE Wait State for High-Frequency LE Interface 16 1 read-write HFPERCLKEN HFPERCLK Enable 20 1 read-write HFRCOCTRL HFRCO Control Register 0x010 32 read-write 0xB1481F3C 0xFFFF3F7F TUNING HFRCO Tuning Value 0 7 read-write FINETUNING HFRCO Fine Tuning Value 8 6 read-write FREQRANGE HFRCO Frequency Range 16 5 read-write CMPBIAS HFRCO Comparator Bias Current 21 3 read-write LDOHP HFRCO LDO High Power Mode 24 1 read-write CLKDIV Locally Divide HFRCO Clock Output 25 2 read-write DIV1 Divide by 1. 0x00000000 DIV2 Divide by 2. 0x00000001 DIV4 Divide by 4. 0x00000002 FINETUNINGEN Enable Reference for Fine Tuning 27 1 read-write VREFTC HFRCO Temperature Coefficient Trim on Comparator Reference 28 4 read-write AUXHFRCOCTRL AUXHFRCO Control Register 0x018 32 read-write 0xB1481F3C 0xFFFF3F7F TUNING AUXHFRCO Tuning Value 0 7 read-write FINETUNING AUXHFRCO Fine Tuning Value 8 6 read-write FREQRANGE AUXHFRCO Frequency Range 16 5 read-write CMPBIAS AUXHFRCO Comparator Bias Current 21 3 read-write LDOHP AUXHFRCO LDO High Power Mode 24 1 read-write CLKDIV Locally Divide AUXHFRCO Clock Output 25 2 read-write DIV1 Divide by 1. 0x00000000 DIV2 Divide by 2. 0x00000001 DIV4 Divide by 4. 0x00000002 FINETUNINGEN Enable Reference for Fine Tuning 27 1 read-write VREFTC AUXHFRCO Temperature Coefficient Trim on Comparator Reference 28 4 read-write LFRCOCTRL LFRCO Control Register 0x020 32 read-write 0x81060100 0xF30701FF TUNING LFRCO Tuning Value 0 9 read-write ENVREF Enable Duty Cycling of Vref 16 1 read-write ENCHOP Enable Comparator Chopping 17 1 read-write ENDEM Enable Dynamic Element Matching 18 1 read-write TIMEOUT LFRCO Timeout 24 2 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 16CYCLES Timeout period of 16 cycles 0x00000001 32CYCLES Timeout period of 32 cycles 0x00000002 GMCCURTUNE Tuning of Gmc Current 28 4 read-write HFXOCTRL HFXO Control Register 0x024 32 read-write 0x00000000 0x37000731 MODE HFXO Mode 0 1 read-write PEAKDETSHUNTOPTMODE HFXO Automatic Peak Detection and Shunt Current Optimization Mode 4 2 read-write AUTOCMD Automatic control of HFXO peak detection and shunt optimization sequences. CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can also be used. 0x00000000 CMD CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can be used to trigger peak detection and shunt optimization sequences. 0x00000001 MANUAL CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE, REGISH, REGSELILOW, and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready. 0x00000002 LOWPOWER Low Power Mode Control 8 1 read-write XTI2GND Clamp HFXTAL_N Pin to Ground When HFXO Oscillator is Off 9 1 read-write XTO2GND Clamp HFXTAL_P Pin to Ground When HFXO Oscillator is Off 10 1 read-write LFTIMEOUT HFXO Low Frequency Timeout 24 3 read-write 0CYCLES Timeout period of 0 cycles (disabled) 0x00000000 2CYCLES Timeout period of 2 cycles 0x00000001 4CYCLES Timeout period of 4 cycles 0x00000002 16CYCLES Timeout period of 16 cycles 0x00000003 32CYCLES Timeout period of 32 cycles 0x00000004 64CYCLES Timeout period of 64 cycles 0x00000005 1KCYCLES Timeout period of 1024 cycles 0x00000006 4KCYCLES Timeout period of 4096 cycles 0x00000007 AUTOSTARTEM0EM1 Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3 28 1 read-write AUTOSTARTSELEM0EM1 Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3 29 1 read-write HFXOCTRL1 HFXO Control 1 0x028 32 read-write 0x00000240 0x00000277 PEAKDETTHR Sets the Peak Detector amplitude detection threshold levels 0 3 read-write REGLVL Reserved for internal use. Do not change. 4 3 read-write XTIBIASEN Reserved for internal use. Do not change. 9 1 read-write HFXOSTARTUPCTRL HFXO Startup Control 0x02C 32 read-write 0xA1250060 0xFFEFF87F IBTRIMXOCORE Sets the Startup Oscillator Core Bias Current 0 7 read-write CTUNE Sets Oscillator Tuning Capacitance 11 9 read-write RESERVED0 This Field is Reserved. It Should Be Set to 0x9 21 7 read-write RESERVED1 Sets the Regulator Output Current Level (shunt Regulator) 28 4 read-write HFXOSTEADYSTATECTRL HFXO Steady State Control 0x030 32 read-write 0xA30AAD09 0xF70FFFFF IBTRIMXOCORE Sets the Steady State Oscillator Core Bias Current. 0 7 read-write REGISH Sets the Steady State Regulator Output Current Level (shunt Regulator) 7 4 read-write CTUNE Sets Oscillator Tuning Capacitance 11 9 read-write REGSELILOW Controls Regulator Minimum Shunt Current Detection Relative to Nominal 24 2 read-write PEAKDETEN Enables Oscillator Peak Detectors 26 1 read-write REGISHUPPER Set Regulator Output Current Level (shunt Regulator). Ish = 120uA + REGISHUPPER X 120uA 28 4 read-write HFXOTIMEOUTCTRL HFXO Timeout Control 0x034 32 read-write 0x00026667 0x000FFFFF STARTUPTIMEOUT Wait Duration in HFXO Startup Enable Wait State 0 4 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 4CYCLES Timeout period of 4 cycles 0x00000001 16CYCLES Timeout period of 16 cycles 0x00000002 32CYCLES Timeout period of 32 cycles 0x00000003 256CYCLES Timeout period of 256 cycles 0x00000004 1KCYCLES Timeout period of 1024 cycles 0x00000005 2KCYCLES Timeout period of 2048 cycles 0x00000006 4KCYCLES Timeout period of 4096 cycles 0x00000007 8KCYCLES Timeout period of 8192 cycles 0x00000008 16KCYCLES Timeout period of 16384 cycles 0x00000009 32KCYCLES Timeout period of 32768 cycles 0x0000000A STEADYTIMEOUT Wait Duration in HFXO Startup Steady Wait State 4 4 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 4CYCLES Timeout period of 4 cycles 0x00000001 16CYCLES Timeout period of 16 cycles 0x00000002 32CYCLES Timeout period of 32 cycles 0x00000003 256CYCLES Timeout period of 256 cycles 0x00000004 1KCYCLES Timeout period of 1024 cycles 0x00000005 2KCYCLES Timeout period of 2048 cycles 0x00000006 4KCYCLES Timeout period of 4096 cycles 0x00000007 8KCYCLES Timeout period of 8192 cycles 0x00000008 16KCYCLES Timeout period of 16384 cycles 0x00000009 32KCYCLES Timeout period of 32768 cycles 0x0000000A RESERVED2 Wait Duration in HFXO Warm Startup Steady Wait State 8 4 read-write PEAKDETTIMEOUT Wait Duration in HFXO Peak Detection Wait State 12 4 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 4CYCLES Timeout period of 4 cycles 0x00000001 16CYCLES Timeout period of 16 cycles 0x00000002 32CYCLES Timeout period of 32 cycles 0x00000003 256CYCLES Timeout period of 256 cycles 0x00000004 1KCYCLES Timeout period of 1024 cycles 0x00000005 2KCYCLES Timeout period of 2048 cycles 0x00000006 4KCYCLES Timeout period of 4096 cycles 0x00000007 8KCYCLES Timeout period of 8192 cycles 0x00000008 16KCYCLES Timeout period of 16384 cycles 0x00000009 32KCYCLES Timeout period of 32768 cycles 0x0000000A SHUNTOPTTIMEOUT Wait Duration in HFXO Shunt Current Optimization Wait State 16 4 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 4CYCLES Timeout period of 4 cycles 0x00000001 16CYCLES Timeout period of 16 cycles 0x00000002 32CYCLES Timeout period of 32 cycles 0x00000003 256CYCLES Timeout period of 256 cycles 0x00000004 1KCYCLES Timeout period of 1024 cycles 0x00000005 2KCYCLES Timeout period of 2048 cycles 0x00000006 4KCYCLES Timeout period of 4096 cycles 0x00000007 8KCYCLES Timeout period of 8192 cycles 0x00000008 16KCYCLES Timeout period of 16384 cycles 0x00000009 32KCYCLES Timeout period of 32768 cycles 0x0000000A LFXOCTRL LFXO Control Register 0x038 32 read-write 0x07009000 0x0713DB7F TUNING LFXO Internal Capacitor Array Tuning Value 0 7 read-write MODE LFXO Mode 8 2 read-write XTAL 32768 Hz crystal oscillator 0x00000000 BUFEXTCLK An AC coupled buffer is coupled in series with LFXTAL_N pin, suitable for external sinus wave (32768 Hz). 0x00000001 DIGEXTCLK Digital external clock on LFXTAL_N pin. Oscillator is effectively bypassed. 0x00000002 GAIN LFXO Startup Gain 11 2 read-write HIGHAMPL LFXO High XTAL Oscillation Amplitude Enable 14 1 read-write AGC LFXO AGC Enable 15 1 read-write CUR LFXO Current Trim 16 2 read-write BUFCUR LFXO Buffer Bias Current 20 1 read-write TIMEOUT LFXO Timeout 24 3 read-write 2CYCLES Timeout period of 2 cycles 0x00000000 256CYCLES Timeout period of 256 cycles 0x00000001 1KCYCLES Timeout period of 1024 cycles 0x00000002 2KCYCLES Timeout period of 2048 cycles 0x00000003 4KCYCLES Timeout period of 4096 cycles 0x00000004 8KCYCLES Timeout period of 8192 cycles 0x00000005 16KCYCLES Timeout period of 16384 cycles 0x00000006 32KCYCLES Timeout period of 32768 cycles 0x00000007 ULFRCOCTRL ULFRCO Control Register 0x03C 32 read-write 0x00020020 0x00030C3F TUNING ULFRCO TUNING Value 0 6 read-write MODE ULFRCO Mode 10 2 read-write 1KHZ ULFRCO = 1 kHz 0x00000000 2KHZ ULFRCO = 2 kHz 0x00000001 4KHZ ULFRCO = 4 kHz 0x00000002 32KHZ ULFRCO = 32 kHz 0x00000003 RESTRIM ULFRCO Resistor Trim Value (for Resistor in Bias Circuit; NOT for USE as FREQUENCY CALIBRATION) 16 2 read-write CALCTRL Calibration Control Register 0x050 32 read-write 0x00000000 0x0F0F0177 UPSEL Calibration Up-counter Select 0 3 read-write HFXO Select HFXO as up-counter 0x00000000 LFXO Select LFXO as up-counter 0x00000001 HFRCO Select HFRCO as up-counter 0x00000002 LFRCO Select LFRCO as up-counter 0x00000003 AUXHFRCO Select AUXHFRCO as up-counter 0x00000004 PRS Select PRS input selected by PRSUPSEL as up-counter 0x00000005 DOWNSEL Calibration Down-counter Select 4 3 read-write HFCLK Select HFCLK for down-counter 0x00000000 HFXO Select HFXO for down-counter 0x00000001 LFXO Select LFXO for down-counter 0x00000002 HFRCO Select HFRCO for down-counter 0x00000003 LFRCO Select LFRCO for down-counter 0x00000004 AUXHFRCO Select AUXHFRCO for down-counter 0x00000005 PRS Select PRS input selected by PRSDOWNSEL as down-counter 0x00000006 CONT Continuous Calibration 8 1 read-write PRSUPSEL PRS Select for PRS Input When Selected in UPSEL 16 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSDOWNSEL PRS Select for PRS Input When Selected in DOWNSEL 24 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B CALCNT Calibration Counter Register 0x054 32 read-write 0x00000000 0x000FFFFF CALCNT Calibration Counter 0 20 read-write OSCENCMD Oscillator Enable/Disable Command Register 0x060 32 write-only 0x00000000 0x000003FF HFRCOEN HFRCO Enable 0 1 write-only HFRCODIS HFRCO Disable 1 1 write-only HFXOEN HFXO Enable 2 1 write-only HFXODIS HFXO Disable 3 1 write-only AUXHFRCOEN AUXHFRCO Enable 4 1 write-only AUXHFRCODIS AUXHFRCO Disable 5 1 write-only LFRCOEN LFRCO Enable 6 1 write-only LFRCODIS LFRCO Disable 7 1 write-only LFXOEN LFXO Enable 8 1 write-only LFXODIS LFXO Disable 9 1 write-only CMD Command Register 0x064 32 write-only 0x00000000 0x00000033 CALSTART Calibration Start 0 1 write-only CALSTOP Calibration Stop 1 1 write-only HFXOPEAKDETSTART HFXO Peak Detection Start 4 1 write-only HFXOSHUNTOPTSTART HFXO Shunt Current Optimization Start 5 1 write-only DBGCLKSEL Debug Trace Clock Select 0x070 32 read-write 0x00000000 0x00000001 DBG Debug Trace Clock 0 1 read-write AUXHFRCO AUXHFRCO is the debug trace clock 0x00000000 HFCLK HFCLK is the debug trace clock 0x00000001 HFCLKSEL High Frequency Clock Select Command Register 0x074 32 write-only 0x00000000 0x00000007 HF HFCLK Select 0 3 write-only HFRCO Select HFRCO as HFCLK 0x00000001 HFXO Select HFXO as HFCLK 0x00000002 LFRCO Select LFRCO as HFCLK 0x00000003 LFXO Select LFXO as HFCLK 0x00000004 LFACLKSEL Low Frequency A Clock Select Register 0x080 32 read-write 0x00000000 0x00000007 LFA Clock Select for LFA 0 3 read-write DISABLED LFACLK is disabled 0x00000000 LFRCO LFRCO selected as LFACLK 0x00000001 LFXO LFXO selected as LFACLK 0x00000002 ULFRCO ULFRCO selected as LFACLK 0x00000004 LFBCLKSEL Low Frequency B Clock Select Register 0x084 32 read-write 0x00000000 0x00000007 LFB Clock Select for LFB 0 3 read-write DISABLED LFBCLK is disabled 0x00000000 LFRCO LFRCO selected as LFBCLK 0x00000001 LFXO LFXO selected as LFBCLK 0x00000002 HFCLKLE HFCLK divided by two/four is selected as LFBCLK 0x00000003 ULFRCO ULFRCO selected as LFBCLK 0x00000004 LFECLKSEL Low Frequency E Clock Select Register 0x088 32 read-write 0x00000000 0x00000007 LFE Clock Select for LFE 0 3 read-write DISABLED LFECLK is disabled 0x00000000 LFRCO LFRCO selected as LFECLK 0x00000001 LFXO LFXO selected as LFECLK 0x00000002 ULFRCO ULFRCO selected as LFECLK 0x00000004 STATUS Status Register 0x090 32 read-only 0x00010003 0x07E103FF HFRCOENS HFRCO Enable Status 0 1 read-only HFRCORDY HFRCO Ready 1 1 read-only HFXOENS HFXO Enable Status 2 1 read-only HFXORDY HFXO Ready 3 1 read-only AUXHFRCOENS AUXHFRCO Enable Status 4 1 read-only AUXHFRCORDY AUXHFRCO Ready 5 1 read-only LFRCOENS LFRCO Enable Status 6 1 read-only LFRCORDY LFRCO Ready 7 1 read-only LFXOENS LFXO Enable Status 8 1 read-only LFXORDY LFXO Ready 9 1 read-only CALRDY Calibration Ready 16 1 read-only HFXOREQ HFXO is Required By Hardware 21 1 read-only HFXOPEAKDETRDY HFXO Peak Detection Ready 22 1 read-only HFXOSHUNTOPTRDY HFXO Shunt Current Optimization Ready 23 1 read-only HFXOAMPHIGH HFXO Oscillation Amplitude is Too High 24 1 read-only HFXOAMPLOW HFXO Amplitude Tuning Value Too Low 25 1 read-only HFXOREGILOW HFXO Regulator Shunt Current Too Low 26 1 read-only HFCLKSTATUS HFCLK Status Register 0x094 32 read-only 0x00000001 0x00000007 SELECTED HFCLK Selected 0 3 read-only HFRCO HFRCO is selected as HFCLK clock source 0x00000001 HFXO HFXO is selected as HFCLK clock source 0x00000002 LFRCO LFRCO is selected as HFCLK clock source 0x00000003 LFXO LFXO is selected as HFCLK clock source 0x00000004 HFXOTRIMSTATUS HFXO Trim Status 0x09C 32 read-only 0x00000500 0x000007FF IBTRIMXOCORE Value of IBTRIMXOCORE Found By Automatic HFXO Peak Detection Algorithm 0 7 read-only REGISH Value of REGISH Found By Automatic HFXO Shunt Current Optimization Algorithm 7 4 read-only IF Interrupt Flag Register 0x0A0 32 read-only 0x00000001 0x80007F7F HFRCORDY HFRCO Ready Interrupt Flag 0 1 read-only HFXORDY HFXO Ready Interrupt Flag 1 1 read-only LFRCORDY LFRCO Ready Interrupt Flag 2 1 read-only LFXORDY LFXO Ready Interrupt Flag 3 1 read-only AUXHFRCORDY AUXHFRCO Ready Interrupt Flag 4 1 read-only CALRDY Calibration Ready Interrupt Flag 5 1 read-only CALOF Calibration Overflow Interrupt Flag 6 1 read-only HFXODISERR HFXO Disable Error Interrupt Flag 8 1 read-only HFXOAUTOSW HFXO Automatic Switch Interrupt Flag 9 1 read-only HFXOPEAKDETERR HFXO Automatic Peak Detection Error Interrupt Flag 10 1 read-only HFXOPEAKDETRDY HFXO Automatic Peak Detection Ready Interrupt Flag 11 1 read-only HFXOSHUNTOPTRDY HFXO Automatic Shunt Current Optimization Ready Interrupt Flag 12 1 read-only HFRCODIS HFRCO Disable Interrupt Flag 13 1 read-only LFTIMEOUTERR Low Frequency Timeout Error Interrupt Flag 14 1 read-only CMUERR CMU Error Interrupt Flag 31 1 read-only IFS Interrupt Flag Set Register 0x0A4 32 write-only 0x00000000 0x80007F7F HFRCORDY Set HFRCORDY Interrupt Flag 0 1 write-only HFXORDY Set HFXORDY Interrupt Flag 1 1 write-only LFRCORDY Set LFRCORDY Interrupt Flag 2 1 write-only LFXORDY Set LFXORDY Interrupt Flag 3 1 write-only AUXHFRCORDY Set AUXHFRCORDY Interrupt Flag 4 1 write-only CALRDY Set CALRDY Interrupt Flag 5 1 write-only CALOF Set CALOF Interrupt Flag 6 1 write-only HFXODISERR Set HFXODISERR Interrupt Flag 8 1 write-only HFXOAUTOSW Set HFXOAUTOSW Interrupt Flag 9 1 write-only HFXOPEAKDETERR Set HFXOPEAKDETERR Interrupt Flag 10 1 write-only HFXOPEAKDETRDY Set HFXOPEAKDETRDY Interrupt Flag 11 1 write-only HFXOSHUNTOPTRDY Set HFXOSHUNTOPTRDY Interrupt Flag 12 1 write-only HFRCODIS Set HFRCODIS Interrupt Flag 13 1 write-only LFTIMEOUTERR Set LFTIMEOUTERR Interrupt Flag 14 1 write-only CMUERR Set CMUERR Interrupt Flag 31 1 write-only IFC Interrupt Flag Clear Register 0x0A8 32 write-only 0x00000000 0x80007F7F HFRCORDY Clear HFRCORDY Interrupt Flag 0 1 write-only HFXORDY Clear HFXORDY Interrupt Flag 1 1 write-only LFRCORDY Clear LFRCORDY Interrupt Flag 2 1 write-only LFXORDY Clear LFXORDY Interrupt Flag 3 1 write-only AUXHFRCORDY Clear AUXHFRCORDY Interrupt Flag 4 1 write-only CALRDY Clear CALRDY Interrupt Flag 5 1 write-only CALOF Clear CALOF Interrupt Flag 6 1 write-only HFXODISERR Clear HFXODISERR Interrupt Flag 8 1 write-only HFXOAUTOSW Clear HFXOAUTOSW Interrupt Flag 9 1 write-only HFXOPEAKDETERR Clear HFXOPEAKDETERR Interrupt Flag 10 1 write-only HFXOPEAKDETRDY Clear HFXOPEAKDETRDY Interrupt Flag 11 1 write-only HFXOSHUNTOPTRDY Clear HFXOSHUNTOPTRDY Interrupt Flag 12 1 write-only HFRCODIS Clear HFRCODIS Interrupt Flag 13 1 write-only LFTIMEOUTERR Clear LFTIMEOUTERR Interrupt Flag 14 1 write-only CMUERR Clear CMUERR Interrupt Flag 31 1 write-only IEN Interrupt Enable Register 0x0AC 32 read-write 0x00000000 0x80007F7F HFRCORDY HFRCORDY Interrupt Enable 0 1 read-write HFXORDY HFXORDY Interrupt Enable 1 1 read-write LFRCORDY LFRCORDY Interrupt Enable 2 1 read-write LFXORDY LFXORDY Interrupt Enable 3 1 read-write AUXHFRCORDY AUXHFRCORDY Interrupt Enable 4 1 read-write CALRDY CALRDY Interrupt Enable 5 1 read-write CALOF CALOF Interrupt Enable 6 1 read-write HFXODISERR HFXODISERR Interrupt Enable 8 1 read-write HFXOAUTOSW HFXOAUTOSW Interrupt Enable 9 1 read-write HFXOPEAKDETERR HFXOPEAKDETERR Interrupt Enable 10 1 read-write HFXOPEAKDETRDY HFXOPEAKDETRDY Interrupt Enable 11 1 read-write HFXOSHUNTOPTRDY HFXOSHUNTOPTRDY Interrupt Enable 12 1 read-write HFRCODIS HFRCODIS Interrupt Enable 13 1 read-write LFTIMEOUTERR LFTIMEOUTERR Interrupt Enable 14 1 read-write CMUERR CMUERR Interrupt Enable 31 1 read-write HFBUSCLKEN0 High Frequency Bus Clock Enable Register 0 0x0B0 32 read-write 0x00000000 0x0000003F LE Low Energy Peripheral Interface Clock Enable 0 1 read-write CRYPTO Advanced Encryption Standard Accelerator Clock Enable 1 1 read-write GPIO General purpose Input/Output Clock Enable 2 1 read-write PRS Peripheral Reflex System Clock Enable 3 1 read-write LDMA Linked Direct Memory Access Controller Clock Enable 4 1 read-write GPCRC General Purpose CRC Clock Enable 5 1 read-write HFPERCLKEN0 High Frequency Peripheral Clock Enable Register 0 0x0C0 32 read-write 0x00000000 0x000003FF TIMER0 Timer 0 Clock Enable 0 1 read-write TIMER1 Timer 1 Clock Enable 1 1 read-write USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable 2 1 read-write USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable 3 1 read-write ACMP0 Analog Comparator 0 Clock Enable 4 1 read-write ACMP1 Analog Comparator 1 Clock Enable 5 1 read-write CRYOTIMER CRYOTIMER Clock Enable 6 1 read-write I2C0 I2C 0 Clock Enable 7 1 read-write ADC0 Analog to Digital Converter 0 Clock Enable 8 1 read-write IDAC0 Current Digital to Analog Converter 0 Clock Enable 9 1 read-write LFACLKEN0 Low Frequency a Clock Enable Register 0 (Async Reg) 0x0E0 32 read-write 0x00000000 0x00000001 LETIMER0 Low Energy Timer 0 Clock Enable 0 1 read-write LFBCLKEN0 Low Frequency B Clock Enable Register 0 (Async Reg) 0x0E8 32 read-write 0x00000000 0x00000001 LEUART0 Low Energy UART 0 Clock Enable 0 1 read-write LFECLKEN0 Low Frequency E Clock Enable Register 0 (Async Reg) 0x0F0 32 read-write 0x00000000 0x00000001 RTCC Real-Time Counter and Calendar Clock Enable 0 1 read-write HFPRESC High Frequency Clock Prescaler Register 0x100 32 read-write 0x00000000 0x01001F00 PRESC HFCLK Prescaler 8 5 read-write NODIVISION 0x00000000 HFCLKLEPRESC HFCLKLE Prescaler 24 1 read-write DIV2 HFCLKLE is HFBUSCLKLE divided by 2. 0x00000000 DIV4 HFCLKLE is HFBUSCLKLE divided by 4. 0x00000001 HFCOREPRESC High Frequency Core Clock Prescaler Register 0x108 32 read-write 0x00000000 0x0001FF00 PRESC HFCORECLK Prescaler 8 9 read-write NODIVISION 0x00000000 HFPERPRESC High Frequency Peripheral Clock Prescaler Register 0x10C 32 read-write 0x00000000 0x0001FF00 PRESC HFPERCLK Prescaler 8 9 read-write NODIVISION 0x00000000 HFEXPPRESC High Frequency Export Clock Prescaler Register 0x114 32 read-write 0x00000000 0x00001F00 PRESC HFEXPCLK Prescaler 8 5 read-write NODIVISION 0x00000000 LFAPRESC0 Low Frequency a Prescaler Register 0 (Async Reg) 0x120 32 read-write 0x00000000 0x0000000F LETIMER0 Low Energy Timer 0 Prescaler 0 4 read-write DIV1 LFACLKLETIMER0 = LFACLK 0x00000000 DIV2 LFACLKLETIMER0 = LFACLK/2 0x00000001 DIV4 LFACLKLETIMER0 = LFACLK/4 0x00000002 DIV8 LFACLKLETIMER0 = LFACLK/8 0x00000003 DIV16 LFACLKLETIMER0 = LFACLK/16 0x00000004 DIV32 LFACLKLETIMER0 = LFACLK/32 0x00000005 DIV64 LFACLKLETIMER0 = LFACLK/64 0x00000006 DIV128 LFACLKLETIMER0 = LFACLK/128 0x00000007 DIV256 LFACLKLETIMER0 = LFACLK/256 0x00000008 DIV512 LFACLKLETIMER0 = LFACLK/512 0x00000009 DIV1024 LFACLKLETIMER0 = LFACLK/1024 0x0000000A DIV2048 LFACLKLETIMER0 = LFACLK/2048 0x0000000B DIV4096 LFACLKLETIMER0 = LFACLK/4096 0x0000000C DIV8192 LFACLKLETIMER0 = LFACLK/8192 0x0000000D DIV16384 LFACLKLETIMER0 = LFACLK/16384 0x0000000E DIV32768 LFACLKLETIMER0 = LFACLK/32768 0x0000000F LFBPRESC0 Low Frequency B Prescaler Register 0 (Async Reg) 0x128 32 read-write 0x00000000 0x00000003 LEUART0 Low Energy UART 0 Prescaler 0 2 read-write DIV1 LFBCLKLEUART0 = LFBCLK 0x00000000 DIV2 LFBCLKLEUART0 = LFBCLK/2 0x00000001 DIV4 LFBCLKLEUART0 = LFBCLK/4 0x00000002 DIV8 LFBCLKLEUART0 = LFBCLK/8 0x00000003 LFEPRESC0 Low Frequency E Prescaler Register 0 (Async Reg) 0x130 32 read-write 0x00000000 0x0000000F RTCC Real-Time Counter and Calendar Prescaler 0 4 read-only DIV1 LFECLKRTCC = LFECLK 0x00000000 SYNCBUSY Synchronization Busy Register 0x140 32 read-only 0x00000000 0x3F050055 LFACLKEN0 Low Frequency a Clock Enable 0 Busy 0 1 read-only LFAPRESC0 Low Frequency a Prescaler 0 Busy 2 1 read-only LFBCLKEN0 Low Frequency B Clock Enable 0 Busy 4 1 read-only LFBPRESC0 Low Frequency B Prescaler 0 Busy 6 1 read-only LFECLKEN0 Low Frequency E Clock Enable 0 Busy 16 1 read-only LFEPRESC0 Low Frequency E Prescaler 0 Busy 18 1 read-only HFRCOBSY HFRCO Busy 24 1 read-only AUXHFRCOBSY AUXHFRCO Busy 25 1 read-only LFRCOBSY LFRCO Busy 26 1 read-only LFRCOVREFBSY LFRCO VREF Busy 27 1 read-only HFXOBSY HFXO Busy 28 1 read-only LFXOBSY LFXO Busy 29 1 read-only FREEZE Freeze Register 0x144 32 read-write 0x00000000 0x00000001 REGFREEZE Register Update Freeze 0 1 read-write PCNTCTRL PCNT Control Register 0x150 32 read-write 0x00000000 0x00000003 PCNT0CLKEN PCNT0 Clock Enable 0 1 read-write PCNT0CLKSEL PCNT0 Clock Select 1 1 read-write ADCCTRL ADC Control Register 0x15C 32 read-write 0x00000000 0x00000130 ADC0CLKSEL ADC0 Clock Select 4 2 read-write DISABLED ADC0 is not clocked 0x00000000 AUXHFRCO AUXHFRCO is clocking ADC0 0x00000001 HFXO HFXO is clocking ADC0 0x00000002 HFSRCCLK HFSRCCLK is clocking ADC0 0x00000003 ADC0CLKINV Invert Clock Selected By ADC0CLKSEL 8 1 read-write ROUTEPEN I/O Routing Pin Enable Register 0x170 32 read-write 0x00000000 0x00000003 CLKOUT0PEN CLKOUT0 Pin Enable 0 1 read-write CLKOUT1PEN CLKOUT1 Pin Enable 1 1 read-write ROUTELOC0 I/O Routing Location Register 0x174 32 read-write 0x00000000 0x00003F3F CLKOUT0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CLKOUT1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOCK Configuration Lock Register 0x180 32 read-write 0x00000000 0x0000FFFF LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 CRYPTO 5.8.2 CRYPTO 0x400F0000 0 0x00000400 registers CRYPTO 25 CTRL Control Register 0x000 32 read-write 0x00000000 0xB333C407 AES AES Mode 0 1 read-write KEYBUFDIS Key Buffer Disable 1 1 read-write SHA SHA Mode 2 1 read-write NOBUSYSTALL No Stalling of Bus When Busy 10 1 read-write INCWIDTH Increment Width 14 2 read-write INCWIDTH1 Byte 15 in DATA1 is used for the increment function. 0x00000000 INCWIDTH2 Bytes 14 and 15 in DATA1 are used for the increment function. 0x00000001 INCWIDTH3 Bytes 13 to 15 in DATA1 are used for the increment function. 0x00000002 INCWIDTH4 Bytes 12 to 15 in DATA1 are used for the increment function. 0x00000003 DMA0MODE DMA0 Read Mode 16 2 read-write FULL Target register is fully read/written during every DMA transaction 0x00000000 LENLIMIT Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + necessary zero padding is read. Zero padding is automatically added when writing. 0x00000001 FULLBYTE Target register is fully read/written during every DMA transaction. Bytewise DMA. 0x00000002 LENLIMITBYTE Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + necessary zero padding is read. Bytewise DMA. Zero padding is automatically added when writing. 0x00000003 DMA0RSEL DMA0 Read Register Select 20 2 read-write DATA0 0x00000000 DDATA0 0x00000001 DDATA0BIG 0x00000002 QDATA0 0x00000003 DMA1MODE DMA1 Read Mode 24 2 read-write FULL Target register is fully read/written during every DMA transaction 0x00000000 LENLIMIT Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + 1 bytes + necessary zero padding is read. Zero padding is automatically added when writing. 0x00000001 FULLBYTE Target register is fully read/written during every DMA transaction. Bytewise DMA. 0x00000002 LENLIMITBYTE Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + 1 bytes + necessary zero padding is read. Bytewise DMA. Zero padding is automatically added when writing. 0x00000003 DMA1RSEL DATA0 DMA Unaligned Read Register Select 28 2 read-write DATA1 0x00000000 DDATA1 0x00000001 QDATA1 0x00000002 QDATA1BIG 0x00000003 COMBDMA0WEREQ Combined Data0 Write DMA Request 31 1 read-write WAC Wide Arithmetic Configuration 0x004 32 read-write 0x00000000 0x00000F1F MODULUS Modular Operation Modulus 0 4 read-write BIN256 Generic modulus. p = 2^256 0x00000000 BIN128 Generic modulus. p = 2^128 0x00000001 ECCBIN233P Modulus for B-233 and K-233 ECC curves. p(t) = t^233 + t^74 + 1 0x00000002 ECCBIN163P Modulus for B-163 and K-163 ECC curves. p(t) = t^163 + t^7 + t^6 + t^3 + 1 0x00000003 GCMBIN128 Modulus for GCM. P(t) = t^128 + t^7 + t^2 + t + 1 0x00000004 ECCPRIME256P Modulus for P-256 ECC curve. p = 2^256 - 2^224 + 2^192 + 2^96 - 1 0x00000005 ECCPRIME224P Modulus for P-224 ECC curve. p = 2^224 - 2^96 - 1 0x00000006 ECCPRIME192P Modulus for P-192 ECC curve. p = 2^192 - 2^64 - 1 0x00000007 ECCBIN233N P modulus for B-233 ECC curve 0x00000008 ECCBIN233KN P modulus for K-233 ECC curve 0x00000009 ECCBIN163N P modulus for B-163 ECC curve 0x0000000A ECCBIN163KN P modulus for K-163 ECC curve 0x0000000B ECCPRIME256N P modulus for P-256 ECC curve 0x0000000C ECCPRIME224N P modulus for P-224 ECC curve 0x0000000D ECCPRIME192N P modulus for P-192 ECC curve 0x0000000E MODOP Modular Operation Field Type 4 1 read-write MULWIDTH Multiply Width 8 2 read-write MUL256 Multiply 256 bits 0x00000000 MUL128 Multiply 128 bits 0x00000001 MULMOD Same number of bits as specified by MODULUS 0x00000002 RESULTWIDTH Result Width 10 2 read-write 256BIT Results have 256 bits 0x00000000 128BIT Results have 128 bits 0x00000001 260BIT Results have 260 bits. Upper bits of result can be read through DDATA0MSBS in CRYPTO_STATUS 0x00000002 CMD Command Register 0x008 32 read-write 0x00000000 0x00000EFF INSTR Execute Instruction 0 8 read-write SEQSTART Encryption/Decryption SEQUENCE Start 9 1 write-only SEQSTOP Sequence Stop 10 1 write-only SEQSTEP Sequence Step 11 1 write-only STATUS Status Register 0x010 32 read-only 0x00000000 0x00000007 SEQRUNNING AES SEQUENCE Running 0 1 read-only INSTRRUNNING Action is Active 1 1 read-only DMAACTIVE DMA Action is Active 2 1 read-only DSTATUS Data Status Register 0x014 32 read-only 0x00000000 0x011F0F0F DATA0ZERO Data 0 Zero 0 4 read-only ZERO0TO31 In DATA0 bits 0 to 31 are all zero. 0x00000001 ZERO32TO63 In DATA0 bits 32 to 63 are all zero. 0x00000002 ZERO64TO95 In DATA0 bits 64 to 95 are all zero. 0x00000004 ZERO96TO127 In DATA0 bits 96 to 127 are all zero. 0x00000008 DDATA0LSBS LSBs in DDATA0 8 4 read-only DDATA0MSBS MSB in DDATA0 16 4 read-only DDATA1MSB MSB in DDATA1 20 1 read-only CARRY Carry From Arithmetic Operation 24 1 read-only CSTATUS Control Status Register 0x018 32 read-only 0x00000201 0x01F30707 V0 Selected ALU Operand 0 0 3 read-only DDATA0 0x00000000 DDATA1 0x00000001 DDATA2 0x00000002 DDATA3 0x00000003 DDATA4 0x00000004 DATA0 0x00000005 DATA1 0x00000006 DATA2 0x00000007 V1 Selected ALU Operand 1 8 3 read-only DDATA0 0x00000000 DDATA1 0x00000001 DDATA2 0x00000002 DDATA3 0x00000003 DDATA4 0x00000004 DATA0 0x00000005 DATA1 0x00000006 DATA2 0x00000007 SEQPART Sequence Part 16 1 read-only SEQSKIP Sequence Skip Next Instruction 17 1 read-only SEQIP Sequence Next Instruction Pointer 20 5 read-only KEY KEY Register Access 0x020 32 read-write 0x00000000 0xFFFFFFFF modifyExternal KEY Key Access 0 32 read-write KEYBUF KEY Buffer Register Access 0x024 32 read-write 0x00000000 0xFFFFFFFF modifyExternal KEYBUF Key Buffer Access 0 32 read-write SEQCTRL Sequence Control 0x030 32 read-write 0x00000000 0xBF303FFF LENGTHA Buffer Length a in Bytes 0 14 read-write BLOCKSIZE Size of Data Blocks 20 2 read-write 16BYTES A block is 16 bytes long 0x00000000 32BYTES A block is 32 bytes long 0x00000001 64BYTES A block is 64 bytes long 0x00000002 DMA0SKIP DMA0 Skip 24 2 read-write DMA1SKIP DMA1 Skip 26 2 read-write DMA0PRESA DMA0 Preserve a 28 1 read-write DMA1PRESA DMA1 Preserve a 29 1 read-write HALT Halt Sequence 31 1 read-write SEQCTRLB Sequence Control B 0x034 32 read-write 0x00000000 0x30003FFF LENGTHB Buffer Length B in Bytes 0 14 read-write DMA0PRESB DMA0 Preserve B 28 1 read-write DMA1PRESB DMA1 Preserve B 29 1 read-write IF AES Interrupt Flags 0x040 32 read-only 0x00000000 0x00000003 INSTRDONE Instruction Done 0 1 read-only SEQDONE Sequence Done 1 1 read-only IFS Interrupt Flag Set Register 0x044 32 write-only 0x00000000 0x00000003 INSTRDONE Set INSTRDONE Interrupt Flag 0 1 write-only SEQDONE Set SEQDONE Interrupt Flag 1 1 write-only IFC Interrupt Flag Clear Register 0x048 32 write-only 0x00000000 0x00000003 INSTRDONE Clear INSTRDONE Interrupt Flag 0 1 write-only SEQDONE Clear SEQDONE Interrupt Flag 1 1 write-only IEN Interrupt Enable Register 0x04C 32 read-write 0x00000000 0x00000003 INSTRDONE INSTRDONE Interrupt Enable 0 1 read-write SEQDONE SEQDONE Interrupt Enable 1 1 read-write SEQ0 Sequence Register 0 0x050 32 read-write 0x00000000 0xFFFFFFFF INSTR0 Sequence Instruction 0 0 8 read-write INSTR1 Sequence Instruction 1 8 8 read-write INSTR2 Sequence Instruction 2 16 8 read-write INSTR3 Sequence Instruction 3 24 8 read-write SEQ1 Sequence Register 1 0x054 32 read-write 0x00000000 0xFFFFFFFF INSTR4 Sequence Instruction 4 0 8 read-write INSTR5 Sequence Instruction 5 8 8 read-write INSTR6 Sequence Instruction 6 16 8 read-write INSTR7 Sequence Instruction 7 24 8 read-write SEQ2 Sequence Register 2 0x058 32 read-write 0x00000000 0xFFFFFFFF INSTR8 Sequence Instruction 8 0 8 read-write INSTR9 Sequence Instruction 9 8 8 read-write INSTR10 Sequence Instruction 10 16 8 read-write INSTR11 Sequence Instruction 11 24 8 read-write SEQ3 Sequence Register 3 0x05C 32 read-write 0x00000000 0xFFFFFFFF INSTR12 Sequence Instruction 12 0 8 read-write INSTR13 Sequence Instruction 13 8 8 read-write INSTR14 Sequence Instruction 14 16 8 read-write INSTR15 Sequence Instruction 15 24 8 read-write SEQ4 Sequence Register 4 0x060 32 read-write 0x00000000 0xFFFFFFFF INSTR16 Sequence Instruction 16 0 8 read-write INSTR17 Sequence Instruction 17 8 8 read-write INSTR18 Sequence Instruction 18 16 8 read-write INSTR19 Sequence Instruction 19 24 8 read-write DATA0 DATA0 Register Access 0x080 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DATA0 Data 0 Access 0 32 read-write DATA1 DATA1 Register Access 0x084 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DATA1 Data 1 Access 0 32 read-write DATA2 DATA2 Register Access 0x088 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DATA2 Data 2 Access 0 32 read-write DATA3 DATA3 Register Access 0x08C 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DATA3 Data 3 Access 0 32 read-write DATA0XOR DATA0XOR Register Access 0x0A0 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DATA0XOR XOR Data 0 Access 0 32 read-write DATA0BYTE DATA0 Register Byte Access 0x0B0 32 read-write 0x00000000 0x000000FF modifyExternal DATA0BYTE Data 0 Byte Access 0 8 read-write DATA1BYTE DATA1 Register Byte Access 0x0B4 32 read-write 0x00000000 0x000000FF modifyExternal DATA1BYTE Data 1 Byte Access 0 8 read-write DATA0XORBYTE DATA0 Register Byte XOR Access 0x0BC 32 read-write 0x00000000 0x000000FF modifyExternal DATA0XORBYTE Data 0 XOR Byte Access 0 8 read-write DATA0BYTE12 DATA0 Register Byte 12 Access 0x0C0 32 read-write 0x00000000 0x000000FF DATA0BYTE12 Data 0 Byte 12 Access 0 8 read-write DATA0BYTE13 DATA0 Register Byte 13 Access 0x0C4 32 read-write 0x00000000 0x000000FF DATA0BYTE13 Data 0 Byte 13 Access 0 8 read-write DATA0BYTE14 DATA0 Register Byte 14 Access 0x0C8 32 read-write 0x00000000 0x000000FF DATA0BYTE14 Data 0 Byte 14 Access 0 8 read-write DATA0BYTE15 DATA0 Register Byte 15 Access 0x0CC 32 read-write 0x00000000 0x000000FF DATA0BYTE15 Data 0 Byte 15 Access 0 8 read-write DDATA0 DDATA0 Register Access 0x100 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DDATA0 Double Data 0 Access 0 32 read-write DDATA1 DDATA1 Register Access 0x104 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DDATA1 Double Data 0 Access 0 32 read-write DDATA2 DDATA2 Register Access 0x108 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DDATA2 Double Data 0 Access 0 32 read-write DDATA3 DDATA3 Register Access 0x10C 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DDATA3 Double Data 0 Access 0 32 read-write DDATA4 DDATA4 Register Access 0x110 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DDATA4 Double Data 0 Access 0 32 read-write DDATA0BIG DDATA0 Register Big Endian Access 0x130 32 read-write 0x00000000 0xFFFFFFFF modifyExternal DDATA0BIG Double Data 0 Big Endian Access 0 32 read-write DDATA0BYTE DDATA0 Register Byte Access 0x140 32 read-write 0x00000000 0x000000FF modifyExternal DDATA0BYTE Ddata 0 Byte Access 0 8 read-write DDATA1BYTE DDATA1 Register Byte Access 0x144 32 read-write 0x00000000 0x000000FF modifyExternal DDATA1BYTE Ddata 1 Byte Access 0 8 read-write DDATA0BYTE32 DDATA0 Register Byte 32 Access 0x148 32 read-write 0x00000000 0x0000000F DDATA0BYTE32 Ddata 0 Byte 32 Access 0 4 read-write QDATA0 QDATA0 Register Access 0x180 32 read-write 0x00000000 0xFFFFFFFF modifyExternal QDATA0 Quad Data 0 Access 0 32 read-write QDATA1 QDATA1 Register Access 0x184 32 read-write 0x00000000 0xFFFFFFFF modifyExternal QDATA1 Quad Data 1 Access 0 32 read-write QDATA1BIG QDATA1 Register Big Endian Access 0x1A4 32 read-write 0x00000000 0xFFFFFFFF modifyExternal QDATA1BIG Quad Data 1 Big Endian Access 0 32 read-write QDATA0BYTE QDATA0 Register Byte Access 0x1C0 32 read-write 0x00000000 0x000000FF modifyExternal QDATA0BYTE Qdata 0 Byte Access 0 8 read-write QDATA1BYTE QDATA1 Register Byte Access 0x1C4 32 read-write 0x00000000 0x000000FF modifyExternal QDATA1BYTE Qdata 1 Byte Access 0 8 read-write GPIO 5.8.2 GPIO 0x4000A000 0 0x00001000 registers GPIO_EVEN 9 GPIO_ODD 17 PORT_A Port A Registers 0x00 CTRL Port Control Register 0x000 32 read-write 0x00500050 0x10711071 DRIVE_STRENGTH Drive strength setting for port pins not using alternate modes. Value `0` is STRONG (10mA), value `1` is WEAK (1mA) 0 1 read-write SLEW_RATE Slewrate limit for port pins not using alternate modes. Higher values represent faster slewrates 4 3 read-write DIN_DIS Data in Disable 12 1 read-write DRIVE_STRENGTH_ALT Drive strength setting for port pins using alternate modes. Value `0` is STRONG (10mA), value `1` is WEAK (1mA) 16 1 read-write SLEW_RATE_ALT Slewrate limit for port pins using alternate modes. Higher values represent faster slewrates 20 3 read-write DIN_DIS_ALT Alternate Data in Disable 28 1 read-write MODEL Port Pin Mode Low Register 0x004 32 read-write 0x00000000 0xFFFFFFFF MODE0 Pin 0 Mode 0 4 read-write DISABLED Input disabled. Pullup if DOUT is set. 0x00000000 INPUT Input enabled. Filter if DOUT is set 0x00000001 INPUTPULL Input enabled. DOUT determines pull direction 0x00000002 INPUTPULLFILTER Input enabled with filter. DOUT determines pull direction 0x00000003 PUSHPULL Push-pull output 0x00000004 PUSHPULLALT Push-pull using alternate control 0x00000005 WIREDOR Wired-or output 0x00000006 WIREDORPULLDOWN Wired-or output with pull-down 0x00000007 WIREDAND Open-drain output 0x00000008 WIREDANDFILTER Open-drain output with filter 0x00000009 WIREDANDPULLUP Open-drain output with pullup 0x0000000A WIREDANDPULLUPFILTER Open-drain output with filter and pullup 0x0000000B WIREDANDALT Open-drain output using alternate control 0x0000000C WIREDANDALTFILTER Open-drain output using alternate control with filter 0x0000000D WIREDANDALTPULLUP Open-drain output using alternate control with pullup 0x0000000E WIREDANDALTPULLUPFILTER Open-drain output using alternate control with filter and pullup 0x0000000F MODE1 Pin 1 Mode 4 4 read-write MODE2 Pin 2 Mode 8 4 read-write MODE3 Pin 3 Mode 12 4 read-write MODE4 Pin 4 Mode 16 4 read-write MODE5 Pin 5 Mode 20 4 read-write MODE6 Pin 6 Mode 24 4 read-write MODE7 Pin 7 Mode 28 4 read-write MODEH Port Pin Mode High Register 0x008 32 read-write 0x00000000 0xFFFFFFFF MODE8 Pin 8 Mode 0 4 read-write MODE9 Pin 9 Mode 4 4 read-write MODE10 Pin 10 Mode 8 4 read-write MODE11 Pin 11 Mode 12 4 read-write MODE12 Pin 12 Mode 16 4 read-write MODE13 Pin 13 Mode 20 4 read-write MODE14 Pin 14 Mode 24 4 read-write MODE15 Pin 15 Mode 28 4 read-write DOUT Port Data Out Register 0x00C 32 read-write 0x00000000 0x0000FFFF PINS_DOUT Data Out for pins 0:15 0 16 read-write DOUT_TGL Port Data Out Toggle Register. Write bits to 1 to toggle corresponding bits in GPIO_Px_DOUT. Bits written to 0 will have no effect. 0x018 32 write-only 0x00000000 0x0000FFFF PINS_DOUT_TGL Data Out Toggle for pins 0:15 0 16 write-only DIN Port Data in Register 0x01C 32 read-only 0x00000000 0x0000FFFF PINS_DIN Data in for pins 0:15 0 16 read-only PINLOCKN Port Unlocked Pins Register. Shows unlocked pins in the port. To lock pin n, clear bit n. The pin is then locked until reset. 0x020 32 read-write 0x0000FFFF 0x0000FFFF PINS_PINLOCKN Unlocked Pins for pins 0:15 0 16 read-write OVT_DIS Over Voltage Disable for All Modes 0x028 32 read-write 0x00000000 0x0000FFFF PINS_OVT_DIS Disable Over Voltage Capability for pins 0:15 0 16 read-write PORT_B Port B Registers 0x30 PORT_C Port C Registers 0x60 PORT_D Port D Registers 0x90 PORT_E Port E Registers 0xC0 PORT_F Port F Registers 0xF0 EXTIPSELL External Interrupt Port Select Low Register 0x400 32 read-write 0x00000000 0xFFFFFFFF EXTIPSEL0 External Interrupt 0 Port Select 0 4 read-write PORTA Port A group selected for external interrupt 0 0x00000000 PORTB Port B group selected for external interrupt 0 0x00000001 PORTC Port C group selected for external interrupt 0 0x00000002 PORTD Port D group selected for external interrupt 0 0x00000003 PORTF Port F group selected for external interrupt 0 0x00000005 EXTIPSEL1 External Interrupt 1 Port Select 4 4 read-write PORTA Port A group selected for external interrupt 1 0x00000000 PORTB Port B group selected for external interrupt 1 0x00000001 PORTC Port C group selected for external interrupt 1 0x00000002 PORTD Port D group selected for external interrupt 1 0x00000003 PORTF Port F group selected for external interrupt 1 0x00000005 EXTIPSEL2 External Interrupt 2 Port Select 8 4 read-write PORTA Port A group selected for external interrupt 2 0x00000000 PORTB Port B group selected for external interrupt 2 0x00000001 PORTC Port C group selected for external interrupt 2 0x00000002 PORTD Port D group selected for external interrupt 2 0x00000003 PORTF Port F group selected for external interrupt 2 0x00000005 EXTIPSEL3 External Interrupt 3 Port Select 12 4 read-write PORTA Port A group selected for external interrupt 3 0x00000000 PORTB Port B group selected for external interrupt 3 0x00000001 PORTC Port C group selected for external interrupt 3 0x00000002 PORTD Port D group selected for external interrupt 3 0x00000003 PORTF Port F group selected for external interrupt 3 0x00000005 EXTIPSEL4 External Interrupt 4 Port Select 16 4 read-write PORTA Port A group selected for external interrupt 4 0x00000000 PORTB Port B group selected for external interrupt 4 0x00000001 PORTC Port C group selected for external interrupt 4 0x00000002 PORTD Port D group selected for external interrupt 4 0x00000003 PORTF Port F group selected for external interrupt 4 0x00000005 EXTIPSEL5 External Interrupt 5 Port Select 20 4 read-write PORTA Port A group selected for external interrupt 5 0x00000000 PORTB Port B group selected for external interrupt 5 0x00000001 PORTC Port C group selected for external interrupt 5 0x00000002 PORTD Port D group selected for external interrupt 5 0x00000003 PORTF Port F group selected for external interrupt 5 0x00000005 EXTIPSEL6 External Interrupt 6 Port Select 24 4 read-write PORTA Port A group selected for external interrupt 6 0x00000000 PORTB Port B group selected for external interrupt 6 0x00000001 PORTC Port C group selected for external interrupt 6 0x00000002 PORTD Port D group selected for external interrupt 6 0x00000003 PORTF Port F group selected for external interrupt 6 0x00000005 EXTIPSEL7 External Interrupt 7 Port Select 28 4 read-write PORTA Port A group selected for external interrupt 7 0x00000000 PORTB Port B group selected for external interrupt 7 0x00000001 PORTC Port C group selected for external interrupt 7 0x00000002 PORTD Port D group selected for external interrupt 7 0x00000003 PORTF Port F group selected for external interrupt 7 0x00000005 EXTIPSELH External Interrupt Port Select High Register 0x404 32 read-write 0x00000000 0xFFFFFFFF EXTIPSEL8 External Interrupt 8 Port Select 0 4 read-write PORTA Port A group selected for external interrupt 8 0x00000000 PORTB Port B group selected for external interrupt 8 0x00000001 PORTC Port C group selected for external interrupt 8 0x00000002 PORTD Port D group selected for external interrupt 8 0x00000003 PORTF Port F group selected for external interrupt 8 0x00000005 EXTIPSEL9 External Interrupt 9 Port Select 4 4 read-write PORTA Port A group selected for external interrupt 9 0x00000000 PORTB Port B group selected for external interrupt 9 0x00000001 PORTC Port C group selected for external interrupt 9 0x00000002 PORTD Port D group selected for external interrupt 9 0x00000003 PORTF Port F group selected for external interrupt 9 0x00000005 EXTIPSEL10 External Interrupt 10 Port Select 8 4 read-write PORTA Port A group selected for external interrupt 10 0x00000000 PORTB Port B group selected for external interrupt 10 0x00000001 PORTC Port C group selected for external interrupt 10 0x00000002 PORTD Port D group selected for external interrupt 10 0x00000003 PORTF Port F group selected for external interrupt 10 0x00000005 EXTIPSEL11 External Interrupt 11 Port Select 12 4 read-write PORTA Port A group selected for external interrupt 11 0x00000000 PORTB Port B group selected for external interrupt 11 0x00000001 PORTC Port C group selected for external interrupt 11 0x00000002 PORTD Port D group selected for external interrupt 11 0x00000003 PORTF Port F group selected for external interrupt 11 0x00000005 EXTIPSEL12 External Interrupt 12 Port Select 16 4 read-write PORTA Port A group selected for external interrupt 12 0x00000000 PORTB Port B group selected for external interrupt 12 0x00000001 PORTC Port C group selected for external interrupt 12 0x00000002 PORTD Port D group selected for external interrupt 12 0x00000003 PORTF Port F group selected for external interrupt 12 0x00000005 EXTIPSEL13 External Interrupt 13 Port Select 20 4 read-write PORTA Port A group selected for external interrupt 13 0x00000000 PORTB Port B group selected for external interrupt 13 0x00000001 PORTC Port C group selected for external interrupt 13 0x00000002 PORTD Port D group selected for external interrupt 13 0x00000003 PORTF Port F group selected for external interrupt 13 0x00000005 EXTIPSEL14 External Interrupt 14 Port Select 24 4 read-write PORTA Port A group selected for external interrupt 14 0x00000000 PORTB Port B group selected for external interrupt 14 0x00000001 PORTC Port C group selected for external interrupt 14 0x00000002 PORTD Port D group selected for external interrupt 14 0x00000003 PORTF Port F group selected for external interrupt 14 0x00000005 EXTIPSEL15 External Interrupt 15 Port Select 28 4 read-write PORTA Port A group selected for external interrupt 15 0x00000000 PORTB Port B group selected for external interrupt 15 0x00000001 PORTC Port C group selected for external interrupt 15 0x00000002 PORTD Port D group selected for external interrupt 15 0x00000003 PORTF Port F group selected for external interrupt 15 0x00000005 EXTIPINSELL External Interrupt Pin Select Low Register 0x408 32 read-write 0x32103210 0x33333333 EXTIPINSEL0 External Interrupt 0 Pin Select 0 2 read-write PIN0 Pin 0 0x00000000 PIN1 Pin 1 0x00000001 PIN2 Pin 2 0x00000002 PIN3 Pin 3 0x00000003 EXTIPINSEL1 External Interrupt 1 Pin Select 4 2 read-write PIN0 Pin 0 0x00000000 PIN1 Pin 1 0x00000001 PIN2 Pin 2 0x00000002 PIN3 Pin 3 0x00000003 EXTIPINSEL2 External Interrupt 2 Pin Select 8 2 read-write PIN0 Pin 0 0x00000000 PIN1 Pin 1 0x00000001 PIN2 Pin 2 0x00000002 PIN3 Pin 3 0x00000003 EXTIPINSEL3 External Interrupt 3 Pin Select 12 2 read-write PIN0 Pin 0 0x00000000 PIN1 Pin 1 0x00000001 PIN2 Pin 2 0x00000002 PIN3 Pin 3 0x00000003 EXTIPINSEL4 External Interrupt 4 Pin Select 16 2 read-write PIN4 Pin 4 0x00000000 PIN5 Pin 5 0x00000001 PIN6 Pin 6 0x00000002 PIN7 Pin 7 0x00000003 EXTIPINSEL5 External Interrupt 5 Pin Select 20 2 read-write PIN4 Pin 4 0x00000000 PIN5 Pin 5 0x00000001 PIN6 Pin 6 0x00000002 PIN7 Pin 7 0x00000003 EXTIPINSEL6 External Interrupt 6 Pin Select 24 2 read-write PIN4 Pin 4 0x00000000 PIN5 Pin 5 0x00000001 PIN6 Pin 6 0x00000002 PIN7 Pin 7 0x00000003 EXTIPINSEL7 External Interrupt 7 Pin Select 28 2 read-write PIN4 Pin 4 0x00000000 PIN5 Pin 5 0x00000001 PIN6 Pin 6 0x00000002 PIN7 Pin 7 0x00000003 EXTIPINSELH External Interrupt Pin Select High Register 0x40C 32 read-write 0x32103210 0x33333333 EXTIPINSEL8 External Interrupt 8 Pin Select 0 2 read-write PIN8 Pin 8 0x00000000 PIN9 Pin 9 0x00000001 PIN10 Pin 10 0x00000002 PIN11 Pin 11 0x00000003 EXTIPINSEL9 External Interrupt 9 Pin Select 4 2 read-write PIN8 Pin 8 0x00000000 PIN9 Pin 9 0x00000001 PIN10 Pin 10 0x00000002 PIN11 Pin 11 0x00000003 EXTIPINSEL10 External Interrupt 10 Pin Select 8 2 read-write PIN8 Pin 8 0x00000000 PIN9 Pin 9 0x00000001 PIN10 Pin 10 0x00000002 PIN11 Pin 11 0x00000003 EXTIPINSEL11 External Interrupt 11 Pin Select 12 2 read-write PIN8 Pin 8 0x00000000 PIN9 Pin 9 0x00000001 PIN10 Pin 10 0x00000002 PIN11 Pin 11 0x00000003 EXTIPINSEL12 External Interrupt 12 Pin Select 16 2 read-write PIN12 Pin 12 0x00000000 PIN13 Pin 13 0x00000001 PIN14 Pin 14 0x00000002 PIN15 Pin 15 0x00000003 EXTIPINSEL13 External Interrupt 13 Pin Select 20 2 read-write PIN12 Pin 12 0x00000000 PIN13 Pin 13 0x00000001 PIN14 Pin 14 0x00000002 PIN15 Pin 15 0x00000003 EXTIPINSEL14 External Interrupt 14 Pin Select 24 2 read-write PIN12 Pin 12 0x00000000 PIN13 Pin 13 0x00000001 PIN14 Pin 14 0x00000002 PIN15 Pin 15 0x00000003 EXTIPINSEL15 External Interrupt 15 Pin Select 28 2 read-write PIN12 Pin 12 0x00000000 PIN13 Pin 13 0x00000001 PIN14 Pin 14 0x00000002 PIN15 Pin 15 0x00000003 EXTIRISE External Interrupt Rising Edge Trigger Register 0x410 32 read-write 0x00000000 0x0000FFFF EXTIRISE0 Pin 0 Rising Edge Enable 0 1 read-write EXTIRISE1 Pin 1 Rising Edge Enable 1 1 read-write EXTIRISE2 Pin 2 Rising Edge Enable 2 1 read-write EXTIRISE3 Pin 3 Rising Edge Enable 3 1 read-write EXTIRISE4 Pin 4 Rising Edge Enable 4 1 read-write EXTIRISE5 Pin 5 Rising Edge Enable 5 1 read-write EXTIRISE6 Pin 6 Rising Edge Enable 6 1 read-write EXTIRISE7 Pin 7 Rising Edge Enable 7 1 read-write EXTIRISE8 Pin 8 Rising Edge Enable 8 1 read-write EXTIRISE9 Pin 9 Rising Edge Enable 9 1 read-write EXTIRISE10 Pin 10 Rising Edge Enable 10 1 read-write EXTIRISE11 Pin 11 Rising Edge Enable 11 1 read-write EXTIRISE12 Pin 12 Rising Edge Enable 12 1 read-write EXTIRISE13 Pin 13 Rising Edge Enable 13 1 read-write EXTIRISE14 Pin 14 Rising Edge Enable 14 1 read-write EXTIRISE15 Pin 15 Rising Edge Enable 15 1 read-write EXTIFALL External Interrupt Falling Edge Trigger Register 0x414 32 read-write 0x00000000 0x0000FFFF EXTIFALL0 Pin 0 Falling Edge 0 1 read-write EXTIFALL1 Pin 1 Falling Edge 1 1 read-write EXTIFALL2 Pin 2 Falling Edge 2 1 read-write EXTIFALL3 Pin 3 Falling Edge 3 1 read-write EXTIFALL4 Pin 4 Falling Edge 4 1 read-write EXTIFALL5 Pin 5 Falling Edge 5 1 read-write EXTIFALL6 Pin 6 Falling Edge 6 1 read-write EXTIFALL7 Pin 7 Falling Edge 7 1 read-write EXTIFALL8 Pin 8 Falling Edge 8 1 read-write EXTIFALL9 Pin 9 Falling Edge 9 1 read-write EXTIFALL10 Pin 10 Falling Edge 10 1 read-write EXTIFALL11 Pin 11 Falling Edge 11 1 read-write EXTIFALL12 Pin 12 Falling Edge 12 1 read-write EXTIFALL13 Pin 13 Falling Edge 13 1 read-write EXTIFALL14 Pin 14 Falling Edge 14 1 read-write EXTIFALL15 Pin 15 Falling Edge 15 1 read-write EXTILEVEL External Interrupt Level Register 0x418 32 read-write 0x00000000 0x13130000 EM4WU0 EM4 Wake Up Level for EM4WU0 Pin 16 1 read-write EM4WU1 EM4 Wake Up Level for EM4WU1 Pin 17 1 read-write EM4WU4 EM4 Wake Up Level for EM4WU4 Pin 20 1 read-write EM4WU8 EM4 Wake Up Level for EM4WU8 Pin 24 1 read-write EM4WU9 EM4 Wake Up Level for EM4WU9 Pin 25 1 read-write EM4WU12 EM4 Wake Up Level for EM4WU12 Pin 28 1 read-write IF Interrupt Flag Register 0x41C 32 read-only 0x00000000 0xFFFFFFFF EXT External Pin Interrupt Flag 0 16 read-only EM4WU EM4 Wake Up Pin Interrupt Flag 16 16 read-only IFS Interrupt Flag Set Register 0x420 32 write-only 0x00000000 0xFFFFFFFF EXT Set EXT Interrupt Flag 0 16 write-only EM4WU Set EM4WU Interrupt Flag 16 16 write-only IFC Interrupt Flag Clear Register 0x424 32 write-only 0x00000000 0xFFFFFFFF EXT Clear EXT Interrupt Flag 0 16 write-only EM4WU Clear EM4WU Interrupt Flag 16 16 write-only IEN Interrupt Enable Register 0x428 32 read-write 0x00000000 0xFFFFFFFF EXT EXT Interrupt Enable 0 16 read-write EM4WU EM4WU Interrupt Enable 16 16 read-write EM4WUEN EM4 Wake Up Enable Register 0x42C 32 read-write 0x00000000 0xFFFF0000 EM4WUEN EM4 Wake Up Enable 16 16 read-write ROUTEPEN I/O Routing Pin Enable Register 0x440 32 read-write 0x0000000F 0x0000001F SWCLKTCKPEN Serial Wire Clock and JTAG Test Clock Pin Enable 0 1 read-write SWDIOTMSPEN Serial Wire Data and JTAG Test Mode Select Pin Enable 1 1 read-write TDOPEN JTAG Test Debug Output Pin Enable 2 1 read-write TDIPEN JTAG Test Debug Input Pin Enable 3 1 read-write SWVPEN Serial Wire Viewer Output Pin Enable 4 1 read-write ROUTELOC0 I/O Routing Location Register 0x444 32 read-write 0x00000000 0x0000003F SWVLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 INSENSE Input Sense Register 0x450 32 read-write 0x00000003 0x00000003 INT Interrupt Sense Enable 0 1 read-write EM4WU EM4WU Interrupt Sense Enable 1 1 read-write LOCK Configuration Lock Register 0x454 32 read-write 0x00000000 0x0000FFFF LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 PRS 5.8.2 PRS 0x400E6000 0 0x00000400 registers SWPULSE Software Pulse Register 0x000 32 write-only 0x00000000 0x00000FFF CH0PULSE Channel 0 Pulse Generation 0 1 write-only CH1PULSE Channel 1 Pulse Generation 1 1 write-only CH2PULSE Channel 2 Pulse Generation 2 1 write-only CH3PULSE Channel 3 Pulse Generation 3 1 write-only CH4PULSE Channel 4 Pulse Generation 4 1 write-only CH5PULSE Channel 5 Pulse Generation 5 1 write-only CH6PULSE Channel 6 Pulse Generation 6 1 write-only CH7PULSE Channel 7 Pulse Generation 7 1 write-only CH8PULSE Channel 8 Pulse Generation 8 1 write-only CH9PULSE Channel 9 Pulse Generation 9 1 write-only CH10PULSE Channel 10 Pulse Generation 10 1 write-only CH11PULSE Channel 11 Pulse Generation 11 1 write-only SWLEVEL Software Level Register 0x004 32 read-write 0x00000000 0x00000FFF CH0LEVEL Channel 0 Software Level 0 1 read-write CH1LEVEL Channel 1 Software Level 1 1 read-write CH2LEVEL Channel 2 Software Level 2 1 read-write CH3LEVEL Channel 3 Software Level 3 1 read-write CH4LEVEL Channel 4 Software Level 4 1 read-write CH5LEVEL Channel 5 Software Level 5 1 read-write CH6LEVEL Channel 6 Software Level 6 1 read-write CH7LEVEL Channel 7 Software Level 7 1 read-write CH8LEVEL Channel 8 Software Level 8 1 read-write CH9LEVEL Channel 9 Software Level 9 1 read-write CH10LEVEL Channel 10 Software Level 10 1 read-write CH11LEVEL Channel 11 Software Level 11 1 read-write ROUTEPEN I/O Routing Pin Enable Register 0x008 32 read-write 0x00000000 0x00000FFF CH0PEN CH0 Pin Enable 0 1 read-write CH1PEN CH1 Pin Enable 1 1 read-write CH2PEN CH2 Pin Enable 2 1 read-write CH3PEN CH3 Pin Enable 3 1 read-write CH4PEN CH4 Pin Enable 4 1 read-write CH5PEN CH5 Pin Enable 5 1 read-write CH6PEN CH6 Pin Enable 6 1 read-write CH7PEN CH7 Pin Enable 7 1 read-write CH8PEN CH8 Pin Enable 8 1 read-write CH9PEN CH9 Pin Enable 9 1 read-write CH10PEN CH10 Pin Enable 10 1 read-write CH11PEN CH11 Pin Enable 11 1 read-write ROUTELOC0 I/O Routing Location Register 0x010 32 read-write 0x00000000 0x3F3F3F3F CH0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D CH1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CH2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 CH3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E ROUTELOC1 I/O Routing Location Register 0x014 32 read-write 0x00000000 0x3F3F3F3F CH4LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 CH5LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 CH6LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 CH7LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A ROUTELOC2 I/O Routing Location Register 0x018 32 read-write 0x00000000 0x3F3F3F3F CH8LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A CH9LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 CH10LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 CH11LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 CTRL Control Register 0x020 32 read-write 0x00000000 0x0000001F SEVONPRS Set Event on PRS 0 1 read-write SEVONPRSSEL SEVONPRS PRS Channel Select 1 4 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B DMAREQ0 DMA Request 0 Register 0x024 32 read-write 0x00000000 0x000003C0 PRSSEL DMA Request 0 PRS Channel Select 6 4 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B DMAREQ1 DMA Request 1 Register 0x028 32 read-write 0x00000000 0x000003C0 PRSSEL DMA Request 1 PRS Channel Select 6 4 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B PEEK PRS Channel Values 0x030 32 read-only 0x00000000 0x00000FFF CH0VAL Channel 0 Current Value 0 1 read-only CH1VAL Channel 1 Current Value 1 1 read-only CH2VAL Channel 2 Current Value 2 1 read-only CH3VAL Channel 3 Current Value 3 1 read-only CH4VAL Channel 4 Current Value 4 1 read-only CH5VAL Channel 5 Current Value 5 1 read-only CH6VAL Channel 6 Current Value 6 1 read-only CH7VAL Channel 7 Current Value 7 1 read-only CH8VAL Channel 8 Current Value 8 1 read-only CH9VAL Channel 9 Current Value 9 1 read-only CH10VAL Channel 10 Current Value 10 1 read-only CH11VAL Channel 11 Current Value 11 1 read-only CH0_CTRL Channel Control Register 0x040 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH1_CTRL Channel Control Register 0x044 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH2_CTRL Channel Control Register 0x048 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH3_CTRL Channel Control Register 0x04C 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH4_CTRL Channel Control Register 0x050 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH5_CTRL Channel Control Register 0x054 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH6_CTRL Channel Control Register 0x058 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH7_CTRL Channel Control Register 0x05C 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH8_CTRL Channel Control Register 0x060 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH9_CTRL Channel Control Register 0x064 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH10_CTRL Channel Control Register 0x068 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write CH11_CTRL Channel Control Register 0x06C 32 read-write 0x00000000 0x5E307F07 SIGSEL Signal Select 0 3 read-write SOURCESEL Source Select 8 7 read-write NONE No source selected 0x00000000 PRSL Peripheral Reflex System 0x00000001 PRSH Peripheral Reflex System 0x00000002 ACMP0 Analog Comparator 0 0x00000006 ACMP1 Analog Comparator 1 0x00000007 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x00000010 USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x00000011 TIMER0 Timer 0 0x0000001C TIMER1 Timer 1 0x0000001D RTCC Real-Time Counter and Calendar 0x00000029 GPIOL General purpose Input/Output 0x00000030 GPIOH General purpose Input/Output 0x00000031 LETIMER0 Low Energy Timer 0 0x00000034 PCNT0 Pulse Counter 0 0x00000036 CRYOTIMER CRYOTIMER 0x0000003C CMU Clock Management Unit 0x0000003D CM4 0x00000043 EDSEL Edge Detect Select 20 2 read-write OFF Signal is left as it is 0x00000000 POSEDGE A one HFCLK cycle pulse is generated for every positive edge of the incoming signal 0x00000001 NEGEDGE A one HFCLK clock cycle pulse is generated for every negative edge of the incoming signal 0x00000002 BOTHEDGES A one HFCLK clock cycle pulse is generated for every edge of the incoming signal 0x00000003 STRETCH Stretch Channel Output 25 1 read-write INV Invert Channel 26 1 read-write ORPREV Or Previous 27 1 read-write ANDNEXT And Next 28 1 read-write ASYNCREFL Asynchronous Reflex 30 1 read-write LDMA 5.8.2 Linked Direct Memory Access 0x400E2000 0 0x00001000 registers LDMA 8 CTRL DMA Control Register 0x000 32 read-write 0x07000000 0x0700FFFF SYNCPRSSETEN Synchronization PRS Set Enable 0 8 read-write SYNCPRSCLREN Synchronization PRS Clear Enable 8 8 read-write NUMFIXED Number of Fixed Priority Channels 24 3 read-write STATUS DMA Status Register 0x004 32 read-only 0x08100000 0x1F1F073B ANYBUSY Any DMA Channel Busy 0 1 read-only ANYREQ Any DMA Channel Request Pending 1 1 read-only CHGRANT Granted Channel Number 3 3 read-only CHERROR Errant Channel Number 8 3 read-only FIFOLEVEL FIFO Level 16 5 read-only CHNUM Number of Channels 24 5 read-only SYNC DMA Synchronization Trigger Register (Single-Cycle RMW) 0x008 32 read-write 0x00000000 0x000000FF SYNCTRIG Synchronization Trigger 0 8 read-write CHEN DMA Channel Enable Register (Single-Cycle RMW) 0x020 32 read-write 0x00000000 0x000000FF CHEN Channel Enables 0 8 read-write CHBUSY DMA Channel Busy Register 0x024 32 read-only 0x00000000 0x000000FF BUSY Channels Busy 0 8 read-only CHDONE DMA Channel Linking Done Register (Single-Cycle RMW) 0x028 32 read-write 0x00000000 0x000000FF CHDONE DMA Channel Linking or Done 0 8 read-write DBGHALT DMA Channel Debug Halt Register 0x02C 32 read-write 0x00000000 0x000000FF DBGHALT DMA Debug Halt 0 8 read-write SWREQ DMA Channel Software Transfer Request Register 0x030 32 write-only 0x00000000 0x000000FF SWREQ Software Transfer Requests 0 8 write-only REQDIS DMA Channel Request Disable Register 0x034 32 read-write 0x00000000 0x000000FF REQDIS DMA Request Disables 0 8 read-write REQPEND DMA Channel Requests Pending Register 0x038 32 read-only 0x00000000 0x000000FF REQPEND DMA Requests Pending 0 8 read-only LINKLOAD DMA Channel Link Load Register 0x03C 32 write-only 0x00000000 0x000000FF LINKLOAD DMA Link Loads 0 8 write-only REQCLEAR DMA Channel Request Clear Register 0x040 32 write-only 0x00000000 0x000000FF REQCLEAR DMA Request Clear 0 8 write-only IF Interrupt Flag Register 0x060 32 read-only 0x00000000 0x800000FF DONE DMA Structure Operation Done Interrupt Flag 0 8 read-only ERROR Transfer Error Interrupt Flag 31 1 read-only IFS Interrupt Flag Set Register 0x064 32 write-only 0x00000000 0x800000FF DONE Set DONE Interrupt Flag 0 8 write-only ERROR Set ERROR Interrupt Flag 31 1 write-only IFC Interrupt Flag Clear Register 0x068 32 write-only 0x00000000 0x800000FF DONE Clear DONE Interrupt Flag 0 8 write-only ERROR Clear ERROR Interrupt Flag 31 1 write-only IEN Interrupt Enable Register 0x06C 32 read-write 0x00000000 0x800000FF DONE DONE Interrupt Enable 0 8 read-write ERROR ERROR Interrupt Enable 31 1 read-write CH0_REQSEL Channel Peripheral Request Select Register 0x080 32 read-write 0x00000000 0x003F000F SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D LEUART0 Low Energy UART 0 0x00000010 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 MSC Memory System Controller 0x00000030 CRYPTO Advanced Encryption Standard Accelerator 0x00000031 CH0_CFG Channel Configuration Register 0x084 32 read-write 0x00000000 0x00330000 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 SRCINCSIGN Source Address Increment Sign 20 1 read-write DSTINCSIGN Destination Address Increment Sign 21 1 read-write CH0_LOOP Channel Loop Counter Register 0x088 32 read-write 0x00000000 0x000000FF LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH0_CTRL Channel Descriptor Control Word Register 0x08C 32 read-write 0x00000000 0xFFFFFFFB STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 STRUCTREQ Structure DMA Transfer Request 3 1 write-only XFERCNT DMA Unit Data Transfer Count 4 11 read-write BYTESWAP Endian Byte Swap 15 1 read-write BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write IGNORESREQ Ignore Sreq 23 1 read-write SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only DSTMODE Destination Addressing Mode 31 1 read-only CH0_SRC Channel Descriptor Source Data Address Register 0x090 32 read-write 0x00000000 0xFFFFFFFF SRCADDR Source Data Address 0 32 read-write CH0_DST Channel Descriptor Destination Data Address Register 0x094 32 read-write 0x00000000 0xFFFFFFFF DSTADDR Destination Data Address 0 32 read-write CH0_LINK Channel Descriptor Link Structure Address Register 0x098 32 read-write 0x00000000 0xFFFFFFFF LINKMODE Link Structure Addressing Mode 0 1 read-only LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write CH1_REQSEL Channel Peripheral Request Select Register 0x0B0 32 read-write 0x00000000 0x003F000F SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D LEUART0 Low Energy UART 0 0x00000010 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 MSC Memory System Controller 0x00000030 CRYPTO Advanced Encryption Standard Accelerator 0x00000031 CH1_CFG Channel Configuration Register 0x0B4 32 read-write 0x00000000 0x00330000 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 SRCINCSIGN Source Address Increment Sign 20 1 read-write DSTINCSIGN Destination Address Increment Sign 21 1 read-write CH1_LOOP Channel Loop Counter Register 0x0B8 32 read-write 0x00000000 0x000000FF LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH1_CTRL Channel Descriptor Control Word Register 0x0BC 32 read-write 0x00000000 0xFFFFFFFB STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 STRUCTREQ Structure DMA Transfer Request 3 1 write-only XFERCNT DMA Unit Data Transfer Count 4 11 read-write BYTESWAP Endian Byte Swap 15 1 read-write BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write IGNORESREQ Ignore Sreq 23 1 read-write SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only DSTMODE Destination Addressing Mode 31 1 read-only CH1_SRC Channel Descriptor Source Data Address Register 0x0C0 32 read-write 0x00000000 0xFFFFFFFF SRCADDR Source Data Address 0 32 read-write CH1_DST Channel Descriptor Destination Data Address Register 0x0C4 32 read-write 0x00000000 0xFFFFFFFF DSTADDR Destination Data Address 0 32 read-write CH1_LINK Channel Descriptor Link Structure Address Register 0x0C8 32 read-write 0x00000000 0xFFFFFFFF LINKMODE Link Structure Addressing Mode 0 1 read-only LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write CH2_REQSEL Channel Peripheral Request Select Register 0x0E0 32 read-write 0x00000000 0x003F000F SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D LEUART0 Low Energy UART 0 0x00000010 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 MSC Memory System Controller 0x00000030 CRYPTO Advanced Encryption Standard Accelerator 0x00000031 CH2_CFG Channel Configuration Register 0x0E4 32 read-write 0x00000000 0x00330000 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 SRCINCSIGN Source Address Increment Sign 20 1 read-write DSTINCSIGN Destination Address Increment Sign 21 1 read-write CH2_LOOP Channel Loop Counter Register 0x0E8 32 read-write 0x00000000 0x000000FF LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH2_CTRL Channel Descriptor Control Word Register 0x0EC 32 read-write 0x00000000 0xFFFFFFFB STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 STRUCTREQ Structure DMA Transfer Request 3 1 write-only XFERCNT DMA Unit Data Transfer Count 4 11 read-write BYTESWAP Endian Byte Swap 15 1 read-write BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write IGNORESREQ Ignore Sreq 23 1 read-write SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only DSTMODE Destination Addressing Mode 31 1 read-only CH2_SRC Channel Descriptor Source Data Address Register 0x0F0 32 read-write 0x00000000 0xFFFFFFFF SRCADDR Source Data Address 0 32 read-write CH2_DST Channel Descriptor Destination Data Address Register 0x0F4 32 read-write 0x00000000 0xFFFFFFFF DSTADDR Destination Data Address 0 32 read-write CH2_LINK Channel Descriptor Link Structure Address Register 0x0F8 32 read-write 0x00000000 0xFFFFFFFF LINKMODE Link Structure Addressing Mode 0 1 read-only LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write CH3_REQSEL Channel Peripheral Request Select Register 0x110 32 read-write 0x00000000 0x003F000F SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D LEUART0 Low Energy UART 0 0x00000010 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 MSC Memory System Controller 0x00000030 CRYPTO Advanced Encryption Standard Accelerator 0x00000031 CH3_CFG Channel Configuration Register 0x114 32 read-write 0x00000000 0x00330000 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 SRCINCSIGN Source Address Increment Sign 20 1 read-write DSTINCSIGN Destination Address Increment Sign 21 1 read-write CH3_LOOP Channel Loop Counter Register 0x118 32 read-write 0x00000000 0x000000FF LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH3_CTRL Channel Descriptor Control Word Register 0x11C 32 read-write 0x00000000 0xFFFFFFFB STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 STRUCTREQ Structure DMA Transfer Request 3 1 write-only XFERCNT DMA Unit Data Transfer Count 4 11 read-write BYTESWAP Endian Byte Swap 15 1 read-write BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write IGNORESREQ Ignore Sreq 23 1 read-write SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only DSTMODE Destination Addressing Mode 31 1 read-only CH3_SRC Channel Descriptor Source Data Address Register 0x120 32 read-write 0x00000000 0xFFFFFFFF SRCADDR Source Data Address 0 32 read-write CH3_DST Channel Descriptor Destination Data Address Register 0x124 32 read-write 0x00000000 0xFFFFFFFF DSTADDR Destination Data Address 0 32 read-write CH3_LINK Channel Descriptor Link Structure Address Register 0x128 32 read-write 0x00000000 0xFFFFFFFF LINKMODE Link Structure Addressing Mode 0 1 read-only LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write CH4_REQSEL Channel Peripheral Request Select Register 0x140 32 read-write 0x00000000 0x003F000F SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D LEUART0 Low Energy UART 0 0x00000010 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 MSC Memory System Controller 0x00000030 CRYPTO Advanced Encryption Standard Accelerator 0x00000031 CH4_CFG Channel Configuration Register 0x144 32 read-write 0x00000000 0x00330000 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 SRCINCSIGN Source Address Increment Sign 20 1 read-write DSTINCSIGN Destination Address Increment Sign 21 1 read-write CH4_LOOP Channel Loop Counter Register 0x148 32 read-write 0x00000000 0x000000FF LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH4_CTRL Channel Descriptor Control Word Register 0x14C 32 read-write 0x00000000 0xFFFFFFFB STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 STRUCTREQ Structure DMA Transfer Request 3 1 write-only XFERCNT DMA Unit Data Transfer Count 4 11 read-write BYTESWAP Endian Byte Swap 15 1 read-write BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write IGNORESREQ Ignore Sreq 23 1 read-write SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only DSTMODE Destination Addressing Mode 31 1 read-only CH4_SRC Channel Descriptor Source Data Address Register 0x150 32 read-write 0x00000000 0xFFFFFFFF SRCADDR Source Data Address 0 32 read-write CH4_DST Channel Descriptor Destination Data Address Register 0x154 32 read-write 0x00000000 0xFFFFFFFF DSTADDR Destination Data Address 0 32 read-write CH4_LINK Channel Descriptor Link Structure Address Register 0x158 32 read-write 0x00000000 0xFFFFFFFF LINKMODE Link Structure Addressing Mode 0 1 read-only LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write CH5_REQSEL Channel Peripheral Request Select Register 0x170 32 read-write 0x00000000 0x003F000F SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D LEUART0 Low Energy UART 0 0x00000010 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 MSC Memory System Controller 0x00000030 CRYPTO Advanced Encryption Standard Accelerator 0x00000031 CH5_CFG Channel Configuration Register 0x174 32 read-write 0x00000000 0x00330000 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 SRCINCSIGN Source Address Increment Sign 20 1 read-write DSTINCSIGN Destination Address Increment Sign 21 1 read-write CH5_LOOP Channel Loop Counter Register 0x178 32 read-write 0x00000000 0x000000FF LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH5_CTRL Channel Descriptor Control Word Register 0x17C 32 read-write 0x00000000 0xFFFFFFFB STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 STRUCTREQ Structure DMA Transfer Request 3 1 write-only XFERCNT DMA Unit Data Transfer Count 4 11 read-write BYTESWAP Endian Byte Swap 15 1 read-write BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write IGNORESREQ Ignore Sreq 23 1 read-write SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only DSTMODE Destination Addressing Mode 31 1 read-only CH5_SRC Channel Descriptor Source Data Address Register 0x180 32 read-write 0x00000000 0xFFFFFFFF SRCADDR Source Data Address 0 32 read-write CH5_DST Channel Descriptor Destination Data Address Register 0x184 32 read-write 0x00000000 0xFFFFFFFF DSTADDR Destination Data Address 0 32 read-write CH5_LINK Channel Descriptor Link Structure Address Register 0x188 32 read-write 0x00000000 0xFFFFFFFF LINKMODE Link Structure Addressing Mode 0 1 read-only LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write CH6_REQSEL Channel Peripheral Request Select Register 0x1A0 32 read-write 0x00000000 0x003F000F SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D LEUART0 Low Energy UART 0 0x00000010 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 MSC Memory System Controller 0x00000030 CRYPTO Advanced Encryption Standard Accelerator 0x00000031 CH6_CFG Channel Configuration Register 0x1A4 32 read-write 0x00000000 0x00330000 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 SRCINCSIGN Source Address Increment Sign 20 1 read-write DSTINCSIGN Destination Address Increment Sign 21 1 read-write CH6_LOOP Channel Loop Counter Register 0x1A8 32 read-write 0x00000000 0x000000FF LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH6_CTRL Channel Descriptor Control Word Register 0x1AC 32 read-write 0x00000000 0xFFFFFFFB STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 STRUCTREQ Structure DMA Transfer Request 3 1 write-only XFERCNT DMA Unit Data Transfer Count 4 11 read-write BYTESWAP Endian Byte Swap 15 1 read-write BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write IGNORESREQ Ignore Sreq 23 1 read-write SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only DSTMODE Destination Addressing Mode 31 1 read-only CH6_SRC Channel Descriptor Source Data Address Register 0x1B0 32 read-write 0x00000000 0xFFFFFFFF SRCADDR Source Data Address 0 32 read-write CH6_DST Channel Descriptor Destination Data Address Register 0x1B4 32 read-write 0x00000000 0xFFFFFFFF DSTADDR Destination Data Address 0 32 read-write CH6_LINK Channel Descriptor Link Structure Address Register 0x1B8 32 read-write 0x00000000 0xFFFFFFFF LINKMODE Link Structure Addressing Mode 0 1 read-only LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write CH7_REQSEL Channel Peripheral Request Select Register 0x1D0 32 read-write 0x00000000 0x003F000F SIGSEL Signal Select 0 4 read-write SOURCESEL Source Select 16 6 read-write NONE No source selected 0x00000000 PRS Peripheral Reflex System 0x00000001 ADC0 Analog to Digital Converter 0 0x00000008 USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 0x0000000C USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 0x0000000D LEUART0 Low Energy UART 0 0x00000010 I2C0 I2C 0 0x00000014 TIMER0 Timer 0 0x00000018 TIMER1 Timer 1 0x00000019 MSC Memory System Controller 0x00000030 CRYPTO Advanced Encryption Standard Accelerator 0x00000031 CH7_CFG Channel Configuration Register 0x1D4 32 read-write 0x00000000 0x00330000 ARBSLOTS Arbitration Slot Number Select 16 2 read-write ONE One arbitration slot selected 0x00000000 TWO Two arbitration slots selected 0x00000001 FOUR Four arbitration slots selected 0x00000002 EIGHT Eight arbitration slots selected 0x00000003 SRCINCSIGN Source Address Increment Sign 20 1 read-write DSTINCSIGN Destination Address Increment Sign 21 1 read-write CH7_LOOP Channel Loop Counter Register 0x1D8 32 read-write 0x00000000 0x000000FF LOOPCNT Linked Structure Sequence Loop Counter 0 8 read-write CH7_CTRL Channel Descriptor Control Word Register 0x1DC 32 read-write 0x00000000 0xFFFFFFFB STRUCTTYPE DMA Structure Type 0 2 read-only TRANSFER DMA transfer structure type selected. 0x00000000 SYNCHRONIZE Synchronization structure type selected. 0x00000001 WRITE Write immediate value structure type selected. 0x00000002 STRUCTREQ Structure DMA Transfer Request 3 1 write-only XFERCNT DMA Unit Data Transfer Count 4 11 read-write BYTESWAP Endian Byte Swap 15 1 read-write BLOCKSIZE Block Transfer Size 16 4 read-write UNIT1 One unit transfer per arbitration 0x00000000 UNIT2 Two unit transfers per arbitration 0x00000001 UNIT3 Three unit transfers per arbitration 0x00000002 UNIT4 Four unit transfers per arbitration 0x00000003 UNIT6 Six unit transfers per arbitration 0x00000004 UNIT8 Eight unit transfers per arbitration 0x00000005 UNIT16 Sixteen unit transfers per arbitration 0x00000007 UNIT32 32 unit transfers per arbitration 0x00000009 UNIT64 64 unit transfers per arbitration 0x0000000A UNIT128 128 unit transfers per arbitration 0x0000000B UNIT256 256 unit transfers per arbitration 0x0000000C UNIT512 512 unit transfers per arbitration 0x0000000D UNIT1024 1024 unit transfers per arbitration 0x0000000E ALL Transfer all units as specified by the XFRCNT field 0x0000000F DONEIFSEN DMA Operation Done Interrupt Flag Set Enable 20 1 read-write REQMODE DMA Request Transfer Mode Select 21 1 read-write DECLOOPCNT Decrement Loop Count 22 1 read-write IGNORESREQ Ignore Sreq 23 1 read-write SRCINC Source Address Increment Size 24 2 read-write ONE Increment source address by one unit data size after each read 0x00000000 TWO Increment source address by two unit data sizes after each read 0x00000001 FOUR Increment source address by four unit data sizes after each read 0x00000002 NONE Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. 0x00000003 SIZE Unit Data Transfer Size 26 2 read-write BYTE Each unit transfer is a byte 0x00000000 HALFWORD Each unit transfer is a half-word 0x00000001 WORD Each unit transfer is a word 0x00000002 DSTINC Destination Address Increment Size 28 2 read-write ONE Increment destination address by one unit data size after each write 0x00000000 TWO Increment destination address by two unit data sizes after each write 0x00000001 FOUR Increment destination address by four unit data sizes after each write 0x00000002 NONE Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. 0x00000003 SRCMODE Source Addressing Mode 30 1 read-only DSTMODE Destination Addressing Mode 31 1 read-only CH7_SRC Channel Descriptor Source Data Address Register 0x1E0 32 read-write 0x00000000 0xFFFFFFFF SRCADDR Source Data Address 0 32 read-write CH7_DST Channel Descriptor Destination Data Address Register 0x1E4 32 read-write 0x00000000 0xFFFFFFFF DSTADDR Destination Data Address 0 32 read-write CH7_LINK Channel Descriptor Link Structure Address Register 0x1E8 32 read-write 0x00000000 0xFFFFFFFF LINKMODE Link Structure Addressing Mode 0 1 read-only LINK Link Next Structure 1 1 read-write LINKADDR Link Structure Address 2 30 read-write FPUEH 5.8.2 FPUEH 0x400E1000 0 0x00000400 registers FPUEH 33 IF Interrupt Flag Register 0x000 32 read-only 0x00000000 0x0000003F FPIOC FPU invalid operation 0 1 read-only FPDZC FPU divide-by-zero exception 1 1 read-only FPUFC FPU underflow exception 2 1 read-only FPOFC FPU overflow exception 3 1 read-only FPIDC FPU input denormal exception 4 1 read-only FPIXC FPU inexact exception 5 1 read-only IFS Interrupt Flag Set Register 0x004 32 write-only 0x00000000 0x0000003F FPIOC Set FPIOC Interrupt Flag 0 1 write-only FPDZC Set FPDZC Interrupt Flag 1 1 write-only FPUFC Set FPUFC Interrupt Flag 2 1 write-only FPOFC Set FPOFC Interrupt Flag 3 1 write-only FPIDC Set FPIDC Interrupt Flag 4 1 write-only FPIXC Set FPIXC Interrupt Flag 5 1 write-only IFC Interrupt Flag Clear Register 0x008 32 write-only 0x00000000 0x0000003F FPIOC Clear FPIOC Interrupt Flag 0 1 write-only FPDZC Clear FPDZC Interrupt Flag 1 1 write-only FPUFC Clear FPUFC Interrupt Flag 2 1 write-only FPOFC Clear FPOFC Interrupt Flag 3 1 write-only FPIDC Clear FPIDC Interrupt Flag 4 1 write-only FPIXC Clear FPIXC Interrupt Flag 5 1 write-only IEN Interrupt Enable Register 0x00C 32 read-write 0x00000000 0x0000003F FPIOC FPIOC Interrupt Enable 0 1 read-write FPDZC FPDZC Interrupt Enable 1 1 read-write FPUFC FPUFC Interrupt Enable 2 1 read-write FPOFC FPOFC Interrupt Enable 3 1 read-write FPIDC FPIDC Interrupt Enable 4 1 read-write FPIXC FPIXC Interrupt Enable 5 1 read-write GPCRC 5.8.2 General Purpose Cyclic Redundancy Check 0x4001C000 0 0x00000400 registers CTRL Control Register 0x000 32 read-write 0x00000000 0x00002711 EN CRC Functionality Enable 0 1 read-write POLYSEL Polynomial Select 4 1 read-write BYTEMODE Byte Mode Enable 8 1 read-write BITREVERSE Byte-level Bit Reverse Enable 9 1 read-write BYTEREVERSE Byte Reverse Mode 10 1 read-write AUTOINIT Auto Init Enable 13 1 read-write CMD Command Register 0x004 32 write-only 0x00000000 0x00000001 INIT Initialization Enable 0 1 write-only INIT CRC Init Value 0x008 32 read-write 0x00000000 0xFFFFFFFF INIT CRC Initialization Value 0 32 read-write POLY CRC Polynomial Value 0x00C 32 read-write 0x00000000 0x0000FFFF POLY CRC Polynomial Value 0 16 read-write INPUTDATA Input 32-bit Data Register 0x010 32 read-write 0x00000000 0xFFFFFFFF INPUTDATA Input Data for 32-bit 0 32 read-write INPUTDATAHWORD Input 16-bit Data Register 0x014 32 read-write 0x00000000 0x0000FFFF INPUTDATAHWORD Input Data for 16-bit 0 16 read-write INPUTDATABYTE Input 8-bit Data Register 0x018 32 read-write 0x00000000 0x000000FF INPUTDATABYTE Input Data for 8-bit 0 8 read-write DATA CRC Data Register 0x01C 32 read-only 0x00000000 0xFFFFFFFF DATA CRC Data Register 0 32 read-only DATAREV CRC Data Reverse Register 0x020 32 read-only 0x00000000 0xFFFFFFFF DATAREV Data Reverse Value 0 32 read-only DATABYTEREV CRC Data Byte Reverse Register 0x024 32 read-only 0x00000000 0xFFFFFFFF DATABYTEREV Data Byte Reverse Value 0 32 read-only TIMER0 5.8.2 TIMER0 0x40018000 0 0x00000400 registers TIMER0 10 CTRL Control Register 0x000 32 read-write 0x00000000 0x3F032FFB MODE Timer Mode 0 2 read-write UP Up-count mode 0x00000000 DOWN Down-count mode 0x00000001 UPDOWN Up/down-count mode 0x00000002 QDEC Quadrature decoder mode 0x00000003 SYNC Timer Start/Stop/Reload Synchronization 3 1 read-write OSMEN One-shot Mode Enable 4 1 read-write QDM Quadrature Decoder Mode Selection 5 1 read-write DEBUGRUN Debug Mode Run Enable 6 1 read-write DMACLRACT DMA Request Clear on Active 7 1 read-write RISEA Timer Rising Input Edge Action 8 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 FALLA Timer Falling Input Edge Action 10 2 read-write NONE No action 0x00000000 START Start counter without reload 0x00000001 STOP Stop counter without reload 0x00000002 RELOADSTART Reload and start counter 0x00000003 X2CNT 2x Count Mode 13 1 read-write CLKSEL Clock Source Select 16 2 read-write PRESCHFPERCLK Prescaled HFPERCLK 0x00000000 CC1 Compare/Capture Channel 1 Input 0x00000001 TIMEROUF Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer 0x00000002 PRESC Prescaler Setting 24 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A ATI Always Track Inputs 28 1 read-write RSSCOIST Reload-Start Sets Compare Output Initial State 29 1 read-write CMD Command Register 0x004 32 write-only 0x00000000 0x00000003 START Start Timer 0 1 write-only STOP Stop Timer 1 1 write-only STATUS Status Register 0x008 32 read-only 0x00000000 0x0F0F0F07 RUNNING Running 0 1 read-only DIR Direction 1 1 read-only TOPBV TOPB Valid 2 1 read-only CCVBV0 CC0 CCVB Valid 8 1 read-only CCVBV1 CC1 CCVB Valid 9 1 read-only CCVBV2 CC2 CCVB Valid 10 1 read-only CCVBV3 CC3 CCVB Valid 11 1 read-only ICV0 CC0 Input Capture Valid 16 1 read-only ICV1 CC1 Input Capture Valid 17 1 read-only ICV2 CC2 Input Capture Valid 18 1 read-only ICV3 CC3 Input Capture Valid 19 1 read-only CCPOL0 CC0 Polarity 24 1 read-only CCPOL1 CC1 Polarity 25 1 read-only CCPOL2 CC2 Polarity 26 1 read-only CCPOL3 CC3 Polarity 27 1 read-only IFL Interrupt Flag Register 0x00C 32 read-only 0x00000000 0x00000FF7 OF Overflow Interrupt Flag 0 1 read-only UF Underflow Interrupt Flag 1 1 read-only DIRCHG Direction Change Detect Interrupt Flag 2 1 read-only CC0 CC Channel 0 Interrupt Flag 4 1 read-only CC1 CC Channel 1 Interrupt Flag 5 1 read-only CC2 CC Channel 2 Interrupt Flag 6 1 read-only CC3 CC Channel 3 Interrupt Flag 7 1 read-only ICBOF0 CC Channel 0 Input Capture Buffer Overflow Interrupt Flag 8 1 read-only ICBOF1 CC Channel 1 Input Capture Buffer Overflow Interrupt Flag 9 1 read-only ICBOF2 CC Channel 2 Input Capture Buffer Overflow Interrupt Flag 10 1 read-only ICBOF3 CC Channel 3 Input Capture Buffer Overflow Interrupt Flag 11 1 read-only IFS Interrupt Flag Set Register 0x010 32 write-only 0x00000000 0x00000FF7 OF Set OF Interrupt Flag 0 1 write-only UF Set UF Interrupt Flag 1 1 write-only DIRCHG Set DIRCHG Interrupt Flag 2 1 write-only CC0 Set CC0 Interrupt Flag 4 1 write-only CC1 Set CC1 Interrupt Flag 5 1 write-only CC2 Set CC2 Interrupt Flag 6 1 write-only CC3 Set CC3 Interrupt Flag 7 1 write-only ICBOF0 Set ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Set ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Set ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Set ICBOF3 Interrupt Flag 11 1 write-only IFC Interrupt Flag Clear Register 0x014 32 write-only 0x00000000 0x00000FF7 OF Clear OF Interrupt Flag 0 1 write-only UF Clear UF Interrupt Flag 1 1 write-only DIRCHG Clear DIRCHG Interrupt Flag 2 1 write-only CC0 Clear CC0 Interrupt Flag 4 1 write-only CC1 Clear CC1 Interrupt Flag 5 1 write-only CC2 Clear CC2 Interrupt Flag 6 1 write-only CC3 Clear CC3 Interrupt Flag 7 1 write-only ICBOF0 Clear ICBOF0 Interrupt Flag 8 1 write-only ICBOF1 Clear ICBOF1 Interrupt Flag 9 1 write-only ICBOF2 Clear ICBOF2 Interrupt Flag 10 1 write-only ICBOF3 Clear ICBOF3 Interrupt Flag 11 1 write-only IEN Interrupt Enable Register 0x018 32 read-write 0x00000000 0x00000FF7 OF OF Interrupt Enable 0 1 read-write UF UF Interrupt Enable 1 1 read-write DIRCHG DIRCHG Interrupt Enable 2 1 read-write CC0 CC0 Interrupt Enable 4 1 read-write CC1 CC1 Interrupt Enable 5 1 read-write CC2 CC2 Interrupt Enable 6 1 read-write CC3 CC3 Interrupt Enable 7 1 read-write ICBOF0 ICBOF0 Interrupt Enable 8 1 read-write ICBOF1 ICBOF1 Interrupt Enable 9 1 read-write ICBOF2 ICBOF2 Interrupt Enable 10 1 read-write ICBOF3 ICBOF3 Interrupt Enable 11 1 read-write TOP Counter Top Value Register 0x01C 32 read-write 0x0000FFFF 0x0000FFFF TOP Counter Top Value 0 16 read-write TOPB Counter Top Value Buffer Register 0x020 32 read-write 0x00000000 0x0000FFFF TOPB Counter Top Value Buffer 0 16 read-write CNT Counter Value Register 0x024 32 read-write 0x00000000 0x0000FFFF CNT Counter Value 0 16 read-write LOCK TIMER Configuration Lock Register 0x02C 32 read-write 0x00000000 0x0000FFFF TIMERLOCKKEY Timer Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 ROUTEPEN I/O Routing Pin Enable Register 0x030 32 read-write 0x00000000 0x0000070F CC0PEN CC Channel 0 Pin Enable 0 1 read-write CC1PEN CC Channel 1 Pin Enable 1 1 read-write CC2PEN CC Channel 2 Pin Enable 2 1 read-write CC3PEN CC Channel 3 Pin Enable 3 1 read-write CDTI0PEN CC Channel 0 Complementary Dead-Time Insertion Pin Enable 8 1 read-write CDTI1PEN CC Channel 1 Complementary Dead-Time Insertion Pin Enable 9 1 read-write CDTI2PEN CC Channel 2 Complementary Dead-Time Insertion Pin Enable 10 1 read-write ROUTELOC0 I/O Routing Location Register 0x034 32 read-write 0x00000000 0x3F3F3F3F CC0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F CC1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F CC2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F CC3LOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F ROUTELOC2 I/O Routing Location Register 0x03C 32 read-write 0x00000000 0x003F3F3F CDTI0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F CDTI1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F CDTI2LOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F CC0_CTRL CC Channel Control Register 0x060 32 read-write 0x00000000 0x7F0F3F17 MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 PWM Pulse-Width Modulation 0x00000003 OUTINV Output Invert 2 1 read-write COIST Compare Output Initial State 4 1 read-write CMOA Compare Match Output Action 8 2 read-write NONE No action on compare match 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 COFOA Counter Overflow Output Action 10 2 read-write NONE No action on counter overflow 0x00000000 TOGGLE Toggle output on counter overflow 0x00000001 CLEAR Clear output on counter overflow 0x00000002 SET Set output on counter overflow 0x00000003 CUFOA Counter Underflow Output Action 12 2 read-write NONE No action on counter underflow 0x00000000 TOGGLE Toggle output on counter underflow 0x00000001 CLEAR Clear output on counter underflow 0x00000002 SET Set output on counter underflow 0x00000003 PRSSEL Compare/Capture Channel PRS Input Channel Selection 16 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B ICEDGE Input Capture Edge Select 24 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 ICEVCTRL Input Capture Event Control 26 2 read-write EVERYEDGE PRS output pulse and interrupt flag set on every capture 0x00000000 EVERYSECONDEDGE PRS output pulse and interrupt flag set on every second capture 0x00000001 RISING PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) 0x00000002 FALLING PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) 0x00000003 PRSCONF PRS Configuration 28 1 read-write INSEL Input Selection 29 1 read-write FILT Digital Filter 30 1 read-write CC0_CCV CC Channel Value Register 0x064 32 read-write 0x00000000 0x0000FFFF modifyExternal CCV CC Channel Value 0 16 read-write CC0_CCVP CC Channel Value Peek Register 0x068 32 read-only 0x00000000 0x0000FFFF CCVP CC Channel Value Peek 0 16 read-only CC0_CCVB CC Channel Buffer Register 0x06C 32 read-write 0x00000000 0x0000FFFF CCVB CC Channel Value Buffer 0 16 read-write CC1_CTRL CC Channel Control Register 0x070 32 read-write 0x00000000 0x7F0F3F17 CC1_CCV CC Channel Value Register 0x074 32 read-write 0x00000000 0x0000FFFF modifyExternal CCV CC Channel Value 0 16 read-write CC1_CCVP CC Channel Value Peek Register 0x078 32 read-only 0x00000000 0x0000FFFF CCVP CC Channel Value Peek 0 16 read-only CC1_CCVB CC Channel Buffer Register 0x07C 32 read-write 0x00000000 0x0000FFFF CCVB CC Channel Value Buffer 0 16 read-write CC2_CTRL CC Channel Control Register 0x080 32 read-write 0x00000000 0x7F0F3F17 CC2_CCV CC Channel Value Register 0x084 32 read-write 0x00000000 0x0000FFFF modifyExternal CCV CC Channel Value 0 16 read-write CC2_CCVP CC Channel Value Peek Register 0x088 32 read-only 0x00000000 0x0000FFFF CCVP CC Channel Value Peek 0 16 read-only CC2_CCVB CC Channel Buffer Register 0x08C 32 read-write 0x00000000 0x0000FFFF CCVB CC Channel Value Buffer 0 16 read-write CC3_CTRL CC Channel Control Register 0x090 32 read-write 0x00000000 0x7F0F3F17 CC3_CCV CC Channel Value Register 0x094 32 read-write 0x00000000 0x0000FFFF modifyExternal CCV CC Channel Value 0 16 read-write CC3_CCVP CC Channel Value Peek Register 0x098 32 read-only 0x00000000 0x0000FFFF CCVP CC Channel Value Peek 0 16 read-only CC3_CCVB CC Channel Buffer Register 0x09C 32 read-write 0x00000000 0x0000FFFF CCVB CC Channel Value Buffer 0 16 read-write DTCTRL DTI Control Register 0x0A0 32 read-write 0x00000000 0x010006FF DTEN DTI Enable 0 1 read-write DTDAS DTI Automatic Start-up Functionality 1 1 read-write DTIPOL DTI Inactive Polarity 2 1 read-write DTCINV DTI Complementary Output Invert 3 1 read-write DTPRSSEL DTI PRS Source Channel Select 4 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B DTAR DTI Always Run 9 1 read-write DTFATS DTI Fault Action on Timer Stop 10 1 read-write DTPRSEN DTI PRS Source Enable 24 1 read-write DTTIME DTI Time Control Register 0x0A4 32 read-write 0x00000000 0x003F3F0F DTPRESC DTI Prescaler Setting 0 4 read-write DIV1 The HFPERCLK is undivided 0x00000000 DIV2 The HFPERCLK is divided by 2 0x00000001 DIV4 The HFPERCLK is divided by 4 0x00000002 DIV8 The HFPERCLK is divided by 8 0x00000003 DIV16 The HFPERCLK is divided by 16 0x00000004 DIV32 The HFPERCLK is divided by 32 0x00000005 DIV64 The HFPERCLK is divided by 64 0x00000006 DIV128 The HFPERCLK is divided by 128 0x00000007 DIV256 The HFPERCLK is divided by 256 0x00000008 DIV512 The HFPERCLK is divided by 512 0x00000009 DIV1024 The HFPERCLK is divided by 1024 0x0000000A DTRISET DTI Rise-time 8 6 read-write DTFALLT DTI Fall-time 16 6 read-write DTFC DTI Fault Configuration Register 0x0A8 32 read-write 0x00000000 0x0F030F0F DTPRS0FSEL DTI PRS Fault Source 0 Select 0 4 read-write PRSCH0 PRS Channel 0 selected as fault source 0 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 2 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 3 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 4 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 5 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 6 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 7 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 8 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 9 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 10 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 11 0x0000000B DTPRS1FSEL DTI PRS Fault Source 1 Select 8 4 read-write PRSCH0 PRS Channel 0 selected as fault source 1 0x00000000 PRSCH1 PRS Channel 1 selected as fault source 1 0x00000001 PRSCH2 PRS Channel 2 selected as fault source 1 0x00000002 PRSCH3 PRS Channel 3 selected as fault source 1 0x00000003 PRSCH4 PRS Channel 4 selected as fault source 1 0x00000004 PRSCH5 PRS Channel 5 selected as fault source 1 0x00000005 PRSCH6 PRS Channel 6 selected as fault source 1 0x00000006 PRSCH7 PRS Channel 7 selected as fault source 1 0x00000007 PRSCH8 PRS Channel 8 selected as fault source 1 0x00000008 PRSCH9 PRS Channel 9 selected as fault source 1 0x00000009 PRSCH10 PRS Channel 10 selected as fault source 1 0x0000000A PRSCH11 PRS Channel 11 selected as fault source 1 0x0000000B DTFA DTI Fault Action 16 2 read-write NONE No action on fault 0x00000000 INACTIVE Set outputs inactive 0x00000001 CLEAR Clear outputs 0x00000002 TRISTATE Tristate outputs 0x00000003 DTPRS0FEN DTI PRS 0 Fault Enable 24 1 read-write DTPRS1FEN DTI PRS 1 Fault Enable 25 1 read-write DTDBGFEN DTI Debugger Fault Enable 26 1 read-write DTLOCKUPFEN DTI Lockup Fault Enable 27 1 read-write DTOGEN DTI Output Generation Enable Register 0x0AC 32 read-write 0x00000000 0x0000003F DTOGCC0EN DTI CC0 Output Generation Enable 0 1 read-write DTOGCC1EN DTI CC1 Output Generation Enable 1 1 read-write DTOGCC2EN DTI CC2 Output Generation Enable 2 1 read-write DTOGCDTI0EN DTI CDTI0 Output Generation Enable 3 1 read-write DTOGCDTI1EN DTI CDTI1 Output Generation Enable 4 1 read-write DTOGCDTI2EN DTI CDTI2 Output Generation Enable 5 1 read-write DTFAULT DTI Fault Register 0x0B0 32 read-only 0x00000000 0x0000000F DTPRS0F DTI PRS 0 Fault 0 1 read-only DTPRS1F DTI PRS 1 Fault 1 1 read-only DTDBGF DTI Debugger Fault 2 1 read-only DTLOCKUPF DTI Lockup Fault 3 1 read-only DTFAULTC DTI Fault Clear Register 0x0B4 32 write-only 0x00000000 0x0000000F DTPRS0FC DTI PRS0 Fault Clear 0 1 write-only DTPRS1FC DTI PRS1 Fault Clear 1 1 write-only DTDBGFC DTI Debugger Fault Clear 2 1 write-only TLOCKUPFC DTI Lockup Fault Clear 3 1 write-only DTLOCK DTI Configuration Lock Register 0x0B8 32 read-write 0x00000000 0x0000FFFF LOCKKEY DTI Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 TIMER1 5.8.2 TIMER1 0x40018400 0 0x00000400 registers TIMER1 18 USART0 5.8.2 USART0 0x40010000 0 0x00000400 registers USART0_RX 11 USART0_TX 12 CTRL Control Register 0x000 32 read-write 0x00000000 0xF3FFFF7F SYNC USART Synchronous Mode 0 1 read-write LOOPBK Loopback Enable 1 1 read-write CCEN Collision Check Enable 2 1 read-write MPM Multi-Processor Mode 3 1 read-write MPAB Multi-Processor Address-Bit 4 1 read-write OVS Oversampling 5 2 read-write X16 Regular UART mode with 16X oversampling in asynchronous mode 0x00000000 X8 Double speed with 8X oversampling in asynchronous mode 0x00000001 X6 6X oversampling in asynchronous mode 0x00000002 X4 Quadruple speed with 4X oversampling in asynchronous mode 0x00000003 CLKPOL Clock Polarity 8 1 read-write CLKPHA Clock Edge for Setup/Sample 9 1 read-write MSBF Most Significant Bit First 10 1 read-write CSMA Action on Slave-Select in Master Mode 11 1 read-write TXBIL TX Buffer Interrupt Level 12 1 read-write RXINV Receiver Input Invert 13 1 read-write TXINV Transmitter Output Invert 14 1 read-write CSINV Chip Select Invert 15 1 read-write AUTOCS Automatic Chip Select 16 1 read-write AUTOTRI Automatic TX Tristate 17 1 read-write SCMODE SmartCard Mode 18 1 read-write SCRETRANS SmartCard Retransmit 19 1 read-write SKIPPERRF Skip Parity Error Frames 20 1 read-write BIT8DV Bit 8 Default Value 21 1 read-write ERRSDMA Halt DMA on Error 22 1 read-write ERRSRX Disable RX on Error 23 1 read-write ERRSTX Disable TX on Error 24 1 read-write SSSEARLY Synchronous Slave Setup Early 25 1 read-write BYTESWAP Byteswap in Double Accesses 28 1 read-write AUTOTX Always Transmit When RX Not Full 29 1 read-write MVDIS Majority Vote Disable 30 1 read-write SMSDELAY Synchronous Master Sample Delay 31 1 read-write FRAME USART Frame Format Register 0x004 32 read-write 0x00001005 0x0000330F DATABITS Data-Bit Mode 0 4 read-write FOUR Each frame contains 4 data bits 0x00000001 FIVE Each frame contains 5 data bits 0x00000002 SIX Each frame contains 6 data bits 0x00000003 SEVEN Each frame contains 7 data bits 0x00000004 EIGHT Each frame contains 8 data bits 0x00000005 NINE Each frame contains 9 data bits 0x00000006 TEN Each frame contains 10 data bits 0x00000007 ELEVEN Each frame contains 11 data bits 0x00000008 TWELVE Each frame contains 12 data bits 0x00000009 THIRTEEN Each frame contains 13 data bits 0x0000000A FOURTEEN Each frame contains 14 data bits 0x0000000B FIFTEEN Each frame contains 15 data bits 0x0000000C SIXTEEN Each frame contains 16 data bits 0x0000000D PARITY Parity-Bit Mode 8 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 12 2 read-write HALF The transmitter generates a half stop bit. Stop-bits are not verified by receiver 0x00000000 ONE One stop bit is generated and verified 0x00000001 ONEANDAHALF The transmitter generates one and a half stop bit. The receiver verifies the first stop bit 0x00000002 TWO The transmitter generates two stop bits. The receiver checks the first stop-bit only 0x00000003 TRIGCTRL USART Trigger Control Register 0x008 32 read-write 0x00000000 0x000F1FF0 RXTEN Receive Trigger Enable 4 1 read-write TXTEN Transmit Trigger Enable 5 1 read-write AUTOTXTEN AUTOTX Trigger Enable 6 1 read-write TXARX0EN Enable Transmit Trigger After RX End of Frame Plus TCMP0VAL 7 1 read-write TXARX1EN Enable Transmit Trigger After RX End of Frame Plus TCMP1VAL 8 1 read-write TXARX2EN Enable Transmit Trigger After RX End of Frame Plus TCMP2VAL 9 1 read-write RXATX0EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL0 Baud-times 10 1 read-write RXATX1EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL1 Baud-times 11 1 read-write RXATX2EN Enable Receive Trigger After TX End of Frame Plus TCMPVAL2 Baud-times 12 1 read-write TSEL Trigger PRS Channel Select 16 4 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B CMD Command Register 0x00C 32 write-only 0x00000000 0x00000FFF RXEN Receiver Enable 0 1 write-only RXDIS Receiver Disable 1 1 write-only TXEN Transmitter Enable 2 1 write-only TXDIS Transmitter Disable 3 1 write-only MASTEREN Master Enable 4 1 write-only MASTERDIS Master Disable 5 1 write-only RXBLOCKEN Receiver Block Enable 6 1 write-only RXBLOCKDIS Receiver Block Disable 7 1 write-only TXTRIEN Transmitter Tristate Enable 8 1 write-only TXTRIDIS Transmitter Tristate Disable 9 1 write-only CLEARTX Clear TX 10 1 write-only CLEARRX Clear RX 11 1 write-only STATUS USART Status Register 0x010 32 read-only 0x00002040 0x00037FFF RXENS Receiver Enable Status 0 1 read-only TXENS Transmitter Enable Status 1 1 read-only MASTER SPI Master Mode 2 1 read-only RXBLOCK Block Incoming Data 3 1 read-only TXTRI Transmitter Tristated 4 1 read-only TXC TX Complete 5 1 read-only TXBL TX Buffer Level 6 1 read-only RXDATAV RX Data Valid 7 1 read-only RXFULL RX FIFO Full 8 1 read-only TXBDRIGHT TX Buffer Expects Double Right Data 9 1 read-only TXBSRIGHT TX Buffer Expects Single Right Data 10 1 read-only RXDATAVRIGHT RX Data Right 11 1 read-only RXFULLRIGHT RX Full of Right Data 12 1 read-only TXIDLE TX Idle 13 1 read-only TIMERRESTARTED The USART Timer Restarted Itself 14 1 read-only TXBUFCNT TX Buffer Count 16 2 read-only CLKDIV Clock Control Register 0x014 32 read-write 0x00000000 0x807FFFF8 DIV Fractional Clock Divider 3 20 read-write AUTOBAUDEN AUTOBAUD Detection Enable 31 1 read-write RXDATAX RX Buffer Data Extended Register 0x018 32 read-only 0x00000000 0x0000C1FF modifyExternal RXDATA RX Data 0 9 read-only PERR Data Parity Error 14 1 read-only FERR Data Framing Error 15 1 read-only RXDATA RX Buffer Data Register 0x01C 32 read-only 0x00000000 0x000000FF modifyExternal RXDATA RX Data 0 8 read-only RXDOUBLEX RX Buffer Double Data Extended Register 0x020 32 read-only 0x00000000 0xC1FFC1FF modifyExternal RXDATA0 RX Data 0 0 9 read-only PERR0 Data Parity Error 0 14 1 read-only FERR0 Data Framing Error 0 15 1 read-only RXDATA1 RX Data 1 16 9 read-only PERR1 Data Parity Error 1 30 1 read-only FERR1 Data Framing Error 1 31 1 read-only RXDOUBLE RX FIFO Double Data Register 0x024 32 read-only 0x00000000 0x0000FFFF modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDATAXP RX Buffer Data Extended Peek Register 0x028 32 read-only 0x00000000 0x0000C1FF RXDATAP RX Data Peek 0 9 read-only PERRP Data Parity Error Peek 14 1 read-only FERRP Data Framing Error Peek 15 1 read-only RXDOUBLEXP RX Buffer Double Data Extended Peek Register 0x02C 32 read-only 0x00000000 0xC1FFC1FF RXDATAP0 RX Data 0 Peek 0 9 read-only PERRP0 Data Parity Error 0 Peek 14 1 read-only FERRP0 Data Framing Error 0 Peek 15 1 read-only RXDATAP1 RX Data 1 Peek 16 9 read-only PERRP1 Data Parity Error 1 Peek 30 1 read-only FERRP1 Data Framing Error 1 Peek 31 1 read-only TXDATAX TX Buffer Data Extended Register 0x030 32 read-write 0x00000000 0x0000F9FF TXDATAX TX Data 0 9 read-write UBRXAT Unblock RX After Transmission 11 1 read-write TXTRIAT Set TXTRI After Transmission 12 1 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDISAT Clear TXEN After Transmission 14 1 read-write RXENAT Enable RX After Transmission 15 1 read-write TXDATA TX Buffer Data Register 0x034 32 read-write 0x00000000 0x000000FF TXDATA TX Data 0 8 read-write TXDOUBLEX TX Buffer Double Data Extended Register 0x038 32 read-write 0x00000000 0xF9FFF9FF TXDATA0 TX Data 0 9 read-write UBRXAT0 Unblock RX After Transmission 11 1 read-write TXTRIAT0 Set TXTRI After Transmission 12 1 read-write TXBREAK0 Transmit Data as Break 13 1 read-write TXDISAT0 Clear TXEN After Transmission 14 1 read-write RXENAT0 Enable RX After Transmission 15 1 read-write TXDATA1 TX Data 16 9 read-write UBRXAT1 Unblock RX After Transmission 27 1 read-write TXTRIAT1 Set TXTRI After Transmission 28 1 read-write TXBREAK1 Transmit Data as Break 29 1 read-write TXDISAT1 Clear TXEN After Transmission 30 1 read-write RXENAT1 Enable RX After Transmission 31 1 read-write TXDOUBLE TX Buffer Double Data Register 0x03C 32 read-write 0x00000000 0x0000FFFF TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write IF Interrupt Flag Register 0x040 32 read-only 0x00000002 0x0001FFFF TXC TX Complete Interrupt Flag 0 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXFULL RX Buffer Full Interrupt Flag 3 1 read-only RXOF RX Overflow Interrupt Flag 4 1 read-only RXUF RX Underflow Interrupt Flag 5 1 read-only TXOF TX Overflow Interrupt Flag 6 1 read-only TXUF TX Underflow Interrupt Flag 7 1 read-only PERR Parity Error Interrupt Flag 8 1 read-only FERR Framing Error Interrupt Flag 9 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 10 1 read-only SSM Slave-Select in Master Mode Interrupt Flag 11 1 read-only CCF Collision Check Fail Interrupt Flag 12 1 read-only TXIDLE TX Idle Interrupt Flag 13 1 read-only TCMP0 Timer Comparator 0 Interrupt Flag 14 1 read-only TCMP1 Timer Comparator 1 Interrupt Flag 15 1 read-only TCMP2 Timer Comparator 2 Interrupt Flag 16 1 read-only IFS Interrupt Flag Set Register 0x044 32 write-only 0x00000000 0x0001FFF9 TXC Set TXC Interrupt Flag 0 1 write-only RXFULL Set RXFULL Interrupt Flag 3 1 write-only RXOF Set RXOF Interrupt Flag 4 1 write-only RXUF Set RXUF Interrupt Flag 5 1 write-only TXOF Set TXOF Interrupt Flag 6 1 write-only TXUF Set TXUF Interrupt Flag 7 1 write-only PERR Set PERR Interrupt Flag 8 1 write-only FERR Set FERR Interrupt Flag 9 1 write-only MPAF Set MPAF Interrupt Flag 10 1 write-only SSM Set SSM Interrupt Flag 11 1 write-only CCF Set CCF Interrupt Flag 12 1 write-only TXIDLE Set TXIDLE Interrupt Flag 13 1 write-only TCMP0 Set TCMP0 Interrupt Flag 14 1 write-only TCMP1 Set TCMP1 Interrupt Flag 15 1 write-only TCMP2 Set TCMP2 Interrupt Flag 16 1 write-only IFC Interrupt Flag Clear Register 0x048 32 write-only 0x00000000 0x0001FFF9 TXC Clear TXC Interrupt Flag 0 1 write-only RXFULL Clear RXFULL Interrupt Flag 3 1 write-only RXOF Clear RXOF Interrupt Flag 4 1 write-only RXUF Clear RXUF Interrupt Flag 5 1 write-only TXOF Clear TXOF Interrupt Flag 6 1 write-only TXUF Clear TXUF Interrupt Flag 7 1 write-only PERR Clear PERR Interrupt Flag 8 1 write-only FERR Clear FERR Interrupt Flag 9 1 write-only MPAF Clear MPAF Interrupt Flag 10 1 write-only SSM Clear SSM Interrupt Flag 11 1 write-only CCF Clear CCF Interrupt Flag 12 1 write-only TXIDLE Clear TXIDLE Interrupt Flag 13 1 write-only TCMP0 Clear TCMP0 Interrupt Flag 14 1 write-only TCMP1 Clear TCMP1 Interrupt Flag 15 1 write-only TCMP2 Clear TCMP2 Interrupt Flag 16 1 write-only IEN Interrupt Enable Register 0x04C 32 read-write 0x00000000 0x0001FFFF TXC TXC Interrupt Enable 0 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXFULL RXFULL Interrupt Enable 3 1 read-write RXOF RXOF Interrupt Enable 4 1 read-write RXUF RXUF Interrupt Enable 5 1 read-write TXOF TXOF Interrupt Enable 6 1 read-write TXUF TXUF Interrupt Enable 7 1 read-write PERR PERR Interrupt Enable 8 1 read-write FERR FERR Interrupt Enable 9 1 read-write MPAF MPAF Interrupt Enable 10 1 read-write SSM SSM Interrupt Enable 11 1 read-write CCF CCF Interrupt Enable 12 1 read-write TXIDLE TXIDLE Interrupt Enable 13 1 read-write TCMP0 TCMP0 Interrupt Enable 14 1 read-write TCMP1 TCMP1 Interrupt Enable 15 1 read-write TCMP2 TCMP2 Interrupt Enable 16 1 read-write IRCTRL IrDA Control Register 0x050 32 read-write 0x00000000 0x00000F8F IREN Enable IrDA Module 0 1 read-write IRPW IrDA TX Pulse Width 1 2 read-write ONE IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 0x00000000 TWO IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 0x00000001 THREE IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 0x00000002 FOUR IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 0x00000003 IRFILT IrDA RX Filter 3 1 read-write IRPRSEN IrDA PRS Channel Enable 7 1 read-write IRPRSSEL IrDA PRS Channel Select 8 4 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B INPUT USART Input Register 0x058 32 read-write 0x00000000 0x00008F8F RXPRSSEL RX PRS Channel Select 0 4 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B RXPRS PRS RX Enable 7 1 read-write CLKPRSSEL CLK PRS Channel Select 8 4 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B CLKPRS PRS CLK Enable 15 1 read-write I2SCTRL I2S Control Register 0x05C 32 read-write 0x00000000 0x0000071F EN Enable I2S Mode 0 1 read-write MONO Stero or Mono 1 1 read-write JUSTIFY Justification of I2S Data 2 1 read-write DMASPLIT Separate DMA Request for Left/Right Data 3 1 read-write DELAY Delay on I2S Data 4 1 read-write FORMAT I2S Word Format 8 3 read-write W32D32 32-bit word, 32-bit data 0x00000000 W32D24M 32-bit word, 32-bit data with 8 lsb masked 0x00000001 W32D24 32-bit word, 24-bit data 0x00000002 W32D16 32-bit word, 16-bit data 0x00000003 W32D8 32-bit word, 8-bit data 0x00000004 W16D16 16-bit word, 16-bit data 0x00000005 W16D8 16-bit word, 8-bit data 0x00000006 W8D8 8-bit word, 8-bit data 0x00000007 TIMING Timing Register 0x060 32 read-write 0x00000000 0x77770000 TXDELAY TX Frame Start Delay 16 3 read-write DISABLE Disable - TXDELAY in USARTn_CTRL can be used for legacy 0x00000000 ONE Start of transmission is delayed for 1 baud-times 0x00000001 TWO Start of transmission is delayed for 2 baud-times 0x00000002 THREE Start of transmission is delayed for 3 baud-times 0x00000003 SEVEN Start of transmission is delayed for 7 baud-times 0x00000004 TCMP0 Start of transmission is delayed for TCMPVAL0 baud-times 0x00000005 TCMP1 Start of transmission is delayed for TCMPVAL1 baud-times 0x00000006 TCMP2 Start of transmission is delayed for TCMPVAL2 baud-times 0x00000007 CSSETUP Chip Select Setup 20 3 read-write ZERO CS is not asserted before start of transmission 0x00000000 ONE CS is asserted for 1 baud-times before start of transmission 0x00000001 TWO CS is asserted for 2 baud-times before start of transmission 0x00000002 THREE CS is asserted for 3 baud-times before start of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times before start of transmission 0x00000004 TCMP0 CS is asserted before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted before the start of transmission for TCMPVAL2 baud-times 0x00000007 ICS Inter-character Spacing 24 3 read-write ZERO There is no space between charcters 0x00000000 ONE Create a space of 1 baud-times before start of transmission 0x00000001 TWO Create a space of 2 baud-times before start of transmission 0x00000002 THREE Create a space of 3 baud-times before start of transmission 0x00000003 SEVEN Create a space of 7 baud-times before start of transmission 0x00000004 TCMP0 Create a space of before the start of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 Create a space of before the start of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 Create a space of before the start of transmission for TCMPVAL2 baud-times 0x00000007 CSHOLD Chip Select Hold 28 3 read-write ZERO Disable CS being asserted after the end of transmission 0x00000000 ONE CS is asserted for 1 baud-times after the end of transmission 0x00000001 TWO CS is asserted for 2 baud-times after the end of transmission 0x00000002 THREE CS is asserted for 3 baud-times after the end of transmission 0x00000003 SEVEN CS is asserted for 7 baud-times after the end of transmission 0x00000004 TCMP0 CS is asserted after the end of transmission for TCMPVAL0 baud-times 0x00000005 TCMP1 CS is asserted after the end of transmission for TCMPVAL1 baud-times 0x00000006 TCMP2 CS is asserted after the end of transmission for TCMPVAL2 baud-times 0x00000007 CTRLX Control Register Extended 0x064 32 read-write 0x00000000 0x0000000F DBGHALT Debug Halt 0 1 read-write CTSINV CTS Pin Inversion 1 1 read-write CTSEN CTS Function Enabled 2 1 read-write RTSINV RTS Pin Inversion 3 1 read-write TIMECMP0 Used to Generate Interrupts and Various Delays 0x068 32 read-write 0x00000000 0x017700FF TCMPVAL Timer Comparator 0 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 0 is disabled 0x00000000 TXEOF Comparator 0 and timer are started at TX end of frame 0x00000001 TXC Comparator 0 and timer are started at TX Complete 0x00000002 RXACT Comparator 0 and timer are started at RX going Active (default: low) 0x00000003 RXEOF Comparator 0 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 0 20 3 read-write TCMP0 Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event 0x00000000 TXST Comparator 0 is disabled at the start of transmission 0x00000001 RXACT Comparator 0 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 0 is disabled on RX going Inactive 0x00000003 RESTARTEN Restart Timer on TCMP0 24 1 read-write TIMECMP1 Used to Generate Interrupts and Various Delays 0x06C 32 read-write 0x00000000 0x017700FF TCMPVAL Timer Comparator 1 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 1 is disabled 0x00000000 TXEOF Comparator 1 and timer are started at TX end of frame 0x00000001 TXC Comparator 1 and timer are started at TX Complete 0x00000002 RXACT Comparator 1 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 1 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 1 20 3 read-write TCMP1 Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event 0x00000000 TXST Comparator 1 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 1 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 1 is disabled on RX going Inactive 0x00000003 RESTARTEN Restart Timer on TCMP1 24 1 read-write TIMECMP2 Used to Generate Interrupts and Various Delays 0x070 32 read-write 0x00000000 0x017700FF TCMPVAL Timer Comparator 2 0 8 read-write TSTART Timer Start Source 16 3 read-write DISABLE Comparator 2 is disabled 0x00000000 TXEOF Comparator 2 and timer are started at TX end of frame 0x00000001 TXC Comparator 2 and timer are started at TX Complete 0x00000002 RXACT Comparator 2 and timer are started at RX going going Active (default: low) 0x00000003 RXEOF Comparator 2 and timer are started at RX end of frame 0x00000004 TSTOP Source Used to Disable Comparator 2 20 3 read-write TCMP2 Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event 0x00000000 TXST Comparator 2 is disabled at TX start TX Engine 0x00000001 RXACT Comparator 2 is disabled on RX going going Active (default: low) 0x00000002 RXACTN Comparator 2 is disabled on RX going Inactive 0x00000003 RESTARTEN Restart Timer on TCMP2 24 1 read-write ROUTEPEN I/O Routing Pin Enable Register 0x074 32 read-write 0x00000000 0x0000003F RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write CSPEN CS Pin Enable 2 1 read-write CLKPEN CLK Pin Enable 3 1 read-write CTSPEN CTS Pin Enable 4 1 read-write RTSPEN RTS Pin Enable 5 1 read-write ROUTELOC0 I/O Routing Location Register 0x078 32 read-write 0x00000000 0x3F3F3F3F RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F CSLOC I/O Location 16 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F CLKLOC I/O Location 24 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F ROUTELOC1 I/O Routing Location Register 0x07C 32 read-write 0x00000000 0x00003F3F CTSLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F RTSLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F USART1 5.8.2 USART1 0x40010400 0 0x00000400 registers USART1_RX 19 USART1_TX 20 LEUART0 5.8.2 LEUART0 0x4004A000 0 0x00000400 registers LEUART0 21 CTRL Control Register 0x000 32 read-write 0x00000000 0x0000FFFF AUTOTRI Automatic Transmitter Tristate 0 1 read-write DATABITS Data-Bit Mode 1 1 read-write PARITY Parity-Bit Mode 2 2 read-write NONE Parity bits are not used 0x00000000 EVEN Even parity are used. Parity bits are automatically generated and checked by hardware. 0x00000002 ODD Odd parity is used. Parity bits are automatically generated and checked by hardware. 0x00000003 STOPBITS Stop-Bit Mode 4 1 read-write INV Invert Input and Output 5 1 read-write ERRSDMA Clear RX DMA on Error 6 1 read-write LOOPBK Loopback Enable 7 1 read-write SFUBRX Start-Frame UnBlock RX 8 1 read-write MPM Multi-Processor Mode 9 1 read-write MPAB Multi-Processor Address-Bit 10 1 read-write BIT8DV Bit 8 Default Value 11 1 read-write RXDMAWU RX DMA Wakeup 12 1 read-write TXDMAWU TX DMA Wakeup 13 1 read-write TXDELAY TX Delay Transmission 14 2 read-write NONE Frames are transmitted immediately 0x00000000 SINGLE Transmission of new frames are delayed by a single bit period 0x00000001 DOUBLE Transmission of new frames are delayed by two bit periods 0x00000002 TRIPLE Transmission of new frames are delayed by three bit periods 0x00000003 CMD Command Register 0x004 32 write-only 0x00000000 0x000000FF RXEN Receiver Enable 0 1 write-only RXDIS Receiver Disable 1 1 write-only TXEN Transmitter Enable 2 1 write-only TXDIS Transmitter Disable 3 1 write-only RXBLOCKEN Receiver Block Enable 4 1 write-only RXBLOCKDIS Receiver Block Disable 5 1 write-only CLEARTX Clear TX 6 1 write-only CLEARRX Clear RX 7 1 write-only STATUS Status Register 0x008 32 read-only 0x00000050 0x0000007F RXENS Receiver Enable Status 0 1 read-only TXENS Transmitter Enable Status 1 1 read-only RXBLOCK Block Incoming Data 2 1 read-only TXC TX Complete 3 1 read-only TXBL TX Buffer Level 4 1 read-only RXDATAV RX Data Valid 5 1 read-only TXIDLE TX Idle 6 1 read-only CLKDIV Clock Control Register 0x00C 32 read-write 0x00000000 0x0001FFF8 DIV Fractional Clock Divider 3 14 read-write STARTFRAME Start Frame Register 0x010 32 read-write 0x00000000 0x000001FF STARTFRAME Start Frame 0 9 read-write SIGFRAME Signal Frame Register 0x014 32 read-write 0x00000000 0x000001FF SIGFRAME Signal Frame 0 9 read-write RXDATAX Receive Buffer Data Extended Register 0x018 32 read-only 0x00000000 0x0000C1FF modifyExternal RXDATA RX Data 0 9 read-only PERR Receive Data Parity Error 14 1 read-only FERR Receive Data Framing Error 15 1 read-only RXDATA Receive Buffer Data Register 0x01C 32 read-only 0x00000000 0x000000FF modifyExternal RXDATA RX Data 0 8 read-only RXDATAXP Receive Buffer Data Extended Peek Register 0x020 32 read-only 0x00000000 0x0000C1FF RXDATAP RX Data Peek 0 9 read-only PERRP Receive Data Parity Error Peek 14 1 read-only FERRP Receive Data Framing Error Peek 15 1 read-only TXDATAX Transmit Buffer Data Extended Register 0x024 32 read-write 0x00000000 0x0000E1FF TXDATA TX Data 0 9 read-write TXBREAK Transmit Data as Break 13 1 read-write TXDISAT Disable TX After Transmission 14 1 read-write RXENAT Enable RX After Transmission 15 1 read-write TXDATA Transmit Buffer Data Register 0x028 32 read-write 0x00000000 0x000000FF TXDATA TX Data 0 8 read-write IF Interrupt Flag Register 0x02C 32 read-only 0x00000002 0x000007FF TXC TX Complete Interrupt Flag 0 1 read-only TXBL TX Buffer Level Interrupt Flag 1 1 read-only RXDATAV RX Data Valid Interrupt Flag 2 1 read-only RXOF RX Overflow Interrupt Flag 3 1 read-only RXUF RX Underflow Interrupt Flag 4 1 read-only TXOF TX Overflow Interrupt Flag 5 1 read-only PERR Parity Error Interrupt Flag 6 1 read-only FERR Framing Error Interrupt Flag 7 1 read-only MPAF Multi-Processor Address Frame Interrupt Flag 8 1 read-only STARTF Start Frame Interrupt Flag 9 1 read-only SIGF Signal Frame Interrupt Flag 10 1 read-only IFS Interrupt Flag Set Register 0x030 32 write-only 0x00000000 0x000007F9 TXC Set TXC Interrupt Flag 0 1 write-only RXOF Set RXOF Interrupt Flag 3 1 write-only RXUF Set RXUF Interrupt Flag 4 1 write-only TXOF Set TXOF Interrupt Flag 5 1 write-only PERR Set PERR Interrupt Flag 6 1 write-only FERR Set FERR Interrupt Flag 7 1 write-only MPAF Set MPAF Interrupt Flag 8 1 write-only STARTF Set STARTF Interrupt Flag 9 1 write-only SIGF Set SIGF Interrupt Flag 10 1 write-only IFC Interrupt Flag Clear Register 0x034 32 write-only 0x00000000 0x000007F9 TXC Clear TXC Interrupt Flag 0 1 write-only RXOF Clear RXOF Interrupt Flag 3 1 write-only RXUF Clear RXUF Interrupt Flag 4 1 write-only TXOF Clear TXOF Interrupt Flag 5 1 write-only PERR Clear PERR Interrupt Flag 6 1 write-only FERR Clear FERR Interrupt Flag 7 1 write-only MPAF Clear MPAF Interrupt Flag 8 1 write-only STARTF Clear STARTF Interrupt Flag 9 1 write-only SIGF Clear SIGF Interrupt Flag 10 1 write-only IEN Interrupt Enable Register 0x038 32 read-write 0x00000000 0x000007FF TXC TXC Interrupt Enable 0 1 read-write TXBL TXBL Interrupt Enable 1 1 read-write RXDATAV RXDATAV Interrupt Enable 2 1 read-write RXOF RXOF Interrupt Enable 3 1 read-write RXUF RXUF Interrupt Enable 4 1 read-write TXOF TXOF Interrupt Enable 5 1 read-write PERR PERR Interrupt Enable 6 1 read-write FERR FERR Interrupt Enable 7 1 read-write MPAF MPAF Interrupt Enable 8 1 read-write STARTF STARTF Interrupt Enable 9 1 read-write SIGF SIGF Interrupt Enable 10 1 read-write PULSECTRL Pulse Control Register 0x03C 32 read-write 0x00000000 0x0000003F PULSEW Pulse Width 0 4 read-write PULSEEN Pulse Generator/Extender Enable 4 1 read-write PULSEFILT Pulse Filter 5 1 read-write FREEZE Freeze Register 0x040 32 read-write 0x00000000 0x00000001 REGFREEZE Register Update Freeze 0 1 read-write SYNCBUSY Synchronization Busy Register 0x044 32 read-only 0x00000000 0x000000FF CTRL CTRL Register Busy 0 1 read-only CMD CMD Register Busy 1 1 read-only CLKDIV CLKDIV Register Busy 2 1 read-only STARTFRAME STARTFRAME Register Busy 3 1 read-only SIGFRAME SIGFRAME Register Busy 4 1 read-only TXDATAX TXDATAX Register Busy 5 1 read-only TXDATA TXDATA Register Busy 6 1 read-only PULSECTRL PULSECTRL Register Busy 7 1 read-only ROUTEPEN I/O Routing Pin Enable Register 0x054 32 read-write 0x00000000 0x00000003 RXPEN RX Pin Enable 0 1 read-write TXPEN TX Pin Enable 1 1 read-write ROUTELOC0 I/O Routing Location Register 0x058 32 read-write 0x00000000 0x00003F3F RXLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F TXLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F INPUT LEUART Input Register 0x064 32 read-write 0x00000000 0x0000002F RXPRSSEL RX PRS Channel Select 0 4 read-write PRSCH0 PRS Channel 0 selected 0x00000000 PRSCH1 PRS Channel 1 selected 0x00000001 PRSCH2 PRS Channel 2 selected 0x00000002 PRSCH3 PRS Channel 3 selected 0x00000003 PRSCH4 PRS Channel 4 selected 0x00000004 PRSCH5 PRS Channel 5 selected 0x00000005 PRSCH6 PRS Channel 6 selected 0x00000006 PRSCH7 PRS Channel 7 selected 0x00000007 PRSCH8 PRS Channel 8 selected 0x00000008 PRSCH9 PRS Channel 9 selected 0x00000009 PRSCH10 PRS Channel 10 selected 0x0000000A PRSCH11 PRS Channel 11 selected 0x0000000B RXPRS PRS RX Enable 5 1 read-write LETIMER0 5.8.2 LETIMER0 0x40046000 0 0x00000400 registers LETIMER0 26 CTRL Control Register 0x000 32 read-write 0x00000000 0x000013FF REPMODE Repeat Mode 0 2 read-write FREE When started, the LETIMER counts down until it is stopped by software 0x00000000 ONESHOT The counter counts REP0 times. When REP0 reaches zero, the counter stops 0x00000001 BUFFERED The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero, otherwise the counter stops 0x00000002 DOUBLE Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero 0x00000003 UFOA0 Underflow Output Action 0 2 2 read-write NONE LETn_O0 is held at its idle value as defined by OPOL0 0x00000000 TOGGLE LETn_O0 is toggled on CNT underflow 0x00000001 PULSE LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0 0x00000002 PWM LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1 0x00000003 UFOA1 Underflow Output Action 1 4 2 read-write NONE LETn_O1 is held at its idle value as defined by OPOL1 0x00000000 TOGGLE LETn_O1 is toggled on CNT underflow 0x00000001 PULSE LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1 0x00000002 PWM LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1 0x00000003 OPOL0 Output 0 Polarity 6 1 read-write OPOL1 Output 1 Polarity 7 1 read-write BUFTOP Buffered Top 8 1 read-write COMP0TOP Compare Value 0 is Top Value 9 1 read-write DEBUGRUN Debug Mode Run Enable 12 1 read-write CMD Command Register 0x004 32 write-only 0x00000000 0x0000001F START Start LETIMER 0 1 write-only STOP Stop LETIMER 1 1 write-only CLEAR Clear LETIMER 2 1 write-only CTO0 Clear Toggle Output 0 3 1 write-only CTO1 Clear Toggle Output 1 4 1 write-only STATUS Status Register 0x008 32 read-only 0x00000000 0x00000001 RUNNING LETIMER Running 0 1 read-only CNT Counter Value Register 0x00C 32 read-write 0x00000000 0x0000FFFF CNT Counter Value 0 16 read-write COMP0 Compare Value Register 0 0x010 32 read-write 0x00000000 0x0000FFFF COMP0 Compare Value 0 0 16 read-write COMP1 Compare Value Register 1 0x014 32 read-write 0x00000000 0x0000FFFF COMP1 Compare Value 1 0 16 read-write REP0 Repeat Counter Register 0 0x018 32 read-write 0x00000000 0x000000FF REP0 Repeat Counter 0 0 8 read-write REP1 Repeat Counter Register 1 0x01C 32 read-write 0x00000000 0x000000FF REP1 Repeat Counter 1 0 8 read-write IF Interrupt Flag Register 0x020 32 read-only 0x00000000 0x0000001F COMP0 Compare Match 0 Interrupt Flag 0 1 read-only COMP1 Compare Match 1 Interrupt Flag 1 1 read-only UF Underflow Interrupt Flag 2 1 read-only REP0 Repeat Counter 0 Interrupt Flag 3 1 read-only REP1 Repeat Counter 1 Interrupt Flag 4 1 read-only IFS Interrupt Flag Set Register 0x024 32 write-only 0x00000000 0x0000001F COMP0 Set COMP0 Interrupt Flag 0 1 write-only COMP1 Set COMP1 Interrupt Flag 1 1 write-only UF Set UF Interrupt Flag 2 1 write-only REP0 Set REP0 Interrupt Flag 3 1 write-only REP1 Set REP1 Interrupt Flag 4 1 write-only IFC Interrupt Flag Clear Register 0x028 32 write-only 0x00000000 0x0000001F COMP0 Clear COMP0 Interrupt Flag 0 1 write-only COMP1 Clear COMP1 Interrupt Flag 1 1 write-only UF Clear UF Interrupt Flag 2 1 write-only REP0 Clear REP0 Interrupt Flag 3 1 write-only REP1 Clear REP1 Interrupt Flag 4 1 write-only IEN Interrupt Enable Register 0x02C 32 read-write 0x00000000 0x0000001F COMP0 COMP0 Interrupt Enable 0 1 read-write COMP1 COMP1 Interrupt Enable 1 1 read-write UF UF Interrupt Enable 2 1 read-write REP0 REP0 Interrupt Enable 3 1 read-write REP1 REP1 Interrupt Enable 4 1 read-write SYNCBUSY Synchronization Busy Register 0x034 32 read-only 0x00000000 0x00000002 CMD CMD Register Busy 1 1 read-only ROUTEPEN I/O Routing Pin Enable Register 0x040 32 read-write 0x00000000 0x00000003 OUT0PEN Output 0 Pin Enable 0 1 read-write OUT1PEN Output 1 Pin Enable 1 1 read-write ROUTELOC0 I/O Routing Location Register 0x044 32 read-write 0x00000000 0x00003F3F OUT0LOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F OUT1LOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F PRSSEL PRS Input Select Register 0x050 32 read-write 0x00000000 0x0CCCF3CF PRSSTARTSEL PRS Start Select 0 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSSTOPSEL PRS Stop Select 6 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSCLEARSEL PRS Clear Select 12 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSSTARTMODE PRS Start Mode 18 2 read-write NONE PRS cannot start the LETIMER 0x00000000 RISING Rising edge of selected PRS input can start the LETIMER 0x00000001 FALLING Falling edge of selected PRS input can start the LETIMER 0x00000002 BOTH Both the rising or falling edge of the selected PRS input can start the LETIMER 0x00000003 PRSSTOPMODE PRS Stop Mode 22 2 read-write NONE PRS cannot stop the LETIMER 0x00000000 RISING Rising edge of selected PRS input can stop the LETIMER 0x00000001 FALLING Falling edge of selected PRS input can stop the LETIMER 0x00000002 BOTH Both the rising or falling edge of the selected PRS input can stop the LETIMER 0x00000003 PRSCLEARMODE PRS Clear Mode 26 2 read-write NONE PRS cannot clear the LETIMER 0x00000000 RISING Rising edge of selected PRS input can clear the LETIMER 0x00000001 FALLING Falling edge of selected PRS input can clear the LETIMER 0x00000002 BOTH Both the rising or falling edge of the selected PRS input can clear the LETIMER 0x00000003 CRYOTIMER 5.8.2 CRYOTIMER 0x4001E000 0 0x00000400 registers CRYOTIMER 31 CTRL Control Register 0x000 32 read-write 0x00000000 0x000000EF EN Enable CRYOTIMER 0 1 read-write DEBUGRUN Debug Mode Run Enable 1 1 read-write OSCSEL Select Low Frequency Oscillator 2 2 read-write LFRCO Select Low Frequency RC Oscillator 0x00000000 LFXO Select Low Frequency Crystal Oscillator 0x00000001 ULFRCO Select Ultra Low Frequency RC Oscillator 0x00000002 PRESC Prescaler Setting 5 3 read-write DIV1 LF Oscillator frequency undivided 0x00000000 DIV2 LF Oscillator frequency divided by 2 0x00000001 DIV4 LF Oscillator frequency divided by 4 0x00000002 DIV8 LF Oscillator frequency divided by 8 0x00000003 DIV16 LF Oscillator frequency divided by 16 0x00000004 DIV32 LF Oscillator frequency divided by 32 0x00000005 DIV64 LF Oscillator frequency divided by 64 0x00000006 DIV128 LF Oscillator frequency divided by 128 0x00000007 PERIODSEL Interrupt Duration 0x004 32 read-write 0x00000020 0x0000003F PERIODSEL Interrupts/Wakeup Events Period Setting 0 6 read-write CNT Counter Value 0x008 32 read-only 0x00000000 0xFFFFFFFF CNT Counter Value 0 32 read-only EM4WUEN Wake Up Enable 0x00C 32 read-write 0x00000000 0x00000001 EM4WU EM4 Wake-up Enable 0 1 read-write IF Interrupt Flag Register 0x010 32 read-only 0x00000000 0x00000001 PERIOD Wakeup Event/Interrupt 0 1 read-only IFS Interrupt Flag Set Register 0x014 32 write-only 0x00000000 0x00000001 PERIOD Set PERIOD Interrupt Flag 0 1 write-only IFC Interrupt Flag Clear Register 0x018 32 write-only 0x00000000 0x00000001 PERIOD Clear PERIOD Interrupt Flag 0 1 write-only IEN Interrupt Enable Register 0x01C 32 read-write 0x00000000 0x00000001 PERIOD PERIOD Interrupt Enable 0 1 read-write PCNT0 5.8.2 Pulse Counter 0x4004E000 0 0x00000400 registers PCNT0 22 CTRL Control Register 0x000 32 read-write 0x00000000 0xBFDBFFFF MODE Mode Select 0 3 read-write DISABLE The module is disabled. 0x00000000 OVSSINGLE Single input LFACLK oversampling mode (available in EM0-EM3). 0x00000001 EXTCLKSINGLE Externally clocked single input counter mode (available in EM0-EM3). 0x00000002 EXTCLKQUAD Externally clocked quadrature decoder mode (available in EM0-EM3). 0x00000003 OVSQUAD1X LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3). 0x00000004 OVSQUAD2X LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3). 0x00000005 OVSQUAD4X LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3). 0x00000006 FILT Enable Digital Pulse Width Filter 3 1 read-write RSTEN Enable PCNT Clock Domain Reset 4 1 read-write CNTRSTEN Enable CNT Reset 5 1 read-write AUXCNTRSTEN Enable AUXCNT Reset 6 1 read-write DEBUGHALT Debug Mode Halt Enable 7 1 read-write HYST Enable Hysteresis 8 1 read-write S1CDIR Count Direction Determined By S1 9 1 read-write CNTEV Controls When the Counter Counts 10 2 read-write BOTH Counts up on up-count and down on down-count events. 0x00000000 UP Only counts up on up-count events. 0x00000001 DOWN Only counts down on down-count events. 0x00000002 NONE Never counts. 0x00000003 AUXCNTEV Controls When the Auxiliary Counter Counts 12 2 read-write NONE Never counts. 0x00000000 UP Counts up on up-count events. 0x00000001 DOWN Counts up on down-count events. 0x00000002 BOTH Counts up on both up-count and down-count events. 0x00000003 CNTDIR Non-Quadrature Mode Counter Direction Control 14 1 read-write EDGE Edge Select 15 1 read-write TCCMODE Sets the Mode for Triggered Compare and Clear 16 2 read-write DISABLED Triggered compare and clear not enabled. 0x00000000 LFA Compare and clear performed on each (optionally prescaled) LFA clock cycle. 0x00000001 PRS Compare and clear performed on positive PRS edges. 0x00000002 TCCPRESC Set the LFA Prescaler for Triggered Compare and Clear 19 2 read-write DIV1 Compare and clear event each LFA cycle. 0x00000000 DIV2 Compare and clear performed on every other LFA cycle. 0x00000001 DIV4 Compare and clear performed on every 4th LFA cycle. 0x00000002 DIV8 Compare and clear performed on every 8th LFA cycle. 0x00000003 TCCCOMP Triggered Compare and Clear Compare Mode 22 2 read-write LTOE Compare match if PCNT_CNT is less than, or equal to PCNT_TOP. 0x00000000 GTOE Compare match if PCNT_CNT is greater than or equal to PCNT_TOP. 0x00000001 RANGE Compare match if PCNT_CNT is less than, or equal to PCNT_TOP[15:8]], and greater than, or equal to PCNT_TOP[7:0]. 0x00000002 PRSGATEEN PRS Gate Enable 24 1 read-write TCCPRSPOL TCC PRS Polarity Select 25 1 read-write TCCPRSSEL TCC PRS Channel Select 26 4 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B TOPBHFSEL TOPB High Frequency Value Select 31 1 read-write CMD Command Register 0x004 32 write-only 0x00000000 0x00000003 LCNTIM Load CNT Immediately 0 1 write-only LTOPBIM Load TOPB Immediately 1 1 write-only STATUS Status Register 0x008 32 read-only 0x00000000 0x00000001 DIR Current Counter Direction 0 1 read-only CNT Counter Value Register 0x00C 32 read-only 0x00000000 0x0000FFFF CNT Counter Value 0 16 read-only TOP Top Value Register 0x010 32 read-only 0x000000FF 0x0000FFFF TOP Counter Top Value 0 16 read-only TOPB Top Value Buffer Register 0x014 32 read-write 0x000000FF 0x0000FFFF TOPB Counter Top Buffer 0 16 read-write IF Interrupt Flag Register 0x018 32 read-only 0x00000000 0x0000003F UF Underflow Interrupt Read Flag 0 1 read-only OF Overflow Interrupt Read Flag 1 1 read-only DIRCNG Direction Change Detect Interrupt Flag 2 1 read-only AUXOF Auxiliary Overflow Interrupt Read Flag 3 1 read-only TCC Triggered Compare Interrupt Read Flag 4 1 read-only OQSTERR Oversampling Quadrature State Error Interrupt 5 1 read-only IFS Interrupt Flag Set Register 0x01C 32 write-only 0x00000000 0x0000003F UF Set UF Interrupt Flag 0 1 write-only OF Set OF Interrupt Flag 1 1 write-only DIRCNG Set DIRCNG Interrupt Flag 2 1 write-only AUXOF Set AUXOF Interrupt Flag 3 1 write-only TCC Set TCC Interrupt Flag 4 1 write-only OQSTERR Set OQSTERR Interrupt Flag 5 1 write-only IFC Interrupt Flag Clear Register 0x020 32 write-only 0x00000000 0x0000003F UF Clear UF Interrupt Flag 0 1 write-only OF Clear OF Interrupt Flag 1 1 write-only DIRCNG Clear DIRCNG Interrupt Flag 2 1 write-only AUXOF Clear AUXOF Interrupt Flag 3 1 write-only TCC Clear TCC Interrupt Flag 4 1 write-only OQSTERR Clear OQSTERR Interrupt Flag 5 1 write-only IEN Interrupt Enable Register 0x024 32 read-write 0x00000000 0x0000003F UF UF Interrupt Enable 0 1 read-write OF OF Interrupt Enable 1 1 read-write DIRCNG DIRCNG Interrupt Enable 2 1 read-write AUXOF AUXOF Interrupt Enable 3 1 read-write TCC TCC Interrupt Enable 4 1 read-write OQSTERR OQSTERR Interrupt Enable 5 1 read-write ROUTELOC0 I/O Routing Location Register 0x02C 32 read-write 0x00000000 0x00003F3F S0INLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F S1INLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F FREEZE Freeze Register 0x040 32 read-write 0x00000000 0x00000001 REGFREEZE Register Update Freeze 0 1 read-write SYNCBUSY Synchronization Busy Register 0x044 32 read-only 0x00000000 0x0000000F CTRL CTRL Register Busy 0 1 read-only CMD CMD Register Busy 1 1 read-only TOPB TOPB Register Busy 2 1 read-only OVSCFG OVSCFG Register Busy 3 1 read-only AUXCNT Auxiliary Counter Value Register 0x064 32 read-only 0x00000000 0x0000FFFF AUXCNT Auxiliary Counter Value 0 16 read-only INPUT PCNT Input Register 0x068 32 read-write 0x00000000 0x00000BEF S0PRSSEL S0IN PRS Channel Select 0 4 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B S0PRSEN S0IN PRS Enable 5 1 read-write S1PRSSEL S1IN PRS Channel Select 6 4 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B S1PRSEN S1IN PRS Enable 11 1 read-write OVSCFG Oversampling Config Register 0x06C 32 read-write 0x00000000 0x000010FF FILTLEN Configure Filter Length for Inputs S0IN and S1IN 0 8 read-write FLUTTERRM Flutter Remove 12 1 read-write I2C0 5.8.2 I2C0 0x4000C000 0 0x00000400 registers I2C0 16 CTRL Control Register 0x000 32 read-write 0x00000000 0x0007B3FF EN I2C Enable 0 1 read-write SLAVE Addressable as Slave 1 1 read-write AUTOACK Automatic Acknowledge 2 1 read-write AUTOSE Automatic STOP When Empty 3 1 read-write AUTOSN Automatic STOP on NACK 4 1 read-write ARBDIS Arbitration Disable 5 1 read-write GCAMEN General Call Address Match Enable 6 1 read-write TXBIL TX Buffer Interrupt Level 7 1 read-write CLHR Clock Low High Ratio 8 2 read-write STANDARD The ratio between low period and high period counters (Nlow:Nhigh) is 4:4 0x00000000 ASYMMETRIC The ratio between low period and high period counters (Nlow:Nhigh) is 6:3 0x00000001 FAST The ratio between low period and high period counters (Nlow:Nhigh) is 11:6 0x00000002 BITO Bus Idle Timeout 12 2 read-write OFF Timeout disabled 0x00000000 40PCC Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. 0x00000001 80PCC Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. 0x00000002 160PCC Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. 0x00000003 GIBITO Go Idle on Bus Idle Timeout 15 1 read-write CLTO Clock Low Timeout 16 3 read-write OFF Timeout disabled 0x00000000 40PCC Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. 0x00000001 80PCC Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. 0x00000002 160PCC Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. 0x00000003 320PCC Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout. 0x00000004 1024PCC Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout. 0x00000005 CMD Command Register 0x004 32 write-only 0x00000000 0x000000FF START Send Start Condition 0 1 write-only STOP Send Stop Condition 1 1 write-only ACK Send ACK 2 1 write-only NACK Send NACK 3 1 write-only CONT Continue Transmission 4 1 write-only ABORT Abort Transmission 5 1 write-only CLEARTX Clear TX 6 1 write-only CLEARPC Clear Pending Commands 7 1 write-only STATE State Register 0x008 32 read-only 0x00000001 0x000000FF BUSY Bus Busy 0 1 read-only MASTER Master 1 1 read-only TRANSMITTER Transmitter 2 1 read-only NACKED Nack Received 3 1 read-only BUSHOLD Bus Held 4 1 read-only STATE Transmission State 5 3 read-only IDLE No transmission is being performed. 0x00000000 WAIT Waiting for idle. Will send a start condition as soon as the bus is idle. 0x00000001 START Start transmitted or received 0x00000002 ADDR Address transmitted or received 0x00000003 ADDRACK Address ack/nack transmitted or received 0x00000004 DATA Data transmitted or received 0x00000005 DATAACK Data ack/nack transmitted or received 0x00000006 STATUS Status Register 0x00C 32 read-only 0x00000080 0x000003FF PSTART Pending START 0 1 read-only PSTOP Pending STOP 1 1 read-only PACK Pending ACK 2 1 read-only PNACK Pending NACK 3 1 read-only PCONT Pending Continue 4 1 read-only PABORT Pending Abort 5 1 read-only TXC TX Complete 6 1 read-only TXBL TX Buffer Level 7 1 read-only RXDATAV RX Data Valid 8 1 read-only RXFULL RX FIFO Full 9 1 read-only CLKDIV Clock Division Register 0x010 32 read-write 0x00000000 0x000001FF DIV Clock Divider 0 9 read-write SADDR Slave Address Register 0x014 32 read-write 0x00000000 0x000000FE ADDR Slave Address 1 7 read-write SADDRMASK Slave Address Mask Register 0x018 32 read-write 0x00000000 0x000000FE MASK Slave Address Mask 1 7 read-write RXDATA Receive Buffer Data Register 0x01C 32 read-only 0x00000000 0x000000FF modifyExternal RXDATA RX Data 0 8 read-only RXDOUBLE Receive Buffer Double Data Register 0x020 32 read-only 0x00000000 0x0000FFFF modifyExternal RXDATA0 RX Data 0 0 8 read-only RXDATA1 RX Data 1 8 8 read-only RXDATAP Receive Buffer Data Peek Register 0x024 32 read-only 0x00000000 0x000000FF RXDATAP RX Data Peek 0 8 read-only RXDOUBLEP Receive Buffer Double Data Peek Register 0x028 32 read-only 0x00000000 0x0000FFFF RXDATAP0 RX Data 0 Peek 0 8 read-only RXDATAP1 RX Data 1 Peek 8 8 read-only TXDATA Transmit Buffer Data Register 0x02C 32 read-write 0x00000000 0x000000FF TXDATA TX Data 0 8 read-write TXDOUBLE Transmit Buffer Double Data Register 0x030 32 read-write 0x00000000 0x0000FFFF TXDATA0 TX Data 0 8 read-write TXDATA1 TX Data 8 8 read-write IF Interrupt Flag Register 0x034 32 read-only 0x00000010 0x0007FFFF START START Condition Interrupt Flag 0 1 read-only RSTART Repeated START Condition Interrupt Flag 1 1 read-only ADDR Address Interrupt Flag 2 1 read-only TXC Transfer Completed Interrupt Flag 3 1 read-only TXBL Transmit Buffer Level Interrupt Flag 4 1 read-only RXDATAV Receive Data Valid Interrupt Flag 5 1 read-only ACK Acknowledge Received Interrupt Flag 6 1 read-only NACK Not Acknowledge Received Interrupt Flag 7 1 read-only MSTOP Master STOP Condition Interrupt Flag 8 1 read-only ARBLOST Arbitration Lost Interrupt Flag 9 1 read-only BUSERR Bus Error Interrupt Flag 10 1 read-only BUSHOLD Bus Held Interrupt Flag 11 1 read-only TXOF Transmit Buffer Overflow Interrupt Flag 12 1 read-only RXUF Receive Buffer Underflow Interrupt Flag 13 1 read-only BITO Bus Idle Timeout Interrupt Flag 14 1 read-only CLTO Clock Low Timeout Interrupt Flag 15 1 read-only SSTOP Slave STOP Condition Interrupt Flag 16 1 read-only RXFULL Receive Buffer Full Interrupt Flag 17 1 read-only CLERR Clock Low Error Interrupt Flag 18 1 read-only IFS Interrupt Flag Set Register 0x038 32 write-only 0x00000000 0x0007FFCF START Set START Interrupt Flag 0 1 write-only RSTART Set RSTART Interrupt Flag 1 1 write-only ADDR Set ADDR Interrupt Flag 2 1 write-only TXC Set TXC Interrupt Flag 3 1 write-only ACK Set ACK Interrupt Flag 6 1 write-only NACK Set NACK Interrupt Flag 7 1 write-only MSTOP Set MSTOP Interrupt Flag 8 1 write-only ARBLOST Set ARBLOST Interrupt Flag 9 1 write-only BUSERR Set BUSERR Interrupt Flag 10 1 write-only BUSHOLD Set BUSHOLD Interrupt Flag 11 1 write-only TXOF Set TXOF Interrupt Flag 12 1 write-only RXUF Set RXUF Interrupt Flag 13 1 write-only BITO Set BITO Interrupt Flag 14 1 write-only CLTO Set CLTO Interrupt Flag 15 1 write-only SSTOP Set SSTOP Interrupt Flag 16 1 write-only RXFULL Set RXFULL Interrupt Flag 17 1 write-only CLERR Set CLERR Interrupt Flag 18 1 write-only IFC Interrupt Flag Clear Register 0x03C 32 write-only 0x00000000 0x0007FFCF START Clear START Interrupt Flag 0 1 write-only RSTART Clear RSTART Interrupt Flag 1 1 write-only ADDR Clear ADDR Interrupt Flag 2 1 write-only TXC Clear TXC Interrupt Flag 3 1 write-only ACK Clear ACK Interrupt Flag 6 1 write-only NACK Clear NACK Interrupt Flag 7 1 write-only MSTOP Clear MSTOP Interrupt Flag 8 1 write-only ARBLOST Clear ARBLOST Interrupt Flag 9 1 write-only BUSERR Clear BUSERR Interrupt Flag 10 1 write-only BUSHOLD Clear BUSHOLD Interrupt Flag 11 1 write-only TXOF Clear TXOF Interrupt Flag 12 1 write-only RXUF Clear RXUF Interrupt Flag 13 1 write-only BITO Clear BITO Interrupt Flag 14 1 write-only CLTO Clear CLTO Interrupt Flag 15 1 write-only SSTOP Clear SSTOP Interrupt Flag 16 1 write-only RXFULL Clear RXFULL Interrupt Flag 17 1 write-only CLERR Clear CLERR Interrupt Flag 18 1 write-only IEN Interrupt Enable Register 0x040 32 read-write 0x00000000 0x0007FFFF START START Interrupt Enable 0 1 read-write RSTART RSTART Interrupt Enable 1 1 read-write ADDR ADDR Interrupt Enable 2 1 read-write TXC TXC Interrupt Enable 3 1 read-write TXBL TXBL Interrupt Enable 4 1 read-write RXDATAV RXDATAV Interrupt Enable 5 1 read-write ACK ACK Interrupt Enable 6 1 read-write NACK NACK Interrupt Enable 7 1 read-write MSTOP MSTOP Interrupt Enable 8 1 read-write ARBLOST ARBLOST Interrupt Enable 9 1 read-write BUSERR BUSERR Interrupt Enable 10 1 read-write BUSHOLD BUSHOLD Interrupt Enable 11 1 read-write TXOF TXOF Interrupt Enable 12 1 read-write RXUF RXUF Interrupt Enable 13 1 read-write BITO BITO Interrupt Enable 14 1 read-write CLTO CLTO Interrupt Enable 15 1 read-write SSTOP SSTOP Interrupt Enable 16 1 read-write RXFULL RXFULL Interrupt Enable 17 1 read-write CLERR CLERR Interrupt Enable 18 1 read-write ROUTEPEN I/O Routing Pin Enable Register 0x044 32 read-write 0x00000000 0x00000003 SDAPEN SDA Pin Enable 0 1 read-write SCLPEN SCL Pin Enable 1 1 read-write ROUTELOC0 I/O Routing Location Register 0x048 32 read-write 0x00000000 0x00003F3F SDALOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F SCLLOC I/O Location 8 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F ADC0 5.8.2 ADC0 0x40002000 0 0x00000400 registers ADC0 14 CTRL Control Register 0x000 32 read-write 0x001F0000 0x2F7F7FDF WARMUPMODE Warm-up Mode 0 2 read-write NORMAL ADC is shut down after each conversion. 5us warmup time is used before each conversion. 0x00000000 KEEPINSTANDBY ADC is kept in standby mode between conversions. 1us warmup time is used before each conversion. 0x00000001 KEEPINSLOWACC ADC is kept in slow acquisition mode between conversions. 1us warmup time is used before each conversion. 0x00000002 KEEPADCWARM ADC is kept on after conversions, allowing for continuous conversion. 0x00000003 SINGLEDMAWU SINGLEFIFO DMA Wakeup 2 1 read-write SCANDMAWU SCANFIFO DMA Wakeup 3 1 read-write TAILGATE Conversion Tailgating 4 1 read-write ASYNCCLKEN Selects ASYNC CLK Enable Mode When ADCCLKMODE=1 6 1 read-write ADCCLKMODE ADC Clock Mode 7 1 read-write PRESC Prescalar Setting for ADC Sample and Conversion Clock 8 7 read-write NODIVISION 0x00000000 TIMEBASE 1us Time Base 16 7 read-write OVSRSEL Oversample Rate Select 24 4 read-write X2 2 samples for each conversion result 0x00000000 X4 4 samples for each conversion result 0x00000001 X8 8 samples for each conversion result 0x00000002 X16 16 samples for each conversion result 0x00000003 X32 32 samples for each conversion result 0x00000004 X64 64 samples for each conversion result 0x00000005 X128 128 samples for each conversion result 0x00000006 X256 256 samples for each conversion result 0x00000007 X512 512 samples for each conversion result 0x00000008 X1024 1024 samples for each conversion result 0x00000009 X2048 2048 samples for each conversion result 0x0000000A X4096 4096 samples for each conversion result 0x0000000B CHCONMODE Channel Connect 29 1 read-write CMD Command Register 0x008 32 write-only 0x00000000 0x0000000F SINGLESTART Single Channel Conversion Start 0 1 write-only SINGLESTOP Single Channel Conversion Stop 1 1 write-only SCANSTART Scan Sequence Start 2 1 write-only SCANSTOP Scan Sequence Stop 3 1 write-only STATUS Status Register 0x00C 32 read-only 0x00000000 0x00031F03 SINGLEACT Single Channel Conversion Active 0 1 read-only SCANACT Scan Conversion Active 1 1 read-only SINGLEREFWARM Single Channel Reference Warmed Up 8 1 read-only SCANREFWARM Scan Reference Warmed Up 9 1 read-only PROGERR Programming Error Status 10 2 read-only BUSCONF 0x00000001 NEGSELCONF 0x00000002 WARM ADC Warmed Up 12 1 read-only SINGLEDV Single Channel Data Valid 16 1 read-only SCANDV Scan Data Valid 17 1 read-only SINGLECTRL Single Channel Control Register 0x010 32 read-write 0x00FFFF00 0xAFFFFFFF REP Single Channel Repetitive Mode 0 1 read-write DIFF Single Channel Differential Mode 1 1 read-write ADJ Single Channel Result Adjustment 2 1 read-write RES Single Channel Resolution Select 3 2 read-write 12BIT 12-bit resolution. 0x00000000 8BIT 8-bit resolution. 0x00000001 6BIT 6-bit resolution. 0x00000002 OVS Oversampling enabled. Oversampling rate is set in OVSRSEL. 0x00000003 REF Single Channel Reference Selection 5 3 read-write 1V25 VFS = 1.25V with internal VBGR reference 0x00000000 2V5 VFS = 2.5V with internal VBGR reference 0x00000001 VDD VFS = AVDD with AVDD as reference source 0x00000002 5V VFS = 5V with internal VBGR reference 0x00000003 EXTSINGLE Single ended external reference 0x00000004 2XEXTDIFF Differential external reference, 2x 0x00000005 2XVDD VFS = 2xAVDD with AVDD as the reference source 0x00000006 CONF Use SINGLECTRLX to configure reference 0x00000007 POSSEL Single Channel Positive Input Selection 8 8 read-write NEGSEL Single Channel Negative Input Selection 16 8 read-write AT Single Channel Acquisition Time 24 4 read-write 1CYCLE 1 conversion clock cycle acquisition time for single channel 0x00000000 2CYCLES 2 conversion clock cycles acquisition time for single channel 0x00000001 3CYCLES 3 conversion clock cycles acquisition time for single channel 0x00000002 4CYCLES 4 conversion clock cycles acquisition time for single channel 0x00000003 8CYCLES 8 conversion clock cycles acquisition time for single channel 0x00000004 16CYCLES 16 conversion clock cycles acquisition time for single channel 0x00000005 32CYCLES 32 conversion clock cycles acquisition time for single channel 0x00000006 64CYCLES 64 conversion clock cycles acquisition time for single channel 0x00000007 128CYCLES 128 conversion clock cycles acquisition time for single channel 0x00000008 256CYCLES 256 conversion clock cycles acquisition time for single channel 0x00000009 PRSEN Single Channel PRS Trigger Enable 29 1 read-write CMPEN Compare Logic Enable for Single Channel 31 1 read-write SINGLECTRLX Single Channel Control Register Continued 0x014 32 read-write 0x00000000 0x0F1F7FFF VREFSEL Single Channel Reference Selection 0 3 read-write VBGR Internal 0.83V Bandgap reference 0x00000000 VDDXWATT Scaled AVDD: AVDD*(the VREF attenuation factor) 0x00000001 VREFPWATT Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) 0x00000002 VREFP Raw single ended external Vref: ADCn_EXTP 0x00000003 VENTROPY Special mode used to generate ENTROPY. 0x00000004 VREFPNWATT Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) 0x00000005 VREFPN Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) 0x00000006 VBGRLOW Internal Bandgap reference at low setting 0.78V 0x00000007 VREFATTFIX Enable Fixed Scaling on VREF 3 1 read-write VREFATT Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5 4 4 read-write VINATT Code for VIN Attenuation Factor 8 4 read-write DVL Single Channel DV Level Select 12 2 read-write FIFOOFACT Single Channel FIFO Overflow Action 14 1 read-write PRSMODE Single Channel PRS Trigger Mode 16 1 read-write PRSSEL Single Channel PRS Trigger Select 17 4 read-write PRSCH0 PRS ch 0 triggers single channel 0x00000000 PRSCH1 PRS ch 1 triggers single channel 0x00000001 PRSCH2 PRS ch 2 triggers single channel 0x00000002 PRSCH3 PRS ch 3 triggers single channel 0x00000003 PRSCH4 PRS ch 4 triggers single channel 0x00000004 PRSCH5 PRS ch 5 triggers single channel 0x00000005 PRSCH6 PRS ch 6 triggers single channel 0x00000006 PRSCH7 PRS ch 7 triggers single channel 0x00000007 PRSCH8 PRS ch 8 triggers single channel 0x00000008 PRSCH9 PRS ch 9 triggers single channel 0x00000009 PRSCH10 PRS ch 10 triggers single channel 0x0000000A PRSCH11 PRS ch 11 triggers single channel 0x0000000B CONVSTARTDELAY Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set 24 3 read-write CONVSTARTDELAYEN Enable Delaying Next Conversion Start 27 1 read-write SCANCTRL Scan Control Register 0x018 32 read-write 0x00000000 0xAF0000FF REP Scan Sequence Repetitive Mode 0 1 read-write DIFF Scan Sequence Differential Mode 1 1 read-write ADJ Scan Sequence Result Adjustment 2 1 read-write RES Scan Sequence Resolution Select 3 2 read-write 12BIT 12-bit resolution 0x00000000 8BIT 8-bit resolution 0x00000001 6BIT 6-bit resolution 0x00000002 OVS Oversampling enabled. Oversampling rate is set in OVSRSEL 0x00000003 REF Scan Sequence Reference Selection 5 3 read-write 1V25 VFS = 1.25V with internal VBGR reference 0x00000000 2V5 VFS = 2.5V with internal VBGR reference 0x00000001 VDD VFS = AVDD with AVDD as reference source 0x00000002 5V VFS = 5V with internal VBGR reference 0x00000003 EXTSINGLE Single ended external reference 0x00000004 2XEXTDIFF Differential external reference, 2x 0x00000005 2XVDD VFS=2xAVDD with AVDD as the reference source 0x00000006 CONF Use SCANCTRLX to configure reference 0x00000007 AT Scan Acquisition Time 24 4 read-write 1CYCLE 1 conversion clock cycle acquisition time for scan 0x00000000 2CYCLES 2 conversion clock cycles acquisition time for scan 0x00000001 3CYCLES 3 conversion clock cycles acquisition time for scan 0x00000002 4CYCLES 4 conversion clock cycles acquisition time for scan 0x00000003 8CYCLES 8 conversion clock cycles acquisition time for scan 0x00000004 16CYCLES 16 conversion clock cycles acquisition time for scan 0x00000005 32CYCLES 32 conversion clock cycles acquisition time for scan 0x00000006 64CYCLES 64 conversion clock cycles acquisition time for scan 0x00000007 128CYCLES 128 conversion clock cycles acquisition time for scan 0x00000008 256CYCLES 256 conversion clock cycles acquisition time for scan 0x00000009 PRSEN Scan Sequence PRS Trigger Enable 29 1 read-write CMPEN Compare Logic Enable for Scan 31 1 read-write SCANCTRLX Scan Control Register Continued 0x01C 32 read-write 0x00000000 0x0F1F7FFF VREFSEL Scan Channel Reference Selection 0 3 read-write VBGR Internal 0.83V Bandgap reference 0x00000000 VDDXWATT Scaled AVDD: AVDD*(the VREF attenuation factor) 0x00000001 VREFPWATT Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) 0x00000002 VREFP Raw single ended external Vref: ADCn_EXTP 0x00000003 VREFPNWATT Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) 0x00000005 VREFPN Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) 0x00000006 VBGRLOW Internal Bandgap reference at low setting 0.78V 0x00000007 VREFATTFIX Enable Fixed Scaling on VREF 3 1 read-write VREFATT Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5 4 4 read-write VINATT Code for VIN Attenuation Factor 8 4 read-write DVL Scan DV Level Select 12 2 read-write FIFOOFACT Scan FIFO Overflow Action 14 1 read-write PRSMODE Scan PRS Trigger Mode 16 1 read-write PRSSEL Scan Sequence PRS Trigger Select 17 4 read-write PRSCH0 PRS ch 0 triggers scan sequence 0x00000000 PRSCH1 PRS ch 1 triggers scan sequence 0x00000001 PRSCH2 PRS ch 2 triggers scan sequence 0x00000002 PRSCH3 PRS ch 3 triggers scan sequence 0x00000003 PRSCH4 PRS ch 4 triggers scan sequence 0x00000004 PRSCH5 PRS ch 5 triggers scan sequence 0x00000005 PRSCH6 PRS ch 6 triggers scan sequence 0x00000006 PRSCH7 PRS ch 7 triggers scan sequence 0x00000007 PRSCH8 PRS ch 8 triggers scan sequence 0x00000008 PRSCH9 PRS ch 9 triggers scan sequence 0x00000009 PRSCH10 PRS ch 10 triggers scan sequence 0x0000000A PRSCH11 PRS ch 11 triggers scan sequence 0x0000000B CONVSTARTDELAY Delay Next Conversion Start If CONVSTARTDELAYEN is Set 24 3 read-write CONVSTARTDELAYEN Enable Delaying Next Conversion Start 27 1 read-write SCANMASK Scan Sequence Input Mask Register 0x020 32 read-write 0x00000000 0xFFFFFFFF SCANINPUTEN Scan Sequence Input Mask 0 32 read-write SCANINPUTSEL Input Selection Register for Scan Mode 0x024 32 read-write 0x00000000 0x1F1F1F1F INPUT0TO7SEL Inputs Chosen for ADCn_INPUT7-ADCn_INPUT0 as Referred in SCANMASK 0 5 read-write APORT0CH0TO7 0x00000000 APORT0CH8TO15 0x00000001 APORT1CH0TO7 0x00000004 APORT1CH8TO15 0x00000005 APORT1CH16TO23 0x00000006 APORT1CH24TO31 0x00000007 APORT2CH0TO7 0x00000008 APORT2CH8TO15 0x00000009 APORT2CH16TO23 0x0000000A APORT2CH24TO31 0x0000000B APORT3CH0TO7 0x0000000C APORT3CH8TO15 0x0000000D APORT3CH16TO23 0x0000000E APORT3CH24TO31 0x0000000F APORT4CH0TO7 0x00000010 APORT4CH8TO15 0x00000011 APORT4CH16TO23 0x00000012 APORT4CH24TO31 0x00000013 INPUT8TO15SEL Inputs Chosen for ADCn_INPUT8-ADCn_INPUT15 as Referred in SCANMASK 8 5 read-write APORT0CH0TO7 0x00000000 APORT0CH8TO15 0x00000001 APORT1CH0TO7 0x00000004 APORT1CH8TO15 0x00000005 APORT1CH16TO23 0x00000006 APORT1CH24TO31 0x00000007 APORT2CH0TO7 0x00000008 APORT2CH8TO15 0x00000009 APORT2CH16TO23 0x0000000A APORT2CH24TO31 0x0000000B APORT3CH0TO7 0x0000000C APORT3CH8TO15 0x0000000D APORT3CH16TO23 0x0000000E APORT3CH24TO31 0x0000000F APORT4CH0TO7 0x00000010 APORT4CH8TO15 0x00000011 APORT4CH16TO23 0x00000012 APORT4CH24TO31 0x00000013 INPUT16TO23SEL Inputs Chosen for ADCn_INPUT16-ADCn_INPUT23 as Referred in SCANMASK 16 5 read-write APORT0CH0TO7 0x00000000 APORT0CH8TO15 0x00000001 APORT1CH0TO7 0x00000004 APORT1CH8TO15 0x00000005 APORT1CH16TO23 0x00000006 APORT1CH24TO31 0x00000007 APORT2CH0TO7 0x00000008 APORT2CH8TO15 0x00000009 APORT2CH16TO23 0x0000000A APORT2CH24TO31 0x0000000B APORT3CH0TO7 0x0000000C APORT3CH8TO15 0x0000000D APORT3CH16TO23 0x0000000E APORT3CH24TO31 0x0000000F APORT4CH0TO7 0x00000010 APORT4CH8TO15 0x00000011 APORT4CH16TO23 0x00000012 APORT4CH24TO31 0x00000013 INPUT24TO31SEL Inputs Chosen for ADCn_INPUT24-ADCn_INPUT31 as Referred in SCANMASK 24 5 read-write APORT0CH0TO7 0x00000000 APORT0CH8TO15 0x00000001 APORT1CH0TO7 0x00000004 APORT1CH8TO15 0x00000005 APORT1CH16TO23 0x00000006 APORT1CH24TO31 0x00000007 APORT2CH0TO7 0x00000008 APORT2CH8TO15 0x00000009 APORT2CH16TO23 0x0000000A APORT2CH24TO31 0x0000000B APORT3CH0TO7 0x0000000C APORT3CH8TO15 0x0000000D APORT3CH16TO23 0x0000000E APORT3CH24TO31 0x0000000F APORT4CH0TO7 0x00000010 APORT4CH8TO15 0x00000011 APORT4CH16TO23 0x00000012 APORT4CH24TO31 0x00000013 SCANNEGSEL Negative Input Select Register for Scan 0x028 32 read-write 0x000039E4 0x0000FFFF INPUT0NEGSEL Negative Input Select Register for ADCn_INPUT0 in Differential Scan Mode 0 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT2NEGSEL Negative Input Select Register for ADCn_INPUT2 in Differential Scan Mode 2 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT4NEGSEL Negative Input Select Register for ADCn_INPUT4 in Differential Scan Mode 4 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT6NEGSEL Negative Input Select Register for ADCn_INPUT1 in Differential Scan Mode 6 2 read-write INPUT1 Selects ADCn_INPUT1 as negative channel input 0x00000000 INPUT3 Selects ADCn_INPUT3 as negative channel input 0x00000001 INPUT5 Selects ADCn_INPUT5 as negative channel input 0x00000002 INPUT7 Selects ADCn_INPUT7 as negative channel input 0x00000003 INPUT9NEGSEL Negative Input Select Register for ADCn_INPUT9 in Differential Scan Mode 8 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 INPUT11NEGSEL Negative Input Select Register for ADCn_INPUT11 in Differential Scan Mode 10 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 INPUT13NEGSEL Negative Input Select Register for ADCn_INPUT13 in Differential Scan Mode 12 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 INPUT15NEGSEL Negative Input Select Register for ADCn_INPUT15 in Differential Scan Mode 14 2 read-write INPUT8 Selects ADCn_INPUT8 as negative channel input 0x00000000 INPUT10 Selects ADCn_INPUT10 as negative channel input 0x00000001 INPUT12 Selects ADCn_INPUT12 as negative channel input 0x00000002 INPUT14 Selects ADCn_INPUT14 as negative channel input 0x00000003 CMPTHR Compare Threshold Register 0x02C 32 read-write 0x00000000 0xFFFFFFFF ADLT Less Than Compare Threshold 0 16 read-write ADGT Greater Than Compare Threshold 16 16 read-write BIASPROG Bias Programming Register for Various Analog Blocks Used in ADC Operation 0x030 32 read-write 0x00000000 0x0001100F ADCBIASPROG Bias Programming Value of Analog ADC Block 0 4 read-write NORMAL Normal power (use for 1Msps operation) 0x00000000 SCALE2 Scaling bias to 1/2 0x00000004 SCALE4 Scaling bias to 1/4 0x00000008 SCALE8 Scaling bias to 1/8 0x0000000C SCALE16 Scaling bias to 1/16 0x0000000E SCALE32 Scaling bias to 1/32 0x0000000F VFAULTCLR Clear VREFOF Flag 12 1 read-write GPBIASACC Accuracy Setting for the System Bias During ADC Operation 16 1 read-write CAL Calibration Register 0x034 32 read-write 0x40784078 0xFFFFFFFF SINGLEOFFSET Single Mode Offset Calibration Value for Differential or Positive Single-ended Mode 0 4 read-write SINGLEOFFSETINV Single Mode Offset Calibration Value for Negative Single-ended Mode 4 4 read-write SINGLEGAIN Single Mode Gain Calibration Value 8 7 read-write OFFSETINVMODE Negative Single-ended Offset Calibration is Enabled 15 1 read-write SCANOFFSET Scan Mode Offset Calibration Value for Differential or Positive Single-ended Mode 16 4 read-write SCANOFFSETINV Scan Mode Offset Calibration Value for Negative Single-ended Mode 20 4 read-write SCANGAIN Scan Mode Gain Calibration Value 24 7 read-write CALEN Calibration Mode is Enabled 31 1 read-write IF Interrupt Flag Register 0x038 32 read-only 0x00000000 0x03030F03 SINGLE Single Conversion Complete Interrupt Flag 0 1 read-only SCAN Scan Conversion Complete Interrupt Flag 1 1 read-only SINGLEOF Single FIFO Overflow Interrupt Flag 8 1 read-only SCANOF Scan FIFO Overflow Interrupt Flag 9 1 read-only SINGLEUF Single FIFO Underflow Interrupt Flag 10 1 read-only SCANUF Scan FIFO Underflow Interrupt Flag 11 1 read-only SINGLECMP Single Result Compare Match Interrupt Flag 16 1 read-only SCANCMP Scan Result Compare Match Interrupt Flag 17 1 read-only VREFOV VREF Over Voltage Interrupt Flag 24 1 read-only PROGERR Programming Error Interrupt Flag 25 1 read-only IFS Interrupt Flag Set Register 0x03C 32 write-only 0x00000000 0x03030F00 SINGLEOF Set SINGLEOF Interrupt Flag 8 1 write-only SCANOF Set SCANOF Interrupt Flag 9 1 write-only SINGLEUF Set SINGLEUF Interrupt Flag 10 1 write-only SCANUF Set SCANUF Interrupt Flag 11 1 write-only SINGLECMP Set SINGLECMP Interrupt Flag 16 1 write-only SCANCMP Set SCANCMP Interrupt Flag 17 1 write-only VREFOV Set VREFOV Interrupt Flag 24 1 write-only PROGERR Set PROGERR Interrupt Flag 25 1 write-only IFC Interrupt Flag Clear Register 0x040 32 write-only 0x00000000 0x03030F00 SINGLEOF Clear SINGLEOF Interrupt Flag 8 1 write-only SCANOF Clear SCANOF Interrupt Flag 9 1 write-only SINGLEUF Clear SINGLEUF Interrupt Flag 10 1 write-only SCANUF Clear SCANUF Interrupt Flag 11 1 write-only SINGLECMP Clear SINGLECMP Interrupt Flag 16 1 write-only SCANCMP Clear SCANCMP Interrupt Flag 17 1 write-only VREFOV Clear VREFOV Interrupt Flag 24 1 write-only PROGERR Clear PROGERR Interrupt Flag 25 1 write-only IEN Interrupt Enable Register 0x044 32 read-write 0x00000000 0x03030F03 SINGLE SINGLE Interrupt Enable 0 1 read-write SCAN SCAN Interrupt Enable 1 1 read-write SINGLEOF SINGLEOF Interrupt Enable 8 1 read-write SCANOF SCANOF Interrupt Enable 9 1 read-write SINGLEUF SINGLEUF Interrupt Enable 10 1 read-write SCANUF SCANUF Interrupt Enable 11 1 read-write SINGLECMP SINGLECMP Interrupt Enable 16 1 read-write SCANCMP SCANCMP Interrupt Enable 17 1 read-write VREFOV VREFOV Interrupt Enable 24 1 read-write PROGERR PROGERR Interrupt Enable 25 1 read-write SINGLEDATA Single Conversion Result Data 0x048 32 read-only 0x00000000 0xFFFFFFFF modifyExternal DATA Single Conversion Result Data 0 32 read-only SCANDATA Scan Conversion Result Data 0x04C 32 read-only 0x00000000 0xFFFFFFFF modifyExternal DATA Scan Conversion Result Data 0 32 read-only SINGLEDATAP Single Conversion Result Data Peek Register 0x050 32 read-only 0x00000000 0xFFFFFFFF DATAP Single Conversion Result Data Peek 0 32 read-only SCANDATAP Scan Sequence Result Data Peek Register 0x054 32 read-only 0x00000000 0xFFFFFFFF DATAP Scan Conversion Result Data Peek 0 32 read-only SCANDATAX Scan Sequence Result Data + Data Source Register 0x068 32 read-only 0x00000000 0x001FFFFF modifyExternal DATA Scan Conversion Result Data 0 16 read-only SCANINPUTID Scan Conversion Input ID 16 5 read-only SCANDATAXP Scan Sequence Result Data + Data Source Peek Register 0x06C 32 read-only 0x00000000 0x001FFFFF DATAP Scan Conversion Result Data Peek 0 16 read-only SCANINPUTIDPEEK Scan Conversion Data Source Peek 16 5 read-only APORTREQ APORT Request Status Register 0x07C 32 read-only 0x00000000 0x000003FF APORT0XREQ 1 If the Bus Connected to APORT0X is Requested 0 1 read-only APORT0YREQ 1 If the Bus Connected to APORT0Y is Requested 1 1 read-only APORT1XREQ 1 If the Bus Connected to APORT1X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1Y is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only APORTCONFLICT APORT Conflict Status Register 0x080 32 read-only 0x00000000 0x000003FF APORT0XCONFLICT 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral 0 1 read-only APORT0YCONFLICT 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral 1 1 read-only APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only SINGLEFIFOCOUNT Single FIFO Count Register 0x084 32 read-only 0x00000000 0x00000007 SINGLEDC Single Data Count 0 3 read-only SCANFIFOCOUNT Scan FIFO Count Register 0x088 32 read-only 0x00000000 0x00000007 SCANDC Scan Data Count 0 3 read-only SINGLEFIFOCLEAR Single FIFO Clear Register 0x08C 32 write-only 0x00000000 0x00000001 SINGLEFIFOCLEAR Clear Single FIFO Content 0 1 write-only SCANFIFOCLEAR Scan FIFO Clear Register 0x090 32 write-only 0x00000000 0x00000001 SCANFIFOCLEAR Clear Scan FIFO Content 0 1 write-only APORTMASTERDIS APORT Bus Master Disable Register 0x094 32 read-write 0x00000000 0x000003FC APORT1XMASTERDIS APORT1X Master Disable 2 1 read-write APORT1YMASTERDIS APORT1Y Master Disable 3 1 read-write APORT2XMASTERDIS APORT2X Master Disable 4 1 read-write APORT2YMASTERDIS APORT2Y Master Disable 5 1 read-write APORT3XMASTERDIS APORT3X Master Disable 6 1 read-write APORT3YMASTERDIS APORT3Y Master Disable 7 1 read-write APORT4XMASTERDIS APORT4X Master Disable 8 1 read-write APORT4YMASTERDIS APORT4Y Master Disable 9 1 read-write ACMP0 5.8.2 ACMP0 0x40000000 0 0x00000400 registers ACMP0 13 CTRL Control Register 0x000 32 read-write 0x07000000 0xBF3CF70D EN Analog Comparator Enable 0 1 read-write INACTVAL Inactive Value 2 1 read-write GPIOINV Comparator GPIO Output Invert 3 1 read-write APORTXMASTERDIS APORT Bus X Master Disable 8 1 read-write APORTYMASTERDIS APORT Bus Y Master Disable 9 1 read-write APORTVMASTERDIS APORT Bus Master Disable for Bus Selected By VASEL 10 1 read-write PWRSEL Power Select 12 3 read-write AVDD AVDD supply 0x00000000 DVDD DVDD supply 0x00000001 IOVDD0 IOVDD/IOVDD0 supply 0x00000002 IOVDD1 IOVDD1 supply (if part has two I/O voltages) 0x00000004 ACCURACY ACMP Accuracy Mode 15 1 read-write INPUTRANGE Input Range 18 2 read-write FULL Setting when the input can be from 0 to ACMPVDD. 0x00000000 GTVDDDIV2 Setting when the input will always be greater than ACMPVDD/2. 0x00000001 LTVDDDIV2 Setting when the input will always be less than ACMPVDD/2. 0x00000002 IRISE Rising Edge Interrupt Sense 20 1 read-write IFALL Falling Edge Interrupt Sense 21 1 read-write BIASPROG Bias Configuration 24 6 read-write FULLBIAS Full Bias Current 31 1 read-write INPUTSEL Input Selection Register 0x004 32 read-write 0x00000000 0x757FFFFF POSSEL Positive Input Select 0 8 read-write NEGSEL Negative Input Select 8 8 read-write VASEL VA Selection 16 6 read-write VDD ACMPVDD 0x00000000 APORT2YCH0 APORT2Y Channel 0 0x00000001 APORT2YCH2 APORT2Y Channel 2 0x00000003 APORT2YCH4 APORT2Y Channel 4 0x00000005 APORT2YCH6 APORT2Y Channel 6 0x00000007 APORT2YCH8 APORT2Y Channel 8 0x00000009 APORT2YCH10 APORT2Y Channel 10 0x0000000B APORT2YCH12 APORT2Y Channel 12 0x0000000D APORT2YCH14 APORT2Y Channel 14 0x0000000F APORT2YCH16 APORT2Y Channel 16 0x00000011 APORT2YCH18 APORT2Y Channel 18 0x00000013 APORT2YCH20 APORT2Y Channel 20 0x00000015 APORT2YCH22 APORT2Y Channel 22 0x00000017 APORT2YCH24 APORT2Y Channel 24 0x00000019 APORT2YCH26 APORT2Y Channel 26 0x0000001B APORT2YCH28 APORT2Y Channel 28 0x0000001D APORT2YCH30 APORT2Y Channel 30 0x0000001F APORT1XCH0 APORT1X Channel 0 0x00000020 APORT1YCH1 APORT1Y Channel 1 0x00000021 APORT1XCH2 APORT1X Channel 2 0x00000022 APORT1YCH3 APORT1Y Channel 3 0x00000023 APORT1XCH4 APORT1X Channel 4 0x00000024 APORT1YCH5 APORT1Y Channel 5 0x00000025 APORT1XCH6 APORT1X Channel 6 0x00000026 APORT1YCH7 APORT1Y Channel 7 0x00000027 APORT1XCH8 APORT1X Channel 8 0x00000028 APORT1YCH9 APORT1Y Channel 9 0x00000029 APORT1XCH10 APORT1X Channel 10 0x0000002A APORT1YCH11 APORT1Y Channel 11 0x0000002B APORT1XCH12 APORT1X Channel 12 0x0000002C APORT1YCH13 APORT1Y Channel 13 0x0000002D APORT1XCH14 APORT1X Channel 14 0x0000002E APORT1YCH15 APORT1Y Channel 15 0x0000002F APORT1XCH16 APORT1X Channel 16 0x00000030 APORT1YCH17 APORT1Y Channel 17 0x00000031 APORT1XCH18 APORT1X Channel 18 0x00000032 APORT1YCH19 APORT1Y Channel 19 0x00000033 APORT1XCH20 APORT1X Channel 20 0x00000034 APORT1YCH21 APORT1Y Channel 21 0x00000035 APORT1XCH22 APORT1X Channel 22 0x00000036 APORT1YCH23 APORT1Y Channel 23 0x00000037 APORT1XCH24 APORT1X Channel 24 0x00000038 APORT1YCH25 APORT1Y Channel 25 0x00000039 APORT1XCH26 APORT1X Channel 26 0x0000003A APORT1YCH27 APORT1Y Channel 27 0x0000003B APORT1XCH28 APORT1X Channel 28 0x0000003C APORT1YCH29 APORT1Y Channel 29 0x0000003D APORT1XCH30 APORT1X Channel 30 0x0000003E APORT1YCH31 APORT1Y Channel 31 0x0000003F VBSEL VB Selection 22 1 read-write VLPSEL Low-Power Sampled Voltage Selection 24 1 read-write CSRESEN Capacitive Sense Mode Internal Resistor Enable 26 1 read-write CSRESSEL Capacitive Sense Mode Internal Resistor Select 28 3 read-write RES0 Internal capacitive sense resistor value 0 0x00000000 RES1 Internal capacitive sense resistor value 1 0x00000001 RES2 Internal capacitive sense resistor value 2 0x00000002 RES3 Internal capacitive sense resistor value 3 0x00000003 RES4 Internal capacitive sense resistor value 4 0x00000004 RES5 Internal capacitive sense resistor value 5 0x00000005 RES6 Internal capacitive sense resistor value 6 0x00000006 RES7 Internal capacitive sense resistor value 7 0x00000007 STATUS Status Register 0x008 32 read-only 0x00000000 0x00000007 ACMPACT Analog Comparator Active 0 1 read-only ACMPOUT Analog Comparator Output 1 1 read-only APORTCONFLICT APORT Conflict Output 2 1 read-only IF Interrupt Flag Register 0x00C 32 read-only 0x00000000 0x00000007 EDGE Edge Triggered Interrupt Flag 0 1 read-only WARMUP Warm-up Interrupt Flag 1 1 read-only APORTCONFLICT APORT Conflict Interrupt Flag 2 1 read-only IFS Interrupt Flag Set Register 0x010 32 write-only 0x00000000 0x00000007 EDGE Set EDGE Interrupt Flag 0 1 write-only WARMUP Set WARMUP Interrupt Flag 1 1 write-only APORTCONFLICT Set APORTCONFLICT Interrupt Flag 2 1 write-only IFC Interrupt Flag Clear Register 0x014 32 write-only 0x00000000 0x00000007 EDGE Clear EDGE Interrupt Flag 0 1 write-only WARMUP Clear WARMUP Interrupt Flag 1 1 write-only APORTCONFLICT Clear APORTCONFLICT Interrupt Flag 2 1 write-only IEN Interrupt Enable Register 0x018 32 read-write 0x00000000 0x00000007 EDGE EDGE Interrupt Enable 0 1 read-write WARMUP WARMUP Interrupt Enable 1 1 read-write APORTCONFLICT APORTCONFLICT Interrupt Enable 2 1 read-write APORTREQ APORT Request Status Register 0x020 32 read-only 0x00000000 0x000003FF APORT0XREQ 1 If the Bus Connected to APORT0X is Requested 0 1 read-only APORT0YREQ 1 If the Bus Connected to APORT0Y is Requested 1 1 read-only APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only APORTCONFLICT APORT Conflict Status Register 0x024 32 read-only 0x00000000 0x000003FF APORT0XCONFLICT 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral 0 1 read-only APORT0YCONFLICT 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral 1 1 read-only APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only HYSTERESIS0 Hysteresis 0 Register 0x028 32 read-write 0x00000000 0x3F3F000F HYST Hysteresis Select When ACMPOUT=0 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F DIVVA Divider for VA Voltage When ACMPOUT=0 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=0 24 6 read-write HYSTERESIS1 Hysteresis 1 Register 0x02C 32 read-write 0x00000000 0x3F3F000F HYST Hysteresis Select When ACMPOUT=1 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F DIVVA Divider for VA Voltage When ACMPOUT=1 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=1 24 6 read-write ROUTEPEN I/O Routing Pine Enable Register 0x040 32 read-write 0x00000000 0x00000001 OUTPEN ACMP Output Pin Enable 0 1 read-write ROUTELOC0 I/O Routing Location Register 0x044 32 read-write 0x00000000 0x0000003F OUTLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F ACMP1 5.8.2 ACMP1 0x40000400 0 0x00000400 registers ACMP0 13 CTRL Control Register 0x000 32 read-write 0x07000000 0xBF3CF70D EN Analog Comparator Enable 0 1 read-write INACTVAL Inactive Value 2 1 read-write GPIOINV Comparator GPIO Output Invert 3 1 read-write APORTXMASTERDIS APORT Bus X Master Disable 8 1 read-write APORTYMASTERDIS APORT Bus Y Master Disable 9 1 read-write APORTVMASTERDIS APORT Bus Master Disable for Bus Selected By VASEL 10 1 read-write PWRSEL Power Select 12 3 read-write AVDD AVDD supply 0x00000000 DVDD DVDD supply 0x00000001 IOVDD0 IOVDD/IOVDD0 supply 0x00000002 IOVDD1 IOVDD1 supply (if part has two I/O voltages) 0x00000004 ACCURACY ACMP Accuracy Mode 15 1 read-write INPUTRANGE Input Range 18 2 read-write FULL Setting when the input can be from 0 to ACMPVDD. 0x00000000 GTVDDDIV2 Setting when the input will always be greater than ACMPVDD/2. 0x00000001 LTVDDDIV2 Setting when the input will always be less than ACMPVDD/2. 0x00000002 IRISE Rising Edge Interrupt Sense 20 1 read-write IFALL Falling Edge Interrupt Sense 21 1 read-write BIASPROG Bias Configuration 24 6 read-write FULLBIAS Full Bias Current 31 1 read-write INPUTSEL Input Selection Register 0x004 32 read-write 0x00000000 0x757FFFFF POSSEL Positive Input Select 0 8 read-write NEGSEL Negative Input Select 8 8 read-write VASEL VA Selection 16 6 read-write VDD ACMPVDD 0x00000000 APORT2YCH0 APORT2Y Channel 0 0x00000001 APORT2YCH2 APORT2Y Channel 2 0x00000003 APORT2YCH4 APORT2Y Channel 4 0x00000005 APORT2YCH6 APORT2Y Channel 6 0x00000007 APORT2YCH8 APORT2Y Channel 8 0x00000009 APORT2YCH10 APORT2Y Channel 10 0x0000000B APORT2YCH12 APORT2Y Channel 12 0x0000000D APORT2YCH14 APORT2Y Channel 14 0x0000000F APORT2YCH16 APORT2Y Channel 16 0x00000011 APORT2YCH18 APORT2Y Channel 18 0x00000013 APORT2YCH20 APORT2Y Channel 20 0x00000015 APORT2YCH22 APORT2Y Channel 22 0x00000017 APORT2YCH24 APORT2Y Channel 24 0x00000019 APORT2YCH26 APORT2Y Channel 26 0x0000001B APORT2YCH28 APORT2Y Channel 28 0x0000001D APORT2YCH30 APORT2Y Channel 30 0x0000001F APORT1XCH0 APORT1X Channel 0 0x00000020 APORT1YCH1 APORT1Y Channel 1 0x00000021 APORT1XCH2 APORT1X Channel 2 0x00000022 APORT1YCH3 APORT1Y Channel 3 0x00000023 APORT1XCH4 APORT1X Channel 4 0x00000024 APORT1YCH5 APORT1Y Channel 5 0x00000025 APORT1XCH6 APORT1X Channel 6 0x00000026 APORT1YCH7 APORT1Y Channel 7 0x00000027 APORT1XCH8 APORT1X Channel 8 0x00000028 APORT1YCH9 APORT1Y Channel 9 0x00000029 APORT1XCH10 APORT1X Channel 10 0x0000002A APORT1YCH11 APORT1Y Channel 11 0x0000002B APORT1XCH12 APORT1X Channel 12 0x0000002C APORT1YCH13 APORT1Y Channel 13 0x0000002D APORT1XCH14 APORT1X Channel 14 0x0000002E APORT1YCH15 APORT1Y Channel 15 0x0000002F APORT1XCH16 APORT1X Channel 16 0x00000030 APORT1YCH17 APORT1Y Channel 17 0x00000031 APORT1XCH18 APORT1X Channel 18 0x00000032 APORT1YCH19 APORT1Y Channel 19 0x00000033 APORT1XCH20 APORT1X Channel 20 0x00000034 APORT1YCH21 APORT1Y Channel 21 0x00000035 APORT1XCH22 APORT1X Channel 22 0x00000036 APORT1YCH23 APORT1Y Channel 23 0x00000037 APORT1XCH24 APORT1X Channel 24 0x00000038 APORT1YCH25 APORT1Y Channel 25 0x00000039 APORT1XCH26 APORT1X Channel 26 0x0000003A APORT1YCH27 APORT1Y Channel 27 0x0000003B APORT1XCH28 APORT1X Channel 28 0x0000003C APORT1YCH29 APORT1Y Channel 29 0x0000003D APORT1XCH30 APORT1X Channel 30 0x0000003E APORT1YCH31 APORT1Y Channel 31 0x0000003F VBSEL VB Selection 22 1 read-write VLPSEL Low-Power Sampled Voltage Selection 24 1 read-write CSRESEN Capacitive Sense Mode Internal Resistor Enable 26 1 read-write CSRESSEL Capacitive Sense Mode Internal Resistor Select 28 3 read-write RES0 Internal capacitive sense resistor value 0 0x00000000 RES1 Internal capacitive sense resistor value 1 0x00000001 RES2 Internal capacitive sense resistor value 2 0x00000002 RES3 Internal capacitive sense resistor value 3 0x00000003 RES4 Internal capacitive sense resistor value 4 0x00000004 RES5 Internal capacitive sense resistor value 5 0x00000005 RES6 Internal capacitive sense resistor value 6 0x00000006 RES7 Internal capacitive sense resistor value 7 0x00000007 STATUS Status Register 0x008 32 read-only 0x00000000 0x00000007 ACMPACT Analog Comparator Active 0 1 read-only ACMPOUT Analog Comparator Output 1 1 read-only APORTCONFLICT APORT Conflict Output 2 1 read-only IF Interrupt Flag Register 0x00C 32 read-only 0x00000000 0x00000007 EDGE Edge Triggered Interrupt Flag 0 1 read-only WARMUP Warm-up Interrupt Flag 1 1 read-only APORTCONFLICT APORT Conflict Interrupt Flag 2 1 read-only IFS Interrupt Flag Set Register 0x010 32 write-only 0x00000000 0x00000007 EDGE Set EDGE Interrupt Flag 0 1 write-only WARMUP Set WARMUP Interrupt Flag 1 1 write-only APORTCONFLICT Set APORTCONFLICT Interrupt Flag 2 1 write-only IFC Interrupt Flag Clear Register 0x014 32 write-only 0x00000000 0x00000007 EDGE Clear EDGE Interrupt Flag 0 1 write-only WARMUP Clear WARMUP Interrupt Flag 1 1 write-only APORTCONFLICT Clear APORTCONFLICT Interrupt Flag 2 1 write-only IEN Interrupt Enable Register 0x018 32 read-write 0x00000000 0x00000007 EDGE EDGE Interrupt Enable 0 1 read-write WARMUP WARMUP Interrupt Enable 1 1 read-write APORTCONFLICT APORTCONFLICT Interrupt Enable 2 1 read-write APORTREQ APORT Request Status Register 0x020 32 read-only 0x00000000 0x000003FF APORT0XREQ 1 If the Bus Connected to APORT0X is Requested 0 1 read-only APORT0YREQ 1 If the Bus Connected to APORT0Y is Requested 1 1 read-only APORT1XREQ 1 If the Bus Connected to APORT2X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1X is Requested 3 1 read-only APORT2XREQ 1 If the Bus Connected to APORT2X is Requested 4 1 read-only APORT2YREQ 1 If the Bus Connected to APORT2Y is Requested 5 1 read-only APORT3XREQ 1 If the Bus Connected to APORT3X is Requested 6 1 read-only APORT3YREQ 1 If the Bus Connected to APORT3Y is Requested 7 1 read-only APORT4XREQ 1 If the Bus Connected to APORT4X is Requested 8 1 read-only APORT4YREQ 1 If the Bus Connected to APORT4Y is Requested 9 1 read-only APORTCONFLICT APORT Conflict Status Register 0x024 32 read-only 0x00000000 0x000003FF APORT0XCONFLICT 1 If the Bus Connected to APORT0X is in Conflict With Another Peripheral 0 1 read-only APORT0YCONFLICT 1 If the Bus Connected to APORT0Y is in Conflict With Another Peripheral 1 1 read-only APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 3 1 read-only APORT2XCONFLICT 1 If the Bus Connected to APORT2X is in Conflict With Another Peripheral 4 1 read-only APORT2YCONFLICT 1 If the Bus Connected to APORT2Y is in Conflict With Another Peripheral 5 1 read-only APORT3XCONFLICT 1 If the Bus Connected to APORT3X is in Conflict With Another Peripheral 6 1 read-only APORT3YCONFLICT 1 If the Bus Connected to APORT3Y is in Conflict With Another Peripheral 7 1 read-only APORT4XCONFLICT 1 If the Bus Connected to APORT4X is in Conflict With Another Peripheral 8 1 read-only APORT4YCONFLICT 1 If the Bus Connected to APORT4Y is in Conflict With Another Peripheral 9 1 read-only HYSTERESIS0 Hysteresis 0 Register 0x028 32 read-write 0x00000000 0x3F3F000F HYST Hysteresis Select When ACMPOUT=0 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F DIVVA Divider for VA Voltage When ACMPOUT=0 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=0 24 6 read-write HYSTERESIS1 Hysteresis 1 Register 0x02C 32 read-write 0x00000000 0x3F3F000F HYST Hysteresis Select When ACMPOUT=1 0 4 read-write HYST0 No hysteresis 0x00000000 HYST1 14 mV hysteresis 0x00000001 HYST2 25 mV hysteresis 0x00000002 HYST3 30 mV hysteresis 0x00000003 HYST4 35 mV hysteresis 0x00000004 HYST5 39 mV hysteresis 0x00000005 HYST6 42 mV hysteresis 0x00000006 HYST7 45 mV hysteresis 0x00000007 HYST8 No hysteresis 0x00000008 HYST9 -14 mV hysteresis 0x00000009 HYST10 -25 mV hysteresis 0x0000000A HYST11 -30 mV hysteresis 0x0000000B HYST12 -35 mV hysteresis 0x0000000C HYST13 -39 mV hysteresis 0x0000000D HYST14 -42 mV hysteresis 0x0000000E HYST15 -45 mV hysteresis 0x0000000F DIVVA Divider for VA Voltage When ACMPOUT=1 16 6 read-write DIVVB Divider for VB Voltage When ACMPOUT=1 24 6 read-write ROUTEPEN I/O Routing Pine Enable Register 0x040 32 read-write 0x00000000 0x00000001 OUTPEN ACMP Output Pin Enable 0 1 read-write ROUTELOC0 I/O Routing Location Register 0x044 32 read-write 0x00000000 0x0000003F OUTLOC I/O Location 0 6 read-write LOC0 Location 0 0x00000000 LOC1 Location 1 0x00000001 LOC2 Location 2 0x00000002 LOC3 Location 3 0x00000003 LOC4 Location 4 0x00000004 LOC5 Location 5 0x00000005 LOC6 Location 6 0x00000006 LOC7 Location 7 0x00000007 LOC8 Location 8 0x00000008 LOC9 Location 9 0x00000009 LOC10 Location 10 0x0000000A LOC11 Location 11 0x0000000B LOC12 Location 12 0x0000000C LOC13 Location 13 0x0000000D LOC14 Location 14 0x0000000E LOC15 Location 15 0x0000000F LOC16 Location 16 0x00000010 LOC17 Location 17 0x00000011 LOC18 Location 18 0x00000012 LOC19 Location 19 0x00000013 LOC20 Location 20 0x00000014 LOC21 Location 21 0x00000015 LOC22 Location 22 0x00000016 LOC23 Location 23 0x00000017 LOC24 Location 24 0x00000018 LOC25 Location 25 0x00000019 LOC26 Location 26 0x0000001A LOC27 Location 27 0x0000001B LOC28 Location 28 0x0000001C LOC29 Location 29 0x0000001D LOC30 Location 30 0x0000001E LOC31 Location 31 0x0000001F IDAC0 5.8.2 IDAC0 0x40006000 0 0x00000400 registers IDAC0 15 CTRL Control Register 0x000 32 read-write 0x00000000 0x00F17FFF EN Current DAC Enable 0 1 read-write CURSINK Current Sink Enable 1 1 read-write MINOUTTRANS Minimum Output Transition Enable 2 1 read-write APORTOUTEN APORT Output Enable 3 1 read-write APORTOUTSEL APORT Output Select 4 8 read-write APORT1XCH0 APORT1X Channel 0 0x00000020 APORT1YCH1 APORT1Y Channel 1 0x00000021 APORT1XCH2 APORT1X Channel 2 0x00000022 APORT1YCH3 APORT1Y Channel 3 0x00000023 APORT1XCH4 APORT1X Channel 4 0x00000024 APORT1YCH5 APORT1Y Channel 5 0x00000025 APORT1XCH6 APORT1X Channel 6 0x00000026 APORT1YCH7 APORT1Y Channel 7 0x00000027 APORT1XCH8 APORT1X Channel 8 0x00000028 APORT1YCH9 APORT1Y Channel 9 0x00000029 APORT1XCH10 APORT1X Channel 10 0x0000002A APORT1YCH11 APORT1Y Channel 11 0x0000002B APORT1XCH12 APORT1X Channel 12 0x0000002C APORT1YCH13 APORT1Y Channel 13 0x0000002D APORT1XCH14 APORT1X Channel 14 0x0000002E APORT1YCH15 APORT1Y Channel 15 0x0000002F APORT1XCH16 APORT1X Channel 16 0x00000030 APORT1YCH17 APORT1Y Channel 17 0x00000031 APORT1XCH18 APORT1X Channel 18 0x00000032 APORT1YCH19 APORT1Y Channel 19 0x00000033 APORT1XCH20 APORT1X Channel 20 0x00000034 APORT1YCH21 APORT1Y Channel 21 0x00000035 APORT1XCH22 APORT1X Channel 22 0x00000036 APORT1YCH23 APORT1Y Channel 23 0x00000037 APORT1XCH24 APORT1X Channel 24 0x00000038 APORT1YCH25 APORT1Y Channel 25 0x00000039 APORT1XCH26 APORT1X Channel 26 0x0000003A APORT1YCH27 APORT1Y Channel 27 0x0000003B APORT1XCH28 APORT1X Channel 28 0x0000003C APORT1YCH29 APORT1Y Channel 29 0x0000003D APORT1XCH30 APORT1X Channel 30 0x0000003E APORT1YCH31 APORT1Y Channel 31 0x0000003F PWRSEL Power Select 12 1 read-write EM2DELAY EM2 Delay 13 1 read-write APORTMASTERDIS APORT Bus Master Disable 14 1 read-write APORTOUTENPRS PRS Controlled APORT Output Enable 16 1 read-write PRSSEL IDAC Output Enable PRS Channel Select 20 4 read-write PRSCH0 PRS Channel 0 selected. 0x00000000 PRSCH1 PRS Channel 1 selected. 0x00000001 PRSCH2 PRS Channel 2 selected. 0x00000002 PRSCH3 PRS Channel 3 selected. 0x00000003 PRSCH4 PRS Channel 4 selected. 0x00000004 PRSCH5 PRS Channel 5 selected. 0x00000005 PRSCH6 PRS Channel 6 selected. 0x00000006 PRSCH7 PRS Channel 7 selected. 0x00000007 PRSCH8 PRS Channel 8 selected. 0x00000008 PRSCH9 PRS Channel 9 selected. 0x00000009 PRSCH10 PRS Channel 10 selected. 0x0000000A PRSCH11 PRS Channel 11 selected. 0x0000000B CURPROG Current Programming Register 0x004 32 read-write 0x009B0000 0x00FF1F03 RANGESEL Current Range Select 0 2 read-write RANGE0 Current range set to 0 - 1.6 uA. 0x00000000 RANGE1 Current range set to 1.6 - 4.7 uA. 0x00000001 RANGE2 Current range set to 0.5 - 16 uA. 0x00000002 RANGE3 Current range set to 2 - 64 uA. 0x00000003 STEPSEL Current Step Size Select 8 5 read-write TUNING Tune the Current to Given Accuracy 16 8 read-write DUTYCONFIG Duty Cycle Configuration Register 0x00C 32 read-write 0x00000000 0x00000002 EM2DUTYCYCLEDIS Duty Cycle Enable 1 1 read-write STATUS Status Register 0x018 32 read-only 0x00000000 0x00000002 APORTCONFLICT APORT Conflict Output 1 1 read-only IF Interrupt Flag Register 0x020 32 read-only 0x00000000 0x00000002 APORTCONFLICT APORT Conflict Interrupt Flag 1 1 read-only IFS Interrupt Flag Set Register 0x024 32 write-only 0x00000000 0x00000002 APORTCONFLICT Set APORTCONFLICT Interrupt Flag 1 1 write-only IFC Interrupt Flag Clear Register 0x028 32 write-only 0x00000000 0x00000002 APORTCONFLICT Clear APORTCONFLICT Interrupt Flag 1 1 write-only IEN Interrupt Enable Register 0x02C 32 read-write 0x00000000 0x00000002 APORTCONFLICT APORTCONFLICT Interrupt Enable 1 1 read-write APORTREQ APORT Request Status Register 0x034 32 read-only 0x00000000 0x0000000C APORT1XREQ 1 If the APORT Bus Connected to APORT1X is Requested 2 1 read-only APORT1YREQ 1 If the Bus Connected to APORT1Y is Requested 3 1 read-only APORTCONFLICT APORT Request Status Register 0x038 32 read-only 0x00000000 0x0000000C APORT1XCONFLICT 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral 2 1 read-only APORT1YCONFLICT 1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral 3 1 read-only RTCC 5.8.2 RTCC 0x40042000 0 0x00000400 registers RTCC 29 CTRL Control Register 0x000 32 read-write 0x00000000 0x00039F35 ENABLE RTCC Enable 0 1 read-write DEBUGRUN Debug Mode Run Enable 2 1 read-write PRECCV0TOP Pre-counter CCV0 Top Value Enable 4 1 read-write CCV1TOP CCV1 Top Value Enable 5 1 read-write CNTPRESC Counter Prescaler Value 8 4 read-write DIV1 CLKCNT = LFECLKRTCC/1 0x00000000 DIV2 CLKCNT = LFECLKRTCC/2 0x00000001 DIV4 CLKCNT = LFECLKRTCC/4 0x00000002 DIV8 CLKCNT = LFECLKRTCC/8 0x00000003 DIV16 CLKCNT = LFECLKRTCC/16 0x00000004 DIV32 CLKCNT = LFECLKRTCC/32 0x00000005 DIV64 CLKCNT = LFECLKRTCC/64 0x00000006 DIV128 CLKCNT = LFECLKRTCC/128 0x00000007 DIV256 CLKCNT = LFECLKRTCC/256 0x00000008 DIV512 CLKCNT = LFECLKRTCC/512 0x00000009 DIV1024 CLKCNT = LFECLKRTCC/1024 0x0000000A DIV2048 CLKCNT = LFECLKRTCC/2048 0x0000000B DIV4096 CLKCNT = LFECLKRTCC/4096 0x0000000C DIV8192 CLKCNT = LFECLKRTCC/8192 0x0000000D DIV16384 CLKCNT = LFECLKRTCC/16384 0x0000000E DIV32768 CLKCNT = LFECLKRTCC/32768 0x0000000F CNTTICK Counter Prescaler Mode 12 1 read-write OSCFDETEN Oscillator Failure Detection Enable 15 1 read-write CNTMODE Main Counter Mode 16 1 read-write LYEARCORRDIS Leap Year Correction Disabled 17 1 read-write PRECNT Pre-Counter Value Register 0x004 32 read-write 0x00000000 0x00007FFF PRECNT Pre-Counter Value 0 15 read-write CNT Counter Value Register 0x008 32 read-write 0x00000000 0xFFFFFFFF CNT Counter Value 0 32 read-write COMBCNT Combined Pre-Counter and Counter Value Register 0x00C 32 read-only 0x00000000 0xFFFFFFFF PRECNT Pre-Counter Value 0 15 read-only CNTLSB Counter Value 15 17 read-only TIME Time of Day Register 0x010 32 read-write 0x00000000 0x003F7F7F SECU Seconds, Units 0 4 read-write SECT Seconds, Tens 4 3 read-write MINU Minutes, Units 8 4 read-write MINT Minutes, Tens 12 3 read-write HOURU Hours, Units 16 4 read-write HOURT Hours, Tens 20 2 read-write DATE Date Register 0x014 32 read-write 0x00000000 0x07FF1F3F DAYOMU Day of Month, Units 0 4 read-write DAYOMT Day of Month, Tens 4 2 read-write MONTHU Month, Units 8 4 read-write MONTHT Month, Tens 12 1 read-write YEARU Year, Units 16 4 read-write YEART Year, Tens 20 4 read-write DAYOW Day of Week 24 3 read-write IF RTCC Interrupt Flags 0x018 32 read-only 0x00000000 0x000007FF OF Overflow Interrupt Flag 0 1 read-only CC0 Channel 0 Interrupt Flag 1 1 read-only CC1 Channel 1 Interrupt Flag 2 1 read-only CC2 Channel 2 Interrupt Flag 3 1 read-only OSCFAIL Oscillator Failure Interrupt Flag 4 1 read-only CNTTICK Main Counter Tick 5 1 read-only MINTICK Minute Tick 6 1 read-only HOURTICK Hour Tick 7 1 read-only DAYTICK Day Tick 8 1 read-only DAYOWOF Day of Week Overflow 9 1 read-only MONTHTICK Month Tick 10 1 read-only IFS Interrupt Flag Set Register 0x01C 32 write-only 0x00000000 0x000007FF OF Set OF Interrupt Flag 0 1 write-only CC0 Set CC0 Interrupt Flag 1 1 write-only CC1 Set CC1 Interrupt Flag 2 1 write-only CC2 Set CC2 Interrupt Flag 3 1 write-only OSCFAIL Set OSCFAIL Interrupt Flag 4 1 write-only CNTTICK Set CNTTICK Interrupt Flag 5 1 write-only MINTICK Set MINTICK Interrupt Flag 6 1 write-only HOURTICK Set HOURTICK Interrupt Flag 7 1 write-only DAYTICK Set DAYTICK Interrupt Flag 8 1 write-only DAYOWOF Set DAYOWOF Interrupt Flag 9 1 write-only MONTHTICK Set MONTHTICK Interrupt Flag 10 1 write-only IFC Interrupt Flag Clear Register 0x020 32 write-only 0x00000000 0x000007FF OF Clear OF Interrupt Flag 0 1 write-only CC0 Clear CC0 Interrupt Flag 1 1 write-only CC1 Clear CC1 Interrupt Flag 2 1 write-only CC2 Clear CC2 Interrupt Flag 3 1 write-only OSCFAIL Clear OSCFAIL Interrupt Flag 4 1 write-only CNTTICK Clear CNTTICK Interrupt Flag 5 1 write-only MINTICK Clear MINTICK Interrupt Flag 6 1 write-only HOURTICK Clear HOURTICK Interrupt Flag 7 1 write-only DAYTICK Clear DAYTICK Interrupt Flag 8 1 write-only DAYOWOF Clear DAYOWOF Interrupt Flag 9 1 write-only MONTHTICK Clear MONTHTICK Interrupt Flag 10 1 write-only IEN Interrupt Enable Register 0x024 32 read-write 0x00000000 0x000007FF OF OF Interrupt Enable 0 1 read-write CC0 CC0 Interrupt Enable 1 1 read-write CC1 CC1 Interrupt Enable 2 1 read-write CC2 CC2 Interrupt Enable 3 1 read-write OSCFAIL OSCFAIL Interrupt Enable 4 1 read-write CNTTICK CNTTICK Interrupt Enable 5 1 read-write MINTICK MINTICK Interrupt Enable 6 1 read-write HOURTICK HOURTICK Interrupt Enable 7 1 read-write DAYTICK DAYTICK Interrupt Enable 8 1 read-write DAYOWOF DAYOWOF Interrupt Enable 9 1 read-write MONTHTICK MONTHTICK Interrupt Enable 10 1 read-write STATUS Status Register 0x028 32 read-only 0x00000000 0x00000000 CMD Command Register 0x02C 32 write-only 0x00000000 0x00000001 CLRSTATUS Clear RTCC_STATUS Register 0 1 write-only SYNCBUSY Synchronization Busy Register 0x030 32 read-only 0x00000000 0x00000020 CMD CMD Register Busy 5 1 read-only POWERDOWN Retention RAM Power-down Register 0x034 32 read-write 0x00000000 0x00000001 RAM Retention RAM Power-down 0 1 read-write LOCK Configuration Lock Register 0x038 32 read-write 0x00000000 0x0000FFFF LOCKKEY Configuration Lock Key 0 16 read-write UNLOCKED 0x00000000 LOCKED 0x00000001 EM4WUEN Wake Up Enable 0x03C 32 read-write 0x00000000 0x00000001 EM4WU EM4 Wake-up Enable 0 1 read-write CC0_CTRL CC Channel Control Register 0x040 32 read-write 0x00000000 0x0003FBFF MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 CMOA Compare Match Output Action 2 2 read-write PULSE A single clock cycle pulse is generated on output 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 ICEDGE Input Capture Edge Select 4 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 PRSSEL Compare/Capture Channel PRS Input Channel Selection 6 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B COMPBASE Capture Compare Channel Comparison Base 11 1 read-write COMPMASK Capture Compare Channel Comparison Mask 12 5 read-write DAYCC Day Capture/Compare Selection 17 1 read-write CC0_CCV Capture/Compare Value Register 0x044 32 read-write 0x00000000 0xFFFFFFFF CCV Capture/Compare Value 0 32 read-write CC0_TIME Capture/Compare Time Register 0x048 32 read-write 0x00000000 0x003F7F7F SECU Seconds, Units 0 4 read-write SECT Seconds, Tens 4 3 read-write MINU Minutes, Units 8 4 read-write MINT Minutes, Tens 12 3 read-write HOURU Hours, Units 16 4 read-write HOURT Hours, Tens 20 2 read-write CC0_DATE Capture/Compare Date Register 0x04C 32 read-write 0x00000000 0x00001F3F DAYU Day of Month/week, Units 0 4 read-write DAYT Day of Month/week, Tens 4 2 read-write MONTHU Month, Units 8 4 read-write MONTHT Month, Tens 12 1 read-write CC1_CTRL CC Channel Control Register 0x050 32 read-write 0x00000000 0x0003FBFF MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 CMOA Compare Match Output Action 2 2 read-write PULSE A single clock cycle pulse is generated on output 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 ICEDGE Input Capture Edge Select 4 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 PRSSEL Compare/Capture Channel PRS Input Channel Selection 6 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B COMPBASE Capture Compare Channel Comparison Base 11 1 read-write COMPMASK Capture Compare Channel Comparison Mask 12 5 read-write DAYCC Day Capture/Compare Selection 17 1 read-write CC1_CCV Capture/Compare Value Register 0x054 32 read-write 0x00000000 0xFFFFFFFF CCV Capture/Compare Value 0 32 read-write CC1_TIME Capture/Compare Time Register 0x058 32 read-write 0x00000000 0x003F7F7F SECU Seconds, Units 0 4 read-write SECT Seconds, Tens 4 3 read-write MINU Minutes, Units 8 4 read-write MINT Minutes, Tens 12 3 read-write HOURU Hours, Units 16 4 read-write HOURT Hours, Tens 20 2 read-write CC1_DATE Capture/Compare Date Register 0x05C 32 read-write 0x00000000 0x00001F3F DAYU Day of Month/week, Units 0 4 read-write DAYT Day of Month/week, Tens 4 2 read-write MONTHU Month, Units 8 4 read-write MONTHT Month, Tens 12 1 read-write CC2_CTRL CC Channel Control Register 0x060 32 read-write 0x00000000 0x0003FBFF MODE CC Channel Mode 0 2 read-write OFF Compare/Capture channel turned off 0x00000000 INPUTCAPTURE Input capture 0x00000001 OUTPUTCOMPARE Output compare 0x00000002 CMOA Compare Match Output Action 2 2 read-write PULSE A single clock cycle pulse is generated on output 0x00000000 TOGGLE Toggle output on compare match 0x00000001 CLEAR Clear output on compare match 0x00000002 SET Set output on compare match 0x00000003 ICEDGE Input Capture Edge Select 4 2 read-write RISING Rising edges detected 0x00000000 FALLING Falling edges detected 0x00000001 BOTH Both edges detected 0x00000002 NONE No edge detection, signal is left as it is 0x00000003 PRSSEL Compare/Capture Channel PRS Input Channel Selection 6 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B COMPBASE Capture Compare Channel Comparison Base 11 1 read-write COMPMASK Capture Compare Channel Comparison Mask 12 5 read-write DAYCC Day Capture/Compare Selection 17 1 read-write CC2_CCV Capture/Compare Value Register 0x064 32 read-write 0x00000000 0xFFFFFFFF CCV Capture/Compare Value 0 32 read-write CC2_TIME Capture/Compare Time Register 0x068 32 read-write 0x00000000 0x003F7F7F SECU Seconds, Units 0 4 read-write SECT Seconds, Tens 4 3 read-write MINU Minutes, Units 8 4 read-write MINT Minutes, Tens 12 3 read-write HOURU Hours, Units 16 4 read-write HOURT Hours, Tens 20 2 read-write CC2_DATE Capture/Compare Date Register 0x06C 32 read-write 0x00000000 0x00001F3F DAYU Day of Month/week, Units 0 4 read-write DAYT Day of Month/week, Tens 4 2 read-write MONTHU Month, Units 8 4 read-write MONTHT Month, Tens 12 1 read-write RET0_REG Retention Register 0x104 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET1_REG Retention Register 0x108 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET2_REG Retention Register 0x10C 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET3_REG Retention Register 0x110 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET4_REG Retention Register 0x114 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET5_REG Retention Register 0x118 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET6_REG Retention Register 0x11C 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET7_REG Retention Register 0x120 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET8_REG Retention Register 0x124 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET9_REG Retention Register 0x128 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET10_REG Retention Register 0x12C 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET11_REG Retention Register 0x130 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET12_REG Retention Register 0x134 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET13_REG Retention Register 0x138 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET14_REG Retention Register 0x13C 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET15_REG Retention Register 0x140 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET16_REG Retention Register 0x144 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET17_REG Retention Register 0x148 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET18_REG Retention Register 0x14C 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET19_REG Retention Register 0x150 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET20_REG Retention Register 0x154 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET21_REG Retention Register 0x158 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET22_REG Retention Register 0x15C 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET23_REG Retention Register 0x160 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET24_REG Retention Register 0x164 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET25_REG Retention Register 0x168 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET26_REG Retention Register 0x16C 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET27_REG Retention Register 0x170 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET28_REG Retention Register 0x174 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET29_REG Retention Register 0x178 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET30_REG Retention Register 0x17C 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write RET31_REG Retention Register 0x180 32 read-write 0x00000000 0xFFFFFFFF REG General Purpose Retention Register 0 32 read-write WDOG0 5.8.2 WDOG0 0x40052000 0 0x00000400 registers WDOG0 2 CTRL Control Register 0x000 32 read-write 0x00000F00 0xC7033F7F EN Watchdog Timer Enable 0 1 read-write DEBUGRUN Debug Mode Run Enable 1 1 read-write EM2RUN Energy Mode 2 Run Enable 2 1 read-write EM3RUN Energy Mode 3 Run Enable 3 1 read-write LOCK Configuration Lock 4 1 read-write EM4BLOCK Energy Mode 4 Block 5 1 read-write SWOSCBLOCK Software Oscillator Disable Block 6 1 read-write PERSEL Watchdog Timeout Period Select 8 4 read-write CLKSEL Watchdog Clock Select 12 2 read-write ULFRCO ULFRCO 0x00000000 LFRCO LFRCO 0x00000001 LFXO LFXO 0x00000002 WARNSEL Watchdog Timeout Period Select 16 2 read-write WINSEL Watchdog Illegal Window Select 24 3 read-write CLRSRC Watchdog Clear Source 30 1 read-write WDOGRSTDIS Watchdog Reset Disable 31 1 read-write CMD Command Register 0x004 32 write-only 0x00000000 0x00000001 CLEAR Watchdog Timer Clear 0 1 write-only SYNCBUSY Synchronization Busy Register 0x008 32 read-only 0x00000000 0x0000000F CTRL CTRL Register Busy 0 1 read-only CMD CMD Register Busy 1 1 read-only PCH0_PRSCTRL PCH0_PRSCTRL Register Busy 2 1 read-only PCH1_PRSCTRL PCH1_PRSCTRL Register Busy 3 1 read-only PCH0_PRSCTRL PRS Control Register 0x00C 32 read-write 0x00000000 0x0000010F PRSSEL PRS Channel PRS Select 0 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSMISSRSTEN PRS Missing Event Will Trigger a Watchdog Reset 8 1 read-write PCH1_PRSCTRL PRS Control Register 0x010 32 read-write 0x00000000 0x0000010F PRSSEL PRS Channel PRS Select 0 4 read-write PRSCH0 PRS Channel 0 selected as input 0x00000000 PRSCH1 PRS Channel 1 selected as input 0x00000001 PRSCH2 PRS Channel 2 selected as input 0x00000002 PRSCH3 PRS Channel 3 selected as input 0x00000003 PRSCH4 PRS Channel 4 selected as input 0x00000004 PRSCH5 PRS Channel 5 selected as input 0x00000005 PRSCH6 PRS Channel 6 selected as input 0x00000006 PRSCH7 PRS Channel 7 selected as input 0x00000007 PRSCH8 PRS Channel 8 selected as input 0x00000008 PRSCH9 PRS Channel 9 selected as input 0x00000009 PRSCH10 PRS Channel 10 selected as input 0x0000000A PRSCH11 PRS Channel 11 selected as input 0x0000000B PRSMISSRSTEN PRS Missing Event Will Trigger a Watchdog Reset 8 1 read-write IF Watchdog Interrupt Flags 0x01C 32 read-only 0x00000000 0x0000001F TOUT WDOG Timeout Interrupt Flag 0 1 read-only WARN WDOG Warning Timeout Interrupt Flag 1 1 read-only WIN WDOG Window Interrupt Flag 2 1 read-only PEM0 PRS Channel Zero Event Missing Interrupt Flag 3 1 read-only PEM1 PRS Channel One Event Missing Interrupt Flag 4 1 read-only IFS Interrupt Flag Set Register 0x020 32 write-only 0x00000000 0x0000001F TOUT Set TOUT Interrupt Flag 0 1 write-only WARN Set WARN Interrupt Flag 1 1 write-only WIN Set WIN Interrupt Flag 2 1 write-only PEM0 Set PEM0 Interrupt Flag 3 1 write-only PEM1 Set PEM1 Interrupt Flag 4 1 write-only IFC Interrupt Flag Clear Register 0x024 32 write-only 0x00000000 0x0000001F TOUT Clear TOUT Interrupt Flag 0 1 write-only WARN Clear WARN Interrupt Flag 1 1 write-only WIN Clear WIN Interrupt Flag 2 1 write-only PEM0 Clear PEM0 Interrupt Flag 3 1 write-only PEM1 Clear PEM1 Interrupt Flag 4 1 write-only IEN Interrupt Enable Register 0x028 32 read-write 0x00000000 0x0000001F TOUT TOUT Interrupt Enable 0 1 read-write WARN WARN Interrupt Enable 1 1 read-write WIN WIN Interrupt Enable 2 1 read-write PEM0 PEM0 Interrupt Enable 3 1 read-write PEM1 PEM1 Interrupt Enable 4 1 read-write Copyright 2019 Silicon Laboratories, Inc. 0x00000000 0x00020000 rx 0x20000000 0x00008000 rwx