Clock cyle
ex: 2ms
Clock cyle...
Sync0
Sync0
Sync0
Sync0
application
application
application
application
application
application
Slave - Sync0 - SM2 shift
Slave - Sync0 - SM2 shift
Slave - Sync 0
Slave - Sync 0
Master
Master
Slave - Sync0 - SM1 shift
Slave - Sync0 - SM1 shift
Slave - Subordinated
Slave - Subordinated
min cycle time
min cycle...
output shift
output shi...
input shift
input shift
application
application
min cycle time
min cycle...
output shift
output shi...
input shift
input shift
calc+cpy
calc+cpy
calc+cpy
calc+cpy
calc+cpy
calc+cpy
Slave - Sync1 - SM1 shift
Slave - Sync1 - SM1 shift
application
application
min cycle time
min cycle...
output shift
output shi...
input shift
input shift
calc+cpy
calc+cpy
application
application
min cycle time
min cycle...
calc+cpy
calc+cpy
Sync1
Sync1
calc+cpy
calc+cpy
calc+cpy
calc+cpy
SM2
SM2
SM2
SM2
SM2
SM2
frame + jitter
frame + jitter
frame + jitter
frame + jitter
SM2
SM2
calc+cpy
calc+cpy
calc+cpy
calc+cpy
Slave - Sync1 - SM2 shift
Slave - Sync1 - SM2 shift
Mixed between Sync 0 and Sync 1
Mixed between Sync 0 and Sync 1
application
application
application
application
application
application
calc+cpy
calc+cpy
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