extern "core.sv" {
  /// Primitives
  primitive std_const<"share"=1>[WIDTH, VALUE]() -> (out: WIDTH);
  primitive std_slice<"share"=1>[IN_WIDTH, OUT_WIDTH](in: IN_WIDTH) -> (out: OUT_WIDTH);
  primitive std_pad<"share"=1>[IN_WIDTH, OUT_WIDTH](in: IN_WIDTH) -> (out: OUT_WIDTH);

  /// Logical operators
  primitive std_not<"share"=1>[WIDTH](in: WIDTH) -> (out: WIDTH);
  primitive std_and<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: WIDTH);
  primitive std_or<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: WIDTH);
  primitive std_xor<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: WIDTH);

  /// Numerical Operators
  primitive std_add<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: WIDTH);
  primitive std_sub<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: WIDTH);
  primitive std_gt<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: 1);
  primitive std_lt<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: 1);
  primitive std_eq<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: 1);
  primitive std_neq<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: 1);
  primitive std_ge<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: 1);
  primitive std_le<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: 1);
  primitive std_lsh<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: WIDTH);
  primitive std_rsh<"share"=1>[WIDTH](left: WIDTH, right: WIDTH) -> (out: WIDTH);
  primitive std_mux<"share"=1>[WIDTH](cond: 1, tru: WIDTH, fal: WIDTH) -> (out: WIDTH);

  /// Memories
  primitive std_reg<"static"=1>[WIDTH](
    @write_together(1) in: WIDTH,
    @write_together(1) @go write_en: 1,
    @clk clk: 1,
    @reset reset: 1
  ) -> (
    out: WIDTH,
    @done done: 1
  );

  primitive std_mem_d1<"static"=1>[WIDTH, SIZE, IDX_SIZE](
    @read_together(1) addr0: IDX_SIZE,
    @write_together(1) write_data: WIDTH,
    @write_together(1) @go write_en: 1,
    @clk clk: 1
  ) -> (
    @read_together(1) read_data: WIDTH,
    @done done: 1
  );

  primitive std_mem_d2<"static"=1>[WIDTH, D0_SIZE, D1_SIZE, D0_IDX_SIZE, D1_IDX_SIZE](
    @read_together(1) @write_together(2) addr0: D0_IDX_SIZE,
    @read_together(1) @write_together(2) addr1: D1_IDX_SIZE,
    @write_together(1) write_data: WIDTH,
    @write_together(1) @go write_en: 1,
    @clk clk: 1
  ) -> (
    @read_together(1) read_data: WIDTH,
    @done done: 1
  );

  primitive std_mem_d3<"static"=1>[
      WIDTH,
      D0_SIZE,
      D1_SIZE,
      D2_SIZE,
      D0_IDX_SIZE,
      D1_IDX_SIZE,
      D2_IDX_SIZE
  ] (
    @read_together(1) @write_together(2) addr0: D0_IDX_SIZE,
    @read_together(1) @write_together(2) addr1: D1_IDX_SIZE,
    @read_together(1) @write_together(2) addr2: D2_IDX_SIZE,
    @write_together(1) write_data: WIDTH,
    @write_together(1) @go write_en: 1,
    @clk clk: 1
  ) -> (
    @read_together(1) read_data: WIDTH,
    @done done: 1
  );

  primitive std_mem_d4<"static"=1>[
      WIDTH,
      D0_SIZE,
      D1_SIZE,
      D2_SIZE,
      D3_SIZE,
      D0_IDX_SIZE,
      D1_IDX_SIZE,
      D2_IDX_SIZE,
      D3_IDX_SIZE
  ] (
    @read_together(1) @write_together(2) addr0: D0_IDX_SIZE,
    @read_together(1) @write_together(2) addr1: D1_IDX_SIZE,
    @read_together(1) @write_together(2) addr2: D2_IDX_SIZE,
    @read_together(1) @write_together(2) addr3: D3_IDX_SIZE,
    @write_together(1) write_data: WIDTH,
    @write_together(1) @go write_en: 1,
    @clk clk: 1
  ) -> (
    @read_together(1) read_data: WIDTH,
    @done done: 1
  );
}