# gd32e5
This crate provides an autogenerated API for access to GD32E5 peripherals.
The API is generated using [svd2rust] with patched svd files containing
extensive type-safe support. For more information please see the [main repo].

Refer to the [documentation] for full details.

[svd2rust]: https://github.com/japaric/svd2rust
[main repo]: https://github.com/gd32-rust/gd32-rs
[documentation]: https://docs.rs/gd32e5/latest/gd32e5/

## Usage
Each device supported by this crate is behind a feature gate so that you only
compile the device(s) you want. To use, in your Cargo.toml:

```toml
[dependencies.gd32e5]
version = "0.9.1"
features = ["gd32e503", "rt", "critical-section"]
```

The `rt` feature is optional and brings in support for `cortex-m-rt`.

In your code:

```rust
use gd32e5::gd32e503;

let mut peripherals = gd32e503::Peripherals::take().unwrap();
let gpioa = &peripherals.GPIOA;
gpioa.odr.modify(|_, w| w.odr0().set_bit());
```

For full details on the autogenerated API, please see:
https://docs.rs/svd2rust/0.32.0/svd2rust/#peripheral-api

## Supported Devices

| Module | Devices | Links |
|:------:|:-------:|:-----:|
| gd32e503 | GD32E503 | [GD32E503](https://www.gd32mcu.com/download/down/document_id/249/path_type/1), [gigadevice.com](https://www.gigadevice.com/products/microcontrollers/gd32/arm-cortex-m33/high-performance-line/) |
| gd32e505 | GD32E505 | [GD32E505](https://www.gd32mcu.com/download/down/document_id/249/path_type/1), [gigadevice.com](https://www.gigadevice.com/products/microcontrollers/gd32/arm-cortex-m33/high-performance-line/) |
| gd32e507 | GD32E507 | [GD32E507](https://www.gd32mcu.com/download/down/document_id/249/path_type/1), [gigadevice.com](https://www.gigadevice.com/products/microcontrollers/gd32/arm-cortex-m33/high-performance-line/) |
| gd32e508 | GD32E508 | [GD32E508](https://www.gd32mcu.com/download/down/document_id/249/path_type/1), [gigadevice.com](https://www.gigadevice.com/products/microcontrollers/gd32/arm-cortex-m33/high-performance-line/) |