#![doc = "Peripheral access API for GD32F3X0 microcontrollers (generated using svd2rust v0.21.0 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.21.0/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"] #![deny(const_err)] #![deny(dead_code)] #![deny(improper_ctypes)] #![deny(missing_docs)] #![deny(no_mangle_generic_items)] #![deny(non_shorthand_field_patterns)] #![deny(overflowing_literals)] #![deny(path_statements)] #![deny(patterns_in_fns_without_body)] #![deny(private_in_public)] #![deny(unconditional_recursion)] #![deny(unused_allocation)] #![deny(unused_comparisons)] #![deny(unused_parens)] #![deny(while_true)] #![allow(non_camel_case_types)] #![allow(non_snake_case)] #![no_std] use core::marker::PhantomData; use core::ops::Deref; #[doc = r"Number available in the NVIC for configuring priority"] pub const NVIC_PRIO_BITS: u8 = 4; #[cfg(feature = "rt")] pub use self::Interrupt as interrupt; pub use cortex_m::peripheral::Peripherals as CorePeripherals; pub use cortex_m::peripheral::{CBP, CPUID, DCB, DWT, FPB, ITM, MPU, NVIC, SCB, SYST, TPIU}; #[cfg(feature = "rt")] pub use cortex_m_rt::interrupt; #[allow(unused_imports)] use generic::*; #[doc = "Common register and bit access and modify traits"] pub mod generic; #[cfg(feature = "rt")] extern "C" { fn WWDGT(); fn LVD(); fn RTC(); fn FMC(); fn RCU(); fn EXTI0_1(); fn EXTI2_3(); fn EXTI4_15(); fn TSI(); fn DMA_CHANNEL0(); fn DMA_CHANNEL1_2(); fn DMA_CHANNEL3_4(); fn ADC_CMP(); fn TIMER0_BRK_UP_TRG_COM(); fn TIMER0_CC(); fn TIMER1(); fn TIMER2(); fn TIMER5_DAC(); fn TIMER13(); fn TIMER14(); fn TIMER15(); fn TIMER16(); fn I2C0_EV(); fn I2C1_EV(); fn SPI0(); fn SPI1(); fn USART0(); fn USART1(); fn CEC(); fn I2C0_ER(); fn I2C1_ER(); fn USBFS_WKUP(); fn DMA_CHANNEL5_6(); fn USBFS(); } #[doc(hidden)] pub union Vector { _handler: unsafe extern "C" fn(), _reserved: u32, } #[cfg(feature = "rt")] #[doc(hidden)] #[link_section = ".vector_table.interrupts"] #[no_mangle] pub static __INTERRUPTS: [Vector; 68] = [ Vector { _handler: WWDGT }, Vector { _handler: LVD }, Vector { _handler: RTC }, Vector { _handler: FMC }, Vector { _handler: RCU }, Vector { _handler: EXTI0_1 }, Vector { _handler: EXTI2_3 }, Vector { _handler: EXTI4_15 }, Vector { _handler: TSI }, Vector { _handler: DMA_CHANNEL0, }, Vector { _handler: DMA_CHANNEL1_2, }, Vector { _handler: DMA_CHANNEL3_4, }, Vector { _handler: ADC_CMP }, Vector { _handler: TIMER0_BRK_UP_TRG_COM, }, Vector { _handler: TIMER0_CC, }, Vector { _handler: TIMER1 }, Vector { _handler: TIMER2 }, Vector { _handler: TIMER5_DAC, }, Vector { _reserved: 0 }, Vector { _handler: TIMER13 }, Vector { _handler: TIMER14 }, Vector { _handler: TIMER15 }, Vector { _handler: TIMER16 }, Vector { _handler: I2C0_EV }, Vector { _handler: I2C1_EV }, Vector { _handler: SPI0 }, Vector { _handler: SPI1 }, Vector { _handler: USART0 }, Vector { _handler: USART1 }, Vector { _reserved: 0 }, Vector { _handler: CEC }, Vector { _reserved: 0 }, Vector { _handler: I2C0_ER }, Vector { _reserved: 0 }, Vector { _handler: I2C1_ER }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: USBFS_WKUP, }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: DMA_CHANNEL5_6, }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _reserved: 0 }, Vector { _handler: USBFS }, ]; #[doc = r"Enumeration of all the interrupts."] #[derive(Copy, Clone, Debug, PartialEq, Eq)] #[repr(u16)] pub enum Interrupt { #[doc = "0 - WWDGT"] WWDGT = 0, #[doc = "1 - LVD"] LVD = 1, #[doc = "2 - RTC"] RTC = 2, #[doc = "3 - FMC"] FMC = 3, #[doc = "4 - RCU"] RCU = 4, #[doc = "5 - EXTI0_1"] EXTI0_1 = 5, #[doc = "6 - EXTI2_3"] EXTI2_3 = 6, #[doc = "7 - EXTI4_15"] EXTI4_15 = 7, #[doc = "8 - TSI"] TSI = 8, #[doc = "9 - DMA_Channel0"] DMA_CHANNEL0 = 9, #[doc = "10 - DMA_Channel1_2"] DMA_CHANNEL1_2 = 10, #[doc = "11 - DMA_Channel3_4"] DMA_CHANNEL3_4 = 11, #[doc = "12 - ADC_CMP"] ADC_CMP = 12, #[doc = "13 - TIMER0_BRK_UP_TRG_COM"] TIMER0_BRK_UP_TRG_COM = 13, #[doc = "14 - TIMER0_CC"] TIMER0_CC = 14, #[doc = "15 - TIMER1"] TIMER1 = 15, #[doc = "16 - TIMER2"] TIMER2 = 16, #[doc = "17 - TIMER5_DAC"] TIMER5_DAC = 17, #[doc = "19 - TIMER13"] TIMER13 = 19, #[doc = "20 - TIMER14"] TIMER14 = 20, #[doc = "21 - TIMER15"] TIMER15 = 21, #[doc = "22 - TIMER16"] TIMER16 = 22, #[doc = "23 - I2C0_EV"] I2C0_EV = 23, #[doc = "24 - I2C1_EV"] I2C1_EV = 24, #[doc = "25 - SPI0"] SPI0 = 25, #[doc = "26 - SPI1"] SPI1 = 26, #[doc = "27 - USART0"] USART0 = 27, #[doc = "28 - USART1"] USART1 = 28, #[doc = "30 - CEC"] CEC = 30, #[doc = "32 - I2C0_ER"] I2C0_ER = 32, #[doc = "34 - I2C1_ER"] I2C1_ER = 34, #[doc = "42 - USBFS_WKUP"] USBFS_WKUP = 42, #[doc = "48 - DMA_Channel5_6"] DMA_CHANNEL5_6 = 48, #[doc = "67 - USBFS"] USBFS = 67, } unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt { #[inline(always)] fn number(self) -> u16 { self as u16 } } #[doc = "Analog to digital converter"] pub struct ADC { _marker: PhantomData<*const ()>, } unsafe impl Send for ADC {} impl ADC { #[doc = r"Pointer to the register block"] pub const PTR: *const adc::RegisterBlock = 0x4001_2400 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const adc::RegisterBlock { Self::PTR } } impl Deref for ADC { type Target = adc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for ADC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("ADC").finish() } } #[doc = "Analog to digital converter"] pub mod adc { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - status register"] pub stat: crate::Reg, #[doc = "0x04 - control register 0"] pub ctl0: crate::Reg, #[doc = "0x08 - control register 1"] pub ctl1: crate::Reg, #[doc = "0x0c - Sampling time register 0"] pub sampt0: crate::Reg, #[doc = "0x10 - Sampling time register 1"] pub sampt1: crate::Reg, #[doc = "0x14 - Inserted channel data offset register 0"] pub ioff0: crate::Reg, #[doc = "0x18 - Inserted channel data offset register 1"] pub ioff1: crate::Reg, #[doc = "0x1c - Inserted channel data offset register 2"] pub ioff2: crate::Reg, #[doc = "0x20 - Inserted channel data offset register 3"] pub ioff3: crate::Reg, #[doc = "0x24 - watchdog higher threshold register"] pub wdht: crate::Reg, #[doc = "0x28 - watchdog lower threshold register"] pub wdlt: crate::Reg, #[doc = "0x2c - regular sequence register 0"] pub rsq0: crate::Reg, #[doc = "0x30 - regular sequence register 1"] pub rsq1: crate::Reg, #[doc = "0x34 - regular sequence register 2"] pub rsq2: crate::Reg, #[doc = "0x38 - injected sequence register"] pub isq: crate::Reg, #[doc = "0x3c - injected data register 0"] pub idata0: crate::Reg, #[doc = "0x40 - injected data register 1"] pub idata1: crate::Reg, #[doc = "0x44 - injected data register 2"] pub idata2: crate::Reg, #[doc = "0x48 - injected data register 3"] pub idata3: crate::Reg, #[doc = "0x4c - regular data register"] pub rdata: crate::Reg, _reserved20: [u8; 0x30], #[doc = "0x80 - ADC oversample control register"] pub ovsampctl: crate::Reg, } #[doc = "STAT register accessor: an alias for `Reg`"] pub type STAT = crate::Reg; #[doc = "status register"] pub mod stat { #[doc = "Register `STAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `STAT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `STRC` reader - Start flag of regular channel group"] pub struct STRC_R(crate::FieldReader); impl STRC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STRC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STRC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STRC` writer - Start flag of regular channel group"] pub struct STRC_W<'a> { w: &'a mut W, } impl<'a> STRC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `STIC` reader - Start flag of inserted channel group"] pub struct STIC_R(crate::FieldReader); impl STIC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STIC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STIC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STIC` writer - Start flag of inserted channel group"] pub struct STIC_W<'a> { w: &'a mut W, } impl<'a> STIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EOIC` reader - End of inserted group conversion flag"] pub struct EOIC_R(crate::FieldReader); impl EOIC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOIC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOIC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOIC` writer - End of inserted group conversion flag"] pub struct EOIC_W<'a> { w: &'a mut W, } impl<'a> EOIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `EOC` reader - End of group conversion flag"] pub struct EOC_R(crate::FieldReader); impl EOC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOC` writer - End of group conversion flag"] pub struct EOC_W<'a> { w: &'a mut W, } impl<'a> EOC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `WDE` reader - Analog watchdog flag"] pub struct WDE_R(crate::FieldReader); impl WDE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WDE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WDE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WDE` writer - Analog watchdog flag"] pub struct WDE_W<'a> { w: &'a mut W, } impl<'a> WDE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 4 - Start flag of regular channel group"] #[inline(always)] pub fn strc(&self) -> STRC_R { STRC_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Start flag of inserted channel group"] #[inline(always)] pub fn stic(&self) -> STIC_R { STIC_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - End of inserted group conversion flag"] #[inline(always)] pub fn eoic(&self) -> EOIC_R { EOIC_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - End of group conversion flag"] #[inline(always)] pub fn eoc(&self) -> EOC_R { EOC_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Analog watchdog flag"] #[inline(always)] pub fn wde(&self) -> WDE_R { WDE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 4 - Start flag of regular channel group"] #[inline(always)] pub fn strc(&mut self) -> STRC_W { STRC_W { w: self } } #[doc = "Bit 3 - Start flag of inserted channel group"] #[inline(always)] pub fn stic(&mut self) -> STIC_W { STIC_W { w: self } } #[doc = "Bit 2 - End of inserted group conversion flag"] #[inline(always)] pub fn eoic(&mut self) -> EOIC_W { EOIC_W { w: self } } #[doc = "Bit 1 - End of group conversion flag"] #[inline(always)] pub fn eoc(&mut self) -> EOC_W { EOC_W { w: self } } #[doc = "Bit 0 - Analog watchdog flag"] #[inline(always)] pub fn wde(&mut self) -> WDE_W { WDE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"] pub struct STAT_SPEC; impl crate::RegisterSpec for STAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat::R](R) reader structure"] impl crate::Readable for STAT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [stat::W](W) writer structure"] impl crate::Writable for STAT_SPEC { type Writer = W; } #[doc = "`reset()` method sets STAT to value 0"] impl crate::Resettable for STAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "control register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DRES` reader - ADC resolution"] pub struct DRES_R(crate::FieldReader); impl DRES_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DRES_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DRES_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DRES` writer - ADC resolution"] pub struct DRES_W<'a> { w: &'a mut W, } impl<'a> DRES_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `RWDEN` reader - Analog watchdog enable on regular channels"] pub struct RWDEN_R(crate::FieldReader); impl RWDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RWDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RWDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RWDEN` writer - Analog watchdog enable on regular channels"] pub struct RWDEN_W<'a> { w: &'a mut W, } impl<'a> RWDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `IWDEN` reader - Analog watchdog enable on injected channels"] pub struct IWDEN_R(crate::FieldReader); impl IWDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IWDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IWDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IWDEN` writer - Analog watchdog enable on injected channels"] pub struct IWDEN_W<'a> { w: &'a mut W, } impl<'a> IWDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `DISNUM` reader - Discontinuous mode channel count"] pub struct DISNUM_R(crate::FieldReader); impl DISNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DISNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DISNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DISNUM` writer - Discontinuous mode channel count"] pub struct DISNUM_W<'a> { w: &'a mut W, } impl<'a> DISNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13); self.w } } #[doc = "Field `DISIC` reader - Discontinuous mode on injected channels"] pub struct DISIC_R(crate::FieldReader); impl DISIC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DISIC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DISIC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DISIC` writer - Discontinuous mode on injected channels"] pub struct DISIC_W<'a> { w: &'a mut W, } impl<'a> DISIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `DISRC` reader - Discontinuous mode on regular channels"] pub struct DISRC_R(crate::FieldReader); impl DISRC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DISRC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DISRC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DISRC` writer - Discontinuous mode on regular channels"] pub struct DISRC_W<'a> { w: &'a mut W, } impl<'a> DISRC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `ICA` reader - Automatic injected group conversion"] pub struct ICA_R(crate::FieldReader); impl ICA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ICA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ICA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ICA` writer - Automatic injected group conversion"] pub struct ICA_W<'a> { w: &'a mut W, } impl<'a> ICA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `WDSC` reader - Enable the watchdog on a single channel in scan mode"] pub struct WDSC_R(crate::FieldReader); impl WDSC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WDSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WDSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WDSC` writer - Enable the watchdog on a single channel in scan mode"] pub struct WDSC_W<'a> { w: &'a mut W, } impl<'a> WDSC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `SM` reader - Scan mode"] pub struct SM_R(crate::FieldReader); impl SM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SM` writer - Scan mode"] pub struct SM_W<'a> { w: &'a mut W, } impl<'a> SM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `EOICIE` reader - Interrupt enable for injected channels"] pub struct EOICIE_R(crate::FieldReader); impl EOICIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOICIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOICIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOICIE` writer - Interrupt enable for injected channels"] pub struct EOICIE_W<'a> { w: &'a mut W, } impl<'a> EOICIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `WDEIE` reader - Analog watchdog interrupt enable"] pub struct WDEIE_R(crate::FieldReader); impl WDEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WDEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WDEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WDEIE` writer - Analog watchdog interrupt enable"] pub struct WDEIE_W<'a> { w: &'a mut W, } impl<'a> WDEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `EOCIE` reader - Interrupt enable for EOC"] pub struct EOCIE_R(crate::FieldReader); impl EOCIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOCIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOCIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOCIE` writer - Interrupt enable for EOC"] pub struct EOCIE_W<'a> { w: &'a mut W, } impl<'a> EOCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `WDCHSEL` reader - Analog watchdog channel select bits"] pub struct WDCHSEL_R(crate::FieldReader); impl WDCHSEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { WDCHSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WDCHSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WDCHSEL` writer - Analog watchdog channel select bits"] pub struct WDCHSEL_W<'a> { w: &'a mut W, } impl<'a> WDCHSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); self.w } } impl R { #[doc = "Bits 24:25 - ADC resolution"] #[inline(always)] pub fn dres(&self) -> DRES_R { DRES_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bit 23 - Analog watchdog enable on regular channels"] #[inline(always)] pub fn rwden(&self) -> RWDEN_R { RWDEN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 22 - Analog watchdog enable on injected channels"] #[inline(always)] pub fn iwden(&self) -> IWDEN_R { IWDEN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bits 13:15 - Discontinuous mode channel count"] #[inline(always)] pub fn disnum(&self) -> DISNUM_R { DISNUM_R::new(((self.bits >> 13) & 0x07) as u8) } #[doc = "Bit 12 - Discontinuous mode on injected channels"] #[inline(always)] pub fn disic(&self) -> DISIC_R { DISIC_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Discontinuous mode on regular channels"] #[inline(always)] pub fn disrc(&self) -> DISRC_R { DISRC_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Automatic injected group conversion"] #[inline(always)] pub fn ica(&self) -> ICA_R { ICA_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Enable the watchdog on a single channel in scan mode"] #[inline(always)] pub fn wdsc(&self) -> WDSC_R { WDSC_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Scan mode"] #[inline(always)] pub fn sm(&self) -> SM_R { SM_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Interrupt enable for injected channels"] #[inline(always)] pub fn eoicie(&self) -> EOICIE_R { EOICIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Analog watchdog interrupt enable"] #[inline(always)] pub fn wdeie(&self) -> WDEIE_R { WDEIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Interrupt enable for EOC"] #[inline(always)] pub fn eocie(&self) -> EOCIE_R { EOCIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bits 0:4 - Analog watchdog channel select bits"] #[inline(always)] pub fn wdchsel(&self) -> WDCHSEL_R { WDCHSEL_R::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 24:25 - ADC resolution"] #[inline(always)] pub fn dres(&mut self) -> DRES_W { DRES_W { w: self } } #[doc = "Bit 23 - Analog watchdog enable on regular channels"] #[inline(always)] pub fn rwden(&mut self) -> RWDEN_W { RWDEN_W { w: self } } #[doc = "Bit 22 - Analog watchdog enable on injected channels"] #[inline(always)] pub fn iwden(&mut self) -> IWDEN_W { IWDEN_W { w: self } } #[doc = "Bits 13:15 - Discontinuous mode channel count"] #[inline(always)] pub fn disnum(&mut self) -> DISNUM_W { DISNUM_W { w: self } } #[doc = "Bit 12 - Discontinuous mode on injected channels"] #[inline(always)] pub fn disic(&mut self) -> DISIC_W { DISIC_W { w: self } } #[doc = "Bit 11 - Discontinuous mode on regular channels"] #[inline(always)] pub fn disrc(&mut self) -> DISRC_W { DISRC_W { w: self } } #[doc = "Bit 10 - Automatic injected group conversion"] #[inline(always)] pub fn ica(&mut self) -> ICA_W { ICA_W { w: self } } #[doc = "Bit 9 - Enable the watchdog on a single channel in scan mode"] #[inline(always)] pub fn wdsc(&mut self) -> WDSC_W { WDSC_W { w: self } } #[doc = "Bit 8 - Scan mode"] #[inline(always)] pub fn sm(&mut self) -> SM_W { SM_W { w: self } } #[doc = "Bit 7 - Interrupt enable for injected channels"] #[inline(always)] pub fn eoicie(&mut self) -> EOICIE_W { EOICIE_W { w: self } } #[doc = "Bit 6 - Analog watchdog interrupt enable"] #[inline(always)] pub fn wdeie(&mut self) -> WDEIE_W { WDEIE_W { w: self } } #[doc = "Bit 5 - Interrupt enable for EOC"] #[inline(always)] pub fn eocie(&mut self) -> EOCIE_W { EOCIE_W { w: self } } #[doc = "Bits 0:4 - Analog watchdog channel select bits"] #[inline(always)] pub fn wdchsel(&mut self) -> WDCHSEL_W { WDCHSEL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `VBATEN` reader - enable/disable the VBAT channel"] pub struct VBATEN_R(crate::FieldReader); impl VBATEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { VBATEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for VBATEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `VBATEN` writer - enable/disable the VBAT channel"] pub struct VBATEN_W<'a> { w: &'a mut W, } impl<'a> VBATEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `TSVREN` reader - Temperature sensor and VREFINT enable"] pub struct TSVREN_R(crate::FieldReader); impl TSVREN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TSVREN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TSVREN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TSVREN` writer - Temperature sensor and VREFINT enable"] pub struct TSVREN_W<'a> { w: &'a mut W, } impl<'a> TSVREN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `SWRCST` reader - Start conversion of regular channels"] pub struct SWRCST_R(crate::FieldReader); impl SWRCST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWRCST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWRCST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWRCST` writer - Start conversion of regular channels"] pub struct SWRCST_W<'a> { w: &'a mut W, } impl<'a> SWRCST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `SWICST` reader - Start conversion of injected channels"] pub struct SWICST_R(crate::FieldReader); impl SWICST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWICST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWICST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWICST` writer - Start conversion of injected channels"] pub struct SWICST_W<'a> { w: &'a mut W, } impl<'a> SWICST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `ETERC` reader - External trigger conversion mode for regular channels"] pub struct ETERC_R(crate::FieldReader); impl ETERC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ETERC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ETERC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ETERC` writer - External trigger conversion mode for regular channels"] pub struct ETERC_W<'a> { w: &'a mut W, } impl<'a> ETERC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `ETSRC` reader - External event select for regular group"] pub struct ETSRC_R(crate::FieldReader); impl ETSRC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ETSRC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ETSRC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ETSRC` writer - External event select for regular group"] pub struct ETSRC_W<'a> { w: &'a mut W, } impl<'a> ETSRC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 17)) | ((value as u32 & 0x07) << 17); self.w } } #[doc = "Field `ETEIC` reader - External trigger conversion mode for injected channels"] pub struct ETEIC_R(crate::FieldReader); impl ETEIC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ETEIC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ETEIC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ETEIC` writer - External trigger conversion mode for injected channels"] pub struct ETEIC_W<'a> { w: &'a mut W, } impl<'a> ETEIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `ETSIC` reader - External event select for injected group"] pub struct ETSIC_R(crate::FieldReader); impl ETSIC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ETSIC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ETSIC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ETSIC` writer - External event select for injected group"] pub struct ETSIC_W<'a> { w: &'a mut W, } impl<'a> ETSIC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `DAL` reader - Data alignment"] pub struct DAL_R(crate::FieldReader); impl DAL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAL` writer - Data alignment"] pub struct DAL_W<'a> { w: &'a mut W, } impl<'a> DAL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `DMA` reader - Direct memory access mode"] pub struct DMA_R(crate::FieldReader); impl DMA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DMA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMA` writer - Direct memory access mode"] pub struct DMA_W<'a> { w: &'a mut W, } impl<'a> DMA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `RSTCLB` reader - Reset calibration"] pub struct RSTCLB_R(crate::FieldReader); impl RSTCLB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RSTCLB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSTCLB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSTCLB` writer - Reset calibration"] pub struct RSTCLB_W<'a> { w: &'a mut W, } impl<'a> RSTCLB_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CLB` reader - A/D calibration"] pub struct CLB_R(crate::FieldReader); impl CLB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CLB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CLB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CLB` writer - A/D calibration"] pub struct CLB_W<'a> { w: &'a mut W, } impl<'a> CLB_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CTN` reader - Continuous conversion"] pub struct CTN_R(crate::FieldReader); impl CTN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CTN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTN` writer - Continuous conversion"] pub struct CTN_W<'a> { w: &'a mut W, } impl<'a> CTN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `ADCON` reader - A/D converter ON / OFF"] pub struct ADCON_R(crate::FieldReader); impl ADCON_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADCON_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADCON_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADCON` writer - A/D converter ON / OFF"] pub struct ADCON_W<'a> { w: &'a mut W, } impl<'a> ADCON_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 24 - enable/disable the VBAT channel"] #[inline(always)] pub fn vbaten(&self) -> VBATEN_R { VBATEN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 23 - Temperature sensor and VREFINT enable"] #[inline(always)] pub fn tsvren(&self) -> TSVREN_R { TSVREN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 22 - Start conversion of regular channels"] #[inline(always)] pub fn swrcst(&self) -> SWRCST_R { SWRCST_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 21 - Start conversion of injected channels"] #[inline(always)] pub fn swicst(&self) -> SWICST_R { SWICST_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - External trigger conversion mode for regular channels"] #[inline(always)] pub fn eterc(&self) -> ETERC_R { ETERC_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bits 17:19 - External event select for regular group"] #[inline(always)] pub fn etsrc(&self) -> ETSRC_R { ETSRC_R::new(((self.bits >> 17) & 0x07) as u8) } #[doc = "Bit 15 - External trigger conversion mode for injected channels"] #[inline(always)] pub fn eteic(&self) -> ETEIC_R { ETEIC_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 12:14 - External event select for injected group"] #[inline(always)] pub fn etsic(&self) -> ETSIC_R { ETSIC_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bit 11 - Data alignment"] #[inline(always)] pub fn dal(&self) -> DAL_R { DAL_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 8 - Direct memory access mode"] #[inline(always)] pub fn dma(&self) -> DMA_R { DMA_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 3 - Reset calibration"] #[inline(always)] pub fn rstclb(&self) -> RSTCLB_R { RSTCLB_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - A/D calibration"] #[inline(always)] pub fn clb(&self) -> CLB_R { CLB_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Continuous conversion"] #[inline(always)] pub fn ctn(&self) -> CTN_R { CTN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - A/D converter ON / OFF"] #[inline(always)] pub fn adcon(&self) -> ADCON_R { ADCON_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 24 - enable/disable the VBAT channel"] #[inline(always)] pub fn vbaten(&mut self) -> VBATEN_W { VBATEN_W { w: self } } #[doc = "Bit 23 - Temperature sensor and VREFINT enable"] #[inline(always)] pub fn tsvren(&mut self) -> TSVREN_W { TSVREN_W { w: self } } #[doc = "Bit 22 - Start conversion of regular channels"] #[inline(always)] pub fn swrcst(&mut self) -> SWRCST_W { SWRCST_W { w: self } } #[doc = "Bit 21 - Start conversion of injected channels"] #[inline(always)] pub fn swicst(&mut self) -> SWICST_W { SWICST_W { w: self } } #[doc = "Bit 20 - External trigger conversion mode for regular channels"] #[inline(always)] pub fn eterc(&mut self) -> ETERC_W { ETERC_W { w: self } } #[doc = "Bits 17:19 - External event select for regular group"] #[inline(always)] pub fn etsrc(&mut self) -> ETSRC_W { ETSRC_W { w: self } } #[doc = "Bit 15 - External trigger conversion mode for injected channels"] #[inline(always)] pub fn eteic(&mut self) -> ETEIC_W { ETEIC_W { w: self } } #[doc = "Bits 12:14 - External event select for injected group"] #[inline(always)] pub fn etsic(&mut self) -> ETSIC_W { ETSIC_W { w: self } } #[doc = "Bit 11 - Data alignment"] #[inline(always)] pub fn dal(&mut self) -> DAL_W { DAL_W { w: self } } #[doc = "Bit 8 - Direct memory access mode"] #[inline(always)] pub fn dma(&mut self) -> DMA_W { DMA_W { w: self } } #[doc = "Bit 3 - Reset calibration"] #[inline(always)] pub fn rstclb(&mut self) -> RSTCLB_W { RSTCLB_W { w: self } } #[doc = "Bit 2 - A/D calibration"] #[inline(always)] pub fn clb(&mut self) -> CLB_W { CLB_W { w: self } } #[doc = "Bit 1 - Continuous conversion"] #[inline(always)] pub fn ctn(&mut self) -> CTN_W { CTN_W { w: self } } #[doc = "Bit 0 - A/D converter ON / OFF"] #[inline(always)] pub fn adcon(&mut self) -> ADCON_W { ADCON_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SAMPT0 register accessor: an alias for `Reg`"] pub type SAMPT0 = crate::Reg; #[doc = "Sampling time register 0"] pub mod sampt0 { #[doc = "Register `SAMPT0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `SAMPT0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SPT10` reader - Channel 10 sample time selection"] pub struct SPT10_R(crate::FieldReader); impl SPT10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT10` writer - Channel 10 sample time selection"] pub struct SPT10_W<'a> { w: &'a mut W, } impl<'a> SPT10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); self.w } } #[doc = "Field `SPT11` reader - Channel 11 sample time selection"] pub struct SPT11_R(crate::FieldReader); impl SPT11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT11` writer - Channel 11 sample time selection"] pub struct SPT11_W<'a> { w: &'a mut W, } impl<'a> SPT11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); self.w } } #[doc = "Field `SPT12` reader - Channel 12 sample time selection"] pub struct SPT12_R(crate::FieldReader); impl SPT12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT12` writer - Channel 12 sample time selection"] pub struct SPT12_W<'a> { w: &'a mut W, } impl<'a> SPT12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 6)) | ((value as u32 & 0x07) << 6); self.w } } #[doc = "Field `SPT13` reader - Channel 13 sample time selection"] pub struct SPT13_R(crate::FieldReader); impl SPT13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT13` writer - Channel 13 sample time selection"] pub struct SPT13_W<'a> { w: &'a mut W, } impl<'a> SPT13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 9)) | ((value as u32 & 0x07) << 9); self.w } } #[doc = "Field `SPT14` reader - Channel 14 sample time selection"] pub struct SPT14_R(crate::FieldReader); impl SPT14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT14` writer - Channel 14 sample time selection"] pub struct SPT14_W<'a> { w: &'a mut W, } impl<'a> SPT14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `SPT15` reader - Channel 15 sample time selection"] pub struct SPT15_R(crate::FieldReader); impl SPT15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT15` writer - Channel 15 sample time selection"] pub struct SPT15_W<'a> { w: &'a mut W, } impl<'a> SPT15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 15)) | ((value as u32 & 0x07) << 15); self.w } } #[doc = "Field `SPT16` reader - Channel 16 sample time selection"] pub struct SPT16_R(crate::FieldReader); impl SPT16_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT16_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT16_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT16` writer - Channel 16 sample time selection"] pub struct SPT16_W<'a> { w: &'a mut W, } impl<'a> SPT16_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 18)) | ((value as u32 & 0x07) << 18); self.w } } #[doc = "Field `SPT17` reader - Channel 17 sample time selection"] pub struct SPT17_R(crate::FieldReader); impl SPT17_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT17_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT17_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT17` writer - Channel 17 sample time selection"] pub struct SPT17_W<'a> { w: &'a mut W, } impl<'a> SPT17_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 21)) | ((value as u32 & 0x07) << 21); self.w } } #[doc = "Field `SPT18` reader - Channel 18 sample time selection"] pub struct SPT18_R(crate::FieldReader); impl SPT18_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT18_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT18_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT18` writer - Channel 18 sample time selection"] pub struct SPT18_W<'a> { w: &'a mut W, } impl<'a> SPT18_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 24)) | ((value as u32 & 0x07) << 24); self.w } } impl R { #[doc = "Bits 0:2 - Channel 10 sample time selection"] #[inline(always)] pub fn spt10(&self) -> SPT10_R { SPT10_R::new((self.bits & 0x07) as u8) } #[doc = "Bits 3:5 - Channel 11 sample time selection"] #[inline(always)] pub fn spt11(&self) -> SPT11_R { SPT11_R::new(((self.bits >> 3) & 0x07) as u8) } #[doc = "Bits 6:8 - Channel 12 sample time selection"] #[inline(always)] pub fn spt12(&self) -> SPT12_R { SPT12_R::new(((self.bits >> 6) & 0x07) as u8) } #[doc = "Bits 9:11 - Channel 13 sample time selection"] #[inline(always)] pub fn spt13(&self) -> SPT13_R { SPT13_R::new(((self.bits >> 9) & 0x07) as u8) } #[doc = "Bits 12:14 - Channel 14 sample time selection"] #[inline(always)] pub fn spt14(&self) -> SPT14_R { SPT14_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bits 15:17 - Channel 15 sample time selection"] #[inline(always)] pub fn spt15(&self) -> SPT15_R { SPT15_R::new(((self.bits >> 15) & 0x07) as u8) } #[doc = "Bits 18:20 - Channel 16 sample time selection"] #[inline(always)] pub fn spt16(&self) -> SPT16_R { SPT16_R::new(((self.bits >> 18) & 0x07) as u8) } #[doc = "Bits 21:23 - Channel 17 sample time selection"] #[inline(always)] pub fn spt17(&self) -> SPT17_R { SPT17_R::new(((self.bits >> 21) & 0x07) as u8) } #[doc = "Bits 24:26 - Channel 18 sample time selection"] #[inline(always)] pub fn spt18(&self) -> SPT18_R { SPT18_R::new(((self.bits >> 24) & 0x07) as u8) } } impl W { #[doc = "Bits 0:2 - Channel 10 sample time selection"] #[inline(always)] pub fn spt10(&mut self) -> SPT10_W { SPT10_W { w: self } } #[doc = "Bits 3:5 - Channel 11 sample time selection"] #[inline(always)] pub fn spt11(&mut self) -> SPT11_W { SPT11_W { w: self } } #[doc = "Bits 6:8 - Channel 12 sample time selection"] #[inline(always)] pub fn spt12(&mut self) -> SPT12_W { SPT12_W { w: self } } #[doc = "Bits 9:11 - Channel 13 sample time selection"] #[inline(always)] pub fn spt13(&mut self) -> SPT13_W { SPT13_W { w: self } } #[doc = "Bits 12:14 - Channel 14 sample time selection"] #[inline(always)] pub fn spt14(&mut self) -> SPT14_W { SPT14_W { w: self } } #[doc = "Bits 15:17 - Channel 15 sample time selection"] #[inline(always)] pub fn spt15(&mut self) -> SPT15_W { SPT15_W { w: self } } #[doc = "Bits 18:20 - Channel 16 sample time selection"] #[inline(always)] pub fn spt16(&mut self) -> SPT16_W { SPT16_W { w: self } } #[doc = "Bits 21:23 - Channel 17 sample time selection"] #[inline(always)] pub fn spt17(&mut self) -> SPT17_W { SPT17_W { w: self } } #[doc = "Bits 24:26 - Channel 18 sample time selection"] #[inline(always)] pub fn spt18(&mut self) -> SPT18_W { SPT18_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Sampling time register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sampt0](index.html) module"] pub struct SAMPT0_SPEC; impl crate::RegisterSpec for SAMPT0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [sampt0::R](R) reader structure"] impl crate::Readable for SAMPT0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [sampt0::W](W) writer structure"] impl crate::Writable for SAMPT0_SPEC { type Writer = W; } #[doc = "`reset()` method sets SAMPT0 to value 0"] impl crate::Resettable for SAMPT0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SAMPT1 register accessor: an alias for `Reg`"] pub type SAMPT1 = crate::Reg; #[doc = "Sampling time register 1"] pub mod sampt1 { #[doc = "Register `SAMPT1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `SAMPT1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SPT0` reader - Channel 0 sample time selection"] pub struct SPT0_R(crate::FieldReader); impl SPT0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT0` writer - Channel 0 sample time selection"] pub struct SPT0_W<'a> { w: &'a mut W, } impl<'a> SPT0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); self.w } } #[doc = "Field `SPT1` reader - Channel 1 sample time selection"] pub struct SPT1_R(crate::FieldReader); impl SPT1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT1` writer - Channel 1 sample time selection"] pub struct SPT1_W<'a> { w: &'a mut W, } impl<'a> SPT1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); self.w } } #[doc = "Field `SPT2` reader - Channel 2 sample time selection"] pub struct SPT2_R(crate::FieldReader); impl SPT2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT2` writer - Channel 2 sample time selection"] pub struct SPT2_W<'a> { w: &'a mut W, } impl<'a> SPT2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 6)) | ((value as u32 & 0x07) << 6); self.w } } #[doc = "Field `SPT3` reader - Channel 3 sample time selection"] pub struct SPT3_R(crate::FieldReader); impl SPT3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT3` writer - Channel 3 sample time selection"] pub struct SPT3_W<'a> { w: &'a mut W, } impl<'a> SPT3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 9)) | ((value as u32 & 0x07) << 9); self.w } } #[doc = "Field `SPT4` reader - Channel 4 sample time selection"] pub struct SPT4_R(crate::FieldReader); impl SPT4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT4` writer - Channel 4 sample time selection"] pub struct SPT4_W<'a> { w: &'a mut W, } impl<'a> SPT4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `SPT5` reader - Channel 5 sample time selection"] pub struct SPT5_R(crate::FieldReader); impl SPT5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT5` writer - Channel 5 sample time selection"] pub struct SPT5_W<'a> { w: &'a mut W, } impl<'a> SPT5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 15)) | ((value as u32 & 0x07) << 15); self.w } } #[doc = "Field `SPT6` reader - Channel 6 sample time selection"] pub struct SPT6_R(crate::FieldReader); impl SPT6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT6` writer - Channel 6 sample time selection"] pub struct SPT6_W<'a> { w: &'a mut W, } impl<'a> SPT6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 18)) | ((value as u32 & 0x07) << 18); self.w } } #[doc = "Field `SPT7` reader - Channel 7 sample time selection"] pub struct SPT7_R(crate::FieldReader); impl SPT7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT7` writer - Channel 7 sample time selection"] pub struct SPT7_W<'a> { w: &'a mut W, } impl<'a> SPT7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 21)) | ((value as u32 & 0x07) << 21); self.w } } #[doc = "Field `SPT8` reader - Channel 8 sample time selection"] pub struct SPT8_R(crate::FieldReader); impl SPT8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT8` writer - Channel 8 sample time selection"] pub struct SPT8_W<'a> { w: &'a mut W, } impl<'a> SPT8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 24)) | ((value as u32 & 0x07) << 24); self.w } } #[doc = "Field `SPT9` reader - Channel 9 sample time selection"] pub struct SPT9_R(crate::FieldReader); impl SPT9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SPT9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPT9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPT9` writer - Channel 9 sample time selection"] pub struct SPT9_W<'a> { w: &'a mut W, } impl<'a> SPT9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 27)) | ((value as u32 & 0x07) << 27); self.w } } impl R { #[doc = "Bits 0:2 - Channel 0 sample time selection"] #[inline(always)] pub fn spt0(&self) -> SPT0_R { SPT0_R::new((self.bits & 0x07) as u8) } #[doc = "Bits 3:5 - Channel 1 sample time selection"] #[inline(always)] pub fn spt1(&self) -> SPT1_R { SPT1_R::new(((self.bits >> 3) & 0x07) as u8) } #[doc = "Bits 6:8 - Channel 2 sample time selection"] #[inline(always)] pub fn spt2(&self) -> SPT2_R { SPT2_R::new(((self.bits >> 6) & 0x07) as u8) } #[doc = "Bits 9:11 - Channel 3 sample time selection"] #[inline(always)] pub fn spt3(&self) -> SPT3_R { SPT3_R::new(((self.bits >> 9) & 0x07) as u8) } #[doc = "Bits 12:14 - Channel 4 sample time selection"] #[inline(always)] pub fn spt4(&self) -> SPT4_R { SPT4_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bits 15:17 - Channel 5 sample time selection"] #[inline(always)] pub fn spt5(&self) -> SPT5_R { SPT5_R::new(((self.bits >> 15) & 0x07) as u8) } #[doc = "Bits 18:20 - Channel 6 sample time selection"] #[inline(always)] pub fn spt6(&self) -> SPT6_R { SPT6_R::new(((self.bits >> 18) & 0x07) as u8) } #[doc = "Bits 21:23 - Channel 7 sample time selection"] #[inline(always)] pub fn spt7(&self) -> SPT7_R { SPT7_R::new(((self.bits >> 21) & 0x07) as u8) } #[doc = "Bits 24:26 - Channel 8 sample time selection"] #[inline(always)] pub fn spt8(&self) -> SPT8_R { SPT8_R::new(((self.bits >> 24) & 0x07) as u8) } #[doc = "Bits 27:29 - Channel 9 sample time selection"] #[inline(always)] pub fn spt9(&self) -> SPT9_R { SPT9_R::new(((self.bits >> 27) & 0x07) as u8) } } impl W { #[doc = "Bits 0:2 - Channel 0 sample time selection"] #[inline(always)] pub fn spt0(&mut self) -> SPT0_W { SPT0_W { w: self } } #[doc = "Bits 3:5 - Channel 1 sample time selection"] #[inline(always)] pub fn spt1(&mut self) -> SPT1_W { SPT1_W { w: self } } #[doc = "Bits 6:8 - Channel 2 sample time selection"] #[inline(always)] pub fn spt2(&mut self) -> SPT2_W { SPT2_W { w: self } } #[doc = "Bits 9:11 - Channel 3 sample time selection"] #[inline(always)] pub fn spt3(&mut self) -> SPT3_W { SPT3_W { w: self } } #[doc = "Bits 12:14 - Channel 4 sample time selection"] #[inline(always)] pub fn spt4(&mut self) -> SPT4_W { SPT4_W { w: self } } #[doc = "Bits 15:17 - Channel 5 sample time selection"] #[inline(always)] pub fn spt5(&mut self) -> SPT5_W { SPT5_W { w: self } } #[doc = "Bits 18:20 - Channel 6 sample time selection"] #[inline(always)] pub fn spt6(&mut self) -> SPT6_W { SPT6_W { w: self } } #[doc = "Bits 21:23 - Channel 7 sample time selection"] #[inline(always)] pub fn spt7(&mut self) -> SPT7_W { SPT7_W { w: self } } #[doc = "Bits 24:26 - Channel 8 sample time selection"] #[inline(always)] pub fn spt8(&mut self) -> SPT8_W { SPT8_W { w: self } } #[doc = "Bits 27:29 - Channel 9 sample time selection"] #[inline(always)] pub fn spt9(&mut self) -> SPT9_W { SPT9_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Sampling time register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sampt1](index.html) module"] pub struct SAMPT1_SPEC; impl crate::RegisterSpec for SAMPT1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [sampt1::R](R) reader structure"] impl crate::Readable for SAMPT1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [sampt1::W](W) writer structure"] impl crate::Writable for SAMPT1_SPEC { type Writer = W; } #[doc = "`reset()` method sets SAMPT1 to value 0"] impl crate::Resettable for SAMPT1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "IOFF0 register accessor: an alias for `Reg`"] pub type IOFF0 = crate::Reg; #[doc = "Inserted channel data offset register 0"] pub mod ioff0 { #[doc = "Register `IOFF0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `IOFF0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IOFF` reader - Data offset for injected channel x"] pub struct IOFF_R(crate::FieldReader); impl IOFF_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IOFF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IOFF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IOFF` writer - Data offset for injected channel x"] pub struct IOFF_W<'a> { w: &'a mut W, } impl<'a> IOFF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); self.w } } impl R { #[doc = "Bits 0:11 - Data offset for injected channel x"] #[inline(always)] pub fn ioff(&self) -> IOFF_R { IOFF_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Data offset for injected channel x"] #[inline(always)] pub fn ioff(&mut self) -> IOFF_W { IOFF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Inserted channel data offset register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ioff0](index.html) module"] pub struct IOFF0_SPEC; impl crate::RegisterSpec for IOFF0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ioff0::R](R) reader structure"] impl crate::Readable for IOFF0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ioff0::W](W) writer structure"] impl crate::Writable for IOFF0_SPEC { type Writer = W; } #[doc = "`reset()` method sets IOFF0 to value 0"] impl crate::Resettable for IOFF0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "IOFF1 register accessor: an alias for `Reg`"] pub type IOFF1 = crate::Reg; #[doc = "Inserted channel data offset register 1"] pub mod ioff1 { #[doc = "Register `IOFF1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `IOFF1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IOFF` reader - Data offset for injected channel x"] pub struct IOFF_R(crate::FieldReader); impl IOFF_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IOFF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IOFF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IOFF` writer - Data offset for injected channel x"] pub struct IOFF_W<'a> { w: &'a mut W, } impl<'a> IOFF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); self.w } } impl R { #[doc = "Bits 0:11 - Data offset for injected channel x"] #[inline(always)] pub fn ioff(&self) -> IOFF_R { IOFF_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Data offset for injected channel x"] #[inline(always)] pub fn ioff(&mut self) -> IOFF_W { IOFF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Inserted channel data offset register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ioff1](index.html) module"] pub struct IOFF1_SPEC; impl crate::RegisterSpec for IOFF1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ioff1::R](R) reader structure"] impl crate::Readable for IOFF1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ioff1::W](W) writer structure"] impl crate::Writable for IOFF1_SPEC { type Writer = W; } #[doc = "`reset()` method sets IOFF1 to value 0"] impl crate::Resettable for IOFF1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "IOFF2 register accessor: an alias for `Reg`"] pub type IOFF2 = crate::Reg; #[doc = "Inserted channel data offset register 2"] pub mod ioff2 { #[doc = "Register `IOFF2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `IOFF2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IOFF` reader - Data offset for injected channel x"] pub struct IOFF_R(crate::FieldReader); impl IOFF_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IOFF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IOFF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IOFF` writer - Data offset for injected channel x"] pub struct IOFF_W<'a> { w: &'a mut W, } impl<'a> IOFF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); self.w } } impl R { #[doc = "Bits 0:11 - Data offset for injected channel x"] #[inline(always)] pub fn ioff(&self) -> IOFF_R { IOFF_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Data offset for injected channel x"] #[inline(always)] pub fn ioff(&mut self) -> IOFF_W { IOFF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Inserted channel data offset register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ioff2](index.html) module"] pub struct IOFF2_SPEC; impl crate::RegisterSpec for IOFF2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ioff2::R](R) reader structure"] impl crate::Readable for IOFF2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ioff2::W](W) writer structure"] impl crate::Writable for IOFF2_SPEC { type Writer = W; } #[doc = "`reset()` method sets IOFF2 to value 0"] impl crate::Resettable for IOFF2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "IOFF3 register accessor: an alias for `Reg`"] pub type IOFF3 = crate::Reg; #[doc = "Inserted channel data offset register 3"] pub mod ioff3 { #[doc = "Register `IOFF3` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `IOFF3` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IOFF` reader - Data offset for injected channel x"] pub struct IOFF_R(crate::FieldReader); impl IOFF_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IOFF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IOFF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IOFF` writer - Data offset for injected channel x"] pub struct IOFF_W<'a> { w: &'a mut W, } impl<'a> IOFF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); self.w } } impl R { #[doc = "Bits 0:11 - Data offset for injected channel x"] #[inline(always)] pub fn ioff(&self) -> IOFF_R { IOFF_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Data offset for injected channel x"] #[inline(always)] pub fn ioff(&mut self) -> IOFF_W { IOFF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Inserted channel data offset register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ioff3](index.html) module"] pub struct IOFF3_SPEC; impl crate::RegisterSpec for IOFF3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ioff3::R](R) reader structure"] impl crate::Readable for IOFF3_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ioff3::W](W) writer structure"] impl crate::Writable for IOFF3_SPEC { type Writer = W; } #[doc = "`reset()` method sets IOFF3 to value 0"] impl crate::Resettable for IOFF3_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "WDHT register accessor: an alias for `Reg`"] pub type WDHT = crate::Reg; #[doc = "watchdog higher threshold register"] pub mod wdht { #[doc = "Register `WDHT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `WDHT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `WDHT` reader - Analog watchdog higher threshold"] pub struct WDHT_R(crate::FieldReader); impl WDHT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { WDHT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WDHT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WDHT` writer - Analog watchdog higher threshold"] pub struct WDHT_W<'a> { w: &'a mut W, } impl<'a> WDHT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); self.w } } impl R { #[doc = "Bits 0:11 - Analog watchdog higher threshold"] #[inline(always)] pub fn wdht(&self) -> WDHT_R { WDHT_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Analog watchdog higher threshold"] #[inline(always)] pub fn wdht(&mut self) -> WDHT_W { WDHT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "watchdog higher threshold register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdht](index.html) module"] pub struct WDHT_SPEC; impl crate::RegisterSpec for WDHT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [wdht::R](R) reader structure"] impl crate::Readable for WDHT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [wdht::W](W) writer structure"] impl crate::Writable for WDHT_SPEC { type Writer = W; } #[doc = "`reset()` method sets WDHT to value 0x0fff"] impl crate::Resettable for WDHT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0fff } } } #[doc = "WDLT register accessor: an alias for `Reg`"] pub type WDLT = crate::Reg; #[doc = "watchdog lower threshold register"] pub mod wdlt { #[doc = "Register `WDLT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `WDLT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `WDLT` reader - Analog watchdog lower threshold"] pub struct WDLT_R(crate::FieldReader); impl WDLT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { WDLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WDLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WDLT` writer - Analog watchdog lower threshold"] pub struct WDLT_W<'a> { w: &'a mut W, } impl<'a> WDLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); self.w } } impl R { #[doc = "Bits 0:11 - Analog watchdog lower threshold"] #[inline(always)] pub fn wdlt(&self) -> WDLT_R { WDLT_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Analog watchdog lower threshold"] #[inline(always)] pub fn wdlt(&mut self) -> WDLT_W { WDLT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "watchdog lower threshold register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wdlt](index.html) module"] pub struct WDLT_SPEC; impl crate::RegisterSpec for WDLT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [wdlt::R](R) reader structure"] impl crate::Readable for WDLT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [wdlt::W](W) writer structure"] impl crate::Writable for WDLT_SPEC { type Writer = W; } #[doc = "`reset()` method sets WDLT to value 0"] impl crate::Resettable for WDLT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RSQ0 register accessor: an alias for `Reg`"] pub type RSQ0 = crate::Reg; #[doc = "regular sequence register 0"] pub mod rsq0 { #[doc = "Register `RSQ0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `RSQ0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RL` reader - Regular channel sequence length"] pub struct RL_R(crate::FieldReader); impl RL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RL` writer - Regular channel sequence length"] pub struct RL_W<'a> { w: &'a mut W, } impl<'a> RL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 20)) | ((value as u32 & 0x0f) << 20); self.w } } #[doc = "Field `RSQ15` reader - 15th conversion in regular sequence"] pub struct RSQ15_R(crate::FieldReader); impl RSQ15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ15` writer - 15th conversion in regular sequence"] pub struct RSQ15_W<'a> { w: &'a mut W, } impl<'a> RSQ15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 15)) | ((value as u32 & 0x1f) << 15); self.w } } #[doc = "Field `RSQ14` reader - 14th conversion in regular sequence"] pub struct RSQ14_R(crate::FieldReader); impl RSQ14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ14` writer - 14th conversion in regular sequence"] pub struct RSQ14_W<'a> { w: &'a mut W, } impl<'a> RSQ14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 10)) | ((value as u32 & 0x1f) << 10); self.w } } #[doc = "Field `RSQ13` reader - 13th conversion in regular sequence"] pub struct RSQ13_R(crate::FieldReader); impl RSQ13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ13` writer - 13th conversion in regular sequence"] pub struct RSQ13_W<'a> { w: &'a mut W, } impl<'a> RSQ13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 5)) | ((value as u32 & 0x1f) << 5); self.w } } #[doc = "Field `RSQ12` reader - 12th conversion in regular sequence"] pub struct RSQ12_R(crate::FieldReader); impl RSQ12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ12` writer - 12th conversion in regular sequence"] pub struct RSQ12_W<'a> { w: &'a mut W, } impl<'a> RSQ12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); self.w } } impl R { #[doc = "Bits 20:23 - Regular channel sequence length"] #[inline(always)] pub fn rl(&self) -> RL_R { RL_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 15:19 - 15th conversion in regular sequence"] #[inline(always)] pub fn rsq15(&self) -> RSQ15_R { RSQ15_R::new(((self.bits >> 15) & 0x1f) as u8) } #[doc = "Bits 10:14 - 14th conversion in regular sequence"] #[inline(always)] pub fn rsq14(&self) -> RSQ14_R { RSQ14_R::new(((self.bits >> 10) & 0x1f) as u8) } #[doc = "Bits 5:9 - 13th conversion in regular sequence"] #[inline(always)] pub fn rsq13(&self) -> RSQ13_R { RSQ13_R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 0:4 - 12th conversion in regular sequence"] #[inline(always)] pub fn rsq12(&self) -> RSQ12_R { RSQ12_R::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 20:23 - Regular channel sequence length"] #[inline(always)] pub fn rl(&mut self) -> RL_W { RL_W { w: self } } #[doc = "Bits 15:19 - 15th conversion in regular sequence"] #[inline(always)] pub fn rsq15(&mut self) -> RSQ15_W { RSQ15_W { w: self } } #[doc = "Bits 10:14 - 14th conversion in regular sequence"] #[inline(always)] pub fn rsq14(&mut self) -> RSQ14_W { RSQ14_W { w: self } } #[doc = "Bits 5:9 - 13th conversion in regular sequence"] #[inline(always)] pub fn rsq13(&mut self) -> RSQ13_W { RSQ13_W { w: self } } #[doc = "Bits 0:4 - 12th conversion in regular sequence"] #[inline(always)] pub fn rsq12(&mut self) -> RSQ12_W { RSQ12_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "regular sequence register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rsq0](index.html) module"] pub struct RSQ0_SPEC; impl crate::RegisterSpec for RSQ0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rsq0::R](R) reader structure"] impl crate::Readable for RSQ0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [rsq0::W](W) writer structure"] impl crate::Writable for RSQ0_SPEC { type Writer = W; } #[doc = "`reset()` method sets RSQ0 to value 0"] impl crate::Resettable for RSQ0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RSQ1 register accessor: an alias for `Reg`"] pub type RSQ1 = crate::Reg; #[doc = "regular sequence register 1"] pub mod rsq1 { #[doc = "Register `RSQ1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `RSQ1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RSQ11` reader - 11th conversion in regular sequence"] pub struct RSQ11_R(crate::FieldReader); impl RSQ11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ11` writer - 11th conversion in regular sequence"] pub struct RSQ11_W<'a> { w: &'a mut W, } impl<'a> RSQ11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 25)) | ((value as u32 & 0x1f) << 25); self.w } } #[doc = "Field `RSQ10` reader - 10th conversion in regular sequence"] pub struct RSQ10_R(crate::FieldReader); impl RSQ10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ10` writer - 10th conversion in regular sequence"] pub struct RSQ10_W<'a> { w: &'a mut W, } impl<'a> RSQ10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 20)) | ((value as u32 & 0x1f) << 20); self.w } } #[doc = "Field `RSQ9` reader - 9th conversion in regular sequence"] pub struct RSQ9_R(crate::FieldReader); impl RSQ9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ9` writer - 9th conversion in regular sequence"] pub struct RSQ9_W<'a> { w: &'a mut W, } impl<'a> RSQ9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 15)) | ((value as u32 & 0x1f) << 15); self.w } } #[doc = "Field `RSQ8` reader - 8th conversion in regular sequence"] pub struct RSQ8_R(crate::FieldReader); impl RSQ8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ8` writer - 8th conversion in regular sequence"] pub struct RSQ8_W<'a> { w: &'a mut W, } impl<'a> RSQ8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 10)) | ((value as u32 & 0x1f) << 10); self.w } } #[doc = "Field `RSQ7` reader - 7th conversion in regular sequence"] pub struct RSQ7_R(crate::FieldReader); impl RSQ7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ7` writer - 7th conversion in regular sequence"] pub struct RSQ7_W<'a> { w: &'a mut W, } impl<'a> RSQ7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 5)) | ((value as u32 & 0x1f) << 5); self.w } } #[doc = "Field `RSQ6` reader - 6th conversion in regular sequence"] pub struct RSQ6_R(crate::FieldReader); impl RSQ6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ6` writer - 6th conversion in regular sequence"] pub struct RSQ6_W<'a> { w: &'a mut W, } impl<'a> RSQ6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); self.w } } impl R { #[doc = "Bits 25:29 - 11th conversion in regular sequence"] #[inline(always)] pub fn rsq11(&self) -> RSQ11_R { RSQ11_R::new(((self.bits >> 25) & 0x1f) as u8) } #[doc = "Bits 20:24 - 10th conversion in regular sequence"] #[inline(always)] pub fn rsq10(&self) -> RSQ10_R { RSQ10_R::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 15:19 - 9th conversion in regular sequence"] #[inline(always)] pub fn rsq9(&self) -> RSQ9_R { RSQ9_R::new(((self.bits >> 15) & 0x1f) as u8) } #[doc = "Bits 10:14 - 8th conversion in regular sequence"] #[inline(always)] pub fn rsq8(&self) -> RSQ8_R { RSQ8_R::new(((self.bits >> 10) & 0x1f) as u8) } #[doc = "Bits 5:9 - 7th conversion in regular sequence"] #[inline(always)] pub fn rsq7(&self) -> RSQ7_R { RSQ7_R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 0:4 - 6th conversion in regular sequence"] #[inline(always)] pub fn rsq6(&self) -> RSQ6_R { RSQ6_R::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 25:29 - 11th conversion in regular sequence"] #[inline(always)] pub fn rsq11(&mut self) -> RSQ11_W { RSQ11_W { w: self } } #[doc = "Bits 20:24 - 10th conversion in regular sequence"] #[inline(always)] pub fn rsq10(&mut self) -> RSQ10_W { RSQ10_W { w: self } } #[doc = "Bits 15:19 - 9th conversion in regular sequence"] #[inline(always)] pub fn rsq9(&mut self) -> RSQ9_W { RSQ9_W { w: self } } #[doc = "Bits 10:14 - 8th conversion in regular sequence"] #[inline(always)] pub fn rsq8(&mut self) -> RSQ8_W { RSQ8_W { w: self } } #[doc = "Bits 5:9 - 7th conversion in regular sequence"] #[inline(always)] pub fn rsq7(&mut self) -> RSQ7_W { RSQ7_W { w: self } } #[doc = "Bits 0:4 - 6th conversion in regular sequence"] #[inline(always)] pub fn rsq6(&mut self) -> RSQ6_W { RSQ6_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "regular sequence register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rsq1](index.html) module"] pub struct RSQ1_SPEC; impl crate::RegisterSpec for RSQ1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rsq1::R](R) reader structure"] impl crate::Readable for RSQ1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [rsq1::W](W) writer structure"] impl crate::Writable for RSQ1_SPEC { type Writer = W; } #[doc = "`reset()` method sets RSQ1 to value 0"] impl crate::Resettable for RSQ1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RSQ2 register accessor: an alias for `Reg`"] pub type RSQ2 = crate::Reg; #[doc = "regular sequence register 2"] pub mod rsq2 { #[doc = "Register `RSQ2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `RSQ2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RSQ5` reader - 5th conversion in regular sequence"] pub struct RSQ5_R(crate::FieldReader); impl RSQ5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ5` writer - 5th conversion in regular sequence"] pub struct RSQ5_W<'a> { w: &'a mut W, } impl<'a> RSQ5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 25)) | ((value as u32 & 0x1f) << 25); self.w } } #[doc = "Field `RSQ4` reader - 4th conversion in regular sequence"] pub struct RSQ4_R(crate::FieldReader); impl RSQ4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ4` writer - 4th conversion in regular sequence"] pub struct RSQ4_W<'a> { w: &'a mut W, } impl<'a> RSQ4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 20)) | ((value as u32 & 0x1f) << 20); self.w } } #[doc = "Field `RSQ3` reader - 3rd conversion in regular sequence"] pub struct RSQ3_R(crate::FieldReader); impl RSQ3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ3` writer - 3rd conversion in regular sequence"] pub struct RSQ3_W<'a> { w: &'a mut W, } impl<'a> RSQ3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 15)) | ((value as u32 & 0x1f) << 15); self.w } } #[doc = "Field `RSQ2` reader - 2nd conversion in regular sequence"] pub struct RSQ2_R(crate::FieldReader); impl RSQ2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ2` writer - 2nd conversion in regular sequence"] pub struct RSQ2_W<'a> { w: &'a mut W, } impl<'a> RSQ2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 10)) | ((value as u32 & 0x1f) << 10); self.w } } #[doc = "Field `RSQ1` reader - 1st conversion in regular sequence"] pub struct RSQ1_R(crate::FieldReader); impl RSQ1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ1` writer - 1st conversion in regular sequence"] pub struct RSQ1_W<'a> { w: &'a mut W, } impl<'a> RSQ1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 5)) | ((value as u32 & 0x1f) << 5); self.w } } #[doc = "Field `RSQ0` reader - conversion in regular sequence"] pub struct RSQ0_R(crate::FieldReader); impl RSQ0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RSQ0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSQ0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSQ0` writer - conversion in regular sequence"] pub struct RSQ0_W<'a> { w: &'a mut W, } impl<'a> RSQ0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); self.w } } impl R { #[doc = "Bits 25:29 - 5th conversion in regular sequence"] #[inline(always)] pub fn rsq5(&self) -> RSQ5_R { RSQ5_R::new(((self.bits >> 25) & 0x1f) as u8) } #[doc = "Bits 20:24 - 4th conversion in regular sequence"] #[inline(always)] pub fn rsq4(&self) -> RSQ4_R { RSQ4_R::new(((self.bits >> 20) & 0x1f) as u8) } #[doc = "Bits 15:19 - 3rd conversion in regular sequence"] #[inline(always)] pub fn rsq3(&self) -> RSQ3_R { RSQ3_R::new(((self.bits >> 15) & 0x1f) as u8) } #[doc = "Bits 10:14 - 2nd conversion in regular sequence"] #[inline(always)] pub fn rsq2(&self) -> RSQ2_R { RSQ2_R::new(((self.bits >> 10) & 0x1f) as u8) } #[doc = "Bits 5:9 - 1st conversion in regular sequence"] #[inline(always)] pub fn rsq1(&self) -> RSQ1_R { RSQ1_R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 0:4 - conversion in regular sequence"] #[inline(always)] pub fn rsq0(&self) -> RSQ0_R { RSQ0_R::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 25:29 - 5th conversion in regular sequence"] #[inline(always)] pub fn rsq5(&mut self) -> RSQ5_W { RSQ5_W { w: self } } #[doc = "Bits 20:24 - 4th conversion in regular sequence"] #[inline(always)] pub fn rsq4(&mut self) -> RSQ4_W { RSQ4_W { w: self } } #[doc = "Bits 15:19 - 3rd conversion in regular sequence"] #[inline(always)] pub fn rsq3(&mut self) -> RSQ3_W { RSQ3_W { w: self } } #[doc = "Bits 10:14 - 2nd conversion in regular sequence"] #[inline(always)] pub fn rsq2(&mut self) -> RSQ2_W { RSQ2_W { w: self } } #[doc = "Bits 5:9 - 1st conversion in regular sequence"] #[inline(always)] pub fn rsq1(&mut self) -> RSQ1_W { RSQ1_W { w: self } } #[doc = "Bits 0:4 - conversion in regular sequence"] #[inline(always)] pub fn rsq0(&mut self) -> RSQ0_W { RSQ0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "regular sequence register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rsq2](index.html) module"] pub struct RSQ2_SPEC; impl crate::RegisterSpec for RSQ2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rsq2::R](R) reader structure"] impl crate::Readable for RSQ2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [rsq2::W](W) writer structure"] impl crate::Writable for RSQ2_SPEC { type Writer = W; } #[doc = "`reset()` method sets RSQ2 to value 0"] impl crate::Resettable for RSQ2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "ISQ register accessor: an alias for `Reg`"] pub type ISQ = crate::Reg; #[doc = "injected sequence register"] pub mod isq { #[doc = "Register `ISQ` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ISQ` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IL` reader - Injected sequence length"] pub struct IL_R(crate::FieldReader); impl IL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { IL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IL` writer - Injected sequence length"] pub struct IL_W<'a> { w: &'a mut W, } impl<'a> IL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `ISQ3` reader - 3rd conversion in injected sequence"] pub struct ISQ3_R(crate::FieldReader); impl ISQ3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ISQ3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISQ3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISQ3` writer - 3rd conversion in injected sequence"] pub struct ISQ3_W<'a> { w: &'a mut W, } impl<'a> ISQ3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 15)) | ((value as u32 & 0x1f) << 15); self.w } } #[doc = "Field `ISQ2` reader - 2nd conversion in injected sequence"] pub struct ISQ2_R(crate::FieldReader); impl ISQ2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ISQ2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISQ2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISQ2` writer - 2nd conversion in injected sequence"] pub struct ISQ2_W<'a> { w: &'a mut W, } impl<'a> ISQ2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 10)) | ((value as u32 & 0x1f) << 10); self.w } } #[doc = "Field `ISQ1` reader - 1st conversion in injected sequence"] pub struct ISQ1_R(crate::FieldReader); impl ISQ1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ISQ1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISQ1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISQ1` writer - 1st conversion in injected sequence"] pub struct ISQ1_W<'a> { w: &'a mut W, } impl<'a> ISQ1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 5)) | ((value as u32 & 0x1f) << 5); self.w } } #[doc = "Field `ISQ0` reader - conversion in injected sequence"] pub struct ISQ0_R(crate::FieldReader); impl ISQ0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ISQ0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISQ0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISQ0` writer - conversion in injected sequence"] pub struct ISQ0_W<'a> { w: &'a mut W, } impl<'a> ISQ0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); self.w } } impl R { #[doc = "Bits 20:21 - Injected sequence length"] #[inline(always)] pub fn il(&self) -> IL_R { IL_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 15:19 - 3rd conversion in injected sequence"] #[inline(always)] pub fn isq3(&self) -> ISQ3_R { ISQ3_R::new(((self.bits >> 15) & 0x1f) as u8) } #[doc = "Bits 10:14 - 2nd conversion in injected sequence"] #[inline(always)] pub fn isq2(&self) -> ISQ2_R { ISQ2_R::new(((self.bits >> 10) & 0x1f) as u8) } #[doc = "Bits 5:9 - 1st conversion in injected sequence"] #[inline(always)] pub fn isq1(&self) -> ISQ1_R { ISQ1_R::new(((self.bits >> 5) & 0x1f) as u8) } #[doc = "Bits 0:4 - conversion in injected sequence"] #[inline(always)] pub fn isq0(&self) -> ISQ0_R { ISQ0_R::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 20:21 - Injected sequence length"] #[inline(always)] pub fn il(&mut self) -> IL_W { IL_W { w: self } } #[doc = "Bits 15:19 - 3rd conversion in injected sequence"] #[inline(always)] pub fn isq3(&mut self) -> ISQ3_W { ISQ3_W { w: self } } #[doc = "Bits 10:14 - 2nd conversion in injected sequence"] #[inline(always)] pub fn isq2(&mut self) -> ISQ2_W { ISQ2_W { w: self } } #[doc = "Bits 5:9 - 1st conversion in injected sequence"] #[inline(always)] pub fn isq1(&mut self) -> ISQ1_W { ISQ1_W { w: self } } #[doc = "Bits 0:4 - conversion in injected sequence"] #[inline(always)] pub fn isq0(&mut self) -> ISQ0_W { ISQ0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "injected sequence register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isq](index.html) module"] pub struct ISQ_SPEC; impl crate::RegisterSpec for ISQ_SPEC { type Ux = u32; } #[doc = "`read()` method returns [isq::R](R) reader structure"] impl crate::Readable for ISQ_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [isq::W](W) writer structure"] impl crate::Writable for ISQ_SPEC { type Writer = W; } #[doc = "`reset()` method sets ISQ to value 0"] impl crate::Resettable for ISQ_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "IDATA0 register accessor: an alias for `Reg`"] pub type IDATA0 = crate::Reg; #[doc = "injected data register 0"] pub mod idata0 { #[doc = "Register `IDATA0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `IDATAn` reader - Injected data"] pub struct IDATAN_R(crate::FieldReader); impl IDATAN_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IDATAN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IDATAN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Injected data"] #[inline(always)] pub fn idatan(&self) -> IDATAN_R { IDATAN_R::new((self.bits & 0xffff) as u16) } } #[doc = "injected data register 0\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idata0](index.html) module"] pub struct IDATA0_SPEC; impl crate::RegisterSpec for IDATA0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [idata0::R](R) reader structure"] impl crate::Readable for IDATA0_SPEC { type Reader = R; } #[doc = "`reset()` method sets IDATA0 to value 0"] impl crate::Resettable for IDATA0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "IDATA1 register accessor: an alias for `Reg`"] pub type IDATA1 = crate::Reg; #[doc = "injected data register 1"] pub mod idata1 { #[doc = "Register `IDATA1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `IDATAn` reader - Injected data"] pub struct IDATAN_R(crate::FieldReader); impl IDATAN_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IDATAN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IDATAN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Injected data"] #[inline(always)] pub fn idatan(&self) -> IDATAN_R { IDATAN_R::new((self.bits & 0xffff) as u16) } } #[doc = "injected data register 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idata1](index.html) module"] pub struct IDATA1_SPEC; impl crate::RegisterSpec for IDATA1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [idata1::R](R) reader structure"] impl crate::Readable for IDATA1_SPEC { type Reader = R; } #[doc = "`reset()` method sets IDATA1 to value 0"] impl crate::Resettable for IDATA1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "IDATA2 register accessor: an alias for `Reg`"] pub type IDATA2 = crate::Reg; #[doc = "injected data register 2"] pub mod idata2 { #[doc = "Register `IDATA2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `IDATAn` reader - Injected data"] pub struct IDATAN_R(crate::FieldReader); impl IDATAN_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IDATAN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IDATAN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Injected data"] #[inline(always)] pub fn idatan(&self) -> IDATAN_R { IDATAN_R::new((self.bits & 0xffff) as u16) } } #[doc = "injected data register 2\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idata2](index.html) module"] pub struct IDATA2_SPEC; impl crate::RegisterSpec for IDATA2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [idata2::R](R) reader structure"] impl crate::Readable for IDATA2_SPEC { type Reader = R; } #[doc = "`reset()` method sets IDATA2 to value 0"] impl crate::Resettable for IDATA2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "IDATA3 register accessor: an alias for `Reg`"] pub type IDATA3 = crate::Reg; #[doc = "injected data register 3"] pub mod idata3 { #[doc = "Register `IDATA3` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `IDATAn` reader - Injected data"] pub struct IDATAN_R(crate::FieldReader); impl IDATAN_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IDATAN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IDATAN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Injected data"] #[inline(always)] pub fn idatan(&self) -> IDATAN_R { IDATAN_R::new((self.bits & 0xffff) as u16) } } #[doc = "injected data register 3\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idata3](index.html) module"] pub struct IDATA3_SPEC; impl crate::RegisterSpec for IDATA3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [idata3::R](R) reader structure"] impl crate::Readable for IDATA3_SPEC { type Reader = R; } #[doc = "`reset()` method sets IDATA3 to value 0"] impl crate::Resettable for IDATA3_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RDATA register accessor: an alias for `Reg`"] pub type RDATA = crate::Reg; #[doc = "regular data register"] pub mod rdata { #[doc = "Register `RDATA` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `RDATA` reader - Regular data"] pub struct RDATA_R(crate::FieldReader); impl RDATA_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { RDATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RDATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Regular data"] #[inline(always)] pub fn rdata(&self) -> RDATA_R { RDATA_R::new((self.bits & 0xffff) as u16) } } #[doc = "regular data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdata](index.html) module"] pub struct RDATA_SPEC; impl crate::RegisterSpec for RDATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rdata::R](R) reader structure"] impl crate::Readable for RDATA_SPEC { type Reader = R; } #[doc = "`reset()` method sets RDATA to value 0"] impl crate::Resettable for RDATA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OVSAMPCTL register accessor: an alias for `Reg`"] pub type OVSAMPCTL = crate::Reg; #[doc = "ADC oversample control register"] pub mod ovsampctl { #[doc = "Register `OVSAMPCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OVSAMPCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TOVS` reader - Triggered Oversampling"] pub struct TOVS_R(crate::FieldReader); impl TOVS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TOVS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TOVS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TOVS` writer - Triggered Oversampling"] pub struct TOVS_W<'a> { w: &'a mut W, } impl<'a> TOVS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OVSS` reader - Oversampling shift"] pub struct OVSS_R(crate::FieldReader); impl OVSS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OVSS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OVSS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OVSS` writer - Oversampling shift"] pub struct OVSS_W<'a> { w: &'a mut W, } impl<'a> OVSS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 5)) | ((value as u32 & 0x0f) << 5); self.w } } #[doc = "Field `OVSR` reader - Oversampling ratio"] pub struct OVSR_R(crate::FieldReader); impl OVSR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OVSR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OVSR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OVSR` writer - Oversampling ratio"] pub struct OVSR_W<'a> { w: &'a mut W, } impl<'a> OVSR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 2)) | ((value as u32 & 0x07) << 2); self.w } } #[doc = "Field `OVSEN` reader - Oversampler Enable"] pub struct OVSEN_R(crate::FieldReader); impl OVSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OVSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OVSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OVSEN` writer - Oversampler Enable"] pub struct OVSEN_W<'a> { w: &'a mut W, } impl<'a> OVSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 9 - Triggered Oversampling"] #[inline(always)] pub fn tovs(&self) -> TOVS_R { TOVS_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bits 5:8 - Oversampling shift"] #[inline(always)] pub fn ovss(&self) -> OVSS_R { OVSS_R::new(((self.bits >> 5) & 0x0f) as u8) } #[doc = "Bits 2:4 - Oversampling ratio"] #[inline(always)] pub fn ovsr(&self) -> OVSR_R { OVSR_R::new(((self.bits >> 2) & 0x07) as u8) } #[doc = "Bit 0 - Oversampler Enable"] #[inline(always)] pub fn ovsen(&self) -> OVSEN_R { OVSEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 9 - Triggered Oversampling"] #[inline(always)] pub fn tovs(&mut self) -> TOVS_W { TOVS_W { w: self } } #[doc = "Bits 5:8 - Oversampling shift"] #[inline(always)] pub fn ovss(&mut self) -> OVSS_W { OVSS_W { w: self } } #[doc = "Bits 2:4 - Oversampling ratio"] #[inline(always)] pub fn ovsr(&mut self) -> OVSR_W { OVSR_W { w: self } } #[doc = "Bit 0 - Oversampler Enable"] #[inline(always)] pub fn ovsen(&mut self) -> OVSEN_W { OVSEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "ADC oversample control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ovsampctl](index.html) module"] pub struct OVSAMPCTL_SPEC; impl crate::RegisterSpec for OVSAMPCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ovsampctl::R](R) reader structure"] impl crate::Readable for OVSAMPCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ovsampctl::W](W) writer structure"] impl crate::Writable for OVSAMPCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets OVSAMPCTL to value 0"] impl crate::Resettable for OVSAMPCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "HDMI-CEC controller"] pub struct CEC { _marker: PhantomData<*const ()>, } unsafe impl Send for CEC {} impl CEC { #[doc = r"Pointer to the register block"] pub const PTR: *const cec::RegisterBlock = 0x4000_7800 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const cec::RegisterBlock { Self::PTR } } impl Deref for CEC { type Target = cec::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for CEC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("CEC").finish() } } #[doc = "HDMI-CEC controller"] pub mod cec { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register"] pub ctl: crate::Reg, #[doc = "0x04 - Configuration register"] pub cfg: crate::Reg, #[doc = "0x08 - Transmit data register"] pub tdata: crate::Reg, #[doc = "0x0c - Rx Data Register"] pub rdata: crate::Reg, #[doc = "0x10 - Interrupt Flag Register"] pub intf: crate::Reg, #[doc = "0x14 - interrupt enable register"] pub inten: crate::Reg, } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ENDOM` reader - ENDOM bit value in the next frame in TX mode"] pub struct ENDOM_R(crate::FieldReader); impl ENDOM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ENDOM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ENDOM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ENDOM` writer - ENDOM bit value in the next frame in TX mode"] pub struct ENDOM_W<'a> { w: &'a mut W, } impl<'a> ENDOM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `STAOM` reader - Start of sending a message"] pub struct STAOM_R(crate::FieldReader); impl STAOM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STAOM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STAOM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STAOM` writer - Start of sending a message"] pub struct STAOM_W<'a> { w: &'a mut W, } impl<'a> STAOM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CECEN` reader - CEC controller Enable"] pub struct CECEN_R(crate::FieldReader); impl CECEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CECEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CECEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CECEN` writer - CEC controller Enable"] pub struct CECEN_W<'a> { w: &'a mut W, } impl<'a> CECEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 2 - ENDOM bit value in the next frame in TX mode"] #[inline(always)] pub fn endom(&self) -> ENDOM_R { ENDOM_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Start of sending a message"] #[inline(always)] pub fn staom(&self) -> STAOM_R { STAOM_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - CEC controller Enable"] #[inline(always)] pub fn cecen(&self) -> CECEN_R { CECEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 2 - ENDOM bit value in the next frame in TX mode"] #[inline(always)] pub fn endom(&mut self) -> ENDOM_W { ENDOM_W { w: self } } #[doc = "Bit 1 - Start of sending a message"] #[inline(always)] pub fn staom(&mut self) -> STAOM_W { STAOM_W { w: self } } #[doc = "Bit 0 - CEC controller Enable"] #[inline(always)] pub fn cecen(&mut self) -> CECEN_W { CECEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CFG register accessor: an alias for `Reg`"] pub type CFG = crate::Reg; #[doc = "Configuration register"] pub mod cfg { #[doc = "Register `CFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SFT` reader - Signal Free Time"] pub struct SFT_R(crate::FieldReader); impl SFT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SFT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SFT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SFT` writer - Signal Free Time"] pub struct SFT_W<'a> { w: &'a mut W, } impl<'a> SFT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); self.w } } #[doc = "Field `RTOL` reader - Reception bit timing tolerance"] pub struct RTOL_R(crate::FieldReader); impl RTOL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTOL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTOL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTOL` writer - Reception bit timing tolerance"] pub struct RTOL_W<'a> { w: &'a mut W, } impl<'a> RTOL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `BRES` reader - Whether stop receive message when detected BRE"] pub struct BRES_R(crate::FieldReader); impl BRES_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRES_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRES_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRES` writer - Whether stop receive message when detected BRE"] pub struct BRES_W<'a> { w: &'a mut W, } impl<'a> BRES_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `BREG` reader - Generate an Error-bit when detected BRE in singlecast"] pub struct BREG_R(crate::FieldReader); impl BREG_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BREG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BREG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BREG` writer - Generate an Error-bit when detected BRE in singlecast"] pub struct BREG_W<'a> { w: &'a mut W, } impl<'a> BREG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `BPLEG` reader - Generate an Error-bit when detected BPLE in singlecast"] pub struct BPLEG_R(crate::FieldReader); impl BPLEG_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BPLEG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BPLEG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BPLEG` writer - Generate an Error-bit when detected BPLE in singlecast"] pub struct BPLEG_W<'a> { w: &'a mut W, } impl<'a> BPLEG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `BCNG` reader - Do not generate Error-bit in broadcast message"] pub struct BCNG_R(crate::FieldReader); impl BCNG_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BCNG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BCNG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BCNG` writer - Do not generate Error-bit in broadcast message"] pub struct BCNG_W<'a> { w: &'a mut W, } impl<'a> BCNG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SFTOPT` reader - The SFT start option bit"] pub struct SFTOPT_R(crate::FieldReader); impl SFTOPT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SFTOPT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SFTOPT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SFTOPT` writer - The SFT start option bit"] pub struct SFTOPT_W<'a> { w: &'a mut W, } impl<'a> SFTOPT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OAD` reader - Own Address"] pub struct OAD_R(crate::FieldReader); impl OAD_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { OAD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OAD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OAD` writer - Own Address"] pub struct OAD_W<'a> { w: &'a mut W, } impl<'a> OAD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7fff << 16)) | ((value as u32 & 0x7fff) << 16); self.w } } #[doc = "Field `LMEN` reader - Listen mode enable"] pub struct LMEN_R(crate::FieldReader); impl LMEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LMEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LMEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LMEN` writer - Listen mode enable"] pub struct LMEN_W<'a> { w: &'a mut W, } impl<'a> LMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:2 - Signal Free Time"] #[inline(always)] pub fn sft(&self) -> SFT_R { SFT_R::new((self.bits & 0x07) as u8) } #[doc = "Bit 3 - Reception bit timing tolerance"] #[inline(always)] pub fn rtol(&self) -> RTOL_R { RTOL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Whether stop receive message when detected BRE"] #[inline(always)] pub fn bres(&self) -> BRES_R { BRES_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Generate an Error-bit when detected BRE in singlecast"] #[inline(always)] pub fn breg(&self) -> BREG_R { BREG_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Generate an Error-bit when detected BPLE in singlecast"] #[inline(always)] pub fn bpleg(&self) -> BPLEG_R { BPLEG_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Do not generate Error-bit in broadcast message"] #[inline(always)] pub fn bcng(&self) -> BCNG_R { BCNG_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - The SFT start option bit"] #[inline(always)] pub fn sftopt(&self) -> SFTOPT_R { SFTOPT_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 16:30 - Own Address"] #[inline(always)] pub fn oad(&self) -> OAD_R { OAD_R::new(((self.bits >> 16) & 0x7fff) as u16) } #[doc = "Bit 31 - Listen mode enable"] #[inline(always)] pub fn lmen(&self) -> LMEN_R { LMEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:2 - Signal Free Time"] #[inline(always)] pub fn sft(&mut self) -> SFT_W { SFT_W { w: self } } #[doc = "Bit 3 - Reception bit timing tolerance"] #[inline(always)] pub fn rtol(&mut self) -> RTOL_W { RTOL_W { w: self } } #[doc = "Bit 4 - Whether stop receive message when detected BRE"] #[inline(always)] pub fn bres(&mut self) -> BRES_W { BRES_W { w: self } } #[doc = "Bit 5 - Generate an Error-bit when detected BRE in singlecast"] #[inline(always)] pub fn breg(&mut self) -> BREG_W { BREG_W { w: self } } #[doc = "Bit 6 - Generate an Error-bit when detected BPLE in singlecast"] #[inline(always)] pub fn bpleg(&mut self) -> BPLEG_W { BPLEG_W { w: self } } #[doc = "Bit 7 - Do not generate Error-bit in broadcast message"] #[inline(always)] pub fn bcng(&mut self) -> BCNG_W { BCNG_W { w: self } } #[doc = "Bit 8 - The SFT start option bit"] #[inline(always)] pub fn sftopt(&mut self) -> SFTOPT_W { SFTOPT_W { w: self } } #[doc = "Bits 16:30 - Own Address"] #[inline(always)] pub fn oad(&mut self) -> OAD_W { OAD_W { w: self } } #[doc = "Bit 31 - Listen mode enable"] #[inline(always)] pub fn lmen(&mut self) -> LMEN_W { LMEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFG_SPEC; impl crate::RegisterSpec for CFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg::R](R) reader structure"] impl crate::Readable for CFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] impl crate::Writable for CFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG to value 0"] impl crate::Resettable for CFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "TDATA register accessor: an alias for `Reg`"] pub type TDATA = crate::Reg; #[doc = "Transmit data register"] pub mod tdata { #[doc = "Register `TDATA` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TDATA` writer - Tx Data register"] pub struct TDATA_W<'a> { w: &'a mut W, } impl<'a> TDATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl W { #[doc = "Bits 0:7 - Tx Data register"] #[inline(always)] pub fn tdata(&mut self) -> TDATA_W { TDATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Transmit data register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tdata](index.html) module"] pub struct TDATA_SPEC; impl crate::RegisterSpec for TDATA_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [tdata::W](W) writer structure"] impl crate::Writable for TDATA_SPEC { type Writer = W; } #[doc = "`reset()` method sets TDATA to value 0"] impl crate::Resettable for TDATA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RDATA register accessor: an alias for `Reg`"] pub type RDATA = crate::Reg; #[doc = "Rx Data Register"] pub mod rdata { #[doc = "Register `RDATA` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `RDATA` reader - CEC Rx Data Register"] pub struct RDATA_R(crate::FieldReader); impl RDATA_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RDATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RDATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:7 - CEC Rx Data Register"] #[inline(always)] pub fn rdata(&self) -> RDATA_R { RDATA_R::new((self.bits & 0xff) as u8) } } #[doc = "Rx Data Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdata](index.html) module"] pub struct RDATA_SPEC; impl crate::RegisterSpec for RDATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rdata::R](R) reader structure"] impl crate::Readable for RDATA_SPEC { type Reader = R; } #[doc = "`reset()` method sets RDATA to value 0"] impl crate::Resettable for RDATA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTF register accessor: an alias for `Reg`"] pub type INTF = crate::Reg; #[doc = "Interrupt Flag Register"] pub mod intf { #[doc = "Register `INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TAERR` reader - Tx-Missing acknowledge error"] pub struct TAERR_R(crate::FieldReader); impl TAERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TAERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TAERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TAERR` writer - Tx-Missing acknowledge error"] pub struct TAERR_W<'a> { w: &'a mut W, } impl<'a> TAERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TERR` reader - Tx-Error"] pub struct TERR_R(crate::FieldReader); impl TERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TERR` writer - Tx-Error"] pub struct TERR_W<'a> { w: &'a mut W, } impl<'a> TERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TU` reader - Tx-Buffer Underrun"] pub struct TU_R(crate::FieldReader); impl TU_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TU` writer - Tx-Buffer Underrun"] pub struct TU_W<'a> { w: &'a mut W, } impl<'a> TU_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `TEND` reader - End of Transmission"] pub struct TEND_R(crate::FieldReader); impl TEND_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TEND_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TEND_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TEND` writer - End of Transmission"] pub struct TEND_W<'a> { w: &'a mut W, } impl<'a> TEND_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `TBR` reader - Tx-Byte Request"] pub struct TBR_R(crate::FieldReader); impl TBR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TBR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TBR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TBR` writer - Tx-Byte Request"] pub struct TBR_W<'a> { w: &'a mut W, } impl<'a> TBR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `ARBF` reader - Arbitration fail"] pub struct ARBF_R(crate::FieldReader); impl ARBF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ARBF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ARBF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ARBF` writer - Arbitration fail"] pub struct ARBF_W<'a> { w: &'a mut W, } impl<'a> ARBF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `RAE` reader - Rx Acknowledge error"] pub struct RAE_R(crate::FieldReader); impl RAE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RAE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RAE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RAE` writer - Rx Acknowledge error"] pub struct RAE_W<'a> { w: &'a mut W, } impl<'a> RAE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `BPLE` reader - Bit Period Long Error"] pub struct BPLE_R(crate::FieldReader); impl BPLE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BPLE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BPLE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BPLE` writer - Bit Period Long Error"] pub struct BPLE_W<'a> { w: &'a mut W, } impl<'a> BPLE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `BPSE` reader - Bit period short error"] pub struct BPSE_R(crate::FieldReader); impl BPSE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BPSE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BPSE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BPSE` writer - Bit period short error"] pub struct BPSE_W<'a> { w: &'a mut W, } impl<'a> BPSE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `BRE` reader - Bit rising error"] pub struct BRE_R(crate::FieldReader); impl BRE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRE` writer - Bit rising error"] pub struct BRE_W<'a> { w: &'a mut W, } impl<'a> BRE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `RO` reader - Rx-Overrun"] pub struct RO_R(crate::FieldReader); impl RO_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RO` writer - Rx-Overrun"] pub struct RO_W<'a> { w: &'a mut W, } impl<'a> RO_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `REND` reader - End Of Reception"] pub struct REND_R(crate::FieldReader); impl REND_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REND_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REND_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REND` writer - End Of Reception"] pub struct REND_W<'a> { w: &'a mut W, } impl<'a> REND_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `BR` reader - Rx-Byte Received"] pub struct BR_R(crate::FieldReader); impl BR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BR` writer - Rx-Byte Received"] pub struct BR_W<'a> { w: &'a mut W, } impl<'a> BR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 12 - Tx-Missing acknowledge error"] #[inline(always)] pub fn taerr(&self) -> TAERR_R { TAERR_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Tx-Error"] #[inline(always)] pub fn terr(&self) -> TERR_R { TERR_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Tx-Buffer Underrun"] #[inline(always)] pub fn tu(&self) -> TU_R { TU_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - End of Transmission"] #[inline(always)] pub fn tend(&self) -> TEND_R { TEND_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Tx-Byte Request"] #[inline(always)] pub fn tbr(&self) -> TBR_R { TBR_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Arbitration fail"] #[inline(always)] pub fn arbf(&self) -> ARBF_R { ARBF_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Rx Acknowledge error"] #[inline(always)] pub fn rae(&self) -> RAE_R { RAE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Bit Period Long Error"] #[inline(always)] pub fn bple(&self) -> BPLE_R { BPLE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Bit period short error"] #[inline(always)] pub fn bpse(&self) -> BPSE_R { BPSE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Bit rising error"] #[inline(always)] pub fn bre(&self) -> BRE_R { BRE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Rx-Overrun"] #[inline(always)] pub fn ro(&self) -> RO_R { RO_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - End Of Reception"] #[inline(always)] pub fn rend(&self) -> REND_R { REND_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Rx-Byte Received"] #[inline(always)] pub fn br(&self) -> BR_R { BR_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 12 - Tx-Missing acknowledge error"] #[inline(always)] pub fn taerr(&mut self) -> TAERR_W { TAERR_W { w: self } } #[doc = "Bit 11 - Tx-Error"] #[inline(always)] pub fn terr(&mut self) -> TERR_W { TERR_W { w: self } } #[doc = "Bit 10 - Tx-Buffer Underrun"] #[inline(always)] pub fn tu(&mut self) -> TU_W { TU_W { w: self } } #[doc = "Bit 9 - End of Transmission"] #[inline(always)] pub fn tend(&mut self) -> TEND_W { TEND_W { w: self } } #[doc = "Bit 8 - Tx-Byte Request"] #[inline(always)] pub fn tbr(&mut self) -> TBR_W { TBR_W { w: self } } #[doc = "Bit 7 - Arbitration fail"] #[inline(always)] pub fn arbf(&mut self) -> ARBF_W { ARBF_W { w: self } } #[doc = "Bit 6 - Rx Acknowledge error"] #[inline(always)] pub fn rae(&mut self) -> RAE_W { RAE_W { w: self } } #[doc = "Bit 5 - Bit Period Long Error"] #[inline(always)] pub fn bple(&mut self) -> BPLE_W { BPLE_W { w: self } } #[doc = "Bit 4 - Bit period short error"] #[inline(always)] pub fn bpse(&mut self) -> BPSE_W { BPSE_W { w: self } } #[doc = "Bit 3 - Bit rising error"] #[inline(always)] pub fn bre(&mut self) -> BRE_W { BRE_W { w: self } } #[doc = "Bit 2 - Rx-Overrun"] #[inline(always)] pub fn ro(&mut self) -> RO_W { RO_W { w: self } } #[doc = "Bit 1 - End Of Reception"] #[inline(always)] pub fn rend(&mut self) -> REND_W { REND_W { w: self } } #[doc = "Bit 0 - Rx-Byte Received"] #[inline(always)] pub fn br(&mut self) -> BR_W { BR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Interrupt Flag Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intf](index.html) module"] pub struct INTF_SPEC; impl crate::RegisterSpec for INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [intf::R](R) reader structure"] impl crate::Readable for INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [intf::W](W) writer structure"] impl crate::Writable for INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTF to value 0"] impl crate::Resettable for INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTEN register accessor: an alias for `Reg`"] pub type INTEN = crate::Reg; #[doc = "interrupt enable register"] pub mod inten { #[doc = "Register `INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TAERRIE` reader - Tx-Missing Acknowledge Error Interrupt Enable"] pub struct TAERRIE_R(crate::FieldReader); impl TAERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TAERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TAERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TAERRIE` writer - Tx-Missing Acknowledge Error Interrupt Enable"] pub struct TAERRIE_W<'a> { w: &'a mut W, } impl<'a> TAERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TERRIE` reader - Tx-Error Interrupt Enable"] pub struct TERRIE_R(crate::FieldReader); impl TERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TERRIE` writer - Tx-Error Interrupt Enable"] pub struct TERRIE_W<'a> { w: &'a mut W, } impl<'a> TERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TUIE` reader - Tx-Underrun interrupt enable"] pub struct TUIE_R(crate::FieldReader); impl TUIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TUIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TUIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TUIE` writer - Tx-Underrun interrupt enable"] pub struct TUIE_W<'a> { w: &'a mut W, } impl<'a> TUIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `TXENDIE` reader - Tx-End of message interrupt enable"] pub struct TXENDIE_R(crate::FieldReader); impl TXENDIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TXENDIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXENDIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TXENDIE` writer - Tx-End of message interrupt enable"] pub struct TXENDIE_W<'a> { w: &'a mut W, } impl<'a> TXENDIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `TBRIE` reader - Tx-Byte Request Interrupt Enable"] pub struct TBRIE_R(crate::FieldReader); impl TBRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TBRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TBRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TBRIE` writer - Tx-Byte Request Interrupt Enable"] pub struct TBRIE_W<'a> { w: &'a mut W, } impl<'a> TBRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `ARBFIE` reader - ARBF Interrupt Enable"] pub struct ARBFIE_R(crate::FieldReader); impl ARBFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ARBFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ARBFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ARBFIE` writer - ARBF Interrupt Enable"] pub struct ARBFIE_W<'a> { w: &'a mut W, } impl<'a> ARBFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `RAEIE` reader - Rx-Missing Acknowledge Error Interrupt Enable"] pub struct RAEIE_R(crate::FieldReader); impl RAEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RAEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RAEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RAEIE` writer - Rx-Missing Acknowledge Error Interrupt Enable"] pub struct RAEIE_W<'a> { w: &'a mut W, } impl<'a> RAEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `BPLEIE` reader - Long Bit Period Error Interrupt Enable"] pub struct BPLEIE_R(crate::FieldReader); impl BPLEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BPLEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BPLEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BPLEIE` writer - Long Bit Period Error Interrupt Enable"] pub struct BPLEIE_W<'a> { w: &'a mut W, } impl<'a> BPLEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `BPSEIE` reader - Short Bit Period Error Interrupt Enable"] pub struct BPSEIE_R(crate::FieldReader); impl BPSEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BPSEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BPSEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BPSEIE` writer - Short Bit Period Error Interrupt Enable"] pub struct BPSEIE_W<'a> { w: &'a mut W, } impl<'a> BPSEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `BREIE` reader - Bit Rising Error Interrupt Enable"] pub struct BREIE_R(crate::FieldReader); impl BREIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BREIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BREIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BREIE` writer - Bit Rising Error Interrupt Enable"] pub struct BREIE_W<'a> { w: &'a mut W, } impl<'a> BREIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `ROIE` reader - Rx-Buffer Overrun Interrupt Enable"] pub struct ROIE_R(crate::FieldReader); impl ROIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ROIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ROIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ROIE` writer - Rx-Buffer Overrun Interrupt Enable"] pub struct ROIE_W<'a> { w: &'a mut W, } impl<'a> ROIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `RENDIE` reader - End Of Reception Interrupt Enable"] pub struct RENDIE_R(crate::FieldReader); impl RENDIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RENDIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RENDIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RENDIE` writer - End Of Reception Interrupt Enable"] pub struct RENDIE_W<'a> { w: &'a mut W, } impl<'a> RENDIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `BRIE` reader - Rx-Byte Received Interrupt Enable"] pub struct BRIE_R(crate::FieldReader); impl BRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRIE` writer - Rx-Byte Received Interrupt Enable"] pub struct BRIE_W<'a> { w: &'a mut W, } impl<'a> BRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 12 - Tx-Missing Acknowledge Error Interrupt Enable"] #[inline(always)] pub fn taerrie(&self) -> TAERRIE_R { TAERRIE_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Tx-Error Interrupt Enable"] #[inline(always)] pub fn terrie(&self) -> TERRIE_R { TERRIE_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Tx-Underrun interrupt enable"] #[inline(always)] pub fn tuie(&self) -> TUIE_R { TUIE_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Tx-End of message interrupt enable"] #[inline(always)] pub fn txendie(&self) -> TXENDIE_R { TXENDIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Tx-Byte Request Interrupt Enable"] #[inline(always)] pub fn tbrie(&self) -> TBRIE_R { TBRIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - ARBF Interrupt Enable"] #[inline(always)] pub fn arbfie(&self) -> ARBFIE_R { ARBFIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Rx-Missing Acknowledge Error Interrupt Enable"] #[inline(always)] pub fn raeie(&self) -> RAEIE_R { RAEIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Long Bit Period Error Interrupt Enable"] #[inline(always)] pub fn bpleie(&self) -> BPLEIE_R { BPLEIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Short Bit Period Error Interrupt Enable"] #[inline(always)] pub fn bpseie(&self) -> BPSEIE_R { BPSEIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Bit Rising Error Interrupt Enable"] #[inline(always)] pub fn breie(&self) -> BREIE_R { BREIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Rx-Buffer Overrun Interrupt Enable"] #[inline(always)] pub fn roie(&self) -> ROIE_R { ROIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - End Of Reception Interrupt Enable"] #[inline(always)] pub fn rendie(&self) -> RENDIE_R { RENDIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Rx-Byte Received Interrupt Enable"] #[inline(always)] pub fn brie(&self) -> BRIE_R { BRIE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 12 - Tx-Missing Acknowledge Error Interrupt Enable"] #[inline(always)] pub fn taerrie(&mut self) -> TAERRIE_W { TAERRIE_W { w: self } } #[doc = "Bit 11 - Tx-Error Interrupt Enable"] #[inline(always)] pub fn terrie(&mut self) -> TERRIE_W { TERRIE_W { w: self } } #[doc = "Bit 10 - Tx-Underrun interrupt enable"] #[inline(always)] pub fn tuie(&mut self) -> TUIE_W { TUIE_W { w: self } } #[doc = "Bit 9 - Tx-End of message interrupt enable"] #[inline(always)] pub fn txendie(&mut self) -> TXENDIE_W { TXENDIE_W { w: self } } #[doc = "Bit 8 - Tx-Byte Request Interrupt Enable"] #[inline(always)] pub fn tbrie(&mut self) -> TBRIE_W { TBRIE_W { w: self } } #[doc = "Bit 7 - ARBF Interrupt Enable"] #[inline(always)] pub fn arbfie(&mut self) -> ARBFIE_W { ARBFIE_W { w: self } } #[doc = "Bit 6 - Rx-Missing Acknowledge Error Interrupt Enable"] #[inline(always)] pub fn raeie(&mut self) -> RAEIE_W { RAEIE_W { w: self } } #[doc = "Bit 5 - Long Bit Period Error Interrupt Enable"] #[inline(always)] pub fn bpleie(&mut self) -> BPLEIE_W { BPLEIE_W { w: self } } #[doc = "Bit 4 - Short Bit Period Error Interrupt Enable"] #[inline(always)] pub fn bpseie(&mut self) -> BPSEIE_W { BPSEIE_W { w: self } } #[doc = "Bit 3 - Bit Rising Error Interrupt Enable"] #[inline(always)] pub fn breie(&mut self) -> BREIE_W { BREIE_W { w: self } } #[doc = "Bit 2 - Rx-Buffer Overrun Interrupt Enable"] #[inline(always)] pub fn roie(&mut self) -> ROIE_W { ROIE_W { w: self } } #[doc = "Bit 1 - End Of Reception Interrupt Enable"] #[inline(always)] pub fn rendie(&mut self) -> RENDIE_W { RENDIE_W { w: self } } #[doc = "Bit 0 - Rx-Byte Received Interrupt Enable"] #[inline(always)] pub fn brie(&mut self) -> BRIE_W { BRIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"] pub struct INTEN_SPEC; impl crate::RegisterSpec for INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [inten::R](R) reader structure"] impl crate::Readable for INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"] impl crate::Writable for INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTEN to value 0"] impl crate::Resettable for INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Comparator"] pub struct CMP { _marker: PhantomData<*const ()>, } unsafe impl Send for CMP {} impl CMP { #[doc = r"Pointer to the register block"] pub const PTR: *const cmp::RegisterBlock = 0x4001_001c as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const cmp::RegisterBlock { Self::PTR } } impl Deref for CMP { type Target = cmp::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for CMP { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("CMP").finish() } } #[doc = "Comparator"] pub mod cmp { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control and status register"] pub cs: crate::Reg, } #[doc = "CS register accessor: an alias for `Reg`"] pub type CS = crate::Reg; #[doc = "control and status register"] pub mod cs { #[doc = "Register `CS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CS` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CMP0EN` reader - Comparator 0 enable"] pub struct CMP0EN_R(crate::FieldReader); impl CMP0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMP0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP0EN` writer - Comparator 0 enable"] pub struct CMP0EN_W<'a> { w: &'a mut W, } impl<'a> CMP0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CMP0SW` reader - Comparator 0 switch"] pub struct CMP0SW_R(crate::FieldReader); impl CMP0SW_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMP0SW_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP0SW_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP0SW` writer - Comparator 0 switch"] pub struct CMP0SW_W<'a> { w: &'a mut W, } impl<'a> CMP0SW_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CMP0M` reader - Comparator 0 mode"] pub struct CMP0M_R(crate::FieldReader); impl CMP0M_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CMP0M_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP0M_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP0M` writer - Comparator 0 mode"] pub struct CMP0M_W<'a> { w: &'a mut W, } impl<'a> CMP0M_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CMP0MSEL` reader - Comparator 0 input selection"] pub struct CMP0MSEL_R(crate::FieldReader); impl CMP0MSEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CMP0MSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP0MSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP0MSEL` writer - Comparator 0 input selection"] pub struct CMP0MSEL_W<'a> { w: &'a mut W, } impl<'a> CMP0MSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `CMP0OSEL` reader - Comparator 0 output selection"] pub struct CMP0OSEL_R(crate::FieldReader); impl CMP0OSEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CMP0OSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP0OSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP0OSEL` writer - Comparator 0 output selection"] pub struct CMP0OSEL_W<'a> { w: &'a mut W, } impl<'a> CMP0OSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 8)) | ((value as u32 & 0x07) << 8); self.w } } #[doc = "Field `CMP0PL` reader - Polarity of comparator 0 output"] pub struct CMP0PL_R(crate::FieldReader); impl CMP0PL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMP0PL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP0PL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP0PL` writer - Polarity of comparator 0 output"] pub struct CMP0PL_W<'a> { w: &'a mut W, } impl<'a> CMP0PL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CMP0HST` reader - Comparator 0 hysteresis"] pub struct CMP0HST_R(crate::FieldReader); impl CMP0HST_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CMP0HST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP0HST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP0HST` writer - Comparator 0 hysteresis"] pub struct CMP0HST_W<'a> { w: &'a mut W, } impl<'a> CMP0HST_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `CMP0O` reader - Comparator 0 output"] pub struct CMP0O_R(crate::FieldReader); impl CMP0O_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMP0O_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP0O_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP0LK` reader - Comparator 0 lock"] pub struct CMP0LK_R(crate::FieldReader); impl CMP0LK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMP0LK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP0LK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP0LK` writer - Comparator 0 lock"] pub struct CMP0LK_W<'a> { w: &'a mut W, } impl<'a> CMP0LK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `CMP1EN` reader - Comparator 1 enable"] pub struct CMP1EN_R(crate::FieldReader); impl CMP1EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMP1EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP1EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP1EN` writer - Comparator 1 enable"] pub struct CMP1EN_W<'a> { w: &'a mut W, } impl<'a> CMP1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `CMP1M` reader - Comparator 1 mode"] pub struct CMP1M_R(crate::FieldReader); impl CMP1M_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CMP1M_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP1M_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP1M` writer - Comparator 1 mode"] pub struct CMP1M_W<'a> { w: &'a mut W, } impl<'a> CMP1M_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `CMP1MSEL` reader - Comparator 1 inverting input selection"] pub struct CMP1MSEL_R(crate::FieldReader); impl CMP1MSEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CMP1MSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP1MSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP1MSEL` writer - Comparator 1 inverting input selection"] pub struct CMP1MSEL_W<'a> { w: &'a mut W, } impl<'a> CMP1MSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 20)) | ((value as u32 & 0x07) << 20); self.w } } #[doc = "Field `WNDEN` reader - Window mode enable"] pub struct WNDEN_R(crate::FieldReader); impl WNDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WNDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WNDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WNDEN` writer - Window mode enable"] pub struct WNDEN_W<'a> { w: &'a mut W, } impl<'a> WNDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `CMP1OSEL` reader - Comparator 1 output selection"] pub struct CMP1OSEL_R(crate::FieldReader); impl CMP1OSEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CMP1OSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP1OSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP1OSEL` writer - Comparator 1 output selection"] pub struct CMP1OSEL_W<'a> { w: &'a mut W, } impl<'a> CMP1OSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 24)) | ((value as u32 & 0x07) << 24); self.w } } #[doc = "Field `CMP1PL` reader - Comparator 1 output polarity"] pub struct CMP1PL_R(crate::FieldReader); impl CMP1PL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMP1PL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP1PL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP1PL` writer - Comparator 1 output polarity"] pub struct CMP1PL_W<'a> { w: &'a mut W, } impl<'a> CMP1PL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CMP1HST` reader - Comparator 1 hysteresis"] pub struct CMP1HST_R(crate::FieldReader); impl CMP1HST_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CMP1HST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP1HST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP1HST` writer - Comparator 1 hysteresis"] pub struct CMP1HST_W<'a> { w: &'a mut W, } impl<'a> CMP1HST_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `CMP1O` reader - Comparator 1 output"] pub struct CMP1O_R(crate::FieldReader); impl CMP1O_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMP1O_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP1O_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP1LK` reader - Comparator 1 lock"] pub struct CMP1LK_R(crate::FieldReader); impl CMP1LK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMP1LK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMP1LK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMP1LK` writer - Comparator 1 lock"] pub struct CMP1LK_W<'a> { w: &'a mut W, } impl<'a> CMP1LK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bit 0 - Comparator 0 enable"] #[inline(always)] pub fn cmp0en(&self) -> CMP0EN_R { CMP0EN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Comparator 0 switch"] #[inline(always)] pub fn cmp0sw(&self) -> CMP0SW_R { CMP0SW_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bits 2:3 - Comparator 0 mode"] #[inline(always)] pub fn cmp0m(&self) -> CMP0M_R { CMP0M_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 4:6 - Comparator 0 input selection"] #[inline(always)] pub fn cmp0msel(&self) -> CMP0MSEL_R { CMP0MSEL_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bits 8:10 - Comparator 0 output selection"] #[inline(always)] pub fn cmp0osel(&self) -> CMP0OSEL_R { CMP0OSEL_R::new(((self.bits >> 8) & 0x07) as u8) } #[doc = "Bit 11 - Polarity of comparator 0 output"] #[inline(always)] pub fn cmp0pl(&self) -> CMP0PL_R { CMP0PL_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bits 12:13 - Comparator 0 hysteresis"] #[inline(always)] pub fn cmp0hst(&self) -> CMP0HST_R { CMP0HST_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bit 14 - Comparator 0 output"] #[inline(always)] pub fn cmp0o(&self) -> CMP0O_R { CMP0O_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Comparator 0 lock"] #[inline(always)] pub fn cmp0lk(&self) -> CMP0LK_R { CMP0LK_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - Comparator 1 enable"] #[inline(always)] pub fn cmp1en(&self) -> CMP1EN_R { CMP1EN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bits 18:19 - Comparator 1 mode"] #[inline(always)] pub fn cmp1m(&self) -> CMP1M_R { CMP1M_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 20:22 - Comparator 1 inverting input selection"] #[inline(always)] pub fn cmp1msel(&self) -> CMP1MSEL_R { CMP1MSEL_R::new(((self.bits >> 20) & 0x07) as u8) } #[doc = "Bit 23 - Window mode enable"] #[inline(always)] pub fn wnden(&self) -> WNDEN_R { WNDEN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bits 24:26 - Comparator 1 output selection"] #[inline(always)] pub fn cmp1osel(&self) -> CMP1OSEL_R { CMP1OSEL_R::new(((self.bits >> 24) & 0x07) as u8) } #[doc = "Bit 27 - Comparator 1 output polarity"] #[inline(always)] pub fn cmp1pl(&self) -> CMP1PL_R { CMP1PL_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bits 28:29 - Comparator 1 hysteresis"] #[inline(always)] pub fn cmp1hst(&self) -> CMP1HST_R { CMP1HST_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bit 30 - Comparator 1 output"] #[inline(always)] pub fn cmp1o(&self) -> CMP1O_R { CMP1O_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Comparator 1 lock"] #[inline(always)] pub fn cmp1lk(&self) -> CMP1LK_R { CMP1LK_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Comparator 0 enable"] #[inline(always)] pub fn cmp0en(&mut self) -> CMP0EN_W { CMP0EN_W { w: self } } #[doc = "Bit 1 - Comparator 0 switch"] #[inline(always)] pub fn cmp0sw(&mut self) -> CMP0SW_W { CMP0SW_W { w: self } } #[doc = "Bits 2:3 - Comparator 0 mode"] #[inline(always)] pub fn cmp0m(&mut self) -> CMP0M_W { CMP0M_W { w: self } } #[doc = "Bits 4:6 - Comparator 0 input selection"] #[inline(always)] pub fn cmp0msel(&mut self) -> CMP0MSEL_W { CMP0MSEL_W { w: self } } #[doc = "Bits 8:10 - Comparator 0 output selection"] #[inline(always)] pub fn cmp0osel(&mut self) -> CMP0OSEL_W { CMP0OSEL_W { w: self } } #[doc = "Bit 11 - Polarity of comparator 0 output"] #[inline(always)] pub fn cmp0pl(&mut self) -> CMP0PL_W { CMP0PL_W { w: self } } #[doc = "Bits 12:13 - Comparator 0 hysteresis"] #[inline(always)] pub fn cmp0hst(&mut self) -> CMP0HST_W { CMP0HST_W { w: self } } #[doc = "Bit 15 - Comparator 0 lock"] #[inline(always)] pub fn cmp0lk(&mut self) -> CMP0LK_W { CMP0LK_W { w: self } } #[doc = "Bit 16 - Comparator 1 enable"] #[inline(always)] pub fn cmp1en(&mut self) -> CMP1EN_W { CMP1EN_W { w: self } } #[doc = "Bits 18:19 - Comparator 1 mode"] #[inline(always)] pub fn cmp1m(&mut self) -> CMP1M_W { CMP1M_W { w: self } } #[doc = "Bits 20:22 - Comparator 1 inverting input selection"] #[inline(always)] pub fn cmp1msel(&mut self) -> CMP1MSEL_W { CMP1MSEL_W { w: self } } #[doc = "Bit 23 - Window mode enable"] #[inline(always)] pub fn wnden(&mut self) -> WNDEN_W { WNDEN_W { w: self } } #[doc = "Bits 24:26 - Comparator 1 output selection"] #[inline(always)] pub fn cmp1osel(&mut self) -> CMP1OSEL_W { CMP1OSEL_W { w: self } } #[doc = "Bit 27 - Comparator 1 output polarity"] #[inline(always)] pub fn cmp1pl(&mut self) -> CMP1PL_W { CMP1PL_W { w: self } } #[doc = "Bits 28:29 - Comparator 1 hysteresis"] #[inline(always)] pub fn cmp1hst(&mut self) -> CMP1HST_W { CMP1HST_W { w: self } } #[doc = "Bit 31 - Comparator 1 lock"] #[inline(always)] pub fn cmp1lk(&mut self) -> CMP1LK_W { CMP1LK_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cs](index.html) module"] pub struct CS_SPEC; impl crate::RegisterSpec for CS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cs::R](R) reader structure"] impl crate::Readable for CS_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cs::W](W) writer structure"] impl crate::Writable for CS_SPEC { type Writer = W; } #[doc = "`reset()` method sets CS to value 0"] impl crate::Resettable for CS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "cyclic redundancy check calculation unit"] pub struct CRC { _marker: PhantomData<*const ()>, } unsafe impl Send for CRC {} impl CRC { #[doc = r"Pointer to the register block"] pub const PTR: *const crc::RegisterBlock = 0x4002_3000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const crc::RegisterBlock { Self::PTR } } impl Deref for CRC { type Target = crc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for CRC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("CRC").finish() } } #[doc = "cyclic redundancy check calculation unit"] pub mod crc { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Data register"] pub data: crate::Reg, #[doc = "0x04 - Free data register"] pub fdata: crate::Reg, #[doc = "0x08 - Control register"] pub ctl: crate::Reg, _reserved3: [u8; 0x04], #[doc = "0x10 - Initialization Data Register"] pub idata: crate::Reg, #[doc = "0x14 - Polynomial register"] pub poly: crate::Reg, } #[doc = "DATA register accessor: an alias for `Reg`"] pub type DATA = crate::Reg; #[doc = "Data register"] pub mod data { #[doc = "Register `DATA` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DATA` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DATA` reader - CRC calculation result bits"] pub struct DATA_R(crate::FieldReader); impl DATA_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { DATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DATA` writer - CRC calculation result bits"] pub struct DATA_W<'a> { w: &'a mut W, } impl<'a> DATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - CRC calculation result bits"] #[inline(always)] pub fn data(&self) -> DATA_R { DATA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - CRC calculation result bits"] #[inline(always)] pub fn data(&mut self) -> DATA_W { DATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"] pub struct DATA_SPEC; impl crate::RegisterSpec for DATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [data::R](R) reader structure"] impl crate::Readable for DATA_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"] impl crate::Writable for DATA_SPEC { type Writer = W; } #[doc = "`reset()` method sets DATA to value 0xffff_ffff"] impl crate::Resettable for DATA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0xffff_ffff } } } #[doc = "FDATA register accessor: an alias for `Reg`"] pub type FDATA = crate::Reg; #[doc = "Free data register"] pub mod fdata { #[doc = "Register `FDATA` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `FDATA` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `FDATA` reader - General-purpose 8-bit data register bits"] pub struct FDATA_R(crate::FieldReader); impl FDATA_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { FDATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FDATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FDATA` writer - General-purpose 8-bit data register bits"] pub struct FDATA_W<'a> { w: &'a mut W, } impl<'a> FDATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bits 0:7 - General-purpose 8-bit data register bits"] #[inline(always)] pub fn fdata(&self) -> FDATA_R { FDATA_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - General-purpose 8-bit data register bits"] #[inline(always)] pub fn fdata(&mut self) -> FDATA_W { FDATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Free data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fdata](index.html) module"] pub struct FDATA_SPEC; impl crate::RegisterSpec for FDATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [fdata::R](R) reader structure"] impl crate::Readable for FDATA_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [fdata::W](W) writer structure"] impl crate::Writable for FDATA_SPEC { type Writer = W; } #[doc = "`reset()` method sets FDATA to value 0"] impl crate::Resettable for FDATA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "Control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RST` reader - reset bit"] pub struct RST_R(crate::FieldReader); impl RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RST` writer - reset bit"] pub struct RST_W<'a> { w: &'a mut W, } impl<'a> RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `PS` reader - Size of polynomial"] pub struct PS_R(crate::FieldReader); impl PS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PS` writer - Size of polynomial"] pub struct PS_W<'a> { w: &'a mut W, } impl<'a> PS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 3)) | ((value as u32 & 0x03) << 3); self.w } } #[doc = "Field `REV_I` reader - Reverse input data"] pub struct REV_I_R(crate::FieldReader); impl REV_I_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { REV_I_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REV_I_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REV_I` writer - Reverse input data"] pub struct REV_I_W<'a> { w: &'a mut W, } impl<'a> REV_I_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 5)) | ((value as u32 & 0x03) << 5); self.w } } #[doc = "Field `REV_O` reader - Reverse output data"] pub struct REV_O_R(crate::FieldReader); impl REV_O_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REV_O_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REV_O_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REV_O` writer - Reverse output data"] pub struct REV_O_W<'a> { w: &'a mut W, } impl<'a> REV_O_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } impl R { #[doc = "Bit 0 - reset bit"] #[inline(always)] pub fn rst(&self) -> RST_R { RST_R::new((self.bits & 0x01) != 0) } #[doc = "Bits 3:4 - Size of polynomial"] #[inline(always)] pub fn ps(&self) -> PS_R { PS_R::new(((self.bits >> 3) & 0x03) as u8) } #[doc = "Bits 5:6 - Reverse input data"] #[inline(always)] pub fn rev_i(&self) -> REV_I_R { REV_I_R::new(((self.bits >> 5) & 0x03) as u8) } #[doc = "Bit 7 - Reverse output data"] #[inline(always)] pub fn rev_o(&self) -> REV_O_R { REV_O_R::new(((self.bits >> 7) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - reset bit"] #[inline(always)] pub fn rst(&mut self) -> RST_W { RST_W { w: self } } #[doc = "Bits 3:4 - Size of polynomial"] #[inline(always)] pub fn ps(&mut self) -> PS_W { PS_W { w: self } } #[doc = "Bits 5:6 - Reverse input data"] #[inline(always)] pub fn rev_i(&mut self) -> REV_I_W { REV_I_W { w: self } } #[doc = "Bit 7 - Reverse output data"] #[inline(always)] pub fn rev_o(&mut self) -> REV_O_W { REV_O_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "IDATA register accessor: an alias for `Reg`"] pub type IDATA = crate::Reg; #[doc = "Initialization Data Register"] pub mod idata { #[doc = "Register `IDATA` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `IDATA` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IDATA` reader - CRC calculation initial value"] pub struct IDATA_R(crate::FieldReader); impl IDATA_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { IDATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IDATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IDATA` writer - CRC calculation initial value"] pub struct IDATA_W<'a> { w: &'a mut W, } impl<'a> IDATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - CRC calculation initial value"] #[inline(always)] pub fn idata(&self) -> IDATA_R { IDATA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - CRC calculation initial value"] #[inline(always)] pub fn idata(&mut self) -> IDATA_W { IDATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Initialization Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idata](index.html) module"] pub struct IDATA_SPEC; impl crate::RegisterSpec for IDATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [idata::R](R) reader structure"] impl crate::Readable for IDATA_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [idata::W](W) writer structure"] impl crate::Writable for IDATA_SPEC { type Writer = W; } #[doc = "`reset()` method sets IDATA to value 0xffff_ffff"] impl crate::Resettable for IDATA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0xffff_ffff } } } #[doc = "POLY register accessor: an alias for `Reg`"] pub type POLY = crate::Reg; #[doc = "Polynomial register"] pub mod poly { #[doc = "Register `POLY` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `POLY` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `POLY` reader - User configurable polynomial value"] pub struct POLY_R(crate::FieldReader); impl POLY_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { POLY_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for POLY_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `POLY` writer - User configurable polynomial value"] pub struct POLY_W<'a> { w: &'a mut W, } impl<'a> POLY_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - User configurable polynomial value"] #[inline(always)] pub fn poly(&self) -> POLY_R { POLY_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - User configurable polynomial value"] #[inline(always)] pub fn poly(&mut self) -> POLY_W { POLY_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Polynomial register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [poly](index.html) module"] pub struct POLY_SPEC; impl crate::RegisterSpec for POLY_SPEC { type Ux = u32; } #[doc = "`read()` method returns [poly::R](R) reader structure"] impl crate::Readable for POLY_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [poly::W](W) writer structure"] impl crate::Writable for POLY_SPEC { type Writer = W; } #[doc = "`reset()` method sets POLY to value 0x04c1_1db7"] impl crate::Resettable for POLY_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x04c1_1db7 } } } } #[doc = "Clock trim controller"] pub struct CTC { _marker: PhantomData<*const ()>, } unsafe impl Send for CTC {} impl CTC { #[doc = r"Pointer to the register block"] pub const PTR: *const ctc::RegisterBlock = 0x4000_c800 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const ctc::RegisterBlock { Self::PTR } } impl Deref for CTC { type Target = ctc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for CTC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("CTC").finish() } } #[doc = "Clock trim controller"] pub mod ctc { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Control Register 0"] pub ctl0: crate::Reg, #[doc = "0x04 - Control Register 1"] pub ctl1: crate::Reg, #[doc = "0x08 - Status Register"] pub stat: crate::Reg, #[doc = "0x0c - Interrupt clear Register"] pub intc: crate::Reg, } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "Control Register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TRIMVALUE` reader - IRC48M trim value"] pub struct TRIMVALUE_R(crate::FieldReader); impl TRIMVALUE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TRIMVALUE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRIMVALUE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRIMVALUE` writer - IRC48M trim value"] pub struct TRIMVALUE_W<'a> { w: &'a mut W, } impl<'a> TRIMVALUE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x3f << 8)) | ((value as u32 & 0x3f) << 8); self.w } } #[doc = "Field `SWREFPUL` reader - Software reference source sync pulse"] pub struct SWREFPUL_R(crate::FieldReader); impl SWREFPUL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWREFPUL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWREFPUL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWREFPUL` writer - Software reference source sync pulse"] pub struct SWREFPUL_W<'a> { w: &'a mut W, } impl<'a> SWREFPUL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `AUTOTRIM` reader - Hardware automatically trim mode"] pub struct AUTOTRIM_R(crate::FieldReader); impl AUTOTRIM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { AUTOTRIM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for AUTOTRIM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `AUTOTRIM` writer - Hardware automatically trim mode"] pub struct AUTOTRIM_W<'a> { w: &'a mut W, } impl<'a> AUTOTRIM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CNTEN` reader - CTC counter enable"] pub struct CNTEN_R(crate::FieldReader); impl CNTEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CNTEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNTEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNTEN` writer - CTC counter enable"] pub struct CNTEN_W<'a> { w: &'a mut W, } impl<'a> CNTEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `EREFIE` reader - EREFIF interrupt enable"] pub struct EREFIE_R(crate::FieldReader); impl EREFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EREFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EREFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EREFIE` writer - EREFIF interrupt enable"] pub struct EREFIE_W<'a> { w: &'a mut W, } impl<'a> EREFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `ERRIE` reader - Error (ERRIF) interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error (ERRIF) interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CKWARNIE` reader - Clock trim warning (CKWARNIF) interrupt enable"] pub struct CKWARNIE_R(crate::FieldReader); impl CKWARNIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKWARNIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKWARNIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKWARNIE` writer - Clock trim warning (CKWARNIF) interrupt enable"] pub struct CKWARNIE_W<'a> { w: &'a mut W, } impl<'a> CKWARNIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CKOKIE` reader - Clock trim OK (CKOKIF) interrupt enable"] pub struct CKOKIE_R(crate::FieldReader); impl CKOKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKOKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKOKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKOKIE` writer - Clock trim OK (CKOKIF) interrupt enable"] pub struct CKOKIE_W<'a> { w: &'a mut W, } impl<'a> CKOKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 8:13 - IRC48M trim value"] #[inline(always)] pub fn trimvalue(&self) -> TRIMVALUE_R { TRIMVALUE_R::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bit 7 - Software reference source sync pulse"] #[inline(always)] pub fn swrefpul(&self) -> SWREFPUL_R { SWREFPUL_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Hardware automatically trim mode"] #[inline(always)] pub fn autotrim(&self) -> AUTOTRIM_R { AUTOTRIM_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - CTC counter enable"] #[inline(always)] pub fn cnten(&self) -> CNTEN_R { CNTEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 3 - EREFIF interrupt enable"] #[inline(always)] pub fn erefie(&self) -> EREFIE_R { EREFIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Error (ERRIF) interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Clock trim warning (CKWARNIF) interrupt enable"] #[inline(always)] pub fn ckwarnie(&self) -> CKWARNIE_R { CKWARNIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Clock trim OK (CKOKIF) interrupt enable"] #[inline(always)] pub fn ckokie(&self) -> CKOKIE_R { CKOKIE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 8:13 - IRC48M trim value"] #[inline(always)] pub fn trimvalue(&mut self) -> TRIMVALUE_W { TRIMVALUE_W { w: self } } #[doc = "Bit 7 - Software reference source sync pulse"] #[inline(always)] pub fn swrefpul(&mut self) -> SWREFPUL_W { SWREFPUL_W { w: self } } #[doc = "Bit 6 - Hardware automatically trim mode"] #[inline(always)] pub fn autotrim(&mut self) -> AUTOTRIM_W { AUTOTRIM_W { w: self } } #[doc = "Bit 5 - CTC counter enable"] #[inline(always)] pub fn cnten(&mut self) -> CNTEN_W { CNTEN_W { w: self } } #[doc = "Bit 3 - EREFIF interrupt enable"] #[inline(always)] pub fn erefie(&mut self) -> EREFIE_W { EREFIE_W { w: self } } #[doc = "Bit 2 - Error (ERRIF) interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 1 - Clock trim warning (CKWARNIF) interrupt enable"] #[inline(always)] pub fn ckwarnie(&mut self) -> CKWARNIE_W { CKWARNIE_W { w: self } } #[doc = "Bit 0 - Clock trim OK (CKOKIF) interrupt enable"] #[inline(always)] pub fn ckokie(&mut self) -> CKOKIE_W { CKOKIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0x2000"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x2000 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "Control Register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RLVALUE` reader - CTC counter reload value"] pub struct RLVALUE_R(crate::FieldReader); impl RLVALUE_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { RLVALUE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RLVALUE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RLVALUE` writer - CTC counter reload value"] pub struct RLVALUE_W<'a> { w: &'a mut W, } impl<'a> RLVALUE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } #[doc = "Field `CKLIM` reader - Clock trim base limit value"] pub struct CKLIM_R(crate::FieldReader); impl CKLIM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CKLIM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKLIM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKLIM` writer - Clock trim base limit value"] pub struct CKLIM_W<'a> { w: &'a mut W, } impl<'a> CKLIM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0xff << 16)) | ((value as u32 & 0xff) << 16); self.w } } #[doc = "Field `REFPSC` reader - Reference signal source prescaler"] pub struct REFPSC_R(crate::FieldReader); impl REFPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { REFPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REFPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REFPSC` writer - Reference signal source prescaler"] pub struct REFPSC_W<'a> { w: &'a mut W, } impl<'a> REFPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 24)) | ((value as u32 & 0x07) << 24); self.w } } #[doc = "Field `REFSEL` reader - Reference signal source selection"] pub struct REFSEL_R(crate::FieldReader); impl REFSEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { REFSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REFSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REFSEL` writer - Reference signal source selection"] pub struct REFSEL_W<'a> { w: &'a mut W, } impl<'a> REFSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `REFPOL` reader - Reference signal source polarity"] pub struct REFPOL_R(crate::FieldReader); impl REFPOL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REFPOL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REFPOL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REFPOL` writer - Reference signal source polarity"] pub struct REFPOL_W<'a> { w: &'a mut W, } impl<'a> REFPOL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:15 - CTC counter reload value"] #[inline(always)] pub fn rlvalue(&self) -> RLVALUE_R { RLVALUE_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:23 - Clock trim base limit value"] #[inline(always)] pub fn cklim(&self) -> CKLIM_R { CKLIM_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:26 - Reference signal source prescaler"] #[inline(always)] pub fn refpsc(&self) -> REFPSC_R { REFPSC_R::new(((self.bits >> 24) & 0x07) as u8) } #[doc = "Bits 28:29 - Reference signal source selection"] #[inline(always)] pub fn refsel(&self) -> REFSEL_R { REFSEL_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bit 31 - Reference signal source polarity"] #[inline(always)] pub fn refpol(&self) -> REFPOL_R { REFPOL_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:15 - CTC counter reload value"] #[inline(always)] pub fn rlvalue(&mut self) -> RLVALUE_W { RLVALUE_W { w: self } } #[doc = "Bits 16:23 - Clock trim base limit value"] #[inline(always)] pub fn cklim(&mut self) -> CKLIM_W { CKLIM_W { w: self } } #[doc = "Bits 24:26 - Reference signal source prescaler"] #[inline(always)] pub fn refpsc(&mut self) -> REFPSC_W { REFPSC_W { w: self } } #[doc = "Bits 28:29 - Reference signal source selection"] #[inline(always)] pub fn refsel(&mut self) -> REFSEL_W { REFSEL_W { w: self } } #[doc = "Bit 31 - Reference signal source polarity"] #[inline(always)] pub fn refpol(&mut self) -> REFPOL_W { REFPOL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0x2022_bb7f"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x2022_bb7f } } } #[doc = "STAT register accessor: an alias for `Reg`"] pub type STAT = crate::Reg; #[doc = "Status Register"] pub mod stat { #[doc = "Register `STAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `CKOKIF` reader - Clock trim OK interrupt flag"] pub struct CKOKIF_R(crate::FieldReader); impl CKOKIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKOKIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKOKIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKWARNIF` reader - Clock trim warning interrupt flag"] pub struct CKWARNIF_R(crate::FieldReader); impl CKWARNIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKWARNIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKWARNIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIF` reader - Error interrupt flag"] pub struct ERRIF_R(crate::FieldReader); impl ERRIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EREFIF` reader - Expect reference interrupt flag"] pub struct EREFIF_R(crate::FieldReader); impl EREFIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EREFIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EREFIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKERR` reader - Clock trim error bit"] pub struct CKERR_R(crate::FieldReader); impl CKERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REFMISS` reader - Reference sync pulse miss"] pub struct REFMISS_R(crate::FieldReader); impl REFMISS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REFMISS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REFMISS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRIMERR` reader - Trim value error bit"] pub struct TRIMERR_R(crate::FieldReader); impl TRIMERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRIMERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRIMERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REFDIR` reader - CTC trim counter direction when reference sync pulse"] pub struct REFDIR_R(crate::FieldReader); impl REFDIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REFDIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REFDIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REFCAP` reader - CTC counter capture when reference sync pulse"] pub struct REFCAP_R(crate::FieldReader); impl REFCAP_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { REFCAP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REFCAP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 0 - Clock trim OK interrupt flag"] #[inline(always)] pub fn ckokif(&self) -> CKOKIF_R { CKOKIF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Clock trim warning interrupt flag"] #[inline(always)] pub fn ckwarnif(&self) -> CKWARNIF_R { CKWARNIF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Error interrupt flag"] #[inline(always)] pub fn errif(&self) -> ERRIF_R { ERRIF_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Expect reference interrupt flag"] #[inline(always)] pub fn erefif(&self) -> EREFIF_R { EREFIF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 8 - Clock trim error bit"] #[inline(always)] pub fn ckerr(&self) -> CKERR_R { CKERR_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Reference sync pulse miss"] #[inline(always)] pub fn refmiss(&self) -> REFMISS_R { REFMISS_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Trim value error bit"] #[inline(always)] pub fn trimerr(&self) -> TRIMERR_R { TRIMERR_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 15 - CTC trim counter direction when reference sync pulse"] #[inline(always)] pub fn refdir(&self) -> REFDIR_R { REFDIR_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 16:31 - CTC counter capture when reference sync pulse"] #[inline(always)] pub fn refcap(&self) -> REFCAP_R { REFCAP_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"] pub struct STAT_SPEC; impl crate::RegisterSpec for STAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat::R](R) reader structure"] impl crate::Readable for STAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets STAT to value 0"] impl crate::Resettable for STAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTC register accessor: an alias for `Reg`"] pub type INTC = crate::Reg; #[doc = "Interrupt clear Register"] pub mod intc { #[doc = "Register `INTC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CKOKIC` writer - CKOKIF interrupt clear bit"] pub struct CKOKIC_W<'a> { w: &'a mut W, } impl<'a> CKOKIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CKWARNIC` writer - CKWARNIF interrupt clear bit"] pub struct CKWARNIC_W<'a> { w: &'a mut W, } impl<'a> CKWARNIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `ERRIC` writer - ERRIF interrupt clear bit"] pub struct ERRIC_W<'a> { w: &'a mut W, } impl<'a> ERRIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `EREFIC` writer - EREFIF interrupt clear bit"] pub struct EREFIC_W<'a> { w: &'a mut W, } impl<'a> EREFIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } impl W { #[doc = "Bit 0 - CKOKIF interrupt clear bit"] #[inline(always)] pub fn ckokic(&mut self) -> CKOKIC_W { CKOKIC_W { w: self } } #[doc = "Bit 1 - CKWARNIF interrupt clear bit"] #[inline(always)] pub fn ckwarnic(&mut self) -> CKWARNIC_W { CKWARNIC_W { w: self } } #[doc = "Bit 2 - ERRIF interrupt clear bit"] #[inline(always)] pub fn erric(&mut self) -> ERRIC_W { ERRIC_W { w: self } } #[doc = "Bit 3 - EREFIF interrupt clear bit"] #[inline(always)] pub fn erefic(&mut self) -> EREFIC_W { EREFIC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Interrupt clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intc](index.html) module"] pub struct INTC_SPEC; impl crate::RegisterSpec for INTC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [intc::W](W) writer structure"] impl crate::Writable for INTC_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTC to value 0"] impl crate::Resettable for INTC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Digital-to-analog converter"] pub struct DAC { _marker: PhantomData<*const ()>, } unsafe impl Send for DAC {} impl DAC { #[doc = r"Pointer to the register block"] pub const PTR: *const dac::RegisterBlock = 0x4000_7400 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const dac::RegisterBlock { Self::PTR } } impl Deref for DAC { type Target = dac::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for DAC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("DAC").finish() } } #[doc = "Digital-to-analog converter"] pub mod dac { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register"] pub ctl: crate::Reg, #[doc = "0x04 - software trigger register"] pub swt: crate::Reg, #[doc = "0x08 - DAC 12-bit right-aligned data holding register"] pub dac_r12dh: crate::Reg, #[doc = "0x0c - DAC 12-bit left aligned data holding register"] pub dac_l12dh: crate::Reg, #[doc = "0x10 - DAC 8-bit right aligned data holding register"] pub dac_r8dh: crate::Reg, _reserved5: [u8; 0x18], #[doc = "0x2c - DAC data output register"] pub dac_do: crate::Reg, _reserved6: [u8; 0x04], #[doc = "0x34 - status register"] pub stat: crate::Reg, } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DEN` reader - DAC enable"] pub struct DEN_R(crate::FieldReader); impl DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DEN` writer - DAC enable"] pub struct DEN_W<'a> { w: &'a mut W, } impl<'a> DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `DBOFF` reader - DAC output buffer disable"] pub struct DBOFF_R(crate::FieldReader); impl DBOFF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DBOFF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DBOFF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DBOFF` writer - DAC output buffer disable"] pub struct DBOFF_W<'a> { w: &'a mut W, } impl<'a> DBOFF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `DTEN` reader - DAC trigger enable"] pub struct DTEN_R(crate::FieldReader); impl DTEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTEN` writer - DAC trigger enable"] pub struct DTEN_W<'a> { w: &'a mut W, } impl<'a> DTEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `DTSEL` reader - DAC trigger selection"] pub struct DTSEL_R(crate::FieldReader); impl DTSEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DTSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTSEL` writer - DAC trigger selection"] pub struct DTSEL_W<'a> { w: &'a mut W, } impl<'a> DTSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); self.w } } #[doc = "Field `DWM` reader - DAC noise wave mode"] pub struct DWM_R(crate::FieldReader); impl DWM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DWM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DWM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DWM` writer - DAC noise wave mode"] pub struct DWM_W<'a> { w: &'a mut W, } impl<'a> DWM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `DWBW` reader - DAC noise wave bit width"] pub struct DWBW_R(crate::FieldReader); impl DWBW_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DWBW_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DWBW_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DWBW` writer - DAC noise wave bit width"] pub struct DWBW_W<'a> { w: &'a mut W, } impl<'a> DWBW_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `DDMAEN` reader - DAC DMA enable"] pub struct DDMAEN_R(crate::FieldReader); impl DDMAEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DDMAEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DDMAEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DDMAEN` writer - DAC DMA enable"] pub struct DDMAEN_W<'a> { w: &'a mut W, } impl<'a> DDMAEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `DDUDRIE` reader - DAC DMA underrun interrupt enable"] pub struct DDUDRIE_R(crate::FieldReader); impl DDUDRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DDUDRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DDUDRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DDUDRIE` writer - DAC DMA underrun interrupt enable"] pub struct DDUDRIE_W<'a> { w: &'a mut W, } impl<'a> DDUDRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } impl R { #[doc = "Bit 0 - DAC enable"] #[inline(always)] pub fn den(&self) -> DEN_R { DEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - DAC output buffer disable"] #[inline(always)] pub fn dboff(&self) -> DBOFF_R { DBOFF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - DAC trigger enable"] #[inline(always)] pub fn dten(&self) -> DTEN_R { DTEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bits 3:5 - DAC trigger selection"] #[inline(always)] pub fn dtsel(&self) -> DTSEL_R { DTSEL_R::new(((self.bits >> 3) & 0x07) as u8) } #[doc = "Bits 6:7 - DAC noise wave mode"] #[inline(always)] pub fn dwm(&self) -> DWM_R { DWM_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 8:11 - DAC noise wave bit width"] #[inline(always)] pub fn dwbw(&self) -> DWBW_R { DWBW_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 12 - DAC DMA enable"] #[inline(always)] pub fn ddmaen(&self) -> DDMAEN_R { DDMAEN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - DAC DMA underrun interrupt enable"] #[inline(always)] pub fn ddudrie(&self) -> DDUDRIE_R { DDUDRIE_R::new(((self.bits >> 13) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - DAC enable"] #[inline(always)] pub fn den(&mut self) -> DEN_W { DEN_W { w: self } } #[doc = "Bit 1 - DAC output buffer disable"] #[inline(always)] pub fn dboff(&mut self) -> DBOFF_W { DBOFF_W { w: self } } #[doc = "Bit 2 - DAC trigger enable"] #[inline(always)] pub fn dten(&mut self) -> DTEN_W { DTEN_W { w: self } } #[doc = "Bits 3:5 - DAC trigger selection"] #[inline(always)] pub fn dtsel(&mut self) -> DTSEL_W { DTSEL_W { w: self } } #[doc = "Bits 6:7 - DAC noise wave mode"] #[inline(always)] pub fn dwm(&mut self) -> DWM_W { DWM_W { w: self } } #[doc = "Bits 8:11 - DAC noise wave bit width"] #[inline(always)] pub fn dwbw(&mut self) -> DWBW_W { DWBW_W { w: self } } #[doc = "Bit 12 - DAC DMA enable"] #[inline(always)] pub fn ddmaen(&mut self) -> DDMAEN_W { DDMAEN_W { w: self } } #[doc = "Bit 13 - DAC DMA underrun interrupt enable"] #[inline(always)] pub fn ddudrie(&mut self) -> DDUDRIE_W { DDUDRIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SWT register accessor: an alias for `Reg`"] pub type SWT = crate::Reg; #[doc = "software trigger register"] pub mod swt { #[doc = "Register `SWT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SWTR` writer - DAC software trigger"] pub struct SWTR_W<'a> { w: &'a mut W, } impl<'a> SWTR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 0 - DAC software trigger"] #[inline(always)] pub fn swtr(&mut self) -> SWTR_W { SWTR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "software trigger register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swt](index.html) module"] pub struct SWT_SPEC; impl crate::RegisterSpec for SWT_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [swt::W](W) writer structure"] impl crate::Writable for SWT_SPEC { type Writer = W; } #[doc = "`reset()` method sets SWT to value 0"] impl crate::Resettable for SWT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DAC_R12DH register accessor: an alias for `Reg`"] pub type DAC_R12DH = crate::Reg; #[doc = "DAC 12-bit right-aligned data holding register"] pub mod dac_r12dh { #[doc = "Register `DAC_R12DH` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DAC_R12DH` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DAC_DH` reader - DAC 12-bit right-aligned data"] pub struct DAC_DH_R(crate::FieldReader); impl DAC_DH_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { DAC_DH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAC_DH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAC_DH` writer - DAC 12-bit right-aligned data"] pub struct DAC_DH_W<'a> { w: &'a mut W, } impl<'a> DAC_DH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); self.w } } impl R { #[doc = "Bits 0:11 - DAC 12-bit right-aligned data"] #[inline(always)] pub fn dac_dh(&self) -> DAC_DH_R { DAC_DH_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - DAC 12-bit right-aligned data"] #[inline(always)] pub fn dac_dh(&mut self) -> DAC_DH_W { DAC_DH_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DAC 12-bit right-aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dac_r12dh](index.html) module"] pub struct DAC_R12DH_SPEC; impl crate::RegisterSpec for DAC_R12DH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dac_r12dh::R](R) reader structure"] impl crate::Readable for DAC_R12DH_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dac_r12dh::W](W) writer structure"] impl crate::Writable for DAC_R12DH_SPEC { type Writer = W; } #[doc = "`reset()` method sets DAC_R12DH to value 0"] impl crate::Resettable for DAC_R12DH_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DAC_L12DH register accessor: an alias for `Reg`"] pub type DAC_L12DH = crate::Reg; #[doc = "DAC 12-bit left aligned data holding register"] pub mod dac_l12dh { #[doc = "Register `DAC_L12DH` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DAC_L12DH` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DAC_DH` reader - DAC 12-bit left-aligned data"] pub struct DAC_DH_R(crate::FieldReader); impl DAC_DH_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { DAC_DH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAC_DH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAC_DH` writer - DAC 12-bit left-aligned data"] pub struct DAC_DH_W<'a> { w: &'a mut W, } impl<'a> DAC_DH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0fff << 4)) | ((value as u32 & 0x0fff) << 4); self.w } } impl R { #[doc = "Bits 4:15 - DAC 12-bit left-aligned data"] #[inline(always)] pub fn dac_dh(&self) -> DAC_DH_R { DAC_DH_R::new(((self.bits >> 4) & 0x0fff) as u16) } } impl W { #[doc = "Bits 4:15 - DAC 12-bit left-aligned data"] #[inline(always)] pub fn dac_dh(&mut self) -> DAC_DH_W { DAC_DH_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DAC 12-bit left aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dac_l12dh](index.html) module"] pub struct DAC_L12DH_SPEC; impl crate::RegisterSpec for DAC_L12DH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dac_l12dh::R](R) reader structure"] impl crate::Readable for DAC_L12DH_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dac_l12dh::W](W) writer structure"] impl crate::Writable for DAC_L12DH_SPEC { type Writer = W; } #[doc = "`reset()` method sets DAC_L12DH to value 0"] impl crate::Resettable for DAC_L12DH_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DAC_R8DH register accessor: an alias for `Reg`"] pub type DAC_R8DH = crate::Reg; #[doc = "DAC 8-bit right aligned data holding register"] pub mod dac_r8dh { #[doc = "Register `DAC_R8DH` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DAC_R8DH` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DAC_DH` reader - DAC 8-bit right-aligned data"] pub struct DAC_DH_R(crate::FieldReader); impl DAC_DH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAC_DH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAC_DH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAC_DH` writer - DAC 8-bit right-aligned data"] pub struct DAC_DH_W<'a> { w: &'a mut W, } impl<'a> DAC_DH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bits 0:7 - DAC 8-bit right-aligned data"] #[inline(always)] pub fn dac_dh(&self) -> DAC_DH_R { DAC_DH_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - DAC 8-bit right-aligned data"] #[inline(always)] pub fn dac_dh(&mut self) -> DAC_DH_W { DAC_DH_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DAC 8-bit right aligned data holding register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dac_r8dh](index.html) module"] pub struct DAC_R8DH_SPEC; impl crate::RegisterSpec for DAC_R8DH_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dac_r8dh::R](R) reader structure"] impl crate::Readable for DAC_R8DH_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dac_r8dh::W](W) writer structure"] impl crate::Writable for DAC_R8DH_SPEC { type Writer = W; } #[doc = "`reset()` method sets DAC_R8DH to value 0"] impl crate::Resettable for DAC_R8DH_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DAC_DO register accessor: an alias for `Reg`"] pub type DAC_DO = crate::Reg; #[doc = "DAC data output register"] pub mod dac_do { #[doc = "Register `DAC_DO` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `DAC_DO` reader - DAC data output"] pub struct DAC_DO_R(crate::FieldReader); impl DAC_DO_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { DAC_DO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAC_DO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:11 - DAC data output"] #[inline(always)] pub fn dac_do(&self) -> DAC_DO_R { DAC_DO_R::new((self.bits & 0x0fff) as u16) } } #[doc = "DAC data output register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dac_do](index.html) module"] pub struct DAC_DO_SPEC; impl crate::RegisterSpec for DAC_DO_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dac_do::R](R) reader structure"] impl crate::Readable for DAC_DO_SPEC { type Reader = R; } #[doc = "`reset()` method sets DAC_DO to value 0"] impl crate::Resettable for DAC_DO_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "STAT register accessor: an alias for `Reg`"] pub type STAT = crate::Reg; #[doc = "status register"] pub mod stat { #[doc = "Register `STAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `STAT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DDUDR` reader - DAC DMA underrun flag"] pub struct DDUDR_R(crate::FieldReader); impl DDUDR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DDUDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DDUDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DDUDR` writer - DAC DMA underrun flag"] pub struct DDUDR_W<'a> { w: &'a mut W, } impl<'a> DDUDR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } impl R { #[doc = "Bit 13 - DAC DMA underrun flag"] #[inline(always)] pub fn ddudr(&self) -> DDUDR_R { DDUDR_R::new(((self.bits >> 13) & 0x01) != 0) } } impl W { #[doc = "Bit 13 - DAC DMA underrun flag"] #[inline(always)] pub fn ddudr(&mut self) -> DDUDR_W { DDUDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"] pub struct STAT_SPEC; impl crate::RegisterSpec for STAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat::R](R) reader structure"] impl crate::Readable for STAT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [stat::W](W) writer structure"] impl crate::Writable for STAT_SPEC { type Writer = W; } #[doc = "`reset()` method sets STAT to value 0"] impl crate::Resettable for STAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Debug support"] pub struct DBG { _marker: PhantomData<*const ()>, } unsafe impl Send for DBG {} impl DBG { #[doc = r"Pointer to the register block"] pub const PTR: *const dbg::RegisterBlock = 0xe004_2000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const dbg::RegisterBlock { Self::PTR } } impl Deref for DBG { type Target = dbg::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for DBG { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("DBG").finish() } } #[doc = "Debug support"] pub mod dbg { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - MCU Device ID Code Register"] pub id: crate::Reg, #[doc = "0x04 - Debug Control Register 0"] pub ctl0: crate::Reg, #[doc = "0x08 - Debug Control Register 1"] pub ctl1: crate::Reg, } #[doc = "ID register accessor: an alias for `Reg`"] pub type ID = crate::Reg; #[doc = "MCU Device ID Code Register"] pub mod id { #[doc = "Register `ID` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `ID_CODE` reader - DBG ID code register"] pub struct ID_CODE_R(crate::FieldReader); impl ID_CODE_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { ID_CODE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ID_CODE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:31 - DBG ID code register"] #[inline(always)] pub fn id_code(&self) -> ID_CODE_R { ID_CODE_R::new(self.bits) } } #[doc = "MCU Device ID Code Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id](index.html) module"] pub struct ID_SPEC; impl crate::RegisterSpec for ID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [id::R](R) reader structure"] impl crate::Readable for ID_SPEC { type Reader = R; } #[doc = "`reset()` method sets ID to value 0"] impl crate::Resettable for ID_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "Debug Control Register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SLP_HOLD` reader - Sleep mode hold register"] pub struct SLP_HOLD_R(crate::FieldReader); impl SLP_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SLP_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SLP_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SLP_HOLD` writer - Sleep mode hold register"] pub struct SLP_HOLD_W<'a> { w: &'a mut W, } impl<'a> SLP_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `DSLP_HOLD` reader - DEEPSLEEP mode hold Mode"] pub struct DSLP_HOLD_R(crate::FieldReader); impl DSLP_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DSLP_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DSLP_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DSLP_HOLD` writer - DEEPSLEEP mode hold Mode"] pub struct DSLP_HOLD_W<'a> { w: &'a mut W, } impl<'a> DSLP_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STB_HOLD` reader - Standby mode hold Mode"] pub struct STB_HOLD_R(crate::FieldReader); impl STB_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STB_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STB_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STB_HOLD` writer - Standby mode hold Mode"] pub struct STB_HOLD_W<'a> { w: &'a mut W, } impl<'a> STB_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `FWDGT_HOLD` reader - FWDGT hold register"] pub struct FWDGT_HOLD_R(crate::FieldReader); impl FWDGT_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FWDGT_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FWDGT_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FWDGT_HOLD` writer - FWDGT hold register"] pub struct FWDGT_HOLD_W<'a> { w: &'a mut W, } impl<'a> FWDGT_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `WWDGT_HOLD` reader - WWDGT hold register"] pub struct WWDGT_HOLD_R(crate::FieldReader); impl WWDGT_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WWDGT_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WWDGT_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WWDGT_HOLD` writer - WWDGT hold register"] pub struct WWDGT_HOLD_W<'a> { w: &'a mut W, } impl<'a> WWDGT_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `TIMER0_HOLD` reader - Timer 0 hold register"] pub struct TIMER0_HOLD_R(crate::FieldReader); impl TIMER0_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER0_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER0_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER0_HOLD` writer - Timer 0 hold register"] pub struct TIMER0_HOLD_W<'a> { w: &'a mut W, } impl<'a> TIMER0_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `TIMER1_HOLD` reader - Timer 1 hold register"] pub struct TIMER1_HOLD_R(crate::FieldReader); impl TIMER1_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER1_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER1_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER1_HOLD` writer - Timer 1 hold register"] pub struct TIMER1_HOLD_W<'a> { w: &'a mut W, } impl<'a> TIMER1_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TIMER2_HOLD` reader - Timer 2 hold register"] pub struct TIMER2_HOLD_R(crate::FieldReader); impl TIMER2_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER2_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER2_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER2_HOLD` writer - Timer 2 hold register"] pub struct TIMER2_HOLD_W<'a> { w: &'a mut W, } impl<'a> TIMER2_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `I2C0_HOLD` reader - I2C0 hold register"] pub struct I2C0_HOLD_R(crate::FieldReader); impl I2C0_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2C0_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2C0_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2C0_HOLD` writer - I2C0 hold register"] pub struct I2C0_HOLD_W<'a> { w: &'a mut W, } impl<'a> I2C0_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `I2C1_HOLD` reader - I2C1 hold register"] pub struct I2C1_HOLD_R(crate::FieldReader); impl I2C1_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2C1_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2C1_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2C1_HOLD` writer - I2C1 hold register"] pub struct I2C1_HOLD_W<'a> { w: &'a mut W, } impl<'a> I2C1_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `TIMER5_HOLD` reader - Timer 5 hold register"] pub struct TIMER5_HOLD_R(crate::FieldReader); impl TIMER5_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER5_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER5_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER5_HOLD` writer - Timer 5 hold register"] pub struct TIMER5_HOLD_W<'a> { w: &'a mut W, } impl<'a> TIMER5_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `TIMER13_HOLD` reader - Timer 13 hold register"] pub struct TIMER13_HOLD_R(crate::FieldReader); impl TIMER13_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER13_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER13_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER13_HOLD` writer - Timer 13 hold register"] pub struct TIMER13_HOLD_W<'a> { w: &'a mut W, } impl<'a> TIMER13_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } impl R { #[doc = "Bit 0 - Sleep mode hold register"] #[inline(always)] pub fn slp_hold(&self) -> SLP_HOLD_R { SLP_HOLD_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - DEEPSLEEP mode hold Mode"] #[inline(always)] pub fn dslp_hold(&self) -> DSLP_HOLD_R { DSLP_HOLD_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Standby mode hold Mode"] #[inline(always)] pub fn stb_hold(&self) -> STB_HOLD_R { STB_HOLD_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 8 - FWDGT hold register"] #[inline(always)] pub fn fwdgt_hold(&self) -> FWDGT_HOLD_R { FWDGT_HOLD_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - WWDGT hold register"] #[inline(always)] pub fn wwdgt_hold(&self) -> WWDGT_HOLD_R { WWDGT_HOLD_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Timer 0 hold register"] #[inline(always)] pub fn timer0_hold(&self) -> TIMER0_HOLD_R { TIMER0_HOLD_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Timer 1 hold register"] #[inline(always)] pub fn timer1_hold(&self) -> TIMER1_HOLD_R { TIMER1_HOLD_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Timer 2 hold register"] #[inline(always)] pub fn timer2_hold(&self) -> TIMER2_HOLD_R { TIMER2_HOLD_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 15 - I2C0 hold register"] #[inline(always)] pub fn i2c0_hold(&self) -> I2C0_HOLD_R { I2C0_HOLD_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - I2C1 hold register"] #[inline(always)] pub fn i2c1_hold(&self) -> I2C1_HOLD_R { I2C1_HOLD_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 19 - Timer 5 hold register"] #[inline(always)] pub fn timer5_hold(&self) -> TIMER5_HOLD_R { TIMER5_HOLD_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 27 - Timer 13 hold register"] #[inline(always)] pub fn timer13_hold(&self) -> TIMER13_HOLD_R { TIMER13_HOLD_R::new(((self.bits >> 27) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Sleep mode hold register"] #[inline(always)] pub fn slp_hold(&mut self) -> SLP_HOLD_W { SLP_HOLD_W { w: self } } #[doc = "Bit 1 - DEEPSLEEP mode hold Mode"] #[inline(always)] pub fn dslp_hold(&mut self) -> DSLP_HOLD_W { DSLP_HOLD_W { w: self } } #[doc = "Bit 2 - Standby mode hold Mode"] #[inline(always)] pub fn stb_hold(&mut self) -> STB_HOLD_W { STB_HOLD_W { w: self } } #[doc = "Bit 8 - FWDGT hold register"] #[inline(always)] pub fn fwdgt_hold(&mut self) -> FWDGT_HOLD_W { FWDGT_HOLD_W { w: self } } #[doc = "Bit 9 - WWDGT hold register"] #[inline(always)] pub fn wwdgt_hold(&mut self) -> WWDGT_HOLD_W { WWDGT_HOLD_W { w: self } } #[doc = "Bit 10 - Timer 0 hold register"] #[inline(always)] pub fn timer0_hold(&mut self) -> TIMER0_HOLD_W { TIMER0_HOLD_W { w: self } } #[doc = "Bit 11 - Timer 1 hold register"] #[inline(always)] pub fn timer1_hold(&mut self) -> TIMER1_HOLD_W { TIMER1_HOLD_W { w: self } } #[doc = "Bit 12 - Timer 2 hold register"] #[inline(always)] pub fn timer2_hold(&mut self) -> TIMER2_HOLD_W { TIMER2_HOLD_W { w: self } } #[doc = "Bit 15 - I2C0 hold register"] #[inline(always)] pub fn i2c0_hold(&mut self) -> I2C0_HOLD_W { I2C0_HOLD_W { w: self } } #[doc = "Bit 16 - I2C1 hold register"] #[inline(always)] pub fn i2c1_hold(&mut self) -> I2C1_HOLD_W { I2C1_HOLD_W { w: self } } #[doc = "Bit 19 - Timer 5 hold register"] #[inline(always)] pub fn timer5_hold(&mut self) -> TIMER5_HOLD_W { TIMER5_HOLD_W { w: self } } #[doc = "Bit 27 - Timer 13 hold register"] #[inline(always)] pub fn timer13_hold(&mut self) -> TIMER13_HOLD_W { TIMER13_HOLD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Debug Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "Debug Control Register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RTC_HOLD` reader - RTC hold register"] pub struct RTC_HOLD_R(crate::FieldReader); impl RTC_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTC_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTC_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTC_HOLD` writer - RTC hold register"] pub struct RTC_HOLD_W<'a> { w: &'a mut W, } impl<'a> RTC_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `TIMER14_HOLD` reader - Timer 14 hold register"] pub struct TIMER14_HOLD_R(crate::FieldReader); impl TIMER14_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER14_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER14_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER14_HOLD` writer - Timer 14 hold register"] pub struct TIMER14_HOLD_W<'a> { w: &'a mut W, } impl<'a> TIMER14_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `TIMER15_HOLD` reader - Timer 15 hold register"] pub struct TIMER15_HOLD_R(crate::FieldReader); impl TIMER15_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER15_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER15_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER15_HOLD` writer - Timer 15 hold register"] pub struct TIMER15_HOLD_W<'a> { w: &'a mut W, } impl<'a> TIMER15_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `TIMER16_HOLD` reader - Timer 16 hold register"] pub struct TIMER16_HOLD_R(crate::FieldReader); impl TIMER16_HOLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER16_HOLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER16_HOLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER16_HOLD` writer - Timer 16 hold register"] pub struct TIMER16_HOLD_W<'a> { w: &'a mut W, } impl<'a> TIMER16_HOLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } impl R { #[doc = "Bit 10 - RTC hold register"] #[inline(always)] pub fn rtc_hold(&self) -> RTC_HOLD_R { RTC_HOLD_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 16 - Timer 14 hold register"] #[inline(always)] pub fn timer14_hold(&self) -> TIMER14_HOLD_R { TIMER14_HOLD_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Timer 15 hold register"] #[inline(always)] pub fn timer15_hold(&self) -> TIMER15_HOLD_R { TIMER15_HOLD_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Timer 16 hold register"] #[inline(always)] pub fn timer16_hold(&self) -> TIMER16_HOLD_R { TIMER16_HOLD_R::new(((self.bits >> 18) & 0x01) != 0) } } impl W { #[doc = "Bit 10 - RTC hold register"] #[inline(always)] pub fn rtc_hold(&mut self) -> RTC_HOLD_W { RTC_HOLD_W { w: self } } #[doc = "Bit 16 - Timer 14 hold register"] #[inline(always)] pub fn timer14_hold(&mut self) -> TIMER14_HOLD_W { TIMER14_HOLD_W { w: self } } #[doc = "Bit 17 - Timer 15 hold register"] #[inline(always)] pub fn timer15_hold(&mut self) -> TIMER15_HOLD_W { TIMER15_HOLD_W { w: self } } #[doc = "Bit 18 - Timer 16 hold register"] #[inline(always)] pub fn timer16_hold(&mut self) -> TIMER16_HOLD_W { TIMER16_HOLD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Debug Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "DMA controller"] pub struct DMA { _marker: PhantomData<*const ()>, } unsafe impl Send for DMA {} impl DMA { #[doc = r"Pointer to the register block"] pub const PTR: *const dma::RegisterBlock = 0x4002_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const dma::RegisterBlock { Self::PTR } } impl Deref for DMA { type Target = dma::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for DMA { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("DMA").finish() } } #[doc = "DMA controller"] pub mod dma { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - DMA interrupt flag register (DMA_INTF)"] pub intf: crate::Reg, #[doc = "0x04 - DMA interrupt flag clear register (DMA_INTC)"] pub intc: crate::Reg, #[doc = "0x08 - DMA channel configuration register (DMA_CH0CTL)"] pub ch0ctl: crate::Reg, #[doc = "0x0c - DMA channel 0 counter register"] pub ch0cnt: crate::Reg, #[doc = "0x10 - DMA channel 0 peripheral base address register"] pub ch0paddr: crate::Reg, #[doc = "0x14 - DMA channel 0 memory base address register"] pub ch0maddr: crate::Reg, _reserved6: [u8; 0x04], #[doc = "0x1c - DMA channel configuration register (DMA_CH1CTL)"] pub ch1ctl: crate::Reg, #[doc = "0x20 - DMA channel 1 counter register"] pub ch1cnt: crate::Reg, #[doc = "0x24 - DMA channel 1 peripheral base address register"] pub ch1paddr: crate::Reg, #[doc = "0x28 - DMA channel 1 memory base address register"] pub ch1maddr: crate::Reg, _reserved10: [u8; 0x04], #[doc = "0x30 - DMA channel configuration register (DMA_CH2CTL)"] pub ch2ctl: crate::Reg, #[doc = "0x34 - DMA channel 2 counter register"] pub ch2cnt: crate::Reg, #[doc = "0x38 - DMA channel 2 peripheral base address register"] pub ch2paddr: crate::Reg, #[doc = "0x3c - DMA channel 2 memory base address register"] pub ch2maddr: crate::Reg, _reserved14: [u8; 0x04], #[doc = "0x44 - DMA channel configuration register (DMA_CH3CTL)"] pub ch3ctl: crate::Reg, #[doc = "0x48 - DMA channel 3 counter register"] pub ch3cnt: crate::Reg, #[doc = "0x4c - DMA channel 3 peripheral base address register"] pub ch3paddr: crate::Reg, #[doc = "0x50 - DMA channel 3 memory base address register"] pub ch3maddr: crate::Reg, _reserved18: [u8; 0x04], #[doc = "0x58 - DMA channel configuration register (DMA_CH4CTL)"] pub ch4ctl: crate::Reg, #[doc = "0x5c - DMA channel 4 counter register"] pub ch4cnt: crate::Reg, #[doc = "0x60 - DMA channel 4 peripheral base address register"] pub ch4paddr: crate::Reg, #[doc = "0x64 - DMA channel 4 memory base address register"] pub ch4maddr: crate::Reg, _reserved22: [u8; 0x04], #[doc = "0x6c - DMA channel configuration register (DMA_CH5CTL)"] pub ch5ctl: crate::Reg, #[doc = "0x70 - DMA channel 5 counter register"] pub ch5cnt: crate::Reg, #[doc = "0x74 - DMA channel 5 peripheral base address register"] pub ch5paddr: crate::Reg, #[doc = "0x78 - DMA channel 5 memory base address register"] pub ch5maddr: crate::Reg, _reserved26: [u8; 0x04], #[doc = "0x80 - DMA channel configuration register (DMA_CH6CTL)"] pub ch6ctl: crate::Reg, #[doc = "0x84 - DMA channel 6 counter register"] pub ch6cnt: crate::Reg, #[doc = "0x88 - DMA channel 6 peripheral base address register"] pub ch6paddr: crate::Reg, #[doc = "0x8c - DMA channel 6 memory base address register"] pub ch6maddr: crate::Reg, } #[doc = "INTF register accessor: an alias for `Reg`"] pub type INTF = crate::Reg; #[doc = "DMA interrupt flag register (DMA_INTF)"] pub mod intf { #[doc = "Register `INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `GIF0` reader - Channel 0 Global interrupt flag"] pub struct GIF0_R(crate::FieldReader); impl GIF0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GIF0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GIF0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIF0` reader - Channel 0 Full Transfer Finish flag"] pub struct FTFIF0_R(crate::FieldReader); impl FTFIF0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIF0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIF0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIF0` reader - Channel 0 Half Transfer Finish flag"] pub struct HTFIF0_R(crate::FieldReader); impl HTFIF0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIF0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIF0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIF0` reader - Channel 0 Error flag"] pub struct ERRIF0_R(crate::FieldReader); impl ERRIF0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIF0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIF0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GIF1` reader - Channel 1 Global interrupt flag"] pub struct GIF1_R(crate::FieldReader); impl GIF1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GIF1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GIF1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIF1` reader - Channel 1 Full Transfer Finish flag"] pub struct FTFIF1_R(crate::FieldReader); impl FTFIF1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIF1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIF1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIF1` reader - Channel 1 Half Transfer Finish flag"] pub struct HTFIF1_R(crate::FieldReader); impl HTFIF1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIF1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIF1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIF1` reader - Channel 1 Error flag"] pub struct ERRIF1_R(crate::FieldReader); impl ERRIF1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIF1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIF1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GIF2` reader - Channel 2 Global interrupt flag"] pub struct GIF2_R(crate::FieldReader); impl GIF2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GIF2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GIF2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIF2` reader - Channel 2 Full Transfer Finish flag"] pub struct FTFIF2_R(crate::FieldReader); impl FTFIF2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIF2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIF2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIF2` reader - Channel 2 Half Transfer Finish flag"] pub struct HTFIF2_R(crate::FieldReader); impl HTFIF2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIF2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIF2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIF2` reader - Channel 2 Error flag"] pub struct ERRIF2_R(crate::FieldReader); impl ERRIF2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIF2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIF2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GIF3` reader - Channel 3 Global interrupt flag"] pub struct GIF3_R(crate::FieldReader); impl GIF3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GIF3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GIF3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIF3` reader - Channel 3 Full Transfer Finish flag"] pub struct FTFIF3_R(crate::FieldReader); impl FTFIF3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIF3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIF3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIF3` reader - Channel 3 Half Transfer Finish flag"] pub struct HTFIF3_R(crate::FieldReader); impl HTFIF3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIF3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIF3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIF3` reader - Channel 3 Error flag"] pub struct ERRIF3_R(crate::FieldReader); impl ERRIF3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIF3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIF3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GIF4` reader - Channel 4 Global interrupt flag"] pub struct GIF4_R(crate::FieldReader); impl GIF4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GIF4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GIF4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIF4` reader - Channel 4 Full Transfer Finish flag"] pub struct FTFIF4_R(crate::FieldReader); impl FTFIF4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIF4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIF4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIF4` reader - Channel 4 Half Transfer Finish flag"] pub struct HTFIF4_R(crate::FieldReader); impl HTFIF4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIF4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIF4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIF4` reader - Channel 4 Error flag"] pub struct ERRIF4_R(crate::FieldReader); impl ERRIF4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIF4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIF4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GIF5` reader - Channel 5 Global interrupt flag"] pub struct GIF5_R(crate::FieldReader); impl GIF5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GIF5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GIF5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIF5` reader - Channel 5 Full Transfer Finish flag"] pub struct FTFIF5_R(crate::FieldReader); impl FTFIF5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIF5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIF5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIF5` reader - Channel 5 Half Transfer Finish flag"] pub struct HTFIF5_R(crate::FieldReader); impl HTFIF5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIF5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIF5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIF5` reader - Channel 5 Error flag"] pub struct ERRIF5_R(crate::FieldReader); impl ERRIF5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIF5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIF5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GIF6` reader - Channel 6 Global interrupt flag"] pub struct GIF6_R(crate::FieldReader); impl GIF6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GIF6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GIF6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIF6` reader - Channel 6 Full Transfer Finish flag"] pub struct FTFIF6_R(crate::FieldReader); impl FTFIF6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIF6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIF6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIF6` reader - Channel 6 Half Transfer Finish flag"] pub struct HTFIF6_R(crate::FieldReader); impl HTFIF6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIF6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIF6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIF6` reader - Channel 6 Error flag"] pub struct ERRIF6_R(crate::FieldReader); impl ERRIF6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIF6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIF6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 0 - Channel 0 Global interrupt flag"] #[inline(always)] pub fn gif0(&self) -> GIF0_R { GIF0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel 0 Full Transfer Finish flag"] #[inline(always)] pub fn ftfif0(&self) -> FTFIF0_R { FTFIF0_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Channel 0 Half Transfer Finish flag"] #[inline(always)] pub fn htfif0(&self) -> HTFIF0_R { HTFIF0_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Channel 0 Error flag"] #[inline(always)] pub fn errif0(&self) -> ERRIF0_R { ERRIF0_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Channel 1 Global interrupt flag"] #[inline(always)] pub fn gif1(&self) -> GIF1_R { GIF1_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Channel 1 Full Transfer Finish flag"] #[inline(always)] pub fn ftfif1(&self) -> FTFIF1_R { FTFIF1_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Channel 1 Half Transfer Finish flag"] #[inline(always)] pub fn htfif1(&self) -> HTFIF1_R { HTFIF1_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Channel 1 Error flag"] #[inline(always)] pub fn errif1(&self) -> ERRIF1_R { ERRIF1_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Channel 2 Global interrupt flag"] #[inline(always)] pub fn gif2(&self) -> GIF2_R { GIF2_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Channel 2 Full Transfer Finish flag"] #[inline(always)] pub fn ftfif2(&self) -> FTFIF2_R { FTFIF2_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Channel 2 Half Transfer Finish flag"] #[inline(always)] pub fn htfif2(&self) -> HTFIF2_R { HTFIF2_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Channel 2 Error flag"] #[inline(always)] pub fn errif2(&self) -> ERRIF2_R { ERRIF2_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Channel 3 Global interrupt flag"] #[inline(always)] pub fn gif3(&self) -> GIF3_R { GIF3_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Channel 3 Full Transfer Finish flag"] #[inline(always)] pub fn ftfif3(&self) -> FTFIF3_R { FTFIF3_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Channel 3 Half Transfer Finish flag"] #[inline(always)] pub fn htfif3(&self) -> HTFIF3_R { HTFIF3_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Channel 3 Error flag"] #[inline(always)] pub fn errif3(&self) -> ERRIF3_R { ERRIF3_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - Channel 4 Global interrupt flag"] #[inline(always)] pub fn gif4(&self) -> GIF4_R { GIF4_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Channel 4 Full Transfer Finish flag"] #[inline(always)] pub fn ftfif4(&self) -> FTFIF4_R { FTFIF4_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Channel 4 Half Transfer Finish flag"] #[inline(always)] pub fn htfif4(&self) -> HTFIF4_R { HTFIF4_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - Channel 4 Error flag"] #[inline(always)] pub fn errif4(&self) -> ERRIF4_R { ERRIF4_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - Channel 5 Global interrupt flag"] #[inline(always)] pub fn gif5(&self) -> GIF5_R { GIF5_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21 - Channel 5 Full Transfer Finish flag"] #[inline(always)] pub fn ftfif5(&self) -> FTFIF5_R { FTFIF5_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22 - Channel 5 Half Transfer Finish flag"] #[inline(always)] pub fn htfif5(&self) -> HTFIF5_R { HTFIF5_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23 - Channel 5 Error flag"] #[inline(always)] pub fn errif5(&self) -> ERRIF5_R { ERRIF5_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 24 - Channel 6 Global interrupt flag"] #[inline(always)] pub fn gif6(&self) -> GIF6_R { GIF6_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25 - Channel 6 Full Transfer Finish flag"] #[inline(always)] pub fn ftfif6(&self) -> FTFIF6_R { FTFIF6_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26 - Channel 6 Half Transfer Finish flag"] #[inline(always)] pub fn htfif6(&self) -> HTFIF6_R { HTFIF6_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27 - Channel 6 Error flag"] #[inline(always)] pub fn errif6(&self) -> ERRIF6_R { ERRIF6_R::new(((self.bits >> 27) & 0x01) != 0) } } #[doc = "DMA interrupt flag register (DMA_INTF)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intf](index.html) module"] pub struct INTF_SPEC; impl crate::RegisterSpec for INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [intf::R](R) reader structure"] impl crate::Readable for INTF_SPEC { type Reader = R; } #[doc = "`reset()` method sets INTF to value 0"] impl crate::Resettable for INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTC register accessor: an alias for `Reg`"] pub type INTC = crate::Reg; #[doc = "DMA interrupt flag clear register (DMA_INTC)"] pub mod intc { #[doc = "Register `INTC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `GIFC0` writer - Channel 0 Global interrupt flag clear"] pub struct GIFC0_W<'a> { w: &'a mut W, } impl<'a> GIFC0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `GIFC1` writer - Channel 1 Global interrupt flag clear"] pub struct GIFC1_W<'a> { w: &'a mut W, } impl<'a> GIFC1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `GIFC2` writer - Channel 2 Global interrupt flag clear"] pub struct GIFC2_W<'a> { w: &'a mut W, } impl<'a> GIFC2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `GIFC3` writer - Channel 3 Global interrupt flag clear"] pub struct GIFC3_W<'a> { w: &'a mut W, } impl<'a> GIFC3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `GIFC4` writer - Channel 4 Global interrupt flag clear"] pub struct GIFC4_W<'a> { w: &'a mut W, } impl<'a> GIFC4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `GIFC5` writer - Channel 5 Global interrupt flag clear"] pub struct GIFC5_W<'a> { w: &'a mut W, } impl<'a> GIFC5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `GIFC6` writer - Channel 6 Global interrupt flag clear"] pub struct GIFC6_W<'a> { w: &'a mut W, } impl<'a> GIFC6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `FTFIFC0` writer - Channel 0 Full Transfer Finish clear"] pub struct FTFIFC0_W<'a> { w: &'a mut W, } impl<'a> FTFIFC0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `FTFIFC1` writer - Channel 1 Full Transfer Finish clear"] pub struct FTFIFC1_W<'a> { w: &'a mut W, } impl<'a> FTFIFC1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `FTFIFC2` writer - Channel 2 Full Transfer Finish clear"] pub struct FTFIFC2_W<'a> { w: &'a mut W, } impl<'a> FTFIFC2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `FTFIFC3` writer - Channel 3 Full Transfer Finish clear"] pub struct FTFIFC3_W<'a> { w: &'a mut W, } impl<'a> FTFIFC3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `FTFIFC4` writer - Channel 4 Full Transfer Finish clear"] pub struct FTFIFC4_W<'a> { w: &'a mut W, } impl<'a> FTFIFC4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `FTFIFC5` writer - Channel 5 Full Transfer Finish clear"] pub struct FTFIFC5_W<'a> { w: &'a mut W, } impl<'a> FTFIFC5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `FTFIFC6` writer - Channel 6 Full Transfer Finish clear"] pub struct FTFIFC6_W<'a> { w: &'a mut W, } impl<'a> FTFIFC6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); self.w } } #[doc = "Field `HTFIFC0` writer - Channel 0 Half Transfer clear"] pub struct HTFIFC0_W<'a> { w: &'a mut W, } impl<'a> HTFIFC0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `HTFIFC1` writer - Channel 1 Half Transfer clear"] pub struct HTFIFC1_W<'a> { w: &'a mut W, } impl<'a> HTFIFC1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `HTFIFC2` writer - Channel 2 Half Transfer clear"] pub struct HTFIFC2_W<'a> { w: &'a mut W, } impl<'a> HTFIFC2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `HTFIFC3` writer - Channel 3 Half Transfer clear"] pub struct HTFIFC3_W<'a> { w: &'a mut W, } impl<'a> HTFIFC3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `HTFIFC4` writer - Channel 4 Half Transfer clear"] pub struct HTFIFC4_W<'a> { w: &'a mut W, } impl<'a> HTFIFC4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `HTFIFC5` writer - Channel 5 Half Transfer clear"] pub struct HTFIFC5_W<'a> { w: &'a mut W, } impl<'a> HTFIFC5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `HTFIFC6` writer - Channel 6 Half Transfer clear"] pub struct HTFIFC6_W<'a> { w: &'a mut W, } impl<'a> HTFIFC6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `ERRIFC0` writer - Channel 0 Error clear"] pub struct ERRIFC0_W<'a> { w: &'a mut W, } impl<'a> ERRIFC0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `ERRIFC1` writer - Channel 1 Error clear"] pub struct ERRIFC1_W<'a> { w: &'a mut W, } impl<'a> ERRIFC1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `ERRIFC2` writer - Channel 2 Error clear"] pub struct ERRIFC2_W<'a> { w: &'a mut W, } impl<'a> ERRIFC2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `ERRIFC3` writer - Channel 3 Error clear"] pub struct ERRIFC3_W<'a> { w: &'a mut W, } impl<'a> ERRIFC3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `ERRIFC4` writer - Channel 4 Error clear"] pub struct ERRIFC4_W<'a> { w: &'a mut W, } impl<'a> ERRIFC4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `ERRIFC5` writer - Channel 5 Error clear"] pub struct ERRIFC5_W<'a> { w: &'a mut W, } impl<'a> ERRIFC5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `ERRIFC6` writer - Channel 6 Error clear"] pub struct ERRIFC6_W<'a> { w: &'a mut W, } impl<'a> ERRIFC6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } impl W { #[doc = "Bit 0 - Channel 0 Global interrupt flag clear"] #[inline(always)] pub fn gifc0(&mut self) -> GIFC0_W { GIFC0_W { w: self } } #[doc = "Bit 4 - Channel 1 Global interrupt flag clear"] #[inline(always)] pub fn gifc1(&mut self) -> GIFC1_W { GIFC1_W { w: self } } #[doc = "Bit 8 - Channel 2 Global interrupt flag clear"] #[inline(always)] pub fn gifc2(&mut self) -> GIFC2_W { GIFC2_W { w: self } } #[doc = "Bit 12 - Channel 3 Global interrupt flag clear"] #[inline(always)] pub fn gifc3(&mut self) -> GIFC3_W { GIFC3_W { w: self } } #[doc = "Bit 16 - Channel 4 Global interrupt flag clear"] #[inline(always)] pub fn gifc4(&mut self) -> GIFC4_W { GIFC4_W { w: self } } #[doc = "Bit 20 - Channel 5 Global interrupt flag clear"] #[inline(always)] pub fn gifc5(&mut self) -> GIFC5_W { GIFC5_W { w: self } } #[doc = "Bit 24 - Channel 6 Global interrupt flag clear"] #[inline(always)] pub fn gifc6(&mut self) -> GIFC6_W { GIFC6_W { w: self } } #[doc = "Bit 1 - Channel 0 Full Transfer Finish clear"] #[inline(always)] pub fn ftfifc0(&mut self) -> FTFIFC0_W { FTFIFC0_W { w: self } } #[doc = "Bit 5 - Channel 1 Full Transfer Finish clear"] #[inline(always)] pub fn ftfifc1(&mut self) -> FTFIFC1_W { FTFIFC1_W { w: self } } #[doc = "Bit 9 - Channel 2 Full Transfer Finish clear"] #[inline(always)] pub fn ftfifc2(&mut self) -> FTFIFC2_W { FTFIFC2_W { w: self } } #[doc = "Bit 13 - Channel 3 Full Transfer Finish clear"] #[inline(always)] pub fn ftfifc3(&mut self) -> FTFIFC3_W { FTFIFC3_W { w: self } } #[doc = "Bit 17 - Channel 4 Full Transfer Finish clear"] #[inline(always)] pub fn ftfifc4(&mut self) -> FTFIFC4_W { FTFIFC4_W { w: self } } #[doc = "Bit 21 - Channel 5 Full Transfer Finish clear"] #[inline(always)] pub fn ftfifc5(&mut self) -> FTFIFC5_W { FTFIFC5_W { w: self } } #[doc = "Bit 25 - Channel 6 Full Transfer Finish clear"] #[inline(always)] pub fn ftfifc6(&mut self) -> FTFIFC6_W { FTFIFC6_W { w: self } } #[doc = "Bit 2 - Channel 0 Half Transfer clear"] #[inline(always)] pub fn htfifc0(&mut self) -> HTFIFC0_W { HTFIFC0_W { w: self } } #[doc = "Bit 6 - Channel 1 Half Transfer clear"] #[inline(always)] pub fn htfifc1(&mut self) -> HTFIFC1_W { HTFIFC1_W { w: self } } #[doc = "Bit 10 - Channel 2 Half Transfer clear"] #[inline(always)] pub fn htfifc2(&mut self) -> HTFIFC2_W { HTFIFC2_W { w: self } } #[doc = "Bit 14 - Channel 3 Half Transfer clear"] #[inline(always)] pub fn htfifc3(&mut self) -> HTFIFC3_W { HTFIFC3_W { w: self } } #[doc = "Bit 18 - Channel 4 Half Transfer clear"] #[inline(always)] pub fn htfifc4(&mut self) -> HTFIFC4_W { HTFIFC4_W { w: self } } #[doc = "Bit 22 - Channel 5 Half Transfer clear"] #[inline(always)] pub fn htfifc5(&mut self) -> HTFIFC5_W { HTFIFC5_W { w: self } } #[doc = "Bit 26 - Channel 6 Half Transfer clear"] #[inline(always)] pub fn htfifc6(&mut self) -> HTFIFC6_W { HTFIFC6_W { w: self } } #[doc = "Bit 3 - Channel 0 Error clear"] #[inline(always)] pub fn errifc0(&mut self) -> ERRIFC0_W { ERRIFC0_W { w: self } } #[doc = "Bit 7 - Channel 1 Error clear"] #[inline(always)] pub fn errifc1(&mut self) -> ERRIFC1_W { ERRIFC1_W { w: self } } #[doc = "Bit 11 - Channel 2 Error clear"] #[inline(always)] pub fn errifc2(&mut self) -> ERRIFC2_W { ERRIFC2_W { w: self } } #[doc = "Bit 15 - Channel 3 Error clear"] #[inline(always)] pub fn errifc3(&mut self) -> ERRIFC3_W { ERRIFC3_W { w: self } } #[doc = "Bit 19 - Channel 4 Error clear"] #[inline(always)] pub fn errifc4(&mut self) -> ERRIFC4_W { ERRIFC4_W { w: self } } #[doc = "Bit 23 - Channel 5 Error clear"] #[inline(always)] pub fn errifc5(&mut self) -> ERRIFC5_W { ERRIFC5_W { w: self } } #[doc = "Bit 27 - Channel 6 Error clear"] #[inline(always)] pub fn errifc6(&mut self) -> ERRIFC6_W { ERRIFC6_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA interrupt flag clear register (DMA_INTC)\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intc](index.html) module"] pub struct INTC_SPEC; impl crate::RegisterSpec for INTC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [intc::W](W) writer structure"] impl crate::Writable for INTC_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTC to value 0"] impl crate::Resettable for INTC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH0CTL register accessor: an alias for `Reg`"] pub type CH0CTL = crate::Reg; #[doc = "DMA channel configuration register (DMA_CH0CTL)"] pub mod ch0ctl { #[doc = "Register `CH0CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH0CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHEN` reader - Channel enable"] pub struct CHEN_R(crate::FieldReader); impl CHEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHEN` writer - Channel enable"] pub struct CHEN_W<'a> { w: &'a mut W, } impl<'a> CHEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `FTFIE` reader - Full Transfer Finish interrupt enable"] pub struct FTFIE_R(crate::FieldReader); impl FTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIE` writer - Full Transfer Finish interrupt enable"] pub struct FTFIE_W<'a> { w: &'a mut W, } impl<'a> FTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `HTFIE` reader - Half Transfer Finish interrupt enable"] pub struct HTFIE_R(crate::FieldReader); impl HTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIE` writer - Half Transfer Finish interrupt enable"] pub struct HTFIE_W<'a> { w: &'a mut W, } impl<'a> HTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `ERRIE` reader - Transfer access error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Transfer access error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `DIR` reader - Transfer direction"] pub struct DIR_R(crate::FieldReader); impl DIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DIR` writer - Transfer direction"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CMEN` reader - Circular mode enable"] pub struct CMEN_R(crate::FieldReader); impl CMEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMEN` writer - Circular mode enable"] pub struct CMEN_W<'a> { w: &'a mut W, } impl<'a> CMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `PNAGA` reader - Next address generation algorithm of peripheral"] pub struct PNAGA_R(crate::FieldReader); impl PNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PNAGA` writer - Next address generation algorithm of peripheral"] pub struct PNAGA_W<'a> { w: &'a mut W, } impl<'a> PNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `MNAGA` reader - Next address generation algorithm of memory"] pub struct MNAGA_R(crate::FieldReader); impl MNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNAGA` writer - Next address generation algorithm of memory"] pub struct MNAGA_W<'a> { w: &'a mut W, } impl<'a> MNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PWIDTH` reader - Transfer data size of peripheral"] pub struct PWIDTH_R(crate::FieldReader); impl PWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PWIDTH` writer - Transfer data size of peripheral"] pub struct PWIDTH_W<'a> { w: &'a mut W, } impl<'a> PWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `MWIDTH` reader - Transfer data size of memory"] pub struct MWIDTH_R(crate::FieldReader); impl MWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MWIDTH` writer - Transfer data size of memory"] pub struct MWIDTH_W<'a> { w: &'a mut W, } impl<'a> MWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PRIO` reader - Priority Level of this channel"] pub struct PRIO_R(crate::FieldReader); impl PRIO_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PRIO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PRIO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PRIO` writer - Priority Level of this channel"] pub struct PRIO_W<'a> { w: &'a mut W, } impl<'a> PRIO_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `M2M` reader - Memory to memory mode"] pub struct M2M_R(crate::FieldReader); impl M2M_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { M2M_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for M2M_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `M2M` writer - Memory to memory mode"] pub struct M2M_W<'a> { w: &'a mut W, } impl<'a> M2M_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } impl R { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&self) -> CHEN_R { CHEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&self) -> FTFIE_R { FTFIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&self) -> HTFIE_R { HTFIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Transfer access error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&self) -> CMEN_R { CMEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&self) -> PNAGA_R { PNAGA_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&self) -> MNAGA_R { MNAGA_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&self) -> PWIDTH_R { PWIDTH_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&self) -> MWIDTH_R { MWIDTH_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&self) -> PRIO_R { PRIO_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&self) -> M2M_R { M2M_R::new(((self.bits >> 14) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&mut self) -> CHEN_W { CHEN_W { w: self } } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&mut self) -> FTFIE_W { FTFIE_W { w: self } } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&mut self) -> HTFIE_W { HTFIE_W { w: self } } #[doc = "Bit 3 - Transfer access error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&mut self) -> CMEN_W { CMEN_W { w: self } } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&mut self) -> PNAGA_W { PNAGA_W { w: self } } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&mut self) -> MNAGA_W { MNAGA_W { w: self } } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&mut self) -> PWIDTH_W { PWIDTH_W { w: self } } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&mut self) -> MWIDTH_W { MWIDTH_W { w: self } } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&mut self) -> PRIO_W { PRIO_W { w: self } } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&mut self) -> M2M_W { M2M_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel configuration register (DMA_CH0CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0ctl](index.html) module"] pub struct CH0CTL_SPEC; impl crate::RegisterSpec for CH0CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch0ctl::R](R) reader structure"] impl crate::Readable for CH0CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch0ctl::W](W) writer structure"] impl crate::Writable for CH0CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH0CTL to value 0"] impl crate::Resettable for CH0CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH0CNT register accessor: an alias for `Reg`"] pub type CH0CNT = crate::Reg; #[doc = "DMA channel 0 counter register"] pub mod ch0cnt { #[doc = "Register `CH0CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH0CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - Transfer counter"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - Transfer counter"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 0 counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0cnt](index.html) module"] pub struct CH0CNT_SPEC; impl crate::RegisterSpec for CH0CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch0cnt::R](R) reader structure"] impl crate::Readable for CH0CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch0cnt::W](W) writer structure"] impl crate::Writable for CH0CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH0CNT to value 0"] impl crate::Resettable for CH0CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH0PADDR register accessor: an alias for `Reg`"] pub type CH0PADDR = crate::Reg; #[doc = "DMA channel 0 peripheral base address register"] pub mod ch0paddr { #[doc = "Register `CH0PADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH0PADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PADDR` reader - Peripheral base address"] pub struct PADDR_R(crate::FieldReader); impl PADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { PADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PADDR` writer - Peripheral base address"] pub struct PADDR_W<'a> { w: &'a mut W, } impl<'a> PADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&self) -> PADDR_R { PADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&mut self) -> PADDR_W { PADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 0 peripheral base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0paddr](index.html) module"] pub struct CH0PADDR_SPEC; impl crate::RegisterSpec for CH0PADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch0paddr::R](R) reader structure"] impl crate::Readable for CH0PADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch0paddr::W](W) writer structure"] impl crate::Writable for CH0PADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH0PADDR to value 0"] impl crate::Resettable for CH0PADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH0MADDR register accessor: an alias for `Reg`"] pub type CH0MADDR = crate::Reg; #[doc = "DMA channel 0 memory base address register"] pub mod ch0maddr { #[doc = "Register `CH0MADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH0MADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MADDR` reader - Memory address"] pub struct MADDR_R(crate::FieldReader); impl MADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { MADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MADDR` writer - Memory address"] pub struct MADDR_W<'a> { w: &'a mut W, } impl<'a> MADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&self) -> MADDR_R { MADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&mut self) -> MADDR_W { MADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 0 memory base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0maddr](index.html) module"] pub struct CH0MADDR_SPEC; impl crate::RegisterSpec for CH0MADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch0maddr::R](R) reader structure"] impl crate::Readable for CH0MADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch0maddr::W](W) writer structure"] impl crate::Writable for CH0MADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH0MADDR to value 0"] impl crate::Resettable for CH0MADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH1CTL register accessor: an alias for `Reg`"] pub type CH1CTL = crate::Reg; #[doc = "DMA channel configuration register (DMA_CH1CTL)"] pub mod ch1ctl { #[doc = "Register `CH1CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH1CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHEN` reader - Channel enable"] pub struct CHEN_R(crate::FieldReader); impl CHEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHEN` writer - Channel enable"] pub struct CHEN_W<'a> { w: &'a mut W, } impl<'a> CHEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `FTFIE` reader - Full Transfer Finish interrupt enable"] pub struct FTFIE_R(crate::FieldReader); impl FTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIE` writer - Full Transfer Finish interrupt enable"] pub struct FTFIE_W<'a> { w: &'a mut W, } impl<'a> FTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `HTFIE` reader - Half Transfer Finish interrupt enable"] pub struct HTFIE_R(crate::FieldReader); impl HTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIE` writer - Half Transfer Finish interrupt enable"] pub struct HTFIE_W<'a> { w: &'a mut W, } impl<'a> HTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `ERRIE` reader - Error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `DIR` reader - Transfer direction"] pub struct DIR_R(crate::FieldReader); impl DIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DIR` writer - Transfer direction"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CMEN` reader - Circular mode enable"] pub struct CMEN_R(crate::FieldReader); impl CMEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMEN` writer - Circular mode enable"] pub struct CMEN_W<'a> { w: &'a mut W, } impl<'a> CMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `PNAGA` reader - Next address generation algorithm of peripheral"] pub struct PNAGA_R(crate::FieldReader); impl PNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PNAGA` writer - Next address generation algorithm of peripheral"] pub struct PNAGA_W<'a> { w: &'a mut W, } impl<'a> PNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `MNAGA` reader - Next address generation algorithm of memory"] pub struct MNAGA_R(crate::FieldReader); impl MNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNAGA` writer - Next address generation algorithm of memory"] pub struct MNAGA_W<'a> { w: &'a mut W, } impl<'a> MNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PWIDTH` reader - Transfer data size of peripheral"] pub struct PWIDTH_R(crate::FieldReader); impl PWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PWIDTH` writer - Transfer data size of peripheral"] pub struct PWIDTH_W<'a> { w: &'a mut W, } impl<'a> PWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `MWIDTH` reader - Transfer data size of memory"] pub struct MWIDTH_R(crate::FieldReader); impl MWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MWIDTH` writer - Transfer data size of memory"] pub struct MWIDTH_W<'a> { w: &'a mut W, } impl<'a> MWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PRIO` reader - Priority Level of this channel"] pub struct PRIO_R(crate::FieldReader); impl PRIO_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PRIO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PRIO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PRIO` writer - Priority Level of this channel"] pub struct PRIO_W<'a> { w: &'a mut W, } impl<'a> PRIO_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `M2M` reader - Memory to memory mode"] pub struct M2M_R(crate::FieldReader); impl M2M_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { M2M_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for M2M_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `M2M` writer - Memory to memory mode"] pub struct M2M_W<'a> { w: &'a mut W, } impl<'a> M2M_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } impl R { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&self) -> CHEN_R { CHEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&self) -> FTFIE_R { FTFIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&self) -> HTFIE_R { HTFIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&self) -> CMEN_R { CMEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&self) -> PNAGA_R { PNAGA_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&self) -> MNAGA_R { MNAGA_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&self) -> PWIDTH_R { PWIDTH_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&self) -> MWIDTH_R { MWIDTH_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&self) -> PRIO_R { PRIO_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&self) -> M2M_R { M2M_R::new(((self.bits >> 14) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&mut self) -> CHEN_W { CHEN_W { w: self } } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&mut self) -> FTFIE_W { FTFIE_W { w: self } } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&mut self) -> HTFIE_W { HTFIE_W { w: self } } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&mut self) -> CMEN_W { CMEN_W { w: self } } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&mut self) -> PNAGA_W { PNAGA_W { w: self } } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&mut self) -> MNAGA_W { MNAGA_W { w: self } } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&mut self) -> PWIDTH_W { PWIDTH_W { w: self } } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&mut self) -> MWIDTH_W { MWIDTH_W { w: self } } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&mut self) -> PRIO_W { PRIO_W { w: self } } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&mut self) -> M2M_W { M2M_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel configuration register (DMA_CH1CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1ctl](index.html) module"] pub struct CH1CTL_SPEC; impl crate::RegisterSpec for CH1CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch1ctl::R](R) reader structure"] impl crate::Readable for CH1CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch1ctl::W](W) writer structure"] impl crate::Writable for CH1CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH1CTL to value 0"] impl crate::Resettable for CH1CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH1CNT register accessor: an alias for `Reg`"] pub type CH1CNT = crate::Reg; #[doc = "DMA channel 1 counter register"] pub mod ch1cnt { #[doc = "Register `CH1CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH1CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - Transfer counter"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - Transfer counter"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 1 counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1cnt](index.html) module"] pub struct CH1CNT_SPEC; impl crate::RegisterSpec for CH1CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch1cnt::R](R) reader structure"] impl crate::Readable for CH1CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch1cnt::W](W) writer structure"] impl crate::Writable for CH1CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH1CNT to value 0"] impl crate::Resettable for CH1CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH1PADDR register accessor: an alias for `Reg`"] pub type CH1PADDR = crate::Reg; #[doc = "DMA channel 1 peripheral base address register"] pub mod ch1paddr { #[doc = "Register `CH1PADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH1PADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PADDR` reader - Peripheral base address"] pub struct PADDR_R(crate::FieldReader); impl PADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { PADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PADDR` writer - Peripheral base address"] pub struct PADDR_W<'a> { w: &'a mut W, } impl<'a> PADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&self) -> PADDR_R { PADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&mut self) -> PADDR_W { PADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 1 peripheral base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1paddr](index.html) module"] pub struct CH1PADDR_SPEC; impl crate::RegisterSpec for CH1PADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch1paddr::R](R) reader structure"] impl crate::Readable for CH1PADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch1paddr::W](W) writer structure"] impl crate::Writable for CH1PADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH1PADDR to value 0"] impl crate::Resettable for CH1PADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH1MADDR register accessor: an alias for `Reg`"] pub type CH1MADDR = crate::Reg; #[doc = "DMA channel 1 memory base address register"] pub mod ch1maddr { #[doc = "Register `CH1MADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH1MADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MADDR` reader - Memory address"] pub struct MADDR_R(crate::FieldReader); impl MADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { MADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MADDR` writer - Memory address"] pub struct MADDR_W<'a> { w: &'a mut W, } impl<'a> MADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&self) -> MADDR_R { MADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&mut self) -> MADDR_W { MADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 1 memory base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1maddr](index.html) module"] pub struct CH1MADDR_SPEC; impl crate::RegisterSpec for CH1MADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch1maddr::R](R) reader structure"] impl crate::Readable for CH1MADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch1maddr::W](W) writer structure"] impl crate::Writable for CH1MADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH1MADDR to value 0"] impl crate::Resettable for CH1MADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH2CTL register accessor: an alias for `Reg`"] pub type CH2CTL = crate::Reg; #[doc = "DMA channel configuration register (DMA_CH2CTL)"] pub mod ch2ctl { #[doc = "Register `CH2CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH2CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHEN` reader - Channel enable"] pub struct CHEN_R(crate::FieldReader); impl CHEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHEN` writer - Channel enable"] pub struct CHEN_W<'a> { w: &'a mut W, } impl<'a> CHEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `FTFIE` reader - Full Transfer Finish interrupt enable"] pub struct FTFIE_R(crate::FieldReader); impl FTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIE` writer - Full Transfer Finish interrupt enable"] pub struct FTFIE_W<'a> { w: &'a mut W, } impl<'a> FTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `HTFIE` reader - Half Transfer Finish interrupt enable"] pub struct HTFIE_R(crate::FieldReader); impl HTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIE` writer - Half Transfer Finish interrupt enable"] pub struct HTFIE_W<'a> { w: &'a mut W, } impl<'a> HTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `ERRIE` reader - Error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `DIR` reader - Transfer direction"] pub struct DIR_R(crate::FieldReader); impl DIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DIR` writer - Transfer direction"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CMEN` reader - Circular mode enable"] pub struct CMEN_R(crate::FieldReader); impl CMEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMEN` writer - Circular mode enable"] pub struct CMEN_W<'a> { w: &'a mut W, } impl<'a> CMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `PNAGA` reader - Next address generation algorithm of peripheral"] pub struct PNAGA_R(crate::FieldReader); impl PNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PNAGA` writer - Next address generation algorithm of peripheral"] pub struct PNAGA_W<'a> { w: &'a mut W, } impl<'a> PNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `MNAGA` reader - Next address generation algorithm of memory"] pub struct MNAGA_R(crate::FieldReader); impl MNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNAGA` writer - Next address generation algorithm of memory"] pub struct MNAGA_W<'a> { w: &'a mut W, } impl<'a> MNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PWIDTH` reader - Transfer data size of peripheral"] pub struct PWIDTH_R(crate::FieldReader); impl PWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PWIDTH` writer - Transfer data size of peripheral"] pub struct PWIDTH_W<'a> { w: &'a mut W, } impl<'a> PWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `MWIDTH` reader - Transfer data size of memory"] pub struct MWIDTH_R(crate::FieldReader); impl MWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MWIDTH` writer - Transfer data size of memory"] pub struct MWIDTH_W<'a> { w: &'a mut W, } impl<'a> MWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PRIO` reader - Priority Level of this channel"] pub struct PRIO_R(crate::FieldReader); impl PRIO_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PRIO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PRIO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PRIO` writer - Priority Level of this channel"] pub struct PRIO_W<'a> { w: &'a mut W, } impl<'a> PRIO_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `M2M` reader - Memory to memory mode"] pub struct M2M_R(crate::FieldReader); impl M2M_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { M2M_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for M2M_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `M2M` writer - Memory to memory mode"] pub struct M2M_W<'a> { w: &'a mut W, } impl<'a> M2M_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } impl R { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&self) -> CHEN_R { CHEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&self) -> FTFIE_R { FTFIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&self) -> HTFIE_R { HTFIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&self) -> CMEN_R { CMEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&self) -> PNAGA_R { PNAGA_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&self) -> MNAGA_R { MNAGA_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&self) -> PWIDTH_R { PWIDTH_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&self) -> MWIDTH_R { MWIDTH_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&self) -> PRIO_R { PRIO_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&self) -> M2M_R { M2M_R::new(((self.bits >> 14) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&mut self) -> CHEN_W { CHEN_W { w: self } } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&mut self) -> FTFIE_W { FTFIE_W { w: self } } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&mut self) -> HTFIE_W { HTFIE_W { w: self } } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&mut self) -> CMEN_W { CMEN_W { w: self } } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&mut self) -> PNAGA_W { PNAGA_W { w: self } } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&mut self) -> MNAGA_W { MNAGA_W { w: self } } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&mut self) -> PWIDTH_W { PWIDTH_W { w: self } } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&mut self) -> MWIDTH_W { MWIDTH_W { w: self } } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&mut self) -> PRIO_W { PRIO_W { w: self } } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&mut self) -> M2M_W { M2M_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel configuration register (DMA_CH2CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2ctl](index.html) module"] pub struct CH2CTL_SPEC; impl crate::RegisterSpec for CH2CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch2ctl::R](R) reader structure"] impl crate::Readable for CH2CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch2ctl::W](W) writer structure"] impl crate::Writable for CH2CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH2CTL to value 0"] impl crate::Resettable for CH2CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH2CNT register accessor: an alias for `Reg`"] pub type CH2CNT = crate::Reg; #[doc = "DMA channel 2 counter register"] pub mod ch2cnt { #[doc = "Register `CH2CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH2CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - Transfer counter"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - Transfer counter"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 2 counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2cnt](index.html) module"] pub struct CH2CNT_SPEC; impl crate::RegisterSpec for CH2CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch2cnt::R](R) reader structure"] impl crate::Readable for CH2CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch2cnt::W](W) writer structure"] impl crate::Writable for CH2CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH2CNT to value 0"] impl crate::Resettable for CH2CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH2PADDR register accessor: an alias for `Reg`"] pub type CH2PADDR = crate::Reg; #[doc = "DMA channel 2 peripheral base address register"] pub mod ch2paddr { #[doc = "Register `CH2PADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH2PADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PADDR` reader - Peripheral base address"] pub struct PADDR_R(crate::FieldReader); impl PADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { PADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PADDR` writer - Peripheral base address"] pub struct PADDR_W<'a> { w: &'a mut W, } impl<'a> PADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&self) -> PADDR_R { PADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&mut self) -> PADDR_W { PADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 2 peripheral base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2paddr](index.html) module"] pub struct CH2PADDR_SPEC; impl crate::RegisterSpec for CH2PADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch2paddr::R](R) reader structure"] impl crate::Readable for CH2PADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch2paddr::W](W) writer structure"] impl crate::Writable for CH2PADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH2PADDR to value 0"] impl crate::Resettable for CH2PADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH2MADDR register accessor: an alias for `Reg`"] pub type CH2MADDR = crate::Reg; #[doc = "DMA channel 2 memory base address register"] pub mod ch2maddr { #[doc = "Register `CH2MADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH2MADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MADDR` reader - Memory address"] pub struct MADDR_R(crate::FieldReader); impl MADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { MADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MADDR` writer - Memory address"] pub struct MADDR_W<'a> { w: &'a mut W, } impl<'a> MADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&self) -> MADDR_R { MADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&mut self) -> MADDR_W { MADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 2 memory base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2maddr](index.html) module"] pub struct CH2MADDR_SPEC; impl crate::RegisterSpec for CH2MADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch2maddr::R](R) reader structure"] impl crate::Readable for CH2MADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch2maddr::W](W) writer structure"] impl crate::Writable for CH2MADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH2MADDR to value 0"] impl crate::Resettable for CH2MADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH3CTL register accessor: an alias for `Reg`"] pub type CH3CTL = crate::Reg; #[doc = "DMA channel configuration register (DMA_CH3CTL)"] pub mod ch3ctl { #[doc = "Register `CH3CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH3CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHEN` reader - Channel enable"] pub struct CHEN_R(crate::FieldReader); impl CHEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHEN` writer - Channel enable"] pub struct CHEN_W<'a> { w: &'a mut W, } impl<'a> CHEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `FTFIE` reader - Full Transfer Finish interrupt enable"] pub struct FTFIE_R(crate::FieldReader); impl FTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIE` writer - Full Transfer Finish interrupt enable"] pub struct FTFIE_W<'a> { w: &'a mut W, } impl<'a> FTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `HTFIE` reader - Half Transfer Finish interrupt enable"] pub struct HTFIE_R(crate::FieldReader); impl HTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIE` writer - Half Transfer Finish interrupt enable"] pub struct HTFIE_W<'a> { w: &'a mut W, } impl<'a> HTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `ERRIE` reader - Error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `DIR` reader - Transfer direction"] pub struct DIR_R(crate::FieldReader); impl DIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DIR` writer - Transfer direction"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CMEN` reader - Circular mode enable"] pub struct CMEN_R(crate::FieldReader); impl CMEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMEN` writer - Circular mode enable"] pub struct CMEN_W<'a> { w: &'a mut W, } impl<'a> CMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `PNAGA` reader - Next address generation algorithm of peripheral"] pub struct PNAGA_R(crate::FieldReader); impl PNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PNAGA` writer - Next address generation algorithm of peripheral"] pub struct PNAGA_W<'a> { w: &'a mut W, } impl<'a> PNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `MNAGA` reader - Next address generation algorithm of memory"] pub struct MNAGA_R(crate::FieldReader); impl MNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNAGA` writer - Next address generation algorithm of memory"] pub struct MNAGA_W<'a> { w: &'a mut W, } impl<'a> MNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PWIDTH` reader - Transfer data size of peripheral"] pub struct PWIDTH_R(crate::FieldReader); impl PWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PWIDTH` writer - Transfer data size of peripheral"] pub struct PWIDTH_W<'a> { w: &'a mut W, } impl<'a> PWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `MWIDTH` reader - Transfer data size of memory"] pub struct MWIDTH_R(crate::FieldReader); impl MWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MWIDTH` writer - Transfer data size of memory"] pub struct MWIDTH_W<'a> { w: &'a mut W, } impl<'a> MWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PRIO` reader - Priority Level of this channel"] pub struct PRIO_R(crate::FieldReader); impl PRIO_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PRIO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PRIO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PRIO` writer - Priority Level of this channel"] pub struct PRIO_W<'a> { w: &'a mut W, } impl<'a> PRIO_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `M2M` reader - Memory to memory mode"] pub struct M2M_R(crate::FieldReader); impl M2M_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { M2M_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for M2M_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `M2M` writer - Memory to memory mode"] pub struct M2M_W<'a> { w: &'a mut W, } impl<'a> M2M_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } impl R { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&self) -> CHEN_R { CHEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&self) -> FTFIE_R { FTFIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&self) -> HTFIE_R { HTFIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&self) -> CMEN_R { CMEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&self) -> PNAGA_R { PNAGA_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&self) -> MNAGA_R { MNAGA_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&self) -> PWIDTH_R { PWIDTH_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&self) -> MWIDTH_R { MWIDTH_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&self) -> PRIO_R { PRIO_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&self) -> M2M_R { M2M_R::new(((self.bits >> 14) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&mut self) -> CHEN_W { CHEN_W { w: self } } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&mut self) -> FTFIE_W { FTFIE_W { w: self } } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&mut self) -> HTFIE_W { HTFIE_W { w: self } } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&mut self) -> CMEN_W { CMEN_W { w: self } } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&mut self) -> PNAGA_W { PNAGA_W { w: self } } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&mut self) -> MNAGA_W { MNAGA_W { w: self } } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&mut self) -> PWIDTH_W { PWIDTH_W { w: self } } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&mut self) -> MWIDTH_W { MWIDTH_W { w: self } } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&mut self) -> PRIO_W { PRIO_W { w: self } } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&mut self) -> M2M_W { M2M_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel configuration register (DMA_CH3CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3ctl](index.html) module"] pub struct CH3CTL_SPEC; impl crate::RegisterSpec for CH3CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch3ctl::R](R) reader structure"] impl crate::Readable for CH3CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch3ctl::W](W) writer structure"] impl crate::Writable for CH3CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH3CTL to value 0"] impl crate::Resettable for CH3CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH3CNT register accessor: an alias for `Reg`"] pub type CH3CNT = crate::Reg; #[doc = "DMA channel 3 counter register"] pub mod ch3cnt { #[doc = "Register `CH3CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH3CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - Transfer counter"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - Transfer counter"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 3 counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3cnt](index.html) module"] pub struct CH3CNT_SPEC; impl crate::RegisterSpec for CH3CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch3cnt::R](R) reader structure"] impl crate::Readable for CH3CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch3cnt::W](W) writer structure"] impl crate::Writable for CH3CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH3CNT to value 0"] impl crate::Resettable for CH3CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH3PADDR register accessor: an alias for `Reg`"] pub type CH3PADDR = crate::Reg; #[doc = "DMA channel 3 peripheral base address register"] pub mod ch3paddr { #[doc = "Register `CH3PADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH3PADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PADDR` reader - Peripheral base address"] pub struct PADDR_R(crate::FieldReader); impl PADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { PADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PADDR` writer - Peripheral base address"] pub struct PADDR_W<'a> { w: &'a mut W, } impl<'a> PADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&self) -> PADDR_R { PADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&mut self) -> PADDR_W { PADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 3 peripheral base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3paddr](index.html) module"] pub struct CH3PADDR_SPEC; impl crate::RegisterSpec for CH3PADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch3paddr::R](R) reader structure"] impl crate::Readable for CH3PADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch3paddr::W](W) writer structure"] impl crate::Writable for CH3PADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH3PADDR to value 0"] impl crate::Resettable for CH3PADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH3MADDR register accessor: an alias for `Reg`"] pub type CH3MADDR = crate::Reg; #[doc = "DMA channel 3 memory base address register"] pub mod ch3maddr { #[doc = "Register `CH3MADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH3MADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MADDR` reader - Memory address"] pub struct MADDR_R(crate::FieldReader); impl MADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { MADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MADDR` writer - Memory address"] pub struct MADDR_W<'a> { w: &'a mut W, } impl<'a> MADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&self) -> MADDR_R { MADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&mut self) -> MADDR_W { MADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 3 memory base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3maddr](index.html) module"] pub struct CH3MADDR_SPEC; impl crate::RegisterSpec for CH3MADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch3maddr::R](R) reader structure"] impl crate::Readable for CH3MADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch3maddr::W](W) writer structure"] impl crate::Writable for CH3MADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH3MADDR to value 0"] impl crate::Resettable for CH3MADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH4CTL register accessor: an alias for `Reg`"] pub type CH4CTL = crate::Reg; #[doc = "DMA channel configuration register (DMA_CH4CTL)"] pub mod ch4ctl { #[doc = "Register `CH4CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH4CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHEN` reader - Channel enable"] pub struct CHEN_R(crate::FieldReader); impl CHEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHEN` writer - Channel enable"] pub struct CHEN_W<'a> { w: &'a mut W, } impl<'a> CHEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `FTFIE` reader - Full Transfer Finish interrupt enable"] pub struct FTFIE_R(crate::FieldReader); impl FTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIE` writer - Full Transfer Finish interrupt enable"] pub struct FTFIE_W<'a> { w: &'a mut W, } impl<'a> FTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `HTFIE` reader - Half Transfer Finish interrupt enable"] pub struct HTFIE_R(crate::FieldReader); impl HTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIE` writer - Half Transfer Finish interrupt enable"] pub struct HTFIE_W<'a> { w: &'a mut W, } impl<'a> HTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `ERRIE` reader - Error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `DIR` reader - Transfer direction"] pub struct DIR_R(crate::FieldReader); impl DIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DIR` writer - Transfer direction"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CMEN` reader - Circular mode enable"] pub struct CMEN_R(crate::FieldReader); impl CMEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMEN` writer - Circular mode enable"] pub struct CMEN_W<'a> { w: &'a mut W, } impl<'a> CMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `PNAGA` reader - Next address generation algorithm of peripheral"] pub struct PNAGA_R(crate::FieldReader); impl PNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PNAGA` writer - Next address generation algorithm of peripheral"] pub struct PNAGA_W<'a> { w: &'a mut W, } impl<'a> PNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `MNAGA` reader - Next address generation algorithm of memory"] pub struct MNAGA_R(crate::FieldReader); impl MNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNAGA` writer - Next address generation algorithm of memory"] pub struct MNAGA_W<'a> { w: &'a mut W, } impl<'a> MNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PWIDTH` reader - Transfer data size of peripheral"] pub struct PWIDTH_R(crate::FieldReader); impl PWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PWIDTH` writer - Transfer data size of peripheral"] pub struct PWIDTH_W<'a> { w: &'a mut W, } impl<'a> PWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `MWIDTH` reader - Transfer data size of memory"] pub struct MWIDTH_R(crate::FieldReader); impl MWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MWIDTH` writer - Transfer data size of memory"] pub struct MWIDTH_W<'a> { w: &'a mut W, } impl<'a> MWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PRIO` reader - Priority Level of this channel"] pub struct PRIO_R(crate::FieldReader); impl PRIO_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PRIO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PRIO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PRIO` writer - Priority Level of this channel"] pub struct PRIO_W<'a> { w: &'a mut W, } impl<'a> PRIO_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `M2M` reader - Memory to memory mode"] pub struct M2M_R(crate::FieldReader); impl M2M_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { M2M_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for M2M_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `M2M` writer - Memory to memory mode"] pub struct M2M_W<'a> { w: &'a mut W, } impl<'a> M2M_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } impl R { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&self) -> CHEN_R { CHEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&self) -> FTFIE_R { FTFIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&self) -> HTFIE_R { HTFIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&self) -> CMEN_R { CMEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&self) -> PNAGA_R { PNAGA_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&self) -> MNAGA_R { MNAGA_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&self) -> PWIDTH_R { PWIDTH_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&self) -> MWIDTH_R { MWIDTH_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&self) -> PRIO_R { PRIO_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&self) -> M2M_R { M2M_R::new(((self.bits >> 14) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&mut self) -> CHEN_W { CHEN_W { w: self } } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&mut self) -> FTFIE_W { FTFIE_W { w: self } } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&mut self) -> HTFIE_W { HTFIE_W { w: self } } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&mut self) -> CMEN_W { CMEN_W { w: self } } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&mut self) -> PNAGA_W { PNAGA_W { w: self } } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&mut self) -> MNAGA_W { MNAGA_W { w: self } } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&mut self) -> PWIDTH_W { PWIDTH_W { w: self } } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&mut self) -> MWIDTH_W { MWIDTH_W { w: self } } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&mut self) -> PRIO_W { PRIO_W { w: self } } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&mut self) -> M2M_W { M2M_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel configuration register (DMA_CH4CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4ctl](index.html) module"] pub struct CH4CTL_SPEC; impl crate::RegisterSpec for CH4CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch4ctl::R](R) reader structure"] impl crate::Readable for CH4CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch4ctl::W](W) writer structure"] impl crate::Writable for CH4CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH4CTL to value 0"] impl crate::Resettable for CH4CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH4CNT register accessor: an alias for `Reg`"] pub type CH4CNT = crate::Reg; #[doc = "DMA channel 4 counter register"] pub mod ch4cnt { #[doc = "Register `CH4CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH4CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - Transfer counter"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - Transfer counter"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 4 counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4cnt](index.html) module"] pub struct CH4CNT_SPEC; impl crate::RegisterSpec for CH4CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch4cnt::R](R) reader structure"] impl crate::Readable for CH4CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch4cnt::W](W) writer structure"] impl crate::Writable for CH4CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH4CNT to value 0"] impl crate::Resettable for CH4CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH4PADDR register accessor: an alias for `Reg`"] pub type CH4PADDR = crate::Reg; #[doc = "DMA channel 4 peripheral base address register"] pub mod ch4paddr { #[doc = "Register `CH4PADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH4PADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PADDR` reader - Peripheral base address"] pub struct PADDR_R(crate::FieldReader); impl PADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { PADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PADDR` writer - Peripheral base address"] pub struct PADDR_W<'a> { w: &'a mut W, } impl<'a> PADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&self) -> PADDR_R { PADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&mut self) -> PADDR_W { PADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 4 peripheral base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4paddr](index.html) module"] pub struct CH4PADDR_SPEC; impl crate::RegisterSpec for CH4PADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch4paddr::R](R) reader structure"] impl crate::Readable for CH4PADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch4paddr::W](W) writer structure"] impl crate::Writable for CH4PADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH4PADDR to value 0"] impl crate::Resettable for CH4PADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH4MADDR register accessor: an alias for `Reg`"] pub type CH4MADDR = crate::Reg; #[doc = "DMA channel 4 memory base address register"] pub mod ch4maddr { #[doc = "Register `CH4MADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH4MADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MADDR` reader - Memory address"] pub struct MADDR_R(crate::FieldReader); impl MADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { MADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MADDR` writer - Memory address"] pub struct MADDR_W<'a> { w: &'a mut W, } impl<'a> MADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&self) -> MADDR_R { MADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&mut self) -> MADDR_W { MADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 4 memory base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch4maddr](index.html) module"] pub struct CH4MADDR_SPEC; impl crate::RegisterSpec for CH4MADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch4maddr::R](R) reader structure"] impl crate::Readable for CH4MADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch4maddr::W](W) writer structure"] impl crate::Writable for CH4MADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH4MADDR to value 0"] impl crate::Resettable for CH4MADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH5CTL register accessor: an alias for `Reg`"] pub type CH5CTL = crate::Reg; #[doc = "DMA channel configuration register (DMA_CH5CTL)"] pub mod ch5ctl { #[doc = "Register `CH5CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH5CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHEN` reader - Channel enable"] pub struct CHEN_R(crate::FieldReader); impl CHEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHEN` writer - Channel enable"] pub struct CHEN_W<'a> { w: &'a mut W, } impl<'a> CHEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `FTFIE` reader - Full Transfer Finish interrupt enable"] pub struct FTFIE_R(crate::FieldReader); impl FTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIE` writer - Full Transfer Finish interrupt enable"] pub struct FTFIE_W<'a> { w: &'a mut W, } impl<'a> FTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `HTFIE` reader - Half Transfer Finish interrupt enable"] pub struct HTFIE_R(crate::FieldReader); impl HTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIE` writer - Half Transfer Finish interrupt enable"] pub struct HTFIE_W<'a> { w: &'a mut W, } impl<'a> HTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `ERRIE` reader - Error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `DIR` reader - Transfer direction"] pub struct DIR_R(crate::FieldReader); impl DIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DIR` writer - Transfer direction"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CMEN` reader - Circular mode enable"] pub struct CMEN_R(crate::FieldReader); impl CMEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMEN` writer - Circular mode enable"] pub struct CMEN_W<'a> { w: &'a mut W, } impl<'a> CMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `PNAGA` reader - Next address generation algorithm of peripheral"] pub struct PNAGA_R(crate::FieldReader); impl PNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PNAGA` writer - Next address generation algorithm of peripheral"] pub struct PNAGA_W<'a> { w: &'a mut W, } impl<'a> PNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `MNAGA` reader - Next address generation algorithm of memory"] pub struct MNAGA_R(crate::FieldReader); impl MNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNAGA` writer - Next address generation algorithm of memory"] pub struct MNAGA_W<'a> { w: &'a mut W, } impl<'a> MNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PWIDTH` reader - Transfer data size of peripheral"] pub struct PWIDTH_R(crate::FieldReader); impl PWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PWIDTH` writer - Transfer data size of peripheral"] pub struct PWIDTH_W<'a> { w: &'a mut W, } impl<'a> PWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `MWIDTH` reader - Transfer data size of memory"] pub struct MWIDTH_R(crate::FieldReader); impl MWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MWIDTH` writer - Transfer data size of memory"] pub struct MWIDTH_W<'a> { w: &'a mut W, } impl<'a> MWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PRIO` reader - Priority Level of this channel"] pub struct PRIO_R(crate::FieldReader); impl PRIO_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PRIO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PRIO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PRIO` writer - Priority Level of this channel"] pub struct PRIO_W<'a> { w: &'a mut W, } impl<'a> PRIO_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `M2M` reader - Memory to memory mode"] pub struct M2M_R(crate::FieldReader); impl M2M_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { M2M_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for M2M_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `M2M` writer - Memory to memory mode"] pub struct M2M_W<'a> { w: &'a mut W, } impl<'a> M2M_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } impl R { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&self) -> CHEN_R { CHEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&self) -> FTFIE_R { FTFIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&self) -> HTFIE_R { HTFIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&self) -> CMEN_R { CMEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&self) -> PNAGA_R { PNAGA_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&self) -> MNAGA_R { MNAGA_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&self) -> PWIDTH_R { PWIDTH_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&self) -> MWIDTH_R { MWIDTH_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&self) -> PRIO_R { PRIO_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&self) -> M2M_R { M2M_R::new(((self.bits >> 14) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&mut self) -> CHEN_W { CHEN_W { w: self } } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&mut self) -> FTFIE_W { FTFIE_W { w: self } } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&mut self) -> HTFIE_W { HTFIE_W { w: self } } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&mut self) -> CMEN_W { CMEN_W { w: self } } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&mut self) -> PNAGA_W { PNAGA_W { w: self } } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&mut self) -> MNAGA_W { MNAGA_W { w: self } } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&mut self) -> PWIDTH_W { PWIDTH_W { w: self } } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&mut self) -> MWIDTH_W { MWIDTH_W { w: self } } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&mut self) -> PRIO_W { PRIO_W { w: self } } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&mut self) -> M2M_W { M2M_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel configuration register (DMA_CH5CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5ctl](index.html) module"] pub struct CH5CTL_SPEC; impl crate::RegisterSpec for CH5CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch5ctl::R](R) reader structure"] impl crate::Readable for CH5CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch5ctl::W](W) writer structure"] impl crate::Writable for CH5CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH5CTL to value 0"] impl crate::Resettable for CH5CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH5CNT register accessor: an alias for `Reg`"] pub type CH5CNT = crate::Reg; #[doc = "DMA channel 5 counter register"] pub mod ch5cnt { #[doc = "Register `CH5CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH5CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - Transfer counter"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - Transfer counter"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 5 counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5cnt](index.html) module"] pub struct CH5CNT_SPEC; impl crate::RegisterSpec for CH5CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch5cnt::R](R) reader structure"] impl crate::Readable for CH5CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch5cnt::W](W) writer structure"] impl crate::Writable for CH5CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH5CNT to value 0"] impl crate::Resettable for CH5CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH5PADDR register accessor: an alias for `Reg`"] pub type CH5PADDR = crate::Reg; #[doc = "DMA channel 5 peripheral base address register"] pub mod ch5paddr { #[doc = "Register `CH5PADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH5PADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PADDR` reader - Peripheral base address"] pub struct PADDR_R(crate::FieldReader); impl PADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { PADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PADDR` writer - Peripheral base address"] pub struct PADDR_W<'a> { w: &'a mut W, } impl<'a> PADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&self) -> PADDR_R { PADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&mut self) -> PADDR_W { PADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 5 peripheral base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5paddr](index.html) module"] pub struct CH5PADDR_SPEC; impl crate::RegisterSpec for CH5PADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch5paddr::R](R) reader structure"] impl crate::Readable for CH5PADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch5paddr::W](W) writer structure"] impl crate::Writable for CH5PADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH5PADDR to value 0"] impl crate::Resettable for CH5PADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH5MADDR register accessor: an alias for `Reg`"] pub type CH5MADDR = crate::Reg; #[doc = "DMA channel 5 memory base address register"] pub mod ch5maddr { #[doc = "Register `CH5MADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH5MADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MADDR` reader - Memory address"] pub struct MADDR_R(crate::FieldReader); impl MADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { MADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MADDR` writer - Memory address"] pub struct MADDR_W<'a> { w: &'a mut W, } impl<'a> MADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&self) -> MADDR_R { MADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&mut self) -> MADDR_W { MADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 5 memory base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch5maddr](index.html) module"] pub struct CH5MADDR_SPEC; impl crate::RegisterSpec for CH5MADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch5maddr::R](R) reader structure"] impl crate::Readable for CH5MADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch5maddr::W](W) writer structure"] impl crate::Writable for CH5MADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH5MADDR to value 0"] impl crate::Resettable for CH5MADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH6CTL register accessor: an alias for `Reg`"] pub type CH6CTL = crate::Reg; #[doc = "DMA channel configuration register (DMA_CH6CTL)"] pub mod ch6ctl { #[doc = "Register `CH6CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH6CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHEN` reader - Channel enable"] pub struct CHEN_R(crate::FieldReader); impl CHEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHEN` writer - Channel enable"] pub struct CHEN_W<'a> { w: &'a mut W, } impl<'a> CHEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `FTFIE` reader - Full Transfer Finish interrupt enable"] pub struct FTFIE_R(crate::FieldReader); impl FTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTFIE` writer - Full Transfer Finish interrupt enable"] pub struct FTFIE_W<'a> { w: &'a mut W, } impl<'a> FTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `HTFIE` reader - Half Transfer Finish interrupt enable"] pub struct HTFIE_R(crate::FieldReader); impl HTFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HTFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HTFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HTFIE` writer - Half Transfer Finish interrupt enable"] pub struct HTFIE_W<'a> { w: &'a mut W, } impl<'a> HTFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `ERRIE` reader - Error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `DIR` reader - Transfer direction"] pub struct DIR_R(crate::FieldReader); impl DIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DIR` writer - Transfer direction"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CMEN` reader - Circular mode enable"] pub struct CMEN_R(crate::FieldReader); impl CMEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMEN` writer - Circular mode enable"] pub struct CMEN_W<'a> { w: &'a mut W, } impl<'a> CMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `PNAGA` reader - Next address generation algorithm of peripheral"] pub struct PNAGA_R(crate::FieldReader); impl PNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PNAGA` writer - Next address generation algorithm of peripheral"] pub struct PNAGA_W<'a> { w: &'a mut W, } impl<'a> PNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `MNAGA` reader - Next address generation algorithm of memory"] pub struct MNAGA_R(crate::FieldReader); impl MNAGA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MNAGA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNAGA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNAGA` writer - Next address generation algorithm of memory"] pub struct MNAGA_W<'a> { w: &'a mut W, } impl<'a> MNAGA_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PWIDTH` reader - Transfer data size of peripheral"] pub struct PWIDTH_R(crate::FieldReader); impl PWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PWIDTH` writer - Transfer data size of peripheral"] pub struct PWIDTH_W<'a> { w: &'a mut W, } impl<'a> PWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `MWIDTH` reader - Transfer data size of memory"] pub struct MWIDTH_R(crate::FieldReader); impl MWIDTH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MWIDTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MWIDTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MWIDTH` writer - Transfer data size of memory"] pub struct MWIDTH_W<'a> { w: &'a mut W, } impl<'a> MWIDTH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PRIO` reader - Priority Level of this channel"] pub struct PRIO_R(crate::FieldReader); impl PRIO_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PRIO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PRIO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PRIO` writer - Priority Level of this channel"] pub struct PRIO_W<'a> { w: &'a mut W, } impl<'a> PRIO_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `M2M` reader - Memory to memory mode"] pub struct M2M_R(crate::FieldReader); impl M2M_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { M2M_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for M2M_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `M2M` writer - Memory to memory mode"] pub struct M2M_W<'a> { w: &'a mut W, } impl<'a> M2M_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } impl R { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&self) -> CHEN_R { CHEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&self) -> FTFIE_R { FTFIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&self) -> HTFIE_R { HTFIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&self) -> CMEN_R { CMEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&self) -> PNAGA_R { PNAGA_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&self) -> MNAGA_R { MNAGA_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&self) -> PWIDTH_R { PWIDTH_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&self) -> MWIDTH_R { MWIDTH_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&self) -> PRIO_R { PRIO_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&self) -> M2M_R { M2M_R::new(((self.bits >> 14) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Channel enable"] #[inline(always)] pub fn chen(&mut self) -> CHEN_W { CHEN_W { w: self } } #[doc = "Bit 1 - Full Transfer Finish interrupt enable"] #[inline(always)] pub fn ftfie(&mut self) -> FTFIE_W { FTFIE_W { w: self } } #[doc = "Bit 2 - Half Transfer Finish interrupt enable"] #[inline(always)] pub fn htfie(&mut self) -> HTFIE_W { HTFIE_W { w: self } } #[doc = "Bit 3 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 4 - Transfer direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 5 - Circular mode enable"] #[inline(always)] pub fn cmen(&mut self) -> CMEN_W { CMEN_W { w: self } } #[doc = "Bit 6 - Next address generation algorithm of peripheral"] #[inline(always)] pub fn pnaga(&mut self) -> PNAGA_W { PNAGA_W { w: self } } #[doc = "Bit 7 - Next address generation algorithm of memory"] #[inline(always)] pub fn mnaga(&mut self) -> MNAGA_W { MNAGA_W { w: self } } #[doc = "Bits 8:9 - Transfer data size of peripheral"] #[inline(always)] pub fn pwidth(&mut self) -> PWIDTH_W { PWIDTH_W { w: self } } #[doc = "Bits 10:11 - Transfer data size of memory"] #[inline(always)] pub fn mwidth(&mut self) -> MWIDTH_W { MWIDTH_W { w: self } } #[doc = "Bits 12:13 - Priority Level of this channel"] #[inline(always)] pub fn prio(&mut self) -> PRIO_W { PRIO_W { w: self } } #[doc = "Bit 14 - Memory to memory mode"] #[inline(always)] pub fn m2m(&mut self) -> M2M_W { M2M_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel configuration register (DMA_CH6CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6ctl](index.html) module"] pub struct CH6CTL_SPEC; impl crate::RegisterSpec for CH6CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch6ctl::R](R) reader structure"] impl crate::Readable for CH6CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch6ctl::W](W) writer structure"] impl crate::Writable for CH6CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH6CTL to value 0"] impl crate::Resettable for CH6CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH6CNT register accessor: an alias for `Reg`"] pub type CH6CNT = crate::Reg; #[doc = "DMA channel 6 counter register"] pub mod ch6cnt { #[doc = "Register `CH6CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH6CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - Transfer counter"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - Transfer counter"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Transfer counter"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 6 counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6cnt](index.html) module"] pub struct CH6CNT_SPEC; impl crate::RegisterSpec for CH6CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch6cnt::R](R) reader structure"] impl crate::Readable for CH6CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch6cnt::W](W) writer structure"] impl crate::Writable for CH6CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH6CNT to value 0"] impl crate::Resettable for CH6CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH6PADDR register accessor: an alias for `Reg`"] pub type CH6PADDR = crate::Reg; #[doc = "DMA channel 6 peripheral base address register"] pub mod ch6paddr { #[doc = "Register `CH6PADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH6PADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PADDR` reader - Peripheral base address"] pub struct PADDR_R(crate::FieldReader); impl PADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { PADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PADDR` writer - Peripheral base address"] pub struct PADDR_W<'a> { w: &'a mut W, } impl<'a> PADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&self) -> PADDR_R { PADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Peripheral base address"] #[inline(always)] pub fn paddr(&mut self) -> PADDR_W { PADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 6 peripheral base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6paddr](index.html) module"] pub struct CH6PADDR_SPEC; impl crate::RegisterSpec for CH6PADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch6paddr::R](R) reader structure"] impl crate::Readable for CH6PADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch6paddr::W](W) writer structure"] impl crate::Writable for CH6PADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH6PADDR to value 0"] impl crate::Resettable for CH6PADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH6MADDR register accessor: an alias for `Reg`"] pub type CH6MADDR = crate::Reg; #[doc = "DMA channel 6 memory base address register"] pub mod ch6maddr { #[doc = "Register `CH6MADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH6MADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MADDR` reader - Memory address"] pub struct MADDR_R(crate::FieldReader); impl MADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { MADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MADDR` writer - Memory address"] pub struct MADDR_W<'a> { w: &'a mut W, } impl<'a> MADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&self) -> MADDR_R { MADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Memory address"] #[inline(always)] pub fn maddr(&mut self) -> MADDR_W { MADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA channel 6 memory base address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch6maddr](index.html) module"] pub struct CH6MADDR_SPEC; impl crate::RegisterSpec for CH6MADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch6maddr::R](R) reader structure"] impl crate::Readable for CH6MADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch6maddr::W](W) writer structure"] impl crate::Writable for CH6MADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH6MADDR to value 0"] impl crate::Resettable for CH6MADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "External interrupt/event controller"] pub struct EXTI { _marker: PhantomData<*const ()>, } unsafe impl Send for EXTI {} impl EXTI { #[doc = r"Pointer to the register block"] pub const PTR: *const exti::RegisterBlock = 0x4001_0400 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const exti::RegisterBlock { Self::PTR } } impl Deref for EXTI { type Target = exti::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for EXTI { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("EXTI").finish() } } #[doc = "External interrupt/event controller"] pub mod exti { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Interrupt enable register (EXTI_INTEN)"] pub inten: crate::Reg, #[doc = "0x04 - Event enable register (EXTI_EVEN)"] pub even: crate::Reg, #[doc = "0x08 - Rising Edge Trigger Enable register (EXTI_RTEN)"] pub rten: crate::Reg, #[doc = "0x0c - Falling Egde Trigger Enable register (EXTI_FTEN)"] pub ften: crate::Reg, #[doc = "0x10 - Software interrupt event register (EXTI_SWIEV)"] pub swiev: crate::Reg, #[doc = "0x14 - Pending register (EXTI_PD)"] pub pd: crate::Reg, } #[doc = "INTEN register accessor: an alias for `Reg`"] pub type INTEN = crate::Reg; #[doc = "Interrupt enable register (EXTI_INTEN)"] pub mod inten { #[doc = "Register `INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `INTEN0` reader - Enable Interrupt on line 0"] pub struct INTEN0_R(crate::FieldReader); impl INTEN0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN0` writer - Enable Interrupt on line 0"] pub struct INTEN0_W<'a> { w: &'a mut W, } impl<'a> INTEN0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `INTEN1` reader - Enable Interrupt on line 1"] pub struct INTEN1_R(crate::FieldReader); impl INTEN1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN1` writer - Enable Interrupt on line 1"] pub struct INTEN1_W<'a> { w: &'a mut W, } impl<'a> INTEN1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `INTEN2` reader - Enable Interrupt on line 2"] pub struct INTEN2_R(crate::FieldReader); impl INTEN2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN2` writer - Enable Interrupt on line 2"] pub struct INTEN2_W<'a> { w: &'a mut W, } impl<'a> INTEN2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `INTEN3` reader - Enable Interrupt on line 3"] pub struct INTEN3_R(crate::FieldReader); impl INTEN3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN3` writer - Enable Interrupt on line 3"] pub struct INTEN3_W<'a> { w: &'a mut W, } impl<'a> INTEN3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `INTEN4` reader - Enable Interrupt on line 4"] pub struct INTEN4_R(crate::FieldReader); impl INTEN4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN4` writer - Enable Interrupt on line 4"] pub struct INTEN4_W<'a> { w: &'a mut W, } impl<'a> INTEN4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `INTEN5` reader - Enable Interrupt on line 5"] pub struct INTEN5_R(crate::FieldReader); impl INTEN5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN5` writer - Enable Interrupt on line 5"] pub struct INTEN5_W<'a> { w: &'a mut W, } impl<'a> INTEN5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `INTEN6` reader - Enable Interrupt on line 6"] pub struct INTEN6_R(crate::FieldReader); impl INTEN6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN6` writer - Enable Interrupt on line 6"] pub struct INTEN6_W<'a> { w: &'a mut W, } impl<'a> INTEN6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `INTEN7` reader - Enable Interrupt on line 7"] pub struct INTEN7_R(crate::FieldReader); impl INTEN7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN7` writer - Enable Interrupt on line 7"] pub struct INTEN7_W<'a> { w: &'a mut W, } impl<'a> INTEN7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `INTEN8` reader - Enable Interrupt on line 8"] pub struct INTEN8_R(crate::FieldReader); impl INTEN8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN8` writer - Enable Interrupt on line 8"] pub struct INTEN8_W<'a> { w: &'a mut W, } impl<'a> INTEN8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `INTEN9` reader - Enable Interrupt on line 9"] pub struct INTEN9_R(crate::FieldReader); impl INTEN9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN9` writer - Enable Interrupt on line 9"] pub struct INTEN9_W<'a> { w: &'a mut W, } impl<'a> INTEN9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `INTEN10` reader - Enable Interrupt on line 10"] pub struct INTEN10_R(crate::FieldReader); impl INTEN10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN10` writer - Enable Interrupt on line 10"] pub struct INTEN10_W<'a> { w: &'a mut W, } impl<'a> INTEN10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `INTEN11` reader - Enable Interrupt on line 11"] pub struct INTEN11_R(crate::FieldReader); impl INTEN11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN11` writer - Enable Interrupt on line 11"] pub struct INTEN11_W<'a> { w: &'a mut W, } impl<'a> INTEN11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `INTEN12` reader - Enable Interrupt on line 12"] pub struct INTEN12_R(crate::FieldReader); impl INTEN12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN12` writer - Enable Interrupt on line 12"] pub struct INTEN12_W<'a> { w: &'a mut W, } impl<'a> INTEN12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `INTEN13` reader - Enable Interrupt on line 13"] pub struct INTEN13_R(crate::FieldReader); impl INTEN13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN13` writer - Enable Interrupt on line 13"] pub struct INTEN13_W<'a> { w: &'a mut W, } impl<'a> INTEN13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `INTEN14` reader - Enable Interrupt on line 14"] pub struct INTEN14_R(crate::FieldReader); impl INTEN14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN14` writer - Enable Interrupt on line 14"] pub struct INTEN14_W<'a> { w: &'a mut W, } impl<'a> INTEN14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `INTEN15` reader - Enable Interrupt on line 15"] pub struct INTEN15_R(crate::FieldReader); impl INTEN15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN15` writer - Enable Interrupt on line 15"] pub struct INTEN15_W<'a> { w: &'a mut W, } impl<'a> INTEN15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `INTEN16` reader - Enable Interrupt on line 16"] pub struct INTEN16_R(crate::FieldReader); impl INTEN16_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN16_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN16_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN16` writer - Enable Interrupt on line 16"] pub struct INTEN16_W<'a> { w: &'a mut W, } impl<'a> INTEN16_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `INTEN17` reader - Enable Interrupt on line 17"] pub struct INTEN17_R(crate::FieldReader); impl INTEN17_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN17_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN17_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN17` writer - Enable Interrupt on line 17"] pub struct INTEN17_W<'a> { w: &'a mut W, } impl<'a> INTEN17_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `INTEN18` reader - Enable Interrupt on line 18"] pub struct INTEN18_R(crate::FieldReader); impl INTEN18_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN18_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN18_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN18` writer - Enable Interrupt on line 18"] pub struct INTEN18_W<'a> { w: &'a mut W, } impl<'a> INTEN18_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `INTEN19` reader - Enable Interrupt on line 19"] pub struct INTEN19_R(crate::FieldReader); impl INTEN19_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN19_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN19_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN19` writer - Enable Interrupt on line 19"] pub struct INTEN19_W<'a> { w: &'a mut W, } impl<'a> INTEN19_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `INTEN20` reader - Enable Interrupt on line 20"] pub struct INTEN20_R(crate::FieldReader); impl INTEN20_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN20_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN20_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN20` writer - Enable Interrupt on line 20"] pub struct INTEN20_W<'a> { w: &'a mut W, } impl<'a> INTEN20_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `INTEN21` reader - Enable Interrupt on line 21"] pub struct INTEN21_R(crate::FieldReader); impl INTEN21_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN21_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN21_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN21` writer - Enable Interrupt on line 21"] pub struct INTEN21_W<'a> { w: &'a mut W, } impl<'a> INTEN21_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `INTEN22` reader - Enable Interrupt on line 22"] pub struct INTEN22_R(crate::FieldReader); impl INTEN22_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN22_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN22_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN22` writer - Enable Interrupt on line 22"] pub struct INTEN22_W<'a> { w: &'a mut W, } impl<'a> INTEN22_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `INTEN23` reader - Enable Interrupt on line 23"] pub struct INTEN23_R(crate::FieldReader); impl INTEN23_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN23_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN23_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN23` writer - Enable Interrupt on line 23"] pub struct INTEN23_W<'a> { w: &'a mut W, } impl<'a> INTEN23_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `INTEN24` reader - Enable Interrupt on line 24"] pub struct INTEN24_R(crate::FieldReader); impl INTEN24_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN24_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN24_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN24` writer - Enable Interrupt on line 24"] pub struct INTEN24_W<'a> { w: &'a mut W, } impl<'a> INTEN24_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `INTEN25` reader - Enable Interrupt on line 25"] pub struct INTEN25_R(crate::FieldReader); impl INTEN25_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN25_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN25_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN25` writer - Enable Interrupt on line 25"] pub struct INTEN25_W<'a> { w: &'a mut W, } impl<'a> INTEN25_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); self.w } } #[doc = "Field `INTEN26` reader - Enable Interrupt on line 26"] pub struct INTEN26_R(crate::FieldReader); impl INTEN26_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN26_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN26_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN26` writer - Enable Interrupt on line 26"] pub struct INTEN26_W<'a> { w: &'a mut W, } impl<'a> INTEN26_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `INTEN27` reader - Enable Interrupt on line 27"] pub struct INTEN27_R(crate::FieldReader); impl INTEN27_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INTEN27_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INTEN27_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INTEN27` writer - Enable Interrupt on line 27"] pub struct INTEN27_W<'a> { w: &'a mut W, } impl<'a> INTEN27_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } impl R { #[doc = "Bit 0 - Enable Interrupt on line 0"] #[inline(always)] pub fn inten0(&self) -> INTEN0_R { INTEN0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Enable Interrupt on line 1"] #[inline(always)] pub fn inten1(&self) -> INTEN1_R { INTEN1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Enable Interrupt on line 2"] #[inline(always)] pub fn inten2(&self) -> INTEN2_R { INTEN2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Enable Interrupt on line 3"] #[inline(always)] pub fn inten3(&self) -> INTEN3_R { INTEN3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Enable Interrupt on line 4"] #[inline(always)] pub fn inten4(&self) -> INTEN4_R { INTEN4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Enable Interrupt on line 5"] #[inline(always)] pub fn inten5(&self) -> INTEN5_R { INTEN5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Enable Interrupt on line 6"] #[inline(always)] pub fn inten6(&self) -> INTEN6_R { INTEN6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Enable Interrupt on line 7"] #[inline(always)] pub fn inten7(&self) -> INTEN7_R { INTEN7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Enable Interrupt on line 8"] #[inline(always)] pub fn inten8(&self) -> INTEN8_R { INTEN8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Enable Interrupt on line 9"] #[inline(always)] pub fn inten9(&self) -> INTEN9_R { INTEN9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Enable Interrupt on line 10"] #[inline(always)] pub fn inten10(&self) -> INTEN10_R { INTEN10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Enable Interrupt on line 11"] #[inline(always)] pub fn inten11(&self) -> INTEN11_R { INTEN11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Enable Interrupt on line 12"] #[inline(always)] pub fn inten12(&self) -> INTEN12_R { INTEN12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Enable Interrupt on line 13"] #[inline(always)] pub fn inten13(&self) -> INTEN13_R { INTEN13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Enable Interrupt on line 14"] #[inline(always)] pub fn inten14(&self) -> INTEN14_R { INTEN14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Enable Interrupt on line 15"] #[inline(always)] pub fn inten15(&self) -> INTEN15_R { INTEN15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - Enable Interrupt on line 16"] #[inline(always)] pub fn inten16(&self) -> INTEN16_R { INTEN16_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Enable Interrupt on line 17"] #[inline(always)] pub fn inten17(&self) -> INTEN17_R { INTEN17_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Enable Interrupt on line 18"] #[inline(always)] pub fn inten18(&self) -> INTEN18_R { INTEN18_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - Enable Interrupt on line 19"] #[inline(always)] pub fn inten19(&self) -> INTEN19_R { INTEN19_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - Enable Interrupt on line 20"] #[inline(always)] pub fn inten20(&self) -> INTEN20_R { INTEN20_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21 - Enable Interrupt on line 21"] #[inline(always)] pub fn inten21(&self) -> INTEN21_R { INTEN21_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22 - Enable Interrupt on line 22"] #[inline(always)] pub fn inten22(&self) -> INTEN22_R { INTEN22_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23 - Enable Interrupt on line 23"] #[inline(always)] pub fn inten23(&self) -> INTEN23_R { INTEN23_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 24 - Enable Interrupt on line 24"] #[inline(always)] pub fn inten24(&self) -> INTEN24_R { INTEN24_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25 - Enable Interrupt on line 25"] #[inline(always)] pub fn inten25(&self) -> INTEN25_R { INTEN25_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26 - Enable Interrupt on line 26"] #[inline(always)] pub fn inten26(&self) -> INTEN26_R { INTEN26_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27 - Enable Interrupt on line 27"] #[inline(always)] pub fn inten27(&self) -> INTEN27_R { INTEN27_R::new(((self.bits >> 27) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Enable Interrupt on line 0"] #[inline(always)] pub fn inten0(&mut self) -> INTEN0_W { INTEN0_W { w: self } } #[doc = "Bit 1 - Enable Interrupt on line 1"] #[inline(always)] pub fn inten1(&mut self) -> INTEN1_W { INTEN1_W { w: self } } #[doc = "Bit 2 - Enable Interrupt on line 2"] #[inline(always)] pub fn inten2(&mut self) -> INTEN2_W { INTEN2_W { w: self } } #[doc = "Bit 3 - Enable Interrupt on line 3"] #[inline(always)] pub fn inten3(&mut self) -> INTEN3_W { INTEN3_W { w: self } } #[doc = "Bit 4 - Enable Interrupt on line 4"] #[inline(always)] pub fn inten4(&mut self) -> INTEN4_W { INTEN4_W { w: self } } #[doc = "Bit 5 - Enable Interrupt on line 5"] #[inline(always)] pub fn inten5(&mut self) -> INTEN5_W { INTEN5_W { w: self } } #[doc = "Bit 6 - Enable Interrupt on line 6"] #[inline(always)] pub fn inten6(&mut self) -> INTEN6_W { INTEN6_W { w: self } } #[doc = "Bit 7 - Enable Interrupt on line 7"] #[inline(always)] pub fn inten7(&mut self) -> INTEN7_W { INTEN7_W { w: self } } #[doc = "Bit 8 - Enable Interrupt on line 8"] #[inline(always)] pub fn inten8(&mut self) -> INTEN8_W { INTEN8_W { w: self } } #[doc = "Bit 9 - Enable Interrupt on line 9"] #[inline(always)] pub fn inten9(&mut self) -> INTEN9_W { INTEN9_W { w: self } } #[doc = "Bit 10 - Enable Interrupt on line 10"] #[inline(always)] pub fn inten10(&mut self) -> INTEN10_W { INTEN10_W { w: self } } #[doc = "Bit 11 - Enable Interrupt on line 11"] #[inline(always)] pub fn inten11(&mut self) -> INTEN11_W { INTEN11_W { w: self } } #[doc = "Bit 12 - Enable Interrupt on line 12"] #[inline(always)] pub fn inten12(&mut self) -> INTEN12_W { INTEN12_W { w: self } } #[doc = "Bit 13 - Enable Interrupt on line 13"] #[inline(always)] pub fn inten13(&mut self) -> INTEN13_W { INTEN13_W { w: self } } #[doc = "Bit 14 - Enable Interrupt on line 14"] #[inline(always)] pub fn inten14(&mut self) -> INTEN14_W { INTEN14_W { w: self } } #[doc = "Bit 15 - Enable Interrupt on line 15"] #[inline(always)] pub fn inten15(&mut self) -> INTEN15_W { INTEN15_W { w: self } } #[doc = "Bit 16 - Enable Interrupt on line 16"] #[inline(always)] pub fn inten16(&mut self) -> INTEN16_W { INTEN16_W { w: self } } #[doc = "Bit 17 - Enable Interrupt on line 17"] #[inline(always)] pub fn inten17(&mut self) -> INTEN17_W { INTEN17_W { w: self } } #[doc = "Bit 18 - Enable Interrupt on line 18"] #[inline(always)] pub fn inten18(&mut self) -> INTEN18_W { INTEN18_W { w: self } } #[doc = "Bit 19 - Enable Interrupt on line 19"] #[inline(always)] pub fn inten19(&mut self) -> INTEN19_W { INTEN19_W { w: self } } #[doc = "Bit 20 - Enable Interrupt on line 20"] #[inline(always)] pub fn inten20(&mut self) -> INTEN20_W { INTEN20_W { w: self } } #[doc = "Bit 21 - Enable Interrupt on line 21"] #[inline(always)] pub fn inten21(&mut self) -> INTEN21_W { INTEN21_W { w: self } } #[doc = "Bit 22 - Enable Interrupt on line 22"] #[inline(always)] pub fn inten22(&mut self) -> INTEN22_W { INTEN22_W { w: self } } #[doc = "Bit 23 - Enable Interrupt on line 23"] #[inline(always)] pub fn inten23(&mut self) -> INTEN23_W { INTEN23_W { w: self } } #[doc = "Bit 24 - Enable Interrupt on line 24"] #[inline(always)] pub fn inten24(&mut self) -> INTEN24_W { INTEN24_W { w: self } } #[doc = "Bit 25 - Enable Interrupt on line 25"] #[inline(always)] pub fn inten25(&mut self) -> INTEN25_W { INTEN25_W { w: self } } #[doc = "Bit 26 - Enable Interrupt on line 26"] #[inline(always)] pub fn inten26(&mut self) -> INTEN26_W { INTEN26_W { w: self } } #[doc = "Bit 27 - Enable Interrupt on line 27"] #[inline(always)] pub fn inten27(&mut self) -> INTEN27_W { INTEN27_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Interrupt enable register (EXTI_INTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"] pub struct INTEN_SPEC; impl crate::RegisterSpec for INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [inten::R](R) reader structure"] impl crate::Readable for INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"] impl crate::Writable for INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTEN to value 0x0f94_0000"] impl crate::Resettable for INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0f94_0000 } } } #[doc = "EVEN register accessor: an alias for `Reg`"] pub type EVEN = crate::Reg; #[doc = "Event enable register (EXTI_EVEN)"] pub mod even { #[doc = "Register `EVEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `EVEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EVEN0` reader - Enable Event on line 0"] pub struct EVEN0_R(crate::FieldReader); impl EVEN0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN0` writer - Enable Event on line 0"] pub struct EVEN0_W<'a> { w: &'a mut W, } impl<'a> EVEN0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `EVEN1` reader - Enable Event on line 1"] pub struct EVEN1_R(crate::FieldReader); impl EVEN1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN1` writer - Enable Event on line 1"] pub struct EVEN1_W<'a> { w: &'a mut W, } impl<'a> EVEN1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `EVEN2` reader - Enable Event on line 2"] pub struct EVEN2_R(crate::FieldReader); impl EVEN2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN2` writer - Enable Event on line 2"] pub struct EVEN2_W<'a> { w: &'a mut W, } impl<'a> EVEN2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `EVEN3` reader - Enable Event on line 3"] pub struct EVEN3_R(crate::FieldReader); impl EVEN3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN3` writer - Enable Event on line 3"] pub struct EVEN3_W<'a> { w: &'a mut W, } impl<'a> EVEN3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EVEN4` reader - Enable Event on line 4"] pub struct EVEN4_R(crate::FieldReader); impl EVEN4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN4` writer - Enable Event on line 4"] pub struct EVEN4_W<'a> { w: &'a mut W, } impl<'a> EVEN4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `EVEN5` reader - Enable Event on line 5"] pub struct EVEN5_R(crate::FieldReader); impl EVEN5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN5` writer - Enable Event on line 5"] pub struct EVEN5_W<'a> { w: &'a mut W, } impl<'a> EVEN5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `EVEN6` reader - Enable Event on line 6"] pub struct EVEN6_R(crate::FieldReader); impl EVEN6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN6` writer - Enable Event on line 6"] pub struct EVEN6_W<'a> { w: &'a mut W, } impl<'a> EVEN6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `EVEN7` reader - Enable Event on line 7"] pub struct EVEN7_R(crate::FieldReader); impl EVEN7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN7` writer - Enable Event on line 7"] pub struct EVEN7_W<'a> { w: &'a mut W, } impl<'a> EVEN7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `EVEN8` reader - Enable Event on line 8"] pub struct EVEN8_R(crate::FieldReader); impl EVEN8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN8` writer - Enable Event on line 8"] pub struct EVEN8_W<'a> { w: &'a mut W, } impl<'a> EVEN8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `EVEN9` reader - Enable Event on line 9"] pub struct EVEN9_R(crate::FieldReader); impl EVEN9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN9` writer - Enable Event on line 9"] pub struct EVEN9_W<'a> { w: &'a mut W, } impl<'a> EVEN9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `EVEN10` reader - Enable Event on line 10"] pub struct EVEN10_R(crate::FieldReader); impl EVEN10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN10` writer - Enable Event on line 10"] pub struct EVEN10_W<'a> { w: &'a mut W, } impl<'a> EVEN10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `EVEN11` reader - Enable Event on line 11"] pub struct EVEN11_R(crate::FieldReader); impl EVEN11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN11` writer - Enable Event on line 11"] pub struct EVEN11_W<'a> { w: &'a mut W, } impl<'a> EVEN11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `EVEN12` reader - Enable Event on line 12"] pub struct EVEN12_R(crate::FieldReader); impl EVEN12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN12` writer - Enable Event on line 12"] pub struct EVEN12_W<'a> { w: &'a mut W, } impl<'a> EVEN12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `EVEN13` reader - Enable Event on line 13"] pub struct EVEN13_R(crate::FieldReader); impl EVEN13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN13` writer - Enable Event on line 13"] pub struct EVEN13_W<'a> { w: &'a mut W, } impl<'a> EVEN13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `EVEN14` reader - Enable Event on line 14"] pub struct EVEN14_R(crate::FieldReader); impl EVEN14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN14` writer - Enable Event on line 14"] pub struct EVEN14_W<'a> { w: &'a mut W, } impl<'a> EVEN14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `EVEN15` reader - Enable Event on line 15"] pub struct EVEN15_R(crate::FieldReader); impl EVEN15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN15` writer - Enable Event on line 15"] pub struct EVEN15_W<'a> { w: &'a mut W, } impl<'a> EVEN15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `EVEN16` reader - Enable Event on line 16"] pub struct EVEN16_R(crate::FieldReader); impl EVEN16_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN16_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN16_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN16` writer - Enable Event on line 16"] pub struct EVEN16_W<'a> { w: &'a mut W, } impl<'a> EVEN16_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `EVEN17` reader - Enable Event on line 17"] pub struct EVEN17_R(crate::FieldReader); impl EVEN17_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN17_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN17_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN17` writer - Enable Event on line 17"] pub struct EVEN17_W<'a> { w: &'a mut W, } impl<'a> EVEN17_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `EVEN18` reader - Enable Event on line 18"] pub struct EVEN18_R(crate::FieldReader); impl EVEN18_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN18_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN18_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN18` writer - Enable Event on line 18"] pub struct EVEN18_W<'a> { w: &'a mut W, } impl<'a> EVEN18_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `EVEN19` reader - Enable Event on line 19"] pub struct EVEN19_R(crate::FieldReader); impl EVEN19_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN19_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN19_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN19` writer - Enable Event on line 19"] pub struct EVEN19_W<'a> { w: &'a mut W, } impl<'a> EVEN19_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `EVEN20` reader - Enable Event on line 20"] pub struct EVEN20_R(crate::FieldReader); impl EVEN20_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN20_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN20_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN20` writer - Enable Event on line 20"] pub struct EVEN20_W<'a> { w: &'a mut W, } impl<'a> EVEN20_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `EVEN21` reader - Enable Event on line 21"] pub struct EVEN21_R(crate::FieldReader); impl EVEN21_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN21_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN21_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN21` writer - Enable Event on line 21"] pub struct EVEN21_W<'a> { w: &'a mut W, } impl<'a> EVEN21_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `EVEN22` reader - Enable Event on line 22"] pub struct EVEN22_R(crate::FieldReader); impl EVEN22_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN22_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN22_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN22` writer - Enable Event on line 22"] pub struct EVEN22_W<'a> { w: &'a mut W, } impl<'a> EVEN22_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `EVEN23` reader - Enable Event on line 23"] pub struct EVEN23_R(crate::FieldReader); impl EVEN23_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN23_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN23_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN23` writer - Enable Event on line 23"] pub struct EVEN23_W<'a> { w: &'a mut W, } impl<'a> EVEN23_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `EVEN24` reader - Enable Event on line 24"] pub struct EVEN24_R(crate::FieldReader); impl EVEN24_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN24_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN24_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN24` writer - Enable Event on line 24"] pub struct EVEN24_W<'a> { w: &'a mut W, } impl<'a> EVEN24_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `EVEN25` reader - Enable Event on line 25"] pub struct EVEN25_R(crate::FieldReader); impl EVEN25_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN25_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN25_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN25` writer - Enable Event on line 25"] pub struct EVEN25_W<'a> { w: &'a mut W, } impl<'a> EVEN25_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); self.w } } #[doc = "Field `EVEN26` reader - Enable Event on line 26"] pub struct EVEN26_R(crate::FieldReader); impl EVEN26_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN26_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN26_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN26` writer - Enable Event on line 26"] pub struct EVEN26_W<'a> { w: &'a mut W, } impl<'a> EVEN26_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `EVEN27` reader - Enable Event on line 27"] pub struct EVEN27_R(crate::FieldReader); impl EVEN27_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVEN27_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVEN27_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVEN27` writer - Enable Event on line 27"] pub struct EVEN27_W<'a> { w: &'a mut W, } impl<'a> EVEN27_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } impl R { #[doc = "Bit 0 - Enable Event on line 0"] #[inline(always)] pub fn even0(&self) -> EVEN0_R { EVEN0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Enable Event on line 1"] #[inline(always)] pub fn even1(&self) -> EVEN1_R { EVEN1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Enable Event on line 2"] #[inline(always)] pub fn even2(&self) -> EVEN2_R { EVEN2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Enable Event on line 3"] #[inline(always)] pub fn even3(&self) -> EVEN3_R { EVEN3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Enable Event on line 4"] #[inline(always)] pub fn even4(&self) -> EVEN4_R { EVEN4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Enable Event on line 5"] #[inline(always)] pub fn even5(&self) -> EVEN5_R { EVEN5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Enable Event on line 6"] #[inline(always)] pub fn even6(&self) -> EVEN6_R { EVEN6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Enable Event on line 7"] #[inline(always)] pub fn even7(&self) -> EVEN7_R { EVEN7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Enable Event on line 8"] #[inline(always)] pub fn even8(&self) -> EVEN8_R { EVEN8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Enable Event on line 9"] #[inline(always)] pub fn even9(&self) -> EVEN9_R { EVEN9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Enable Event on line 10"] #[inline(always)] pub fn even10(&self) -> EVEN10_R { EVEN10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Enable Event on line 11"] #[inline(always)] pub fn even11(&self) -> EVEN11_R { EVEN11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Enable Event on line 12"] #[inline(always)] pub fn even12(&self) -> EVEN12_R { EVEN12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Enable Event on line 13"] #[inline(always)] pub fn even13(&self) -> EVEN13_R { EVEN13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Enable Event on line 14"] #[inline(always)] pub fn even14(&self) -> EVEN14_R { EVEN14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Enable Event on line 15"] #[inline(always)] pub fn even15(&self) -> EVEN15_R { EVEN15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - Enable Event on line 16"] #[inline(always)] pub fn even16(&self) -> EVEN16_R { EVEN16_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Enable Event on line 17"] #[inline(always)] pub fn even17(&self) -> EVEN17_R { EVEN17_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Enable Event on line 18"] #[inline(always)] pub fn even18(&self) -> EVEN18_R { EVEN18_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - Enable Event on line 19"] #[inline(always)] pub fn even19(&self) -> EVEN19_R { EVEN19_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - Enable Event on line 20"] #[inline(always)] pub fn even20(&self) -> EVEN20_R { EVEN20_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21 - Enable Event on line 21"] #[inline(always)] pub fn even21(&self) -> EVEN21_R { EVEN21_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22 - Enable Event on line 22"] #[inline(always)] pub fn even22(&self) -> EVEN22_R { EVEN22_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23 - Enable Event on line 23"] #[inline(always)] pub fn even23(&self) -> EVEN23_R { EVEN23_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 24 - Enable Event on line 24"] #[inline(always)] pub fn even24(&self) -> EVEN24_R { EVEN24_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25 - Enable Event on line 25"] #[inline(always)] pub fn even25(&self) -> EVEN25_R { EVEN25_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26 - Enable Event on line 26"] #[inline(always)] pub fn even26(&self) -> EVEN26_R { EVEN26_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27 - Enable Event on line 27"] #[inline(always)] pub fn even27(&self) -> EVEN27_R { EVEN27_R::new(((self.bits >> 27) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Enable Event on line 0"] #[inline(always)] pub fn even0(&mut self) -> EVEN0_W { EVEN0_W { w: self } } #[doc = "Bit 1 - Enable Event on line 1"] #[inline(always)] pub fn even1(&mut self) -> EVEN1_W { EVEN1_W { w: self } } #[doc = "Bit 2 - Enable Event on line 2"] #[inline(always)] pub fn even2(&mut self) -> EVEN2_W { EVEN2_W { w: self } } #[doc = "Bit 3 - Enable Event on line 3"] #[inline(always)] pub fn even3(&mut self) -> EVEN3_W { EVEN3_W { w: self } } #[doc = "Bit 4 - Enable Event on line 4"] #[inline(always)] pub fn even4(&mut self) -> EVEN4_W { EVEN4_W { w: self } } #[doc = "Bit 5 - Enable Event on line 5"] #[inline(always)] pub fn even5(&mut self) -> EVEN5_W { EVEN5_W { w: self } } #[doc = "Bit 6 - Enable Event on line 6"] #[inline(always)] pub fn even6(&mut self) -> EVEN6_W { EVEN6_W { w: self } } #[doc = "Bit 7 - Enable Event on line 7"] #[inline(always)] pub fn even7(&mut self) -> EVEN7_W { EVEN7_W { w: self } } #[doc = "Bit 8 - Enable Event on line 8"] #[inline(always)] pub fn even8(&mut self) -> EVEN8_W { EVEN8_W { w: self } } #[doc = "Bit 9 - Enable Event on line 9"] #[inline(always)] pub fn even9(&mut self) -> EVEN9_W { EVEN9_W { w: self } } #[doc = "Bit 10 - Enable Event on line 10"] #[inline(always)] pub fn even10(&mut self) -> EVEN10_W { EVEN10_W { w: self } } #[doc = "Bit 11 - Enable Event on line 11"] #[inline(always)] pub fn even11(&mut self) -> EVEN11_W { EVEN11_W { w: self } } #[doc = "Bit 12 - Enable Event on line 12"] #[inline(always)] pub fn even12(&mut self) -> EVEN12_W { EVEN12_W { w: self } } #[doc = "Bit 13 - Enable Event on line 13"] #[inline(always)] pub fn even13(&mut self) -> EVEN13_W { EVEN13_W { w: self } } #[doc = "Bit 14 - Enable Event on line 14"] #[inline(always)] pub fn even14(&mut self) -> EVEN14_W { EVEN14_W { w: self } } #[doc = "Bit 15 - Enable Event on line 15"] #[inline(always)] pub fn even15(&mut self) -> EVEN15_W { EVEN15_W { w: self } } #[doc = "Bit 16 - Enable Event on line 16"] #[inline(always)] pub fn even16(&mut self) -> EVEN16_W { EVEN16_W { w: self } } #[doc = "Bit 17 - Enable Event on line 17"] #[inline(always)] pub fn even17(&mut self) -> EVEN17_W { EVEN17_W { w: self } } #[doc = "Bit 18 - Enable Event on line 18"] #[inline(always)] pub fn even18(&mut self) -> EVEN18_W { EVEN18_W { w: self } } #[doc = "Bit 19 - Enable Event on line 19"] #[inline(always)] pub fn even19(&mut self) -> EVEN19_W { EVEN19_W { w: self } } #[doc = "Bit 20 - Enable Event on line 20"] #[inline(always)] pub fn even20(&mut self) -> EVEN20_W { EVEN20_W { w: self } } #[doc = "Bit 21 - Enable Event on line 21"] #[inline(always)] pub fn even21(&mut self) -> EVEN21_W { EVEN21_W { w: self } } #[doc = "Bit 22 - Enable Event on line 22"] #[inline(always)] pub fn even22(&mut self) -> EVEN22_W { EVEN22_W { w: self } } #[doc = "Bit 23 - Enable Event on line 23"] #[inline(always)] pub fn even23(&mut self) -> EVEN23_W { EVEN23_W { w: self } } #[doc = "Bit 24 - Enable Event on line 24"] #[inline(always)] pub fn even24(&mut self) -> EVEN24_W { EVEN24_W { w: self } } #[doc = "Bit 25 - Enable Event on line 25"] #[inline(always)] pub fn even25(&mut self) -> EVEN25_W { EVEN25_W { w: self } } #[doc = "Bit 26 - Enable Event on line 26"] #[inline(always)] pub fn even26(&mut self) -> EVEN26_W { EVEN26_W { w: self } } #[doc = "Bit 27 - Enable Event on line 27"] #[inline(always)] pub fn even27(&mut self) -> EVEN27_W { EVEN27_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Event enable register (EXTI_EVEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [even](index.html) module"] pub struct EVEN_SPEC; impl crate::RegisterSpec for EVEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [even::R](R) reader structure"] impl crate::Readable for EVEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [even::W](W) writer structure"] impl crate::Writable for EVEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets EVEN to value 0"] impl crate::Resettable for EVEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RTEN register accessor: an alias for `Reg`"] pub type RTEN = crate::Reg; #[doc = "Rising Edge Trigger Enable register (EXTI_RTEN)"] pub mod rten { #[doc = "Register `RTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `RTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RTEN0` reader - Rising trigger event configuration of line 0"] pub struct RTEN0_R(crate::FieldReader); impl RTEN0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN0` writer - Rising trigger event configuration of line 0"] pub struct RTEN0_W<'a> { w: &'a mut W, } impl<'a> RTEN0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `RTEN1` reader - Rising trigger event configuration of line 1"] pub struct RTEN1_R(crate::FieldReader); impl RTEN1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN1` writer - Rising trigger event configuration of line 1"] pub struct RTEN1_W<'a> { w: &'a mut W, } impl<'a> RTEN1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `RTEN2` reader - Rising trigger event configuration of line 2"] pub struct RTEN2_R(crate::FieldReader); impl RTEN2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN2` writer - Rising trigger event configuration of line 2"] pub struct RTEN2_W<'a> { w: &'a mut W, } impl<'a> RTEN2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `RTEN3` reader - Rising trigger event configuration of line 3"] pub struct RTEN3_R(crate::FieldReader); impl RTEN3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN3` writer - Rising trigger event configuration of line 3"] pub struct RTEN3_W<'a> { w: &'a mut W, } impl<'a> RTEN3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `RTEN4` reader - Rising trigger event configuration of line 4"] pub struct RTEN4_R(crate::FieldReader); impl RTEN4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN4` writer - Rising trigger event configuration of line 4"] pub struct RTEN4_W<'a> { w: &'a mut W, } impl<'a> RTEN4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `RTEN5` reader - Rising trigger event configuration of line 5"] pub struct RTEN5_R(crate::FieldReader); impl RTEN5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN5` writer - Rising trigger event configuration of line 5"] pub struct RTEN5_W<'a> { w: &'a mut W, } impl<'a> RTEN5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `RTEN6` reader - Rising trigger event configuration of line 6"] pub struct RTEN6_R(crate::FieldReader); impl RTEN6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN6` writer - Rising trigger event configuration of line 6"] pub struct RTEN6_W<'a> { w: &'a mut W, } impl<'a> RTEN6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `RTEN7` reader - Rising trigger event configuration of line 7"] pub struct RTEN7_R(crate::FieldReader); impl RTEN7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN7` writer - Rising trigger event configuration of line 7"] pub struct RTEN7_W<'a> { w: &'a mut W, } impl<'a> RTEN7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `RTEN8` reader - Rising trigger event configuration of line 8"] pub struct RTEN8_R(crate::FieldReader); impl RTEN8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN8` writer - Rising trigger event configuration of line 8"] pub struct RTEN8_W<'a> { w: &'a mut W, } impl<'a> RTEN8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `RTEN9` reader - Rising trigger event configuration of line 9"] pub struct RTEN9_R(crate::FieldReader); impl RTEN9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN9` writer - Rising trigger event configuration of line 9"] pub struct RTEN9_W<'a> { w: &'a mut W, } impl<'a> RTEN9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `RTEN10` reader - Rising trigger event configuration of line 10"] pub struct RTEN10_R(crate::FieldReader); impl RTEN10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN10` writer - Rising trigger event configuration of line 10"] pub struct RTEN10_W<'a> { w: &'a mut W, } impl<'a> RTEN10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `RTEN11` reader - Rising trigger event configuration of line 11"] pub struct RTEN11_R(crate::FieldReader); impl RTEN11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN11` writer - Rising trigger event configuration of line 11"] pub struct RTEN11_W<'a> { w: &'a mut W, } impl<'a> RTEN11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `RTEN12` reader - Rising trigger event configuration of line 12"] pub struct RTEN12_R(crate::FieldReader); impl RTEN12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN12` writer - Rising trigger event configuration of line 12"] pub struct RTEN12_W<'a> { w: &'a mut W, } impl<'a> RTEN12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `RTEN13` reader - Rising trigger event configuration of line 13"] pub struct RTEN13_R(crate::FieldReader); impl RTEN13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN13` writer - Rising trigger event configuration of line 13"] pub struct RTEN13_W<'a> { w: &'a mut W, } impl<'a> RTEN13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `RTEN14` reader - Rising trigger event configuration of line 14"] pub struct RTEN14_R(crate::FieldReader); impl RTEN14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN14` writer - Rising trigger event configuration of line 14"] pub struct RTEN14_W<'a> { w: &'a mut W, } impl<'a> RTEN14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `RTEN15` reader - Rising trigger event configuration of line 15"] pub struct RTEN15_R(crate::FieldReader); impl RTEN15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN15` writer - Rising trigger event configuration of line 15"] pub struct RTEN15_W<'a> { w: &'a mut W, } impl<'a> RTEN15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `RTEN16` reader - Rising trigger event configuration of line 16"] pub struct RTEN16_R(crate::FieldReader); impl RTEN16_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN16_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN16_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN16` writer - Rising trigger event configuration of line 16"] pub struct RTEN16_W<'a> { w: &'a mut W, } impl<'a> RTEN16_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `RTEN17` reader - Rising trigger event configuration of line 17"] pub struct RTEN17_R(crate::FieldReader); impl RTEN17_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN17_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN17_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN17` writer - Rising trigger event configuration of line 17"] pub struct RTEN17_W<'a> { w: &'a mut W, } impl<'a> RTEN17_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `RTEN18` reader - Rising trigger event configuration of line 18"] pub struct RTEN18_R(crate::FieldReader); impl RTEN18_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN18_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN18_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN18` writer - Rising trigger event configuration of line 18"] pub struct RTEN18_W<'a> { w: &'a mut W, } impl<'a> RTEN18_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `RTEN19` reader - Rising trigger event configuration of line 19"] pub struct RTEN19_R(crate::FieldReader); impl RTEN19_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN19_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN19_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN19` writer - Rising trigger event configuration of line 19"] pub struct RTEN19_W<'a> { w: &'a mut W, } impl<'a> RTEN19_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `RTEN21` reader - Rising trigger event configuration of line 21"] pub struct RTEN21_R(crate::FieldReader); impl RTEN21_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN21_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN21_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN21` writer - Rising trigger event configuration of line 21"] pub struct RTEN21_W<'a> { w: &'a mut W, } impl<'a> RTEN21_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `RTEN22` reader - Rising trigger event configuration of line 22"] pub struct RTEN22_R(crate::FieldReader); impl RTEN22_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN22_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN22_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN22` writer - Rising trigger event configuration of line 22"] pub struct RTEN22_W<'a> { w: &'a mut W, } impl<'a> RTEN22_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } impl R { #[doc = "Bit 0 - Rising trigger event configuration of line 0"] #[inline(always)] pub fn rten0(&self) -> RTEN0_R { RTEN0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Rising trigger event configuration of line 1"] #[inline(always)] pub fn rten1(&self) -> RTEN1_R { RTEN1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Rising trigger event configuration of line 2"] #[inline(always)] pub fn rten2(&self) -> RTEN2_R { RTEN2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Rising trigger event configuration of line 3"] #[inline(always)] pub fn rten3(&self) -> RTEN3_R { RTEN3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Rising trigger event configuration of line 4"] #[inline(always)] pub fn rten4(&self) -> RTEN4_R { RTEN4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Rising trigger event configuration of line 5"] #[inline(always)] pub fn rten5(&self) -> RTEN5_R { RTEN5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Rising trigger event configuration of line 6"] #[inline(always)] pub fn rten6(&self) -> RTEN6_R { RTEN6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Rising trigger event configuration of line 7"] #[inline(always)] pub fn rten7(&self) -> RTEN7_R { RTEN7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Rising trigger event configuration of line 8"] #[inline(always)] pub fn rten8(&self) -> RTEN8_R { RTEN8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Rising trigger event configuration of line 9"] #[inline(always)] pub fn rten9(&self) -> RTEN9_R { RTEN9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Rising trigger event configuration of line 10"] #[inline(always)] pub fn rten10(&self) -> RTEN10_R { RTEN10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Rising trigger event configuration of line 11"] #[inline(always)] pub fn rten11(&self) -> RTEN11_R { RTEN11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Rising trigger event configuration of line 12"] #[inline(always)] pub fn rten12(&self) -> RTEN12_R { RTEN12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Rising trigger event configuration of line 13"] #[inline(always)] pub fn rten13(&self) -> RTEN13_R { RTEN13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Rising trigger event configuration of line 14"] #[inline(always)] pub fn rten14(&self) -> RTEN14_R { RTEN14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Rising trigger event configuration of line 15"] #[inline(always)] pub fn rten15(&self) -> RTEN15_R { RTEN15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - Rising trigger event configuration of line 16"] #[inline(always)] pub fn rten16(&self) -> RTEN16_R { RTEN16_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Rising trigger event configuration of line 17"] #[inline(always)] pub fn rten17(&self) -> RTEN17_R { RTEN17_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Rising trigger event configuration of line 18"] #[inline(always)] pub fn rten18(&self) -> RTEN18_R { RTEN18_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - Rising trigger event configuration of line 19"] #[inline(always)] pub fn rten19(&self) -> RTEN19_R { RTEN19_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 21 - Rising trigger event configuration of line 21"] #[inline(always)] pub fn rten21(&self) -> RTEN21_R { RTEN21_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22 - Rising trigger event configuration of line 22"] #[inline(always)] pub fn rten22(&self) -> RTEN22_R { RTEN22_R::new(((self.bits >> 22) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Rising trigger event configuration of line 0"] #[inline(always)] pub fn rten0(&mut self) -> RTEN0_W { RTEN0_W { w: self } } #[doc = "Bit 1 - Rising trigger event configuration of line 1"] #[inline(always)] pub fn rten1(&mut self) -> RTEN1_W { RTEN1_W { w: self } } #[doc = "Bit 2 - Rising trigger event configuration of line 2"] #[inline(always)] pub fn rten2(&mut self) -> RTEN2_W { RTEN2_W { w: self } } #[doc = "Bit 3 - Rising trigger event configuration of line 3"] #[inline(always)] pub fn rten3(&mut self) -> RTEN3_W { RTEN3_W { w: self } } #[doc = "Bit 4 - Rising trigger event configuration of line 4"] #[inline(always)] pub fn rten4(&mut self) -> RTEN4_W { RTEN4_W { w: self } } #[doc = "Bit 5 - Rising trigger event configuration of line 5"] #[inline(always)] pub fn rten5(&mut self) -> RTEN5_W { RTEN5_W { w: self } } #[doc = "Bit 6 - Rising trigger event configuration of line 6"] #[inline(always)] pub fn rten6(&mut self) -> RTEN6_W { RTEN6_W { w: self } } #[doc = "Bit 7 - Rising trigger event configuration of line 7"] #[inline(always)] pub fn rten7(&mut self) -> RTEN7_W { RTEN7_W { w: self } } #[doc = "Bit 8 - Rising trigger event configuration of line 8"] #[inline(always)] pub fn rten8(&mut self) -> RTEN8_W { RTEN8_W { w: self } } #[doc = "Bit 9 - Rising trigger event configuration of line 9"] #[inline(always)] pub fn rten9(&mut self) -> RTEN9_W { RTEN9_W { w: self } } #[doc = "Bit 10 - Rising trigger event configuration of line 10"] #[inline(always)] pub fn rten10(&mut self) -> RTEN10_W { RTEN10_W { w: self } } #[doc = "Bit 11 - Rising trigger event configuration of line 11"] #[inline(always)] pub fn rten11(&mut self) -> RTEN11_W { RTEN11_W { w: self } } #[doc = "Bit 12 - Rising trigger event configuration of line 12"] #[inline(always)] pub fn rten12(&mut self) -> RTEN12_W { RTEN12_W { w: self } } #[doc = "Bit 13 - Rising trigger event configuration of line 13"] #[inline(always)] pub fn rten13(&mut self) -> RTEN13_W { RTEN13_W { w: self } } #[doc = "Bit 14 - Rising trigger event configuration of line 14"] #[inline(always)] pub fn rten14(&mut self) -> RTEN14_W { RTEN14_W { w: self } } #[doc = "Bit 15 - Rising trigger event configuration of line 15"] #[inline(always)] pub fn rten15(&mut self) -> RTEN15_W { RTEN15_W { w: self } } #[doc = "Bit 16 - Rising trigger event configuration of line 16"] #[inline(always)] pub fn rten16(&mut self) -> RTEN16_W { RTEN16_W { w: self } } #[doc = "Bit 17 - Rising trigger event configuration of line 17"] #[inline(always)] pub fn rten17(&mut self) -> RTEN17_W { RTEN17_W { w: self } } #[doc = "Bit 18 - Rising trigger event configuration of line 18"] #[inline(always)] pub fn rten18(&mut self) -> RTEN18_W { RTEN18_W { w: self } } #[doc = "Bit 19 - Rising trigger event configuration of line 19"] #[inline(always)] pub fn rten19(&mut self) -> RTEN19_W { RTEN19_W { w: self } } #[doc = "Bit 21 - Rising trigger event configuration of line 21"] #[inline(always)] pub fn rten21(&mut self) -> RTEN21_W { RTEN21_W { w: self } } #[doc = "Bit 22 - Rising trigger event configuration of line 22"] #[inline(always)] pub fn rten22(&mut self) -> RTEN22_W { RTEN22_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Rising Edge Trigger Enable register (EXTI_RTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rten](index.html) module"] pub struct RTEN_SPEC; impl crate::RegisterSpec for RTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rten::R](R) reader structure"] impl crate::Readable for RTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [rten::W](W) writer structure"] impl crate::Writable for RTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets RTEN to value 0"] impl crate::Resettable for RTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "FTEN register accessor: an alias for `Reg`"] pub type FTEN = crate::Reg; #[doc = "Falling Egde Trigger Enable register (EXTI_FTEN)"] pub mod ften { #[doc = "Register `FTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `FTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `FTEN0` reader - Falling trigger event configuration of line 0"] pub struct FTEN0_R(crate::FieldReader); impl FTEN0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN0` writer - Falling trigger event configuration of line 0"] pub struct FTEN0_W<'a> { w: &'a mut W, } impl<'a> FTEN0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `FTEN1` reader - Falling trigger event configuration of line 1"] pub struct FTEN1_R(crate::FieldReader); impl FTEN1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN1` writer - Falling trigger event configuration of line 1"] pub struct FTEN1_W<'a> { w: &'a mut W, } impl<'a> FTEN1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `FTEN2` reader - Falling trigger event configuration of line 2"] pub struct FTEN2_R(crate::FieldReader); impl FTEN2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN2` writer - Falling trigger event configuration of line 2"] pub struct FTEN2_W<'a> { w: &'a mut W, } impl<'a> FTEN2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `FTEN3` reader - Falling trigger event configuration of line 3"] pub struct FTEN3_R(crate::FieldReader); impl FTEN3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN3` writer - Falling trigger event configuration of line 3"] pub struct FTEN3_W<'a> { w: &'a mut W, } impl<'a> FTEN3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `FTEN4` reader - Falling trigger event configuration of line 4"] pub struct FTEN4_R(crate::FieldReader); impl FTEN4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN4` writer - Falling trigger event configuration of line 4"] pub struct FTEN4_W<'a> { w: &'a mut W, } impl<'a> FTEN4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `FTEN5` reader - Falling trigger event configuration of line 5"] pub struct FTEN5_R(crate::FieldReader); impl FTEN5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN5` writer - Falling trigger event configuration of line 5"] pub struct FTEN5_W<'a> { w: &'a mut W, } impl<'a> FTEN5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `FTEN6` reader - Falling trigger event configuration of line 6"] pub struct FTEN6_R(crate::FieldReader); impl FTEN6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN6` writer - Falling trigger event configuration of line 6"] pub struct FTEN6_W<'a> { w: &'a mut W, } impl<'a> FTEN6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `FTEN7` reader - Falling trigger event configuration of line 7"] pub struct FTEN7_R(crate::FieldReader); impl FTEN7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN7` writer - Falling trigger event configuration of line 7"] pub struct FTEN7_W<'a> { w: &'a mut W, } impl<'a> FTEN7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `FTEN8` reader - Falling trigger event configuration of line 8"] pub struct FTEN8_R(crate::FieldReader); impl FTEN8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN8` writer - Falling trigger event configuration of line 8"] pub struct FTEN8_W<'a> { w: &'a mut W, } impl<'a> FTEN8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `FTEN9` reader - Falling trigger event configuration of line 9"] pub struct FTEN9_R(crate::FieldReader); impl FTEN9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN9` writer - Falling trigger event configuration of line 9"] pub struct FTEN9_W<'a> { w: &'a mut W, } impl<'a> FTEN9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `FTEN10` reader - Falling trigger event configuration of line 10"] pub struct FTEN10_R(crate::FieldReader); impl FTEN10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN10` writer - Falling trigger event configuration of line 10"] pub struct FTEN10_W<'a> { w: &'a mut W, } impl<'a> FTEN10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `FTEN11` reader - Falling trigger event configuration of line 11"] pub struct FTEN11_R(crate::FieldReader); impl FTEN11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN11` writer - Falling trigger event configuration of line 11"] pub struct FTEN11_W<'a> { w: &'a mut W, } impl<'a> FTEN11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `FTEN12` reader - Falling trigger event configuration of line 12"] pub struct FTEN12_R(crate::FieldReader); impl FTEN12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN12` writer - Falling trigger event configuration of line 12"] pub struct FTEN12_W<'a> { w: &'a mut W, } impl<'a> FTEN12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `FTEN13` reader - Falling trigger event configuration of line 13"] pub struct FTEN13_R(crate::FieldReader); impl FTEN13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN13` writer - Falling trigger event configuration of line 13"] pub struct FTEN13_W<'a> { w: &'a mut W, } impl<'a> FTEN13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `FTEN14` reader - Falling trigger event configuration of line 14"] pub struct FTEN14_R(crate::FieldReader); impl FTEN14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN14` writer - Falling trigger event configuration of line 14"] pub struct FTEN14_W<'a> { w: &'a mut W, } impl<'a> FTEN14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `FTEN15` reader - Falling trigger event configuration of line 15"] pub struct FTEN15_R(crate::FieldReader); impl FTEN15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN15` writer - Falling trigger event configuration of line 15"] pub struct FTEN15_W<'a> { w: &'a mut W, } impl<'a> FTEN15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `FTEN16` reader - Falling trigger event configuration of line 16"] pub struct FTEN16_R(crate::FieldReader); impl FTEN16_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN16_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN16_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN16` writer - Falling trigger event configuration of line 16"] pub struct FTEN16_W<'a> { w: &'a mut W, } impl<'a> FTEN16_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `FTEN17` reader - Falling trigger event configuration of line 17"] pub struct FTEN17_R(crate::FieldReader); impl FTEN17_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN17_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN17_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN17` writer - Falling trigger event configuration of line 17"] pub struct FTEN17_W<'a> { w: &'a mut W, } impl<'a> FTEN17_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `FTEN18` reader - Falling trigger event configuration of line 18"] pub struct FTEN18_R(crate::FieldReader); impl FTEN18_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN18_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN18_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN18` writer - Falling trigger event configuration of line 18"] pub struct FTEN18_W<'a> { w: &'a mut W, } impl<'a> FTEN18_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `FTEN19` reader - Falling trigger event configuration of line 19"] pub struct FTEN19_R(crate::FieldReader); impl FTEN19_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN19_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN19_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN19` writer - Falling trigger event configuration of line 19"] pub struct FTEN19_W<'a> { w: &'a mut W, } impl<'a> FTEN19_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `FTEN21` reader - Falling trigger event configuration of line 21"] pub struct FTEN21_R(crate::FieldReader); impl FTEN21_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN21_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN21_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN21` writer - Falling trigger event configuration of line 21"] pub struct FTEN21_W<'a> { w: &'a mut W, } impl<'a> FTEN21_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `FTEN22` reader - Falling trigger event configuration of line 22"] pub struct FTEN22_R(crate::FieldReader); impl FTEN22_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FTEN22_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FTEN22_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FTEN22` writer - Falling trigger event configuration of line 22"] pub struct FTEN22_W<'a> { w: &'a mut W, } impl<'a> FTEN22_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } impl R { #[doc = "Bit 0 - Falling trigger event configuration of line 0"] #[inline(always)] pub fn ften0(&self) -> FTEN0_R { FTEN0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Falling trigger event configuration of line 1"] #[inline(always)] pub fn ften1(&self) -> FTEN1_R { FTEN1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Falling trigger event configuration of line 2"] #[inline(always)] pub fn ften2(&self) -> FTEN2_R { FTEN2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Falling trigger event configuration of line 3"] #[inline(always)] pub fn ften3(&self) -> FTEN3_R { FTEN3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Falling trigger event configuration of line 4"] #[inline(always)] pub fn ften4(&self) -> FTEN4_R { FTEN4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Falling trigger event configuration of line 5"] #[inline(always)] pub fn ften5(&self) -> FTEN5_R { FTEN5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Falling trigger event configuration of line 6"] #[inline(always)] pub fn ften6(&self) -> FTEN6_R { FTEN6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Falling trigger event configuration of line 7"] #[inline(always)] pub fn ften7(&self) -> FTEN7_R { FTEN7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Falling trigger event configuration of line 8"] #[inline(always)] pub fn ften8(&self) -> FTEN8_R { FTEN8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Falling trigger event configuration of line 9"] #[inline(always)] pub fn ften9(&self) -> FTEN9_R { FTEN9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Falling trigger event configuration of line 10"] #[inline(always)] pub fn ften10(&self) -> FTEN10_R { FTEN10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Falling trigger event configuration of line 11"] #[inline(always)] pub fn ften11(&self) -> FTEN11_R { FTEN11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Falling trigger event configuration of line 12"] #[inline(always)] pub fn ften12(&self) -> FTEN12_R { FTEN12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Falling trigger event configuration of line 13"] #[inline(always)] pub fn ften13(&self) -> FTEN13_R { FTEN13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Falling trigger event configuration of line 14"] #[inline(always)] pub fn ften14(&self) -> FTEN14_R { FTEN14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Falling trigger event configuration of line 15"] #[inline(always)] pub fn ften15(&self) -> FTEN15_R { FTEN15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - Falling trigger event configuration of line 16"] #[inline(always)] pub fn ften16(&self) -> FTEN16_R { FTEN16_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Falling trigger event configuration of line 17"] #[inline(always)] pub fn ften17(&self) -> FTEN17_R { FTEN17_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Falling trigger event configuration of line 18"] #[inline(always)] pub fn ften18(&self) -> FTEN18_R { FTEN18_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - Falling trigger event configuration of line 19"] #[inline(always)] pub fn ften19(&self) -> FTEN19_R { FTEN19_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 21 - Falling trigger event configuration of line 21"] #[inline(always)] pub fn ften21(&self) -> FTEN21_R { FTEN21_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22 - Falling trigger event configuration of line 22"] #[inline(always)] pub fn ften22(&self) -> FTEN22_R { FTEN22_R::new(((self.bits >> 22) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Falling trigger event configuration of line 0"] #[inline(always)] pub fn ften0(&mut self) -> FTEN0_W { FTEN0_W { w: self } } #[doc = "Bit 1 - Falling trigger event configuration of line 1"] #[inline(always)] pub fn ften1(&mut self) -> FTEN1_W { FTEN1_W { w: self } } #[doc = "Bit 2 - Falling trigger event configuration of line 2"] #[inline(always)] pub fn ften2(&mut self) -> FTEN2_W { FTEN2_W { w: self } } #[doc = "Bit 3 - Falling trigger event configuration of line 3"] #[inline(always)] pub fn ften3(&mut self) -> FTEN3_W { FTEN3_W { w: self } } #[doc = "Bit 4 - Falling trigger event configuration of line 4"] #[inline(always)] pub fn ften4(&mut self) -> FTEN4_W { FTEN4_W { w: self } } #[doc = "Bit 5 - Falling trigger event configuration of line 5"] #[inline(always)] pub fn ften5(&mut self) -> FTEN5_W { FTEN5_W { w: self } } #[doc = "Bit 6 - Falling trigger event configuration of line 6"] #[inline(always)] pub fn ften6(&mut self) -> FTEN6_W { FTEN6_W { w: self } } #[doc = "Bit 7 - Falling trigger event configuration of line 7"] #[inline(always)] pub fn ften7(&mut self) -> FTEN7_W { FTEN7_W { w: self } } #[doc = "Bit 8 - Falling trigger event configuration of line 8"] #[inline(always)] pub fn ften8(&mut self) -> FTEN8_W { FTEN8_W { w: self } } #[doc = "Bit 9 - Falling trigger event configuration of line 9"] #[inline(always)] pub fn ften9(&mut self) -> FTEN9_W { FTEN9_W { w: self } } #[doc = "Bit 10 - Falling trigger event configuration of line 10"] #[inline(always)] pub fn ften10(&mut self) -> FTEN10_W { FTEN10_W { w: self } } #[doc = "Bit 11 - Falling trigger event configuration of line 11"] #[inline(always)] pub fn ften11(&mut self) -> FTEN11_W { FTEN11_W { w: self } } #[doc = "Bit 12 - Falling trigger event configuration of line 12"] #[inline(always)] pub fn ften12(&mut self) -> FTEN12_W { FTEN12_W { w: self } } #[doc = "Bit 13 - Falling trigger event configuration of line 13"] #[inline(always)] pub fn ften13(&mut self) -> FTEN13_W { FTEN13_W { w: self } } #[doc = "Bit 14 - Falling trigger event configuration of line 14"] #[inline(always)] pub fn ften14(&mut self) -> FTEN14_W { FTEN14_W { w: self } } #[doc = "Bit 15 - Falling trigger event configuration of line 15"] #[inline(always)] pub fn ften15(&mut self) -> FTEN15_W { FTEN15_W { w: self } } #[doc = "Bit 16 - Falling trigger event configuration of line 16"] #[inline(always)] pub fn ften16(&mut self) -> FTEN16_W { FTEN16_W { w: self } } #[doc = "Bit 17 - Falling trigger event configuration of line 17"] #[inline(always)] pub fn ften17(&mut self) -> FTEN17_W { FTEN17_W { w: self } } #[doc = "Bit 18 - Falling trigger event configuration of line 18"] #[inline(always)] pub fn ften18(&mut self) -> FTEN18_W { FTEN18_W { w: self } } #[doc = "Bit 19 - Falling trigger event configuration of line 19"] #[inline(always)] pub fn ften19(&mut self) -> FTEN19_W { FTEN19_W { w: self } } #[doc = "Bit 21 - Falling trigger event configuration of line 21"] #[inline(always)] pub fn ften21(&mut self) -> FTEN21_W { FTEN21_W { w: self } } #[doc = "Bit 22 - Falling trigger event configuration of line 22"] #[inline(always)] pub fn ften22(&mut self) -> FTEN22_W { FTEN22_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Falling Egde Trigger Enable register (EXTI_FTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ften](index.html) module"] pub struct FTEN_SPEC; impl crate::RegisterSpec for FTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ften::R](R) reader structure"] impl crate::Readable for FTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ften::W](W) writer structure"] impl crate::Writable for FTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets FTEN to value 0"] impl crate::Resettable for FTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SWIEV register accessor: an alias for `Reg`"] pub type SWIEV = crate::Reg; #[doc = "Software interrupt event register (EXTI_SWIEV)"] pub mod swiev { #[doc = "Register `SWIEV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `SWIEV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SWIEV0` reader - Software Interrupt on line 0"] pub struct SWIEV0_R(crate::FieldReader); impl SWIEV0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV0` writer - Software Interrupt on line 0"] pub struct SWIEV0_W<'a> { w: &'a mut W, } impl<'a> SWIEV0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `SWIEV1` reader - Software Interrupt on line 1"] pub struct SWIEV1_R(crate::FieldReader); impl SWIEV1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV1` writer - Software Interrupt on line 1"] pub struct SWIEV1_W<'a> { w: &'a mut W, } impl<'a> SWIEV1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `SWIEV2` reader - Software Interrupt on line 2"] pub struct SWIEV2_R(crate::FieldReader); impl SWIEV2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV2` writer - Software Interrupt on line 2"] pub struct SWIEV2_W<'a> { w: &'a mut W, } impl<'a> SWIEV2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `SWIEV3` reader - Software Interrupt on line 3"] pub struct SWIEV3_R(crate::FieldReader); impl SWIEV3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV3` writer - Software Interrupt on line 3"] pub struct SWIEV3_W<'a> { w: &'a mut W, } impl<'a> SWIEV3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `SWIEV4` reader - Software Interrupt on line 4"] pub struct SWIEV4_R(crate::FieldReader); impl SWIEV4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV4` writer - Software Interrupt on line 4"] pub struct SWIEV4_W<'a> { w: &'a mut W, } impl<'a> SWIEV4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `SWIEV5` reader - Software Interrupt on line 5"] pub struct SWIEV5_R(crate::FieldReader); impl SWIEV5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV5` writer - Software Interrupt on line 5"] pub struct SWIEV5_W<'a> { w: &'a mut W, } impl<'a> SWIEV5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `SWIEV6` reader - Software Interrupt on line 6"] pub struct SWIEV6_R(crate::FieldReader); impl SWIEV6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV6` writer - Software Interrupt on line 6"] pub struct SWIEV6_W<'a> { w: &'a mut W, } impl<'a> SWIEV6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `SWIEV7` reader - Software Interrupt on line 7"] pub struct SWIEV7_R(crate::FieldReader); impl SWIEV7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV7` writer - Software Interrupt on line 7"] pub struct SWIEV7_W<'a> { w: &'a mut W, } impl<'a> SWIEV7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SWIEV8` reader - Software Interrupt on line 8"] pub struct SWIEV8_R(crate::FieldReader); impl SWIEV8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV8` writer - Software Interrupt on line 8"] pub struct SWIEV8_W<'a> { w: &'a mut W, } impl<'a> SWIEV8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `SWIEV9` reader - Software Interrupt on line 9"] pub struct SWIEV9_R(crate::FieldReader); impl SWIEV9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV9` writer - Software Interrupt on line 9"] pub struct SWIEV9_W<'a> { w: &'a mut W, } impl<'a> SWIEV9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `SWIEV10` reader - Software Interrupt on line 10"] pub struct SWIEV10_R(crate::FieldReader); impl SWIEV10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV10` writer - Software Interrupt on line 10"] pub struct SWIEV10_W<'a> { w: &'a mut W, } impl<'a> SWIEV10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `SWIEV11` reader - Software Interrupt on line 11"] pub struct SWIEV11_R(crate::FieldReader); impl SWIEV11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV11` writer - Software Interrupt on line 11"] pub struct SWIEV11_W<'a> { w: &'a mut W, } impl<'a> SWIEV11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `SWIEV12` reader - Software Interrupt on line 12"] pub struct SWIEV12_R(crate::FieldReader); impl SWIEV12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV12` writer - Software Interrupt on line 12"] pub struct SWIEV12_W<'a> { w: &'a mut W, } impl<'a> SWIEV12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `SWIEV13` reader - Software Interrupt on line 13"] pub struct SWIEV13_R(crate::FieldReader); impl SWIEV13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV13` writer - Software Interrupt on line 13"] pub struct SWIEV13_W<'a> { w: &'a mut W, } impl<'a> SWIEV13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `SWIEV14` reader - Software Interrupt on line 14"] pub struct SWIEV14_R(crate::FieldReader); impl SWIEV14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV14` writer - Software Interrupt on line 14"] pub struct SWIEV14_W<'a> { w: &'a mut W, } impl<'a> SWIEV14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `SWIEV15` reader - Software Interrupt on line 15"] pub struct SWIEV15_R(crate::FieldReader); impl SWIEV15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV15` writer - Software Interrupt on line 15"] pub struct SWIEV15_W<'a> { w: &'a mut W, } impl<'a> SWIEV15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `SWIEV16` reader - Software Interrupt on line 16"] pub struct SWIEV16_R(crate::FieldReader); impl SWIEV16_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV16_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV16_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV16` writer - Software Interrupt on line 16"] pub struct SWIEV16_W<'a> { w: &'a mut W, } impl<'a> SWIEV16_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `SWIEV17` reader - Software Interrupt on line 17"] pub struct SWIEV17_R(crate::FieldReader); impl SWIEV17_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV17_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV17_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV17` writer - Software Interrupt on line 17"] pub struct SWIEV17_W<'a> { w: &'a mut W, } impl<'a> SWIEV17_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `SWIEV18` reader - Software Interrupt on line 18"] pub struct SWIEV18_R(crate::FieldReader); impl SWIEV18_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV18_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV18_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV18` writer - Software Interrupt on line 18"] pub struct SWIEV18_W<'a> { w: &'a mut W, } impl<'a> SWIEV18_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `SWIEV19` reader - Software Interrupt on line 19"] pub struct SWIEV19_R(crate::FieldReader); impl SWIEV19_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV19_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV19_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV19` writer - Software Interrupt on line 19"] pub struct SWIEV19_W<'a> { w: &'a mut W, } impl<'a> SWIEV19_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `SWIEV21` reader - Software Interrupt on line 21"] pub struct SWIEV21_R(crate::FieldReader); impl SWIEV21_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV21_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV21_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV21` writer - Software Interrupt on line 21"] pub struct SWIEV21_W<'a> { w: &'a mut W, } impl<'a> SWIEV21_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `SWIEV22` reader - Software Interrupt on line 22"] pub struct SWIEV22_R(crate::FieldReader); impl SWIEV22_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWIEV22_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWIEV22_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWIEV22` writer - Software Interrupt on line 22"] pub struct SWIEV22_W<'a> { w: &'a mut W, } impl<'a> SWIEV22_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } impl R { #[doc = "Bit 0 - Software Interrupt on line 0"] #[inline(always)] pub fn swiev0(&self) -> SWIEV0_R { SWIEV0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Software Interrupt on line 1"] #[inline(always)] pub fn swiev1(&self) -> SWIEV1_R { SWIEV1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Software Interrupt on line 2"] #[inline(always)] pub fn swiev2(&self) -> SWIEV2_R { SWIEV2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Software Interrupt on line 3"] #[inline(always)] pub fn swiev3(&self) -> SWIEV3_R { SWIEV3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Software Interrupt on line 4"] #[inline(always)] pub fn swiev4(&self) -> SWIEV4_R { SWIEV4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Software Interrupt on line 5"] #[inline(always)] pub fn swiev5(&self) -> SWIEV5_R { SWIEV5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Software Interrupt on line 6"] #[inline(always)] pub fn swiev6(&self) -> SWIEV6_R { SWIEV6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Software Interrupt on line 7"] #[inline(always)] pub fn swiev7(&self) -> SWIEV7_R { SWIEV7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Software Interrupt on line 8"] #[inline(always)] pub fn swiev8(&self) -> SWIEV8_R { SWIEV8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Software Interrupt on line 9"] #[inline(always)] pub fn swiev9(&self) -> SWIEV9_R { SWIEV9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Software Interrupt on line 10"] #[inline(always)] pub fn swiev10(&self) -> SWIEV10_R { SWIEV10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Software Interrupt on line 11"] #[inline(always)] pub fn swiev11(&self) -> SWIEV11_R { SWIEV11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Software Interrupt on line 12"] #[inline(always)] pub fn swiev12(&self) -> SWIEV12_R { SWIEV12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Software Interrupt on line 13"] #[inline(always)] pub fn swiev13(&self) -> SWIEV13_R { SWIEV13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Software Interrupt on line 14"] #[inline(always)] pub fn swiev14(&self) -> SWIEV14_R { SWIEV14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Software Interrupt on line 15"] #[inline(always)] pub fn swiev15(&self) -> SWIEV15_R { SWIEV15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - Software Interrupt on line 16"] #[inline(always)] pub fn swiev16(&self) -> SWIEV16_R { SWIEV16_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Software Interrupt on line 17"] #[inline(always)] pub fn swiev17(&self) -> SWIEV17_R { SWIEV17_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Software Interrupt on line 18"] #[inline(always)] pub fn swiev18(&self) -> SWIEV18_R { SWIEV18_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - Software Interrupt on line 19"] #[inline(always)] pub fn swiev19(&self) -> SWIEV19_R { SWIEV19_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 21 - Software Interrupt on line 21"] #[inline(always)] pub fn swiev21(&self) -> SWIEV21_R { SWIEV21_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22 - Software Interrupt on line 22"] #[inline(always)] pub fn swiev22(&self) -> SWIEV22_R { SWIEV22_R::new(((self.bits >> 22) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Software Interrupt on line 0"] #[inline(always)] pub fn swiev0(&mut self) -> SWIEV0_W { SWIEV0_W { w: self } } #[doc = "Bit 1 - Software Interrupt on line 1"] #[inline(always)] pub fn swiev1(&mut self) -> SWIEV1_W { SWIEV1_W { w: self } } #[doc = "Bit 2 - Software Interrupt on line 2"] #[inline(always)] pub fn swiev2(&mut self) -> SWIEV2_W { SWIEV2_W { w: self } } #[doc = "Bit 3 - Software Interrupt on line 3"] #[inline(always)] pub fn swiev3(&mut self) -> SWIEV3_W { SWIEV3_W { w: self } } #[doc = "Bit 4 - Software Interrupt on line 4"] #[inline(always)] pub fn swiev4(&mut self) -> SWIEV4_W { SWIEV4_W { w: self } } #[doc = "Bit 5 - Software Interrupt on line 5"] #[inline(always)] pub fn swiev5(&mut self) -> SWIEV5_W { SWIEV5_W { w: self } } #[doc = "Bit 6 - Software Interrupt on line 6"] #[inline(always)] pub fn swiev6(&mut self) -> SWIEV6_W { SWIEV6_W { w: self } } #[doc = "Bit 7 - Software Interrupt on line 7"] #[inline(always)] pub fn swiev7(&mut self) -> SWIEV7_W { SWIEV7_W { w: self } } #[doc = "Bit 8 - Software Interrupt on line 8"] #[inline(always)] pub fn swiev8(&mut self) -> SWIEV8_W { SWIEV8_W { w: self } } #[doc = "Bit 9 - Software Interrupt on line 9"] #[inline(always)] pub fn swiev9(&mut self) -> SWIEV9_W { SWIEV9_W { w: self } } #[doc = "Bit 10 - Software Interrupt on line 10"] #[inline(always)] pub fn swiev10(&mut self) -> SWIEV10_W { SWIEV10_W { w: self } } #[doc = "Bit 11 - Software Interrupt on line 11"] #[inline(always)] pub fn swiev11(&mut self) -> SWIEV11_W { SWIEV11_W { w: self } } #[doc = "Bit 12 - Software Interrupt on line 12"] #[inline(always)] pub fn swiev12(&mut self) -> SWIEV12_W { SWIEV12_W { w: self } } #[doc = "Bit 13 - Software Interrupt on line 13"] #[inline(always)] pub fn swiev13(&mut self) -> SWIEV13_W { SWIEV13_W { w: self } } #[doc = "Bit 14 - Software Interrupt on line 14"] #[inline(always)] pub fn swiev14(&mut self) -> SWIEV14_W { SWIEV14_W { w: self } } #[doc = "Bit 15 - Software Interrupt on line 15"] #[inline(always)] pub fn swiev15(&mut self) -> SWIEV15_W { SWIEV15_W { w: self } } #[doc = "Bit 16 - Software Interrupt on line 16"] #[inline(always)] pub fn swiev16(&mut self) -> SWIEV16_W { SWIEV16_W { w: self } } #[doc = "Bit 17 - Software Interrupt on line 17"] #[inline(always)] pub fn swiev17(&mut self) -> SWIEV17_W { SWIEV17_W { w: self } } #[doc = "Bit 18 - Software Interrupt on line 18"] #[inline(always)] pub fn swiev18(&mut self) -> SWIEV18_W { SWIEV18_W { w: self } } #[doc = "Bit 19 - Software Interrupt on line 19"] #[inline(always)] pub fn swiev19(&mut self) -> SWIEV19_W { SWIEV19_W { w: self } } #[doc = "Bit 21 - Software Interrupt on line 21"] #[inline(always)] pub fn swiev21(&mut self) -> SWIEV21_W { SWIEV21_W { w: self } } #[doc = "Bit 22 - Software Interrupt on line 22"] #[inline(always)] pub fn swiev22(&mut self) -> SWIEV22_W { SWIEV22_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Software interrupt event register (EXTI_SWIEV)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swiev](index.html) module"] pub struct SWIEV_SPEC; impl crate::RegisterSpec for SWIEV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [swiev::R](R) reader structure"] impl crate::Readable for SWIEV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [swiev::W](W) writer structure"] impl crate::Writable for SWIEV_SPEC { type Writer = W; } #[doc = "`reset()` method sets SWIEV to value 0"] impl crate::Resettable for SWIEV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PD register accessor: an alias for `Reg`"] pub type PD = crate::Reg; #[doc = "Pending register (EXTI_PD)"] pub mod pd { #[doc = "Register `PD` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PD` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PD0` reader - Pending bit 0"] pub struct PD0_R(crate::FieldReader); impl PD0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD0` writer - Pending bit 0"] pub struct PD0_W<'a> { w: &'a mut W, } impl<'a> PD0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `PD1` reader - Pending bit 1"] pub struct PD1_R(crate::FieldReader); impl PD1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD1` writer - Pending bit 1"] pub struct PD1_W<'a> { w: &'a mut W, } impl<'a> PD1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `PD2` reader - Pending bit 2"] pub struct PD2_R(crate::FieldReader); impl PD2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD2` writer - Pending bit 2"] pub struct PD2_W<'a> { w: &'a mut W, } impl<'a> PD2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `PD3` reader - Pending bit 3"] pub struct PD3_R(crate::FieldReader); impl PD3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD3` writer - Pending bit 3"] pub struct PD3_W<'a> { w: &'a mut W, } impl<'a> PD3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `PD4` reader - Pending bit 4"] pub struct PD4_R(crate::FieldReader); impl PD4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD4` writer - Pending bit 4"] pub struct PD4_W<'a> { w: &'a mut W, } impl<'a> PD4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `PD5` reader - Pending bit 5"] pub struct PD5_R(crate::FieldReader); impl PD5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD5` writer - Pending bit 5"] pub struct PD5_W<'a> { w: &'a mut W, } impl<'a> PD5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `PD6` reader - Pending bit 6"] pub struct PD6_R(crate::FieldReader); impl PD6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD6` writer - Pending bit 6"] pub struct PD6_W<'a> { w: &'a mut W, } impl<'a> PD6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `PD7` reader - Pending bit 7"] pub struct PD7_R(crate::FieldReader); impl PD7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD7` writer - Pending bit 7"] pub struct PD7_W<'a> { w: &'a mut W, } impl<'a> PD7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PD8` reader - Pending bit 8"] pub struct PD8_R(crate::FieldReader); impl PD8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD8` writer - Pending bit 8"] pub struct PD8_W<'a> { w: &'a mut W, } impl<'a> PD8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `PD9` reader - Pending bit 9"] pub struct PD9_R(crate::FieldReader); impl PD9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD9` writer - Pending bit 9"] pub struct PD9_W<'a> { w: &'a mut W, } impl<'a> PD9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `PD10` reader - Pending bit 10"] pub struct PD10_R(crate::FieldReader); impl PD10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD10` writer - Pending bit 10"] pub struct PD10_W<'a> { w: &'a mut W, } impl<'a> PD10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `PD11` reader - Pending bit 11"] pub struct PD11_R(crate::FieldReader); impl PD11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD11` writer - Pending bit 11"] pub struct PD11_W<'a> { w: &'a mut W, } impl<'a> PD11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `PD12` reader - Pending bit 12"] pub struct PD12_R(crate::FieldReader); impl PD12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD12` writer - Pending bit 12"] pub struct PD12_W<'a> { w: &'a mut W, } impl<'a> PD12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `PD13` reader - Pending bit 13"] pub struct PD13_R(crate::FieldReader); impl PD13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD13` writer - Pending bit 13"] pub struct PD13_W<'a> { w: &'a mut W, } impl<'a> PD13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `PD14` reader - Pending bit 14"] pub struct PD14_R(crate::FieldReader); impl PD14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD14` writer - Pending bit 14"] pub struct PD14_W<'a> { w: &'a mut W, } impl<'a> PD14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `PD15` reader - Pending bit 15"] pub struct PD15_R(crate::FieldReader); impl PD15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD15` writer - Pending bit 15"] pub struct PD15_W<'a> { w: &'a mut W, } impl<'a> PD15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `PD16` reader - Pending bit 16"] pub struct PD16_R(crate::FieldReader); impl PD16_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD16_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD16_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD16` writer - Pending bit 16"] pub struct PD16_W<'a> { w: &'a mut W, } impl<'a> PD16_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `PD17` reader - Pending bit 17"] pub struct PD17_R(crate::FieldReader); impl PD17_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD17_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD17_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD17` writer - Pending bit 17"] pub struct PD17_W<'a> { w: &'a mut W, } impl<'a> PD17_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `PD18` reader - Pending bit 18"] pub struct PD18_R(crate::FieldReader); impl PD18_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD18_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD18_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD18` writer - Pending bit 18"] pub struct PD18_W<'a> { w: &'a mut W, } impl<'a> PD18_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `PD19` reader - Pending bit 19"] pub struct PD19_R(crate::FieldReader); impl PD19_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD19_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD19_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD19` writer - Pending bit 19"] pub struct PD19_W<'a> { w: &'a mut W, } impl<'a> PD19_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `PD21` reader - Pending bit 21"] pub struct PD21_R(crate::FieldReader); impl PD21_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD21_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD21_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD21` writer - Pending bit 21"] pub struct PD21_W<'a> { w: &'a mut W, } impl<'a> PD21_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `PD22` reader - Pending bit 22"] pub struct PD22_R(crate::FieldReader); impl PD22_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PD22_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PD22_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PD22` writer - Pending bit 22"] pub struct PD22_W<'a> { w: &'a mut W, } impl<'a> PD22_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } impl R { #[doc = "Bit 0 - Pending bit 0"] #[inline(always)] pub fn pd0(&self) -> PD0_R { PD0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Pending bit 1"] #[inline(always)] pub fn pd1(&self) -> PD1_R { PD1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Pending bit 2"] #[inline(always)] pub fn pd2(&self) -> PD2_R { PD2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Pending bit 3"] #[inline(always)] pub fn pd3(&self) -> PD3_R { PD3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Pending bit 4"] #[inline(always)] pub fn pd4(&self) -> PD4_R { PD4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Pending bit 5"] #[inline(always)] pub fn pd5(&self) -> PD5_R { PD5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Pending bit 6"] #[inline(always)] pub fn pd6(&self) -> PD6_R { PD6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Pending bit 7"] #[inline(always)] pub fn pd7(&self) -> PD7_R { PD7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Pending bit 8"] #[inline(always)] pub fn pd8(&self) -> PD8_R { PD8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Pending bit 9"] #[inline(always)] pub fn pd9(&self) -> PD9_R { PD9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Pending bit 10"] #[inline(always)] pub fn pd10(&self) -> PD10_R { PD10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Pending bit 11"] #[inline(always)] pub fn pd11(&self) -> PD11_R { PD11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Pending bit 12"] #[inline(always)] pub fn pd12(&self) -> PD12_R { PD12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Pending bit 13"] #[inline(always)] pub fn pd13(&self) -> PD13_R { PD13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Pending bit 14"] #[inline(always)] pub fn pd14(&self) -> PD14_R { PD14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Pending bit 15"] #[inline(always)] pub fn pd15(&self) -> PD15_R { PD15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16 - Pending bit 16"] #[inline(always)] pub fn pd16(&self) -> PD16_R { PD16_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Pending bit 17"] #[inline(always)] pub fn pd17(&self) -> PD17_R { PD17_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Pending bit 18"] #[inline(always)] pub fn pd18(&self) -> PD18_R { PD18_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - Pending bit 19"] #[inline(always)] pub fn pd19(&self) -> PD19_R { PD19_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 21 - Pending bit 21"] #[inline(always)] pub fn pd21(&self) -> PD21_R { PD21_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22 - Pending bit 22"] #[inline(always)] pub fn pd22(&self) -> PD22_R { PD22_R::new(((self.bits >> 22) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Pending bit 0"] #[inline(always)] pub fn pd0(&mut self) -> PD0_W { PD0_W { w: self } } #[doc = "Bit 1 - Pending bit 1"] #[inline(always)] pub fn pd1(&mut self) -> PD1_W { PD1_W { w: self } } #[doc = "Bit 2 - Pending bit 2"] #[inline(always)] pub fn pd2(&mut self) -> PD2_W { PD2_W { w: self } } #[doc = "Bit 3 - Pending bit 3"] #[inline(always)] pub fn pd3(&mut self) -> PD3_W { PD3_W { w: self } } #[doc = "Bit 4 - Pending bit 4"] #[inline(always)] pub fn pd4(&mut self) -> PD4_W { PD4_W { w: self } } #[doc = "Bit 5 - Pending bit 5"] #[inline(always)] pub fn pd5(&mut self) -> PD5_W { PD5_W { w: self } } #[doc = "Bit 6 - Pending bit 6"] #[inline(always)] pub fn pd6(&mut self) -> PD6_W { PD6_W { w: self } } #[doc = "Bit 7 - Pending bit 7"] #[inline(always)] pub fn pd7(&mut self) -> PD7_W { PD7_W { w: self } } #[doc = "Bit 8 - Pending bit 8"] #[inline(always)] pub fn pd8(&mut self) -> PD8_W { PD8_W { w: self } } #[doc = "Bit 9 - Pending bit 9"] #[inline(always)] pub fn pd9(&mut self) -> PD9_W { PD9_W { w: self } } #[doc = "Bit 10 - Pending bit 10"] #[inline(always)] pub fn pd10(&mut self) -> PD10_W { PD10_W { w: self } } #[doc = "Bit 11 - Pending bit 11"] #[inline(always)] pub fn pd11(&mut self) -> PD11_W { PD11_W { w: self } } #[doc = "Bit 12 - Pending bit 12"] #[inline(always)] pub fn pd12(&mut self) -> PD12_W { PD12_W { w: self } } #[doc = "Bit 13 - Pending bit 13"] #[inline(always)] pub fn pd13(&mut self) -> PD13_W { PD13_W { w: self } } #[doc = "Bit 14 - Pending bit 14"] #[inline(always)] pub fn pd14(&mut self) -> PD14_W { PD14_W { w: self } } #[doc = "Bit 15 - Pending bit 15"] #[inline(always)] pub fn pd15(&mut self) -> PD15_W { PD15_W { w: self } } #[doc = "Bit 16 - Pending bit 16"] #[inline(always)] pub fn pd16(&mut self) -> PD16_W { PD16_W { w: self } } #[doc = "Bit 17 - Pending bit 17"] #[inline(always)] pub fn pd17(&mut self) -> PD17_W { PD17_W { w: self } } #[doc = "Bit 18 - Pending bit 18"] #[inline(always)] pub fn pd18(&mut self) -> PD18_W { PD18_W { w: self } } #[doc = "Bit 19 - Pending bit 19"] #[inline(always)] pub fn pd19(&mut self) -> PD19_W { PD19_W { w: self } } #[doc = "Bit 21 - Pending bit 21"] #[inline(always)] pub fn pd21(&mut self) -> PD21_W { PD21_W { w: self } } #[doc = "Bit 22 - Pending bit 22"] #[inline(always)] pub fn pd22(&mut self) -> PD22_W { PD22_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Pending register (EXTI_PD)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pd](index.html) module"] pub struct PD_SPEC; impl crate::RegisterSpec for PD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [pd::R](R) reader structure"] impl crate::Readable for PD_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [pd::W](W) writer structure"] impl crate::Writable for PD_SPEC { type Writer = W; } #[doc = "`reset()` method sets PD to value 0"] impl crate::Resettable for PD_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "FMC"] pub struct FMC { _marker: PhantomData<*const ()>, } unsafe impl Send for FMC {} impl FMC { #[doc = r"Pointer to the register block"] pub const PTR: *const fmc::RegisterBlock = 0x4002_2000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const fmc::RegisterBlock { Self::PTR } } impl Deref for FMC { type Target = fmc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for FMC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("FMC").finish() } } #[doc = "FMC"] pub mod fmc { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Wait state register"] pub ws: crate::Reg, #[doc = "0x04 - Flash unlock key register"] pub key: crate::Reg, #[doc = "0x08 - Flash option byte unlock key register"] pub obkey: crate::Reg, #[doc = "0x0c - Flash status register"] pub stat: crate::Reg, #[doc = "0x10 - Flash control register"] pub ctl: crate::Reg, #[doc = "0x14 - Flash address register"] pub addr: crate::Reg, _reserved6: [u8; 0x04], #[doc = "0x1c - Option byte status register"] pub obstat: crate::Reg, #[doc = "0x20 - Write protection register"] pub wp: crate::Reg, _reserved8: [u8; 0xd8], #[doc = "0xfc - Flash wait state control register"] pub wsen: crate::Reg, #[doc = "0x100 - Flash Product ID register"] pub pid: crate::Reg, } #[doc = "WS register accessor: an alias for `Reg`"] pub type WS = crate::Reg; #[doc = "Wait state register"] pub mod ws { #[doc = "Register `WS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `WS` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `WSCNT` reader - WSCNT"] pub struct WSCNT_R(crate::FieldReader); impl WSCNT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { WSCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WSCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WSCNT` writer - WSCNT"] pub struct WSCNT_W<'a> { w: &'a mut W, } impl<'a> WSCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); self.w } } impl R { #[doc = "Bits 0:2 - WSCNT"] #[inline(always)] pub fn wscnt(&self) -> WSCNT_R { WSCNT_R::new((self.bits & 0x07) as u8) } } impl W { #[doc = "Bits 0:2 - WSCNT"] #[inline(always)] pub fn wscnt(&mut self) -> WSCNT_W { WSCNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Wait state register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ws](index.html) module"] pub struct WS_SPEC; impl crate::RegisterSpec for WS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ws::R](R) reader structure"] impl crate::Readable for WS_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ws::W](W) writer structure"] impl crate::Writable for WS_SPEC { type Writer = W; } #[doc = "`reset()` method sets WS to value 0"] impl crate::Resettable for WS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "KEY register accessor: an alias for `Reg`"] pub type KEY = crate::Reg; #[doc = "Flash unlock key register"] pub mod key { #[doc = "Register `KEY` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `KEY` writer - FMC_CTL unlock register"] pub struct KEY_W<'a> { w: &'a mut W, } impl<'a> KEY_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl W { #[doc = "Bits 0:31 - FMC_CTL unlock register"] #[inline(always)] pub fn key(&mut self) -> KEY_W { KEY_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Flash unlock key register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [key](index.html) module"] pub struct KEY_SPEC; impl crate::RegisterSpec for KEY_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [key::W](W) writer structure"] impl crate::Writable for KEY_SPEC { type Writer = W; } #[doc = "`reset()` method sets KEY to value 0"] impl crate::Resettable for KEY_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OBKEY register accessor: an alias for `Reg`"] pub type OBKEY = crate::Reg; #[doc = "Flash option byte unlock key register"] pub mod obkey { #[doc = "Register `OBKEY` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OBKEY` writer - Option byte key"] pub struct OBKEY_W<'a> { w: &'a mut W, } impl<'a> OBKEY_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl W { #[doc = "Bits 0:31 - Option byte key"] #[inline(always)] pub fn obkey(&mut self) -> OBKEY_W { OBKEY_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Flash option byte unlock key register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [obkey](index.html) module"] pub struct OBKEY_SPEC; impl crate::RegisterSpec for OBKEY_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [obkey::W](W) writer structure"] impl crate::Writable for OBKEY_SPEC { type Writer = W; } #[doc = "`reset()` method sets OBKEY to value 0"] impl crate::Resettable for OBKEY_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "STAT register accessor: an alias for `Reg`"] pub type STAT = crate::Reg; #[doc = "Flash status register"] pub mod stat { #[doc = "Register `STAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `STAT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ENDF` reader - End of operation flag bit"] pub struct ENDF_R(crate::FieldReader); impl ENDF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ENDF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ENDF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ENDF` writer - End of operation flag bit"] pub struct ENDF_W<'a> { w: &'a mut W, } impl<'a> ENDF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `WPERR` reader - Erase/Program protection error flag bit"] pub struct WPERR_R(crate::FieldReader); impl WPERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WPERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WPERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WPERR` writer - Erase/Program protection error flag bit"] pub struct WPERR_W<'a> { w: &'a mut W, } impl<'a> WPERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `PGERR` reader - Program error flag bit"] pub struct PGERR_R(crate::FieldReader); impl PGERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PGERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PGERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PGERR` writer - Program error flag bit"] pub struct PGERR_W<'a> { w: &'a mut W, } impl<'a> PGERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `BUSY` reader - Busy"] pub struct BUSY_R(crate::FieldReader); impl BUSY_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BUSY_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BUSY_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 5 - End of operation flag bit"] #[inline(always)] pub fn endf(&self) -> ENDF_R { ENDF_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Erase/Program protection error flag bit"] #[inline(always)] pub fn wperr(&self) -> WPERR_R { WPERR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 2 - Program error flag bit"] #[inline(always)] pub fn pgerr(&self) -> PGERR_R { PGERR_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 0 - Busy"] #[inline(always)] pub fn busy(&self) -> BUSY_R { BUSY_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 5 - End of operation flag bit"] #[inline(always)] pub fn endf(&mut self) -> ENDF_W { ENDF_W { w: self } } #[doc = "Bit 4 - Erase/Program protection error flag bit"] #[inline(always)] pub fn wperr(&mut self) -> WPERR_W { WPERR_W { w: self } } #[doc = "Bit 2 - Program error flag bit"] #[inline(always)] pub fn pgerr(&mut self) -> PGERR_W { PGERR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Flash status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"] pub struct STAT_SPEC; impl crate::RegisterSpec for STAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat::R](R) reader structure"] impl crate::Readable for STAT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [stat::W](W) writer structure"] impl crate::Writable for STAT_SPEC { type Writer = W; } #[doc = "`reset()` method sets STAT to value 0"] impl crate::Resettable for STAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "Flash control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OBRLD` reader - Option byte reload bit"] pub struct OBRLD_R(crate::FieldReader); impl OBRLD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OBRLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OBRLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OBRLD` writer - Option byte reload bit"] pub struct OBRLD_W<'a> { w: &'a mut W, } impl<'a> OBRLD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `ENDIE` reader - End of operation interrupt enable"] pub struct ENDIE_R(crate::FieldReader); impl ENDIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ENDIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ENDIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ENDIE` writer - End of operation interrupt enable"] pub struct ENDIE_W<'a> { w: &'a mut W, } impl<'a> ENDIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `ERRIE` reader - Error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OBWEN` reader - Option bytes write enable"] pub struct OBWEN_R(crate::FieldReader); impl OBWEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OBWEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OBWEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OBWEN` writer - Option bytes write enable"] pub struct OBWEN_W<'a> { w: &'a mut W, } impl<'a> OBWEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `LK` reader - Lock"] pub struct LK_R(crate::FieldReader); impl LK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK` writer - Lock"] pub struct LK_W<'a> { w: &'a mut W, } impl<'a> LK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `START` reader - Start"] pub struct START_R(crate::FieldReader); impl START_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { START_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for START_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `START` writer - Start"] pub struct START_W<'a> { w: &'a mut W, } impl<'a> START_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OBER` reader - Option byte erase"] pub struct OBER_R(crate::FieldReader); impl OBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OBER` writer - Option byte erase"] pub struct OBER_W<'a> { w: &'a mut W, } impl<'a> OBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OBPG` reader - Option byte programming"] pub struct OBPG_R(crate::FieldReader); impl OBPG_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OBPG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OBPG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OBPG` writer - Option byte programming"] pub struct OBPG_W<'a> { w: &'a mut W, } impl<'a> OBPG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `MER` reader - Main flash mass erase command bit"] pub struct MER_R(crate::FieldReader); impl MER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MER` writer - Main flash mass erase command bit"] pub struct MER_W<'a> { w: &'a mut W, } impl<'a> MER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `PER` reader - Main flash page erase command bit"] pub struct PER_R(crate::FieldReader); impl PER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PER` writer - Main flash page erase command bit"] pub struct PER_W<'a> { w: &'a mut W, } impl<'a> PER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `PG` reader - Programming"] pub struct PG_R(crate::FieldReader); impl PG_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PG` writer - Programming"] pub struct PG_W<'a> { w: &'a mut W, } impl<'a> PG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 13 - Option byte reload bit"] #[inline(always)] pub fn obrld(&self) -> OBRLD_R { OBRLD_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - End of operation interrupt enable"] #[inline(always)] pub fn endie(&self) -> ENDIE_R { ENDIE_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 10 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Option bytes write enable"] #[inline(always)] pub fn obwen(&self) -> OBWEN_R { OBWEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 7 - Lock"] #[inline(always)] pub fn lk(&self) -> LK_R { LK_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Start"] #[inline(always)] pub fn start(&self) -> START_R { START_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Option byte erase"] #[inline(always)] pub fn ober(&self) -> OBER_R { OBER_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Option byte programming"] #[inline(always)] pub fn obpg(&self) -> OBPG_R { OBPG_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 2 - Main flash mass erase command bit"] #[inline(always)] pub fn mer(&self) -> MER_R { MER_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Main flash page erase command bit"] #[inline(always)] pub fn per(&self) -> PER_R { PER_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Programming"] #[inline(always)] pub fn pg(&self) -> PG_R { PG_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 13 - Option byte reload bit"] #[inline(always)] pub fn obrld(&mut self) -> OBRLD_W { OBRLD_W { w: self } } #[doc = "Bit 12 - End of operation interrupt enable"] #[inline(always)] pub fn endie(&mut self) -> ENDIE_W { ENDIE_W { w: self } } #[doc = "Bit 10 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 9 - Option bytes write enable"] #[inline(always)] pub fn obwen(&mut self) -> OBWEN_W { OBWEN_W { w: self } } #[doc = "Bit 7 - Lock"] #[inline(always)] pub fn lk(&mut self) -> LK_W { LK_W { w: self } } #[doc = "Bit 6 - Start"] #[inline(always)] pub fn start(&mut self) -> START_W { START_W { w: self } } #[doc = "Bit 5 - Option byte erase"] #[inline(always)] pub fn ober(&mut self) -> OBER_W { OBER_W { w: self } } #[doc = "Bit 4 - Option byte programming"] #[inline(always)] pub fn obpg(&mut self) -> OBPG_W { OBPG_W { w: self } } #[doc = "Bit 2 - Main flash mass erase command bit"] #[inline(always)] pub fn mer(&mut self) -> MER_W { MER_W { w: self } } #[doc = "Bit 1 - Main flash page erase command bit"] #[inline(always)] pub fn per(&mut self) -> PER_W { PER_W { w: self } } #[doc = "Bit 0 - Programming"] #[inline(always)] pub fn pg(&mut self) -> PG_W { PG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Flash control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0x80"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x80 } } } #[doc = "ADDR register accessor: an alias for `Reg`"] pub type ADDR = crate::Reg; #[doc = "Flash address register"] pub mod addr { #[doc = "Register `ADDR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ADDR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ADDR` reader - Flash command address"] pub struct ADDR_R(crate::FieldReader); impl ADDR_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { ADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADDR` writer - Flash command address"] pub struct ADDR_W<'a> { w: &'a mut W, } impl<'a> ADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Flash command address"] #[inline(always)] pub fn addr(&self) -> ADDR_R { ADDR_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Flash command address"] #[inline(always)] pub fn addr(&mut self) -> ADDR_W { ADDR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Flash address register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addr](index.html) module"] pub struct ADDR_SPEC; impl crate::RegisterSpec for ADDR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [addr::R](R) reader structure"] impl crate::Readable for ADDR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [addr::W](W) writer structure"] impl crate::Writable for ADDR_SPEC { type Writer = W; } #[doc = "`reset()` method sets ADDR to value 0"] impl crate::Resettable for ADDR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OBSTAT register accessor: an alias for `Reg`"] pub type OBSTAT = crate::Reg; #[doc = "Option byte status register"] pub mod obstat { #[doc = "Register `OBSTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `OB_DATA` reader - OB_DATA"] pub struct OB_DATA_R(crate::FieldReader); impl OB_DATA_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { OB_DATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OB_DATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OB_USER` reader - OB_USER"] pub struct OB_USER_R(crate::FieldReader); impl OB_USER_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OB_USER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OB_USER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLEVEL` reader - PLEVEL"] pub struct PLEVEL_R(crate::FieldReader); impl PLEVEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PLEVEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLEVEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OBERR` reader - Option byte error"] pub struct OBERR_R(crate::FieldReader); impl OBERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OBERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OBERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 16:31 - OB_DATA"] #[inline(always)] pub fn ob_data(&self) -> OB_DATA_R { OB_DATA_R::new(((self.bits >> 16) & 0xffff) as u16) } #[doc = "Bits 8:15 - OB_USER"] #[inline(always)] pub fn ob_user(&self) -> OB_USER_R { OB_USER_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 1:2 - PLEVEL"] #[inline(always)] pub fn plevel(&self) -> PLEVEL_R { PLEVEL_R::new(((self.bits >> 1) & 0x03) as u8) } #[doc = "Bit 0 - Option byte error"] #[inline(always)] pub fn oberr(&self) -> OBERR_R { OBERR_R::new((self.bits & 0x01) != 0) } } #[doc = "Option byte status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [obstat](index.html) module"] pub struct OBSTAT_SPEC; impl crate::RegisterSpec for OBSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [obstat::R](R) reader structure"] impl crate::Readable for OBSTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets OBSTAT to value 0"] impl crate::Resettable for OBSTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "WP register accessor: an alias for `Reg`"] pub type WP = crate::Reg; #[doc = "Write protection register"] pub mod wp { #[doc = "Register `WP` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `OB_WP` reader - Write protect"] pub struct OB_WP_R(crate::FieldReader); impl OB_WP_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { OB_WP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OB_WP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Write protect"] #[inline(always)] pub fn ob_wp(&self) -> OB_WP_R { OB_WP_R::new((self.bits & 0xffff) as u16) } } #[doc = "Write protection register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wp](index.html) module"] pub struct WP_SPEC; impl crate::RegisterSpec for WP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [wp::R](R) reader structure"] impl crate::Readable for WP_SPEC { type Reader = R; } #[doc = "`reset()` method sets WP to value 0"] impl crate::Resettable for WP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "WSEN register accessor: an alias for `Reg`"] pub type WSEN = crate::Reg; #[doc = "Flash wait state control register"] pub mod wsen { #[doc = "Register `WSEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `WSEN` reader - FMC wait state enable register"] pub struct WSEN_R(crate::FieldReader); impl WSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BPEN` reader - FMC bit program enable register"] pub struct BPEN_R(crate::FieldReader); impl BPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 0 - FMC wait state enable register"] #[inline(always)] pub fn wsen(&self) -> WSEN_R { WSEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - FMC bit program enable register"] #[inline(always)] pub fn bpen(&self) -> BPEN_R { BPEN_R::new(((self.bits >> 1) & 0x01) != 0) } } #[doc = "Flash wait state control register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wsen](index.html) module"] pub struct WSEN_SPEC; impl crate::RegisterSpec for WSEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [wsen::R](R) reader structure"] impl crate::Readable for WSEN_SPEC { type Reader = R; } #[doc = "`reset()` method sets WSEN to value 0"] impl crate::Resettable for WSEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PID register accessor: an alias for `Reg`"] pub type PID = crate::Reg; #[doc = "Flash Product ID register"] pub mod pid { #[doc = "Register `PID` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `PID` reader - Product reserved ID code register1"] pub struct PID_R(crate::FieldReader); impl PID_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { PID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:31 - Product reserved ID code register1"] #[inline(always)] pub fn pid(&self) -> PID_R { PID_R::new(self.bits) } } #[doc = "Flash Product ID register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pid](index.html) module"] pub struct PID_SPEC; impl crate::RegisterSpec for PID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [pid::R](R) reader structure"] impl crate::Readable for PID_SPEC { type Reader = R; } #[doc = "`reset()` method sets PID to value 0"] impl crate::Resettable for PID_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "free watchdog timer"] pub struct FWDGT { _marker: PhantomData<*const ()>, } unsafe impl Send for FWDGT {} impl FWDGT { #[doc = r"Pointer to the register block"] pub const PTR: *const fwdgt::RegisterBlock = 0x4000_3000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const fwdgt::RegisterBlock { Self::PTR } } impl Deref for FWDGT { type Target = fwdgt::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for FWDGT { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("FWDGT").finish() } } #[doc = "free watchdog timer"] pub mod fwdgt { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Control register"] pub ctl: crate::Reg, #[doc = "0x04 - Prescaler register"] pub psc: crate::Reg, #[doc = "0x08 - Reload register"] pub rld: crate::Reg, #[doc = "0x0c - Status register"] pub stat: crate::Reg, #[doc = "0x10 - Window register"] pub wnd: crate::Reg, } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "Control register"] pub mod ctl { #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CMD` writer - Key value"] pub struct CMD_W<'a> { w: &'a mut W, } impl<'a> CMD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl W { #[doc = "Bits 0:15 - Key value"] #[inline(always)] pub fn cmd(&mut self) -> CMD_W { CMD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PSC register accessor: an alias for `Reg`"] pub type PSC = crate::Reg; #[doc = "Prescaler register"] pub mod psc { #[doc = "Register `PSC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PSC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PSC` reader - Prescaler divider"] pub struct PSC_R(crate::FieldReader); impl PSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSC` writer - Prescaler divider"] pub struct PSC_W<'a> { w: &'a mut W, } impl<'a> PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); self.w } } impl R { #[doc = "Bits 0:2 - Prescaler divider"] #[inline(always)] pub fn psc(&self) -> PSC_R { PSC_R::new((self.bits & 0x07) as u8) } } impl W { #[doc = "Bits 0:2 - Prescaler divider"] #[inline(always)] pub fn psc(&mut self) -> PSC_W { PSC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Prescaler register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](index.html) module"] pub struct PSC_SPEC; impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [psc::R](R) reader structure"] impl crate::Readable for PSC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [psc::W](W) writer structure"] impl crate::Writable for PSC_SPEC { type Writer = W; } #[doc = "`reset()` method sets PSC to value 0"] impl crate::Resettable for PSC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RLD register accessor: an alias for `Reg`"] pub type RLD = crate::Reg; #[doc = "Reload register"] pub mod rld { #[doc = "Register `RLD` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `RLD` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RLD` reader - Watchdog counter reload value"] pub struct RLD_R(crate::FieldReader); impl RLD_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { RLD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RLD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RLD` writer - Watchdog counter reload value"] pub struct RLD_W<'a> { w: &'a mut W, } impl<'a> RLD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); self.w } } impl R { #[doc = "Bits 0:11 - Watchdog counter reload value"] #[inline(always)] pub fn rld(&self) -> RLD_R { RLD_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Watchdog counter reload value"] #[inline(always)] pub fn rld(&mut self) -> RLD_W { RLD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rld](index.html) module"] pub struct RLD_SPEC; impl crate::RegisterSpec for RLD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rld::R](R) reader structure"] impl crate::Readable for RLD_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [rld::W](W) writer structure"] impl crate::Writable for RLD_SPEC { type Writer = W; } #[doc = "`reset()` method sets RLD to value 0x0fff"] impl crate::Resettable for RLD_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0fff } } } #[doc = "STAT register accessor: an alias for `Reg`"] pub type STAT = crate::Reg; #[doc = "Status register"] pub mod stat { #[doc = "Register `STAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `PUD` reader - Watchdog prescaler value update"] pub struct PUD_R(crate::FieldReader); impl PUD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PUD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RUD` reader - Watchdog counter reload value update"] pub struct RUD_R(crate::FieldReader); impl RUD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RUD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RUD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WUD` reader - Watchdog counter window value update"] pub struct WUD_R(crate::FieldReader); impl WUD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WUD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WUD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 0 - Watchdog prescaler value update"] #[inline(always)] pub fn pud(&self) -> PUD_R { PUD_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Watchdog counter reload value update"] #[inline(always)] pub fn rud(&self) -> RUD_R { RUD_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Watchdog counter window value update"] #[inline(always)] pub fn wud(&self) -> WUD_R { WUD_R::new(((self.bits >> 2) & 0x01) != 0) } } #[doc = "Status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"] pub struct STAT_SPEC; impl crate::RegisterSpec for STAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat::R](R) reader structure"] impl crate::Readable for STAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets STAT to value 0"] impl crate::Resettable for STAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "WND register accessor: an alias for `Reg`"] pub type WND = crate::Reg; #[doc = "Window register"] pub mod wnd { #[doc = "Register `WND` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `WND` reader - Watchdog counter window value"] pub struct WND_R(crate::FieldReader); impl WND_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { WND_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WND_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:11 - Watchdog counter window value"] #[inline(always)] pub fn wnd(&self) -> WND_R { WND_R::new((self.bits & 0x0fff) as u16) } } #[doc = "Window register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wnd](index.html) module"] pub struct WND_SPEC; impl crate::RegisterSpec for WND_SPEC { type Ux = u32; } #[doc = "`read()` method returns [wnd::R](R) reader structure"] impl crate::Readable for WND_SPEC { type Reader = R; } #[doc = "`reset()` method sets WND to value 0"] impl crate::Resettable for WND_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose I/Os"] pub struct GPIOA { _marker: PhantomData<*const ()>, } unsafe impl Send for GPIOA {} impl GPIOA { #[doc = r"Pointer to the register block"] pub const PTR: *const gpioa::RegisterBlock = 0x4800_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const gpioa::RegisterBlock { Self::PTR } } impl Deref for GPIOA { type Target = gpioa::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for GPIOA { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("GPIOA").finish() } } #[doc = "General-purpose I/Os"] pub mod gpioa { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - GPIO port control register"] pub ctl: crate::Reg, #[doc = "0x04 - GPIO port output type register"] pub omode: crate::Reg, #[doc = "0x08 - GPIO port output speed register 0"] pub ospd0: crate::Reg, #[doc = "0x0c - GPIO port pull-up/pull-down register"] pub pud: crate::Reg, #[doc = "0x10 - GPIO port input data register"] pub istat: crate::Reg, #[doc = "0x14 - GPIO port output data register"] pub octl: crate::Reg, #[doc = "0x18 - GPIO port bit set/reset register"] pub bop: crate::Reg, #[doc = "0x1c - GPIO port configuration lock register"] pub lock: crate::Reg, #[doc = "0x20 - GPIO alternate function low register"] pub afsel0: crate::Reg, #[doc = "0x24 - GPIO alternate function register 1"] pub afsel1: crate::Reg, #[doc = "0x28 - Port bit reset register"] pub bc: crate::Reg, #[doc = "0x2c - Port bit toggle register"] pub tg: crate::Reg, _reserved12: [u8; 0x0c], #[doc = "0x3c - Port output speed register 1"] pub ospd1: crate::Reg, } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "GPIO port control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CTL15` reader - Port x configuration bits (y = 0..15)"] pub struct CTL15_R(crate::FieldReader); impl CTL15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL15` writer - Port x configuration bits (y = 0..15)"] pub struct CTL15_W<'a> { w: &'a mut W, } impl<'a> CTL15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `CTL14` reader - Port x configuration bits (y = 0..15)"] pub struct CTL14_R(crate::FieldReader); impl CTL14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL14` writer - Port x configuration bits (y = 0..15)"] pub struct CTL14_W<'a> { w: &'a mut W, } impl<'a> CTL14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `CTL13` reader - Port x configuration bits (y = 0..15)"] pub struct CTL13_R(crate::FieldReader); impl CTL13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL13` writer - Port x configuration bits (y = 0..15)"] pub struct CTL13_W<'a> { w: &'a mut W, } impl<'a> CTL13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `CTL12` reader - Port x configuration bits (y = 0..15)"] pub struct CTL12_R(crate::FieldReader); impl CTL12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL12` writer - Port x configuration bits (y = 0..15)"] pub struct CTL12_W<'a> { w: &'a mut W, } impl<'a> CTL12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `CTL11` reader - Port x configuration bits (y = 0..15)"] pub struct CTL11_R(crate::FieldReader); impl CTL11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL11` writer - Port x configuration bits (y = 0..15)"] pub struct CTL11_W<'a> { w: &'a mut W, } impl<'a> CTL11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `CTL10` reader - Port x configuration bits (y = 0..15)"] pub struct CTL10_R(crate::FieldReader); impl CTL10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL10` writer - Port x configuration bits (y = 0..15)"] pub struct CTL10_W<'a> { w: &'a mut W, } impl<'a> CTL10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `CTL9` reader - Port x configuration bits (y = 0..15)"] pub struct CTL9_R(crate::FieldReader); impl CTL9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL9` writer - Port x configuration bits (y = 0..15)"] pub struct CTL9_W<'a> { w: &'a mut W, } impl<'a> CTL9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `CTL8` reader - Port x configuration bits (y = 0..15)"] pub struct CTL8_R(crate::FieldReader); impl CTL8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL8` writer - Port x configuration bits (y = 0..15)"] pub struct CTL8_W<'a> { w: &'a mut W, } impl<'a> CTL8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `CTL7` reader - Port x configuration bits (y = 0..15)"] pub struct CTL7_R(crate::FieldReader); impl CTL7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL7` writer - Port x configuration bits (y = 0..15)"] pub struct CTL7_W<'a> { w: &'a mut W, } impl<'a> CTL7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `CTL6` reader - Port x configuration bits (y = 0..15)"] pub struct CTL6_R(crate::FieldReader); impl CTL6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL6` writer - Port x configuration bits (y = 0..15)"] pub struct CTL6_W<'a> { w: &'a mut W, } impl<'a> CTL6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `CTL5` reader - Port x configuration bits (y = 0..15)"] pub struct CTL5_R(crate::FieldReader); impl CTL5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL5` writer - Port x configuration bits (y = 0..15)"] pub struct CTL5_W<'a> { w: &'a mut W, } impl<'a> CTL5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `CTL4` reader - Port x configuration bits (y = 0..15)"] pub struct CTL4_R(crate::FieldReader); impl CTL4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL4` writer - Port x configuration bits (y = 0..15)"] pub struct CTL4_W<'a> { w: &'a mut W, } impl<'a> CTL4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CTL3` reader - Port x configuration bits (y = 0..15)"] pub struct CTL3_R(crate::FieldReader); impl CTL3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL3` writer - Port x configuration bits (y = 0..15)"] pub struct CTL3_W<'a> { w: &'a mut W, } impl<'a> CTL3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `CTL2` reader - Port x configuration bits (y = 0..15)"] pub struct CTL2_R(crate::FieldReader); impl CTL2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL2` writer - Port x configuration bits (y = 0..15)"] pub struct CTL2_W<'a> { w: &'a mut W, } impl<'a> CTL2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `CTL1` reader - Port x configuration bits (y = 0..15)"] pub struct CTL1_R(crate::FieldReader); impl CTL1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL1` writer - Port x configuration bits (y = 0..15)"] pub struct CTL1_W<'a> { w: &'a mut W, } impl<'a> CTL1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CTL0` reader - Port x configuration bits (y = 0..15)"] pub struct CTL0_R(crate::FieldReader); impl CTL0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL0` writer - Port x configuration bits (y = 0..15)"] pub struct CTL0_W<'a> { w: &'a mut W, } impl<'a> CTL0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl15(&self) -> CTL15_R { CTL15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl14(&self) -> CTL14_R { CTL14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl13(&self) -> CTL13_R { CTL13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl12(&self) -> CTL12_R { CTL12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl11(&self) -> CTL11_R { CTL11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl10(&self) -> CTL10_R { CTL10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl9(&self) -> CTL9_R { CTL9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl8(&self) -> CTL8_R { CTL8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl7(&self) -> CTL7_R { CTL7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl6(&self) -> CTL6_R { CTL6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl5(&self) -> CTL5_R { CTL5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl4(&self) -> CTL4_R { CTL4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl3(&self) -> CTL3_R { CTL3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl2(&self) -> CTL2_R { CTL2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl1(&self) -> CTL1_R { CTL1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl0(&self) -> CTL0_R { CTL0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl15(&mut self) -> CTL15_W { CTL15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl14(&mut self) -> CTL14_W { CTL14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl13(&mut self) -> CTL13_W { CTL13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl12(&mut self) -> CTL12_W { CTL12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl11(&mut self) -> CTL11_W { CTL11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl10(&mut self) -> CTL10_W { CTL10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl9(&mut self) -> CTL9_W { CTL9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl8(&mut self) -> CTL8_W { CTL8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl7(&mut self) -> CTL7_W { CTL7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl6(&mut self) -> CTL6_W { CTL6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl5(&mut self) -> CTL5_W { CTL5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl4(&mut self) -> CTL4_W { CTL4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl3(&mut self) -> CTL3_W { CTL3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl2(&mut self) -> CTL2_W { CTL2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl1(&mut self) -> CTL1_W { CTL1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl0(&mut self) -> CTL0_W { CTL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0x2800_0000"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x2800_0000 } } } #[doc = "OMODE register accessor: an alias for `Reg`"] pub type OMODE = crate::Reg; #[doc = "GPIO port output type register"] pub mod omode { #[doc = "Register `OMODE` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OMODE` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OM15` reader - Port x configuration bit 15"] pub struct OM15_R(crate::FieldReader); impl OM15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM15` writer - Port x configuration bit 15"] pub struct OM15_W<'a> { w: &'a mut W, } impl<'a> OM15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OM14` reader - Port x configuration bit 14"] pub struct OM14_R(crate::FieldReader); impl OM14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM14` writer - Port x configuration bit 14"] pub struct OM14_W<'a> { w: &'a mut W, } impl<'a> OM14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `OM13` reader - Port x configuration bit 13"] pub struct OM13_R(crate::FieldReader); impl OM13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM13` writer - Port x configuration bit 13"] pub struct OM13_W<'a> { w: &'a mut W, } impl<'a> OM13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OM12` reader - Port x configuration bit 12"] pub struct OM12_R(crate::FieldReader); impl OM12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM12` writer - Port x configuration bit 12"] pub struct OM12_W<'a> { w: &'a mut W, } impl<'a> OM12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OM11` reader - Port x configuration bit 11"] pub struct OM11_R(crate::FieldReader); impl OM11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM11` writer - Port x configuration bit 11"] pub struct OM11_W<'a> { w: &'a mut W, } impl<'a> OM11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `OM10` reader - Port x configuration bit 10"] pub struct OM10_R(crate::FieldReader); impl OM10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM10` writer - Port x configuration bit 10"] pub struct OM10_W<'a> { w: &'a mut W, } impl<'a> OM10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OM9` reader - Port x configuration bit 9"] pub struct OM9_R(crate::FieldReader); impl OM9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM9` writer - Port x configuration bit 9"] pub struct OM9_W<'a> { w: &'a mut W, } impl<'a> OM9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OM8` reader - Port x configuration bit 8"] pub struct OM8_R(crate::FieldReader); impl OM8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM8` writer - Port x configuration bit 8"] pub struct OM8_W<'a> { w: &'a mut W, } impl<'a> OM8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OM7` reader - Port x configuration bit 7"] pub struct OM7_R(crate::FieldReader); impl OM7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM7` writer - Port x configuration bit 7"] pub struct OM7_W<'a> { w: &'a mut W, } impl<'a> OM7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `OM6` reader - Port x configuration bit 6"] pub struct OM6_R(crate::FieldReader); impl OM6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM6` writer - Port x configuration bit 6"] pub struct OM6_W<'a> { w: &'a mut W, } impl<'a> OM6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OM5` reader - Port x configuration bit 5"] pub struct OM5_R(crate::FieldReader); impl OM5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM5` writer - Port x configuration bit 5"] pub struct OM5_W<'a> { w: &'a mut W, } impl<'a> OM5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OM4` reader - Port x configuration bit 4"] pub struct OM4_R(crate::FieldReader); impl OM4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM4` writer - Port x configuration bit 4"] pub struct OM4_W<'a> { w: &'a mut W, } impl<'a> OM4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OM3` reader - Port x configuration bit 3"] pub struct OM3_R(crate::FieldReader); impl OM3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM3` writer - Port x configuration bit 3"] pub struct OM3_W<'a> { w: &'a mut W, } impl<'a> OM3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `OM2` reader - Port x configuration bit 2"] pub struct OM2_R(crate::FieldReader); impl OM2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM2` writer - Port x configuration bit 2"] pub struct OM2_W<'a> { w: &'a mut W, } impl<'a> OM2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `OM1` reader - Port x configuration bit 1"] pub struct OM1_R(crate::FieldReader); impl OM1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM1` writer - Port x configuration bit 1"] pub struct OM1_W<'a> { w: &'a mut W, } impl<'a> OM1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OM0` reader - Port x configuration bit 0"] pub struct OM0_R(crate::FieldReader); impl OM0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM0` writer - Port x configuration bit 0"] pub struct OM0_W<'a> { w: &'a mut W, } impl<'a> OM0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Port x configuration bit 15"] #[inline(always)] pub fn om15(&self) -> OM15_R { OM15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port x configuration bit 14"] #[inline(always)] pub fn om14(&self) -> OM14_R { OM14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port x configuration bit 13"] #[inline(always)] pub fn om13(&self) -> OM13_R { OM13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port x configuration bit 12"] #[inline(always)] pub fn om12(&self) -> OM12_R { OM12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port x configuration bit 11"] #[inline(always)] pub fn om11(&self) -> OM11_R { OM11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port x configuration bit 10"] #[inline(always)] pub fn om10(&self) -> OM10_R { OM10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port x configuration bit 9"] #[inline(always)] pub fn om9(&self) -> OM9_R { OM9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port x configuration bit 8"] #[inline(always)] pub fn om8(&self) -> OM8_R { OM8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port x configuration bit 7"] #[inline(always)] pub fn om7(&self) -> OM7_R { OM7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port x configuration bit 6"] #[inline(always)] pub fn om6(&self) -> OM6_R { OM6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port x configuration bit 5"] #[inline(always)] pub fn om5(&self) -> OM5_R { OM5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port x configuration bit 4"] #[inline(always)] pub fn om4(&self) -> OM4_R { OM4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port x configuration bit 3"] #[inline(always)] pub fn om3(&self) -> OM3_R { OM3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port x configuration bit 2"] #[inline(always)] pub fn om2(&self) -> OM2_R { OM2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port x configuration bit 1"] #[inline(always)] pub fn om1(&self) -> OM1_R { OM1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port x configuration bit 0"] #[inline(always)] pub fn om0(&self) -> OM0_R { OM0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Port x configuration bit 15"] #[inline(always)] pub fn om15(&mut self) -> OM15_W { OM15_W { w: self } } #[doc = "Bit 14 - Port x configuration bit 14"] #[inline(always)] pub fn om14(&mut self) -> OM14_W { OM14_W { w: self } } #[doc = "Bit 13 - Port x configuration bit 13"] #[inline(always)] pub fn om13(&mut self) -> OM13_W { OM13_W { w: self } } #[doc = "Bit 12 - Port x configuration bit 12"] #[inline(always)] pub fn om12(&mut self) -> OM12_W { OM12_W { w: self } } #[doc = "Bit 11 - Port x configuration bit 11"] #[inline(always)] pub fn om11(&mut self) -> OM11_W { OM11_W { w: self } } #[doc = "Bit 10 - Port x configuration bit 10"] #[inline(always)] pub fn om10(&mut self) -> OM10_W { OM10_W { w: self } } #[doc = "Bit 9 - Port x configuration bit 9"] #[inline(always)] pub fn om9(&mut self) -> OM9_W { OM9_W { w: self } } #[doc = "Bit 8 - Port x configuration bit 8"] #[inline(always)] pub fn om8(&mut self) -> OM8_W { OM8_W { w: self } } #[doc = "Bit 7 - Port x configuration bit 7"] #[inline(always)] pub fn om7(&mut self) -> OM7_W { OM7_W { w: self } } #[doc = "Bit 6 - Port x configuration bit 6"] #[inline(always)] pub fn om6(&mut self) -> OM6_W { OM6_W { w: self } } #[doc = "Bit 5 - Port x configuration bit 5"] #[inline(always)] pub fn om5(&mut self) -> OM5_W { OM5_W { w: self } } #[doc = "Bit 4 - Port x configuration bit 4"] #[inline(always)] pub fn om4(&mut self) -> OM4_W { OM4_W { w: self } } #[doc = "Bit 3 - Port x configuration bit 3"] #[inline(always)] pub fn om3(&mut self) -> OM3_W { OM3_W { w: self } } #[doc = "Bit 2 - Port x configuration bit 2"] #[inline(always)] pub fn om2(&mut self) -> OM2_W { OM2_W { w: self } } #[doc = "Bit 1 - Port x configuration bit 1"] #[inline(always)] pub fn om1(&mut self) -> OM1_W { OM1_W { w: self } } #[doc = "Bit 0 - Port x configuration bit 0"] #[inline(always)] pub fn om0(&mut self) -> OM0_W { OM0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output type register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [omode](index.html) module"] pub struct OMODE_SPEC; impl crate::RegisterSpec for OMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [omode::R](R) reader structure"] impl crate::Readable for OMODE_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [omode::W](W) writer structure"] impl crate::Writable for OMODE_SPEC { type Writer = W; } #[doc = "`reset()` method sets OMODE to value 0"] impl crate::Resettable for OMODE_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OSPD0 register accessor: an alias for `Reg`"] pub type OSPD0 = crate::Reg; #[doc = "GPIO port output speed register 0"] pub mod ospd0 { #[doc = "Register `OSPD0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OSPD0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OSPD15` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD15_R(crate::FieldReader); impl OSPD15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD15` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD15_W<'a> { w: &'a mut W, } impl<'a> OSPD15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `OSPD14` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD14_R(crate::FieldReader); impl OSPD14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD14` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD14_W<'a> { w: &'a mut W, } impl<'a> OSPD14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `OSPD13` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD13_R(crate::FieldReader); impl OSPD13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD13` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD13_W<'a> { w: &'a mut W, } impl<'a> OSPD13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `OSPD12` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD12_R(crate::FieldReader); impl OSPD12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD12` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD12_W<'a> { w: &'a mut W, } impl<'a> OSPD12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `OSPD11` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD11_R(crate::FieldReader); impl OSPD11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD11` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD11_W<'a> { w: &'a mut W, } impl<'a> OSPD11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `OSPD10` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD10_R(crate::FieldReader); impl OSPD10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD10` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD10_W<'a> { w: &'a mut W, } impl<'a> OSPD10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `OSPD9` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD9_R(crate::FieldReader); impl OSPD9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD9` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD9_W<'a> { w: &'a mut W, } impl<'a> OSPD9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `OSPD8` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD8_R(crate::FieldReader); impl OSPD8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD8` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD8_W<'a> { w: &'a mut W, } impl<'a> OSPD8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `OSPD7` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD7_R(crate::FieldReader); impl OSPD7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD7` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD7_W<'a> { w: &'a mut W, } impl<'a> OSPD7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `OSPD6` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD6_R(crate::FieldReader); impl OSPD6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD6` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD6_W<'a> { w: &'a mut W, } impl<'a> OSPD6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `OSPD5` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD5_R(crate::FieldReader); impl OSPD5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD5` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD5_W<'a> { w: &'a mut W, } impl<'a> OSPD5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `OSPD4` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD4_R(crate::FieldReader); impl OSPD4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD4` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD4_W<'a> { w: &'a mut W, } impl<'a> OSPD4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `OSPD3` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD3_R(crate::FieldReader); impl OSPD3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD3` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD3_W<'a> { w: &'a mut W, } impl<'a> OSPD3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `OSPD2` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD2_R(crate::FieldReader); impl OSPD2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD2` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD2_W<'a> { w: &'a mut W, } impl<'a> OSPD2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `OSPD1` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD1_R(crate::FieldReader); impl OSPD1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD1` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD1_W<'a> { w: &'a mut W, } impl<'a> OSPD1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `OSPD0` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD0_R(crate::FieldReader); impl OSPD0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD0` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD0_W<'a> { w: &'a mut W, } impl<'a> OSPD0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd15(&self) -> OSPD15_R { OSPD15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd14(&self) -> OSPD14_R { OSPD14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd13(&self) -> OSPD13_R { OSPD13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd12(&self) -> OSPD12_R { OSPD12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd11(&self) -> OSPD11_R { OSPD11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd10(&self) -> OSPD10_R { OSPD10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd9(&self) -> OSPD9_R { OSPD9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd8(&self) -> OSPD8_R { OSPD8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd7(&self) -> OSPD7_R { OSPD7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd6(&self) -> OSPD6_R { OSPD6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd5(&self) -> OSPD5_R { OSPD5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd4(&self) -> OSPD4_R { OSPD4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd3(&self) -> OSPD3_R { OSPD3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd2(&self) -> OSPD2_R { OSPD2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd1(&self) -> OSPD1_R { OSPD1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd0(&self) -> OSPD0_R { OSPD0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd15(&mut self) -> OSPD15_W { OSPD15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd14(&mut self) -> OSPD14_W { OSPD14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd13(&mut self) -> OSPD13_W { OSPD13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd12(&mut self) -> OSPD12_W { OSPD12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd11(&mut self) -> OSPD11_W { OSPD11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd10(&mut self) -> OSPD10_W { OSPD10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd9(&mut self) -> OSPD9_W { OSPD9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd8(&mut self) -> OSPD8_W { OSPD8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd7(&mut self) -> OSPD7_W { OSPD7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd6(&mut self) -> OSPD6_W { OSPD6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd5(&mut self) -> OSPD5_W { OSPD5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd4(&mut self) -> OSPD4_W { OSPD4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd3(&mut self) -> OSPD3_W { OSPD3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd2(&mut self) -> OSPD2_W { OSPD2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd1(&mut self) -> OSPD1_W { OSPD1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd0(&mut self) -> OSPD0_W { OSPD0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output speed register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd0](index.html) module"] pub struct OSPD0_SPEC; impl crate::RegisterSpec for OSPD0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ospd0::R](R) reader structure"] impl crate::Readable for OSPD0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ospd0::W](W) writer structure"] impl crate::Writable for OSPD0_SPEC { type Writer = W; } #[doc = "`reset()` method sets OSPD0 to value 0x0c00_0000"] impl crate::Resettable for OSPD0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0c00_0000 } } } #[doc = "PUD register accessor: an alias for `Reg`"] pub type PUD = crate::Reg; #[doc = "GPIO port pull-up/pull-down register"] pub mod pud { #[doc = "Register `PUD` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PUD` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PUD15` reader - Port x configuration bits (y = 0..15)"] pub struct PUD15_R(crate::FieldReader); impl PUD15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD15` writer - Port x configuration bits (y = 0..15)"] pub struct PUD15_W<'a> { w: &'a mut W, } impl<'a> PUD15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `PUD14` reader - Port x configuration bits (y = 0..15)"] pub struct PUD14_R(crate::FieldReader); impl PUD14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD14` writer - Port x configuration bits (y = 0..15)"] pub struct PUD14_W<'a> { w: &'a mut W, } impl<'a> PUD14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `PUD13` reader - Port x configuration bits (y = 0..15)"] pub struct PUD13_R(crate::FieldReader); impl PUD13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD13` writer - Port x configuration bits (y = 0..15)"] pub struct PUD13_W<'a> { w: &'a mut W, } impl<'a> PUD13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `PUD12` reader - Port x configuration bits (y = 0..15)"] pub struct PUD12_R(crate::FieldReader); impl PUD12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD12` writer - Port x configuration bits (y = 0..15)"] pub struct PUD12_W<'a> { w: &'a mut W, } impl<'a> PUD12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `PUD11` reader - Port x configuration bits (y = 0..15)"] pub struct PUD11_R(crate::FieldReader); impl PUD11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD11` writer - Port x configuration bits (y = 0..15)"] pub struct PUD11_W<'a> { w: &'a mut W, } impl<'a> PUD11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `PUD10` reader - Port x configuration bits (y = 0..15)"] pub struct PUD10_R(crate::FieldReader); impl PUD10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD10` writer - Port x configuration bits (y = 0..15)"] pub struct PUD10_W<'a> { w: &'a mut W, } impl<'a> PUD10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `PUD9` reader - Port x configuration bits (y = 0..15)"] pub struct PUD9_R(crate::FieldReader); impl PUD9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD9` writer - Port x configuration bits (y = 0..15)"] pub struct PUD9_W<'a> { w: &'a mut W, } impl<'a> PUD9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `PUD8` reader - Port x configuration bits (y = 0..15)"] pub struct PUD8_R(crate::FieldReader); impl PUD8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD8` writer - Port x configuration bits (y = 0..15)"] pub struct PUD8_W<'a> { w: &'a mut W, } impl<'a> PUD8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `PUD7` reader - Port x configuration bits (y = 0..15)"] pub struct PUD7_R(crate::FieldReader); impl PUD7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD7` writer - Port x configuration bits (y = 0..15)"] pub struct PUD7_W<'a> { w: &'a mut W, } impl<'a> PUD7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `PUD6` reader - Port x configuration bits (y = 0..15)"] pub struct PUD6_R(crate::FieldReader); impl PUD6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD6` writer - Port x configuration bits (y = 0..15)"] pub struct PUD6_W<'a> { w: &'a mut W, } impl<'a> PUD6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `PUD5` reader - Port x configuration bits (y = 0..15)"] pub struct PUD5_R(crate::FieldReader); impl PUD5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD5` writer - Port x configuration bits (y = 0..15)"] pub struct PUD5_W<'a> { w: &'a mut W, } impl<'a> PUD5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PUD4` reader - Port x configuration bits (y = 0..15)"] pub struct PUD4_R(crate::FieldReader); impl PUD4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD4` writer - Port x configuration bits (y = 0..15)"] pub struct PUD4_W<'a> { w: &'a mut W, } impl<'a> PUD4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `PUD3` reader - Port x configuration bits (y = 0..15)"] pub struct PUD3_R(crate::FieldReader); impl PUD3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD3` writer - Port x configuration bits (y = 0..15)"] pub struct PUD3_W<'a> { w: &'a mut W, } impl<'a> PUD3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `PUD2` reader - Port x configuration bits (y = 0..15)"] pub struct PUD2_R(crate::FieldReader); impl PUD2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD2` writer - Port x configuration bits (y = 0..15)"] pub struct PUD2_W<'a> { w: &'a mut W, } impl<'a> PUD2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `PUD1` reader - Port x configuration bits (y = 0..15)"] pub struct PUD1_R(crate::FieldReader); impl PUD1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD1` writer - Port x configuration bits (y = 0..15)"] pub struct PUD1_W<'a> { w: &'a mut W, } impl<'a> PUD1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `PUD0` reader - Port x configuration bits (y = 0..15)"] pub struct PUD0_R(crate::FieldReader); impl PUD0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD0` writer - Port x configuration bits (y = 0..15)"] pub struct PUD0_W<'a> { w: &'a mut W, } impl<'a> PUD0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud15(&self) -> PUD15_R { PUD15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud14(&self) -> PUD14_R { PUD14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud13(&self) -> PUD13_R { PUD13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud12(&self) -> PUD12_R { PUD12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud11(&self) -> PUD11_R { PUD11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud10(&self) -> PUD10_R { PUD10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud9(&self) -> PUD9_R { PUD9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud8(&self) -> PUD8_R { PUD8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud7(&self) -> PUD7_R { PUD7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud6(&self) -> PUD6_R { PUD6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud5(&self) -> PUD5_R { PUD5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud4(&self) -> PUD4_R { PUD4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud3(&self) -> PUD3_R { PUD3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud2(&self) -> PUD2_R { PUD2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud1(&self) -> PUD1_R { PUD1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud0(&self) -> PUD0_R { PUD0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud15(&mut self) -> PUD15_W { PUD15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud14(&mut self) -> PUD14_W { PUD14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud13(&mut self) -> PUD13_W { PUD13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud12(&mut self) -> PUD12_W { PUD12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud11(&mut self) -> PUD11_W { PUD11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud10(&mut self) -> PUD10_W { PUD10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud9(&mut self) -> PUD9_W { PUD9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud8(&mut self) -> PUD8_W { PUD8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud7(&mut self) -> PUD7_W { PUD7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud6(&mut self) -> PUD6_W { PUD6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud5(&mut self) -> PUD5_W { PUD5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud4(&mut self) -> PUD4_W { PUD4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud3(&mut self) -> PUD3_W { PUD3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud2(&mut self) -> PUD2_W { PUD2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud1(&mut self) -> PUD1_W { PUD1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud0(&mut self) -> PUD0_W { PUD0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port pull-up/pull-down register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pud](index.html) module"] pub struct PUD_SPEC; impl crate::RegisterSpec for PUD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [pud::R](R) reader structure"] impl crate::Readable for PUD_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [pud::W](W) writer structure"] impl crate::Writable for PUD_SPEC { type Writer = W; } #[doc = "`reset()` method sets PUD to value 0x2400_0000"] impl crate::Resettable for PUD_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x2400_0000 } } } #[doc = "ISTAT register accessor: an alias for `Reg`"] pub type ISTAT = crate::Reg; #[doc = "GPIO port input data register"] pub mod istat { #[doc = "Register `ISTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `ISTAT15` reader - Port input data (y = 0..15)"] pub struct ISTAT15_R(crate::FieldReader); impl ISTAT15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT14` reader - Port input data (y = 0..15)"] pub struct ISTAT14_R(crate::FieldReader); impl ISTAT14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT13` reader - Port input data (y = 0..15)"] pub struct ISTAT13_R(crate::FieldReader); impl ISTAT13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT12` reader - Port input data (y = 0..15)"] pub struct ISTAT12_R(crate::FieldReader); impl ISTAT12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT11` reader - Port input data (y = 0..15)"] pub struct ISTAT11_R(crate::FieldReader); impl ISTAT11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT10` reader - Port input data (y = 0..15)"] pub struct ISTAT10_R(crate::FieldReader); impl ISTAT10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT9` reader - Port input data (y = 0..15)"] pub struct ISTAT9_R(crate::FieldReader); impl ISTAT9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT8` reader - Port input data (y = 0..15)"] pub struct ISTAT8_R(crate::FieldReader); impl ISTAT8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT7` reader - Port input data (y = 0..15)"] pub struct ISTAT7_R(crate::FieldReader); impl ISTAT7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT6` reader - Port input data (y = 0..15)"] pub struct ISTAT6_R(crate::FieldReader); impl ISTAT6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT5` reader - Port input data (y = 0..15)"] pub struct ISTAT5_R(crate::FieldReader); impl ISTAT5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT4` reader - Port input data (y = 0..15)"] pub struct ISTAT4_R(crate::FieldReader); impl ISTAT4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT3` reader - Port input data (y = 0..15)"] pub struct ISTAT3_R(crate::FieldReader); impl ISTAT3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT2` reader - Port input data (y = 0..15)"] pub struct ISTAT2_R(crate::FieldReader); impl ISTAT2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT1` reader - Port input data (y = 0..15)"] pub struct ISTAT1_R(crate::FieldReader); impl ISTAT1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT0` reader - Port input data (y = 0..15)"] pub struct ISTAT0_R(crate::FieldReader); impl ISTAT0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 15 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat15(&self) -> ISTAT15_R { ISTAT15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat14(&self) -> ISTAT14_R { ISTAT14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat13(&self) -> ISTAT13_R { ISTAT13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat12(&self) -> ISTAT12_R { ISTAT12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat11(&self) -> ISTAT11_R { ISTAT11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat10(&self) -> ISTAT10_R { ISTAT10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat9(&self) -> ISTAT9_R { ISTAT9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat8(&self) -> ISTAT8_R { ISTAT8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat7(&self) -> ISTAT7_R { ISTAT7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat6(&self) -> ISTAT6_R { ISTAT6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat5(&self) -> ISTAT5_R { ISTAT5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat4(&self) -> ISTAT4_R { ISTAT4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat3(&self) -> ISTAT3_R { ISTAT3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat2(&self) -> ISTAT2_R { ISTAT2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat1(&self) -> ISTAT1_R { ISTAT1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat0(&self) -> ISTAT0_R { ISTAT0_R::new((self.bits & 0x01) != 0) } } #[doc = "GPIO port input data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [istat](index.html) module"] pub struct ISTAT_SPEC; impl crate::RegisterSpec for ISTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [istat::R](R) reader structure"] impl crate::Readable for ISTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets ISTAT to value 0"] impl crate::Resettable for ISTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OCTL register accessor: an alias for `Reg`"] pub type OCTL = crate::Reg; #[doc = "GPIO port output data register"] pub mod octl { #[doc = "Register `OCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OCTL15` reader - Port output data (y = 0..15)"] pub struct OCTL15_R(crate::FieldReader); impl OCTL15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL15` writer - Port output data (y = 0..15)"] pub struct OCTL15_W<'a> { w: &'a mut W, } impl<'a> OCTL15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OCTL14` reader - Port output data (y = 0..15)"] pub struct OCTL14_R(crate::FieldReader); impl OCTL14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL14` writer - Port output data (y = 0..15)"] pub struct OCTL14_W<'a> { w: &'a mut W, } impl<'a> OCTL14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `OCTL13` reader - Port output data (y = 0..15)"] pub struct OCTL13_R(crate::FieldReader); impl OCTL13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL13` writer - Port output data (y = 0..15)"] pub struct OCTL13_W<'a> { w: &'a mut W, } impl<'a> OCTL13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OCTL12` reader - Port output data (y = 0..15)"] pub struct OCTL12_R(crate::FieldReader); impl OCTL12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL12` writer - Port output data (y = 0..15)"] pub struct OCTL12_W<'a> { w: &'a mut W, } impl<'a> OCTL12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OCTL11` reader - Port output data (y = 0..15)"] pub struct OCTL11_R(crate::FieldReader); impl OCTL11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL11` writer - Port output data (y = 0..15)"] pub struct OCTL11_W<'a> { w: &'a mut W, } impl<'a> OCTL11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `OCTL10` reader - Port output data (y = 0..15)"] pub struct OCTL10_R(crate::FieldReader); impl OCTL10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL10` writer - Port output data (y = 0..15)"] pub struct OCTL10_W<'a> { w: &'a mut W, } impl<'a> OCTL10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OCTL9` reader - Port output data (y = 0..15)"] pub struct OCTL9_R(crate::FieldReader); impl OCTL9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL9` writer - Port output data (y = 0..15)"] pub struct OCTL9_W<'a> { w: &'a mut W, } impl<'a> OCTL9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OCTL8` reader - Port output data (y = 0..15)"] pub struct OCTL8_R(crate::FieldReader); impl OCTL8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL8` writer - Port output data (y = 0..15)"] pub struct OCTL8_W<'a> { w: &'a mut W, } impl<'a> OCTL8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OCTL7` reader - Port output data (y = 0..15)"] pub struct OCTL7_R(crate::FieldReader); impl OCTL7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL7` writer - Port output data (y = 0..15)"] pub struct OCTL7_W<'a> { w: &'a mut W, } impl<'a> OCTL7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `OCTL6` reader - Port output data (y = 0..15)"] pub struct OCTL6_R(crate::FieldReader); impl OCTL6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL6` writer - Port output data (y = 0..15)"] pub struct OCTL6_W<'a> { w: &'a mut W, } impl<'a> OCTL6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OCTL5` reader - Port output data (y = 0..15)"] pub struct OCTL5_R(crate::FieldReader); impl OCTL5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL5` writer - Port output data (y = 0..15)"] pub struct OCTL5_W<'a> { w: &'a mut W, } impl<'a> OCTL5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OCTL4` reader - Port output data (y = 0..15)"] pub struct OCTL4_R(crate::FieldReader); impl OCTL4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL4` writer - Port output data (y = 0..15)"] pub struct OCTL4_W<'a> { w: &'a mut W, } impl<'a> OCTL4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OCTL3` reader - Port output data (y = 0..15)"] pub struct OCTL3_R(crate::FieldReader); impl OCTL3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL3` writer - Port output data (y = 0..15)"] pub struct OCTL3_W<'a> { w: &'a mut W, } impl<'a> OCTL3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `OCTL2` reader - Port output data (y = 0..15)"] pub struct OCTL2_R(crate::FieldReader); impl OCTL2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL2` writer - Port output data (y = 0..15)"] pub struct OCTL2_W<'a> { w: &'a mut W, } impl<'a> OCTL2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `OCTL1` reader - Port output data (y = 0..15)"] pub struct OCTL1_R(crate::FieldReader); impl OCTL1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL1` writer - Port output data (y = 0..15)"] pub struct OCTL1_W<'a> { w: &'a mut W, } impl<'a> OCTL1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OCTL0` reader - Port output data (y = 0..15)"] pub struct OCTL0_R(crate::FieldReader); impl OCTL0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL0` writer - Port output data (y = 0..15)"] pub struct OCTL0_W<'a> { w: &'a mut W, } impl<'a> OCTL0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl15(&self) -> OCTL15_R { OCTL15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl14(&self) -> OCTL14_R { OCTL14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl13(&self) -> OCTL13_R { OCTL13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl12(&self) -> OCTL12_R { OCTL12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl11(&self) -> OCTL11_R { OCTL11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl10(&self) -> OCTL10_R { OCTL10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl9(&self) -> OCTL9_R { OCTL9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl8(&self) -> OCTL8_R { OCTL8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl7(&self) -> OCTL7_R { OCTL7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl6(&self) -> OCTL6_R { OCTL6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl5(&self) -> OCTL5_R { OCTL5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl4(&self) -> OCTL4_R { OCTL4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl3(&self) -> OCTL3_R { OCTL3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl2(&self) -> OCTL2_R { OCTL2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl1(&self) -> OCTL1_R { OCTL1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl0(&self) -> OCTL0_R { OCTL0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl15(&mut self) -> OCTL15_W { OCTL15_W { w: self } } #[doc = "Bit 14 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl14(&mut self) -> OCTL14_W { OCTL14_W { w: self } } #[doc = "Bit 13 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl13(&mut self) -> OCTL13_W { OCTL13_W { w: self } } #[doc = "Bit 12 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl12(&mut self) -> OCTL12_W { OCTL12_W { w: self } } #[doc = "Bit 11 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl11(&mut self) -> OCTL11_W { OCTL11_W { w: self } } #[doc = "Bit 10 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl10(&mut self) -> OCTL10_W { OCTL10_W { w: self } } #[doc = "Bit 9 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl9(&mut self) -> OCTL9_W { OCTL9_W { w: self } } #[doc = "Bit 8 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl8(&mut self) -> OCTL8_W { OCTL8_W { w: self } } #[doc = "Bit 7 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl7(&mut self) -> OCTL7_W { OCTL7_W { w: self } } #[doc = "Bit 6 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl6(&mut self) -> OCTL6_W { OCTL6_W { w: self } } #[doc = "Bit 5 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl5(&mut self) -> OCTL5_W { OCTL5_W { w: self } } #[doc = "Bit 4 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl4(&mut self) -> OCTL4_W { OCTL4_W { w: self } } #[doc = "Bit 3 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl3(&mut self) -> OCTL3_W { OCTL3_W { w: self } } #[doc = "Bit 2 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl2(&mut self) -> OCTL2_W { OCTL2_W { w: self } } #[doc = "Bit 1 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl1(&mut self) -> OCTL1_W { OCTL1_W { w: self } } #[doc = "Bit 0 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl0(&mut self) -> OCTL0_W { OCTL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [octl](index.html) module"] pub struct OCTL_SPEC; impl crate::RegisterSpec for OCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [octl::R](R) reader structure"] impl crate::Readable for OCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [octl::W](W) writer structure"] impl crate::Writable for OCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets OCTL to value 0"] impl crate::Resettable for OCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BOP register accessor: an alias for `Reg`"] pub type BOP = crate::Reg; #[doc = "GPIO port bit set/reset register"] pub mod bop { #[doc = "Register `BOP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CR15` writer - Port x reset bit y (y = 0..15)"] pub struct CR15_W<'a> { w: &'a mut W, } impl<'a> CR15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `CR14` writer - Port x reset bit y (y = 0..15)"] pub struct CR14_W<'a> { w: &'a mut W, } impl<'a> CR14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CR13` writer - Port x reset bit y (y = 0..15)"] pub struct CR13_W<'a> { w: &'a mut W, } impl<'a> CR13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CR12` writer - Port x reset bit y (y = 0..15)"] pub struct CR12_W<'a> { w: &'a mut W, } impl<'a> CR12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `CR11` writer - Port x reset bit y (y = 0..15)"] pub struct CR11_W<'a> { w: &'a mut W, } impl<'a> CR11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CR10` writer - Port x reset bit y (y = 0..15)"] pub struct CR10_W<'a> { w: &'a mut W, } impl<'a> CR10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `CR9` writer - Port x reset bit y (y = 0..15)"] pub struct CR9_W<'a> { w: &'a mut W, } impl<'a> CR9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); self.w } } #[doc = "Field `CR8` writer - Port x reset bit y (y = 0..15)"] pub struct CR8_W<'a> { w: &'a mut W, } impl<'a> CR8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `CR7` writer - Port x reset bit y (y = 0..15)"] pub struct CR7_W<'a> { w: &'a mut W, } impl<'a> CR7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `CR6` writer - Port x reset bit y (y = 0..15)"] pub struct CR6_W<'a> { w: &'a mut W, } impl<'a> CR6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `CR5` writer - Port x reset bit y (y = 0..15)"] pub struct CR5_W<'a> { w: &'a mut W, } impl<'a> CR5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `CR4` writer - Port x reset bit y (y = 0..15)"] pub struct CR4_W<'a> { w: &'a mut W, } impl<'a> CR4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `CR3` writer - Port x reset bit y (y = 0..15)"] pub struct CR3_W<'a> { w: &'a mut W, } impl<'a> CR3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `CR2` writer - Port x reset bit y (y = 0..15)"] pub struct CR2_W<'a> { w: &'a mut W, } impl<'a> CR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `CR1` writer - Port x reset bit y (y = 0..15)"] pub struct CR1_W<'a> { w: &'a mut W, } impl<'a> CR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `CR0` writer - Port x reset bit y (y= 0..15)"] pub struct CR0_W<'a> { w: &'a mut W, } impl<'a> CR0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `BOP15` writer - Port x set bit y (y= 0..15)"] pub struct BOP15_W<'a> { w: &'a mut W, } impl<'a> BOP15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `BOP14` writer - Port x set bit y (y= 0..15)"] pub struct BOP14_W<'a> { w: &'a mut W, } impl<'a> BOP14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `BOP13` writer - Port x set bit y (y= 0..15)"] pub struct BOP13_W<'a> { w: &'a mut W, } impl<'a> BOP13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `BOP12` writer - Port x set bit y (y= 0..15)"] pub struct BOP12_W<'a> { w: &'a mut W, } impl<'a> BOP12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `BOP11` writer - Port x set bit y (y= 0..15)"] pub struct BOP11_W<'a> { w: &'a mut W, } impl<'a> BOP11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `BOP10` writer - Port x set bit y (y= 0..15)"] pub struct BOP10_W<'a> { w: &'a mut W, } impl<'a> BOP10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `BOP9` writer - Port x set bit y (y= 0..15)"] pub struct BOP9_W<'a> { w: &'a mut W, } impl<'a> BOP9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `BOP8` writer - Port x set bit y (y= 0..15)"] pub struct BOP8_W<'a> { w: &'a mut W, } impl<'a> BOP8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `BOP7` writer - Port x set bit y (y= 0..15)"] pub struct BOP7_W<'a> { w: &'a mut W, } impl<'a> BOP7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BOP6` writer - Port x set bit y (y= 0..15)"] pub struct BOP6_W<'a> { w: &'a mut W, } impl<'a> BOP6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `BOP5` writer - Port x set bit y (y= 0..15)"] pub struct BOP5_W<'a> { w: &'a mut W, } impl<'a> BOP5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `BOP4` writer - Port x set bit y (y= 0..15)"] pub struct BOP4_W<'a> { w: &'a mut W, } impl<'a> BOP4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `BOP3` writer - Port x set bit y (y= 0..15)"] pub struct BOP3_W<'a> { w: &'a mut W, } impl<'a> BOP3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `BOP2` writer - Port x set bit y (y= 0..15)"] pub struct BOP2_W<'a> { w: &'a mut W, } impl<'a> BOP2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `BOP1` writer - Port x set bit y (y= 0..15)"] pub struct BOP1_W<'a> { w: &'a mut W, } impl<'a> BOP1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `BOP0` writer - Port x set bit y (y= 0..15)"] pub struct BOP0_W<'a> { w: &'a mut W, } impl<'a> BOP0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 31 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr15(&mut self) -> CR15_W { CR15_W { w: self } } #[doc = "Bit 30 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr14(&mut self) -> CR14_W { CR14_W { w: self } } #[doc = "Bit 29 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr13(&mut self) -> CR13_W { CR13_W { w: self } } #[doc = "Bit 28 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr12(&mut self) -> CR12_W { CR12_W { w: self } } #[doc = "Bit 27 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr11(&mut self) -> CR11_W { CR11_W { w: self } } #[doc = "Bit 26 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr10(&mut self) -> CR10_W { CR10_W { w: self } } #[doc = "Bit 25 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr9(&mut self) -> CR9_W { CR9_W { w: self } } #[doc = "Bit 24 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr8(&mut self) -> CR8_W { CR8_W { w: self } } #[doc = "Bit 23 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr7(&mut self) -> CR7_W { CR7_W { w: self } } #[doc = "Bit 22 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr6(&mut self) -> CR6_W { CR6_W { w: self } } #[doc = "Bit 21 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr5(&mut self) -> CR5_W { CR5_W { w: self } } #[doc = "Bit 20 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr4(&mut self) -> CR4_W { CR4_W { w: self } } #[doc = "Bit 19 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr3(&mut self) -> CR3_W { CR3_W { w: self } } #[doc = "Bit 18 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr2(&mut self) -> CR2_W { CR2_W { w: self } } #[doc = "Bit 17 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr1(&mut self) -> CR1_W { CR1_W { w: self } } #[doc = "Bit 16 - Port x reset bit y (y= 0..15)"] #[inline(always)] pub fn cr0(&mut self) -> CR0_W { CR0_W { w: self } } #[doc = "Bit 15 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop15(&mut self) -> BOP15_W { BOP15_W { w: self } } #[doc = "Bit 14 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop14(&mut self) -> BOP14_W { BOP14_W { w: self } } #[doc = "Bit 13 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop13(&mut self) -> BOP13_W { BOP13_W { w: self } } #[doc = "Bit 12 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop12(&mut self) -> BOP12_W { BOP12_W { w: self } } #[doc = "Bit 11 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop11(&mut self) -> BOP11_W { BOP11_W { w: self } } #[doc = "Bit 10 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop10(&mut self) -> BOP10_W { BOP10_W { w: self } } #[doc = "Bit 9 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop9(&mut self) -> BOP9_W { BOP9_W { w: self } } #[doc = "Bit 8 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop8(&mut self) -> BOP8_W { BOP8_W { w: self } } #[doc = "Bit 7 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop7(&mut self) -> BOP7_W { BOP7_W { w: self } } #[doc = "Bit 6 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop6(&mut self) -> BOP6_W { BOP6_W { w: self } } #[doc = "Bit 5 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop5(&mut self) -> BOP5_W { BOP5_W { w: self } } #[doc = "Bit 4 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop4(&mut self) -> BOP4_W { BOP4_W { w: self } } #[doc = "Bit 3 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop3(&mut self) -> BOP3_W { BOP3_W { w: self } } #[doc = "Bit 2 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop2(&mut self) -> BOP2_W { BOP2_W { w: self } } #[doc = "Bit 1 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop1(&mut self) -> BOP1_W { BOP1_W { w: self } } #[doc = "Bit 0 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop0(&mut self) -> BOP0_W { BOP0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port bit set/reset register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bop](index.html) module"] pub struct BOP_SPEC; impl crate::RegisterSpec for BOP_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [bop::W](W) writer structure"] impl crate::Writable for BOP_SPEC { type Writer = W; } #[doc = "`reset()` method sets BOP to value 0"] impl crate::Resettable for BOP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "LOCK register accessor: an alias for `Reg`"] pub type LOCK = crate::Reg; #[doc = "GPIO port configuration lock register"] pub mod lock { #[doc = "Register `LOCK` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `LOCK` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `LKK` reader - Port x lock bit y"] pub struct LKK_R(crate::FieldReader); impl LKK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LKK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LKK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LKK` writer - Port x lock bit y"] pub struct LKK_W<'a> { w: &'a mut W, } impl<'a> LKK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `LK15` reader - Port x lock bit y (y= 0..15)"] pub struct LK15_R(crate::FieldReader); impl LK15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK15` writer - Port x lock bit y (y= 0..15)"] pub struct LK15_W<'a> { w: &'a mut W, } impl<'a> LK15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LK14` reader - Port x lock bit y (y= 0..15)"] pub struct LK14_R(crate::FieldReader); impl LK14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK14` writer - Port x lock bit y (y= 0..15)"] pub struct LK14_W<'a> { w: &'a mut W, } impl<'a> LK14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `LK13` reader - Port x lock bit y (y= 0..15)"] pub struct LK13_R(crate::FieldReader); impl LK13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK13` writer - Port x lock bit y (y= 0..15)"] pub struct LK13_W<'a> { w: &'a mut W, } impl<'a> LK13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `LK12` reader - Port x lock bit y (y= 0..15)"] pub struct LK12_R(crate::FieldReader); impl LK12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK12` writer - Port x lock bit y (y= 0..15)"] pub struct LK12_W<'a> { w: &'a mut W, } impl<'a> LK12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `LK11` reader - Port x lock bit y (y= 0..15)"] pub struct LK11_R(crate::FieldReader); impl LK11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK11` writer - Port x lock bit y (y= 0..15)"] pub struct LK11_W<'a> { w: &'a mut W, } impl<'a> LK11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `LK10` reader - Port x lock bit y (y= 0..15)"] pub struct LK10_R(crate::FieldReader); impl LK10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK10` writer - Port x lock bit y (y= 0..15)"] pub struct LK10_W<'a> { w: &'a mut W, } impl<'a> LK10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `LK9` reader - Port x lock bit y (y= 0..15)"] pub struct LK9_R(crate::FieldReader); impl LK9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK9` writer - Port x lock bit y (y= 0..15)"] pub struct LK9_W<'a> { w: &'a mut W, } impl<'a> LK9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `LK8` reader - Port x lock bit y (y= 0..15)"] pub struct LK8_R(crate::FieldReader); impl LK8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK8` writer - Port x lock bit y (y= 0..15)"] pub struct LK8_W<'a> { w: &'a mut W, } impl<'a> LK8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `LK7` reader - Port x lock bit y (y= 0..15)"] pub struct LK7_R(crate::FieldReader); impl LK7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK7` writer - Port x lock bit y (y= 0..15)"] pub struct LK7_W<'a> { w: &'a mut W, } impl<'a> LK7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `LK6` reader - Port x lock bit y (y= 0..15)"] pub struct LK6_R(crate::FieldReader); impl LK6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK6` writer - Port x lock bit y (y= 0..15)"] pub struct LK6_W<'a> { w: &'a mut W, } impl<'a> LK6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `LK5` reader - Port x lock bit y (y= 0..15)"] pub struct LK5_R(crate::FieldReader); impl LK5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK5` writer - Port x lock bit y (y= 0..15)"] pub struct LK5_W<'a> { w: &'a mut W, } impl<'a> LK5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `LK4` reader - Port x lock bit y (y= 0..15)"] pub struct LK4_R(crate::FieldReader); impl LK4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK4` writer - Port x lock bit y (y= 0..15)"] pub struct LK4_W<'a> { w: &'a mut W, } impl<'a> LK4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `LK3` reader - Port x lock bit y (y= 0..15)"] pub struct LK3_R(crate::FieldReader); impl LK3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK3` writer - Port x lock bit y (y= 0..15)"] pub struct LK3_W<'a> { w: &'a mut W, } impl<'a> LK3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `LK2` reader - Port x lock bit y (y= 0..15)"] pub struct LK2_R(crate::FieldReader); impl LK2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK2` writer - Port x lock bit y (y= 0..15)"] pub struct LK2_W<'a> { w: &'a mut W, } impl<'a> LK2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `LK1` reader - Port x lock bit y (y= 0..15)"] pub struct LK1_R(crate::FieldReader); impl LK1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK1` writer - Port x lock bit y (y= 0..15)"] pub struct LK1_W<'a> { w: &'a mut W, } impl<'a> LK1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `LK0` reader - Port x lock bit y (y= 0..15)"] pub struct LK0_R(crate::FieldReader); impl LK0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK0` writer - Port x lock bit y (y= 0..15)"] pub struct LK0_W<'a> { w: &'a mut W, } impl<'a> LK0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 16 - Port x lock bit y"] #[inline(always)] pub fn lkk(&self) -> LKK_R { LKK_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk15(&self) -> LK15_R { LK15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk14(&self) -> LK14_R { LK14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk13(&self) -> LK13_R { LK13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk12(&self) -> LK12_R { LK12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk11(&self) -> LK11_R { LK11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk10(&self) -> LK10_R { LK10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk9(&self) -> LK9_R { LK9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk8(&self) -> LK8_R { LK8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk7(&self) -> LK7_R { LK7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk6(&self) -> LK6_R { LK6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk5(&self) -> LK5_R { LK5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk4(&self) -> LK4_R { LK4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk3(&self) -> LK3_R { LK3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk2(&self) -> LK2_R { LK2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk1(&self) -> LK1_R { LK1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk0(&self) -> LK0_R { LK0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 16 - Port x lock bit y"] #[inline(always)] pub fn lkk(&mut self) -> LKK_W { LKK_W { w: self } } #[doc = "Bit 15 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk15(&mut self) -> LK15_W { LK15_W { w: self } } #[doc = "Bit 14 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk14(&mut self) -> LK14_W { LK14_W { w: self } } #[doc = "Bit 13 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk13(&mut self) -> LK13_W { LK13_W { w: self } } #[doc = "Bit 12 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk12(&mut self) -> LK12_W { LK12_W { w: self } } #[doc = "Bit 11 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk11(&mut self) -> LK11_W { LK11_W { w: self } } #[doc = "Bit 10 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk10(&mut self) -> LK10_W { LK10_W { w: self } } #[doc = "Bit 9 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk9(&mut self) -> LK9_W { LK9_W { w: self } } #[doc = "Bit 8 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk8(&mut self) -> LK8_W { LK8_W { w: self } } #[doc = "Bit 7 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk7(&mut self) -> LK7_W { LK7_W { w: self } } #[doc = "Bit 6 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk6(&mut self) -> LK6_W { LK6_W { w: self } } #[doc = "Bit 5 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk5(&mut self) -> LK5_W { LK5_W { w: self } } #[doc = "Bit 4 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk4(&mut self) -> LK4_W { LK4_W { w: self } } #[doc = "Bit 3 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk3(&mut self) -> LK3_W { LK3_W { w: self } } #[doc = "Bit 2 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk2(&mut self) -> LK2_W { LK2_W { w: self } } #[doc = "Bit 1 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk1(&mut self) -> LK1_W { LK1_W { w: self } } #[doc = "Bit 0 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk0(&mut self) -> LK0_W { LK0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port configuration lock register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] pub struct LOCK_SPEC; impl crate::RegisterSpec for LOCK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [lock::R](R) reader structure"] impl crate::Readable for LOCK_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] impl crate::Writable for LOCK_SPEC { type Writer = W; } #[doc = "`reset()` method sets LOCK to value 0"] impl crate::Resettable for LOCK_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "AFSEL0 register accessor: an alias for `Reg`"] pub type AFSEL0 = crate::Reg; #[doc = "GPIO alternate function low register"] pub mod afsel0 { #[doc = "Register `AFSEL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `AFSEL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SEL7` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL7_R(crate::FieldReader); impl SEL7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL7` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL7_W<'a> { w: &'a mut W, } impl<'a> SEL7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 28)) | ((value as u32 & 0x0f) << 28); self.w } } #[doc = "Field `SEL6` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL6_R(crate::FieldReader); impl SEL6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL6` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL6_W<'a> { w: &'a mut W, } impl<'a> SEL6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); self.w } } #[doc = "Field `SEL5` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL5_R(crate::FieldReader); impl SEL5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL5` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL5_W<'a> { w: &'a mut W, } impl<'a> SEL5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 20)) | ((value as u32 & 0x0f) << 20); self.w } } #[doc = "Field `SEL4` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL4_R(crate::FieldReader); impl SEL4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL4` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL4_W<'a> { w: &'a mut W, } impl<'a> SEL4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16); self.w } } #[doc = "Field `SEL3` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL3_R(crate::FieldReader); impl SEL3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL3` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL3_W<'a> { w: &'a mut W, } impl<'a> SEL3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `SEL2` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL2_R(crate::FieldReader); impl SEL2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL2` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL2_W<'a> { w: &'a mut W, } impl<'a> SEL2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `SEL1` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL1_R(crate::FieldReader); impl SEL1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL1` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL1_W<'a> { w: &'a mut W, } impl<'a> SEL1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `SEL0` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL0_R(crate::FieldReader); impl SEL0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL0` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL0_W<'a> { w: &'a mut W, } impl<'a> SEL0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel7(&self) -> SEL7_R { SEL7_R::new(((self.bits >> 28) & 0x0f) as u8) } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel6(&self) -> SEL6_R { SEL6_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel5(&self) -> SEL5_R { SEL5_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel4(&self) -> SEL4_R { SEL4_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel3(&self) -> SEL3_R { SEL3_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel2(&self) -> SEL2_R { SEL2_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel1(&self) -> SEL1_R { SEL1_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel0(&self) -> SEL0_R { SEL0_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel7(&mut self) -> SEL7_W { SEL7_W { w: self } } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel6(&mut self) -> SEL6_W { SEL6_W { w: self } } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel5(&mut self) -> SEL5_W { SEL5_W { w: self } } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel4(&mut self) -> SEL4_W { SEL4_W { w: self } } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel3(&mut self) -> SEL3_W { SEL3_W { w: self } } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel2(&mut self) -> SEL2_W { SEL2_W { w: self } } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel1(&mut self) -> SEL1_W { SEL1_W { w: self } } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel0(&mut self) -> SEL0_W { SEL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO alternate function low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afsel0](index.html) module"] pub struct AFSEL0_SPEC; impl crate::RegisterSpec for AFSEL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [afsel0::R](R) reader structure"] impl crate::Readable for AFSEL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [afsel0::W](W) writer structure"] impl crate::Writable for AFSEL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets AFSEL0 to value 0"] impl crate::Resettable for AFSEL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "AFSEL1 register accessor: an alias for `Reg`"] pub type AFSEL1 = crate::Reg; #[doc = "GPIO alternate function register 1"] pub mod afsel1 { #[doc = "Register `AFSEL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `AFSEL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SEL15` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL15_R(crate::FieldReader); impl SEL15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL15` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL15_W<'a> { w: &'a mut W, } impl<'a> SEL15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 28)) | ((value as u32 & 0x0f) << 28); self.w } } #[doc = "Field `SEL14` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL14_R(crate::FieldReader); impl SEL14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL14` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL14_W<'a> { w: &'a mut W, } impl<'a> SEL14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); self.w } } #[doc = "Field `SEL13` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL13_R(crate::FieldReader); impl SEL13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL13` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL13_W<'a> { w: &'a mut W, } impl<'a> SEL13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 20)) | ((value as u32 & 0x0f) << 20); self.w } } #[doc = "Field `SEL12` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL12_R(crate::FieldReader); impl SEL12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL12` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL12_W<'a> { w: &'a mut W, } impl<'a> SEL12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16); self.w } } #[doc = "Field `SEL11` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL11_R(crate::FieldReader); impl SEL11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL11` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL11_W<'a> { w: &'a mut W, } impl<'a> SEL11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `SEL10` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL10_R(crate::FieldReader); impl SEL10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL10` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL10_W<'a> { w: &'a mut W, } impl<'a> SEL10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `SEL9` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL9_R(crate::FieldReader); impl SEL9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL9` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL9_W<'a> { w: &'a mut W, } impl<'a> SEL9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `SEL8` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL8_R(crate::FieldReader); impl SEL8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL8` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL8_W<'a> { w: &'a mut W, } impl<'a> SEL8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel15(&self) -> SEL15_R { SEL15_R::new(((self.bits >> 28) & 0x0f) as u8) } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel14(&self) -> SEL14_R { SEL14_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel13(&self) -> SEL13_R { SEL13_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel12(&self) -> SEL12_R { SEL12_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel11(&self) -> SEL11_R { SEL11_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel10(&self) -> SEL10_R { SEL10_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel9(&self) -> SEL9_R { SEL9_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel8(&self) -> SEL8_R { SEL8_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel15(&mut self) -> SEL15_W { SEL15_W { w: self } } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel14(&mut self) -> SEL14_W { SEL14_W { w: self } } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel13(&mut self) -> SEL13_W { SEL13_W { w: self } } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel12(&mut self) -> SEL12_W { SEL12_W { w: self } } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel11(&mut self) -> SEL11_W { SEL11_W { w: self } } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel10(&mut self) -> SEL10_W { SEL10_W { w: self } } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel9(&mut self) -> SEL9_W { SEL9_W { w: self } } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel8(&mut self) -> SEL8_W { SEL8_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO alternate function register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afsel1](index.html) module"] pub struct AFSEL1_SPEC; impl crate::RegisterSpec for AFSEL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [afsel1::R](R) reader structure"] impl crate::Readable for AFSEL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [afsel1::W](W) writer structure"] impl crate::Writable for AFSEL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets AFSEL1 to value 0"] impl crate::Resettable for AFSEL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BC register accessor: an alias for `Reg`"] pub type BC = crate::Reg; #[doc = "Port bit reset register"] pub mod bc { #[doc = "Register `BC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CR0` writer - Port cleat bit"] pub struct CR0_W<'a> { w: &'a mut W, } impl<'a> CR0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CR1` writer - Port cleat bit"] pub struct CR1_W<'a> { w: &'a mut W, } impl<'a> CR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CR2` writer - Port cleat bit"] pub struct CR2_W<'a> { w: &'a mut W, } impl<'a> CR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CR3` writer - Port cleat bit"] pub struct CR3_W<'a> { w: &'a mut W, } impl<'a> CR3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CR4` writer - Port cleat bit"] pub struct CR4_W<'a> { w: &'a mut W, } impl<'a> CR4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CR5` writer - Port cleat bit"] pub struct CR5_W<'a> { w: &'a mut W, } impl<'a> CR5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CR6` writer - Port cleat bit"] pub struct CR6_W<'a> { w: &'a mut W, } impl<'a> CR6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CR7` writer - Port cleat bit"] pub struct CR7_W<'a> { w: &'a mut W, } impl<'a> CR7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CR8` writer - Port cleat bit"] pub struct CR8_W<'a> { w: &'a mut W, } impl<'a> CR8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CR9` writer - Port cleat bit"] pub struct CR9_W<'a> { w: &'a mut W, } impl<'a> CR9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CR10` writer - Port cleat bit"] pub struct CR10_W<'a> { w: &'a mut W, } impl<'a> CR10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CR11` writer - Port cleat bit"] pub struct CR11_W<'a> { w: &'a mut W, } impl<'a> CR11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CR12` writer - Port cleat bit"] pub struct CR12_W<'a> { w: &'a mut W, } impl<'a> CR12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CR13` writer - Port cleat bit"] pub struct CR13_W<'a> { w: &'a mut W, } impl<'a> CR13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CR14` writer - Port cleat bit"] pub struct CR14_W<'a> { w: &'a mut W, } impl<'a> CR14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CR15` writer - Port cleat bit"] pub struct CR15_W<'a> { w: &'a mut W, } impl<'a> CR15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - Port cleat bit"] #[inline(always)] pub fn cr0(&mut self) -> CR0_W { CR0_W { w: self } } #[doc = "Bit 1 - Port cleat bit"] #[inline(always)] pub fn cr1(&mut self) -> CR1_W { CR1_W { w: self } } #[doc = "Bit 2 - Port cleat bit"] #[inline(always)] pub fn cr2(&mut self) -> CR2_W { CR2_W { w: self } } #[doc = "Bit 3 - Port cleat bit"] #[inline(always)] pub fn cr3(&mut self) -> CR3_W { CR3_W { w: self } } #[doc = "Bit 4 - Port cleat bit"] #[inline(always)] pub fn cr4(&mut self) -> CR4_W { CR4_W { w: self } } #[doc = "Bit 5 - Port cleat bit"] #[inline(always)] pub fn cr5(&mut self) -> CR5_W { CR5_W { w: self } } #[doc = "Bit 6 - Port cleat bit"] #[inline(always)] pub fn cr6(&mut self) -> CR6_W { CR6_W { w: self } } #[doc = "Bit 7 - Port cleat bit"] #[inline(always)] pub fn cr7(&mut self) -> CR7_W { CR7_W { w: self } } #[doc = "Bit 8 - Port cleat bit"] #[inline(always)] pub fn cr8(&mut self) -> CR8_W { CR8_W { w: self } } #[doc = "Bit 9 - Port cleat bit"] #[inline(always)] pub fn cr9(&mut self) -> CR9_W { CR9_W { w: self } } #[doc = "Bit 10 - Port cleat bit"] #[inline(always)] pub fn cr10(&mut self) -> CR10_W { CR10_W { w: self } } #[doc = "Bit 11 - Port cleat bit"] #[inline(always)] pub fn cr11(&mut self) -> CR11_W { CR11_W { w: self } } #[doc = "Bit 12 - Port cleat bit"] #[inline(always)] pub fn cr12(&mut self) -> CR12_W { CR12_W { w: self } } #[doc = "Bit 13 - Port cleat bit"] #[inline(always)] pub fn cr13(&mut self) -> CR13_W { CR13_W { w: self } } #[doc = "Bit 14 - Port cleat bit"] #[inline(always)] pub fn cr14(&mut self) -> CR14_W { CR14_W { w: self } } #[doc = "Bit 15 - Port cleat bit"] #[inline(always)] pub fn cr15(&mut self) -> CR15_W { CR15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port bit reset register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bc](index.html) module"] pub struct BC_SPEC; impl crate::RegisterSpec for BC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [bc::W](W) writer structure"] impl crate::Writable for BC_SPEC { type Writer = W; } #[doc = "`reset()` method sets BC to value 0"] impl crate::Resettable for BC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "TG register accessor: an alias for `Reg`"] pub type TG = crate::Reg; #[doc = "Port bit toggle register"] pub mod tg { #[doc = "Register `TG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TG0` writer - Port toggle bit"] pub struct TG0_W<'a> { w: &'a mut W, } impl<'a> TG0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `TG1` writer - Port toggle bit"] pub struct TG1_W<'a> { w: &'a mut W, } impl<'a> TG1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TG2` writer - Port toggle bit"] pub struct TG2_W<'a> { w: &'a mut W, } impl<'a> TG2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `TG3` writer - Port toggle bit"] pub struct TG3_W<'a> { w: &'a mut W, } impl<'a> TG3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `TG4` writer - Port toggle bit"] pub struct TG4_W<'a> { w: &'a mut W, } impl<'a> TG4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TG5` writer - Port toggle bit"] pub struct TG5_W<'a> { w: &'a mut W, } impl<'a> TG5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `TG6` writer - Port toggle bit"] pub struct TG6_W<'a> { w: &'a mut W, } impl<'a> TG6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `TG7` writer - Port toggle bit"] pub struct TG7_W<'a> { w: &'a mut W, } impl<'a> TG7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TG8` writer - Port toggle bit"] pub struct TG8_W<'a> { w: &'a mut W, } impl<'a> TG8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TG9` writer - Port toggle bit"] pub struct TG9_W<'a> { w: &'a mut W, } impl<'a> TG9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `TG10` writer - Port toggle bit"] pub struct TG10_W<'a> { w: &'a mut W, } impl<'a> TG10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `TG11` writer - Port toggle bit"] pub struct TG11_W<'a> { w: &'a mut W, } impl<'a> TG11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TG12` writer - Port toggle bit"] pub struct TG12_W<'a> { w: &'a mut W, } impl<'a> TG12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TG13` writer - Port toggle bit"] pub struct TG13_W<'a> { w: &'a mut W, } impl<'a> TG13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `TG14` writer - Port toggle bit"] pub struct TG14_W<'a> { w: &'a mut W, } impl<'a> TG14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `TG15` writer - Port toggle bit"] pub struct TG15_W<'a> { w: &'a mut W, } impl<'a> TG15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - Port toggle bit"] #[inline(always)] pub fn tg0(&mut self) -> TG0_W { TG0_W { w: self } } #[doc = "Bit 1 - Port toggle bit"] #[inline(always)] pub fn tg1(&mut self) -> TG1_W { TG1_W { w: self } } #[doc = "Bit 2 - Port toggle bit"] #[inline(always)] pub fn tg2(&mut self) -> TG2_W { TG2_W { w: self } } #[doc = "Bit 3 - Port toggle bit"] #[inline(always)] pub fn tg3(&mut self) -> TG3_W { TG3_W { w: self } } #[doc = "Bit 4 - Port toggle bit"] #[inline(always)] pub fn tg4(&mut self) -> TG4_W { TG4_W { w: self } } #[doc = "Bit 5 - Port toggle bit"] #[inline(always)] pub fn tg5(&mut self) -> TG5_W { TG5_W { w: self } } #[doc = "Bit 6 - Port toggle bit"] #[inline(always)] pub fn tg6(&mut self) -> TG6_W { TG6_W { w: self } } #[doc = "Bit 7 - Port toggle bit"] #[inline(always)] pub fn tg7(&mut self) -> TG7_W { TG7_W { w: self } } #[doc = "Bit 8 - Port toggle bit"] #[inline(always)] pub fn tg8(&mut self) -> TG8_W { TG8_W { w: self } } #[doc = "Bit 9 - Port toggle bit"] #[inline(always)] pub fn tg9(&mut self) -> TG9_W { TG9_W { w: self } } #[doc = "Bit 10 - Port toggle bit"] #[inline(always)] pub fn tg10(&mut self) -> TG10_W { TG10_W { w: self } } #[doc = "Bit 11 - Port toggle bit"] #[inline(always)] pub fn tg11(&mut self) -> TG11_W { TG11_W { w: self } } #[doc = "Bit 12 - Port toggle bit"] #[inline(always)] pub fn tg12(&mut self) -> TG12_W { TG12_W { w: self } } #[doc = "Bit 13 - Port toggle bit"] #[inline(always)] pub fn tg13(&mut self) -> TG13_W { TG13_W { w: self } } #[doc = "Bit 14 - Port toggle bit"] #[inline(always)] pub fn tg14(&mut self) -> TG14_W { TG14_W { w: self } } #[doc = "Bit 15 - Port toggle bit"] #[inline(always)] pub fn tg15(&mut self) -> TG15_W { TG15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port bit toggle register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tg](index.html) module"] pub struct TG_SPEC; impl crate::RegisterSpec for TG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [tg::W](W) writer structure"] impl crate::Writable for TG_SPEC { type Writer = W; } #[doc = "`reset()` method sets TG to value 0"] impl crate::Resettable for TG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OSPD1 register accessor: an alias for `Reg`"] pub type OSPD1 = crate::Reg; #[doc = "Port output speed register 1"] pub mod ospd1 { #[doc = "Register `OSPD1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OSPD1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SPD0` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD0_R(crate::FieldReader); impl SPD0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD0` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD0_W<'a> { w: &'a mut W, } impl<'a> SPD0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `SPD1` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD1_R(crate::FieldReader); impl SPD1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD1` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD1_W<'a> { w: &'a mut W, } impl<'a> SPD1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `SPD2` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD2_R(crate::FieldReader); impl SPD2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD2` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD2_W<'a> { w: &'a mut W, } impl<'a> SPD2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `SPD3` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD3_R(crate::FieldReader); impl SPD3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD3` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD3_W<'a> { w: &'a mut W, } impl<'a> SPD3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `SPD4` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD4_R(crate::FieldReader); impl SPD4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD4` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD4_W<'a> { w: &'a mut W, } impl<'a> SPD4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `SPD5` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD5_R(crate::FieldReader); impl SPD5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD5` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD5_W<'a> { w: &'a mut W, } impl<'a> SPD5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `SPD6` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD6_R(crate::FieldReader); impl SPD6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD6` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD6_W<'a> { w: &'a mut W, } impl<'a> SPD6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `SPD7` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD7_R(crate::FieldReader); impl SPD7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD7` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD7_W<'a> { w: &'a mut W, } impl<'a> SPD7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SPD8` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD8_R(crate::FieldReader); impl SPD8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD8` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD8_W<'a> { w: &'a mut W, } impl<'a> SPD8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `SPD9` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD9_R(crate::FieldReader); impl SPD9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD9` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD9_W<'a> { w: &'a mut W, } impl<'a> SPD9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `SPD10` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD10_R(crate::FieldReader); impl SPD10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD10` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD10_W<'a> { w: &'a mut W, } impl<'a> SPD10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `SPD11` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD11_R(crate::FieldReader); impl SPD11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD11` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD11_W<'a> { w: &'a mut W, } impl<'a> SPD11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `SPD12` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD12_R(crate::FieldReader); impl SPD12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD12` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD12_W<'a> { w: &'a mut W, } impl<'a> SPD12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `SPD13` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD13_R(crate::FieldReader); impl SPD13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD13` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD13_W<'a> { w: &'a mut W, } impl<'a> SPD13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `SPD14` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD14_R(crate::FieldReader); impl SPD14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD14` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD14_W<'a> { w: &'a mut W, } impl<'a> SPD14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `SPD15` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD15_R(crate::FieldReader); impl SPD15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD15` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD15_W<'a> { w: &'a mut W, } impl<'a> SPD15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl R { #[doc = "Bit 0 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd0(&self) -> SPD0_R { SPD0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd1(&self) -> SPD1_R { SPD1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd2(&self) -> SPD2_R { SPD2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd3(&self) -> SPD3_R { SPD3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd4(&self) -> SPD4_R { SPD4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd5(&self) -> SPD5_R { SPD5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd6(&self) -> SPD6_R { SPD6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd7(&self) -> SPD7_R { SPD7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd8(&self) -> SPD8_R { SPD8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd9(&self) -> SPD9_R { SPD9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd10(&self) -> SPD10_R { SPD10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd11(&self) -> SPD11_R { SPD11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd12(&self) -> SPD12_R { SPD12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd13(&self) -> SPD13_R { SPD13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd14(&self) -> SPD14_R { SPD14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd15(&self) -> SPD15_R { SPD15_R::new(((self.bits >> 15) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd0(&mut self) -> SPD0_W { SPD0_W { w: self } } #[doc = "Bit 1 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd1(&mut self) -> SPD1_W { SPD1_W { w: self } } #[doc = "Bit 2 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd2(&mut self) -> SPD2_W { SPD2_W { w: self } } #[doc = "Bit 3 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd3(&mut self) -> SPD3_W { SPD3_W { w: self } } #[doc = "Bit 4 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd4(&mut self) -> SPD4_W { SPD4_W { w: self } } #[doc = "Bit 5 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd5(&mut self) -> SPD5_W { SPD5_W { w: self } } #[doc = "Bit 6 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd6(&mut self) -> SPD6_W { SPD6_W { w: self } } #[doc = "Bit 7 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd7(&mut self) -> SPD7_W { SPD7_W { w: self } } #[doc = "Bit 8 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd8(&mut self) -> SPD8_W { SPD8_W { w: self } } #[doc = "Bit 9 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd9(&mut self) -> SPD9_W { SPD9_W { w: self } } #[doc = "Bit 10 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd10(&mut self) -> SPD10_W { SPD10_W { w: self } } #[doc = "Bit 11 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd11(&mut self) -> SPD11_W { SPD11_W { w: self } } #[doc = "Bit 12 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd12(&mut self) -> SPD12_W { SPD12_W { w: self } } #[doc = "Bit 13 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd13(&mut self) -> SPD13_W { SPD13_W { w: self } } #[doc = "Bit 14 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd14(&mut self) -> SPD14_W { SPD14_W { w: self } } #[doc = "Bit 15 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd15(&mut self) -> SPD15_W { SPD15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port output speed register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd1](index.html) module"] pub struct OSPD1_SPEC; impl crate::RegisterSpec for OSPD1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ospd1::R](R) reader structure"] impl crate::Readable for OSPD1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ospd1::W](W) writer structure"] impl crate::Writable for OSPD1_SPEC { type Writer = W; } #[doc = "`reset()` method sets OSPD1 to value 0"] impl crate::Resettable for OSPD1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose I/Os"] pub struct GPIOB { _marker: PhantomData<*const ()>, } unsafe impl Send for GPIOB {} impl GPIOB { #[doc = r"Pointer to the register block"] pub const PTR: *const gpiob::RegisterBlock = 0x4800_0400 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const gpiob::RegisterBlock { Self::PTR } } impl Deref for GPIOB { type Target = gpiob::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for GPIOB { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("GPIOB").finish() } } #[doc = "General-purpose I/Os"] pub mod gpiob { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - GPIO port control register"] pub ctl: crate::Reg, #[doc = "0x04 - GPIO port output type register"] pub omode: crate::Reg, #[doc = "0x08 - GPIO port output speed register 0"] pub ospd0: crate::Reg, #[doc = "0x0c - GPIO port pull-up/pull-down register"] pub pud: crate::Reg, #[doc = "0x10 - GPIO port input data register"] pub istat: crate::Reg, #[doc = "0x14 - GPIO port output data register"] pub octl: crate::Reg, #[doc = "0x18 - GPIO port bit set/reset register"] pub bop: crate::Reg, #[doc = "0x1c - GPIO port configuration lock register"] pub lock: crate::Reg, #[doc = "0x20 - GPIO alternate function low register"] pub afsel0: crate::Reg, #[doc = "0x24 - GPIO alternate function register 1"] pub afsel1: crate::Reg, #[doc = "0x28 - Port bit reset register"] pub bc: crate::Reg, #[doc = "0x2c - Port bit toggle register"] pub tg: crate::Reg, _reserved12: [u8; 0x0c], #[doc = "0x3c - Port output speed register 1"] pub ospd1: crate::Reg, } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "GPIO port control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CTL15` reader - Port x configuration bits (y = 0..15)"] pub struct CTL15_R(crate::FieldReader); impl CTL15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL15` writer - Port x configuration bits (y = 0..15)"] pub struct CTL15_W<'a> { w: &'a mut W, } impl<'a> CTL15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `CTL14` reader - Port x configuration bits (y = 0..15)"] pub struct CTL14_R(crate::FieldReader); impl CTL14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL14` writer - Port x configuration bits (y = 0..15)"] pub struct CTL14_W<'a> { w: &'a mut W, } impl<'a> CTL14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `CTL13` reader - Port x configuration bits (y = 0..15)"] pub struct CTL13_R(crate::FieldReader); impl CTL13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL13` writer - Port x configuration bits (y = 0..15)"] pub struct CTL13_W<'a> { w: &'a mut W, } impl<'a> CTL13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `CTL12` reader - Port x configuration bits (y = 0..15)"] pub struct CTL12_R(crate::FieldReader); impl CTL12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL12` writer - Port x configuration bits (y = 0..15)"] pub struct CTL12_W<'a> { w: &'a mut W, } impl<'a> CTL12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `CTL11` reader - Port x configuration bits (y = 0..15)"] pub struct CTL11_R(crate::FieldReader); impl CTL11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL11` writer - Port x configuration bits (y = 0..15)"] pub struct CTL11_W<'a> { w: &'a mut W, } impl<'a> CTL11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `CTL10` reader - Port x configuration bits (y = 0..15)"] pub struct CTL10_R(crate::FieldReader); impl CTL10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL10` writer - Port x configuration bits (y = 0..15)"] pub struct CTL10_W<'a> { w: &'a mut W, } impl<'a> CTL10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `CTL9` reader - Port x configuration bits (y = 0..15)"] pub struct CTL9_R(crate::FieldReader); impl CTL9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL9` writer - Port x configuration bits (y = 0..15)"] pub struct CTL9_W<'a> { w: &'a mut W, } impl<'a> CTL9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `CTL8` reader - Port x configuration bits (y = 0..15)"] pub struct CTL8_R(crate::FieldReader); impl CTL8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL8` writer - Port x configuration bits (y = 0..15)"] pub struct CTL8_W<'a> { w: &'a mut W, } impl<'a> CTL8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `CTL7` reader - Port x configuration bits (y = 0..15)"] pub struct CTL7_R(crate::FieldReader); impl CTL7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL7` writer - Port x configuration bits (y = 0..15)"] pub struct CTL7_W<'a> { w: &'a mut W, } impl<'a> CTL7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `CTL6` reader - Port x configuration bits (y = 0..15)"] pub struct CTL6_R(crate::FieldReader); impl CTL6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL6` writer - Port x configuration bits (y = 0..15)"] pub struct CTL6_W<'a> { w: &'a mut W, } impl<'a> CTL6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `CTL5` reader - Port x configuration bits (y = 0..15)"] pub struct CTL5_R(crate::FieldReader); impl CTL5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL5` writer - Port x configuration bits (y = 0..15)"] pub struct CTL5_W<'a> { w: &'a mut W, } impl<'a> CTL5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `CTL4` reader - Port x configuration bits (y = 0..15)"] pub struct CTL4_R(crate::FieldReader); impl CTL4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL4` writer - Port x configuration bits (y = 0..15)"] pub struct CTL4_W<'a> { w: &'a mut W, } impl<'a> CTL4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CTL3` reader - Port x configuration bits (y = 0..15)"] pub struct CTL3_R(crate::FieldReader); impl CTL3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL3` writer - Port x configuration bits (y = 0..15)"] pub struct CTL3_W<'a> { w: &'a mut W, } impl<'a> CTL3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `CTL2` reader - Port x configuration bits (y = 0..15)"] pub struct CTL2_R(crate::FieldReader); impl CTL2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL2` writer - Port x configuration bits (y = 0..15)"] pub struct CTL2_W<'a> { w: &'a mut W, } impl<'a> CTL2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `CTL1` reader - Port x configuration bits (y = 0..15)"] pub struct CTL1_R(crate::FieldReader); impl CTL1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL1` writer - Port x configuration bits (y = 0..15)"] pub struct CTL1_W<'a> { w: &'a mut W, } impl<'a> CTL1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CTL0` reader - Port x configuration bits (y = 0..15)"] pub struct CTL0_R(crate::FieldReader); impl CTL0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL0` writer - Port x configuration bits (y = 0..15)"] pub struct CTL0_W<'a> { w: &'a mut W, } impl<'a> CTL0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl15(&self) -> CTL15_R { CTL15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl14(&self) -> CTL14_R { CTL14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl13(&self) -> CTL13_R { CTL13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl12(&self) -> CTL12_R { CTL12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl11(&self) -> CTL11_R { CTL11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl10(&self) -> CTL10_R { CTL10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl9(&self) -> CTL9_R { CTL9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl8(&self) -> CTL8_R { CTL8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl7(&self) -> CTL7_R { CTL7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl6(&self) -> CTL6_R { CTL6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl5(&self) -> CTL5_R { CTL5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl4(&self) -> CTL4_R { CTL4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl3(&self) -> CTL3_R { CTL3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl2(&self) -> CTL2_R { CTL2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl1(&self) -> CTL1_R { CTL1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl0(&self) -> CTL0_R { CTL0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl15(&mut self) -> CTL15_W { CTL15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl14(&mut self) -> CTL14_W { CTL14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl13(&mut self) -> CTL13_W { CTL13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl12(&mut self) -> CTL12_W { CTL12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl11(&mut self) -> CTL11_W { CTL11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl10(&mut self) -> CTL10_W { CTL10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl9(&mut self) -> CTL9_W { CTL9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl8(&mut self) -> CTL8_W { CTL8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl7(&mut self) -> CTL7_W { CTL7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl6(&mut self) -> CTL6_W { CTL6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl5(&mut self) -> CTL5_W { CTL5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl4(&mut self) -> CTL4_W { CTL4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl3(&mut self) -> CTL3_W { CTL3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl2(&mut self) -> CTL2_W { CTL2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl1(&mut self) -> CTL1_W { CTL1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl0(&mut self) -> CTL0_W { CTL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OMODE register accessor: an alias for `Reg`"] pub type OMODE = crate::Reg; #[doc = "GPIO port output type register"] pub mod omode { #[doc = "Register `OMODE` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OMODE` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OM15` reader - Port x configuration bit 15"] pub struct OM15_R(crate::FieldReader); impl OM15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM15` writer - Port x configuration bit 15"] pub struct OM15_W<'a> { w: &'a mut W, } impl<'a> OM15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OM14` reader - Port x configuration bit 14"] pub struct OM14_R(crate::FieldReader); impl OM14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM14` writer - Port x configuration bit 14"] pub struct OM14_W<'a> { w: &'a mut W, } impl<'a> OM14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `OM13` reader - Port x configuration bit 13"] pub struct OM13_R(crate::FieldReader); impl OM13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM13` writer - Port x configuration bit 13"] pub struct OM13_W<'a> { w: &'a mut W, } impl<'a> OM13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OM12` reader - Port x configuration bit 12"] pub struct OM12_R(crate::FieldReader); impl OM12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM12` writer - Port x configuration bit 12"] pub struct OM12_W<'a> { w: &'a mut W, } impl<'a> OM12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OM11` reader - Port x configuration bit 11"] pub struct OM11_R(crate::FieldReader); impl OM11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM11` writer - Port x configuration bit 11"] pub struct OM11_W<'a> { w: &'a mut W, } impl<'a> OM11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `OM10` reader - Port x configuration bit 10"] pub struct OM10_R(crate::FieldReader); impl OM10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM10` writer - Port x configuration bit 10"] pub struct OM10_W<'a> { w: &'a mut W, } impl<'a> OM10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OM9` reader - Port x configuration bit 9"] pub struct OM9_R(crate::FieldReader); impl OM9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM9` writer - Port x configuration bit 9"] pub struct OM9_W<'a> { w: &'a mut W, } impl<'a> OM9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OM8` reader - Port x configuration bit 8"] pub struct OM8_R(crate::FieldReader); impl OM8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM8` writer - Port x configuration bit 8"] pub struct OM8_W<'a> { w: &'a mut W, } impl<'a> OM8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OM7` reader - Port x configuration bit 7"] pub struct OM7_R(crate::FieldReader); impl OM7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM7` writer - Port x configuration bit 7"] pub struct OM7_W<'a> { w: &'a mut W, } impl<'a> OM7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `OM6` reader - Port x configuration bit 6"] pub struct OM6_R(crate::FieldReader); impl OM6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM6` writer - Port x configuration bit 6"] pub struct OM6_W<'a> { w: &'a mut W, } impl<'a> OM6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OM5` reader - Port x configuration bit 5"] pub struct OM5_R(crate::FieldReader); impl OM5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM5` writer - Port x configuration bit 5"] pub struct OM5_W<'a> { w: &'a mut W, } impl<'a> OM5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OM4` reader - Port x configuration bit 4"] pub struct OM4_R(crate::FieldReader); impl OM4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM4` writer - Port x configuration bit 4"] pub struct OM4_W<'a> { w: &'a mut W, } impl<'a> OM4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OM3` reader - Port x configuration bit 3"] pub struct OM3_R(crate::FieldReader); impl OM3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM3` writer - Port x configuration bit 3"] pub struct OM3_W<'a> { w: &'a mut W, } impl<'a> OM3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `OM2` reader - Port x configuration bit 2"] pub struct OM2_R(crate::FieldReader); impl OM2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM2` writer - Port x configuration bit 2"] pub struct OM2_W<'a> { w: &'a mut W, } impl<'a> OM2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `OM1` reader - Port x configuration bit 1"] pub struct OM1_R(crate::FieldReader); impl OM1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM1` writer - Port x configuration bit 1"] pub struct OM1_W<'a> { w: &'a mut W, } impl<'a> OM1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OM0` reader - Port x configuration bit 0"] pub struct OM0_R(crate::FieldReader); impl OM0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM0` writer - Port x configuration bit 0"] pub struct OM0_W<'a> { w: &'a mut W, } impl<'a> OM0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Port x configuration bit 15"] #[inline(always)] pub fn om15(&self) -> OM15_R { OM15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port x configuration bit 14"] #[inline(always)] pub fn om14(&self) -> OM14_R { OM14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port x configuration bit 13"] #[inline(always)] pub fn om13(&self) -> OM13_R { OM13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port x configuration bit 12"] #[inline(always)] pub fn om12(&self) -> OM12_R { OM12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port x configuration bit 11"] #[inline(always)] pub fn om11(&self) -> OM11_R { OM11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port x configuration bit 10"] #[inline(always)] pub fn om10(&self) -> OM10_R { OM10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port x configuration bit 9"] #[inline(always)] pub fn om9(&self) -> OM9_R { OM9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port x configuration bit 8"] #[inline(always)] pub fn om8(&self) -> OM8_R { OM8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port x configuration bit 7"] #[inline(always)] pub fn om7(&self) -> OM7_R { OM7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port x configuration bit 6"] #[inline(always)] pub fn om6(&self) -> OM6_R { OM6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port x configuration bit 5"] #[inline(always)] pub fn om5(&self) -> OM5_R { OM5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port x configuration bit 4"] #[inline(always)] pub fn om4(&self) -> OM4_R { OM4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port x configuration bit 3"] #[inline(always)] pub fn om3(&self) -> OM3_R { OM3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port x configuration bit 2"] #[inline(always)] pub fn om2(&self) -> OM2_R { OM2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port x configuration bit 1"] #[inline(always)] pub fn om1(&self) -> OM1_R { OM1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port x configuration bit 0"] #[inline(always)] pub fn om0(&self) -> OM0_R { OM0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Port x configuration bit 15"] #[inline(always)] pub fn om15(&mut self) -> OM15_W { OM15_W { w: self } } #[doc = "Bit 14 - Port x configuration bit 14"] #[inline(always)] pub fn om14(&mut self) -> OM14_W { OM14_W { w: self } } #[doc = "Bit 13 - Port x configuration bit 13"] #[inline(always)] pub fn om13(&mut self) -> OM13_W { OM13_W { w: self } } #[doc = "Bit 12 - Port x configuration bit 12"] #[inline(always)] pub fn om12(&mut self) -> OM12_W { OM12_W { w: self } } #[doc = "Bit 11 - Port x configuration bit 11"] #[inline(always)] pub fn om11(&mut self) -> OM11_W { OM11_W { w: self } } #[doc = "Bit 10 - Port x configuration bit 10"] #[inline(always)] pub fn om10(&mut self) -> OM10_W { OM10_W { w: self } } #[doc = "Bit 9 - Port x configuration bit 9"] #[inline(always)] pub fn om9(&mut self) -> OM9_W { OM9_W { w: self } } #[doc = "Bit 8 - Port x configuration bit 8"] #[inline(always)] pub fn om8(&mut self) -> OM8_W { OM8_W { w: self } } #[doc = "Bit 7 - Port x configuration bit 7"] #[inline(always)] pub fn om7(&mut self) -> OM7_W { OM7_W { w: self } } #[doc = "Bit 6 - Port x configuration bit 6"] #[inline(always)] pub fn om6(&mut self) -> OM6_W { OM6_W { w: self } } #[doc = "Bit 5 - Port x configuration bit 5"] #[inline(always)] pub fn om5(&mut self) -> OM5_W { OM5_W { w: self } } #[doc = "Bit 4 - Port x configuration bit 4"] #[inline(always)] pub fn om4(&mut self) -> OM4_W { OM4_W { w: self } } #[doc = "Bit 3 - Port x configuration bit 3"] #[inline(always)] pub fn om3(&mut self) -> OM3_W { OM3_W { w: self } } #[doc = "Bit 2 - Port x configuration bit 2"] #[inline(always)] pub fn om2(&mut self) -> OM2_W { OM2_W { w: self } } #[doc = "Bit 1 - Port x configuration bit 1"] #[inline(always)] pub fn om1(&mut self) -> OM1_W { OM1_W { w: self } } #[doc = "Bit 0 - Port x configuration bit 0"] #[inline(always)] pub fn om0(&mut self) -> OM0_W { OM0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output type register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [omode](index.html) module"] pub struct OMODE_SPEC; impl crate::RegisterSpec for OMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [omode::R](R) reader structure"] impl crate::Readable for OMODE_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [omode::W](W) writer structure"] impl crate::Writable for OMODE_SPEC { type Writer = W; } #[doc = "`reset()` method sets OMODE to value 0"] impl crate::Resettable for OMODE_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OSPD0 register accessor: an alias for `Reg`"] pub type OSPD0 = crate::Reg; #[doc = "GPIO port output speed register 0"] pub mod ospd0 { #[doc = "Register `OSPD0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OSPD0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OSPD15` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD15_R(crate::FieldReader); impl OSPD15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD15` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD15_W<'a> { w: &'a mut W, } impl<'a> OSPD15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `OSPD14` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD14_R(crate::FieldReader); impl OSPD14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD14` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD14_W<'a> { w: &'a mut W, } impl<'a> OSPD14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `OSPD13` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD13_R(crate::FieldReader); impl OSPD13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD13` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD13_W<'a> { w: &'a mut W, } impl<'a> OSPD13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `OSPD12` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD12_R(crate::FieldReader); impl OSPD12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD12` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD12_W<'a> { w: &'a mut W, } impl<'a> OSPD12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `OSPD11` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD11_R(crate::FieldReader); impl OSPD11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD11` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD11_W<'a> { w: &'a mut W, } impl<'a> OSPD11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `OSPD10` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD10_R(crate::FieldReader); impl OSPD10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD10` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD10_W<'a> { w: &'a mut W, } impl<'a> OSPD10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `OSPD9` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD9_R(crate::FieldReader); impl OSPD9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD9` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD9_W<'a> { w: &'a mut W, } impl<'a> OSPD9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `OSPD8` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD8_R(crate::FieldReader); impl OSPD8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD8` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD8_W<'a> { w: &'a mut W, } impl<'a> OSPD8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `OSPD7` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD7_R(crate::FieldReader); impl OSPD7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD7` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD7_W<'a> { w: &'a mut W, } impl<'a> OSPD7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `OSPD6` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD6_R(crate::FieldReader); impl OSPD6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD6` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD6_W<'a> { w: &'a mut W, } impl<'a> OSPD6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `OSPD5` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD5_R(crate::FieldReader); impl OSPD5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD5` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD5_W<'a> { w: &'a mut W, } impl<'a> OSPD5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `OSPD4` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD4_R(crate::FieldReader); impl OSPD4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD4` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD4_W<'a> { w: &'a mut W, } impl<'a> OSPD4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `OSPD3` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD3_R(crate::FieldReader); impl OSPD3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD3` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD3_W<'a> { w: &'a mut W, } impl<'a> OSPD3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `OSPD2` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD2_R(crate::FieldReader); impl OSPD2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD2` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD2_W<'a> { w: &'a mut W, } impl<'a> OSPD2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `OSPD1` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD1_R(crate::FieldReader); impl OSPD1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD1` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD1_W<'a> { w: &'a mut W, } impl<'a> OSPD1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `OSPD0` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD0_R(crate::FieldReader); impl OSPD0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD0` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD0_W<'a> { w: &'a mut W, } impl<'a> OSPD0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd15(&self) -> OSPD15_R { OSPD15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd14(&self) -> OSPD14_R { OSPD14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd13(&self) -> OSPD13_R { OSPD13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd12(&self) -> OSPD12_R { OSPD12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd11(&self) -> OSPD11_R { OSPD11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd10(&self) -> OSPD10_R { OSPD10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd9(&self) -> OSPD9_R { OSPD9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd8(&self) -> OSPD8_R { OSPD8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd7(&self) -> OSPD7_R { OSPD7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd6(&self) -> OSPD6_R { OSPD6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd5(&self) -> OSPD5_R { OSPD5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd4(&self) -> OSPD4_R { OSPD4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd3(&self) -> OSPD3_R { OSPD3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd2(&self) -> OSPD2_R { OSPD2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd1(&self) -> OSPD1_R { OSPD1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd0(&self) -> OSPD0_R { OSPD0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd15(&mut self) -> OSPD15_W { OSPD15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd14(&mut self) -> OSPD14_W { OSPD14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd13(&mut self) -> OSPD13_W { OSPD13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd12(&mut self) -> OSPD12_W { OSPD12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd11(&mut self) -> OSPD11_W { OSPD11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd10(&mut self) -> OSPD10_W { OSPD10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd9(&mut self) -> OSPD9_W { OSPD9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd8(&mut self) -> OSPD8_W { OSPD8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd7(&mut self) -> OSPD7_W { OSPD7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd6(&mut self) -> OSPD6_W { OSPD6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd5(&mut self) -> OSPD5_W { OSPD5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd4(&mut self) -> OSPD4_W { OSPD4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd3(&mut self) -> OSPD3_W { OSPD3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd2(&mut self) -> OSPD2_W { OSPD2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd1(&mut self) -> OSPD1_W { OSPD1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd0(&mut self) -> OSPD0_W { OSPD0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output speed register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd0](index.html) module"] pub struct OSPD0_SPEC; impl crate::RegisterSpec for OSPD0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ospd0::R](R) reader structure"] impl crate::Readable for OSPD0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ospd0::W](W) writer structure"] impl crate::Writable for OSPD0_SPEC { type Writer = W; } #[doc = "`reset()` method sets OSPD0 to value 0"] impl crate::Resettable for OSPD0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PUD register accessor: an alias for `Reg`"] pub type PUD = crate::Reg; #[doc = "GPIO port pull-up/pull-down register"] pub mod pud { #[doc = "Register `PUD` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PUD` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PUD15` reader - Port x configuration bits (y = 0..15)"] pub struct PUD15_R(crate::FieldReader); impl PUD15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD15` writer - Port x configuration bits (y = 0..15)"] pub struct PUD15_W<'a> { w: &'a mut W, } impl<'a> PUD15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `PUD14` reader - Port x configuration bits (y = 0..15)"] pub struct PUD14_R(crate::FieldReader); impl PUD14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD14` writer - Port x configuration bits (y = 0..15)"] pub struct PUD14_W<'a> { w: &'a mut W, } impl<'a> PUD14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `PUD13` reader - Port x configuration bits (y = 0..15)"] pub struct PUD13_R(crate::FieldReader); impl PUD13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD13` writer - Port x configuration bits (y = 0..15)"] pub struct PUD13_W<'a> { w: &'a mut W, } impl<'a> PUD13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `PUD12` reader - Port x configuration bits (y = 0..15)"] pub struct PUD12_R(crate::FieldReader); impl PUD12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD12` writer - Port x configuration bits (y = 0..15)"] pub struct PUD12_W<'a> { w: &'a mut W, } impl<'a> PUD12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `PUD11` reader - Port x configuration bits (y = 0..15)"] pub struct PUD11_R(crate::FieldReader); impl PUD11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD11` writer - Port x configuration bits (y = 0..15)"] pub struct PUD11_W<'a> { w: &'a mut W, } impl<'a> PUD11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `PUD10` reader - Port x configuration bits (y = 0..15)"] pub struct PUD10_R(crate::FieldReader); impl PUD10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD10` writer - Port x configuration bits (y = 0..15)"] pub struct PUD10_W<'a> { w: &'a mut W, } impl<'a> PUD10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `PUD9` reader - Port x configuration bits (y = 0..15)"] pub struct PUD9_R(crate::FieldReader); impl PUD9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD9` writer - Port x configuration bits (y = 0..15)"] pub struct PUD9_W<'a> { w: &'a mut W, } impl<'a> PUD9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `PUD8` reader - Port x configuration bits (y = 0..15)"] pub struct PUD8_R(crate::FieldReader); impl PUD8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD8` writer - Port x configuration bits (y = 0..15)"] pub struct PUD8_W<'a> { w: &'a mut W, } impl<'a> PUD8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `PUD7` reader - Port x configuration bits (y = 0..15)"] pub struct PUD7_R(crate::FieldReader); impl PUD7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD7` writer - Port x configuration bits (y = 0..15)"] pub struct PUD7_W<'a> { w: &'a mut W, } impl<'a> PUD7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `PUD6` reader - Port x configuration bits (y = 0..15)"] pub struct PUD6_R(crate::FieldReader); impl PUD6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD6` writer - Port x configuration bits (y = 0..15)"] pub struct PUD6_W<'a> { w: &'a mut W, } impl<'a> PUD6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `PUD5` reader - Port x configuration bits (y = 0..15)"] pub struct PUD5_R(crate::FieldReader); impl PUD5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD5` writer - Port x configuration bits (y = 0..15)"] pub struct PUD5_W<'a> { w: &'a mut W, } impl<'a> PUD5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PUD4` reader - Port x configuration bits (y = 0..15)"] pub struct PUD4_R(crate::FieldReader); impl PUD4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD4` writer - Port x configuration bits (y = 0..15)"] pub struct PUD4_W<'a> { w: &'a mut W, } impl<'a> PUD4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `PUD3` reader - Port x configuration bits (y = 0..15)"] pub struct PUD3_R(crate::FieldReader); impl PUD3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD3` writer - Port x configuration bits (y = 0..15)"] pub struct PUD3_W<'a> { w: &'a mut W, } impl<'a> PUD3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `PUD2` reader - Port x configuration bits (y = 0..15)"] pub struct PUD2_R(crate::FieldReader); impl PUD2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD2` writer - Port x configuration bits (y = 0..15)"] pub struct PUD2_W<'a> { w: &'a mut W, } impl<'a> PUD2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `PUD1` reader - Port x configuration bits (y = 0..15)"] pub struct PUD1_R(crate::FieldReader); impl PUD1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD1` writer - Port x configuration bits (y = 0..15)"] pub struct PUD1_W<'a> { w: &'a mut W, } impl<'a> PUD1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `PUD0` reader - Port x configuration bits (y = 0..15)"] pub struct PUD0_R(crate::FieldReader); impl PUD0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD0` writer - Port x configuration bits (y = 0..15)"] pub struct PUD0_W<'a> { w: &'a mut W, } impl<'a> PUD0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud15(&self) -> PUD15_R { PUD15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud14(&self) -> PUD14_R { PUD14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud13(&self) -> PUD13_R { PUD13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud12(&self) -> PUD12_R { PUD12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud11(&self) -> PUD11_R { PUD11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud10(&self) -> PUD10_R { PUD10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud9(&self) -> PUD9_R { PUD9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud8(&self) -> PUD8_R { PUD8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud7(&self) -> PUD7_R { PUD7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud6(&self) -> PUD6_R { PUD6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud5(&self) -> PUD5_R { PUD5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud4(&self) -> PUD4_R { PUD4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud3(&self) -> PUD3_R { PUD3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud2(&self) -> PUD2_R { PUD2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud1(&self) -> PUD1_R { PUD1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud0(&self) -> PUD0_R { PUD0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud15(&mut self) -> PUD15_W { PUD15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud14(&mut self) -> PUD14_W { PUD14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud13(&mut self) -> PUD13_W { PUD13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud12(&mut self) -> PUD12_W { PUD12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud11(&mut self) -> PUD11_W { PUD11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud10(&mut self) -> PUD10_W { PUD10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud9(&mut self) -> PUD9_W { PUD9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud8(&mut self) -> PUD8_W { PUD8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud7(&mut self) -> PUD7_W { PUD7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud6(&mut self) -> PUD6_W { PUD6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud5(&mut self) -> PUD5_W { PUD5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud4(&mut self) -> PUD4_W { PUD4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud3(&mut self) -> PUD3_W { PUD3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud2(&mut self) -> PUD2_W { PUD2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud1(&mut self) -> PUD1_W { PUD1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud0(&mut self) -> PUD0_W { PUD0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port pull-up/pull-down register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pud](index.html) module"] pub struct PUD_SPEC; impl crate::RegisterSpec for PUD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [pud::R](R) reader structure"] impl crate::Readable for PUD_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [pud::W](W) writer structure"] impl crate::Writable for PUD_SPEC { type Writer = W; } #[doc = "`reset()` method sets PUD to value 0"] impl crate::Resettable for PUD_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "ISTAT register accessor: an alias for `Reg`"] pub type ISTAT = crate::Reg; #[doc = "GPIO port input data register"] pub mod istat { #[doc = "Register `ISTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `ISTAT15` reader - Port input data (y = 0..15)"] pub struct ISTAT15_R(crate::FieldReader); impl ISTAT15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT14` reader - Port input data (y = 0..15)"] pub struct ISTAT14_R(crate::FieldReader); impl ISTAT14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT13` reader - Port input data (y = 0..15)"] pub struct ISTAT13_R(crate::FieldReader); impl ISTAT13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT12` reader - Port input data (y = 0..15)"] pub struct ISTAT12_R(crate::FieldReader); impl ISTAT12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT11` reader - Port input data (y = 0..15)"] pub struct ISTAT11_R(crate::FieldReader); impl ISTAT11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT10` reader - Port input data (y = 0..15)"] pub struct ISTAT10_R(crate::FieldReader); impl ISTAT10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT9` reader - Port input data (y = 0..15)"] pub struct ISTAT9_R(crate::FieldReader); impl ISTAT9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT8` reader - Port input data (y = 0..15)"] pub struct ISTAT8_R(crate::FieldReader); impl ISTAT8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT7` reader - Port input data (y = 0..15)"] pub struct ISTAT7_R(crate::FieldReader); impl ISTAT7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT6` reader - Port input data (y = 0..15)"] pub struct ISTAT6_R(crate::FieldReader); impl ISTAT6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT5` reader - Port input data (y = 0..15)"] pub struct ISTAT5_R(crate::FieldReader); impl ISTAT5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT4` reader - Port input data (y = 0..15)"] pub struct ISTAT4_R(crate::FieldReader); impl ISTAT4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT3` reader - Port input data (y = 0..15)"] pub struct ISTAT3_R(crate::FieldReader); impl ISTAT3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT2` reader - Port input data (y = 0..15)"] pub struct ISTAT2_R(crate::FieldReader); impl ISTAT2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT1` reader - Port input data (y = 0..15)"] pub struct ISTAT1_R(crate::FieldReader); impl ISTAT1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT0` reader - Port input data (y = 0..15)"] pub struct ISTAT0_R(crate::FieldReader); impl ISTAT0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 15 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat15(&self) -> ISTAT15_R { ISTAT15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat14(&self) -> ISTAT14_R { ISTAT14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat13(&self) -> ISTAT13_R { ISTAT13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat12(&self) -> ISTAT12_R { ISTAT12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat11(&self) -> ISTAT11_R { ISTAT11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat10(&self) -> ISTAT10_R { ISTAT10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat9(&self) -> ISTAT9_R { ISTAT9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat8(&self) -> ISTAT8_R { ISTAT8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat7(&self) -> ISTAT7_R { ISTAT7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat6(&self) -> ISTAT6_R { ISTAT6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat5(&self) -> ISTAT5_R { ISTAT5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat4(&self) -> ISTAT4_R { ISTAT4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat3(&self) -> ISTAT3_R { ISTAT3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat2(&self) -> ISTAT2_R { ISTAT2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat1(&self) -> ISTAT1_R { ISTAT1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat0(&self) -> ISTAT0_R { ISTAT0_R::new((self.bits & 0x01) != 0) } } #[doc = "GPIO port input data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [istat](index.html) module"] pub struct ISTAT_SPEC; impl crate::RegisterSpec for ISTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [istat::R](R) reader structure"] impl crate::Readable for ISTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets ISTAT to value 0"] impl crate::Resettable for ISTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OCTL register accessor: an alias for `Reg`"] pub type OCTL = crate::Reg; #[doc = "GPIO port output data register"] pub mod octl { #[doc = "Register `OCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OCTL15` reader - Port output data (y = 0..15)"] pub struct OCTL15_R(crate::FieldReader); impl OCTL15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL15` writer - Port output data (y = 0..15)"] pub struct OCTL15_W<'a> { w: &'a mut W, } impl<'a> OCTL15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OCTL14` reader - Port output data (y = 0..15)"] pub struct OCTL14_R(crate::FieldReader); impl OCTL14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL14` writer - Port output data (y = 0..15)"] pub struct OCTL14_W<'a> { w: &'a mut W, } impl<'a> OCTL14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `OCTL13` reader - Port output data (y = 0..15)"] pub struct OCTL13_R(crate::FieldReader); impl OCTL13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL13` writer - Port output data (y = 0..15)"] pub struct OCTL13_W<'a> { w: &'a mut W, } impl<'a> OCTL13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OCTL12` reader - Port output data (y = 0..15)"] pub struct OCTL12_R(crate::FieldReader); impl OCTL12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL12` writer - Port output data (y = 0..15)"] pub struct OCTL12_W<'a> { w: &'a mut W, } impl<'a> OCTL12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OCTL11` reader - Port output data (y = 0..15)"] pub struct OCTL11_R(crate::FieldReader); impl OCTL11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL11` writer - Port output data (y = 0..15)"] pub struct OCTL11_W<'a> { w: &'a mut W, } impl<'a> OCTL11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `OCTL10` reader - Port output data (y = 0..15)"] pub struct OCTL10_R(crate::FieldReader); impl OCTL10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL10` writer - Port output data (y = 0..15)"] pub struct OCTL10_W<'a> { w: &'a mut W, } impl<'a> OCTL10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OCTL9` reader - Port output data (y = 0..15)"] pub struct OCTL9_R(crate::FieldReader); impl OCTL9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL9` writer - Port output data (y = 0..15)"] pub struct OCTL9_W<'a> { w: &'a mut W, } impl<'a> OCTL9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OCTL8` reader - Port output data (y = 0..15)"] pub struct OCTL8_R(crate::FieldReader); impl OCTL8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL8` writer - Port output data (y = 0..15)"] pub struct OCTL8_W<'a> { w: &'a mut W, } impl<'a> OCTL8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OCTL7` reader - Port output data (y = 0..15)"] pub struct OCTL7_R(crate::FieldReader); impl OCTL7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL7` writer - Port output data (y = 0..15)"] pub struct OCTL7_W<'a> { w: &'a mut W, } impl<'a> OCTL7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `OCTL6` reader - Port output data (y = 0..15)"] pub struct OCTL6_R(crate::FieldReader); impl OCTL6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL6` writer - Port output data (y = 0..15)"] pub struct OCTL6_W<'a> { w: &'a mut W, } impl<'a> OCTL6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OCTL5` reader - Port output data (y = 0..15)"] pub struct OCTL5_R(crate::FieldReader); impl OCTL5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL5` writer - Port output data (y = 0..15)"] pub struct OCTL5_W<'a> { w: &'a mut W, } impl<'a> OCTL5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OCTL4` reader - Port output data (y = 0..15)"] pub struct OCTL4_R(crate::FieldReader); impl OCTL4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL4` writer - Port output data (y = 0..15)"] pub struct OCTL4_W<'a> { w: &'a mut W, } impl<'a> OCTL4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OCTL3` reader - Port output data (y = 0..15)"] pub struct OCTL3_R(crate::FieldReader); impl OCTL3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL3` writer - Port output data (y = 0..15)"] pub struct OCTL3_W<'a> { w: &'a mut W, } impl<'a> OCTL3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `OCTL2` reader - Port output data (y = 0..15)"] pub struct OCTL2_R(crate::FieldReader); impl OCTL2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL2` writer - Port output data (y = 0..15)"] pub struct OCTL2_W<'a> { w: &'a mut W, } impl<'a> OCTL2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `OCTL1` reader - Port output data (y = 0..15)"] pub struct OCTL1_R(crate::FieldReader); impl OCTL1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL1` writer - Port output data (y = 0..15)"] pub struct OCTL1_W<'a> { w: &'a mut W, } impl<'a> OCTL1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OCTL0` reader - Port output data (y = 0..15)"] pub struct OCTL0_R(crate::FieldReader); impl OCTL0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL0` writer - Port output data (y = 0..15)"] pub struct OCTL0_W<'a> { w: &'a mut W, } impl<'a> OCTL0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl15(&self) -> OCTL15_R { OCTL15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl14(&self) -> OCTL14_R { OCTL14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl13(&self) -> OCTL13_R { OCTL13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl12(&self) -> OCTL12_R { OCTL12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl11(&self) -> OCTL11_R { OCTL11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl10(&self) -> OCTL10_R { OCTL10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl9(&self) -> OCTL9_R { OCTL9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl8(&self) -> OCTL8_R { OCTL8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl7(&self) -> OCTL7_R { OCTL7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl6(&self) -> OCTL6_R { OCTL6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl5(&self) -> OCTL5_R { OCTL5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl4(&self) -> OCTL4_R { OCTL4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl3(&self) -> OCTL3_R { OCTL3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl2(&self) -> OCTL2_R { OCTL2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl1(&self) -> OCTL1_R { OCTL1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl0(&self) -> OCTL0_R { OCTL0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl15(&mut self) -> OCTL15_W { OCTL15_W { w: self } } #[doc = "Bit 14 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl14(&mut self) -> OCTL14_W { OCTL14_W { w: self } } #[doc = "Bit 13 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl13(&mut self) -> OCTL13_W { OCTL13_W { w: self } } #[doc = "Bit 12 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl12(&mut self) -> OCTL12_W { OCTL12_W { w: self } } #[doc = "Bit 11 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl11(&mut self) -> OCTL11_W { OCTL11_W { w: self } } #[doc = "Bit 10 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl10(&mut self) -> OCTL10_W { OCTL10_W { w: self } } #[doc = "Bit 9 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl9(&mut self) -> OCTL9_W { OCTL9_W { w: self } } #[doc = "Bit 8 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl8(&mut self) -> OCTL8_W { OCTL8_W { w: self } } #[doc = "Bit 7 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl7(&mut self) -> OCTL7_W { OCTL7_W { w: self } } #[doc = "Bit 6 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl6(&mut self) -> OCTL6_W { OCTL6_W { w: self } } #[doc = "Bit 5 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl5(&mut self) -> OCTL5_W { OCTL5_W { w: self } } #[doc = "Bit 4 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl4(&mut self) -> OCTL4_W { OCTL4_W { w: self } } #[doc = "Bit 3 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl3(&mut self) -> OCTL3_W { OCTL3_W { w: self } } #[doc = "Bit 2 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl2(&mut self) -> OCTL2_W { OCTL2_W { w: self } } #[doc = "Bit 1 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl1(&mut self) -> OCTL1_W { OCTL1_W { w: self } } #[doc = "Bit 0 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl0(&mut self) -> OCTL0_W { OCTL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [octl](index.html) module"] pub struct OCTL_SPEC; impl crate::RegisterSpec for OCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [octl::R](R) reader structure"] impl crate::Readable for OCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [octl::W](W) writer structure"] impl crate::Writable for OCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets OCTL to value 0"] impl crate::Resettable for OCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BOP register accessor: an alias for `Reg`"] pub type BOP = crate::Reg; #[doc = "GPIO port bit set/reset register"] pub mod bop { #[doc = "Register `BOP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CR15` writer - Port x reset bit y (y = 0..15)"] pub struct CR15_W<'a> { w: &'a mut W, } impl<'a> CR15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `CR14` writer - Port x reset bit y (y = 0..15)"] pub struct CR14_W<'a> { w: &'a mut W, } impl<'a> CR14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CR13` writer - Port x reset bit y (y = 0..15)"] pub struct CR13_W<'a> { w: &'a mut W, } impl<'a> CR13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CR12` writer - Port x reset bit y (y = 0..15)"] pub struct CR12_W<'a> { w: &'a mut W, } impl<'a> CR12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `CR11` writer - Port x reset bit y (y = 0..15)"] pub struct CR11_W<'a> { w: &'a mut W, } impl<'a> CR11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CR10` writer - Port x reset bit y (y = 0..15)"] pub struct CR10_W<'a> { w: &'a mut W, } impl<'a> CR10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `CR9` writer - Port x reset bit y (y = 0..15)"] pub struct CR9_W<'a> { w: &'a mut W, } impl<'a> CR9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); self.w } } #[doc = "Field `CR8` writer - Port x reset bit y (y = 0..15)"] pub struct CR8_W<'a> { w: &'a mut W, } impl<'a> CR8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `CR7` writer - Port x reset bit y (y = 0..15)"] pub struct CR7_W<'a> { w: &'a mut W, } impl<'a> CR7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `CR6` writer - Port x reset bit y (y = 0..15)"] pub struct CR6_W<'a> { w: &'a mut W, } impl<'a> CR6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `CR5` writer - Port x reset bit y (y = 0..15)"] pub struct CR5_W<'a> { w: &'a mut W, } impl<'a> CR5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `CR4` writer - Port x reset bit y (y = 0..15)"] pub struct CR4_W<'a> { w: &'a mut W, } impl<'a> CR4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `CR3` writer - Port x reset bit y (y = 0..15)"] pub struct CR3_W<'a> { w: &'a mut W, } impl<'a> CR3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `CR2` writer - Port x reset bit y (y = 0..15)"] pub struct CR2_W<'a> { w: &'a mut W, } impl<'a> CR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `CR1` writer - Port x reset bit y (y = 0..15)"] pub struct CR1_W<'a> { w: &'a mut W, } impl<'a> CR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `CR0` writer - Port x reset bit y (y= 0..15)"] pub struct CR0_W<'a> { w: &'a mut W, } impl<'a> CR0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `BOP15` writer - Port x set bit y (y= 0..15)"] pub struct BOP15_W<'a> { w: &'a mut W, } impl<'a> BOP15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `BOP14` writer - Port x set bit y (y= 0..15)"] pub struct BOP14_W<'a> { w: &'a mut W, } impl<'a> BOP14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `BOP13` writer - Port x set bit y (y= 0..15)"] pub struct BOP13_W<'a> { w: &'a mut W, } impl<'a> BOP13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `BOP12` writer - Port x set bit y (y= 0..15)"] pub struct BOP12_W<'a> { w: &'a mut W, } impl<'a> BOP12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `BOP11` writer - Port x set bit y (y= 0..15)"] pub struct BOP11_W<'a> { w: &'a mut W, } impl<'a> BOP11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `BOP10` writer - Port x set bit y (y= 0..15)"] pub struct BOP10_W<'a> { w: &'a mut W, } impl<'a> BOP10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `BOP9` writer - Port x set bit y (y= 0..15)"] pub struct BOP9_W<'a> { w: &'a mut W, } impl<'a> BOP9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `BOP8` writer - Port x set bit y (y= 0..15)"] pub struct BOP8_W<'a> { w: &'a mut W, } impl<'a> BOP8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `BOP7` writer - Port x set bit y (y= 0..15)"] pub struct BOP7_W<'a> { w: &'a mut W, } impl<'a> BOP7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BOP6` writer - Port x set bit y (y= 0..15)"] pub struct BOP6_W<'a> { w: &'a mut W, } impl<'a> BOP6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `BOP5` writer - Port x set bit y (y= 0..15)"] pub struct BOP5_W<'a> { w: &'a mut W, } impl<'a> BOP5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `BOP4` writer - Port x set bit y (y= 0..15)"] pub struct BOP4_W<'a> { w: &'a mut W, } impl<'a> BOP4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `BOP3` writer - Port x set bit y (y= 0..15)"] pub struct BOP3_W<'a> { w: &'a mut W, } impl<'a> BOP3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `BOP2` writer - Port x set bit y (y= 0..15)"] pub struct BOP2_W<'a> { w: &'a mut W, } impl<'a> BOP2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `BOP1` writer - Port x set bit y (y= 0..15)"] pub struct BOP1_W<'a> { w: &'a mut W, } impl<'a> BOP1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `BOP0` writer - Port x set bit y (y= 0..15)"] pub struct BOP0_W<'a> { w: &'a mut W, } impl<'a> BOP0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 31 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr15(&mut self) -> CR15_W { CR15_W { w: self } } #[doc = "Bit 30 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr14(&mut self) -> CR14_W { CR14_W { w: self } } #[doc = "Bit 29 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr13(&mut self) -> CR13_W { CR13_W { w: self } } #[doc = "Bit 28 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr12(&mut self) -> CR12_W { CR12_W { w: self } } #[doc = "Bit 27 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr11(&mut self) -> CR11_W { CR11_W { w: self } } #[doc = "Bit 26 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr10(&mut self) -> CR10_W { CR10_W { w: self } } #[doc = "Bit 25 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr9(&mut self) -> CR9_W { CR9_W { w: self } } #[doc = "Bit 24 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr8(&mut self) -> CR8_W { CR8_W { w: self } } #[doc = "Bit 23 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr7(&mut self) -> CR7_W { CR7_W { w: self } } #[doc = "Bit 22 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr6(&mut self) -> CR6_W { CR6_W { w: self } } #[doc = "Bit 21 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr5(&mut self) -> CR5_W { CR5_W { w: self } } #[doc = "Bit 20 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr4(&mut self) -> CR4_W { CR4_W { w: self } } #[doc = "Bit 19 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr3(&mut self) -> CR3_W { CR3_W { w: self } } #[doc = "Bit 18 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr2(&mut self) -> CR2_W { CR2_W { w: self } } #[doc = "Bit 17 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr1(&mut self) -> CR1_W { CR1_W { w: self } } #[doc = "Bit 16 - Port x reset bit y (y= 0..15)"] #[inline(always)] pub fn cr0(&mut self) -> CR0_W { CR0_W { w: self } } #[doc = "Bit 15 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop15(&mut self) -> BOP15_W { BOP15_W { w: self } } #[doc = "Bit 14 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop14(&mut self) -> BOP14_W { BOP14_W { w: self } } #[doc = "Bit 13 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop13(&mut self) -> BOP13_W { BOP13_W { w: self } } #[doc = "Bit 12 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop12(&mut self) -> BOP12_W { BOP12_W { w: self } } #[doc = "Bit 11 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop11(&mut self) -> BOP11_W { BOP11_W { w: self } } #[doc = "Bit 10 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop10(&mut self) -> BOP10_W { BOP10_W { w: self } } #[doc = "Bit 9 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop9(&mut self) -> BOP9_W { BOP9_W { w: self } } #[doc = "Bit 8 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop8(&mut self) -> BOP8_W { BOP8_W { w: self } } #[doc = "Bit 7 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop7(&mut self) -> BOP7_W { BOP7_W { w: self } } #[doc = "Bit 6 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop6(&mut self) -> BOP6_W { BOP6_W { w: self } } #[doc = "Bit 5 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop5(&mut self) -> BOP5_W { BOP5_W { w: self } } #[doc = "Bit 4 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop4(&mut self) -> BOP4_W { BOP4_W { w: self } } #[doc = "Bit 3 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop3(&mut self) -> BOP3_W { BOP3_W { w: self } } #[doc = "Bit 2 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop2(&mut self) -> BOP2_W { BOP2_W { w: self } } #[doc = "Bit 1 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop1(&mut self) -> BOP1_W { BOP1_W { w: self } } #[doc = "Bit 0 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop0(&mut self) -> BOP0_W { BOP0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port bit set/reset register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bop](index.html) module"] pub struct BOP_SPEC; impl crate::RegisterSpec for BOP_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [bop::W](W) writer structure"] impl crate::Writable for BOP_SPEC { type Writer = W; } #[doc = "`reset()` method sets BOP to value 0"] impl crate::Resettable for BOP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "LOCK register accessor: an alias for `Reg`"] pub type LOCK = crate::Reg; #[doc = "GPIO port configuration lock register"] pub mod lock { #[doc = "Register `LOCK` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `LOCK` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `LKK` reader - Port x lock bit y"] pub struct LKK_R(crate::FieldReader); impl LKK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LKK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LKK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LKK` writer - Port x lock bit y"] pub struct LKK_W<'a> { w: &'a mut W, } impl<'a> LKK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `LK15` reader - Port x lock bit y (y= 0..15)"] pub struct LK15_R(crate::FieldReader); impl LK15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK15` writer - Port x lock bit y (y= 0..15)"] pub struct LK15_W<'a> { w: &'a mut W, } impl<'a> LK15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LK14` reader - Port x lock bit y (y= 0..15)"] pub struct LK14_R(crate::FieldReader); impl LK14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK14` writer - Port x lock bit y (y= 0..15)"] pub struct LK14_W<'a> { w: &'a mut W, } impl<'a> LK14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `LK13` reader - Port x lock bit y (y= 0..15)"] pub struct LK13_R(crate::FieldReader); impl LK13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK13` writer - Port x lock bit y (y= 0..15)"] pub struct LK13_W<'a> { w: &'a mut W, } impl<'a> LK13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `LK12` reader - Port x lock bit y (y= 0..15)"] pub struct LK12_R(crate::FieldReader); impl LK12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK12` writer - Port x lock bit y (y= 0..15)"] pub struct LK12_W<'a> { w: &'a mut W, } impl<'a> LK12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `LK11` reader - Port x lock bit y (y= 0..15)"] pub struct LK11_R(crate::FieldReader); impl LK11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK11` writer - Port x lock bit y (y= 0..15)"] pub struct LK11_W<'a> { w: &'a mut W, } impl<'a> LK11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `LK10` reader - Port x lock bit y (y= 0..15)"] pub struct LK10_R(crate::FieldReader); impl LK10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK10` writer - Port x lock bit y (y= 0..15)"] pub struct LK10_W<'a> { w: &'a mut W, } impl<'a> LK10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `LK9` reader - Port x lock bit y (y= 0..15)"] pub struct LK9_R(crate::FieldReader); impl LK9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK9` writer - Port x lock bit y (y= 0..15)"] pub struct LK9_W<'a> { w: &'a mut W, } impl<'a> LK9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `LK8` reader - Port x lock bit y (y= 0..15)"] pub struct LK8_R(crate::FieldReader); impl LK8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK8` writer - Port x lock bit y (y= 0..15)"] pub struct LK8_W<'a> { w: &'a mut W, } impl<'a> LK8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `LK7` reader - Port x lock bit y (y= 0..15)"] pub struct LK7_R(crate::FieldReader); impl LK7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK7` writer - Port x lock bit y (y= 0..15)"] pub struct LK7_W<'a> { w: &'a mut W, } impl<'a> LK7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `LK6` reader - Port x lock bit y (y= 0..15)"] pub struct LK6_R(crate::FieldReader); impl LK6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK6` writer - Port x lock bit y (y= 0..15)"] pub struct LK6_W<'a> { w: &'a mut W, } impl<'a> LK6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `LK5` reader - Port x lock bit y (y= 0..15)"] pub struct LK5_R(crate::FieldReader); impl LK5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK5` writer - Port x lock bit y (y= 0..15)"] pub struct LK5_W<'a> { w: &'a mut W, } impl<'a> LK5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `LK4` reader - Port x lock bit y (y= 0..15)"] pub struct LK4_R(crate::FieldReader); impl LK4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK4` writer - Port x lock bit y (y= 0..15)"] pub struct LK4_W<'a> { w: &'a mut W, } impl<'a> LK4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `LK3` reader - Port x lock bit y (y= 0..15)"] pub struct LK3_R(crate::FieldReader); impl LK3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK3` writer - Port x lock bit y (y= 0..15)"] pub struct LK3_W<'a> { w: &'a mut W, } impl<'a> LK3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `LK2` reader - Port x lock bit y (y= 0..15)"] pub struct LK2_R(crate::FieldReader); impl LK2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK2` writer - Port x lock bit y (y= 0..15)"] pub struct LK2_W<'a> { w: &'a mut W, } impl<'a> LK2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `LK1` reader - Port x lock bit y (y= 0..15)"] pub struct LK1_R(crate::FieldReader); impl LK1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK1` writer - Port x lock bit y (y= 0..15)"] pub struct LK1_W<'a> { w: &'a mut W, } impl<'a> LK1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `LK0` reader - Port x lock bit y (y= 0..15)"] pub struct LK0_R(crate::FieldReader); impl LK0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LK0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LK0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LK0` writer - Port x lock bit y (y= 0..15)"] pub struct LK0_W<'a> { w: &'a mut W, } impl<'a> LK0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 16 - Port x lock bit y"] #[inline(always)] pub fn lkk(&self) -> LKK_R { LKK_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk15(&self) -> LK15_R { LK15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk14(&self) -> LK14_R { LK14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk13(&self) -> LK13_R { LK13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk12(&self) -> LK12_R { LK12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk11(&self) -> LK11_R { LK11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk10(&self) -> LK10_R { LK10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk9(&self) -> LK9_R { LK9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk8(&self) -> LK8_R { LK8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk7(&self) -> LK7_R { LK7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk6(&self) -> LK6_R { LK6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk5(&self) -> LK5_R { LK5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk4(&self) -> LK4_R { LK4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk3(&self) -> LK3_R { LK3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk2(&self) -> LK2_R { LK2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk1(&self) -> LK1_R { LK1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk0(&self) -> LK0_R { LK0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 16 - Port x lock bit y"] #[inline(always)] pub fn lkk(&mut self) -> LKK_W { LKK_W { w: self } } #[doc = "Bit 15 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk15(&mut self) -> LK15_W { LK15_W { w: self } } #[doc = "Bit 14 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk14(&mut self) -> LK14_W { LK14_W { w: self } } #[doc = "Bit 13 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk13(&mut self) -> LK13_W { LK13_W { w: self } } #[doc = "Bit 12 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk12(&mut self) -> LK12_W { LK12_W { w: self } } #[doc = "Bit 11 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk11(&mut self) -> LK11_W { LK11_W { w: self } } #[doc = "Bit 10 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk10(&mut self) -> LK10_W { LK10_W { w: self } } #[doc = "Bit 9 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk9(&mut self) -> LK9_W { LK9_W { w: self } } #[doc = "Bit 8 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk8(&mut self) -> LK8_W { LK8_W { w: self } } #[doc = "Bit 7 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk7(&mut self) -> LK7_W { LK7_W { w: self } } #[doc = "Bit 6 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk6(&mut self) -> LK6_W { LK6_W { w: self } } #[doc = "Bit 5 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk5(&mut self) -> LK5_W { LK5_W { w: self } } #[doc = "Bit 4 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk4(&mut self) -> LK4_W { LK4_W { w: self } } #[doc = "Bit 3 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk3(&mut self) -> LK3_W { LK3_W { w: self } } #[doc = "Bit 2 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk2(&mut self) -> LK2_W { LK2_W { w: self } } #[doc = "Bit 1 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk1(&mut self) -> LK1_W { LK1_W { w: self } } #[doc = "Bit 0 - Port x lock bit y (y= 0..15)"] #[inline(always)] pub fn lk0(&mut self) -> LK0_W { LK0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port configuration lock register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lock](index.html) module"] pub struct LOCK_SPEC; impl crate::RegisterSpec for LOCK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [lock::R](R) reader structure"] impl crate::Readable for LOCK_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [lock::W](W) writer structure"] impl crate::Writable for LOCK_SPEC { type Writer = W; } #[doc = "`reset()` method sets LOCK to value 0"] impl crate::Resettable for LOCK_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "AFSEL0 register accessor: an alias for `Reg`"] pub type AFSEL0 = crate::Reg; #[doc = "GPIO alternate function low register"] pub mod afsel0 { #[doc = "Register `AFSEL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `AFSEL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SEL7` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL7_R(crate::FieldReader); impl SEL7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL7` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL7_W<'a> { w: &'a mut W, } impl<'a> SEL7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 28)) | ((value as u32 & 0x0f) << 28); self.w } } #[doc = "Field `SEL6` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL6_R(crate::FieldReader); impl SEL6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL6` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL6_W<'a> { w: &'a mut W, } impl<'a> SEL6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); self.w } } #[doc = "Field `SEL5` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL5_R(crate::FieldReader); impl SEL5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL5` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL5_W<'a> { w: &'a mut W, } impl<'a> SEL5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 20)) | ((value as u32 & 0x0f) << 20); self.w } } #[doc = "Field `SEL4` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL4_R(crate::FieldReader); impl SEL4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL4` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL4_W<'a> { w: &'a mut W, } impl<'a> SEL4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16); self.w } } #[doc = "Field `SEL3` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL3_R(crate::FieldReader); impl SEL3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL3` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL3_W<'a> { w: &'a mut W, } impl<'a> SEL3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `SEL2` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL2_R(crate::FieldReader); impl SEL2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL2` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL2_W<'a> { w: &'a mut W, } impl<'a> SEL2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `SEL1` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL1_R(crate::FieldReader); impl SEL1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL1` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL1_W<'a> { w: &'a mut W, } impl<'a> SEL1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `SEL0` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL0_R(crate::FieldReader); impl SEL0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL0` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL0_W<'a> { w: &'a mut W, } impl<'a> SEL0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel7(&self) -> SEL7_R { SEL7_R::new(((self.bits >> 28) & 0x0f) as u8) } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel6(&self) -> SEL6_R { SEL6_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel5(&self) -> SEL5_R { SEL5_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel4(&self) -> SEL4_R { SEL4_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel3(&self) -> SEL3_R { SEL3_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel2(&self) -> SEL2_R { SEL2_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel1(&self) -> SEL1_R { SEL1_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel0(&self) -> SEL0_R { SEL0_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel7(&mut self) -> SEL7_W { SEL7_W { w: self } } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel6(&mut self) -> SEL6_W { SEL6_W { w: self } } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel5(&mut self) -> SEL5_W { SEL5_W { w: self } } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel4(&mut self) -> SEL4_W { SEL4_W { w: self } } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel3(&mut self) -> SEL3_W { SEL3_W { w: self } } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel2(&mut self) -> SEL2_W { SEL2_W { w: self } } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel1(&mut self) -> SEL1_W { SEL1_W { w: self } } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel0(&mut self) -> SEL0_W { SEL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO alternate function low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afsel0](index.html) module"] pub struct AFSEL0_SPEC; impl crate::RegisterSpec for AFSEL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [afsel0::R](R) reader structure"] impl crate::Readable for AFSEL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [afsel0::W](W) writer structure"] impl crate::Writable for AFSEL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets AFSEL0 to value 0"] impl crate::Resettable for AFSEL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "AFSEL1 register accessor: an alias for `Reg`"] pub type AFSEL1 = crate::Reg; #[doc = "GPIO alternate function register 1"] pub mod afsel1 { #[doc = "Register `AFSEL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `AFSEL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SEL15` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL15_R(crate::FieldReader); impl SEL15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL15` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL15_W<'a> { w: &'a mut W, } impl<'a> SEL15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 28)) | ((value as u32 & 0x0f) << 28); self.w } } #[doc = "Field `SEL14` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL14_R(crate::FieldReader); impl SEL14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL14` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL14_W<'a> { w: &'a mut W, } impl<'a> SEL14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); self.w } } #[doc = "Field `SEL13` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL13_R(crate::FieldReader); impl SEL13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL13` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL13_W<'a> { w: &'a mut W, } impl<'a> SEL13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 20)) | ((value as u32 & 0x0f) << 20); self.w } } #[doc = "Field `SEL12` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL12_R(crate::FieldReader); impl SEL12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL12` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL12_W<'a> { w: &'a mut W, } impl<'a> SEL12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16); self.w } } #[doc = "Field `SEL11` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL11_R(crate::FieldReader); impl SEL11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL11` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL11_W<'a> { w: &'a mut W, } impl<'a> SEL11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `SEL10` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL10_R(crate::FieldReader); impl SEL10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL10` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL10_W<'a> { w: &'a mut W, } impl<'a> SEL10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `SEL9` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL9_R(crate::FieldReader); impl SEL9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL9` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL9_W<'a> { w: &'a mut W, } impl<'a> SEL9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `SEL8` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL8_R(crate::FieldReader); impl SEL8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL8` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL8_W<'a> { w: &'a mut W, } impl<'a> SEL8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel15(&self) -> SEL15_R { SEL15_R::new(((self.bits >> 28) & 0x0f) as u8) } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel14(&self) -> SEL14_R { SEL14_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel13(&self) -> SEL13_R { SEL13_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel12(&self) -> SEL12_R { SEL12_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel11(&self) -> SEL11_R { SEL11_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel10(&self) -> SEL10_R { SEL10_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel9(&self) -> SEL9_R { SEL9_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel8(&self) -> SEL8_R { SEL8_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel15(&mut self) -> SEL15_W { SEL15_W { w: self } } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel14(&mut self) -> SEL14_W { SEL14_W { w: self } } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel13(&mut self) -> SEL13_W { SEL13_W { w: self } } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel12(&mut self) -> SEL12_W { SEL12_W { w: self } } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel11(&mut self) -> SEL11_W { SEL11_W { w: self } } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel10(&mut self) -> SEL10_W { SEL10_W { w: self } } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel9(&mut self) -> SEL9_W { SEL9_W { w: self } } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel8(&mut self) -> SEL8_W { SEL8_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO alternate function register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afsel1](index.html) module"] pub struct AFSEL1_SPEC; impl crate::RegisterSpec for AFSEL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [afsel1::R](R) reader structure"] impl crate::Readable for AFSEL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [afsel1::W](W) writer structure"] impl crate::Writable for AFSEL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets AFSEL1 to value 0"] impl crate::Resettable for AFSEL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BC register accessor: an alias for `Reg`"] pub type BC = crate::Reg; #[doc = "Port bit reset register"] pub mod bc { #[doc = "Register `BC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CR0` writer - Port cleat bit"] pub struct CR0_W<'a> { w: &'a mut W, } impl<'a> CR0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CR1` writer - Port cleat bit"] pub struct CR1_W<'a> { w: &'a mut W, } impl<'a> CR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CR2` writer - Port cleat bit"] pub struct CR2_W<'a> { w: &'a mut W, } impl<'a> CR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CR3` writer - Port cleat bit"] pub struct CR3_W<'a> { w: &'a mut W, } impl<'a> CR3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CR4` writer - Port cleat bit"] pub struct CR4_W<'a> { w: &'a mut W, } impl<'a> CR4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CR5` writer - Port cleat bit"] pub struct CR5_W<'a> { w: &'a mut W, } impl<'a> CR5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CR6` writer - Port cleat bit"] pub struct CR6_W<'a> { w: &'a mut W, } impl<'a> CR6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CR7` writer - Port cleat bit"] pub struct CR7_W<'a> { w: &'a mut W, } impl<'a> CR7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CR8` writer - Port cleat bit"] pub struct CR8_W<'a> { w: &'a mut W, } impl<'a> CR8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CR9` writer - Port cleat bit"] pub struct CR9_W<'a> { w: &'a mut W, } impl<'a> CR9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CR10` writer - Port cleat bit"] pub struct CR10_W<'a> { w: &'a mut W, } impl<'a> CR10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CR11` writer - Port cleat bit"] pub struct CR11_W<'a> { w: &'a mut W, } impl<'a> CR11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CR12` writer - Port cleat bit"] pub struct CR12_W<'a> { w: &'a mut W, } impl<'a> CR12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CR13` writer - Port cleat bit"] pub struct CR13_W<'a> { w: &'a mut W, } impl<'a> CR13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CR14` writer - Port cleat bit"] pub struct CR14_W<'a> { w: &'a mut W, } impl<'a> CR14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CR15` writer - Port cleat bit"] pub struct CR15_W<'a> { w: &'a mut W, } impl<'a> CR15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - Port cleat bit"] #[inline(always)] pub fn cr0(&mut self) -> CR0_W { CR0_W { w: self } } #[doc = "Bit 1 - Port cleat bit"] #[inline(always)] pub fn cr1(&mut self) -> CR1_W { CR1_W { w: self } } #[doc = "Bit 2 - Port cleat bit"] #[inline(always)] pub fn cr2(&mut self) -> CR2_W { CR2_W { w: self } } #[doc = "Bit 3 - Port cleat bit"] #[inline(always)] pub fn cr3(&mut self) -> CR3_W { CR3_W { w: self } } #[doc = "Bit 4 - Port cleat bit"] #[inline(always)] pub fn cr4(&mut self) -> CR4_W { CR4_W { w: self } } #[doc = "Bit 5 - Port cleat bit"] #[inline(always)] pub fn cr5(&mut self) -> CR5_W { CR5_W { w: self } } #[doc = "Bit 6 - Port cleat bit"] #[inline(always)] pub fn cr6(&mut self) -> CR6_W { CR6_W { w: self } } #[doc = "Bit 7 - Port cleat bit"] #[inline(always)] pub fn cr7(&mut self) -> CR7_W { CR7_W { w: self } } #[doc = "Bit 8 - Port cleat bit"] #[inline(always)] pub fn cr8(&mut self) -> CR8_W { CR8_W { w: self } } #[doc = "Bit 9 - Port cleat bit"] #[inline(always)] pub fn cr9(&mut self) -> CR9_W { CR9_W { w: self } } #[doc = "Bit 10 - Port cleat bit"] #[inline(always)] pub fn cr10(&mut self) -> CR10_W { CR10_W { w: self } } #[doc = "Bit 11 - Port cleat bit"] #[inline(always)] pub fn cr11(&mut self) -> CR11_W { CR11_W { w: self } } #[doc = "Bit 12 - Port cleat bit"] #[inline(always)] pub fn cr12(&mut self) -> CR12_W { CR12_W { w: self } } #[doc = "Bit 13 - Port cleat bit"] #[inline(always)] pub fn cr13(&mut self) -> CR13_W { CR13_W { w: self } } #[doc = "Bit 14 - Port cleat bit"] #[inline(always)] pub fn cr14(&mut self) -> CR14_W { CR14_W { w: self } } #[doc = "Bit 15 - Port cleat bit"] #[inline(always)] pub fn cr15(&mut self) -> CR15_W { CR15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port bit reset register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bc](index.html) module"] pub struct BC_SPEC; impl crate::RegisterSpec for BC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [bc::W](W) writer structure"] impl crate::Writable for BC_SPEC { type Writer = W; } #[doc = "`reset()` method sets BC to value 0"] impl crate::Resettable for BC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "TG register accessor: an alias for `Reg`"] pub type TG = crate::Reg; #[doc = "Port bit toggle register"] pub mod tg { #[doc = "Register `TG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TG0` writer - Port toggle bit"] pub struct TG0_W<'a> { w: &'a mut W, } impl<'a> TG0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `TG1` writer - Port toggle bit"] pub struct TG1_W<'a> { w: &'a mut W, } impl<'a> TG1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TG2` writer - Port toggle bit"] pub struct TG2_W<'a> { w: &'a mut W, } impl<'a> TG2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `TG3` writer - Port toggle bit"] pub struct TG3_W<'a> { w: &'a mut W, } impl<'a> TG3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `TG4` writer - Port toggle bit"] pub struct TG4_W<'a> { w: &'a mut W, } impl<'a> TG4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TG5` writer - Port toggle bit"] pub struct TG5_W<'a> { w: &'a mut W, } impl<'a> TG5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `TG6` writer - Port toggle bit"] pub struct TG6_W<'a> { w: &'a mut W, } impl<'a> TG6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `TG7` writer - Port toggle bit"] pub struct TG7_W<'a> { w: &'a mut W, } impl<'a> TG7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TG8` writer - Port toggle bit"] pub struct TG8_W<'a> { w: &'a mut W, } impl<'a> TG8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TG9` writer - Port toggle bit"] pub struct TG9_W<'a> { w: &'a mut W, } impl<'a> TG9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `TG10` writer - Port toggle bit"] pub struct TG10_W<'a> { w: &'a mut W, } impl<'a> TG10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `TG11` writer - Port toggle bit"] pub struct TG11_W<'a> { w: &'a mut W, } impl<'a> TG11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TG12` writer - Port toggle bit"] pub struct TG12_W<'a> { w: &'a mut W, } impl<'a> TG12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TG13` writer - Port toggle bit"] pub struct TG13_W<'a> { w: &'a mut W, } impl<'a> TG13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `TG14` writer - Port toggle bit"] pub struct TG14_W<'a> { w: &'a mut W, } impl<'a> TG14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `TG15` writer - Port toggle bit"] pub struct TG15_W<'a> { w: &'a mut W, } impl<'a> TG15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - Port toggle bit"] #[inline(always)] pub fn tg0(&mut self) -> TG0_W { TG0_W { w: self } } #[doc = "Bit 1 - Port toggle bit"] #[inline(always)] pub fn tg1(&mut self) -> TG1_W { TG1_W { w: self } } #[doc = "Bit 2 - Port toggle bit"] #[inline(always)] pub fn tg2(&mut self) -> TG2_W { TG2_W { w: self } } #[doc = "Bit 3 - Port toggle bit"] #[inline(always)] pub fn tg3(&mut self) -> TG3_W { TG3_W { w: self } } #[doc = "Bit 4 - Port toggle bit"] #[inline(always)] pub fn tg4(&mut self) -> TG4_W { TG4_W { w: self } } #[doc = "Bit 5 - Port toggle bit"] #[inline(always)] pub fn tg5(&mut self) -> TG5_W { TG5_W { w: self } } #[doc = "Bit 6 - Port toggle bit"] #[inline(always)] pub fn tg6(&mut self) -> TG6_W { TG6_W { w: self } } #[doc = "Bit 7 - Port toggle bit"] #[inline(always)] pub fn tg7(&mut self) -> TG7_W { TG7_W { w: self } } #[doc = "Bit 8 - Port toggle bit"] #[inline(always)] pub fn tg8(&mut self) -> TG8_W { TG8_W { w: self } } #[doc = "Bit 9 - Port toggle bit"] #[inline(always)] pub fn tg9(&mut self) -> TG9_W { TG9_W { w: self } } #[doc = "Bit 10 - Port toggle bit"] #[inline(always)] pub fn tg10(&mut self) -> TG10_W { TG10_W { w: self } } #[doc = "Bit 11 - Port toggle bit"] #[inline(always)] pub fn tg11(&mut self) -> TG11_W { TG11_W { w: self } } #[doc = "Bit 12 - Port toggle bit"] #[inline(always)] pub fn tg12(&mut self) -> TG12_W { TG12_W { w: self } } #[doc = "Bit 13 - Port toggle bit"] #[inline(always)] pub fn tg13(&mut self) -> TG13_W { TG13_W { w: self } } #[doc = "Bit 14 - Port toggle bit"] #[inline(always)] pub fn tg14(&mut self) -> TG14_W { TG14_W { w: self } } #[doc = "Bit 15 - Port toggle bit"] #[inline(always)] pub fn tg15(&mut self) -> TG15_W { TG15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port bit toggle register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tg](index.html) module"] pub struct TG_SPEC; impl crate::RegisterSpec for TG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [tg::W](W) writer structure"] impl crate::Writable for TG_SPEC { type Writer = W; } #[doc = "`reset()` method sets TG to value 0"] impl crate::Resettable for TG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OSPD1 register accessor: an alias for `Reg`"] pub type OSPD1 = crate::Reg; #[doc = "Port output speed register 1"] pub mod ospd1 { #[doc = "Register `OSPD1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OSPD1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SPD0` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD0_R(crate::FieldReader); impl SPD0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD0` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD0_W<'a> { w: &'a mut W, } impl<'a> SPD0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `SPD1` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD1_R(crate::FieldReader); impl SPD1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD1` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD1_W<'a> { w: &'a mut W, } impl<'a> SPD1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `SPD2` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD2_R(crate::FieldReader); impl SPD2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD2` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD2_W<'a> { w: &'a mut W, } impl<'a> SPD2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `SPD3` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD3_R(crate::FieldReader); impl SPD3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD3` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD3_W<'a> { w: &'a mut W, } impl<'a> SPD3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `SPD4` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD4_R(crate::FieldReader); impl SPD4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD4` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD4_W<'a> { w: &'a mut W, } impl<'a> SPD4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `SPD5` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD5_R(crate::FieldReader); impl SPD5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD5` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD5_W<'a> { w: &'a mut W, } impl<'a> SPD5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `SPD6` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD6_R(crate::FieldReader); impl SPD6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD6` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD6_W<'a> { w: &'a mut W, } impl<'a> SPD6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `SPD7` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD7_R(crate::FieldReader); impl SPD7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD7` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD7_W<'a> { w: &'a mut W, } impl<'a> SPD7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SPD8` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD8_R(crate::FieldReader); impl SPD8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD8` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD8_W<'a> { w: &'a mut W, } impl<'a> SPD8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `SPD9` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD9_R(crate::FieldReader); impl SPD9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD9` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD9_W<'a> { w: &'a mut W, } impl<'a> SPD9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `SPD10` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD10_R(crate::FieldReader); impl SPD10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD10` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD10_W<'a> { w: &'a mut W, } impl<'a> SPD10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `SPD11` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD11_R(crate::FieldReader); impl SPD11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD11` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD11_W<'a> { w: &'a mut W, } impl<'a> SPD11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `SPD12` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD12_R(crate::FieldReader); impl SPD12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD12` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD12_W<'a> { w: &'a mut W, } impl<'a> SPD12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `SPD13` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD13_R(crate::FieldReader); impl SPD13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD13` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD13_W<'a> { w: &'a mut W, } impl<'a> SPD13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `SPD14` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD14_R(crate::FieldReader); impl SPD14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD14` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD14_W<'a> { w: &'a mut W, } impl<'a> SPD14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `SPD15` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD15_R(crate::FieldReader); impl SPD15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD15` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD15_W<'a> { w: &'a mut W, } impl<'a> SPD15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl R { #[doc = "Bit 0 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd0(&self) -> SPD0_R { SPD0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd1(&self) -> SPD1_R { SPD1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd2(&self) -> SPD2_R { SPD2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd3(&self) -> SPD3_R { SPD3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd4(&self) -> SPD4_R { SPD4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd5(&self) -> SPD5_R { SPD5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd6(&self) -> SPD6_R { SPD6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd7(&self) -> SPD7_R { SPD7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd8(&self) -> SPD8_R { SPD8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd9(&self) -> SPD9_R { SPD9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd10(&self) -> SPD10_R { SPD10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd11(&self) -> SPD11_R { SPD11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd12(&self) -> SPD12_R { SPD12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd13(&self) -> SPD13_R { SPD13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd14(&self) -> SPD14_R { SPD14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd15(&self) -> SPD15_R { SPD15_R::new(((self.bits >> 15) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd0(&mut self) -> SPD0_W { SPD0_W { w: self } } #[doc = "Bit 1 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd1(&mut self) -> SPD1_W { SPD1_W { w: self } } #[doc = "Bit 2 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd2(&mut self) -> SPD2_W { SPD2_W { w: self } } #[doc = "Bit 3 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd3(&mut self) -> SPD3_W { SPD3_W { w: self } } #[doc = "Bit 4 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd4(&mut self) -> SPD4_W { SPD4_W { w: self } } #[doc = "Bit 5 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd5(&mut self) -> SPD5_W { SPD5_W { w: self } } #[doc = "Bit 6 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd6(&mut self) -> SPD6_W { SPD6_W { w: self } } #[doc = "Bit 7 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd7(&mut self) -> SPD7_W { SPD7_W { w: self } } #[doc = "Bit 8 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd8(&mut self) -> SPD8_W { SPD8_W { w: self } } #[doc = "Bit 9 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd9(&mut self) -> SPD9_W { SPD9_W { w: self } } #[doc = "Bit 10 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd10(&mut self) -> SPD10_W { SPD10_W { w: self } } #[doc = "Bit 11 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd11(&mut self) -> SPD11_W { SPD11_W { w: self } } #[doc = "Bit 12 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd12(&mut self) -> SPD12_W { SPD12_W { w: self } } #[doc = "Bit 13 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd13(&mut self) -> SPD13_W { SPD13_W { w: self } } #[doc = "Bit 14 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd14(&mut self) -> SPD14_W { SPD14_W { w: self } } #[doc = "Bit 15 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd15(&mut self) -> SPD15_W { SPD15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port output speed register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd1](index.html) module"] pub struct OSPD1_SPEC; impl crate::RegisterSpec for OSPD1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ospd1::R](R) reader structure"] impl crate::Readable for OSPD1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ospd1::W](W) writer structure"] impl crate::Writable for OSPD1_SPEC { type Writer = W; } #[doc = "`reset()` method sets OSPD1 to value 0"] impl crate::Resettable for OSPD1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose I/Os"] pub struct GPIOC { _marker: PhantomData<*const ()>, } unsafe impl Send for GPIOC {} impl GPIOC { #[doc = r"Pointer to the register block"] pub const PTR: *const gpioc::RegisterBlock = 0x4800_0800 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const gpioc::RegisterBlock { Self::PTR } } impl Deref for GPIOC { type Target = gpioc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for GPIOC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("GPIOC").finish() } } #[doc = "General-purpose I/Os"] pub mod gpioc { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - GPIO port control register"] pub ctl: crate::Reg, #[doc = "0x04 - GPIO port output type register"] pub omode: crate::Reg, #[doc = "0x08 - GPIO port output speed register 0"] pub ospd0: crate::Reg, #[doc = "0x0c - GPIO port pull-up/pull-down register"] pub pud: crate::Reg, #[doc = "0x10 - GPIO port input data register"] pub istat: crate::Reg, #[doc = "0x14 - GPIO port output data register"] pub octl: crate::Reg, #[doc = "0x18 - GPIO port bit set/reset register"] pub bop: crate::Reg, _reserved7: [u8; 0x04], #[doc = "0x20 - GPIO alternate function low register"] pub afsel0: crate::Reg, #[doc = "0x24 - GPIO alternate function register 1"] pub afsel1: crate::Reg, #[doc = "0x28 - Port bit reset register"] pub bc: crate::Reg, #[doc = "0x2c - Port bit toggle register"] pub tg: crate::Reg, _reserved11: [u8; 0x0c], #[doc = "0x3c - Port output speed register 1"] pub ospd1: crate::Reg, } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "GPIO port control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CTL15` reader - Port x configuration bits (y = 0..15)"] pub struct CTL15_R(crate::FieldReader); impl CTL15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL15` writer - Port x configuration bits (y = 0..15)"] pub struct CTL15_W<'a> { w: &'a mut W, } impl<'a> CTL15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `CTL14` reader - Port x configuration bits (y = 0..15)"] pub struct CTL14_R(crate::FieldReader); impl CTL14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL14` writer - Port x configuration bits (y = 0..15)"] pub struct CTL14_W<'a> { w: &'a mut W, } impl<'a> CTL14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `CTL13` reader - Port x configuration bits (y = 0..15)"] pub struct CTL13_R(crate::FieldReader); impl CTL13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL13` writer - Port x configuration bits (y = 0..15)"] pub struct CTL13_W<'a> { w: &'a mut W, } impl<'a> CTL13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `CTL12` reader - Port x configuration bits (y = 0..15)"] pub struct CTL12_R(crate::FieldReader); impl CTL12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL12` writer - Port x configuration bits (y = 0..15)"] pub struct CTL12_W<'a> { w: &'a mut W, } impl<'a> CTL12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `CTL11` reader - Port x configuration bits (y = 0..15)"] pub struct CTL11_R(crate::FieldReader); impl CTL11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL11` writer - Port x configuration bits (y = 0..15)"] pub struct CTL11_W<'a> { w: &'a mut W, } impl<'a> CTL11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `CTL10` reader - Port x configuration bits (y = 0..15)"] pub struct CTL10_R(crate::FieldReader); impl CTL10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL10` writer - Port x configuration bits (y = 0..15)"] pub struct CTL10_W<'a> { w: &'a mut W, } impl<'a> CTL10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `CTL9` reader - Port x configuration bits (y = 0..15)"] pub struct CTL9_R(crate::FieldReader); impl CTL9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL9` writer - Port x configuration bits (y = 0..15)"] pub struct CTL9_W<'a> { w: &'a mut W, } impl<'a> CTL9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `CTL8` reader - Port x configuration bits (y = 0..15)"] pub struct CTL8_R(crate::FieldReader); impl CTL8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL8` writer - Port x configuration bits (y = 0..15)"] pub struct CTL8_W<'a> { w: &'a mut W, } impl<'a> CTL8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `CTL7` reader - Port x configuration bits (y = 0..15)"] pub struct CTL7_R(crate::FieldReader); impl CTL7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL7` writer - Port x configuration bits (y = 0..15)"] pub struct CTL7_W<'a> { w: &'a mut W, } impl<'a> CTL7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `CTL6` reader - Port x configuration bits (y = 0..15)"] pub struct CTL6_R(crate::FieldReader); impl CTL6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL6` writer - Port x configuration bits (y = 0..15)"] pub struct CTL6_W<'a> { w: &'a mut W, } impl<'a> CTL6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `CTL5` reader - Port x configuration bits (y = 0..15)"] pub struct CTL5_R(crate::FieldReader); impl CTL5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL5` writer - Port x configuration bits (y = 0..15)"] pub struct CTL5_W<'a> { w: &'a mut W, } impl<'a> CTL5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `CTL4` reader - Port x configuration bits (y = 0..15)"] pub struct CTL4_R(crate::FieldReader); impl CTL4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL4` writer - Port x configuration bits (y = 0..15)"] pub struct CTL4_W<'a> { w: &'a mut W, } impl<'a> CTL4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CTL3` reader - Port x configuration bits (y = 0..15)"] pub struct CTL3_R(crate::FieldReader); impl CTL3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL3` writer - Port x configuration bits (y = 0..15)"] pub struct CTL3_W<'a> { w: &'a mut W, } impl<'a> CTL3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `CTL2` reader - Port x configuration bits (y = 0..15)"] pub struct CTL2_R(crate::FieldReader); impl CTL2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL2` writer - Port x configuration bits (y = 0..15)"] pub struct CTL2_W<'a> { w: &'a mut W, } impl<'a> CTL2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `CTL1` reader - Port x configuration bits (y = 0..15)"] pub struct CTL1_R(crate::FieldReader); impl CTL1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL1` writer - Port x configuration bits (y = 0..15)"] pub struct CTL1_W<'a> { w: &'a mut W, } impl<'a> CTL1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CTL0` reader - Port x configuration bits (y = 0..15)"] pub struct CTL0_R(crate::FieldReader); impl CTL0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL0` writer - Port x configuration bits (y = 0..15)"] pub struct CTL0_W<'a> { w: &'a mut W, } impl<'a> CTL0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl15(&self) -> CTL15_R { CTL15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl14(&self) -> CTL14_R { CTL14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl13(&self) -> CTL13_R { CTL13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl12(&self) -> CTL12_R { CTL12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl11(&self) -> CTL11_R { CTL11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl10(&self) -> CTL10_R { CTL10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl9(&self) -> CTL9_R { CTL9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl8(&self) -> CTL8_R { CTL8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl7(&self) -> CTL7_R { CTL7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl6(&self) -> CTL6_R { CTL6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl5(&self) -> CTL5_R { CTL5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl4(&self) -> CTL4_R { CTL4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl3(&self) -> CTL3_R { CTL3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl2(&self) -> CTL2_R { CTL2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl1(&self) -> CTL1_R { CTL1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl0(&self) -> CTL0_R { CTL0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl15(&mut self) -> CTL15_W { CTL15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl14(&mut self) -> CTL14_W { CTL14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl13(&mut self) -> CTL13_W { CTL13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl12(&mut self) -> CTL12_W { CTL12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl11(&mut self) -> CTL11_W { CTL11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl10(&mut self) -> CTL10_W { CTL10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl9(&mut self) -> CTL9_W { CTL9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl8(&mut self) -> CTL8_W { CTL8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl7(&mut self) -> CTL7_W { CTL7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl6(&mut self) -> CTL6_W { CTL6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl5(&mut self) -> CTL5_W { CTL5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl4(&mut self) -> CTL4_W { CTL4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl3(&mut self) -> CTL3_W { CTL3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl2(&mut self) -> CTL2_W { CTL2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl1(&mut self) -> CTL1_W { CTL1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl0(&mut self) -> CTL0_W { CTL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OMODE register accessor: an alias for `Reg`"] pub type OMODE = crate::Reg; #[doc = "GPIO port output type register"] pub mod omode { #[doc = "Register `OMODE` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OMODE` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OM15` reader - Port x configuration bit 15"] pub struct OM15_R(crate::FieldReader); impl OM15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM15` writer - Port x configuration bit 15"] pub struct OM15_W<'a> { w: &'a mut W, } impl<'a> OM15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OM14` reader - Port x configuration bit 14"] pub struct OM14_R(crate::FieldReader); impl OM14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM14` writer - Port x configuration bit 14"] pub struct OM14_W<'a> { w: &'a mut W, } impl<'a> OM14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `OM13` reader - Port x configuration bit 13"] pub struct OM13_R(crate::FieldReader); impl OM13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM13` writer - Port x configuration bit 13"] pub struct OM13_W<'a> { w: &'a mut W, } impl<'a> OM13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OM12` reader - Port x configuration bit 12"] pub struct OM12_R(crate::FieldReader); impl OM12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM12` writer - Port x configuration bit 12"] pub struct OM12_W<'a> { w: &'a mut W, } impl<'a> OM12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OM11` reader - Port x configuration bit 11"] pub struct OM11_R(crate::FieldReader); impl OM11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM11` writer - Port x configuration bit 11"] pub struct OM11_W<'a> { w: &'a mut W, } impl<'a> OM11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `OM10` reader - Port x configuration bit 10"] pub struct OM10_R(crate::FieldReader); impl OM10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM10` writer - Port x configuration bit 10"] pub struct OM10_W<'a> { w: &'a mut W, } impl<'a> OM10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OM9` reader - Port x configuration bit 9"] pub struct OM9_R(crate::FieldReader); impl OM9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM9` writer - Port x configuration bit 9"] pub struct OM9_W<'a> { w: &'a mut W, } impl<'a> OM9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OM8` reader - Port x configuration bit 8"] pub struct OM8_R(crate::FieldReader); impl OM8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM8` writer - Port x configuration bit 8"] pub struct OM8_W<'a> { w: &'a mut W, } impl<'a> OM8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OM7` reader - Port x configuration bit 7"] pub struct OM7_R(crate::FieldReader); impl OM7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM7` writer - Port x configuration bit 7"] pub struct OM7_W<'a> { w: &'a mut W, } impl<'a> OM7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `OM6` reader - Port x configuration bit 6"] pub struct OM6_R(crate::FieldReader); impl OM6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM6` writer - Port x configuration bit 6"] pub struct OM6_W<'a> { w: &'a mut W, } impl<'a> OM6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OM5` reader - Port x configuration bit 5"] pub struct OM5_R(crate::FieldReader); impl OM5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM5` writer - Port x configuration bit 5"] pub struct OM5_W<'a> { w: &'a mut W, } impl<'a> OM5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OM4` reader - Port x configuration bit 4"] pub struct OM4_R(crate::FieldReader); impl OM4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM4` writer - Port x configuration bit 4"] pub struct OM4_W<'a> { w: &'a mut W, } impl<'a> OM4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OM3` reader - Port x configuration bit 3"] pub struct OM3_R(crate::FieldReader); impl OM3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM3` writer - Port x configuration bit 3"] pub struct OM3_W<'a> { w: &'a mut W, } impl<'a> OM3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `OM2` reader - Port x configuration bit 2"] pub struct OM2_R(crate::FieldReader); impl OM2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM2` writer - Port x configuration bit 2"] pub struct OM2_W<'a> { w: &'a mut W, } impl<'a> OM2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `OM1` reader - Port x configuration bit 1"] pub struct OM1_R(crate::FieldReader); impl OM1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM1` writer - Port x configuration bit 1"] pub struct OM1_W<'a> { w: &'a mut W, } impl<'a> OM1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OM0` reader - Port x configuration bit 0"] pub struct OM0_R(crate::FieldReader); impl OM0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM0` writer - Port x configuration bit 0"] pub struct OM0_W<'a> { w: &'a mut W, } impl<'a> OM0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Port x configuration bit 15"] #[inline(always)] pub fn om15(&self) -> OM15_R { OM15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port x configuration bit 14"] #[inline(always)] pub fn om14(&self) -> OM14_R { OM14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port x configuration bit 13"] #[inline(always)] pub fn om13(&self) -> OM13_R { OM13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port x configuration bit 12"] #[inline(always)] pub fn om12(&self) -> OM12_R { OM12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port x configuration bit 11"] #[inline(always)] pub fn om11(&self) -> OM11_R { OM11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port x configuration bit 10"] #[inline(always)] pub fn om10(&self) -> OM10_R { OM10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port x configuration bit 9"] #[inline(always)] pub fn om9(&self) -> OM9_R { OM9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port x configuration bit 8"] #[inline(always)] pub fn om8(&self) -> OM8_R { OM8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port x configuration bit 7"] #[inline(always)] pub fn om7(&self) -> OM7_R { OM7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port x configuration bit 6"] #[inline(always)] pub fn om6(&self) -> OM6_R { OM6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port x configuration bit 5"] #[inline(always)] pub fn om5(&self) -> OM5_R { OM5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port x configuration bit 4"] #[inline(always)] pub fn om4(&self) -> OM4_R { OM4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port x configuration bit 3"] #[inline(always)] pub fn om3(&self) -> OM3_R { OM3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port x configuration bit 2"] #[inline(always)] pub fn om2(&self) -> OM2_R { OM2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port x configuration bit 1"] #[inline(always)] pub fn om1(&self) -> OM1_R { OM1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port x configuration bit 0"] #[inline(always)] pub fn om0(&self) -> OM0_R { OM0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Port x configuration bit 15"] #[inline(always)] pub fn om15(&mut self) -> OM15_W { OM15_W { w: self } } #[doc = "Bit 14 - Port x configuration bit 14"] #[inline(always)] pub fn om14(&mut self) -> OM14_W { OM14_W { w: self } } #[doc = "Bit 13 - Port x configuration bit 13"] #[inline(always)] pub fn om13(&mut self) -> OM13_W { OM13_W { w: self } } #[doc = "Bit 12 - Port x configuration bit 12"] #[inline(always)] pub fn om12(&mut self) -> OM12_W { OM12_W { w: self } } #[doc = "Bit 11 - Port x configuration bit 11"] #[inline(always)] pub fn om11(&mut self) -> OM11_W { OM11_W { w: self } } #[doc = "Bit 10 - Port x configuration bit 10"] #[inline(always)] pub fn om10(&mut self) -> OM10_W { OM10_W { w: self } } #[doc = "Bit 9 - Port x configuration bit 9"] #[inline(always)] pub fn om9(&mut self) -> OM9_W { OM9_W { w: self } } #[doc = "Bit 8 - Port x configuration bit 8"] #[inline(always)] pub fn om8(&mut self) -> OM8_W { OM8_W { w: self } } #[doc = "Bit 7 - Port x configuration bit 7"] #[inline(always)] pub fn om7(&mut self) -> OM7_W { OM7_W { w: self } } #[doc = "Bit 6 - Port x configuration bit 6"] #[inline(always)] pub fn om6(&mut self) -> OM6_W { OM6_W { w: self } } #[doc = "Bit 5 - Port x configuration bit 5"] #[inline(always)] pub fn om5(&mut self) -> OM5_W { OM5_W { w: self } } #[doc = "Bit 4 - Port x configuration bit 4"] #[inline(always)] pub fn om4(&mut self) -> OM4_W { OM4_W { w: self } } #[doc = "Bit 3 - Port x configuration bit 3"] #[inline(always)] pub fn om3(&mut self) -> OM3_W { OM3_W { w: self } } #[doc = "Bit 2 - Port x configuration bit 2"] #[inline(always)] pub fn om2(&mut self) -> OM2_W { OM2_W { w: self } } #[doc = "Bit 1 - Port x configuration bit 1"] #[inline(always)] pub fn om1(&mut self) -> OM1_W { OM1_W { w: self } } #[doc = "Bit 0 - Port x configuration bit 0"] #[inline(always)] pub fn om0(&mut self) -> OM0_W { OM0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output type register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [omode](index.html) module"] pub struct OMODE_SPEC; impl crate::RegisterSpec for OMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [omode::R](R) reader structure"] impl crate::Readable for OMODE_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [omode::W](W) writer structure"] impl crate::Writable for OMODE_SPEC { type Writer = W; } #[doc = "`reset()` method sets OMODE to value 0"] impl crate::Resettable for OMODE_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OSPD0 register accessor: an alias for `Reg`"] pub type OSPD0 = crate::Reg; #[doc = "GPIO port output speed register 0"] pub mod ospd0 { #[doc = "Register `OSPD0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OSPD0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OSPD15` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD15_R(crate::FieldReader); impl OSPD15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD15` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD15_W<'a> { w: &'a mut W, } impl<'a> OSPD15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `OSPD14` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD14_R(crate::FieldReader); impl OSPD14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD14` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD14_W<'a> { w: &'a mut W, } impl<'a> OSPD14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `OSPD13` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD13_R(crate::FieldReader); impl OSPD13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD13` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD13_W<'a> { w: &'a mut W, } impl<'a> OSPD13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `OSPD12` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD12_R(crate::FieldReader); impl OSPD12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD12` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD12_W<'a> { w: &'a mut W, } impl<'a> OSPD12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `OSPD11` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD11_R(crate::FieldReader); impl OSPD11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD11` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD11_W<'a> { w: &'a mut W, } impl<'a> OSPD11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `OSPD10` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD10_R(crate::FieldReader); impl OSPD10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD10` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD10_W<'a> { w: &'a mut W, } impl<'a> OSPD10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `OSPD9` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD9_R(crate::FieldReader); impl OSPD9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD9` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD9_W<'a> { w: &'a mut W, } impl<'a> OSPD9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `OSPD8` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD8_R(crate::FieldReader); impl OSPD8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD8` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD8_W<'a> { w: &'a mut W, } impl<'a> OSPD8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `OSPD7` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD7_R(crate::FieldReader); impl OSPD7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD7` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD7_W<'a> { w: &'a mut W, } impl<'a> OSPD7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `OSPD6` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD6_R(crate::FieldReader); impl OSPD6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD6` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD6_W<'a> { w: &'a mut W, } impl<'a> OSPD6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `OSPD5` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD5_R(crate::FieldReader); impl OSPD5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD5` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD5_W<'a> { w: &'a mut W, } impl<'a> OSPD5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `OSPD4` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD4_R(crate::FieldReader); impl OSPD4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD4` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD4_W<'a> { w: &'a mut W, } impl<'a> OSPD4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `OSPD3` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD3_R(crate::FieldReader); impl OSPD3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD3` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD3_W<'a> { w: &'a mut W, } impl<'a> OSPD3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `OSPD2` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD2_R(crate::FieldReader); impl OSPD2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD2` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD2_W<'a> { w: &'a mut W, } impl<'a> OSPD2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `OSPD1` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD1_R(crate::FieldReader); impl OSPD1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD1` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD1_W<'a> { w: &'a mut W, } impl<'a> OSPD1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `OSPD0` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD0_R(crate::FieldReader); impl OSPD0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD0` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD0_W<'a> { w: &'a mut W, } impl<'a> OSPD0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd15(&self) -> OSPD15_R { OSPD15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd14(&self) -> OSPD14_R { OSPD14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd13(&self) -> OSPD13_R { OSPD13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd12(&self) -> OSPD12_R { OSPD12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd11(&self) -> OSPD11_R { OSPD11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd10(&self) -> OSPD10_R { OSPD10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd9(&self) -> OSPD9_R { OSPD9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd8(&self) -> OSPD8_R { OSPD8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd7(&self) -> OSPD7_R { OSPD7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd6(&self) -> OSPD6_R { OSPD6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd5(&self) -> OSPD5_R { OSPD5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd4(&self) -> OSPD4_R { OSPD4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd3(&self) -> OSPD3_R { OSPD3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd2(&self) -> OSPD2_R { OSPD2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd1(&self) -> OSPD1_R { OSPD1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd0(&self) -> OSPD0_R { OSPD0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd15(&mut self) -> OSPD15_W { OSPD15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd14(&mut self) -> OSPD14_W { OSPD14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd13(&mut self) -> OSPD13_W { OSPD13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd12(&mut self) -> OSPD12_W { OSPD12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd11(&mut self) -> OSPD11_W { OSPD11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd10(&mut self) -> OSPD10_W { OSPD10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd9(&mut self) -> OSPD9_W { OSPD9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd8(&mut self) -> OSPD8_W { OSPD8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd7(&mut self) -> OSPD7_W { OSPD7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd6(&mut self) -> OSPD6_W { OSPD6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd5(&mut self) -> OSPD5_W { OSPD5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd4(&mut self) -> OSPD4_W { OSPD4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd3(&mut self) -> OSPD3_W { OSPD3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd2(&mut self) -> OSPD2_W { OSPD2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd1(&mut self) -> OSPD1_W { OSPD1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd0(&mut self) -> OSPD0_W { OSPD0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output speed register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd0](index.html) module"] pub struct OSPD0_SPEC; impl crate::RegisterSpec for OSPD0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ospd0::R](R) reader structure"] impl crate::Readable for OSPD0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ospd0::W](W) writer structure"] impl crate::Writable for OSPD0_SPEC { type Writer = W; } #[doc = "`reset()` method sets OSPD0 to value 0"] impl crate::Resettable for OSPD0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PUD register accessor: an alias for `Reg`"] pub type PUD = crate::Reg; #[doc = "GPIO port pull-up/pull-down register"] pub mod pud { #[doc = "Register `PUD` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PUD` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PUD15` reader - Port x configuration bits (y = 0..15)"] pub struct PUD15_R(crate::FieldReader); impl PUD15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD15` writer - Port x configuration bits (y = 0..15)"] pub struct PUD15_W<'a> { w: &'a mut W, } impl<'a> PUD15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `PUD14` reader - Port x configuration bits (y = 0..15)"] pub struct PUD14_R(crate::FieldReader); impl PUD14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD14` writer - Port x configuration bits (y = 0..15)"] pub struct PUD14_W<'a> { w: &'a mut W, } impl<'a> PUD14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `PUD13` reader - Port x configuration bits (y = 0..15)"] pub struct PUD13_R(crate::FieldReader); impl PUD13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD13` writer - Port x configuration bits (y = 0..15)"] pub struct PUD13_W<'a> { w: &'a mut W, } impl<'a> PUD13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `PUD12` reader - Port x configuration bits (y = 0..15)"] pub struct PUD12_R(crate::FieldReader); impl PUD12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD12` writer - Port x configuration bits (y = 0..15)"] pub struct PUD12_W<'a> { w: &'a mut W, } impl<'a> PUD12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `PUD11` reader - Port x configuration bits (y = 0..15)"] pub struct PUD11_R(crate::FieldReader); impl PUD11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD11` writer - Port x configuration bits (y = 0..15)"] pub struct PUD11_W<'a> { w: &'a mut W, } impl<'a> PUD11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `PUD10` reader - Port x configuration bits (y = 0..15)"] pub struct PUD10_R(crate::FieldReader); impl PUD10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD10` writer - Port x configuration bits (y = 0..15)"] pub struct PUD10_W<'a> { w: &'a mut W, } impl<'a> PUD10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `PUD9` reader - Port x configuration bits (y = 0..15)"] pub struct PUD9_R(crate::FieldReader); impl PUD9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD9` writer - Port x configuration bits (y = 0..15)"] pub struct PUD9_W<'a> { w: &'a mut W, } impl<'a> PUD9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `PUD8` reader - Port x configuration bits (y = 0..15)"] pub struct PUD8_R(crate::FieldReader); impl PUD8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD8` writer - Port x configuration bits (y = 0..15)"] pub struct PUD8_W<'a> { w: &'a mut W, } impl<'a> PUD8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `PUD7` reader - Port x configuration bits (y = 0..15)"] pub struct PUD7_R(crate::FieldReader); impl PUD7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD7` writer - Port x configuration bits (y = 0..15)"] pub struct PUD7_W<'a> { w: &'a mut W, } impl<'a> PUD7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `PUD6` reader - Port x configuration bits (y = 0..15)"] pub struct PUD6_R(crate::FieldReader); impl PUD6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD6` writer - Port x configuration bits (y = 0..15)"] pub struct PUD6_W<'a> { w: &'a mut W, } impl<'a> PUD6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `PUD5` reader - Port x configuration bits (y = 0..15)"] pub struct PUD5_R(crate::FieldReader); impl PUD5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD5` writer - Port x configuration bits (y = 0..15)"] pub struct PUD5_W<'a> { w: &'a mut W, } impl<'a> PUD5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PUD4` reader - Port x configuration bits (y = 0..15)"] pub struct PUD4_R(crate::FieldReader); impl PUD4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD4` writer - Port x configuration bits (y = 0..15)"] pub struct PUD4_W<'a> { w: &'a mut W, } impl<'a> PUD4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `PUD3` reader - Port x configuration bits (y = 0..15)"] pub struct PUD3_R(crate::FieldReader); impl PUD3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD3` writer - Port x configuration bits (y = 0..15)"] pub struct PUD3_W<'a> { w: &'a mut W, } impl<'a> PUD3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `PUD2` reader - Port x configuration bits (y = 0..15)"] pub struct PUD2_R(crate::FieldReader); impl PUD2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD2` writer - Port x configuration bits (y = 0..15)"] pub struct PUD2_W<'a> { w: &'a mut W, } impl<'a> PUD2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `PUD1` reader - Port x configuration bits (y = 0..15)"] pub struct PUD1_R(crate::FieldReader); impl PUD1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD1` writer - Port x configuration bits (y = 0..15)"] pub struct PUD1_W<'a> { w: &'a mut W, } impl<'a> PUD1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `PUD0` reader - Port x configuration bits (y = 0..15)"] pub struct PUD0_R(crate::FieldReader); impl PUD0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD0` writer - Port x configuration bits (y = 0..15)"] pub struct PUD0_W<'a> { w: &'a mut W, } impl<'a> PUD0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud15(&self) -> PUD15_R { PUD15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud14(&self) -> PUD14_R { PUD14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud13(&self) -> PUD13_R { PUD13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud12(&self) -> PUD12_R { PUD12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud11(&self) -> PUD11_R { PUD11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud10(&self) -> PUD10_R { PUD10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud9(&self) -> PUD9_R { PUD9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud8(&self) -> PUD8_R { PUD8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud7(&self) -> PUD7_R { PUD7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud6(&self) -> PUD6_R { PUD6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud5(&self) -> PUD5_R { PUD5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud4(&self) -> PUD4_R { PUD4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud3(&self) -> PUD3_R { PUD3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud2(&self) -> PUD2_R { PUD2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud1(&self) -> PUD1_R { PUD1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud0(&self) -> PUD0_R { PUD0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud15(&mut self) -> PUD15_W { PUD15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud14(&mut self) -> PUD14_W { PUD14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud13(&mut self) -> PUD13_W { PUD13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud12(&mut self) -> PUD12_W { PUD12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud11(&mut self) -> PUD11_W { PUD11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud10(&mut self) -> PUD10_W { PUD10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud9(&mut self) -> PUD9_W { PUD9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud8(&mut self) -> PUD8_W { PUD8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud7(&mut self) -> PUD7_W { PUD7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud6(&mut self) -> PUD6_W { PUD6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud5(&mut self) -> PUD5_W { PUD5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud4(&mut self) -> PUD4_W { PUD4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud3(&mut self) -> PUD3_W { PUD3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud2(&mut self) -> PUD2_W { PUD2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud1(&mut self) -> PUD1_W { PUD1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud0(&mut self) -> PUD0_W { PUD0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port pull-up/pull-down register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pud](index.html) module"] pub struct PUD_SPEC; impl crate::RegisterSpec for PUD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [pud::R](R) reader structure"] impl crate::Readable for PUD_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [pud::W](W) writer structure"] impl crate::Writable for PUD_SPEC { type Writer = W; } #[doc = "`reset()` method sets PUD to value 0"] impl crate::Resettable for PUD_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "ISTAT register accessor: an alias for `Reg`"] pub type ISTAT = crate::Reg; #[doc = "GPIO port input data register"] pub mod istat { #[doc = "Register `ISTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `ISTAT15` reader - Port input data (y = 0..15)"] pub struct ISTAT15_R(crate::FieldReader); impl ISTAT15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT14` reader - Port input data (y = 0..15)"] pub struct ISTAT14_R(crate::FieldReader); impl ISTAT14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT13` reader - Port input data (y = 0..15)"] pub struct ISTAT13_R(crate::FieldReader); impl ISTAT13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT12` reader - Port input data (y = 0..15)"] pub struct ISTAT12_R(crate::FieldReader); impl ISTAT12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT11` reader - Port input data (y = 0..15)"] pub struct ISTAT11_R(crate::FieldReader); impl ISTAT11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT10` reader - Port input data (y = 0..15)"] pub struct ISTAT10_R(crate::FieldReader); impl ISTAT10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT9` reader - Port input data (y = 0..15)"] pub struct ISTAT9_R(crate::FieldReader); impl ISTAT9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT8` reader - Port input data (y = 0..15)"] pub struct ISTAT8_R(crate::FieldReader); impl ISTAT8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT7` reader - Port input data (y = 0..15)"] pub struct ISTAT7_R(crate::FieldReader); impl ISTAT7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT6` reader - Port input data (y = 0..15)"] pub struct ISTAT6_R(crate::FieldReader); impl ISTAT6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT5` reader - Port input data (y = 0..15)"] pub struct ISTAT5_R(crate::FieldReader); impl ISTAT5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT4` reader - Port input data (y = 0..15)"] pub struct ISTAT4_R(crate::FieldReader); impl ISTAT4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT3` reader - Port input data (y = 0..15)"] pub struct ISTAT3_R(crate::FieldReader); impl ISTAT3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT2` reader - Port input data (y = 0..15)"] pub struct ISTAT2_R(crate::FieldReader); impl ISTAT2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT1` reader - Port input data (y = 0..15)"] pub struct ISTAT1_R(crate::FieldReader); impl ISTAT1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT0` reader - Port input data (y = 0..15)"] pub struct ISTAT0_R(crate::FieldReader); impl ISTAT0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 15 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat15(&self) -> ISTAT15_R { ISTAT15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat14(&self) -> ISTAT14_R { ISTAT14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat13(&self) -> ISTAT13_R { ISTAT13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat12(&self) -> ISTAT12_R { ISTAT12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat11(&self) -> ISTAT11_R { ISTAT11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat10(&self) -> ISTAT10_R { ISTAT10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat9(&self) -> ISTAT9_R { ISTAT9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat8(&self) -> ISTAT8_R { ISTAT8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat7(&self) -> ISTAT7_R { ISTAT7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat6(&self) -> ISTAT6_R { ISTAT6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat5(&self) -> ISTAT5_R { ISTAT5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat4(&self) -> ISTAT4_R { ISTAT4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat3(&self) -> ISTAT3_R { ISTAT3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat2(&self) -> ISTAT2_R { ISTAT2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat1(&self) -> ISTAT1_R { ISTAT1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat0(&self) -> ISTAT0_R { ISTAT0_R::new((self.bits & 0x01) != 0) } } #[doc = "GPIO port input data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [istat](index.html) module"] pub struct ISTAT_SPEC; impl crate::RegisterSpec for ISTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [istat::R](R) reader structure"] impl crate::Readable for ISTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets ISTAT to value 0"] impl crate::Resettable for ISTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OCTL register accessor: an alias for `Reg`"] pub type OCTL = crate::Reg; #[doc = "GPIO port output data register"] pub mod octl { #[doc = "Register `OCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OCTL15` reader - Port output data (y = 0..15)"] pub struct OCTL15_R(crate::FieldReader); impl OCTL15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL15` writer - Port output data (y = 0..15)"] pub struct OCTL15_W<'a> { w: &'a mut W, } impl<'a> OCTL15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OCTL14` reader - Port output data (y = 0..15)"] pub struct OCTL14_R(crate::FieldReader); impl OCTL14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL14` writer - Port output data (y = 0..15)"] pub struct OCTL14_W<'a> { w: &'a mut W, } impl<'a> OCTL14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `OCTL13` reader - Port output data (y = 0..15)"] pub struct OCTL13_R(crate::FieldReader); impl OCTL13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL13` writer - Port output data (y = 0..15)"] pub struct OCTL13_W<'a> { w: &'a mut W, } impl<'a> OCTL13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OCTL12` reader - Port output data (y = 0..15)"] pub struct OCTL12_R(crate::FieldReader); impl OCTL12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL12` writer - Port output data (y = 0..15)"] pub struct OCTL12_W<'a> { w: &'a mut W, } impl<'a> OCTL12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OCTL11` reader - Port output data (y = 0..15)"] pub struct OCTL11_R(crate::FieldReader); impl OCTL11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL11` writer - Port output data (y = 0..15)"] pub struct OCTL11_W<'a> { w: &'a mut W, } impl<'a> OCTL11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `OCTL10` reader - Port output data (y = 0..15)"] pub struct OCTL10_R(crate::FieldReader); impl OCTL10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL10` writer - Port output data (y = 0..15)"] pub struct OCTL10_W<'a> { w: &'a mut W, } impl<'a> OCTL10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OCTL9` reader - Port output data (y = 0..15)"] pub struct OCTL9_R(crate::FieldReader); impl OCTL9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL9` writer - Port output data (y = 0..15)"] pub struct OCTL9_W<'a> { w: &'a mut W, } impl<'a> OCTL9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OCTL8` reader - Port output data (y = 0..15)"] pub struct OCTL8_R(crate::FieldReader); impl OCTL8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL8` writer - Port output data (y = 0..15)"] pub struct OCTL8_W<'a> { w: &'a mut W, } impl<'a> OCTL8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OCTL7` reader - Port output data (y = 0..15)"] pub struct OCTL7_R(crate::FieldReader); impl OCTL7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL7` writer - Port output data (y = 0..15)"] pub struct OCTL7_W<'a> { w: &'a mut W, } impl<'a> OCTL7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `OCTL6` reader - Port output data (y = 0..15)"] pub struct OCTL6_R(crate::FieldReader); impl OCTL6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL6` writer - Port output data (y = 0..15)"] pub struct OCTL6_W<'a> { w: &'a mut W, } impl<'a> OCTL6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OCTL5` reader - Port output data (y = 0..15)"] pub struct OCTL5_R(crate::FieldReader); impl OCTL5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL5` writer - Port output data (y = 0..15)"] pub struct OCTL5_W<'a> { w: &'a mut W, } impl<'a> OCTL5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OCTL4` reader - Port output data (y = 0..15)"] pub struct OCTL4_R(crate::FieldReader); impl OCTL4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL4` writer - Port output data (y = 0..15)"] pub struct OCTL4_W<'a> { w: &'a mut W, } impl<'a> OCTL4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OCTL3` reader - Port output data (y = 0..15)"] pub struct OCTL3_R(crate::FieldReader); impl OCTL3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL3` writer - Port output data (y = 0..15)"] pub struct OCTL3_W<'a> { w: &'a mut W, } impl<'a> OCTL3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `OCTL2` reader - Port output data (y = 0..15)"] pub struct OCTL2_R(crate::FieldReader); impl OCTL2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL2` writer - Port output data (y = 0..15)"] pub struct OCTL2_W<'a> { w: &'a mut W, } impl<'a> OCTL2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `OCTL1` reader - Port output data (y = 0..15)"] pub struct OCTL1_R(crate::FieldReader); impl OCTL1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL1` writer - Port output data (y = 0..15)"] pub struct OCTL1_W<'a> { w: &'a mut W, } impl<'a> OCTL1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OCTL0` reader - Port output data (y = 0..15)"] pub struct OCTL0_R(crate::FieldReader); impl OCTL0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL0` writer - Port output data (y = 0..15)"] pub struct OCTL0_W<'a> { w: &'a mut W, } impl<'a> OCTL0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl15(&self) -> OCTL15_R { OCTL15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl14(&self) -> OCTL14_R { OCTL14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl13(&self) -> OCTL13_R { OCTL13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl12(&self) -> OCTL12_R { OCTL12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl11(&self) -> OCTL11_R { OCTL11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl10(&self) -> OCTL10_R { OCTL10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl9(&self) -> OCTL9_R { OCTL9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl8(&self) -> OCTL8_R { OCTL8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl7(&self) -> OCTL7_R { OCTL7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl6(&self) -> OCTL6_R { OCTL6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl5(&self) -> OCTL5_R { OCTL5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl4(&self) -> OCTL4_R { OCTL4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl3(&self) -> OCTL3_R { OCTL3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl2(&self) -> OCTL2_R { OCTL2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl1(&self) -> OCTL1_R { OCTL1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl0(&self) -> OCTL0_R { OCTL0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl15(&mut self) -> OCTL15_W { OCTL15_W { w: self } } #[doc = "Bit 14 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl14(&mut self) -> OCTL14_W { OCTL14_W { w: self } } #[doc = "Bit 13 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl13(&mut self) -> OCTL13_W { OCTL13_W { w: self } } #[doc = "Bit 12 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl12(&mut self) -> OCTL12_W { OCTL12_W { w: self } } #[doc = "Bit 11 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl11(&mut self) -> OCTL11_W { OCTL11_W { w: self } } #[doc = "Bit 10 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl10(&mut self) -> OCTL10_W { OCTL10_W { w: self } } #[doc = "Bit 9 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl9(&mut self) -> OCTL9_W { OCTL9_W { w: self } } #[doc = "Bit 8 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl8(&mut self) -> OCTL8_W { OCTL8_W { w: self } } #[doc = "Bit 7 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl7(&mut self) -> OCTL7_W { OCTL7_W { w: self } } #[doc = "Bit 6 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl6(&mut self) -> OCTL6_W { OCTL6_W { w: self } } #[doc = "Bit 5 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl5(&mut self) -> OCTL5_W { OCTL5_W { w: self } } #[doc = "Bit 4 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl4(&mut self) -> OCTL4_W { OCTL4_W { w: self } } #[doc = "Bit 3 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl3(&mut self) -> OCTL3_W { OCTL3_W { w: self } } #[doc = "Bit 2 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl2(&mut self) -> OCTL2_W { OCTL2_W { w: self } } #[doc = "Bit 1 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl1(&mut self) -> OCTL1_W { OCTL1_W { w: self } } #[doc = "Bit 0 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl0(&mut self) -> OCTL0_W { OCTL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [octl](index.html) module"] pub struct OCTL_SPEC; impl crate::RegisterSpec for OCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [octl::R](R) reader structure"] impl crate::Readable for OCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [octl::W](W) writer structure"] impl crate::Writable for OCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets OCTL to value 0"] impl crate::Resettable for OCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BOP register accessor: an alias for `Reg`"] pub type BOP = crate::Reg; #[doc = "GPIO port bit set/reset register"] pub mod bop { #[doc = "Register `BOP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CR15` writer - Port x reset bit y (y = 0..15)"] pub struct CR15_W<'a> { w: &'a mut W, } impl<'a> CR15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `CR14` writer - Port x reset bit y (y = 0..15)"] pub struct CR14_W<'a> { w: &'a mut W, } impl<'a> CR14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CR13` writer - Port x reset bit y (y = 0..15)"] pub struct CR13_W<'a> { w: &'a mut W, } impl<'a> CR13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CR12` writer - Port x reset bit y (y = 0..15)"] pub struct CR12_W<'a> { w: &'a mut W, } impl<'a> CR12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `CR11` writer - Port x reset bit y (y = 0..15)"] pub struct CR11_W<'a> { w: &'a mut W, } impl<'a> CR11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CR10` writer - Port x reset bit y (y = 0..15)"] pub struct CR10_W<'a> { w: &'a mut W, } impl<'a> CR10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `CR9` writer - Port x reset bit y (y = 0..15)"] pub struct CR9_W<'a> { w: &'a mut W, } impl<'a> CR9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); self.w } } #[doc = "Field `CR8` writer - Port x reset bit y (y = 0..15)"] pub struct CR8_W<'a> { w: &'a mut W, } impl<'a> CR8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `CR7` writer - Port x reset bit y (y = 0..15)"] pub struct CR7_W<'a> { w: &'a mut W, } impl<'a> CR7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `CR6` writer - Port x reset bit y (y = 0..15)"] pub struct CR6_W<'a> { w: &'a mut W, } impl<'a> CR6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `CR5` writer - Port x reset bit y (y = 0..15)"] pub struct CR5_W<'a> { w: &'a mut W, } impl<'a> CR5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `CR4` writer - Port x reset bit y (y = 0..15)"] pub struct CR4_W<'a> { w: &'a mut W, } impl<'a> CR4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `CR3` writer - Port x reset bit y (y = 0..15)"] pub struct CR3_W<'a> { w: &'a mut W, } impl<'a> CR3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `CR2` writer - Port x reset bit y (y = 0..15)"] pub struct CR2_W<'a> { w: &'a mut W, } impl<'a> CR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `CR1` writer - Port x reset bit y (y = 0..15)"] pub struct CR1_W<'a> { w: &'a mut W, } impl<'a> CR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `CR0` writer - Port x reset bit y (y= 0..15)"] pub struct CR0_W<'a> { w: &'a mut W, } impl<'a> CR0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `BOP15` writer - Port x set bit y (y= 0..15)"] pub struct BOP15_W<'a> { w: &'a mut W, } impl<'a> BOP15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `BOP14` writer - Port x set bit y (y= 0..15)"] pub struct BOP14_W<'a> { w: &'a mut W, } impl<'a> BOP14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `BOP13` writer - Port x set bit y (y= 0..15)"] pub struct BOP13_W<'a> { w: &'a mut W, } impl<'a> BOP13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `BOP12` writer - Port x set bit y (y= 0..15)"] pub struct BOP12_W<'a> { w: &'a mut W, } impl<'a> BOP12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `BOP11` writer - Port x set bit y (y= 0..15)"] pub struct BOP11_W<'a> { w: &'a mut W, } impl<'a> BOP11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `BOP10` writer - Port x set bit y (y= 0..15)"] pub struct BOP10_W<'a> { w: &'a mut W, } impl<'a> BOP10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `BOP9` writer - Port x set bit y (y= 0..15)"] pub struct BOP9_W<'a> { w: &'a mut W, } impl<'a> BOP9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `BOP8` writer - Port x set bit y (y= 0..15)"] pub struct BOP8_W<'a> { w: &'a mut W, } impl<'a> BOP8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `BOP7` writer - Port x set bit y (y= 0..15)"] pub struct BOP7_W<'a> { w: &'a mut W, } impl<'a> BOP7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BOP6` writer - Port x set bit y (y= 0..15)"] pub struct BOP6_W<'a> { w: &'a mut W, } impl<'a> BOP6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `BOP5` writer - Port x set bit y (y= 0..15)"] pub struct BOP5_W<'a> { w: &'a mut W, } impl<'a> BOP5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `BOP4` writer - Port x set bit y (y= 0..15)"] pub struct BOP4_W<'a> { w: &'a mut W, } impl<'a> BOP4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `BOP3` writer - Port x set bit y (y= 0..15)"] pub struct BOP3_W<'a> { w: &'a mut W, } impl<'a> BOP3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `BOP2` writer - Port x set bit y (y= 0..15)"] pub struct BOP2_W<'a> { w: &'a mut W, } impl<'a> BOP2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `BOP1` writer - Port x set bit y (y= 0..15)"] pub struct BOP1_W<'a> { w: &'a mut W, } impl<'a> BOP1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `BOP0` writer - Port x set bit y (y= 0..15)"] pub struct BOP0_W<'a> { w: &'a mut W, } impl<'a> BOP0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 31 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr15(&mut self) -> CR15_W { CR15_W { w: self } } #[doc = "Bit 30 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr14(&mut self) -> CR14_W { CR14_W { w: self } } #[doc = "Bit 29 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr13(&mut self) -> CR13_W { CR13_W { w: self } } #[doc = "Bit 28 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr12(&mut self) -> CR12_W { CR12_W { w: self } } #[doc = "Bit 27 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr11(&mut self) -> CR11_W { CR11_W { w: self } } #[doc = "Bit 26 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr10(&mut self) -> CR10_W { CR10_W { w: self } } #[doc = "Bit 25 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr9(&mut self) -> CR9_W { CR9_W { w: self } } #[doc = "Bit 24 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr8(&mut self) -> CR8_W { CR8_W { w: self } } #[doc = "Bit 23 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr7(&mut self) -> CR7_W { CR7_W { w: self } } #[doc = "Bit 22 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr6(&mut self) -> CR6_W { CR6_W { w: self } } #[doc = "Bit 21 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr5(&mut self) -> CR5_W { CR5_W { w: self } } #[doc = "Bit 20 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr4(&mut self) -> CR4_W { CR4_W { w: self } } #[doc = "Bit 19 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr3(&mut self) -> CR3_W { CR3_W { w: self } } #[doc = "Bit 18 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr2(&mut self) -> CR2_W { CR2_W { w: self } } #[doc = "Bit 17 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr1(&mut self) -> CR1_W { CR1_W { w: self } } #[doc = "Bit 16 - Port x reset bit y (y= 0..15)"] #[inline(always)] pub fn cr0(&mut self) -> CR0_W { CR0_W { w: self } } #[doc = "Bit 15 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop15(&mut self) -> BOP15_W { BOP15_W { w: self } } #[doc = "Bit 14 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop14(&mut self) -> BOP14_W { BOP14_W { w: self } } #[doc = "Bit 13 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop13(&mut self) -> BOP13_W { BOP13_W { w: self } } #[doc = "Bit 12 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop12(&mut self) -> BOP12_W { BOP12_W { w: self } } #[doc = "Bit 11 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop11(&mut self) -> BOP11_W { BOP11_W { w: self } } #[doc = "Bit 10 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop10(&mut self) -> BOP10_W { BOP10_W { w: self } } #[doc = "Bit 9 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop9(&mut self) -> BOP9_W { BOP9_W { w: self } } #[doc = "Bit 8 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop8(&mut self) -> BOP8_W { BOP8_W { w: self } } #[doc = "Bit 7 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop7(&mut self) -> BOP7_W { BOP7_W { w: self } } #[doc = "Bit 6 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop6(&mut self) -> BOP6_W { BOP6_W { w: self } } #[doc = "Bit 5 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop5(&mut self) -> BOP5_W { BOP5_W { w: self } } #[doc = "Bit 4 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop4(&mut self) -> BOP4_W { BOP4_W { w: self } } #[doc = "Bit 3 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop3(&mut self) -> BOP3_W { BOP3_W { w: self } } #[doc = "Bit 2 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop2(&mut self) -> BOP2_W { BOP2_W { w: self } } #[doc = "Bit 1 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop1(&mut self) -> BOP1_W { BOP1_W { w: self } } #[doc = "Bit 0 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop0(&mut self) -> BOP0_W { BOP0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port bit set/reset register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bop](index.html) module"] pub struct BOP_SPEC; impl crate::RegisterSpec for BOP_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [bop::W](W) writer structure"] impl crate::Writable for BOP_SPEC { type Writer = W; } #[doc = "`reset()` method sets BOP to value 0"] impl crate::Resettable for BOP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "AFSEL0 register accessor: an alias for `Reg`"] pub type AFSEL0 = crate::Reg; #[doc = "GPIO alternate function low register"] pub mod afsel0 { #[doc = "Register `AFSEL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `AFSEL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SEL7` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL7_R(crate::FieldReader); impl SEL7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL7` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL7_W<'a> { w: &'a mut W, } impl<'a> SEL7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 28)) | ((value as u32 & 0x0f) << 28); self.w } } #[doc = "Field `SEL6` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL6_R(crate::FieldReader); impl SEL6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL6` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL6_W<'a> { w: &'a mut W, } impl<'a> SEL6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); self.w } } #[doc = "Field `SEL5` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL5_R(crate::FieldReader); impl SEL5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL5` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL5_W<'a> { w: &'a mut W, } impl<'a> SEL5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 20)) | ((value as u32 & 0x0f) << 20); self.w } } #[doc = "Field `SEL4` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL4_R(crate::FieldReader); impl SEL4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL4` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL4_W<'a> { w: &'a mut W, } impl<'a> SEL4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16); self.w } } #[doc = "Field `SEL3` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL3_R(crate::FieldReader); impl SEL3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL3` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL3_W<'a> { w: &'a mut W, } impl<'a> SEL3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `SEL2` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL2_R(crate::FieldReader); impl SEL2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL2` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL2_W<'a> { w: &'a mut W, } impl<'a> SEL2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `SEL1` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL1_R(crate::FieldReader); impl SEL1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL1` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL1_W<'a> { w: &'a mut W, } impl<'a> SEL1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `SEL0` reader - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL0_R(crate::FieldReader); impl SEL0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL0` writer - Alternate function selection for port x bit y (y = 0..7)"] pub struct SEL0_W<'a> { w: &'a mut W, } impl<'a> SEL0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel7(&self) -> SEL7_R { SEL7_R::new(((self.bits >> 28) & 0x0f) as u8) } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel6(&self) -> SEL6_R { SEL6_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel5(&self) -> SEL5_R { SEL5_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel4(&self) -> SEL4_R { SEL4_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel3(&self) -> SEL3_R { SEL3_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel2(&self) -> SEL2_R { SEL2_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel1(&self) -> SEL1_R { SEL1_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel0(&self) -> SEL0_R { SEL0_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel7(&mut self) -> SEL7_W { SEL7_W { w: self } } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel6(&mut self) -> SEL6_W { SEL6_W { w: self } } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel5(&mut self) -> SEL5_W { SEL5_W { w: self } } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel4(&mut self) -> SEL4_W { SEL4_W { w: self } } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel3(&mut self) -> SEL3_W { SEL3_W { w: self } } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel2(&mut self) -> SEL2_W { SEL2_W { w: self } } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel1(&mut self) -> SEL1_W { SEL1_W { w: self } } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 0..7)"] #[inline(always)] pub fn sel0(&mut self) -> SEL0_W { SEL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO alternate function low register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afsel0](index.html) module"] pub struct AFSEL0_SPEC; impl crate::RegisterSpec for AFSEL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [afsel0::R](R) reader structure"] impl crate::Readable for AFSEL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [afsel0::W](W) writer structure"] impl crate::Writable for AFSEL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets AFSEL0 to value 0"] impl crate::Resettable for AFSEL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "AFSEL1 register accessor: an alias for `Reg`"] pub type AFSEL1 = crate::Reg; #[doc = "GPIO alternate function register 1"] pub mod afsel1 { #[doc = "Register `AFSEL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `AFSEL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SEL15` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL15_R(crate::FieldReader); impl SEL15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL15` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL15_W<'a> { w: &'a mut W, } impl<'a> SEL15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 28)) | ((value as u32 & 0x0f) << 28); self.w } } #[doc = "Field `SEL14` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL14_R(crate::FieldReader); impl SEL14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL14` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL14_W<'a> { w: &'a mut W, } impl<'a> SEL14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); self.w } } #[doc = "Field `SEL13` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL13_R(crate::FieldReader); impl SEL13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL13` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL13_W<'a> { w: &'a mut W, } impl<'a> SEL13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 20)) | ((value as u32 & 0x0f) << 20); self.w } } #[doc = "Field `SEL12` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL12_R(crate::FieldReader); impl SEL12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL12` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL12_W<'a> { w: &'a mut W, } impl<'a> SEL12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16); self.w } } #[doc = "Field `SEL11` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL11_R(crate::FieldReader); impl SEL11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL11` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL11_W<'a> { w: &'a mut W, } impl<'a> SEL11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `SEL10` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL10_R(crate::FieldReader); impl SEL10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL10` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL10_W<'a> { w: &'a mut W, } impl<'a> SEL10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `SEL9` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL9_R(crate::FieldReader); impl SEL9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL9` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL9_W<'a> { w: &'a mut W, } impl<'a> SEL9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `SEL8` reader - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL8_R(crate::FieldReader); impl SEL8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SEL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SEL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SEL8` writer - Alternate function selection for port x bit y (y = 8..15)"] pub struct SEL8_W<'a> { w: &'a mut W, } impl<'a> SEL8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel15(&self) -> SEL15_R { SEL15_R::new(((self.bits >> 28) & 0x0f) as u8) } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel14(&self) -> SEL14_R { SEL14_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel13(&self) -> SEL13_R { SEL13_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel12(&self) -> SEL12_R { SEL12_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel11(&self) -> SEL11_R { SEL11_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel10(&self) -> SEL10_R { SEL10_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel9(&self) -> SEL9_R { SEL9_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel8(&self) -> SEL8_R { SEL8_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 28:31 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel15(&mut self) -> SEL15_W { SEL15_W { w: self } } #[doc = "Bits 24:27 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel14(&mut self) -> SEL14_W { SEL14_W { w: self } } #[doc = "Bits 20:23 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel13(&mut self) -> SEL13_W { SEL13_W { w: self } } #[doc = "Bits 16:19 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel12(&mut self) -> SEL12_W { SEL12_W { w: self } } #[doc = "Bits 12:15 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel11(&mut self) -> SEL11_W { SEL11_W { w: self } } #[doc = "Bits 8:11 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel10(&mut self) -> SEL10_W { SEL10_W { w: self } } #[doc = "Bits 4:7 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel9(&mut self) -> SEL9_W { SEL9_W { w: self } } #[doc = "Bits 0:3 - Alternate function selection for port x bit y (y = 8..15)"] #[inline(always)] pub fn sel8(&mut self) -> SEL8_W { SEL8_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO alternate function register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [afsel1](index.html) module"] pub struct AFSEL1_SPEC; impl crate::RegisterSpec for AFSEL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [afsel1::R](R) reader structure"] impl crate::Readable for AFSEL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [afsel1::W](W) writer structure"] impl crate::Writable for AFSEL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets AFSEL1 to value 0"] impl crate::Resettable for AFSEL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BC register accessor: an alias for `Reg`"] pub type BC = crate::Reg; #[doc = "Port bit reset register"] pub mod bc { #[doc = "Register `BC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CR0` writer - Port cleat bit"] pub struct CR0_W<'a> { w: &'a mut W, } impl<'a> CR0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CR1` writer - Port cleat bit"] pub struct CR1_W<'a> { w: &'a mut W, } impl<'a> CR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CR2` writer - Port cleat bit"] pub struct CR2_W<'a> { w: &'a mut W, } impl<'a> CR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CR3` writer - Port cleat bit"] pub struct CR3_W<'a> { w: &'a mut W, } impl<'a> CR3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CR4` writer - Port cleat bit"] pub struct CR4_W<'a> { w: &'a mut W, } impl<'a> CR4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CR5` writer - Port cleat bit"] pub struct CR5_W<'a> { w: &'a mut W, } impl<'a> CR5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CR6` writer - Port cleat bit"] pub struct CR6_W<'a> { w: &'a mut W, } impl<'a> CR6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CR7` writer - Port cleat bit"] pub struct CR7_W<'a> { w: &'a mut W, } impl<'a> CR7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CR8` writer - Port cleat bit"] pub struct CR8_W<'a> { w: &'a mut W, } impl<'a> CR8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CR9` writer - Port cleat bit"] pub struct CR9_W<'a> { w: &'a mut W, } impl<'a> CR9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CR10` writer - Port cleat bit"] pub struct CR10_W<'a> { w: &'a mut W, } impl<'a> CR10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CR11` writer - Port cleat bit"] pub struct CR11_W<'a> { w: &'a mut W, } impl<'a> CR11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CR12` writer - Port cleat bit"] pub struct CR12_W<'a> { w: &'a mut W, } impl<'a> CR12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CR13` writer - Port cleat bit"] pub struct CR13_W<'a> { w: &'a mut W, } impl<'a> CR13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CR14` writer - Port cleat bit"] pub struct CR14_W<'a> { w: &'a mut W, } impl<'a> CR14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CR15` writer - Port cleat bit"] pub struct CR15_W<'a> { w: &'a mut W, } impl<'a> CR15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - Port cleat bit"] #[inline(always)] pub fn cr0(&mut self) -> CR0_W { CR0_W { w: self } } #[doc = "Bit 1 - Port cleat bit"] #[inline(always)] pub fn cr1(&mut self) -> CR1_W { CR1_W { w: self } } #[doc = "Bit 2 - Port cleat bit"] #[inline(always)] pub fn cr2(&mut self) -> CR2_W { CR2_W { w: self } } #[doc = "Bit 3 - Port cleat bit"] #[inline(always)] pub fn cr3(&mut self) -> CR3_W { CR3_W { w: self } } #[doc = "Bit 4 - Port cleat bit"] #[inline(always)] pub fn cr4(&mut self) -> CR4_W { CR4_W { w: self } } #[doc = "Bit 5 - Port cleat bit"] #[inline(always)] pub fn cr5(&mut self) -> CR5_W { CR5_W { w: self } } #[doc = "Bit 6 - Port cleat bit"] #[inline(always)] pub fn cr6(&mut self) -> CR6_W { CR6_W { w: self } } #[doc = "Bit 7 - Port cleat bit"] #[inline(always)] pub fn cr7(&mut self) -> CR7_W { CR7_W { w: self } } #[doc = "Bit 8 - Port cleat bit"] #[inline(always)] pub fn cr8(&mut self) -> CR8_W { CR8_W { w: self } } #[doc = "Bit 9 - Port cleat bit"] #[inline(always)] pub fn cr9(&mut self) -> CR9_W { CR9_W { w: self } } #[doc = "Bit 10 - Port cleat bit"] #[inline(always)] pub fn cr10(&mut self) -> CR10_W { CR10_W { w: self } } #[doc = "Bit 11 - Port cleat bit"] #[inline(always)] pub fn cr11(&mut self) -> CR11_W { CR11_W { w: self } } #[doc = "Bit 12 - Port cleat bit"] #[inline(always)] pub fn cr12(&mut self) -> CR12_W { CR12_W { w: self } } #[doc = "Bit 13 - Port cleat bit"] #[inline(always)] pub fn cr13(&mut self) -> CR13_W { CR13_W { w: self } } #[doc = "Bit 14 - Port cleat bit"] #[inline(always)] pub fn cr14(&mut self) -> CR14_W { CR14_W { w: self } } #[doc = "Bit 15 - Port cleat bit"] #[inline(always)] pub fn cr15(&mut self) -> CR15_W { CR15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port bit reset register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bc](index.html) module"] pub struct BC_SPEC; impl crate::RegisterSpec for BC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [bc::W](W) writer structure"] impl crate::Writable for BC_SPEC { type Writer = W; } #[doc = "`reset()` method sets BC to value 0"] impl crate::Resettable for BC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "TG register accessor: an alias for `Reg`"] pub type TG = crate::Reg; #[doc = "Port bit toggle register"] pub mod tg { #[doc = "Register `TG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TG0` writer - Port toggle bit"] pub struct TG0_W<'a> { w: &'a mut W, } impl<'a> TG0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `TG1` writer - Port toggle bit"] pub struct TG1_W<'a> { w: &'a mut W, } impl<'a> TG1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TG2` writer - Port toggle bit"] pub struct TG2_W<'a> { w: &'a mut W, } impl<'a> TG2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `TG3` writer - Port toggle bit"] pub struct TG3_W<'a> { w: &'a mut W, } impl<'a> TG3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `TG4` writer - Port toggle bit"] pub struct TG4_W<'a> { w: &'a mut W, } impl<'a> TG4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TG5` writer - Port toggle bit"] pub struct TG5_W<'a> { w: &'a mut W, } impl<'a> TG5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `TG6` writer - Port toggle bit"] pub struct TG6_W<'a> { w: &'a mut W, } impl<'a> TG6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `TG7` writer - Port toggle bit"] pub struct TG7_W<'a> { w: &'a mut W, } impl<'a> TG7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TG8` writer - Port toggle bit"] pub struct TG8_W<'a> { w: &'a mut W, } impl<'a> TG8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TG9` writer - Port toggle bit"] pub struct TG9_W<'a> { w: &'a mut W, } impl<'a> TG9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `TG10` writer - Port toggle bit"] pub struct TG10_W<'a> { w: &'a mut W, } impl<'a> TG10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `TG11` writer - Port toggle bit"] pub struct TG11_W<'a> { w: &'a mut W, } impl<'a> TG11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TG12` writer - Port toggle bit"] pub struct TG12_W<'a> { w: &'a mut W, } impl<'a> TG12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TG13` writer - Port toggle bit"] pub struct TG13_W<'a> { w: &'a mut W, } impl<'a> TG13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `TG14` writer - Port toggle bit"] pub struct TG14_W<'a> { w: &'a mut W, } impl<'a> TG14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `TG15` writer - Port toggle bit"] pub struct TG15_W<'a> { w: &'a mut W, } impl<'a> TG15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - Port toggle bit"] #[inline(always)] pub fn tg0(&mut self) -> TG0_W { TG0_W { w: self } } #[doc = "Bit 1 - Port toggle bit"] #[inline(always)] pub fn tg1(&mut self) -> TG1_W { TG1_W { w: self } } #[doc = "Bit 2 - Port toggle bit"] #[inline(always)] pub fn tg2(&mut self) -> TG2_W { TG2_W { w: self } } #[doc = "Bit 3 - Port toggle bit"] #[inline(always)] pub fn tg3(&mut self) -> TG3_W { TG3_W { w: self } } #[doc = "Bit 4 - Port toggle bit"] #[inline(always)] pub fn tg4(&mut self) -> TG4_W { TG4_W { w: self } } #[doc = "Bit 5 - Port toggle bit"] #[inline(always)] pub fn tg5(&mut self) -> TG5_W { TG5_W { w: self } } #[doc = "Bit 6 - Port toggle bit"] #[inline(always)] pub fn tg6(&mut self) -> TG6_W { TG6_W { w: self } } #[doc = "Bit 7 - Port toggle bit"] #[inline(always)] pub fn tg7(&mut self) -> TG7_W { TG7_W { w: self } } #[doc = "Bit 8 - Port toggle bit"] #[inline(always)] pub fn tg8(&mut self) -> TG8_W { TG8_W { w: self } } #[doc = "Bit 9 - Port toggle bit"] #[inline(always)] pub fn tg9(&mut self) -> TG9_W { TG9_W { w: self } } #[doc = "Bit 10 - Port toggle bit"] #[inline(always)] pub fn tg10(&mut self) -> TG10_W { TG10_W { w: self } } #[doc = "Bit 11 - Port toggle bit"] #[inline(always)] pub fn tg11(&mut self) -> TG11_W { TG11_W { w: self } } #[doc = "Bit 12 - Port toggle bit"] #[inline(always)] pub fn tg12(&mut self) -> TG12_W { TG12_W { w: self } } #[doc = "Bit 13 - Port toggle bit"] #[inline(always)] pub fn tg13(&mut self) -> TG13_W { TG13_W { w: self } } #[doc = "Bit 14 - Port toggle bit"] #[inline(always)] pub fn tg14(&mut self) -> TG14_W { TG14_W { w: self } } #[doc = "Bit 15 - Port toggle bit"] #[inline(always)] pub fn tg15(&mut self) -> TG15_W { TG15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port bit toggle register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tg](index.html) module"] pub struct TG_SPEC; impl crate::RegisterSpec for TG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [tg::W](W) writer structure"] impl crate::Writable for TG_SPEC { type Writer = W; } #[doc = "`reset()` method sets TG to value 0"] impl crate::Resettable for TG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OSPD1 register accessor: an alias for `Reg`"] pub type OSPD1 = crate::Reg; #[doc = "Port output speed register 1"] pub mod ospd1 { #[doc = "Register `OSPD1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OSPD1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SPD0` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD0_R(crate::FieldReader); impl SPD0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD0` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD0_W<'a> { w: &'a mut W, } impl<'a> SPD0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `SPD1` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD1_R(crate::FieldReader); impl SPD1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD1` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD1_W<'a> { w: &'a mut W, } impl<'a> SPD1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `SPD2` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD2_R(crate::FieldReader); impl SPD2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD2` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD2_W<'a> { w: &'a mut W, } impl<'a> SPD2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `SPD3` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD3_R(crate::FieldReader); impl SPD3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD3` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD3_W<'a> { w: &'a mut W, } impl<'a> SPD3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `SPD4` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD4_R(crate::FieldReader); impl SPD4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD4` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD4_W<'a> { w: &'a mut W, } impl<'a> SPD4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `SPD5` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD5_R(crate::FieldReader); impl SPD5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD5` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD5_W<'a> { w: &'a mut W, } impl<'a> SPD5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `SPD6` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD6_R(crate::FieldReader); impl SPD6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD6` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD6_W<'a> { w: &'a mut W, } impl<'a> SPD6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `SPD7` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD7_R(crate::FieldReader); impl SPD7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD7` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD7_W<'a> { w: &'a mut W, } impl<'a> SPD7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SPD8` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD8_R(crate::FieldReader); impl SPD8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD8` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD8_W<'a> { w: &'a mut W, } impl<'a> SPD8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `SPD9` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD9_R(crate::FieldReader); impl SPD9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD9` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD9_W<'a> { w: &'a mut W, } impl<'a> SPD9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `SPD10` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD10_R(crate::FieldReader); impl SPD10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD10` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD10_W<'a> { w: &'a mut W, } impl<'a> SPD10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `SPD11` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD11_R(crate::FieldReader); impl SPD11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD11` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD11_W<'a> { w: &'a mut W, } impl<'a> SPD11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `SPD12` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD12_R(crate::FieldReader); impl SPD12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD12` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD12_W<'a> { w: &'a mut W, } impl<'a> SPD12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `SPD13` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD13_R(crate::FieldReader); impl SPD13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD13` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD13_W<'a> { w: &'a mut W, } impl<'a> SPD13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `SPD14` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD14_R(crate::FieldReader); impl SPD14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD14` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD14_W<'a> { w: &'a mut W, } impl<'a> SPD14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `SPD15` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD15_R(crate::FieldReader); impl SPD15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD15` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD15_W<'a> { w: &'a mut W, } impl<'a> SPD15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl R { #[doc = "Bit 0 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd0(&self) -> SPD0_R { SPD0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd1(&self) -> SPD1_R { SPD1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd2(&self) -> SPD2_R { SPD2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd3(&self) -> SPD3_R { SPD3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd4(&self) -> SPD4_R { SPD4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd5(&self) -> SPD5_R { SPD5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd6(&self) -> SPD6_R { SPD6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd7(&self) -> SPD7_R { SPD7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd8(&self) -> SPD8_R { SPD8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd9(&self) -> SPD9_R { SPD9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd10(&self) -> SPD10_R { SPD10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd11(&self) -> SPD11_R { SPD11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd12(&self) -> SPD12_R { SPD12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd13(&self) -> SPD13_R { SPD13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd14(&self) -> SPD14_R { SPD14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd15(&self) -> SPD15_R { SPD15_R::new(((self.bits >> 15) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd0(&mut self) -> SPD0_W { SPD0_W { w: self } } #[doc = "Bit 1 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd1(&mut self) -> SPD1_W { SPD1_W { w: self } } #[doc = "Bit 2 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd2(&mut self) -> SPD2_W { SPD2_W { w: self } } #[doc = "Bit 3 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd3(&mut self) -> SPD3_W { SPD3_W { w: self } } #[doc = "Bit 4 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd4(&mut self) -> SPD4_W { SPD4_W { w: self } } #[doc = "Bit 5 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd5(&mut self) -> SPD5_W { SPD5_W { w: self } } #[doc = "Bit 6 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd6(&mut self) -> SPD6_W { SPD6_W { w: self } } #[doc = "Bit 7 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd7(&mut self) -> SPD7_W { SPD7_W { w: self } } #[doc = "Bit 8 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd8(&mut self) -> SPD8_W { SPD8_W { w: self } } #[doc = "Bit 9 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd9(&mut self) -> SPD9_W { SPD9_W { w: self } } #[doc = "Bit 10 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd10(&mut self) -> SPD10_W { SPD10_W { w: self } } #[doc = "Bit 11 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd11(&mut self) -> SPD11_W { SPD11_W { w: self } } #[doc = "Bit 12 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd12(&mut self) -> SPD12_W { SPD12_W { w: self } } #[doc = "Bit 13 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd13(&mut self) -> SPD13_W { SPD13_W { w: self } } #[doc = "Bit 14 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd14(&mut self) -> SPD14_W { SPD14_W { w: self } } #[doc = "Bit 15 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd15(&mut self) -> SPD15_W { SPD15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port output speed register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd1](index.html) module"] pub struct OSPD1_SPEC; impl crate::RegisterSpec for OSPD1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ospd1::R](R) reader structure"] impl crate::Readable for OSPD1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ospd1::W](W) writer structure"] impl crate::Writable for OSPD1_SPEC { type Writer = W; } #[doc = "`reset()` method sets OSPD1 to value 0"] impl crate::Resettable for OSPD1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose I/Os"] pub struct GPIOD { _marker: PhantomData<*const ()>, } unsafe impl Send for GPIOD {} impl GPIOD { #[doc = r"Pointer to the register block"] pub const PTR: *const gpiod::RegisterBlock = 0x4800_0c00 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const gpiod::RegisterBlock { Self::PTR } } impl Deref for GPIOD { type Target = gpiod::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for GPIOD { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("GPIOD").finish() } } #[doc = "General-purpose I/Os"] pub mod gpiod { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - GPIO port control register"] pub ctl: crate::Reg, #[doc = "0x04 - GPIO port output type register"] pub omode: crate::Reg, #[doc = "0x08 - GPIO port output speed register 0"] pub ospd0: crate::Reg, #[doc = "0x0c - GPIO port pull-up/pull-down register"] pub pud: crate::Reg, #[doc = "0x10 - GPIO port input data register"] pub istat: crate::Reg, #[doc = "0x14 - GPIO port output data register"] pub octl: crate::Reg, #[doc = "0x18 - GPIO port bit set/reset register"] pub bop: crate::Reg, _reserved7: [u8; 0x0c], #[doc = "0x28 - Port bit reset register"] pub bc: crate::Reg, #[doc = "0x2c - Port bit toggle register"] pub tg: crate::Reg, _reserved9: [u8; 0x0c], #[doc = "0x3c - Port output speed register 1"] pub ospd1: crate::Reg, } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "GPIO port control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CTL15` reader - Port x configuration bits (y = 0..15)"] pub struct CTL15_R(crate::FieldReader); impl CTL15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL15` writer - Port x configuration bits (y = 0..15)"] pub struct CTL15_W<'a> { w: &'a mut W, } impl<'a> CTL15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `CTL14` reader - Port x configuration bits (y = 0..15)"] pub struct CTL14_R(crate::FieldReader); impl CTL14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL14` writer - Port x configuration bits (y = 0..15)"] pub struct CTL14_W<'a> { w: &'a mut W, } impl<'a> CTL14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `CTL13` reader - Port x configuration bits (y = 0..15)"] pub struct CTL13_R(crate::FieldReader); impl CTL13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL13` writer - Port x configuration bits (y = 0..15)"] pub struct CTL13_W<'a> { w: &'a mut W, } impl<'a> CTL13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `CTL12` reader - Port x configuration bits (y = 0..15)"] pub struct CTL12_R(crate::FieldReader); impl CTL12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL12` writer - Port x configuration bits (y = 0..15)"] pub struct CTL12_W<'a> { w: &'a mut W, } impl<'a> CTL12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `CTL11` reader - Port x configuration bits (y = 0..15)"] pub struct CTL11_R(crate::FieldReader); impl CTL11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL11` writer - Port x configuration bits (y = 0..15)"] pub struct CTL11_W<'a> { w: &'a mut W, } impl<'a> CTL11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `CTL10` reader - Port x configuration bits (y = 0..15)"] pub struct CTL10_R(crate::FieldReader); impl CTL10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL10` writer - Port x configuration bits (y = 0..15)"] pub struct CTL10_W<'a> { w: &'a mut W, } impl<'a> CTL10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `CTL9` reader - Port x configuration bits (y = 0..15)"] pub struct CTL9_R(crate::FieldReader); impl CTL9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL9` writer - Port x configuration bits (y = 0..15)"] pub struct CTL9_W<'a> { w: &'a mut W, } impl<'a> CTL9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `CTL8` reader - Port x configuration bits (y = 0..15)"] pub struct CTL8_R(crate::FieldReader); impl CTL8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL8` writer - Port x configuration bits (y = 0..15)"] pub struct CTL8_W<'a> { w: &'a mut W, } impl<'a> CTL8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `CTL7` reader - Port x configuration bits (y = 0..15)"] pub struct CTL7_R(crate::FieldReader); impl CTL7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL7` writer - Port x configuration bits (y = 0..15)"] pub struct CTL7_W<'a> { w: &'a mut W, } impl<'a> CTL7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `CTL6` reader - Port x configuration bits (y = 0..15)"] pub struct CTL6_R(crate::FieldReader); impl CTL6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL6` writer - Port x configuration bits (y = 0..15)"] pub struct CTL6_W<'a> { w: &'a mut W, } impl<'a> CTL6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `CTL5` reader - Port x configuration bits (y = 0..15)"] pub struct CTL5_R(crate::FieldReader); impl CTL5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL5` writer - Port x configuration bits (y = 0..15)"] pub struct CTL5_W<'a> { w: &'a mut W, } impl<'a> CTL5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `CTL4` reader - Port x configuration bits (y = 0..15)"] pub struct CTL4_R(crate::FieldReader); impl CTL4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL4` writer - Port x configuration bits (y = 0..15)"] pub struct CTL4_W<'a> { w: &'a mut W, } impl<'a> CTL4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CTL3` reader - Port x configuration bits (y = 0..15)"] pub struct CTL3_R(crate::FieldReader); impl CTL3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL3` writer - Port x configuration bits (y = 0..15)"] pub struct CTL3_W<'a> { w: &'a mut W, } impl<'a> CTL3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `CTL2` reader - Port x configuration bits (y = 0..15)"] pub struct CTL2_R(crate::FieldReader); impl CTL2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL2` writer - Port x configuration bits (y = 0..15)"] pub struct CTL2_W<'a> { w: &'a mut W, } impl<'a> CTL2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `CTL1` reader - Port x configuration bits (y = 0..15)"] pub struct CTL1_R(crate::FieldReader); impl CTL1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL1` writer - Port x configuration bits (y = 0..15)"] pub struct CTL1_W<'a> { w: &'a mut W, } impl<'a> CTL1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CTL0` reader - Port x configuration bits (y = 0..15)"] pub struct CTL0_R(crate::FieldReader); impl CTL0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL0` writer - Port x configuration bits (y = 0..15)"] pub struct CTL0_W<'a> { w: &'a mut W, } impl<'a> CTL0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl15(&self) -> CTL15_R { CTL15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl14(&self) -> CTL14_R { CTL14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl13(&self) -> CTL13_R { CTL13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl12(&self) -> CTL12_R { CTL12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl11(&self) -> CTL11_R { CTL11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl10(&self) -> CTL10_R { CTL10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl9(&self) -> CTL9_R { CTL9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl8(&self) -> CTL8_R { CTL8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl7(&self) -> CTL7_R { CTL7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl6(&self) -> CTL6_R { CTL6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl5(&self) -> CTL5_R { CTL5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl4(&self) -> CTL4_R { CTL4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl3(&self) -> CTL3_R { CTL3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl2(&self) -> CTL2_R { CTL2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl1(&self) -> CTL1_R { CTL1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl0(&self) -> CTL0_R { CTL0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl15(&mut self) -> CTL15_W { CTL15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl14(&mut self) -> CTL14_W { CTL14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl13(&mut self) -> CTL13_W { CTL13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl12(&mut self) -> CTL12_W { CTL12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl11(&mut self) -> CTL11_W { CTL11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl10(&mut self) -> CTL10_W { CTL10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl9(&mut self) -> CTL9_W { CTL9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl8(&mut self) -> CTL8_W { CTL8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl7(&mut self) -> CTL7_W { CTL7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl6(&mut self) -> CTL6_W { CTL6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl5(&mut self) -> CTL5_W { CTL5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl4(&mut self) -> CTL4_W { CTL4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl3(&mut self) -> CTL3_W { CTL3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl2(&mut self) -> CTL2_W { CTL2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl1(&mut self) -> CTL1_W { CTL1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl0(&mut self) -> CTL0_W { CTL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OMODE register accessor: an alias for `Reg`"] pub type OMODE = crate::Reg; #[doc = "GPIO port output type register"] pub mod omode { #[doc = "Register `OMODE` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OMODE` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OM15` reader - Port x configuration bit 15"] pub struct OM15_R(crate::FieldReader); impl OM15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM15` writer - Port x configuration bit 15"] pub struct OM15_W<'a> { w: &'a mut W, } impl<'a> OM15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OM14` reader - Port x configuration bit 14"] pub struct OM14_R(crate::FieldReader); impl OM14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM14` writer - Port x configuration bit 14"] pub struct OM14_W<'a> { w: &'a mut W, } impl<'a> OM14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `OM13` reader - Port x configuration bit 13"] pub struct OM13_R(crate::FieldReader); impl OM13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM13` writer - Port x configuration bit 13"] pub struct OM13_W<'a> { w: &'a mut W, } impl<'a> OM13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OM12` reader - Port x configuration bit 12"] pub struct OM12_R(crate::FieldReader); impl OM12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM12` writer - Port x configuration bit 12"] pub struct OM12_W<'a> { w: &'a mut W, } impl<'a> OM12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OM11` reader - Port x configuration bit 11"] pub struct OM11_R(crate::FieldReader); impl OM11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM11` writer - Port x configuration bit 11"] pub struct OM11_W<'a> { w: &'a mut W, } impl<'a> OM11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `OM10` reader - Port x configuration bit 10"] pub struct OM10_R(crate::FieldReader); impl OM10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM10` writer - Port x configuration bit 10"] pub struct OM10_W<'a> { w: &'a mut W, } impl<'a> OM10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OM9` reader - Port x configuration bit 9"] pub struct OM9_R(crate::FieldReader); impl OM9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM9` writer - Port x configuration bit 9"] pub struct OM9_W<'a> { w: &'a mut W, } impl<'a> OM9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OM8` reader - Port x configuration bit 8"] pub struct OM8_R(crate::FieldReader); impl OM8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM8` writer - Port x configuration bit 8"] pub struct OM8_W<'a> { w: &'a mut W, } impl<'a> OM8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OM7` reader - Port x configuration bit 7"] pub struct OM7_R(crate::FieldReader); impl OM7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM7` writer - Port x configuration bit 7"] pub struct OM7_W<'a> { w: &'a mut W, } impl<'a> OM7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `OM6` reader - Port x configuration bit 6"] pub struct OM6_R(crate::FieldReader); impl OM6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM6` writer - Port x configuration bit 6"] pub struct OM6_W<'a> { w: &'a mut W, } impl<'a> OM6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OM5` reader - Port x configuration bit 5"] pub struct OM5_R(crate::FieldReader); impl OM5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM5` writer - Port x configuration bit 5"] pub struct OM5_W<'a> { w: &'a mut W, } impl<'a> OM5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OM4` reader - Port x configuration bit 4"] pub struct OM4_R(crate::FieldReader); impl OM4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM4` writer - Port x configuration bit 4"] pub struct OM4_W<'a> { w: &'a mut W, } impl<'a> OM4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OM3` reader - Port x configuration bit 3"] pub struct OM3_R(crate::FieldReader); impl OM3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM3` writer - Port x configuration bit 3"] pub struct OM3_W<'a> { w: &'a mut W, } impl<'a> OM3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `OM2` reader - Port x configuration bit 2"] pub struct OM2_R(crate::FieldReader); impl OM2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM2` writer - Port x configuration bit 2"] pub struct OM2_W<'a> { w: &'a mut W, } impl<'a> OM2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `OM1` reader - Port x configuration bit 1"] pub struct OM1_R(crate::FieldReader); impl OM1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM1` writer - Port x configuration bit 1"] pub struct OM1_W<'a> { w: &'a mut W, } impl<'a> OM1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OM0` reader - Port x configuration bit 0"] pub struct OM0_R(crate::FieldReader); impl OM0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM0` writer - Port x configuration bit 0"] pub struct OM0_W<'a> { w: &'a mut W, } impl<'a> OM0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Port x configuration bit 15"] #[inline(always)] pub fn om15(&self) -> OM15_R { OM15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port x configuration bit 14"] #[inline(always)] pub fn om14(&self) -> OM14_R { OM14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port x configuration bit 13"] #[inline(always)] pub fn om13(&self) -> OM13_R { OM13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port x configuration bit 12"] #[inline(always)] pub fn om12(&self) -> OM12_R { OM12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port x configuration bit 11"] #[inline(always)] pub fn om11(&self) -> OM11_R { OM11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port x configuration bit 10"] #[inline(always)] pub fn om10(&self) -> OM10_R { OM10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port x configuration bit 9"] #[inline(always)] pub fn om9(&self) -> OM9_R { OM9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port x configuration bit 8"] #[inline(always)] pub fn om8(&self) -> OM8_R { OM8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port x configuration bit 7"] #[inline(always)] pub fn om7(&self) -> OM7_R { OM7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port x configuration bit 6"] #[inline(always)] pub fn om6(&self) -> OM6_R { OM6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port x configuration bit 5"] #[inline(always)] pub fn om5(&self) -> OM5_R { OM5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port x configuration bit 4"] #[inline(always)] pub fn om4(&self) -> OM4_R { OM4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port x configuration bit 3"] #[inline(always)] pub fn om3(&self) -> OM3_R { OM3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port x configuration bit 2"] #[inline(always)] pub fn om2(&self) -> OM2_R { OM2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port x configuration bit 1"] #[inline(always)] pub fn om1(&self) -> OM1_R { OM1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port x configuration bit 0"] #[inline(always)] pub fn om0(&self) -> OM0_R { OM0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Port x configuration bit 15"] #[inline(always)] pub fn om15(&mut self) -> OM15_W { OM15_W { w: self } } #[doc = "Bit 14 - Port x configuration bit 14"] #[inline(always)] pub fn om14(&mut self) -> OM14_W { OM14_W { w: self } } #[doc = "Bit 13 - Port x configuration bit 13"] #[inline(always)] pub fn om13(&mut self) -> OM13_W { OM13_W { w: self } } #[doc = "Bit 12 - Port x configuration bit 12"] #[inline(always)] pub fn om12(&mut self) -> OM12_W { OM12_W { w: self } } #[doc = "Bit 11 - Port x configuration bit 11"] #[inline(always)] pub fn om11(&mut self) -> OM11_W { OM11_W { w: self } } #[doc = "Bit 10 - Port x configuration bit 10"] #[inline(always)] pub fn om10(&mut self) -> OM10_W { OM10_W { w: self } } #[doc = "Bit 9 - Port x configuration bit 9"] #[inline(always)] pub fn om9(&mut self) -> OM9_W { OM9_W { w: self } } #[doc = "Bit 8 - Port x configuration bit 8"] #[inline(always)] pub fn om8(&mut self) -> OM8_W { OM8_W { w: self } } #[doc = "Bit 7 - Port x configuration bit 7"] #[inline(always)] pub fn om7(&mut self) -> OM7_W { OM7_W { w: self } } #[doc = "Bit 6 - Port x configuration bit 6"] #[inline(always)] pub fn om6(&mut self) -> OM6_W { OM6_W { w: self } } #[doc = "Bit 5 - Port x configuration bit 5"] #[inline(always)] pub fn om5(&mut self) -> OM5_W { OM5_W { w: self } } #[doc = "Bit 4 - Port x configuration bit 4"] #[inline(always)] pub fn om4(&mut self) -> OM4_W { OM4_W { w: self } } #[doc = "Bit 3 - Port x configuration bit 3"] #[inline(always)] pub fn om3(&mut self) -> OM3_W { OM3_W { w: self } } #[doc = "Bit 2 - Port x configuration bit 2"] #[inline(always)] pub fn om2(&mut self) -> OM2_W { OM2_W { w: self } } #[doc = "Bit 1 - Port x configuration bit 1"] #[inline(always)] pub fn om1(&mut self) -> OM1_W { OM1_W { w: self } } #[doc = "Bit 0 - Port x configuration bit 0"] #[inline(always)] pub fn om0(&mut self) -> OM0_W { OM0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output type register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [omode](index.html) module"] pub struct OMODE_SPEC; impl crate::RegisterSpec for OMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [omode::R](R) reader structure"] impl crate::Readable for OMODE_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [omode::W](W) writer structure"] impl crate::Writable for OMODE_SPEC { type Writer = W; } #[doc = "`reset()` method sets OMODE to value 0"] impl crate::Resettable for OMODE_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OSPD0 register accessor: an alias for `Reg`"] pub type OSPD0 = crate::Reg; #[doc = "GPIO port output speed register 0"] pub mod ospd0 { #[doc = "Register `OSPD0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OSPD0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OSPD15` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD15_R(crate::FieldReader); impl OSPD15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD15` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD15_W<'a> { w: &'a mut W, } impl<'a> OSPD15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `OSPD14` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD14_R(crate::FieldReader); impl OSPD14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD14` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD14_W<'a> { w: &'a mut W, } impl<'a> OSPD14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `OSPD13` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD13_R(crate::FieldReader); impl OSPD13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD13` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD13_W<'a> { w: &'a mut W, } impl<'a> OSPD13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `OSPD12` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD12_R(crate::FieldReader); impl OSPD12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD12` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD12_W<'a> { w: &'a mut W, } impl<'a> OSPD12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `OSPD11` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD11_R(crate::FieldReader); impl OSPD11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD11` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD11_W<'a> { w: &'a mut W, } impl<'a> OSPD11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `OSPD10` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD10_R(crate::FieldReader); impl OSPD10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD10` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD10_W<'a> { w: &'a mut W, } impl<'a> OSPD10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `OSPD9` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD9_R(crate::FieldReader); impl OSPD9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD9` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD9_W<'a> { w: &'a mut W, } impl<'a> OSPD9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `OSPD8` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD8_R(crate::FieldReader); impl OSPD8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD8` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD8_W<'a> { w: &'a mut W, } impl<'a> OSPD8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `OSPD7` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD7_R(crate::FieldReader); impl OSPD7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD7` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD7_W<'a> { w: &'a mut W, } impl<'a> OSPD7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `OSPD6` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD6_R(crate::FieldReader); impl OSPD6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD6` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD6_W<'a> { w: &'a mut W, } impl<'a> OSPD6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `OSPD5` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD5_R(crate::FieldReader); impl OSPD5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD5` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD5_W<'a> { w: &'a mut W, } impl<'a> OSPD5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `OSPD4` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD4_R(crate::FieldReader); impl OSPD4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD4` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD4_W<'a> { w: &'a mut W, } impl<'a> OSPD4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `OSPD3` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD3_R(crate::FieldReader); impl OSPD3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD3` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD3_W<'a> { w: &'a mut W, } impl<'a> OSPD3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `OSPD2` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD2_R(crate::FieldReader); impl OSPD2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD2` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD2_W<'a> { w: &'a mut W, } impl<'a> OSPD2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `OSPD1` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD1_R(crate::FieldReader); impl OSPD1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD1` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD1_W<'a> { w: &'a mut W, } impl<'a> OSPD1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `OSPD0` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD0_R(crate::FieldReader); impl OSPD0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD0` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD0_W<'a> { w: &'a mut W, } impl<'a> OSPD0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd15(&self) -> OSPD15_R { OSPD15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd14(&self) -> OSPD14_R { OSPD14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd13(&self) -> OSPD13_R { OSPD13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd12(&self) -> OSPD12_R { OSPD12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd11(&self) -> OSPD11_R { OSPD11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd10(&self) -> OSPD10_R { OSPD10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd9(&self) -> OSPD9_R { OSPD9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd8(&self) -> OSPD8_R { OSPD8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd7(&self) -> OSPD7_R { OSPD7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd6(&self) -> OSPD6_R { OSPD6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd5(&self) -> OSPD5_R { OSPD5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd4(&self) -> OSPD4_R { OSPD4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd3(&self) -> OSPD3_R { OSPD3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd2(&self) -> OSPD2_R { OSPD2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd1(&self) -> OSPD1_R { OSPD1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd0(&self) -> OSPD0_R { OSPD0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd15(&mut self) -> OSPD15_W { OSPD15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd14(&mut self) -> OSPD14_W { OSPD14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd13(&mut self) -> OSPD13_W { OSPD13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd12(&mut self) -> OSPD12_W { OSPD12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd11(&mut self) -> OSPD11_W { OSPD11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd10(&mut self) -> OSPD10_W { OSPD10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd9(&mut self) -> OSPD9_W { OSPD9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd8(&mut self) -> OSPD8_W { OSPD8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd7(&mut self) -> OSPD7_W { OSPD7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd6(&mut self) -> OSPD6_W { OSPD6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd5(&mut self) -> OSPD5_W { OSPD5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd4(&mut self) -> OSPD4_W { OSPD4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd3(&mut self) -> OSPD3_W { OSPD3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd2(&mut self) -> OSPD2_W { OSPD2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd1(&mut self) -> OSPD1_W { OSPD1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd0(&mut self) -> OSPD0_W { OSPD0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output speed register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd0](index.html) module"] pub struct OSPD0_SPEC; impl crate::RegisterSpec for OSPD0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ospd0::R](R) reader structure"] impl crate::Readable for OSPD0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ospd0::W](W) writer structure"] impl crate::Writable for OSPD0_SPEC { type Writer = W; } #[doc = "`reset()` method sets OSPD0 to value 0"] impl crate::Resettable for OSPD0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PUD register accessor: an alias for `Reg`"] pub type PUD = crate::Reg; #[doc = "GPIO port pull-up/pull-down register"] pub mod pud { #[doc = "Register `PUD` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PUD` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PUD15` reader - Port x configuration bits (y = 0..15)"] pub struct PUD15_R(crate::FieldReader); impl PUD15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD15` writer - Port x configuration bits (y = 0..15)"] pub struct PUD15_W<'a> { w: &'a mut W, } impl<'a> PUD15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `PUD14` reader - Port x configuration bits (y = 0..15)"] pub struct PUD14_R(crate::FieldReader); impl PUD14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD14` writer - Port x configuration bits (y = 0..15)"] pub struct PUD14_W<'a> { w: &'a mut W, } impl<'a> PUD14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `PUD13` reader - Port x configuration bits (y = 0..15)"] pub struct PUD13_R(crate::FieldReader); impl PUD13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD13` writer - Port x configuration bits (y = 0..15)"] pub struct PUD13_W<'a> { w: &'a mut W, } impl<'a> PUD13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `PUD12` reader - Port x configuration bits (y = 0..15)"] pub struct PUD12_R(crate::FieldReader); impl PUD12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD12` writer - Port x configuration bits (y = 0..15)"] pub struct PUD12_W<'a> { w: &'a mut W, } impl<'a> PUD12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `PUD11` reader - Port x configuration bits (y = 0..15)"] pub struct PUD11_R(crate::FieldReader); impl PUD11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD11` writer - Port x configuration bits (y = 0..15)"] pub struct PUD11_W<'a> { w: &'a mut W, } impl<'a> PUD11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `PUD10` reader - Port x configuration bits (y = 0..15)"] pub struct PUD10_R(crate::FieldReader); impl PUD10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD10` writer - Port x configuration bits (y = 0..15)"] pub struct PUD10_W<'a> { w: &'a mut W, } impl<'a> PUD10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `PUD9` reader - Port x configuration bits (y = 0..15)"] pub struct PUD9_R(crate::FieldReader); impl PUD9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD9` writer - Port x configuration bits (y = 0..15)"] pub struct PUD9_W<'a> { w: &'a mut W, } impl<'a> PUD9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `PUD8` reader - Port x configuration bits (y = 0..15)"] pub struct PUD8_R(crate::FieldReader); impl PUD8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD8` writer - Port x configuration bits (y = 0..15)"] pub struct PUD8_W<'a> { w: &'a mut W, } impl<'a> PUD8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `PUD7` reader - Port x configuration bits (y = 0..15)"] pub struct PUD7_R(crate::FieldReader); impl PUD7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD7` writer - Port x configuration bits (y = 0..15)"] pub struct PUD7_W<'a> { w: &'a mut W, } impl<'a> PUD7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `PUD6` reader - Port x configuration bits (y = 0..15)"] pub struct PUD6_R(crate::FieldReader); impl PUD6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD6` writer - Port x configuration bits (y = 0..15)"] pub struct PUD6_W<'a> { w: &'a mut W, } impl<'a> PUD6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `PUD5` reader - Port x configuration bits (y = 0..15)"] pub struct PUD5_R(crate::FieldReader); impl PUD5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD5` writer - Port x configuration bits (y = 0..15)"] pub struct PUD5_W<'a> { w: &'a mut W, } impl<'a> PUD5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PUD4` reader - Port x configuration bits (y = 0..15)"] pub struct PUD4_R(crate::FieldReader); impl PUD4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD4` writer - Port x configuration bits (y = 0..15)"] pub struct PUD4_W<'a> { w: &'a mut W, } impl<'a> PUD4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `PUD3` reader - Port x configuration bits (y = 0..15)"] pub struct PUD3_R(crate::FieldReader); impl PUD3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD3` writer - Port x configuration bits (y = 0..15)"] pub struct PUD3_W<'a> { w: &'a mut W, } impl<'a> PUD3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `PUD2` reader - Port x configuration bits (y = 0..15)"] pub struct PUD2_R(crate::FieldReader); impl PUD2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD2` writer - Port x configuration bits (y = 0..15)"] pub struct PUD2_W<'a> { w: &'a mut W, } impl<'a> PUD2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `PUD1` reader - Port x configuration bits (y = 0..15)"] pub struct PUD1_R(crate::FieldReader); impl PUD1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD1` writer - Port x configuration bits (y = 0..15)"] pub struct PUD1_W<'a> { w: &'a mut W, } impl<'a> PUD1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `PUD0` reader - Port x configuration bits (y = 0..15)"] pub struct PUD0_R(crate::FieldReader); impl PUD0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD0` writer - Port x configuration bits (y = 0..15)"] pub struct PUD0_W<'a> { w: &'a mut W, } impl<'a> PUD0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud15(&self) -> PUD15_R { PUD15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud14(&self) -> PUD14_R { PUD14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud13(&self) -> PUD13_R { PUD13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud12(&self) -> PUD12_R { PUD12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud11(&self) -> PUD11_R { PUD11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud10(&self) -> PUD10_R { PUD10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud9(&self) -> PUD9_R { PUD9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud8(&self) -> PUD8_R { PUD8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud7(&self) -> PUD7_R { PUD7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud6(&self) -> PUD6_R { PUD6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud5(&self) -> PUD5_R { PUD5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud4(&self) -> PUD4_R { PUD4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud3(&self) -> PUD3_R { PUD3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud2(&self) -> PUD2_R { PUD2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud1(&self) -> PUD1_R { PUD1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud0(&self) -> PUD0_R { PUD0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud15(&mut self) -> PUD15_W { PUD15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud14(&mut self) -> PUD14_W { PUD14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud13(&mut self) -> PUD13_W { PUD13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud12(&mut self) -> PUD12_W { PUD12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud11(&mut self) -> PUD11_W { PUD11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud10(&mut self) -> PUD10_W { PUD10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud9(&mut self) -> PUD9_W { PUD9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud8(&mut self) -> PUD8_W { PUD8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud7(&mut self) -> PUD7_W { PUD7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud6(&mut self) -> PUD6_W { PUD6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud5(&mut self) -> PUD5_W { PUD5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud4(&mut self) -> PUD4_W { PUD4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud3(&mut self) -> PUD3_W { PUD3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud2(&mut self) -> PUD2_W { PUD2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud1(&mut self) -> PUD1_W { PUD1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud0(&mut self) -> PUD0_W { PUD0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port pull-up/pull-down register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pud](index.html) module"] pub struct PUD_SPEC; impl crate::RegisterSpec for PUD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [pud::R](R) reader structure"] impl crate::Readable for PUD_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [pud::W](W) writer structure"] impl crate::Writable for PUD_SPEC { type Writer = W; } #[doc = "`reset()` method sets PUD to value 0"] impl crate::Resettable for PUD_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "ISTAT register accessor: an alias for `Reg`"] pub type ISTAT = crate::Reg; #[doc = "GPIO port input data register"] pub mod istat { #[doc = "Register `ISTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `ISTAT15` reader - Port input data (y = 0..15)"] pub struct ISTAT15_R(crate::FieldReader); impl ISTAT15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT14` reader - Port input data (y = 0..15)"] pub struct ISTAT14_R(crate::FieldReader); impl ISTAT14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT13` reader - Port input data (y = 0..15)"] pub struct ISTAT13_R(crate::FieldReader); impl ISTAT13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT12` reader - Port input data (y = 0..15)"] pub struct ISTAT12_R(crate::FieldReader); impl ISTAT12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT11` reader - Port input data (y = 0..15)"] pub struct ISTAT11_R(crate::FieldReader); impl ISTAT11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT10` reader - Port input data (y = 0..15)"] pub struct ISTAT10_R(crate::FieldReader); impl ISTAT10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT9` reader - Port input data (y = 0..15)"] pub struct ISTAT9_R(crate::FieldReader); impl ISTAT9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT8` reader - Port input data (y = 0..15)"] pub struct ISTAT8_R(crate::FieldReader); impl ISTAT8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT7` reader - Port input data (y = 0..15)"] pub struct ISTAT7_R(crate::FieldReader); impl ISTAT7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT6` reader - Port input data (y = 0..15)"] pub struct ISTAT6_R(crate::FieldReader); impl ISTAT6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT5` reader - Port input data (y = 0..15)"] pub struct ISTAT5_R(crate::FieldReader); impl ISTAT5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT4` reader - Port input data (y = 0..15)"] pub struct ISTAT4_R(crate::FieldReader); impl ISTAT4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT3` reader - Port input data (y = 0..15)"] pub struct ISTAT3_R(crate::FieldReader); impl ISTAT3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT2` reader - Port input data (y = 0..15)"] pub struct ISTAT2_R(crate::FieldReader); impl ISTAT2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT1` reader - Port input data (y = 0..15)"] pub struct ISTAT1_R(crate::FieldReader); impl ISTAT1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT0` reader - Port input data (y = 0..15)"] pub struct ISTAT0_R(crate::FieldReader); impl ISTAT0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 15 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat15(&self) -> ISTAT15_R { ISTAT15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat14(&self) -> ISTAT14_R { ISTAT14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat13(&self) -> ISTAT13_R { ISTAT13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat12(&self) -> ISTAT12_R { ISTAT12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat11(&self) -> ISTAT11_R { ISTAT11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat10(&self) -> ISTAT10_R { ISTAT10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat9(&self) -> ISTAT9_R { ISTAT9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat8(&self) -> ISTAT8_R { ISTAT8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat7(&self) -> ISTAT7_R { ISTAT7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat6(&self) -> ISTAT6_R { ISTAT6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat5(&self) -> ISTAT5_R { ISTAT5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat4(&self) -> ISTAT4_R { ISTAT4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat3(&self) -> ISTAT3_R { ISTAT3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat2(&self) -> ISTAT2_R { ISTAT2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat1(&self) -> ISTAT1_R { ISTAT1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat0(&self) -> ISTAT0_R { ISTAT0_R::new((self.bits & 0x01) != 0) } } #[doc = "GPIO port input data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [istat](index.html) module"] pub struct ISTAT_SPEC; impl crate::RegisterSpec for ISTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [istat::R](R) reader structure"] impl crate::Readable for ISTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets ISTAT to value 0"] impl crate::Resettable for ISTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OCTL register accessor: an alias for `Reg`"] pub type OCTL = crate::Reg; #[doc = "GPIO port output data register"] pub mod octl { #[doc = "Register `OCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OCTL15` reader - Port output data (y = 0..15)"] pub struct OCTL15_R(crate::FieldReader); impl OCTL15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL15` writer - Port output data (y = 0..15)"] pub struct OCTL15_W<'a> { w: &'a mut W, } impl<'a> OCTL15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OCTL14` reader - Port output data (y = 0..15)"] pub struct OCTL14_R(crate::FieldReader); impl OCTL14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL14` writer - Port output data (y = 0..15)"] pub struct OCTL14_W<'a> { w: &'a mut W, } impl<'a> OCTL14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `OCTL13` reader - Port output data (y = 0..15)"] pub struct OCTL13_R(crate::FieldReader); impl OCTL13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL13` writer - Port output data (y = 0..15)"] pub struct OCTL13_W<'a> { w: &'a mut W, } impl<'a> OCTL13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OCTL12` reader - Port output data (y = 0..15)"] pub struct OCTL12_R(crate::FieldReader); impl OCTL12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL12` writer - Port output data (y = 0..15)"] pub struct OCTL12_W<'a> { w: &'a mut W, } impl<'a> OCTL12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OCTL11` reader - Port output data (y = 0..15)"] pub struct OCTL11_R(crate::FieldReader); impl OCTL11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL11` writer - Port output data (y = 0..15)"] pub struct OCTL11_W<'a> { w: &'a mut W, } impl<'a> OCTL11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `OCTL10` reader - Port output data (y = 0..15)"] pub struct OCTL10_R(crate::FieldReader); impl OCTL10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL10` writer - Port output data (y = 0..15)"] pub struct OCTL10_W<'a> { w: &'a mut W, } impl<'a> OCTL10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OCTL9` reader - Port output data (y = 0..15)"] pub struct OCTL9_R(crate::FieldReader); impl OCTL9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL9` writer - Port output data (y = 0..15)"] pub struct OCTL9_W<'a> { w: &'a mut W, } impl<'a> OCTL9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OCTL8` reader - Port output data (y = 0..15)"] pub struct OCTL8_R(crate::FieldReader); impl OCTL8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL8` writer - Port output data (y = 0..15)"] pub struct OCTL8_W<'a> { w: &'a mut W, } impl<'a> OCTL8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OCTL7` reader - Port output data (y = 0..15)"] pub struct OCTL7_R(crate::FieldReader); impl OCTL7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL7` writer - Port output data (y = 0..15)"] pub struct OCTL7_W<'a> { w: &'a mut W, } impl<'a> OCTL7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `OCTL6` reader - Port output data (y = 0..15)"] pub struct OCTL6_R(crate::FieldReader); impl OCTL6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL6` writer - Port output data (y = 0..15)"] pub struct OCTL6_W<'a> { w: &'a mut W, } impl<'a> OCTL6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OCTL5` reader - Port output data (y = 0..15)"] pub struct OCTL5_R(crate::FieldReader); impl OCTL5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL5` writer - Port output data (y = 0..15)"] pub struct OCTL5_W<'a> { w: &'a mut W, } impl<'a> OCTL5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OCTL4` reader - Port output data (y = 0..15)"] pub struct OCTL4_R(crate::FieldReader); impl OCTL4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL4` writer - Port output data (y = 0..15)"] pub struct OCTL4_W<'a> { w: &'a mut W, } impl<'a> OCTL4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OCTL3` reader - Port output data (y = 0..15)"] pub struct OCTL3_R(crate::FieldReader); impl OCTL3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL3` writer - Port output data (y = 0..15)"] pub struct OCTL3_W<'a> { w: &'a mut W, } impl<'a> OCTL3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `OCTL2` reader - Port output data (y = 0..15)"] pub struct OCTL2_R(crate::FieldReader); impl OCTL2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL2` writer - Port output data (y = 0..15)"] pub struct OCTL2_W<'a> { w: &'a mut W, } impl<'a> OCTL2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `OCTL1` reader - Port output data (y = 0..15)"] pub struct OCTL1_R(crate::FieldReader); impl OCTL1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL1` writer - Port output data (y = 0..15)"] pub struct OCTL1_W<'a> { w: &'a mut W, } impl<'a> OCTL1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OCTL0` reader - Port output data (y = 0..15)"] pub struct OCTL0_R(crate::FieldReader); impl OCTL0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL0` writer - Port output data (y = 0..15)"] pub struct OCTL0_W<'a> { w: &'a mut W, } impl<'a> OCTL0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl15(&self) -> OCTL15_R { OCTL15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl14(&self) -> OCTL14_R { OCTL14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl13(&self) -> OCTL13_R { OCTL13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl12(&self) -> OCTL12_R { OCTL12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl11(&self) -> OCTL11_R { OCTL11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl10(&self) -> OCTL10_R { OCTL10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl9(&self) -> OCTL9_R { OCTL9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl8(&self) -> OCTL8_R { OCTL8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl7(&self) -> OCTL7_R { OCTL7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl6(&self) -> OCTL6_R { OCTL6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl5(&self) -> OCTL5_R { OCTL5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl4(&self) -> OCTL4_R { OCTL4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl3(&self) -> OCTL3_R { OCTL3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl2(&self) -> OCTL2_R { OCTL2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl1(&self) -> OCTL1_R { OCTL1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl0(&self) -> OCTL0_R { OCTL0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl15(&mut self) -> OCTL15_W { OCTL15_W { w: self } } #[doc = "Bit 14 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl14(&mut self) -> OCTL14_W { OCTL14_W { w: self } } #[doc = "Bit 13 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl13(&mut self) -> OCTL13_W { OCTL13_W { w: self } } #[doc = "Bit 12 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl12(&mut self) -> OCTL12_W { OCTL12_W { w: self } } #[doc = "Bit 11 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl11(&mut self) -> OCTL11_W { OCTL11_W { w: self } } #[doc = "Bit 10 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl10(&mut self) -> OCTL10_W { OCTL10_W { w: self } } #[doc = "Bit 9 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl9(&mut self) -> OCTL9_W { OCTL9_W { w: self } } #[doc = "Bit 8 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl8(&mut self) -> OCTL8_W { OCTL8_W { w: self } } #[doc = "Bit 7 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl7(&mut self) -> OCTL7_W { OCTL7_W { w: self } } #[doc = "Bit 6 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl6(&mut self) -> OCTL6_W { OCTL6_W { w: self } } #[doc = "Bit 5 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl5(&mut self) -> OCTL5_W { OCTL5_W { w: self } } #[doc = "Bit 4 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl4(&mut self) -> OCTL4_W { OCTL4_W { w: self } } #[doc = "Bit 3 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl3(&mut self) -> OCTL3_W { OCTL3_W { w: self } } #[doc = "Bit 2 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl2(&mut self) -> OCTL2_W { OCTL2_W { w: self } } #[doc = "Bit 1 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl1(&mut self) -> OCTL1_W { OCTL1_W { w: self } } #[doc = "Bit 0 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl0(&mut self) -> OCTL0_W { OCTL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [octl](index.html) module"] pub struct OCTL_SPEC; impl crate::RegisterSpec for OCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [octl::R](R) reader structure"] impl crate::Readable for OCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [octl::W](W) writer structure"] impl crate::Writable for OCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets OCTL to value 0"] impl crate::Resettable for OCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BOP register accessor: an alias for `Reg`"] pub type BOP = crate::Reg; #[doc = "GPIO port bit set/reset register"] pub mod bop { #[doc = "Register `BOP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CR15` writer - Port x reset bit y (y = 0..15)"] pub struct CR15_W<'a> { w: &'a mut W, } impl<'a> CR15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `CR14` writer - Port x reset bit y (y = 0..15)"] pub struct CR14_W<'a> { w: &'a mut W, } impl<'a> CR14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CR13` writer - Port x reset bit y (y = 0..15)"] pub struct CR13_W<'a> { w: &'a mut W, } impl<'a> CR13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CR12` writer - Port x reset bit y (y = 0..15)"] pub struct CR12_W<'a> { w: &'a mut W, } impl<'a> CR12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `CR11` writer - Port x reset bit y (y = 0..15)"] pub struct CR11_W<'a> { w: &'a mut W, } impl<'a> CR11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CR10` writer - Port x reset bit y (y = 0..15)"] pub struct CR10_W<'a> { w: &'a mut W, } impl<'a> CR10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `CR9` writer - Port x reset bit y (y = 0..15)"] pub struct CR9_W<'a> { w: &'a mut W, } impl<'a> CR9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); self.w } } #[doc = "Field `CR8` writer - Port x reset bit y (y = 0..15)"] pub struct CR8_W<'a> { w: &'a mut W, } impl<'a> CR8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `CR7` writer - Port x reset bit y (y = 0..15)"] pub struct CR7_W<'a> { w: &'a mut W, } impl<'a> CR7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `CR6` writer - Port x reset bit y (y = 0..15)"] pub struct CR6_W<'a> { w: &'a mut W, } impl<'a> CR6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `CR5` writer - Port x reset bit y (y = 0..15)"] pub struct CR5_W<'a> { w: &'a mut W, } impl<'a> CR5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `CR4` writer - Port x reset bit y (y = 0..15)"] pub struct CR4_W<'a> { w: &'a mut W, } impl<'a> CR4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `CR3` writer - Port x reset bit y (y = 0..15)"] pub struct CR3_W<'a> { w: &'a mut W, } impl<'a> CR3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `CR2` writer - Port x reset bit y (y = 0..15)"] pub struct CR2_W<'a> { w: &'a mut W, } impl<'a> CR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `CR1` writer - Port x reset bit y (y = 0..15)"] pub struct CR1_W<'a> { w: &'a mut W, } impl<'a> CR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `CR0` writer - Port x reset bit y (y= 0..15)"] pub struct CR0_W<'a> { w: &'a mut W, } impl<'a> CR0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `BOP15` writer - Port x set bit y (y= 0..15)"] pub struct BOP15_W<'a> { w: &'a mut W, } impl<'a> BOP15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `BOP14` writer - Port x set bit y (y= 0..15)"] pub struct BOP14_W<'a> { w: &'a mut W, } impl<'a> BOP14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `BOP13` writer - Port x set bit y (y= 0..15)"] pub struct BOP13_W<'a> { w: &'a mut W, } impl<'a> BOP13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `BOP12` writer - Port x set bit y (y= 0..15)"] pub struct BOP12_W<'a> { w: &'a mut W, } impl<'a> BOP12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `BOP11` writer - Port x set bit y (y= 0..15)"] pub struct BOP11_W<'a> { w: &'a mut W, } impl<'a> BOP11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `BOP10` writer - Port x set bit y (y= 0..15)"] pub struct BOP10_W<'a> { w: &'a mut W, } impl<'a> BOP10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `BOP9` writer - Port x set bit y (y= 0..15)"] pub struct BOP9_W<'a> { w: &'a mut W, } impl<'a> BOP9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `BOP8` writer - Port x set bit y (y= 0..15)"] pub struct BOP8_W<'a> { w: &'a mut W, } impl<'a> BOP8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `BOP7` writer - Port x set bit y (y= 0..15)"] pub struct BOP7_W<'a> { w: &'a mut W, } impl<'a> BOP7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BOP6` writer - Port x set bit y (y= 0..15)"] pub struct BOP6_W<'a> { w: &'a mut W, } impl<'a> BOP6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `BOP5` writer - Port x set bit y (y= 0..15)"] pub struct BOP5_W<'a> { w: &'a mut W, } impl<'a> BOP5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `BOP4` writer - Port x set bit y (y= 0..15)"] pub struct BOP4_W<'a> { w: &'a mut W, } impl<'a> BOP4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `BOP3` writer - Port x set bit y (y= 0..15)"] pub struct BOP3_W<'a> { w: &'a mut W, } impl<'a> BOP3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `BOP2` writer - Port x set bit y (y= 0..15)"] pub struct BOP2_W<'a> { w: &'a mut W, } impl<'a> BOP2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `BOP1` writer - Port x set bit y (y= 0..15)"] pub struct BOP1_W<'a> { w: &'a mut W, } impl<'a> BOP1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `BOP0` writer - Port x set bit y (y= 0..15)"] pub struct BOP0_W<'a> { w: &'a mut W, } impl<'a> BOP0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 31 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr15(&mut self) -> CR15_W { CR15_W { w: self } } #[doc = "Bit 30 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr14(&mut self) -> CR14_W { CR14_W { w: self } } #[doc = "Bit 29 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr13(&mut self) -> CR13_W { CR13_W { w: self } } #[doc = "Bit 28 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr12(&mut self) -> CR12_W { CR12_W { w: self } } #[doc = "Bit 27 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr11(&mut self) -> CR11_W { CR11_W { w: self } } #[doc = "Bit 26 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr10(&mut self) -> CR10_W { CR10_W { w: self } } #[doc = "Bit 25 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr9(&mut self) -> CR9_W { CR9_W { w: self } } #[doc = "Bit 24 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr8(&mut self) -> CR8_W { CR8_W { w: self } } #[doc = "Bit 23 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr7(&mut self) -> CR7_W { CR7_W { w: self } } #[doc = "Bit 22 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr6(&mut self) -> CR6_W { CR6_W { w: self } } #[doc = "Bit 21 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr5(&mut self) -> CR5_W { CR5_W { w: self } } #[doc = "Bit 20 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr4(&mut self) -> CR4_W { CR4_W { w: self } } #[doc = "Bit 19 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr3(&mut self) -> CR3_W { CR3_W { w: self } } #[doc = "Bit 18 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr2(&mut self) -> CR2_W { CR2_W { w: self } } #[doc = "Bit 17 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr1(&mut self) -> CR1_W { CR1_W { w: self } } #[doc = "Bit 16 - Port x reset bit y (y= 0..15)"] #[inline(always)] pub fn cr0(&mut self) -> CR0_W { CR0_W { w: self } } #[doc = "Bit 15 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop15(&mut self) -> BOP15_W { BOP15_W { w: self } } #[doc = "Bit 14 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop14(&mut self) -> BOP14_W { BOP14_W { w: self } } #[doc = "Bit 13 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop13(&mut self) -> BOP13_W { BOP13_W { w: self } } #[doc = "Bit 12 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop12(&mut self) -> BOP12_W { BOP12_W { w: self } } #[doc = "Bit 11 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop11(&mut self) -> BOP11_W { BOP11_W { w: self } } #[doc = "Bit 10 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop10(&mut self) -> BOP10_W { BOP10_W { w: self } } #[doc = "Bit 9 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop9(&mut self) -> BOP9_W { BOP9_W { w: self } } #[doc = "Bit 8 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop8(&mut self) -> BOP8_W { BOP8_W { w: self } } #[doc = "Bit 7 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop7(&mut self) -> BOP7_W { BOP7_W { w: self } } #[doc = "Bit 6 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop6(&mut self) -> BOP6_W { BOP6_W { w: self } } #[doc = "Bit 5 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop5(&mut self) -> BOP5_W { BOP5_W { w: self } } #[doc = "Bit 4 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop4(&mut self) -> BOP4_W { BOP4_W { w: self } } #[doc = "Bit 3 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop3(&mut self) -> BOP3_W { BOP3_W { w: self } } #[doc = "Bit 2 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop2(&mut self) -> BOP2_W { BOP2_W { w: self } } #[doc = "Bit 1 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop1(&mut self) -> BOP1_W { BOP1_W { w: self } } #[doc = "Bit 0 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop0(&mut self) -> BOP0_W { BOP0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port bit set/reset register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bop](index.html) module"] pub struct BOP_SPEC; impl crate::RegisterSpec for BOP_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [bop::W](W) writer structure"] impl crate::Writable for BOP_SPEC { type Writer = W; } #[doc = "`reset()` method sets BOP to value 0"] impl crate::Resettable for BOP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BC register accessor: an alias for `Reg`"] pub type BC = crate::Reg; #[doc = "Port bit reset register"] pub mod bc { #[doc = "Register `BC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CR0` writer - Port cleat bit"] pub struct CR0_W<'a> { w: &'a mut W, } impl<'a> CR0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CR1` writer - Port cleat bit"] pub struct CR1_W<'a> { w: &'a mut W, } impl<'a> CR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CR2` writer - Port cleat bit"] pub struct CR2_W<'a> { w: &'a mut W, } impl<'a> CR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CR3` writer - Port cleat bit"] pub struct CR3_W<'a> { w: &'a mut W, } impl<'a> CR3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CR4` writer - Port cleat bit"] pub struct CR4_W<'a> { w: &'a mut W, } impl<'a> CR4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CR5` writer - Port cleat bit"] pub struct CR5_W<'a> { w: &'a mut W, } impl<'a> CR5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CR6` writer - Port cleat bit"] pub struct CR6_W<'a> { w: &'a mut W, } impl<'a> CR6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CR7` writer - Port cleat bit"] pub struct CR7_W<'a> { w: &'a mut W, } impl<'a> CR7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CR8` writer - Port cleat bit"] pub struct CR8_W<'a> { w: &'a mut W, } impl<'a> CR8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CR9` writer - Port cleat bit"] pub struct CR9_W<'a> { w: &'a mut W, } impl<'a> CR9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CR10` writer - Port cleat bit"] pub struct CR10_W<'a> { w: &'a mut W, } impl<'a> CR10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CR11` writer - Port cleat bit"] pub struct CR11_W<'a> { w: &'a mut W, } impl<'a> CR11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CR12` writer - Port cleat bit"] pub struct CR12_W<'a> { w: &'a mut W, } impl<'a> CR12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CR13` writer - Port cleat bit"] pub struct CR13_W<'a> { w: &'a mut W, } impl<'a> CR13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CR14` writer - Port cleat bit"] pub struct CR14_W<'a> { w: &'a mut W, } impl<'a> CR14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CR15` writer - Port cleat bit"] pub struct CR15_W<'a> { w: &'a mut W, } impl<'a> CR15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - Port cleat bit"] #[inline(always)] pub fn cr0(&mut self) -> CR0_W { CR0_W { w: self } } #[doc = "Bit 1 - Port cleat bit"] #[inline(always)] pub fn cr1(&mut self) -> CR1_W { CR1_W { w: self } } #[doc = "Bit 2 - Port cleat bit"] #[inline(always)] pub fn cr2(&mut self) -> CR2_W { CR2_W { w: self } } #[doc = "Bit 3 - Port cleat bit"] #[inline(always)] pub fn cr3(&mut self) -> CR3_W { CR3_W { w: self } } #[doc = "Bit 4 - Port cleat bit"] #[inline(always)] pub fn cr4(&mut self) -> CR4_W { CR4_W { w: self } } #[doc = "Bit 5 - Port cleat bit"] #[inline(always)] pub fn cr5(&mut self) -> CR5_W { CR5_W { w: self } } #[doc = "Bit 6 - Port cleat bit"] #[inline(always)] pub fn cr6(&mut self) -> CR6_W { CR6_W { w: self } } #[doc = "Bit 7 - Port cleat bit"] #[inline(always)] pub fn cr7(&mut self) -> CR7_W { CR7_W { w: self } } #[doc = "Bit 8 - Port cleat bit"] #[inline(always)] pub fn cr8(&mut self) -> CR8_W { CR8_W { w: self } } #[doc = "Bit 9 - Port cleat bit"] #[inline(always)] pub fn cr9(&mut self) -> CR9_W { CR9_W { w: self } } #[doc = "Bit 10 - Port cleat bit"] #[inline(always)] pub fn cr10(&mut self) -> CR10_W { CR10_W { w: self } } #[doc = "Bit 11 - Port cleat bit"] #[inline(always)] pub fn cr11(&mut self) -> CR11_W { CR11_W { w: self } } #[doc = "Bit 12 - Port cleat bit"] #[inline(always)] pub fn cr12(&mut self) -> CR12_W { CR12_W { w: self } } #[doc = "Bit 13 - Port cleat bit"] #[inline(always)] pub fn cr13(&mut self) -> CR13_W { CR13_W { w: self } } #[doc = "Bit 14 - Port cleat bit"] #[inline(always)] pub fn cr14(&mut self) -> CR14_W { CR14_W { w: self } } #[doc = "Bit 15 - Port cleat bit"] #[inline(always)] pub fn cr15(&mut self) -> CR15_W { CR15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port bit reset register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bc](index.html) module"] pub struct BC_SPEC; impl crate::RegisterSpec for BC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [bc::W](W) writer structure"] impl crate::Writable for BC_SPEC { type Writer = W; } #[doc = "`reset()` method sets BC to value 0"] impl crate::Resettable for BC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "TG register accessor: an alias for `Reg`"] pub type TG = crate::Reg; #[doc = "Port bit toggle register"] pub mod tg { #[doc = "Register `TG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TG0` writer - Port toggle bit"] pub struct TG0_W<'a> { w: &'a mut W, } impl<'a> TG0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `TG1` writer - Port toggle bit"] pub struct TG1_W<'a> { w: &'a mut W, } impl<'a> TG1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TG2` writer - Port toggle bit"] pub struct TG2_W<'a> { w: &'a mut W, } impl<'a> TG2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `TG3` writer - Port toggle bit"] pub struct TG3_W<'a> { w: &'a mut W, } impl<'a> TG3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `TG4` writer - Port toggle bit"] pub struct TG4_W<'a> { w: &'a mut W, } impl<'a> TG4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TG5` writer - Port toggle bit"] pub struct TG5_W<'a> { w: &'a mut W, } impl<'a> TG5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `TG6` writer - Port toggle bit"] pub struct TG6_W<'a> { w: &'a mut W, } impl<'a> TG6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `TG7` writer - Port toggle bit"] pub struct TG7_W<'a> { w: &'a mut W, } impl<'a> TG7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TG8` writer - Port toggle bit"] pub struct TG8_W<'a> { w: &'a mut W, } impl<'a> TG8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TG9` writer - Port toggle bit"] pub struct TG9_W<'a> { w: &'a mut W, } impl<'a> TG9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `TG10` writer - Port toggle bit"] pub struct TG10_W<'a> { w: &'a mut W, } impl<'a> TG10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `TG11` writer - Port toggle bit"] pub struct TG11_W<'a> { w: &'a mut W, } impl<'a> TG11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TG12` writer - Port toggle bit"] pub struct TG12_W<'a> { w: &'a mut W, } impl<'a> TG12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TG13` writer - Port toggle bit"] pub struct TG13_W<'a> { w: &'a mut W, } impl<'a> TG13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `TG14` writer - Port toggle bit"] pub struct TG14_W<'a> { w: &'a mut W, } impl<'a> TG14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `TG15` writer - Port toggle bit"] pub struct TG15_W<'a> { w: &'a mut W, } impl<'a> TG15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - Port toggle bit"] #[inline(always)] pub fn tg0(&mut self) -> TG0_W { TG0_W { w: self } } #[doc = "Bit 1 - Port toggle bit"] #[inline(always)] pub fn tg1(&mut self) -> TG1_W { TG1_W { w: self } } #[doc = "Bit 2 - Port toggle bit"] #[inline(always)] pub fn tg2(&mut self) -> TG2_W { TG2_W { w: self } } #[doc = "Bit 3 - Port toggle bit"] #[inline(always)] pub fn tg3(&mut self) -> TG3_W { TG3_W { w: self } } #[doc = "Bit 4 - Port toggle bit"] #[inline(always)] pub fn tg4(&mut self) -> TG4_W { TG4_W { w: self } } #[doc = "Bit 5 - Port toggle bit"] #[inline(always)] pub fn tg5(&mut self) -> TG5_W { TG5_W { w: self } } #[doc = "Bit 6 - Port toggle bit"] #[inline(always)] pub fn tg6(&mut self) -> TG6_W { TG6_W { w: self } } #[doc = "Bit 7 - Port toggle bit"] #[inline(always)] pub fn tg7(&mut self) -> TG7_W { TG7_W { w: self } } #[doc = "Bit 8 - Port toggle bit"] #[inline(always)] pub fn tg8(&mut self) -> TG8_W { TG8_W { w: self } } #[doc = "Bit 9 - Port toggle bit"] #[inline(always)] pub fn tg9(&mut self) -> TG9_W { TG9_W { w: self } } #[doc = "Bit 10 - Port toggle bit"] #[inline(always)] pub fn tg10(&mut self) -> TG10_W { TG10_W { w: self } } #[doc = "Bit 11 - Port toggle bit"] #[inline(always)] pub fn tg11(&mut self) -> TG11_W { TG11_W { w: self } } #[doc = "Bit 12 - Port toggle bit"] #[inline(always)] pub fn tg12(&mut self) -> TG12_W { TG12_W { w: self } } #[doc = "Bit 13 - Port toggle bit"] #[inline(always)] pub fn tg13(&mut self) -> TG13_W { TG13_W { w: self } } #[doc = "Bit 14 - Port toggle bit"] #[inline(always)] pub fn tg14(&mut self) -> TG14_W { TG14_W { w: self } } #[doc = "Bit 15 - Port toggle bit"] #[inline(always)] pub fn tg15(&mut self) -> TG15_W { TG15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port bit toggle register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tg](index.html) module"] pub struct TG_SPEC; impl crate::RegisterSpec for TG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [tg::W](W) writer structure"] impl crate::Writable for TG_SPEC { type Writer = W; } #[doc = "`reset()` method sets TG to value 0"] impl crate::Resettable for TG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OSPD1 register accessor: an alias for `Reg`"] pub type OSPD1 = crate::Reg; #[doc = "Port output speed register 1"] pub mod ospd1 { #[doc = "Register `OSPD1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OSPD1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SPD0` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD0_R(crate::FieldReader); impl SPD0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD0` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD0_W<'a> { w: &'a mut W, } impl<'a> SPD0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `SPD1` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD1_R(crate::FieldReader); impl SPD1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD1` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD1_W<'a> { w: &'a mut W, } impl<'a> SPD1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `SPD2` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD2_R(crate::FieldReader); impl SPD2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD2` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD2_W<'a> { w: &'a mut W, } impl<'a> SPD2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `SPD3` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD3_R(crate::FieldReader); impl SPD3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD3` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD3_W<'a> { w: &'a mut W, } impl<'a> SPD3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `SPD4` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD4_R(crate::FieldReader); impl SPD4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD4` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD4_W<'a> { w: &'a mut W, } impl<'a> SPD4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `SPD5` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD5_R(crate::FieldReader); impl SPD5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD5` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD5_W<'a> { w: &'a mut W, } impl<'a> SPD5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `SPD6` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD6_R(crate::FieldReader); impl SPD6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD6` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD6_W<'a> { w: &'a mut W, } impl<'a> SPD6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `SPD7` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD7_R(crate::FieldReader); impl SPD7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD7` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD7_W<'a> { w: &'a mut W, } impl<'a> SPD7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SPD8` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD8_R(crate::FieldReader); impl SPD8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD8` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD8_W<'a> { w: &'a mut W, } impl<'a> SPD8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `SPD9` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD9_R(crate::FieldReader); impl SPD9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD9` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD9_W<'a> { w: &'a mut W, } impl<'a> SPD9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `SPD10` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD10_R(crate::FieldReader); impl SPD10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD10` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD10_W<'a> { w: &'a mut W, } impl<'a> SPD10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `SPD11` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD11_R(crate::FieldReader); impl SPD11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD11` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD11_W<'a> { w: &'a mut W, } impl<'a> SPD11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `SPD12` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD12_R(crate::FieldReader); impl SPD12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD12` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD12_W<'a> { w: &'a mut W, } impl<'a> SPD12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `SPD13` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD13_R(crate::FieldReader); impl SPD13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD13` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD13_W<'a> { w: &'a mut W, } impl<'a> SPD13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `SPD14` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD14_R(crate::FieldReader); impl SPD14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD14` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD14_W<'a> { w: &'a mut W, } impl<'a> SPD14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `SPD15` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD15_R(crate::FieldReader); impl SPD15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD15` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD15_W<'a> { w: &'a mut W, } impl<'a> SPD15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl R { #[doc = "Bit 0 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd0(&self) -> SPD0_R { SPD0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd1(&self) -> SPD1_R { SPD1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd2(&self) -> SPD2_R { SPD2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd3(&self) -> SPD3_R { SPD3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd4(&self) -> SPD4_R { SPD4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd5(&self) -> SPD5_R { SPD5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd6(&self) -> SPD6_R { SPD6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd7(&self) -> SPD7_R { SPD7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd8(&self) -> SPD8_R { SPD8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd9(&self) -> SPD9_R { SPD9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd10(&self) -> SPD10_R { SPD10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd11(&self) -> SPD11_R { SPD11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd12(&self) -> SPD12_R { SPD12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd13(&self) -> SPD13_R { SPD13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd14(&self) -> SPD14_R { SPD14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd15(&self) -> SPD15_R { SPD15_R::new(((self.bits >> 15) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd0(&mut self) -> SPD0_W { SPD0_W { w: self } } #[doc = "Bit 1 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd1(&mut self) -> SPD1_W { SPD1_W { w: self } } #[doc = "Bit 2 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd2(&mut self) -> SPD2_W { SPD2_W { w: self } } #[doc = "Bit 3 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd3(&mut self) -> SPD3_W { SPD3_W { w: self } } #[doc = "Bit 4 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd4(&mut self) -> SPD4_W { SPD4_W { w: self } } #[doc = "Bit 5 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd5(&mut self) -> SPD5_W { SPD5_W { w: self } } #[doc = "Bit 6 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd6(&mut self) -> SPD6_W { SPD6_W { w: self } } #[doc = "Bit 7 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd7(&mut self) -> SPD7_W { SPD7_W { w: self } } #[doc = "Bit 8 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd8(&mut self) -> SPD8_W { SPD8_W { w: self } } #[doc = "Bit 9 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd9(&mut self) -> SPD9_W { SPD9_W { w: self } } #[doc = "Bit 10 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd10(&mut self) -> SPD10_W { SPD10_W { w: self } } #[doc = "Bit 11 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd11(&mut self) -> SPD11_W { SPD11_W { w: self } } #[doc = "Bit 12 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd12(&mut self) -> SPD12_W { SPD12_W { w: self } } #[doc = "Bit 13 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd13(&mut self) -> SPD13_W { SPD13_W { w: self } } #[doc = "Bit 14 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd14(&mut self) -> SPD14_W { SPD14_W { w: self } } #[doc = "Bit 15 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd15(&mut self) -> SPD15_W { SPD15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port output speed register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd1](index.html) module"] pub struct OSPD1_SPEC; impl crate::RegisterSpec for OSPD1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ospd1::R](R) reader structure"] impl crate::Readable for OSPD1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ospd1::W](W) writer structure"] impl crate::Writable for OSPD1_SPEC { type Writer = W; } #[doc = "`reset()` method sets OSPD1 to value 0"] impl crate::Resettable for OSPD1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose I/Os"] pub struct GPIOF { _marker: PhantomData<*const ()>, } unsafe impl Send for GPIOF {} impl GPIOF { #[doc = r"Pointer to the register block"] pub const PTR: *const gpiof::RegisterBlock = 0x4800_1400 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const gpiof::RegisterBlock { Self::PTR } } impl Deref for GPIOF { type Target = gpiof::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for GPIOF { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("GPIOF").finish() } } #[doc = "General-purpose I/Os"] pub mod gpiof { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - GPIOF port control register"] pub ctl: crate::Reg, #[doc = "0x04 - GPIO port output type register"] pub omode: crate::Reg, #[doc = "0x08 - GPIO port output speed register 0"] pub ospd0: crate::Reg, #[doc = "0x0c - GPIO port pull-up/pull-down register"] pub pud: crate::Reg, #[doc = "0x10 - GPIO port input data register"] pub istat: crate::Reg, #[doc = "0x14 - GPIO port output data register"] pub octl: crate::Reg, #[doc = "0x18 - GPIO port bit set/reset register"] pub bop: crate::Reg, _reserved7: [u8; 0x0c], #[doc = "0x28 - Port bit reset register"] pub bc: crate::Reg, #[doc = "0x2c - Port bit toggle register"] pub tg: crate::Reg, _reserved9: [u8; 0x0c], #[doc = "0x3c - Port output speed register 1"] pub ospd1: crate::Reg, } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "GPIOF port control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CTL15` reader - Port x configuration bits (y = 0..15)"] pub struct CTL15_R(crate::FieldReader); impl CTL15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL15` writer - Port x configuration bits (y = 0..15)"] pub struct CTL15_W<'a> { w: &'a mut W, } impl<'a> CTL15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `CTL14` reader - Port x configuration bits (y = 0..15)"] pub struct CTL14_R(crate::FieldReader); impl CTL14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL14` writer - Port x configuration bits (y = 0..15)"] pub struct CTL14_W<'a> { w: &'a mut W, } impl<'a> CTL14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `CTL13` reader - Port x configuration bits (y = 0..15)"] pub struct CTL13_R(crate::FieldReader); impl CTL13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL13` writer - Port x configuration bits (y = 0..15)"] pub struct CTL13_W<'a> { w: &'a mut W, } impl<'a> CTL13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `CTL12` reader - Port x configuration bits (y = 0..15)"] pub struct CTL12_R(crate::FieldReader); impl CTL12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL12` writer - Port x configuration bits (y = 0..15)"] pub struct CTL12_W<'a> { w: &'a mut W, } impl<'a> CTL12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `CTL11` reader - Port x configuration bits (y = 0..15)"] pub struct CTL11_R(crate::FieldReader); impl CTL11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL11` writer - Port x configuration bits (y = 0..15)"] pub struct CTL11_W<'a> { w: &'a mut W, } impl<'a> CTL11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `CTL10` reader - Port x configuration bits (y = 0..15)"] pub struct CTL10_R(crate::FieldReader); impl CTL10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL10` writer - Port x configuration bits (y = 0..15)"] pub struct CTL10_W<'a> { w: &'a mut W, } impl<'a> CTL10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `CTL9` reader - Port x configuration bits (y = 0..15)"] pub struct CTL9_R(crate::FieldReader); impl CTL9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL9` writer - Port x configuration bits (y = 0..15)"] pub struct CTL9_W<'a> { w: &'a mut W, } impl<'a> CTL9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `CTL8` reader - Port x configuration bits (y = 0..15)"] pub struct CTL8_R(crate::FieldReader); impl CTL8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL8` writer - Port x configuration bits (y = 0..15)"] pub struct CTL8_W<'a> { w: &'a mut W, } impl<'a> CTL8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `CTL7` reader - Port x configuration bits (y = 0..15)"] pub struct CTL7_R(crate::FieldReader); impl CTL7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL7` writer - Port x configuration bits (y = 0..15)"] pub struct CTL7_W<'a> { w: &'a mut W, } impl<'a> CTL7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `CTL6` reader - Port x configuration bits (y = 0..15)"] pub struct CTL6_R(crate::FieldReader); impl CTL6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL6` writer - Port x configuration bits (y = 0..15)"] pub struct CTL6_W<'a> { w: &'a mut W, } impl<'a> CTL6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `CTL5` reader - Port x configuration bits (y = 0..15)"] pub struct CTL5_R(crate::FieldReader); impl CTL5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL5` writer - Port x configuration bits (y = 0..15)"] pub struct CTL5_W<'a> { w: &'a mut W, } impl<'a> CTL5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `CTL4` reader - Port x configuration bits (y = 0..15)"] pub struct CTL4_R(crate::FieldReader); impl CTL4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL4` writer - Port x configuration bits (y = 0..15)"] pub struct CTL4_W<'a> { w: &'a mut W, } impl<'a> CTL4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CTL3` reader - Port x configuration bits (y = 0..15)"] pub struct CTL3_R(crate::FieldReader); impl CTL3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL3` writer - Port x configuration bits (y = 0..15)"] pub struct CTL3_W<'a> { w: &'a mut W, } impl<'a> CTL3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `CTL2` reader - Port x configuration bits (y = 0..15)"] pub struct CTL2_R(crate::FieldReader); impl CTL2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL2` writer - Port x configuration bits (y = 0..15)"] pub struct CTL2_W<'a> { w: &'a mut W, } impl<'a> CTL2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `CTL1` reader - Port x configuration bits (y = 0..15)"] pub struct CTL1_R(crate::FieldReader); impl CTL1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL1` writer - Port x configuration bits (y = 0..15)"] pub struct CTL1_W<'a> { w: &'a mut W, } impl<'a> CTL1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CTL0` reader - Port x configuration bits (y = 0..15)"] pub struct CTL0_R(crate::FieldReader); impl CTL0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTL0` writer - Port x configuration bits (y = 0..15)"] pub struct CTL0_W<'a> { w: &'a mut W, } impl<'a> CTL0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl15(&self) -> CTL15_R { CTL15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl14(&self) -> CTL14_R { CTL14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl13(&self) -> CTL13_R { CTL13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl12(&self) -> CTL12_R { CTL12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl11(&self) -> CTL11_R { CTL11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl10(&self) -> CTL10_R { CTL10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl9(&self) -> CTL9_R { CTL9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl8(&self) -> CTL8_R { CTL8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl7(&self) -> CTL7_R { CTL7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl6(&self) -> CTL6_R { CTL6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl5(&self) -> CTL5_R { CTL5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl4(&self) -> CTL4_R { CTL4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl3(&self) -> CTL3_R { CTL3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl2(&self) -> CTL2_R { CTL2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl1(&self) -> CTL1_R { CTL1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl0(&self) -> CTL0_R { CTL0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl15(&mut self) -> CTL15_W { CTL15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl14(&mut self) -> CTL14_W { CTL14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl13(&mut self) -> CTL13_W { CTL13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl12(&mut self) -> CTL12_W { CTL12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl11(&mut self) -> CTL11_W { CTL11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl10(&mut self) -> CTL10_W { CTL10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl9(&mut self) -> CTL9_W { CTL9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl8(&mut self) -> CTL8_W { CTL8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl7(&mut self) -> CTL7_W { CTL7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl6(&mut self) -> CTL6_W { CTL6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl5(&mut self) -> CTL5_W { CTL5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl4(&mut self) -> CTL4_W { CTL4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl3(&mut self) -> CTL3_W { CTL3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl2(&mut self) -> CTL2_W { CTL2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl1(&mut self) -> CTL1_W { CTL1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ctl0(&mut self) -> CTL0_W { CTL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIOF port control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OMODE register accessor: an alias for `Reg`"] pub type OMODE = crate::Reg; #[doc = "GPIO port output type register"] pub mod omode { #[doc = "Register `OMODE` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OMODE` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OM15` reader - Port x configuration bit 15"] pub struct OM15_R(crate::FieldReader); impl OM15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM15` writer - Port x configuration bit 15"] pub struct OM15_W<'a> { w: &'a mut W, } impl<'a> OM15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OM14` reader - Port x configuration bit 14"] pub struct OM14_R(crate::FieldReader); impl OM14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM14` writer - Port x configuration bit 14"] pub struct OM14_W<'a> { w: &'a mut W, } impl<'a> OM14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `OM13` reader - Port x configuration bit 13"] pub struct OM13_R(crate::FieldReader); impl OM13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM13` writer - Port x configuration bit 13"] pub struct OM13_W<'a> { w: &'a mut W, } impl<'a> OM13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OM12` reader - Port x configuration bit 12"] pub struct OM12_R(crate::FieldReader); impl OM12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM12` writer - Port x configuration bit 12"] pub struct OM12_W<'a> { w: &'a mut W, } impl<'a> OM12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OM11` reader - Port x configuration bit 11"] pub struct OM11_R(crate::FieldReader); impl OM11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM11` writer - Port x configuration bit 11"] pub struct OM11_W<'a> { w: &'a mut W, } impl<'a> OM11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `OM10` reader - Port x configuration bit 10"] pub struct OM10_R(crate::FieldReader); impl OM10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM10` writer - Port x configuration bit 10"] pub struct OM10_W<'a> { w: &'a mut W, } impl<'a> OM10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OM9` reader - Port x configuration bit 9"] pub struct OM9_R(crate::FieldReader); impl OM9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM9` writer - Port x configuration bit 9"] pub struct OM9_W<'a> { w: &'a mut W, } impl<'a> OM9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OM8` reader - Port x configuration bit 8"] pub struct OM8_R(crate::FieldReader); impl OM8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM8` writer - Port x configuration bit 8"] pub struct OM8_W<'a> { w: &'a mut W, } impl<'a> OM8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OM7` reader - Port x configuration bit 7"] pub struct OM7_R(crate::FieldReader); impl OM7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM7` writer - Port x configuration bit 7"] pub struct OM7_W<'a> { w: &'a mut W, } impl<'a> OM7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `OM6` reader - Port x configuration bit 6"] pub struct OM6_R(crate::FieldReader); impl OM6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM6` writer - Port x configuration bit 6"] pub struct OM6_W<'a> { w: &'a mut W, } impl<'a> OM6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OM5` reader - Port x configuration bit 5"] pub struct OM5_R(crate::FieldReader); impl OM5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM5` writer - Port x configuration bit 5"] pub struct OM5_W<'a> { w: &'a mut W, } impl<'a> OM5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OM4` reader - Port x configuration bit 4"] pub struct OM4_R(crate::FieldReader); impl OM4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM4` writer - Port x configuration bit 4"] pub struct OM4_W<'a> { w: &'a mut W, } impl<'a> OM4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OM3` reader - Port x configuration bit 3"] pub struct OM3_R(crate::FieldReader); impl OM3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM3` writer - Port x configuration bit 3"] pub struct OM3_W<'a> { w: &'a mut W, } impl<'a> OM3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `OM2` reader - Port x configuration bit 2"] pub struct OM2_R(crate::FieldReader); impl OM2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM2` writer - Port x configuration bit 2"] pub struct OM2_W<'a> { w: &'a mut W, } impl<'a> OM2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `OM1` reader - Port x configuration bit 1"] pub struct OM1_R(crate::FieldReader); impl OM1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM1` writer - Port x configuration bit 1"] pub struct OM1_W<'a> { w: &'a mut W, } impl<'a> OM1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OM0` reader - Port x configuration bit 0"] pub struct OM0_R(crate::FieldReader); impl OM0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OM0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OM0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OM0` writer - Port x configuration bit 0"] pub struct OM0_W<'a> { w: &'a mut W, } impl<'a> OM0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Port x configuration bit 15"] #[inline(always)] pub fn om15(&self) -> OM15_R { OM15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port x configuration bit 14"] #[inline(always)] pub fn om14(&self) -> OM14_R { OM14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port x configuration bit 13"] #[inline(always)] pub fn om13(&self) -> OM13_R { OM13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port x configuration bit 12"] #[inline(always)] pub fn om12(&self) -> OM12_R { OM12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port x configuration bit 11"] #[inline(always)] pub fn om11(&self) -> OM11_R { OM11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port x configuration bit 10"] #[inline(always)] pub fn om10(&self) -> OM10_R { OM10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port x configuration bit 9"] #[inline(always)] pub fn om9(&self) -> OM9_R { OM9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port x configuration bit 8"] #[inline(always)] pub fn om8(&self) -> OM8_R { OM8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port x configuration bit 7"] #[inline(always)] pub fn om7(&self) -> OM7_R { OM7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port x configuration bit 6"] #[inline(always)] pub fn om6(&self) -> OM6_R { OM6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port x configuration bit 5"] #[inline(always)] pub fn om5(&self) -> OM5_R { OM5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port x configuration bit 4"] #[inline(always)] pub fn om4(&self) -> OM4_R { OM4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port x configuration bit 3"] #[inline(always)] pub fn om3(&self) -> OM3_R { OM3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port x configuration bit 2"] #[inline(always)] pub fn om2(&self) -> OM2_R { OM2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port x configuration bit 1"] #[inline(always)] pub fn om1(&self) -> OM1_R { OM1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port x configuration bit 0"] #[inline(always)] pub fn om0(&self) -> OM0_R { OM0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Port x configuration bit 15"] #[inline(always)] pub fn om15(&mut self) -> OM15_W { OM15_W { w: self } } #[doc = "Bit 14 - Port x configuration bit 14"] #[inline(always)] pub fn om14(&mut self) -> OM14_W { OM14_W { w: self } } #[doc = "Bit 13 - Port x configuration bit 13"] #[inline(always)] pub fn om13(&mut self) -> OM13_W { OM13_W { w: self } } #[doc = "Bit 12 - Port x configuration bit 12"] #[inline(always)] pub fn om12(&mut self) -> OM12_W { OM12_W { w: self } } #[doc = "Bit 11 - Port x configuration bit 11"] #[inline(always)] pub fn om11(&mut self) -> OM11_W { OM11_W { w: self } } #[doc = "Bit 10 - Port x configuration bit 10"] #[inline(always)] pub fn om10(&mut self) -> OM10_W { OM10_W { w: self } } #[doc = "Bit 9 - Port x configuration bit 9"] #[inline(always)] pub fn om9(&mut self) -> OM9_W { OM9_W { w: self } } #[doc = "Bit 8 - Port x configuration bit 8"] #[inline(always)] pub fn om8(&mut self) -> OM8_W { OM8_W { w: self } } #[doc = "Bit 7 - Port x configuration bit 7"] #[inline(always)] pub fn om7(&mut self) -> OM7_W { OM7_W { w: self } } #[doc = "Bit 6 - Port x configuration bit 6"] #[inline(always)] pub fn om6(&mut self) -> OM6_W { OM6_W { w: self } } #[doc = "Bit 5 - Port x configuration bit 5"] #[inline(always)] pub fn om5(&mut self) -> OM5_W { OM5_W { w: self } } #[doc = "Bit 4 - Port x configuration bit 4"] #[inline(always)] pub fn om4(&mut self) -> OM4_W { OM4_W { w: self } } #[doc = "Bit 3 - Port x configuration bit 3"] #[inline(always)] pub fn om3(&mut self) -> OM3_W { OM3_W { w: self } } #[doc = "Bit 2 - Port x configuration bit 2"] #[inline(always)] pub fn om2(&mut self) -> OM2_W { OM2_W { w: self } } #[doc = "Bit 1 - Port x configuration bit 1"] #[inline(always)] pub fn om1(&mut self) -> OM1_W { OM1_W { w: self } } #[doc = "Bit 0 - Port x configuration bit 0"] #[inline(always)] pub fn om0(&mut self) -> OM0_W { OM0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output type register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [omode](index.html) module"] pub struct OMODE_SPEC; impl crate::RegisterSpec for OMODE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [omode::R](R) reader structure"] impl crate::Readable for OMODE_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [omode::W](W) writer structure"] impl crate::Writable for OMODE_SPEC { type Writer = W; } #[doc = "`reset()` method sets OMODE to value 0"] impl crate::Resettable for OMODE_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OSPD0 register accessor: an alias for `Reg`"] pub type OSPD0 = crate::Reg; #[doc = "GPIO port output speed register 0"] pub mod ospd0 { #[doc = "Register `OSPD0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OSPD0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OSPD15` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD15_R(crate::FieldReader); impl OSPD15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD15` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD15_W<'a> { w: &'a mut W, } impl<'a> OSPD15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `OSPD14` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD14_R(crate::FieldReader); impl OSPD14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD14` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD14_W<'a> { w: &'a mut W, } impl<'a> OSPD14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `OSPD13` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD13_R(crate::FieldReader); impl OSPD13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD13` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD13_W<'a> { w: &'a mut W, } impl<'a> OSPD13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `OSPD12` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD12_R(crate::FieldReader); impl OSPD12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD12` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD12_W<'a> { w: &'a mut W, } impl<'a> OSPD12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `OSPD11` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD11_R(crate::FieldReader); impl OSPD11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD11` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD11_W<'a> { w: &'a mut W, } impl<'a> OSPD11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `OSPD10` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD10_R(crate::FieldReader); impl OSPD10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD10` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD10_W<'a> { w: &'a mut W, } impl<'a> OSPD10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `OSPD9` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD9_R(crate::FieldReader); impl OSPD9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD9` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD9_W<'a> { w: &'a mut W, } impl<'a> OSPD9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `OSPD8` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD8_R(crate::FieldReader); impl OSPD8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD8` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD8_W<'a> { w: &'a mut W, } impl<'a> OSPD8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `OSPD7` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD7_R(crate::FieldReader); impl OSPD7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD7` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD7_W<'a> { w: &'a mut W, } impl<'a> OSPD7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `OSPD6` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD6_R(crate::FieldReader); impl OSPD6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD6` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD6_W<'a> { w: &'a mut W, } impl<'a> OSPD6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `OSPD5` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD5_R(crate::FieldReader); impl OSPD5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD5` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD5_W<'a> { w: &'a mut W, } impl<'a> OSPD5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `OSPD4` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD4_R(crate::FieldReader); impl OSPD4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD4` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD4_W<'a> { w: &'a mut W, } impl<'a> OSPD4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `OSPD3` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD3_R(crate::FieldReader); impl OSPD3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD3` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD3_W<'a> { w: &'a mut W, } impl<'a> OSPD3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `OSPD2` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD2_R(crate::FieldReader); impl OSPD2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD2` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD2_W<'a> { w: &'a mut W, } impl<'a> OSPD2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `OSPD1` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD1_R(crate::FieldReader); impl OSPD1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD1` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD1_W<'a> { w: &'a mut W, } impl<'a> OSPD1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `OSPD0` reader - Port x configuration bits (y = 0..15)"] pub struct OSPD0_R(crate::FieldReader); impl OSPD0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OSPD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSPD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSPD0` writer - Port x configuration bits (y = 0..15)"] pub struct OSPD0_W<'a> { w: &'a mut W, } impl<'a> OSPD0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd15(&self) -> OSPD15_R { OSPD15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd14(&self) -> OSPD14_R { OSPD14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd13(&self) -> OSPD13_R { OSPD13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd12(&self) -> OSPD12_R { OSPD12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd11(&self) -> OSPD11_R { OSPD11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd10(&self) -> OSPD10_R { OSPD10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd9(&self) -> OSPD9_R { OSPD9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd8(&self) -> OSPD8_R { OSPD8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd7(&self) -> OSPD7_R { OSPD7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd6(&self) -> OSPD6_R { OSPD6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd5(&self) -> OSPD5_R { OSPD5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd4(&self) -> OSPD4_R { OSPD4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd3(&self) -> OSPD3_R { OSPD3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd2(&self) -> OSPD2_R { OSPD2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd1(&self) -> OSPD1_R { OSPD1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd0(&self) -> OSPD0_R { OSPD0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd15(&mut self) -> OSPD15_W { OSPD15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd14(&mut self) -> OSPD14_W { OSPD14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd13(&mut self) -> OSPD13_W { OSPD13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd12(&mut self) -> OSPD12_W { OSPD12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd11(&mut self) -> OSPD11_W { OSPD11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd10(&mut self) -> OSPD10_W { OSPD10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd9(&mut self) -> OSPD9_W { OSPD9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd8(&mut self) -> OSPD8_W { OSPD8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd7(&mut self) -> OSPD7_W { OSPD7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd6(&mut self) -> OSPD6_W { OSPD6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd5(&mut self) -> OSPD5_W { OSPD5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd4(&mut self) -> OSPD4_W { OSPD4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd3(&mut self) -> OSPD3_W { OSPD3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd2(&mut self) -> OSPD2_W { OSPD2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd1(&mut self) -> OSPD1_W { OSPD1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn ospd0(&mut self) -> OSPD0_W { OSPD0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output speed register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd0](index.html) module"] pub struct OSPD0_SPEC; impl crate::RegisterSpec for OSPD0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ospd0::R](R) reader structure"] impl crate::Readable for OSPD0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ospd0::W](W) writer structure"] impl crate::Writable for OSPD0_SPEC { type Writer = W; } #[doc = "`reset()` method sets OSPD0 to value 0"] impl crate::Resettable for OSPD0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PUD register accessor: an alias for `Reg`"] pub type PUD = crate::Reg; #[doc = "GPIO port pull-up/pull-down register"] pub mod pud { #[doc = "Register `PUD` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PUD` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PUD15` reader - Port x configuration bits (y = 0..15)"] pub struct PUD15_R(crate::FieldReader); impl PUD15_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD15` writer - Port x configuration bits (y = 0..15)"] pub struct PUD15_W<'a> { w: &'a mut W, } impl<'a> PUD15_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 30)) | ((value as u32 & 0x03) << 30); self.w } } #[doc = "Field `PUD14` reader - Port x configuration bits (y = 0..15)"] pub struct PUD14_R(crate::FieldReader); impl PUD14_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD14` writer - Port x configuration bits (y = 0..15)"] pub struct PUD14_W<'a> { w: &'a mut W, } impl<'a> PUD14_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `PUD13` reader - Port x configuration bits (y = 0..15)"] pub struct PUD13_R(crate::FieldReader); impl PUD13_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD13` writer - Port x configuration bits (y = 0..15)"] pub struct PUD13_W<'a> { w: &'a mut W, } impl<'a> PUD13_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 26)) | ((value as u32 & 0x03) << 26); self.w } } #[doc = "Field `PUD12` reader - Port x configuration bits (y = 0..15)"] pub struct PUD12_R(crate::FieldReader); impl PUD12_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD12` writer - Port x configuration bits (y = 0..15)"] pub struct PUD12_W<'a> { w: &'a mut W, } impl<'a> PUD12_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 24)) | ((value as u32 & 0x03) << 24); self.w } } #[doc = "Field `PUD11` reader - Port x configuration bits (y = 0..15)"] pub struct PUD11_R(crate::FieldReader); impl PUD11_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD11` writer - Port x configuration bits (y = 0..15)"] pub struct PUD11_W<'a> { w: &'a mut W, } impl<'a> PUD11_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `PUD10` reader - Port x configuration bits (y = 0..15)"] pub struct PUD10_R(crate::FieldReader); impl PUD10_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD10` writer - Port x configuration bits (y = 0..15)"] pub struct PUD10_W<'a> { w: &'a mut W, } impl<'a> PUD10_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `PUD9` reader - Port x configuration bits (y = 0..15)"] pub struct PUD9_R(crate::FieldReader); impl PUD9_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD9` writer - Port x configuration bits (y = 0..15)"] pub struct PUD9_W<'a> { w: &'a mut W, } impl<'a> PUD9_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `PUD8` reader - Port x configuration bits (y = 0..15)"] pub struct PUD8_R(crate::FieldReader); impl PUD8_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD8` writer - Port x configuration bits (y = 0..15)"] pub struct PUD8_W<'a> { w: &'a mut W, } impl<'a> PUD8_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 16)) | ((value as u32 & 0x03) << 16); self.w } } #[doc = "Field `PUD7` reader - Port x configuration bits (y = 0..15)"] pub struct PUD7_R(crate::FieldReader); impl PUD7_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD7` writer - Port x configuration bits (y = 0..15)"] pub struct PUD7_W<'a> { w: &'a mut W, } impl<'a> PUD7_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `PUD6` reader - Port x configuration bits (y = 0..15)"] pub struct PUD6_R(crate::FieldReader); impl PUD6_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD6` writer - Port x configuration bits (y = 0..15)"] pub struct PUD6_W<'a> { w: &'a mut W, } impl<'a> PUD6_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `PUD5` reader - Port x configuration bits (y = 0..15)"] pub struct PUD5_R(crate::FieldReader); impl PUD5_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD5` writer - Port x configuration bits (y = 0..15)"] pub struct PUD5_W<'a> { w: &'a mut W, } impl<'a> PUD5_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `PUD4` reader - Port x configuration bits (y = 0..15)"] pub struct PUD4_R(crate::FieldReader); impl PUD4_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD4` writer - Port x configuration bits (y = 0..15)"] pub struct PUD4_W<'a> { w: &'a mut W, } impl<'a> PUD4_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `PUD3` reader - Port x configuration bits (y = 0..15)"] pub struct PUD3_R(crate::FieldReader); impl PUD3_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD3` writer - Port x configuration bits (y = 0..15)"] pub struct PUD3_W<'a> { w: &'a mut W, } impl<'a> PUD3_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 6)) | ((value as u32 & 0x03) << 6); self.w } } #[doc = "Field `PUD2` reader - Port x configuration bits (y = 0..15)"] pub struct PUD2_R(crate::FieldReader); impl PUD2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD2` writer - Port x configuration bits (y = 0..15)"] pub struct PUD2_W<'a> { w: &'a mut W, } impl<'a> PUD2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `PUD1` reader - Port x configuration bits (y = 0..15)"] pub struct PUD1_R(crate::FieldReader); impl PUD1_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD1` writer - Port x configuration bits (y = 0..15)"] pub struct PUD1_W<'a> { w: &'a mut W, } impl<'a> PUD1_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `PUD0` reader - Port x configuration bits (y = 0..15)"] pub struct PUD0_R(crate::FieldReader); impl PUD0_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PUD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PUD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PUD0` writer - Port x configuration bits (y = 0..15)"] pub struct PUD0_W<'a> { w: &'a mut W, } impl<'a> PUD0_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud15(&self) -> PUD15_R { PUD15_R::new(((self.bits >> 30) & 0x03) as u8) } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud14(&self) -> PUD14_R { PUD14_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud13(&self) -> PUD13_R { PUD13_R::new(((self.bits >> 26) & 0x03) as u8) } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud12(&self) -> PUD12_R { PUD12_R::new(((self.bits >> 24) & 0x03) as u8) } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud11(&self) -> PUD11_R { PUD11_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud10(&self) -> PUD10_R { PUD10_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud9(&self) -> PUD9_R { PUD9_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud8(&self) -> PUD8_R { PUD8_R::new(((self.bits >> 16) & 0x03) as u8) } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud7(&self) -> PUD7_R { PUD7_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud6(&self) -> PUD6_R { PUD6_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud5(&self) -> PUD5_R { PUD5_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud4(&self) -> PUD4_R { PUD4_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud3(&self) -> PUD3_R { PUD3_R::new(((self.bits >> 6) & 0x03) as u8) } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud2(&self) -> PUD2_R { PUD2_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud1(&self) -> PUD1_R { PUD1_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud0(&self) -> PUD0_R { PUD0_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 30:31 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud15(&mut self) -> PUD15_W { PUD15_W { w: self } } #[doc = "Bits 28:29 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud14(&mut self) -> PUD14_W { PUD14_W { w: self } } #[doc = "Bits 26:27 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud13(&mut self) -> PUD13_W { PUD13_W { w: self } } #[doc = "Bits 24:25 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud12(&mut self) -> PUD12_W { PUD12_W { w: self } } #[doc = "Bits 22:23 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud11(&mut self) -> PUD11_W { PUD11_W { w: self } } #[doc = "Bits 20:21 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud10(&mut self) -> PUD10_W { PUD10_W { w: self } } #[doc = "Bits 18:19 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud9(&mut self) -> PUD9_W { PUD9_W { w: self } } #[doc = "Bits 16:17 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud8(&mut self) -> PUD8_W { PUD8_W { w: self } } #[doc = "Bits 14:15 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud7(&mut self) -> PUD7_W { PUD7_W { w: self } } #[doc = "Bits 12:13 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud6(&mut self) -> PUD6_W { PUD6_W { w: self } } #[doc = "Bits 10:11 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud5(&mut self) -> PUD5_W { PUD5_W { w: self } } #[doc = "Bits 8:9 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud4(&mut self) -> PUD4_W { PUD4_W { w: self } } #[doc = "Bits 6:7 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud3(&mut self) -> PUD3_W { PUD3_W { w: self } } #[doc = "Bits 4:5 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud2(&mut self) -> PUD2_W { PUD2_W { w: self } } #[doc = "Bits 2:3 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud1(&mut self) -> PUD1_W { PUD1_W { w: self } } #[doc = "Bits 0:1 - Port x configuration bits (y = 0..15)"] #[inline(always)] pub fn pud0(&mut self) -> PUD0_W { PUD0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port pull-up/pull-down register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pud](index.html) module"] pub struct PUD_SPEC; impl crate::RegisterSpec for PUD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [pud::R](R) reader structure"] impl crate::Readable for PUD_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [pud::W](W) writer structure"] impl crate::Writable for PUD_SPEC { type Writer = W; } #[doc = "`reset()` method sets PUD to value 0"] impl crate::Resettable for PUD_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "ISTAT register accessor: an alias for `Reg`"] pub type ISTAT = crate::Reg; #[doc = "GPIO port input data register"] pub mod istat { #[doc = "Register `ISTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `ISTAT15` reader - Port input data (y = 0..15)"] pub struct ISTAT15_R(crate::FieldReader); impl ISTAT15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT14` reader - Port input data (y = 0..15)"] pub struct ISTAT14_R(crate::FieldReader); impl ISTAT14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT13` reader - Port input data (y = 0..15)"] pub struct ISTAT13_R(crate::FieldReader); impl ISTAT13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT12` reader - Port input data (y = 0..15)"] pub struct ISTAT12_R(crate::FieldReader); impl ISTAT12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT11` reader - Port input data (y = 0..15)"] pub struct ISTAT11_R(crate::FieldReader); impl ISTAT11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT10` reader - Port input data (y = 0..15)"] pub struct ISTAT10_R(crate::FieldReader); impl ISTAT10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT9` reader - Port input data (y = 0..15)"] pub struct ISTAT9_R(crate::FieldReader); impl ISTAT9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT8` reader - Port input data (y = 0..15)"] pub struct ISTAT8_R(crate::FieldReader); impl ISTAT8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT7` reader - Port input data (y = 0..15)"] pub struct ISTAT7_R(crate::FieldReader); impl ISTAT7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT6` reader - Port input data (y = 0..15)"] pub struct ISTAT6_R(crate::FieldReader); impl ISTAT6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT5` reader - Port input data (y = 0..15)"] pub struct ISTAT5_R(crate::FieldReader); impl ISTAT5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT4` reader - Port input data (y = 0..15)"] pub struct ISTAT4_R(crate::FieldReader); impl ISTAT4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT3` reader - Port input data (y = 0..15)"] pub struct ISTAT3_R(crate::FieldReader); impl ISTAT3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT2` reader - Port input data (y = 0..15)"] pub struct ISTAT2_R(crate::FieldReader); impl ISTAT2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT1` reader - Port input data (y = 0..15)"] pub struct ISTAT1_R(crate::FieldReader); impl ISTAT1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISTAT0` reader - Port input data (y = 0..15)"] pub struct ISTAT0_R(crate::FieldReader); impl ISTAT0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISTAT0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISTAT0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 15 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat15(&self) -> ISTAT15_R { ISTAT15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat14(&self) -> ISTAT14_R { ISTAT14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat13(&self) -> ISTAT13_R { ISTAT13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat12(&self) -> ISTAT12_R { ISTAT12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat11(&self) -> ISTAT11_R { ISTAT11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat10(&self) -> ISTAT10_R { ISTAT10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat9(&self) -> ISTAT9_R { ISTAT9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat8(&self) -> ISTAT8_R { ISTAT8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat7(&self) -> ISTAT7_R { ISTAT7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat6(&self) -> ISTAT6_R { ISTAT6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat5(&self) -> ISTAT5_R { ISTAT5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat4(&self) -> ISTAT4_R { ISTAT4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat3(&self) -> ISTAT3_R { ISTAT3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat2(&self) -> ISTAT2_R { ISTAT2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat1(&self) -> ISTAT1_R { ISTAT1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port input data (y = 0..15)"] #[inline(always)] pub fn istat0(&self) -> ISTAT0_R { ISTAT0_R::new((self.bits & 0x01) != 0) } } #[doc = "GPIO port input data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [istat](index.html) module"] pub struct ISTAT_SPEC; impl crate::RegisterSpec for ISTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [istat::R](R) reader structure"] impl crate::Readable for ISTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets ISTAT to value 0"] impl crate::Resettable for ISTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OCTL register accessor: an alias for `Reg`"] pub type OCTL = crate::Reg; #[doc = "GPIO port output data register"] pub mod octl { #[doc = "Register `OCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OCTL15` reader - Port output data (y = 0..15)"] pub struct OCTL15_R(crate::FieldReader); impl OCTL15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL15` writer - Port output data (y = 0..15)"] pub struct OCTL15_W<'a> { w: &'a mut W, } impl<'a> OCTL15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OCTL14` reader - Port output data (y = 0..15)"] pub struct OCTL14_R(crate::FieldReader); impl OCTL14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL14` writer - Port output data (y = 0..15)"] pub struct OCTL14_W<'a> { w: &'a mut W, } impl<'a> OCTL14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `OCTL13` reader - Port output data (y = 0..15)"] pub struct OCTL13_R(crate::FieldReader); impl OCTL13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL13` writer - Port output data (y = 0..15)"] pub struct OCTL13_W<'a> { w: &'a mut W, } impl<'a> OCTL13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OCTL12` reader - Port output data (y = 0..15)"] pub struct OCTL12_R(crate::FieldReader); impl OCTL12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL12` writer - Port output data (y = 0..15)"] pub struct OCTL12_W<'a> { w: &'a mut W, } impl<'a> OCTL12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OCTL11` reader - Port output data (y = 0..15)"] pub struct OCTL11_R(crate::FieldReader); impl OCTL11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL11` writer - Port output data (y = 0..15)"] pub struct OCTL11_W<'a> { w: &'a mut W, } impl<'a> OCTL11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `OCTL10` reader - Port output data (y = 0..15)"] pub struct OCTL10_R(crate::FieldReader); impl OCTL10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL10` writer - Port output data (y = 0..15)"] pub struct OCTL10_W<'a> { w: &'a mut W, } impl<'a> OCTL10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `OCTL9` reader - Port output data (y = 0..15)"] pub struct OCTL9_R(crate::FieldReader); impl OCTL9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL9` writer - Port output data (y = 0..15)"] pub struct OCTL9_W<'a> { w: &'a mut W, } impl<'a> OCTL9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OCTL8` reader - Port output data (y = 0..15)"] pub struct OCTL8_R(crate::FieldReader); impl OCTL8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL8` writer - Port output data (y = 0..15)"] pub struct OCTL8_W<'a> { w: &'a mut W, } impl<'a> OCTL8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `OCTL7` reader - Port output data (y = 0..15)"] pub struct OCTL7_R(crate::FieldReader); impl OCTL7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL7` writer - Port output data (y = 0..15)"] pub struct OCTL7_W<'a> { w: &'a mut W, } impl<'a> OCTL7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `OCTL6` reader - Port output data (y = 0..15)"] pub struct OCTL6_R(crate::FieldReader); impl OCTL6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL6` writer - Port output data (y = 0..15)"] pub struct OCTL6_W<'a> { w: &'a mut W, } impl<'a> OCTL6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `OCTL5` reader - Port output data (y = 0..15)"] pub struct OCTL5_R(crate::FieldReader); impl OCTL5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL5` writer - Port output data (y = 0..15)"] pub struct OCTL5_W<'a> { w: &'a mut W, } impl<'a> OCTL5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `OCTL4` reader - Port output data (y = 0..15)"] pub struct OCTL4_R(crate::FieldReader); impl OCTL4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL4` writer - Port output data (y = 0..15)"] pub struct OCTL4_W<'a> { w: &'a mut W, } impl<'a> OCTL4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OCTL3` reader - Port output data (y = 0..15)"] pub struct OCTL3_R(crate::FieldReader); impl OCTL3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL3` writer - Port output data (y = 0..15)"] pub struct OCTL3_W<'a> { w: &'a mut W, } impl<'a> OCTL3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `OCTL2` reader - Port output data (y = 0..15)"] pub struct OCTL2_R(crate::FieldReader); impl OCTL2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL2` writer - Port output data (y = 0..15)"] pub struct OCTL2_W<'a> { w: &'a mut W, } impl<'a> OCTL2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `OCTL1` reader - Port output data (y = 0..15)"] pub struct OCTL1_R(crate::FieldReader); impl OCTL1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL1` writer - Port output data (y = 0..15)"] pub struct OCTL1_W<'a> { w: &'a mut W, } impl<'a> OCTL1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OCTL0` reader - Port output data (y = 0..15)"] pub struct OCTL0_R(crate::FieldReader); impl OCTL0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCTL0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCTL0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCTL0` writer - Port output data (y = 0..15)"] pub struct OCTL0_W<'a> { w: &'a mut W, } impl<'a> OCTL0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl15(&self) -> OCTL15_R { OCTL15_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl14(&self) -> OCTL14_R { OCTL14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl13(&self) -> OCTL13_R { OCTL13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl12(&self) -> OCTL12_R { OCTL12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl11(&self) -> OCTL11_R { OCTL11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl10(&self) -> OCTL10_R { OCTL10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl9(&self) -> OCTL9_R { OCTL9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl8(&self) -> OCTL8_R { OCTL8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl7(&self) -> OCTL7_R { OCTL7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl6(&self) -> OCTL6_R { OCTL6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl5(&self) -> OCTL5_R { OCTL5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl4(&self) -> OCTL4_R { OCTL4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl3(&self) -> OCTL3_R { OCTL3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl2(&self) -> OCTL2_R { OCTL2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl1(&self) -> OCTL1_R { OCTL1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl0(&self) -> OCTL0_R { OCTL0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl15(&mut self) -> OCTL15_W { OCTL15_W { w: self } } #[doc = "Bit 14 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl14(&mut self) -> OCTL14_W { OCTL14_W { w: self } } #[doc = "Bit 13 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl13(&mut self) -> OCTL13_W { OCTL13_W { w: self } } #[doc = "Bit 12 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl12(&mut self) -> OCTL12_W { OCTL12_W { w: self } } #[doc = "Bit 11 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl11(&mut self) -> OCTL11_W { OCTL11_W { w: self } } #[doc = "Bit 10 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl10(&mut self) -> OCTL10_W { OCTL10_W { w: self } } #[doc = "Bit 9 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl9(&mut self) -> OCTL9_W { OCTL9_W { w: self } } #[doc = "Bit 8 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl8(&mut self) -> OCTL8_W { OCTL8_W { w: self } } #[doc = "Bit 7 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl7(&mut self) -> OCTL7_W { OCTL7_W { w: self } } #[doc = "Bit 6 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl6(&mut self) -> OCTL6_W { OCTL6_W { w: self } } #[doc = "Bit 5 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl5(&mut self) -> OCTL5_W { OCTL5_W { w: self } } #[doc = "Bit 4 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl4(&mut self) -> OCTL4_W { OCTL4_W { w: self } } #[doc = "Bit 3 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl3(&mut self) -> OCTL3_W { OCTL3_W { w: self } } #[doc = "Bit 2 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl2(&mut self) -> OCTL2_W { OCTL2_W { w: self } } #[doc = "Bit 1 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl1(&mut self) -> OCTL1_W { OCTL1_W { w: self } } #[doc = "Bit 0 - Port output data (y = 0..15)"] #[inline(always)] pub fn octl0(&mut self) -> OCTL0_W { OCTL0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port output data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [octl](index.html) module"] pub struct OCTL_SPEC; impl crate::RegisterSpec for OCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [octl::R](R) reader structure"] impl crate::Readable for OCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [octl::W](W) writer structure"] impl crate::Writable for OCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets OCTL to value 0"] impl crate::Resettable for OCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BOP register accessor: an alias for `Reg`"] pub type BOP = crate::Reg; #[doc = "GPIO port bit set/reset register"] pub mod bop { #[doc = "Register `BOP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CR15` writer - Port x reset bit y (y = 0..15)"] pub struct CR15_W<'a> { w: &'a mut W, } impl<'a> CR15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `CR14` writer - Port x reset bit y (y = 0..15)"] pub struct CR14_W<'a> { w: &'a mut W, } impl<'a> CR14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CR13` writer - Port x reset bit y (y = 0..15)"] pub struct CR13_W<'a> { w: &'a mut W, } impl<'a> CR13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CR12` writer - Port x reset bit y (y = 0..15)"] pub struct CR12_W<'a> { w: &'a mut W, } impl<'a> CR12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `CR11` writer - Port x reset bit y (y = 0..15)"] pub struct CR11_W<'a> { w: &'a mut W, } impl<'a> CR11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CR10` writer - Port x reset bit y (y = 0..15)"] pub struct CR10_W<'a> { w: &'a mut W, } impl<'a> CR10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `CR9` writer - Port x reset bit y (y = 0..15)"] pub struct CR9_W<'a> { w: &'a mut W, } impl<'a> CR9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); self.w } } #[doc = "Field `CR8` writer - Port x reset bit y (y = 0..15)"] pub struct CR8_W<'a> { w: &'a mut W, } impl<'a> CR8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `CR7` writer - Port x reset bit y (y = 0..15)"] pub struct CR7_W<'a> { w: &'a mut W, } impl<'a> CR7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `CR6` writer - Port x reset bit y (y = 0..15)"] pub struct CR6_W<'a> { w: &'a mut W, } impl<'a> CR6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `CR5` writer - Port x reset bit y (y = 0..15)"] pub struct CR5_W<'a> { w: &'a mut W, } impl<'a> CR5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `CR4` writer - Port x reset bit y (y = 0..15)"] pub struct CR4_W<'a> { w: &'a mut W, } impl<'a> CR4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `CR3` writer - Port x reset bit y (y = 0..15)"] pub struct CR3_W<'a> { w: &'a mut W, } impl<'a> CR3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `CR2` writer - Port x reset bit y (y = 0..15)"] pub struct CR2_W<'a> { w: &'a mut W, } impl<'a> CR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `CR1` writer - Port x reset bit y (y = 0..15)"] pub struct CR1_W<'a> { w: &'a mut W, } impl<'a> CR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `CR0` writer - Port x set bit y (y= 0..15)"] pub struct CR0_W<'a> { w: &'a mut W, } impl<'a> CR0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `BOP15` writer - Port x set bit y (y= 0..15)"] pub struct BOP15_W<'a> { w: &'a mut W, } impl<'a> BOP15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `BOP14` writer - Port x set bit y (y= 0..15)"] pub struct BOP14_W<'a> { w: &'a mut W, } impl<'a> BOP14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `BOP13` writer - Port x set bit y (y= 0..15)"] pub struct BOP13_W<'a> { w: &'a mut W, } impl<'a> BOP13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `BOP12` writer - Port x set bit y (y= 0..15)"] pub struct BOP12_W<'a> { w: &'a mut W, } impl<'a> BOP12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `BOP11` writer - Port x set bit y (y= 0..15)"] pub struct BOP11_W<'a> { w: &'a mut W, } impl<'a> BOP11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `BOP10` writer - Port x set bit y (y= 0..15)"] pub struct BOP10_W<'a> { w: &'a mut W, } impl<'a> BOP10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `BOP9` writer - Port x set bit y (y= 0..15)"] pub struct BOP9_W<'a> { w: &'a mut W, } impl<'a> BOP9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `BOP8` writer - Port x set bit y (y= 0..15)"] pub struct BOP8_W<'a> { w: &'a mut W, } impl<'a> BOP8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `BOP7` writer - Port x set bit y (y= 0..15)"] pub struct BOP7_W<'a> { w: &'a mut W, } impl<'a> BOP7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BOP6` writer - Port x set bit y (y= 0..15)"] pub struct BOP6_W<'a> { w: &'a mut W, } impl<'a> BOP6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `BOP5` writer - Port x set bit y (y= 0..15)"] pub struct BOP5_W<'a> { w: &'a mut W, } impl<'a> BOP5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `BOP4` writer - Port x set bit y (y= 0..15)"] pub struct BOP4_W<'a> { w: &'a mut W, } impl<'a> BOP4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `BOP3` writer - Port x set bit y (y= 0..15)"] pub struct BOP3_W<'a> { w: &'a mut W, } impl<'a> BOP3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `BOP2` writer - Port x set bit y (y= 0..15)"] pub struct BOP2_W<'a> { w: &'a mut W, } impl<'a> BOP2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `BOP1` writer - Port x set bit y (y= 0..15)"] pub struct BOP1_W<'a> { w: &'a mut W, } impl<'a> BOP1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `BOP0` writer - Port x set bit y (y= 0..15)"] pub struct BOP0_W<'a> { w: &'a mut W, } impl<'a> BOP0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 31 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr15(&mut self) -> CR15_W { CR15_W { w: self } } #[doc = "Bit 30 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr14(&mut self) -> CR14_W { CR14_W { w: self } } #[doc = "Bit 29 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr13(&mut self) -> CR13_W { CR13_W { w: self } } #[doc = "Bit 28 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr12(&mut self) -> CR12_W { CR12_W { w: self } } #[doc = "Bit 27 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr11(&mut self) -> CR11_W { CR11_W { w: self } } #[doc = "Bit 26 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr10(&mut self) -> CR10_W { CR10_W { w: self } } #[doc = "Bit 25 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr9(&mut self) -> CR9_W { CR9_W { w: self } } #[doc = "Bit 24 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr8(&mut self) -> CR8_W { CR8_W { w: self } } #[doc = "Bit 23 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr7(&mut self) -> CR7_W { CR7_W { w: self } } #[doc = "Bit 22 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr6(&mut self) -> CR6_W { CR6_W { w: self } } #[doc = "Bit 21 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr5(&mut self) -> CR5_W { CR5_W { w: self } } #[doc = "Bit 20 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr4(&mut self) -> CR4_W { CR4_W { w: self } } #[doc = "Bit 19 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr3(&mut self) -> CR3_W { CR3_W { w: self } } #[doc = "Bit 18 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr2(&mut self) -> CR2_W { CR2_W { w: self } } #[doc = "Bit 17 - Port x reset bit y (y = 0..15)"] #[inline(always)] pub fn cr1(&mut self) -> CR1_W { CR1_W { w: self } } #[doc = "Bit 16 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn cr0(&mut self) -> CR0_W { CR0_W { w: self } } #[doc = "Bit 15 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop15(&mut self) -> BOP15_W { BOP15_W { w: self } } #[doc = "Bit 14 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop14(&mut self) -> BOP14_W { BOP14_W { w: self } } #[doc = "Bit 13 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop13(&mut self) -> BOP13_W { BOP13_W { w: self } } #[doc = "Bit 12 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop12(&mut self) -> BOP12_W { BOP12_W { w: self } } #[doc = "Bit 11 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop11(&mut self) -> BOP11_W { BOP11_W { w: self } } #[doc = "Bit 10 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop10(&mut self) -> BOP10_W { BOP10_W { w: self } } #[doc = "Bit 9 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop9(&mut self) -> BOP9_W { BOP9_W { w: self } } #[doc = "Bit 8 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop8(&mut self) -> BOP8_W { BOP8_W { w: self } } #[doc = "Bit 7 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop7(&mut self) -> BOP7_W { BOP7_W { w: self } } #[doc = "Bit 6 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop6(&mut self) -> BOP6_W { BOP6_W { w: self } } #[doc = "Bit 5 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop5(&mut self) -> BOP5_W { BOP5_W { w: self } } #[doc = "Bit 4 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop4(&mut self) -> BOP4_W { BOP4_W { w: self } } #[doc = "Bit 3 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop3(&mut self) -> BOP3_W { BOP3_W { w: self } } #[doc = "Bit 2 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop2(&mut self) -> BOP2_W { BOP2_W { w: self } } #[doc = "Bit 1 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop1(&mut self) -> BOP1_W { BOP1_W { w: self } } #[doc = "Bit 0 - Port x set bit y (y= 0..15)"] #[inline(always)] pub fn bop0(&mut self) -> BOP0_W { BOP0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "GPIO port bit set/reset register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bop](index.html) module"] pub struct BOP_SPEC; impl crate::RegisterSpec for BOP_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [bop::W](W) writer structure"] impl crate::Writable for BOP_SPEC { type Writer = W; } #[doc = "`reset()` method sets BOP to value 0"] impl crate::Resettable for BOP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BC register accessor: an alias for `Reg`"] pub type BC = crate::Reg; #[doc = "Port bit reset register"] pub mod bc { #[doc = "Register `BC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CR0` writer - Port x Reset bit y"] pub struct CR0_W<'a> { w: &'a mut W, } impl<'a> CR0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CR1` writer - Port x Reset bit y"] pub struct CR1_W<'a> { w: &'a mut W, } impl<'a> CR1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CR2` writer - Port x Reset bit y"] pub struct CR2_W<'a> { w: &'a mut W, } impl<'a> CR2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CR3` writer - Port x Reset bit y"] pub struct CR3_W<'a> { w: &'a mut W, } impl<'a> CR3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CR4` writer - Port x Reset bit y"] pub struct CR4_W<'a> { w: &'a mut W, } impl<'a> CR4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CR5` writer - Port x Reset bit y"] pub struct CR5_W<'a> { w: &'a mut W, } impl<'a> CR5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CR6` writer - Port x Reset bit y"] pub struct CR6_W<'a> { w: &'a mut W, } impl<'a> CR6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CR7` writer - Port x Reset bit y"] pub struct CR7_W<'a> { w: &'a mut W, } impl<'a> CR7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CR8` writer - Port x Reset bit y"] pub struct CR8_W<'a> { w: &'a mut W, } impl<'a> CR8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CR9` writer - Port x Reset bit y"] pub struct CR9_W<'a> { w: &'a mut W, } impl<'a> CR9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CR10` writer - Port x Reset bit y"] pub struct CR10_W<'a> { w: &'a mut W, } impl<'a> CR10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CR11` writer - Port x Reset bit y"] pub struct CR11_W<'a> { w: &'a mut W, } impl<'a> CR11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CR12` writer - Port x Reset bit y"] pub struct CR12_W<'a> { w: &'a mut W, } impl<'a> CR12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CR13` writer - Port x Reset bit y"] pub struct CR13_W<'a> { w: &'a mut W, } impl<'a> CR13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CR14` writer - Port x Reset bit y"] pub struct CR14_W<'a> { w: &'a mut W, } impl<'a> CR14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CR15` writer - Port x Reset bit y"] pub struct CR15_W<'a> { w: &'a mut W, } impl<'a> CR15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - Port x Reset bit y"] #[inline(always)] pub fn cr0(&mut self) -> CR0_W { CR0_W { w: self } } #[doc = "Bit 1 - Port x Reset bit y"] #[inline(always)] pub fn cr1(&mut self) -> CR1_W { CR1_W { w: self } } #[doc = "Bit 2 - Port x Reset bit y"] #[inline(always)] pub fn cr2(&mut self) -> CR2_W { CR2_W { w: self } } #[doc = "Bit 3 - Port x Reset bit y"] #[inline(always)] pub fn cr3(&mut self) -> CR3_W { CR3_W { w: self } } #[doc = "Bit 4 - Port x Reset bit y"] #[inline(always)] pub fn cr4(&mut self) -> CR4_W { CR4_W { w: self } } #[doc = "Bit 5 - Port x Reset bit y"] #[inline(always)] pub fn cr5(&mut self) -> CR5_W { CR5_W { w: self } } #[doc = "Bit 6 - Port x Reset bit y"] #[inline(always)] pub fn cr6(&mut self) -> CR6_W { CR6_W { w: self } } #[doc = "Bit 7 - Port x Reset bit y"] #[inline(always)] pub fn cr7(&mut self) -> CR7_W { CR7_W { w: self } } #[doc = "Bit 8 - Port x Reset bit y"] #[inline(always)] pub fn cr8(&mut self) -> CR8_W { CR8_W { w: self } } #[doc = "Bit 9 - Port x Reset bit y"] #[inline(always)] pub fn cr9(&mut self) -> CR9_W { CR9_W { w: self } } #[doc = "Bit 10 - Port x Reset bit y"] #[inline(always)] pub fn cr10(&mut self) -> CR10_W { CR10_W { w: self } } #[doc = "Bit 11 - Port x Reset bit y"] #[inline(always)] pub fn cr11(&mut self) -> CR11_W { CR11_W { w: self } } #[doc = "Bit 12 - Port x Reset bit y"] #[inline(always)] pub fn cr12(&mut self) -> CR12_W { CR12_W { w: self } } #[doc = "Bit 13 - Port x Reset bit y"] #[inline(always)] pub fn cr13(&mut self) -> CR13_W { CR13_W { w: self } } #[doc = "Bit 14 - Port x Reset bit y"] #[inline(always)] pub fn cr14(&mut self) -> CR14_W { CR14_W { w: self } } #[doc = "Bit 15 - Port x Reset bit y"] #[inline(always)] pub fn cr15(&mut self) -> CR15_W { CR15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port bit reset register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bc](index.html) module"] pub struct BC_SPEC; impl crate::RegisterSpec for BC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [bc::W](W) writer structure"] impl crate::Writable for BC_SPEC { type Writer = W; } #[doc = "`reset()` method sets BC to value 0"] impl crate::Resettable for BC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "TG register accessor: an alias for `Reg`"] pub type TG = crate::Reg; #[doc = "Port bit toggle register"] pub mod tg { #[doc = "Register `TG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TG0` writer - Port toggle bit"] pub struct TG0_W<'a> { w: &'a mut W, } impl<'a> TG0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `TG1` writer - Port toggle bit"] pub struct TG1_W<'a> { w: &'a mut W, } impl<'a> TG1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TG2` writer - Port toggle bit"] pub struct TG2_W<'a> { w: &'a mut W, } impl<'a> TG2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `TG3` writer - Port toggle bit"] pub struct TG3_W<'a> { w: &'a mut W, } impl<'a> TG3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `TG4` writer - Port toggle bit"] pub struct TG4_W<'a> { w: &'a mut W, } impl<'a> TG4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TG5` writer - Port toggle bit"] pub struct TG5_W<'a> { w: &'a mut W, } impl<'a> TG5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `TG6` writer - Port toggle bit"] pub struct TG6_W<'a> { w: &'a mut W, } impl<'a> TG6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `TG7` writer - Port toggle bit"] pub struct TG7_W<'a> { w: &'a mut W, } impl<'a> TG7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TG8` writer - Port toggle bit"] pub struct TG8_W<'a> { w: &'a mut W, } impl<'a> TG8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TG9` writer - Port toggle bit"] pub struct TG9_W<'a> { w: &'a mut W, } impl<'a> TG9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `TG10` writer - Port toggle bit"] pub struct TG10_W<'a> { w: &'a mut W, } impl<'a> TG10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `TG11` writer - Port toggle bit"] pub struct TG11_W<'a> { w: &'a mut W, } impl<'a> TG11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TG12` writer - Port toggle bit"] pub struct TG12_W<'a> { w: &'a mut W, } impl<'a> TG12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TG13` writer - Port toggle bit"] pub struct TG13_W<'a> { w: &'a mut W, } impl<'a> TG13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `TG14` writer - Port toggle bit"] pub struct TG14_W<'a> { w: &'a mut W, } impl<'a> TG14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `TG15` writer - Port toggle bit"] pub struct TG15_W<'a> { w: &'a mut W, } impl<'a> TG15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl W { #[doc = "Bit 0 - Port toggle bit"] #[inline(always)] pub fn tg0(&mut self) -> TG0_W { TG0_W { w: self } } #[doc = "Bit 1 - Port toggle bit"] #[inline(always)] pub fn tg1(&mut self) -> TG1_W { TG1_W { w: self } } #[doc = "Bit 2 - Port toggle bit"] #[inline(always)] pub fn tg2(&mut self) -> TG2_W { TG2_W { w: self } } #[doc = "Bit 3 - Port toggle bit"] #[inline(always)] pub fn tg3(&mut self) -> TG3_W { TG3_W { w: self } } #[doc = "Bit 4 - Port toggle bit"] #[inline(always)] pub fn tg4(&mut self) -> TG4_W { TG4_W { w: self } } #[doc = "Bit 5 - Port toggle bit"] #[inline(always)] pub fn tg5(&mut self) -> TG5_W { TG5_W { w: self } } #[doc = "Bit 6 - Port toggle bit"] #[inline(always)] pub fn tg6(&mut self) -> TG6_W { TG6_W { w: self } } #[doc = "Bit 7 - Port toggle bit"] #[inline(always)] pub fn tg7(&mut self) -> TG7_W { TG7_W { w: self } } #[doc = "Bit 8 - Port toggle bit"] #[inline(always)] pub fn tg8(&mut self) -> TG8_W { TG8_W { w: self } } #[doc = "Bit 9 - Port toggle bit"] #[inline(always)] pub fn tg9(&mut self) -> TG9_W { TG9_W { w: self } } #[doc = "Bit 10 - Port toggle bit"] #[inline(always)] pub fn tg10(&mut self) -> TG10_W { TG10_W { w: self } } #[doc = "Bit 11 - Port toggle bit"] #[inline(always)] pub fn tg11(&mut self) -> TG11_W { TG11_W { w: self } } #[doc = "Bit 12 - Port toggle bit"] #[inline(always)] pub fn tg12(&mut self) -> TG12_W { TG12_W { w: self } } #[doc = "Bit 13 - Port toggle bit"] #[inline(always)] pub fn tg13(&mut self) -> TG13_W { TG13_W { w: self } } #[doc = "Bit 14 - Port toggle bit"] #[inline(always)] pub fn tg14(&mut self) -> TG14_W { TG14_W { w: self } } #[doc = "Bit 15 - Port toggle bit"] #[inline(always)] pub fn tg15(&mut self) -> TG15_W { TG15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port bit toggle register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tg](index.html) module"] pub struct TG_SPEC; impl crate::RegisterSpec for TG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [tg::W](W) writer structure"] impl crate::Writable for TG_SPEC { type Writer = W; } #[doc = "`reset()` method sets TG to value 0"] impl crate::Resettable for TG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "OSPD1 register accessor: an alias for `Reg`"] pub type OSPD1 = crate::Reg; #[doc = "Port output speed register 1"] pub mod ospd1 { #[doc = "Register `OSPD1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `OSPD1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SPD0` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD0_R(crate::FieldReader); impl SPD0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD0` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD0_W<'a> { w: &'a mut W, } impl<'a> SPD0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `SPD1` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD1_R(crate::FieldReader); impl SPD1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD1` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD1_W<'a> { w: &'a mut W, } impl<'a> SPD1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `SPD2` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD2_R(crate::FieldReader); impl SPD2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD2` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD2_W<'a> { w: &'a mut W, } impl<'a> SPD2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `SPD3` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD3_R(crate::FieldReader); impl SPD3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD3` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD3_W<'a> { w: &'a mut W, } impl<'a> SPD3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `SPD4` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD4_R(crate::FieldReader); impl SPD4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD4` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD4_W<'a> { w: &'a mut W, } impl<'a> SPD4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `SPD5` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD5_R(crate::FieldReader); impl SPD5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD5` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD5_W<'a> { w: &'a mut W, } impl<'a> SPD5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `SPD6` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD6_R(crate::FieldReader); impl SPD6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD6` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD6_W<'a> { w: &'a mut W, } impl<'a> SPD6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `SPD7` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD7_R(crate::FieldReader); impl SPD7_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD7_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD7_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD7` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD7_W<'a> { w: &'a mut W, } impl<'a> SPD7_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SPD8` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD8_R(crate::FieldReader); impl SPD8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD8` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD8_W<'a> { w: &'a mut W, } impl<'a> SPD8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `SPD9` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD9_R(crate::FieldReader); impl SPD9_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD9_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD9_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD9` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD9_W<'a> { w: &'a mut W, } impl<'a> SPD9_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `SPD10` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD10_R(crate::FieldReader); impl SPD10_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD10_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD10_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD10` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD10_W<'a> { w: &'a mut W, } impl<'a> SPD10_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `SPD11` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD11_R(crate::FieldReader); impl SPD11_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD11_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD11_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD11` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD11_W<'a> { w: &'a mut W, } impl<'a> SPD11_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `SPD12` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD12_R(crate::FieldReader); impl SPD12_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD12_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD12_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD12` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD12_W<'a> { w: &'a mut W, } impl<'a> SPD12_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `SPD13` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD13_R(crate::FieldReader); impl SPD13_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD13_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD13_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD13` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD13_W<'a> { w: &'a mut W, } impl<'a> SPD13_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `SPD14` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD14_R(crate::FieldReader); impl SPD14_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD14_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD14_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD14` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD14_W<'a> { w: &'a mut W, } impl<'a> SPD14_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `SPD15` reader - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD15_R(crate::FieldReader); impl SPD15_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPD15_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPD15_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPD15` writer - Set Very High output speed when OSPDy(y=0..15) is 0b11"] pub struct SPD15_W<'a> { w: &'a mut W, } impl<'a> SPD15_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } impl R { #[doc = "Bit 0 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd0(&self) -> SPD0_R { SPD0_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd1(&self) -> SPD1_R { SPD1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd2(&self) -> SPD2_R { SPD2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd3(&self) -> SPD3_R { SPD3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd4(&self) -> SPD4_R { SPD4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd5(&self) -> SPD5_R { SPD5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd6(&self) -> SPD6_R { SPD6_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd7(&self) -> SPD7_R { SPD7_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd8(&self) -> SPD8_R { SPD8_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd9(&self) -> SPD9_R { SPD9_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd10(&self) -> SPD10_R { SPD10_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd11(&self) -> SPD11_R { SPD11_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd12(&self) -> SPD12_R { SPD12_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd13(&self) -> SPD13_R { SPD13_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd14(&self) -> SPD14_R { SPD14_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd15(&self) -> SPD15_R { SPD15_R::new(((self.bits >> 15) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd0(&mut self) -> SPD0_W { SPD0_W { w: self } } #[doc = "Bit 1 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd1(&mut self) -> SPD1_W { SPD1_W { w: self } } #[doc = "Bit 2 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd2(&mut self) -> SPD2_W { SPD2_W { w: self } } #[doc = "Bit 3 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd3(&mut self) -> SPD3_W { SPD3_W { w: self } } #[doc = "Bit 4 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd4(&mut self) -> SPD4_W { SPD4_W { w: self } } #[doc = "Bit 5 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd5(&mut self) -> SPD5_W { SPD5_W { w: self } } #[doc = "Bit 6 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd6(&mut self) -> SPD6_W { SPD6_W { w: self } } #[doc = "Bit 7 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd7(&mut self) -> SPD7_W { SPD7_W { w: self } } #[doc = "Bit 8 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd8(&mut self) -> SPD8_W { SPD8_W { w: self } } #[doc = "Bit 9 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd9(&mut self) -> SPD9_W { SPD9_W { w: self } } #[doc = "Bit 10 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd10(&mut self) -> SPD10_W { SPD10_W { w: self } } #[doc = "Bit 11 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd11(&mut self) -> SPD11_W { SPD11_W { w: self } } #[doc = "Bit 12 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd12(&mut self) -> SPD12_W { SPD12_W { w: self } } #[doc = "Bit 13 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd13(&mut self) -> SPD13_W { SPD13_W { w: self } } #[doc = "Bit 14 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd14(&mut self) -> SPD14_W { SPD14_W { w: self } } #[doc = "Bit 15 - Set Very High output speed when OSPDy(y=0..15) is 0b11"] #[inline(always)] pub fn spd15(&mut self) -> SPD15_W { SPD15_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Port output speed register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ospd1](index.html) module"] pub struct OSPD1_SPEC; impl crate::RegisterSpec for OSPD1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ospd1::R](R) reader structure"] impl crate::Readable for OSPD1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ospd1::W](W) writer structure"] impl crate::Writable for OSPD1_SPEC { type Writer = W; } #[doc = "`reset()` method sets OSPD1 to value 0"] impl crate::Resettable for OSPD1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Inter integrated circuit"] pub struct I2C0 { _marker: PhantomData<*const ()>, } unsafe impl Send for I2C0 {} impl I2C0 { #[doc = r"Pointer to the register block"] pub const PTR: *const i2c0::RegisterBlock = 0x4000_5400 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const i2c0::RegisterBlock { Self::PTR } } impl Deref for I2C0 { type Target = i2c0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for I2C0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("I2C0").finish() } } #[doc = "Inter integrated circuit"] pub mod i2c0 { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Control register 0"] pub ctl0: crate::Reg, #[doc = "0x04 - Control register 1"] pub ctl1: crate::Reg, #[doc = "0x08 - Own address register 0"] pub saddr0: crate::Reg, #[doc = "0x0c - Own address register 1"] pub saddr1: crate::Reg, #[doc = "0x10 - Data register"] pub data: crate::Reg, #[doc = "0x14 - Transfer status register 0"] pub stat0: crate::Reg, #[doc = "0x18 - Transfer status register 1"] pub stat1: crate::Reg, #[doc = "0x1c - Clock configure register"] pub ckcfg: crate::Reg, #[doc = "0x20 - Rise time register"] pub rt: crate::Reg, _reserved9: [u8; 0x6c], #[doc = "0x90 - Fast-mode-plus configure register"] pub fmpcfg: crate::Reg, } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "Control register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SRESET` reader - Software reset"] pub struct SRESET_R(crate::FieldReader); impl SRESET_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SRESET_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SRESET_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SRESET` writer - Software reset"] pub struct SRESET_W<'a> { w: &'a mut W, } impl<'a> SRESET_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `SALT` reader - SMBus alert"] pub struct SALT_R(crate::FieldReader); impl SALT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SALT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SALT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SALT` writer - SMBus alert"] pub struct SALT_W<'a> { w: &'a mut W, } impl<'a> SALT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `PECTRANS` reader - Packet error checking"] pub struct PECTRANS_R(crate::FieldReader); impl PECTRANS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PECTRANS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PECTRANS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PECTRANS` writer - Packet error checking"] pub struct PECTRANS_W<'a> { w: &'a mut W, } impl<'a> PECTRANS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `POAP` reader - Acknowledge/PEC Position (for data reception)"] pub struct POAP_R(crate::FieldReader); impl POAP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { POAP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for POAP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `POAP` writer - Acknowledge/PEC Position (for data reception)"] pub struct POAP_W<'a> { w: &'a mut W, } impl<'a> POAP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `ACKEN` reader - Acknowledge enable"] pub struct ACKEN_R(crate::FieldReader); impl ACKEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACKEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACKEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACKEN` writer - Acknowledge enable"] pub struct ACKEN_W<'a> { w: &'a mut W, } impl<'a> ACKEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `STOP` reader - Stop condition"] pub struct STOP_R(crate::FieldReader); impl STOP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STOP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STOP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STOP` writer - Stop condition"] pub struct STOP_W<'a> { w: &'a mut W, } impl<'a> STOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `START` reader - Start generation"] pub struct START_R(crate::FieldReader); impl START_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { START_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for START_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `START` writer - Start generation"] pub struct START_W<'a> { w: &'a mut W, } impl<'a> START_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `SS` reader - Clock stretching disable (Slave mode)"] pub struct SS_R(crate::FieldReader); impl SS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SS` writer - Clock stretching disable (Slave mode)"] pub struct SS_W<'a> { w: &'a mut W, } impl<'a> SS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `GCEN` reader - General call enable"] pub struct GCEN_R(crate::FieldReader); impl GCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GCEN` writer - General call enable"] pub struct GCEN_W<'a> { w: &'a mut W, } impl<'a> GCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `PECEN` reader - PEC enable"] pub struct PECEN_R(crate::FieldReader); impl PECEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PECEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PECEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PECEN` writer - PEC enable"] pub struct PECEN_W<'a> { w: &'a mut W, } impl<'a> PECEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `ARPEN` reader - ARP enable"] pub struct ARPEN_R(crate::FieldReader); impl ARPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ARPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ARPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ARPEN` writer - ARP enable"] pub struct ARPEN_W<'a> { w: &'a mut W, } impl<'a> ARPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `SMBSEL` reader - SMBus type"] pub struct SMBSEL_R(crate::FieldReader); impl SMBSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SMBSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SMBSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SMBSEL` writer - SMBus type"] pub struct SMBSEL_W<'a> { w: &'a mut W, } impl<'a> SMBSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `SMBEN` reader - SMBus mode"] pub struct SMBEN_R(crate::FieldReader); impl SMBEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SMBEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SMBEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SMBEN` writer - SMBus mode"] pub struct SMBEN_W<'a> { w: &'a mut W, } impl<'a> SMBEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `I2CEN` reader - Peripheral enable"] pub struct I2CEN_R(crate::FieldReader); impl I2CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2CEN` writer - Peripheral enable"] pub struct I2CEN_W<'a> { w: &'a mut W, } impl<'a> I2CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Software reset"] #[inline(always)] pub fn sreset(&self) -> SRESET_R { SRESET_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 13 - SMBus alert"] #[inline(always)] pub fn salt(&self) -> SALT_R { SALT_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Packet error checking"] #[inline(always)] pub fn pectrans(&self) -> PECTRANS_R { PECTRANS_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Acknowledge/PEC Position (for data reception)"] #[inline(always)] pub fn poap(&self) -> POAP_R { POAP_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Acknowledge enable"] #[inline(always)] pub fn acken(&self) -> ACKEN_R { ACKEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Stop condition"] #[inline(always)] pub fn stop(&self) -> STOP_R { STOP_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Start generation"] #[inline(always)] pub fn start(&self) -> START_R { START_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Clock stretching disable (Slave mode)"] #[inline(always)] pub fn ss(&self) -> SS_R { SS_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - General call enable"] #[inline(always)] pub fn gcen(&self) -> GCEN_R { GCEN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - PEC enable"] #[inline(always)] pub fn pecen(&self) -> PECEN_R { PECEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - ARP enable"] #[inline(always)] pub fn arpen(&self) -> ARPEN_R { ARPEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - SMBus type"] #[inline(always)] pub fn smbsel(&self) -> SMBSEL_R { SMBSEL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - SMBus mode"] #[inline(always)] pub fn smben(&self) -> SMBEN_R { SMBEN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Peripheral enable"] #[inline(always)] pub fn i2cen(&self) -> I2CEN_R { I2CEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Software reset"] #[inline(always)] pub fn sreset(&mut self) -> SRESET_W { SRESET_W { w: self } } #[doc = "Bit 13 - SMBus alert"] #[inline(always)] pub fn salt(&mut self) -> SALT_W { SALT_W { w: self } } #[doc = "Bit 12 - Packet error checking"] #[inline(always)] pub fn pectrans(&mut self) -> PECTRANS_W { PECTRANS_W { w: self } } #[doc = "Bit 11 - Acknowledge/PEC Position (for data reception)"] #[inline(always)] pub fn poap(&mut self) -> POAP_W { POAP_W { w: self } } #[doc = "Bit 10 - Acknowledge enable"] #[inline(always)] pub fn acken(&mut self) -> ACKEN_W { ACKEN_W { w: self } } #[doc = "Bit 9 - Stop condition"] #[inline(always)] pub fn stop(&mut self) -> STOP_W { STOP_W { w: self } } #[doc = "Bit 8 - Start generation"] #[inline(always)] pub fn start(&mut self) -> START_W { START_W { w: self } } #[doc = "Bit 7 - Clock stretching disable (Slave mode)"] #[inline(always)] pub fn ss(&mut self) -> SS_W { SS_W { w: self } } #[doc = "Bit 6 - General call enable"] #[inline(always)] pub fn gcen(&mut self) -> GCEN_W { GCEN_W { w: self } } #[doc = "Bit 5 - PEC enable"] #[inline(always)] pub fn pecen(&mut self) -> PECEN_W { PECEN_W { w: self } } #[doc = "Bit 4 - ARP enable"] #[inline(always)] pub fn arpen(&mut self) -> ARPEN_W { ARPEN_W { w: self } } #[doc = "Bit 3 - SMBus type"] #[inline(always)] pub fn smbsel(&mut self) -> SMBSEL_W { SMBSEL_W { w: self } } #[doc = "Bit 1 - SMBus mode"] #[inline(always)] pub fn smben(&mut self) -> SMBEN_W { SMBEN_W { w: self } } #[doc = "Bit 0 - Peripheral enable"] #[inline(always)] pub fn i2cen(&mut self) -> I2CEN_W { I2CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "Control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DMALST` reader - Flag indicating DMA last transfer"] pub struct DMALST_R(crate::FieldReader); impl DMALST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DMALST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMALST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMALST` writer - Flag indicating DMA last transfer"] pub struct DMALST_W<'a> { w: &'a mut W, } impl<'a> DMALST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `DMAON` reader - DMA mode switch"] pub struct DMAON_R(crate::FieldReader); impl DMAON_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DMAON_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMAON_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMAON` writer - DMA mode switch"] pub struct DMAON_W<'a> { w: &'a mut W, } impl<'a> DMAON_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `BUFIE` reader - Buffer interrupt enable"] pub struct BUFIE_R(crate::FieldReader); impl BUFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BUFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BUFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BUFIE` writer - Buffer interrupt enable"] pub struct BUFIE_W<'a> { w: &'a mut W, } impl<'a> BUFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `EVIE` reader - Event interrupt enable"] pub struct EVIE_R(crate::FieldReader); impl EVIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EVIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EVIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EVIE` writer - Event interrupt enable"] pub struct EVIE_W<'a> { w: &'a mut W, } impl<'a> EVIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `ERRIE` reader - Error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `I2CCLK` reader - Peripheral clock frequency"] pub struct I2CCLK_R(crate::FieldReader); impl I2CCLK_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { I2CCLK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2CCLK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2CCLK` writer - Peripheral clock frequency"] pub struct I2CCLK_W<'a> { w: &'a mut W, } impl<'a> I2CCLK_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f); self.w } } impl R { #[doc = "Bit 12 - Flag indicating DMA last transfer"] #[inline(always)] pub fn dmalst(&self) -> DMALST_R { DMALST_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - DMA mode switch"] #[inline(always)] pub fn dmaon(&self) -> DMAON_R { DMAON_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Buffer interrupt enable"] #[inline(always)] pub fn bufie(&self) -> BUFIE_R { BUFIE_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Event interrupt enable"] #[inline(always)] pub fn evie(&self) -> EVIE_R { EVIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 0:5 - Peripheral clock frequency"] #[inline(always)] pub fn i2cclk(&self) -> I2CCLK_R { I2CCLK_R::new((self.bits & 0x3f) as u8) } } impl W { #[doc = "Bit 12 - Flag indicating DMA last transfer"] #[inline(always)] pub fn dmalst(&mut self) -> DMALST_W { DMALST_W { w: self } } #[doc = "Bit 11 - DMA mode switch"] #[inline(always)] pub fn dmaon(&mut self) -> DMAON_W { DMAON_W { w: self } } #[doc = "Bit 10 - Buffer interrupt enable"] #[inline(always)] pub fn bufie(&mut self) -> BUFIE_W { BUFIE_W { w: self } } #[doc = "Bit 9 - Event interrupt enable"] #[inline(always)] pub fn evie(&mut self) -> EVIE_W { EVIE_W { w: self } } #[doc = "Bit 8 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bits 0:5 - Peripheral clock frequency"] #[inline(always)] pub fn i2cclk(&mut self) -> I2CCLK_W { I2CCLK_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SADDR0 register accessor: an alias for `Reg`"] pub type SADDR0 = crate::Reg; #[doc = "Own address register 0"] pub mod saddr0 { #[doc = "Register `SADDR0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `SADDR0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ADDFORMAT` reader - Addressing mode (slave mode)"] pub struct ADDFORMAT_R(crate::FieldReader); impl ADDFORMAT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADDFORMAT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADDFORMAT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADDFORMAT` writer - Addressing mode (slave mode)"] pub struct ADDFORMAT_W<'a> { w: &'a mut W, } impl<'a> ADDFORMAT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `ADDRESS` reader - Interface address"] pub struct ADDRESS_R(crate::FieldReader); impl ADDRESS_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { ADDRESS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADDRESS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADDRESS` writer - Interface address"] pub struct ADDRESS_W<'a> { w: &'a mut W, } impl<'a> ADDRESS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x03ff) | (value as u32 & 0x03ff); self.w } } impl R { #[doc = "Bit 15 - Addressing mode (slave mode)"] #[inline(always)] pub fn addformat(&self) -> ADDFORMAT_R { ADDFORMAT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 0:9 - Interface address"] #[inline(always)] pub fn address(&self) -> ADDRESS_R { ADDRESS_R::new((self.bits & 0x03ff) as u16) } } impl W { #[doc = "Bit 15 - Addressing mode (slave mode)"] #[inline(always)] pub fn addformat(&mut self) -> ADDFORMAT_W { ADDFORMAT_W { w: self } } #[doc = "Bits 0:9 - Interface address"] #[inline(always)] pub fn address(&mut self) -> ADDRESS_W { ADDRESS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Own address register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [saddr0](index.html) module"] pub struct SADDR0_SPEC; impl crate::RegisterSpec for SADDR0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [saddr0::R](R) reader structure"] impl crate::Readable for SADDR0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [saddr0::W](W) writer structure"] impl crate::Writable for SADDR0_SPEC { type Writer = W; } #[doc = "`reset()` method sets SADDR0 to value 0"] impl crate::Resettable for SADDR0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SADDR1 register accessor: an alias for `Reg`"] pub type SADDR1 = crate::Reg; #[doc = "Own address register 1"] pub mod saddr1 { #[doc = "Register `SADDR1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `SADDR1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ADDRESS2` reader - Interface address"] pub struct ADDRESS2_R(crate::FieldReader); impl ADDRESS2_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ADDRESS2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADDRESS2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADDRESS2` writer - Interface address"] pub struct ADDRESS2_W<'a> { w: &'a mut W, } impl<'a> ADDRESS2_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 1)) | ((value as u32 & 0x7f) << 1); self.w } } #[doc = "Field `DUADEN` reader - Dual addressing mode enable"] pub struct DUADEN_R(crate::FieldReader); impl DUADEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DUADEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DUADEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DUADEN` writer - Dual addressing mode enable"] pub struct DUADEN_W<'a> { w: &'a mut W, } impl<'a> DUADEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 1:7 - Interface address"] #[inline(always)] pub fn address2(&self) -> ADDRESS2_R { ADDRESS2_R::new(((self.bits >> 1) & 0x7f) as u8) } #[doc = "Bit 0 - Dual addressing mode enable"] #[inline(always)] pub fn duaden(&self) -> DUADEN_R { DUADEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 1:7 - Interface address"] #[inline(always)] pub fn address2(&mut self) -> ADDRESS2_W { ADDRESS2_W { w: self } } #[doc = "Bit 0 - Dual addressing mode enable"] #[inline(always)] pub fn duaden(&mut self) -> DUADEN_W { DUADEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Own address register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [saddr1](index.html) module"] pub struct SADDR1_SPEC; impl crate::RegisterSpec for SADDR1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [saddr1::R](R) reader structure"] impl crate::Readable for SADDR1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [saddr1::W](W) writer structure"] impl crate::Writable for SADDR1_SPEC { type Writer = W; } #[doc = "`reset()` method sets SADDR1 to value 0"] impl crate::Resettable for SADDR1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DATA register accessor: an alias for `Reg`"] pub type DATA = crate::Reg; #[doc = "Data register"] pub mod data { #[doc = "Register `DATA` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DATA` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TRB` reader - Transmission or reception data buffer"] pub struct TRB_R(crate::FieldReader); impl TRB_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TRB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRB` writer - Transmission or reception data buffer"] pub struct TRB_W<'a> { w: &'a mut W, } impl<'a> TRB_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bits 0:7 - Transmission or reception data buffer"] #[inline(always)] pub fn trb(&self) -> TRB_R { TRB_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Transmission or reception data buffer"] #[inline(always)] pub fn trb(&mut self) -> TRB_W { TRB_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"] pub struct DATA_SPEC; impl crate::RegisterSpec for DATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [data::R](R) reader structure"] impl crate::Readable for DATA_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"] impl crate::Writable for DATA_SPEC { type Writer = W; } #[doc = "`reset()` method sets DATA to value 0"] impl crate::Resettable for DATA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "STAT0 register accessor: an alias for `Reg`"] pub type STAT0 = crate::Reg; #[doc = "Transfer status register 0"] pub mod stat0 { #[doc = "Register `STAT0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `STAT0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SMBALT` reader - SMBus alert"] pub struct SMBALT_R(crate::FieldReader); impl SMBALT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SMBALT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SMBALT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SMBALT` writer - SMBus alert"] pub struct SMBALT_W<'a> { w: &'a mut W, } impl<'a> SMBALT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `SMBTO` reader - Timeout signal in SMBus mode"] pub struct SMBTO_R(crate::FieldReader); impl SMBTO_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SMBTO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SMBTO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SMBTO` writer - Timeout signal in SMBus mode"] pub struct SMBTO_W<'a> { w: &'a mut W, } impl<'a> SMBTO_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `PECERR` reader - PEC error when receiving data"] pub struct PECERR_R(crate::FieldReader); impl PECERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PECERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PECERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PECERR` writer - PEC error when receiving data"] pub struct PECERR_W<'a> { w: &'a mut W, } impl<'a> PECERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OUERR` reader - Overrun/Underrun occurs in slave mode"] pub struct OUERR_R(crate::FieldReader); impl OUERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OUERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OUERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OUERR` writer - Overrun/Underrun occurs in slave mode"] pub struct OUERR_W<'a> { w: &'a mut W, } impl<'a> OUERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `AERR` reader - Acknowledge error"] pub struct AERR_R(crate::FieldReader); impl AERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { AERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for AERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `AERR` writer - Acknowledge error"] pub struct AERR_W<'a> { w: &'a mut W, } impl<'a> AERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `LOSTARB` reader - Arbitration lost (master mode)"] pub struct LOSTARB_R(crate::FieldReader); impl LOSTARB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LOSTARB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LOSTARB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LOSTARB` writer - Arbitration lost (master mode)"] pub struct LOSTARB_W<'a> { w: &'a mut W, } impl<'a> LOSTARB_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `BERR` reader - Bus error"] pub struct BERR_R(crate::FieldReader); impl BERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BERR` writer - Bus error"] pub struct BERR_W<'a> { w: &'a mut W, } impl<'a> BERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TBE` reader - I2C_DATA is Empty during transmitting"] pub struct TBE_R(crate::FieldReader); impl TBE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TBE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TBE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RBNE` reader - I2C_DATA is not Empty during receiving"] pub struct RBNE_R(crate::FieldReader); impl RBNE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RBNE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RBNE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STPDET` reader - Stop detection (slave mode)"] pub struct STPDET_R(crate::FieldReader); impl STPDET_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STPDET_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STPDET_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADD10SEND` reader - Header of 10-bit address is sent in master mode"] pub struct ADD10SEND_R(crate::FieldReader); impl ADD10SEND_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADD10SEND_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADD10SEND_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BTC` reader - Byte transmission completed"] pub struct BTC_R(crate::FieldReader); impl BTC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BTC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BTC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADDSEND` reader - Address sent (master mode)/matched (slave mode)"] pub struct ADDSEND_R(crate::FieldReader); impl ADDSEND_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADDSEND_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADDSEND_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SBSEND` reader - Start bit (Master mode)"] pub struct SBSEND_R(crate::FieldReader); impl SBSEND_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SBSEND_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SBSEND_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 15 - SMBus alert"] #[inline(always)] pub fn smbalt(&self) -> SMBALT_R { SMBALT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Timeout signal in SMBus mode"] #[inline(always)] pub fn smbto(&self) -> SMBTO_R { SMBTO_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 12 - PEC error when receiving data"] #[inline(always)] pub fn pecerr(&self) -> PECERR_R { PECERR_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Overrun/Underrun occurs in slave mode"] #[inline(always)] pub fn ouerr(&self) -> OUERR_R { OUERR_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Acknowledge error"] #[inline(always)] pub fn aerr(&self) -> AERR_R { AERR_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Arbitration lost (master mode)"] #[inline(always)] pub fn lostarb(&self) -> LOSTARB_R { LOSTARB_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Bus error"] #[inline(always)] pub fn berr(&self) -> BERR_R { BERR_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - I2C_DATA is Empty during transmitting"] #[inline(always)] pub fn tbe(&self) -> TBE_R { TBE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - I2C_DATA is not Empty during receiving"] #[inline(always)] pub fn rbne(&self) -> RBNE_R { RBNE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Stop detection (slave mode)"] #[inline(always)] pub fn stpdet(&self) -> STPDET_R { STPDET_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Header of 10-bit address is sent in master mode"] #[inline(always)] pub fn add10send(&self) -> ADD10SEND_R { ADD10SEND_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Byte transmission completed"] #[inline(always)] pub fn btc(&self) -> BTC_R { BTC_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Address sent (master mode)/matched (slave mode)"] #[inline(always)] pub fn addsend(&self) -> ADDSEND_R { ADDSEND_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Start bit (Master mode)"] #[inline(always)] pub fn sbsend(&self) -> SBSEND_R { SBSEND_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - SMBus alert"] #[inline(always)] pub fn smbalt(&mut self) -> SMBALT_W { SMBALT_W { w: self } } #[doc = "Bit 14 - Timeout signal in SMBus mode"] #[inline(always)] pub fn smbto(&mut self) -> SMBTO_W { SMBTO_W { w: self } } #[doc = "Bit 12 - PEC error when receiving data"] #[inline(always)] pub fn pecerr(&mut self) -> PECERR_W { PECERR_W { w: self } } #[doc = "Bit 11 - Overrun/Underrun occurs in slave mode"] #[inline(always)] pub fn ouerr(&mut self) -> OUERR_W { OUERR_W { w: self } } #[doc = "Bit 10 - Acknowledge error"] #[inline(always)] pub fn aerr(&mut self) -> AERR_W { AERR_W { w: self } } #[doc = "Bit 9 - Arbitration lost (master mode)"] #[inline(always)] pub fn lostarb(&mut self) -> LOSTARB_W { LOSTARB_W { w: self } } #[doc = "Bit 8 - Bus error"] #[inline(always)] pub fn berr(&mut self) -> BERR_W { BERR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Transfer status register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat0](index.html) module"] pub struct STAT0_SPEC; impl crate::RegisterSpec for STAT0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat0::R](R) reader structure"] impl crate::Readable for STAT0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [stat0::W](W) writer structure"] impl crate::Writable for STAT0_SPEC { type Writer = W; } #[doc = "`reset()` method sets STAT0 to value 0"] impl crate::Resettable for STAT0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "STAT1 register accessor: an alias for `Reg`"] pub type STAT1 = crate::Reg; #[doc = "Transfer status register 1"] pub mod stat1 { #[doc = "Register `STAT1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `PECV` reader - Packet error checking register"] pub struct PECV_R(crate::FieldReader); impl PECV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PECV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PECV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DUMODF` reader - Dual flag (Slave mode)"] pub struct DUMODF_R(crate::FieldReader); impl DUMODF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DUMODF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DUMODF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HSTSMB` reader - SMBus host header (Slave mode)"] pub struct HSTSMB_R(crate::FieldReader); impl HSTSMB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HSTSMB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HSTSMB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DEFSMB` reader - SMBus device default address (Slave mode)"] pub struct DEFSMB_R(crate::FieldReader); impl DEFSMB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DEFSMB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DEFSMB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RXGC` reader - General call address (Slave mode)"] pub struct RXGC_R(crate::FieldReader); impl RXGC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RXGC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RXGC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TR` reader - Transmitter/receiver"] pub struct TR_R(crate::FieldReader); impl TR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2CBSY` reader - Bus busy"] pub struct I2CBSY_R(crate::FieldReader); impl I2CBSY_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2CBSY_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2CBSY_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MASTER` reader - Master/slave"] pub struct MASTER_R(crate::FieldReader); impl MASTER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MASTER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MASTER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 8:15 - Packet error checking register"] #[inline(always)] pub fn pecv(&self) -> PECV_R { PECV_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bit 7 - Dual flag (Slave mode)"] #[inline(always)] pub fn dumodf(&self) -> DUMODF_R { DUMODF_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - SMBus host header (Slave mode)"] #[inline(always)] pub fn hstsmb(&self) -> HSTSMB_R { HSTSMB_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - SMBus device default address (Slave mode)"] #[inline(always)] pub fn defsmb(&self) -> DEFSMB_R { DEFSMB_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - General call address (Slave mode)"] #[inline(always)] pub fn rxgc(&self) -> RXGC_R { RXGC_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 2 - Transmitter/receiver"] #[inline(always)] pub fn tr(&self) -> TR_R { TR_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Bus busy"] #[inline(always)] pub fn i2cbsy(&self) -> I2CBSY_R { I2CBSY_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Master/slave"] #[inline(always)] pub fn master(&self) -> MASTER_R { MASTER_R::new((self.bits & 0x01) != 0) } } #[doc = "Transfer status register 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat1](index.html) module"] pub struct STAT1_SPEC; impl crate::RegisterSpec for STAT1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat1::R](R) reader structure"] impl crate::Readable for STAT1_SPEC { type Reader = R; } #[doc = "`reset()` method sets STAT1 to value 0"] impl crate::Resettable for STAT1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CKCFG register accessor: an alias for `Reg`"] pub type CKCFG = crate::Reg; #[doc = "Clock configure register"] pub mod ckcfg { #[doc = "Register `CKCFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CKCFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `FAST` reader - I2C master mode selection"] pub struct FAST_R(crate::FieldReader); impl FAST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FAST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FAST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FAST` writer - I2C master mode selection"] pub struct FAST_W<'a> { w: &'a mut W, } impl<'a> FAST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `DTCY` reader - Fast mode duty cycle"] pub struct DTCY_R(crate::FieldReader); impl DTCY_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTCY_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTCY_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTCY` writer - Fast mode duty cycle"] pub struct DTCY_W<'a> { w: &'a mut W, } impl<'a> DTCY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CLKC` reader - Clock control register in Fast/Standard mode (Master mode)"] pub struct CLKC_R(crate::FieldReader); impl CLKC_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CLKC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CLKC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CLKC` writer - Clock control register in Fast/Standard mode (Master mode)"] pub struct CLKC_W<'a> { w: &'a mut W, } impl<'a> CLKC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); self.w } } impl R { #[doc = "Bit 15 - I2C master mode selection"] #[inline(always)] pub fn fast(&self) -> FAST_R { FAST_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Fast mode duty cycle"] #[inline(always)] pub fn dtcy(&self) -> DTCY_R { DTCY_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bits 0:11 - Clock control register in Fast/Standard mode (Master mode)"] #[inline(always)] pub fn clkc(&self) -> CLKC_R { CLKC_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bit 15 - I2C master mode selection"] #[inline(always)] pub fn fast(&mut self) -> FAST_W { FAST_W { w: self } } #[doc = "Bit 14 - Fast mode duty cycle"] #[inline(always)] pub fn dtcy(&mut self) -> DTCY_W { DTCY_W { w: self } } #[doc = "Bits 0:11 - Clock control register in Fast/Standard mode (Master mode)"] #[inline(always)] pub fn clkc(&mut self) -> CLKC_W { CLKC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Clock configure register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ckcfg](index.html) module"] pub struct CKCFG_SPEC; impl crate::RegisterSpec for CKCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ckcfg::R](R) reader structure"] impl crate::Readable for CKCFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ckcfg::W](W) writer structure"] impl crate::Writable for CKCFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets CKCFG to value 0"] impl crate::Resettable for CKCFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RT register accessor: an alias for `Reg`"] pub type RT = crate::Reg; #[doc = "Rise time register"] pub mod rt { #[doc = "Register `RT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `RT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RISETIME` reader - Maximum rise time in master mode"] pub struct RISETIME_R(crate::FieldReader); impl RISETIME_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RISETIME_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RISETIME_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RISETIME` writer - Maximum rise time in master mode"] pub struct RISETIME_W<'a> { w: &'a mut W, } impl<'a> RISETIME_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x3f) | (value as u32 & 0x3f); self.w } } impl R { #[doc = "Bits 0:5 - Maximum rise time in master mode"] #[inline(always)] pub fn risetime(&self) -> RISETIME_R { RISETIME_R::new((self.bits & 0x3f) as u8) } } impl W { #[doc = "Bits 0:5 - Maximum rise time in master mode"] #[inline(always)] pub fn risetime(&mut self) -> RISETIME_W { RISETIME_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Rise time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rt](index.html) module"] pub struct RT_SPEC; impl crate::RegisterSpec for RT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rt::R](R) reader structure"] impl crate::Readable for RT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [rt::W](W) writer structure"] impl crate::Writable for RT_SPEC { type Writer = W; } #[doc = "`reset()` method sets RT to value 0x02"] impl crate::Resettable for RT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x02 } } } #[doc = "FMPCFG register accessor: an alias for `Reg`"] pub type FMPCFG = crate::Reg; #[doc = "Fast-mode-plus configure register"] pub mod fmpcfg { #[doc = "Register `FMPCFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `FMPCFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `FMPEN` reader - Fast-mode-plus enable"] pub struct FMPEN_R(crate::FieldReader); impl FMPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FMPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FMPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FMPEN` writer - Fast-mode-plus enable"] pub struct FMPEN_W<'a> { w: &'a mut W, } impl<'a> FMPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 0 - Fast-mode-plus enable"] #[inline(always)] pub fn fmpen(&self) -> FMPEN_R { FMPEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Fast-mode-plus enable"] #[inline(always)] pub fn fmpen(&mut self) -> FMPEN_W { FMPEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Fast-mode-plus configure register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fmpcfg](index.html) module"] pub struct FMPCFG_SPEC; impl crate::RegisterSpec for FMPCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [fmpcfg::R](R) reader structure"] impl crate::Readable for FMPCFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [fmpcfg::W](W) writer structure"] impl crate::Writable for FMPCFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets FMPCFG to value 0"] impl crate::Resettable for FMPCFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Inter integrated circuit"] pub struct I2C1 { _marker: PhantomData<*const ()>, } unsafe impl Send for I2C1 {} impl I2C1 { #[doc = r"Pointer to the register block"] pub const PTR: *const i2c0::RegisterBlock = 0x4000_5800 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const i2c0::RegisterBlock { Self::PTR } } impl Deref for I2C1 { type Target = i2c0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for I2C1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("I2C1").finish() } } #[doc = "Inter integrated circuit"] pub use i2c0 as i2c1; #[doc = "Power management unit"] pub struct PMU { _marker: PhantomData<*const ()>, } unsafe impl Send for PMU {} impl PMU { #[doc = r"Pointer to the register block"] pub const PTR: *const pmu::RegisterBlock = 0x4000_7000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const pmu::RegisterBlock { Self::PTR } } impl Deref for PMU { type Target = pmu::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for PMU { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("PMU").finish() } } #[doc = "Power management unit"] pub mod pmu { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - power control register"] pub ctl: crate::Reg, #[doc = "0x04 - power control/status register"] pub cs: crate::Reg, } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "power control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `LDEN` reader - Low-driver mode enable in Deep-sleep mode"] pub struct LDEN_R(crate::FieldReader); impl LDEN_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { LDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LDEN` writer - Low-driver mode enable in Deep-sleep mode"] pub struct LDEN_W<'a> { w: &'a mut W, } impl<'a> LDEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `HDS` reader - High-driver mode switch"] pub struct HDS_R(crate::FieldReader); impl HDS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HDS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HDS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HDS` writer - High-driver mode switch"] pub struct HDS_W<'a> { w: &'a mut W, } impl<'a> HDS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `HDEN` reader - High-driver mode enable"] pub struct HDEN_R(crate::FieldReader); impl HDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HDEN` writer - High-driver mode enable"] pub struct HDEN_W<'a> { w: &'a mut W, } impl<'a> HDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `LDOVS` reader - LDO output voltage select"] pub struct LDOVS_R(crate::FieldReader); impl LDOVS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { LDOVS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LDOVS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LDOVS` writer - LDO output voltage select"] pub struct LDOVS_W<'a> { w: &'a mut W, } impl<'a> LDOVS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `LDNP` reader - Low-driver mode when use normal power LDO"] pub struct LDNP_R(crate::FieldReader); impl LDNP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LDNP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LDNP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LDNP` writer - Low-driver mode when use normal power LDO"] pub struct LDNP_W<'a> { w: &'a mut W, } impl<'a> LDNP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `LDLP` reader - Low-driver mode when use low power LDO"] pub struct LDLP_R(crate::FieldReader); impl LDLP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LDLP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LDLP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LDLP` writer - Low-driver mode when use low power LDO"] pub struct LDLP_W<'a> { w: &'a mut W, } impl<'a> LDLP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `BKPWEN` reader - Backup Domain Write Enable"] pub struct BKPWEN_R(crate::FieldReader); impl BKPWEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BKPWEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BKPWEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BKPWEN` writer - Backup Domain Write Enable"] pub struct BKPWEN_W<'a> { w: &'a mut W, } impl<'a> BKPWEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `LVDT` reader - Low Voltage Detector Threshold"] pub struct LVDT_R(crate::FieldReader); impl LVDT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { LVDT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LVDT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LVDT` writer - Low Voltage Detector Threshold"] pub struct LVDT_W<'a> { w: &'a mut W, } impl<'a> LVDT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); self.w } } #[doc = "Field `LVDEN` reader - Low Voltage Detector Enable"] pub struct LVDEN_R(crate::FieldReader); impl LVDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LVDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LVDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LVDEN` writer - Low Voltage Detector Enable"] pub struct LVDEN_W<'a> { w: &'a mut W, } impl<'a> LVDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `STBRST` reader - Standby Flag Reset"] pub struct STBRST_R(crate::FieldReader); impl STBRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STBRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STBRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STBRST` writer - Standby Flag Reset"] pub struct STBRST_W<'a> { w: &'a mut W, } impl<'a> STBRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `WURST` reader - Wakeup Flag Reset"] pub struct WURST_R(crate::FieldReader); impl WURST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WURST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WURST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WURST` writer - Wakeup Flag Reset"] pub struct WURST_W<'a> { w: &'a mut W, } impl<'a> WURST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `STBMOD` reader - Standby Mode"] pub struct STBMOD_R(crate::FieldReader); impl STBMOD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STBMOD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STBMOD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STBMOD` writer - Standby Mode"] pub struct STBMOD_W<'a> { w: &'a mut W, } impl<'a> STBMOD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `LDOLP` reader - LDO Low Power Mode"] pub struct LDOLP_R(crate::FieldReader); impl LDOLP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LDOLP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LDOLP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LDOLP` writer - LDO Low Power Mode"] pub struct LDOLP_W<'a> { w: &'a mut W, } impl<'a> LDOLP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 18:19 - Low-driver mode enable in Deep-sleep mode"] #[inline(always)] pub fn lden(&self) -> LDEN_R { LDEN_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bit 17 - High-driver mode switch"] #[inline(always)] pub fn hds(&self) -> HDS_R { HDS_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - High-driver mode enable"] #[inline(always)] pub fn hden(&self) -> HDEN_R { HDEN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bits 14:15 - LDO output voltage select"] #[inline(always)] pub fn ldovs(&self) -> LDOVS_R { LDOVS_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bit 11 - Low-driver mode when use normal power LDO"] #[inline(always)] pub fn ldnp(&self) -> LDNP_R { LDNP_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Low-driver mode when use low power LDO"] #[inline(always)] pub fn ldlp(&self) -> LDLP_R { LDLP_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 8 - Backup Domain Write Enable"] #[inline(always)] pub fn bkpwen(&self) -> BKPWEN_R { BKPWEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 5:7 - Low Voltage Detector Threshold"] #[inline(always)] pub fn lvdt(&self) -> LVDT_R { LVDT_R::new(((self.bits >> 5) & 0x07) as u8) } #[doc = "Bit 4 - Low Voltage Detector Enable"] #[inline(always)] pub fn lvden(&self) -> LVDEN_R { LVDEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Standby Flag Reset"] #[inline(always)] pub fn stbrst(&self) -> STBRST_R { STBRST_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Wakeup Flag Reset"] #[inline(always)] pub fn wurst(&self) -> WURST_R { WURST_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Standby Mode"] #[inline(always)] pub fn stbmod(&self) -> STBMOD_R { STBMOD_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - LDO Low Power Mode"] #[inline(always)] pub fn ldolp(&self) -> LDOLP_R { LDOLP_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 18:19 - Low-driver mode enable in Deep-sleep mode"] #[inline(always)] pub fn lden(&mut self) -> LDEN_W { LDEN_W { w: self } } #[doc = "Bit 17 - High-driver mode switch"] #[inline(always)] pub fn hds(&mut self) -> HDS_W { HDS_W { w: self } } #[doc = "Bit 16 - High-driver mode enable"] #[inline(always)] pub fn hden(&mut self) -> HDEN_W { HDEN_W { w: self } } #[doc = "Bits 14:15 - LDO output voltage select"] #[inline(always)] pub fn ldovs(&mut self) -> LDOVS_W { LDOVS_W { w: self } } #[doc = "Bit 11 - Low-driver mode when use normal power LDO"] #[inline(always)] pub fn ldnp(&mut self) -> LDNP_W { LDNP_W { w: self } } #[doc = "Bit 10 - Low-driver mode when use low power LDO"] #[inline(always)] pub fn ldlp(&mut self) -> LDLP_W { LDLP_W { w: self } } #[doc = "Bit 8 - Backup Domain Write Enable"] #[inline(always)] pub fn bkpwen(&mut self) -> BKPWEN_W { BKPWEN_W { w: self } } #[doc = "Bits 5:7 - Low Voltage Detector Threshold"] #[inline(always)] pub fn lvdt(&mut self) -> LVDT_W { LVDT_W { w: self } } #[doc = "Bit 4 - Low Voltage Detector Enable"] #[inline(always)] pub fn lvden(&mut self) -> LVDEN_W { LVDEN_W { w: self } } #[doc = "Bit 3 - Standby Flag Reset"] #[inline(always)] pub fn stbrst(&mut self) -> STBRST_W { STBRST_W { w: self } } #[doc = "Bit 2 - Wakeup Flag Reset"] #[inline(always)] pub fn wurst(&mut self) -> WURST_W { WURST_W { w: self } } #[doc = "Bit 1 - Standby Mode"] #[inline(always)] pub fn stbmod(&mut self) -> STBMOD_W { STBMOD_W { w: self } } #[doc = "Bit 0 - LDO Low Power Mode"] #[inline(always)] pub fn ldolp(&mut self) -> LDOLP_W { LDOLP_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "power control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CS register accessor: an alias for `Reg`"] pub type CS = crate::Reg; #[doc = "power control/status register"] pub mod cs { #[doc = "Register `CS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CS` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `LDRF` reader - Low-driver mode ready flag"] pub struct LDRF_R(crate::FieldReader); impl LDRF_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { LDRF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LDRF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LDRF` writer - Low-driver mode ready flag"] pub struct LDRF_W<'a> { w: &'a mut W, } impl<'a> LDRF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `HDSRF` reader - High-driver switch ready flag"] pub struct HDSRF_R(crate::FieldReader); impl HDSRF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HDSRF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HDSRF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HDSRF` writer - High-driver switch ready flag"] pub struct HDSRF_W<'a> { w: &'a mut W, } impl<'a> HDSRF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `HDRF` reader - High-driver ready flag"] pub struct HDRF_R(crate::FieldReader); impl HDRF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HDRF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HDRF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HDRF` writer - High-driver ready flag"] pub struct HDRF_W<'a> { w: &'a mut W, } impl<'a> HDRF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `LDOVSRF` reader - LDO voltage select ready flag"] pub struct LDOVSRF_R(crate::FieldReader); impl LDOVSRF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LDOVSRF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LDOVSRF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LDOVSRF` writer - LDO voltage select ready flag"] pub struct LDOVSRF_W<'a> { w: &'a mut W, } impl<'a> LDOVSRF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `WUPEN6` reader - WKUP pin6 Enable"] pub struct WUPEN6_R(crate::FieldReader); impl WUPEN6_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WUPEN6_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WUPEN6_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WUPEN6` writer - WKUP pin6 Enable"] pub struct WUPEN6_W<'a> { w: &'a mut W, } impl<'a> WUPEN6_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `WUPEN5` reader - WKUP pin5 Enable"] pub struct WUPEN5_R(crate::FieldReader); impl WUPEN5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WUPEN5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WUPEN5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WUPEN5` writer - WKUP pin5 Enable"] pub struct WUPEN5_W<'a> { w: &'a mut W, } impl<'a> WUPEN5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `WUPEN4` reader - WKUP pin4 Enable"] pub struct WUPEN4_R(crate::FieldReader); impl WUPEN4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WUPEN4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WUPEN4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WUPEN4` writer - WKUP pin4 Enable"] pub struct WUPEN4_W<'a> { w: &'a mut W, } impl<'a> WUPEN4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `WUPEN1` reader - WKUP pin1 Enable"] pub struct WUPEN1_R(crate::FieldReader); impl WUPEN1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WUPEN1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WUPEN1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WUPEN1` writer - WKUP pin1 Enable"] pub struct WUPEN1_W<'a> { w: &'a mut W, } impl<'a> WUPEN1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `WUPEN0` reader - WKUP pin0 Enable"] pub struct WUPEN0_R(crate::FieldReader); impl WUPEN0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WUPEN0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WUPEN0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WUPEN0` writer - WKUP pin0 Enable"] pub struct WUPEN0_W<'a> { w: &'a mut W, } impl<'a> WUPEN0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `LVDF` reader - Low Voltage Detector Status Flag"] pub struct LVDF_R(crate::FieldReader); impl LVDF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LVDF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LVDF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STBF` reader - Standby flag"] pub struct STBF_R(crate::FieldReader); impl STBF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STBF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STBF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WUF` reader - Wakeup flag"] pub struct WUF_R(crate::FieldReader); impl WUF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WUF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WUF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 18:19 - Low-driver mode ready flag"] #[inline(always)] pub fn ldrf(&self) -> LDRF_R { LDRF_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bit 17 - High-driver switch ready flag"] #[inline(always)] pub fn hdsrf(&self) -> HDSRF_R { HDSRF_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - High-driver ready flag"] #[inline(always)] pub fn hdrf(&self) -> HDRF_R { HDRF_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - LDO voltage select ready flag"] #[inline(always)] pub fn ldovsrf(&self) -> LDOVSRF_R { LDOVSRF_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - WKUP pin6 Enable"] #[inline(always)] pub fn wupen6(&self) -> WUPEN6_R { WUPEN6_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - WKUP pin5 Enable"] #[inline(always)] pub fn wupen5(&self) -> WUPEN5_R { WUPEN5_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - WKUP pin4 Enable"] #[inline(always)] pub fn wupen4(&self) -> WUPEN4_R { WUPEN4_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 9 - WKUP pin1 Enable"] #[inline(always)] pub fn wupen1(&self) -> WUPEN1_R { WUPEN1_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - WKUP pin0 Enable"] #[inline(always)] pub fn wupen0(&self) -> WUPEN0_R { WUPEN0_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 2 - Low Voltage Detector Status Flag"] #[inline(always)] pub fn lvdf(&self) -> LVDF_R { LVDF_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Standby flag"] #[inline(always)] pub fn stbf(&self) -> STBF_R { STBF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Wakeup flag"] #[inline(always)] pub fn wuf(&self) -> WUF_R { WUF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 18:19 - Low-driver mode ready flag"] #[inline(always)] pub fn ldrf(&mut self) -> LDRF_W { LDRF_W { w: self } } #[doc = "Bit 17 - High-driver switch ready flag"] #[inline(always)] pub fn hdsrf(&mut self) -> HDSRF_W { HDSRF_W { w: self } } #[doc = "Bit 16 - High-driver ready flag"] #[inline(always)] pub fn hdrf(&mut self) -> HDRF_W { HDRF_W { w: self } } #[doc = "Bit 15 - LDO voltage select ready flag"] #[inline(always)] pub fn ldovsrf(&mut self) -> LDOVSRF_W { LDOVSRF_W { w: self } } #[doc = "Bit 14 - WKUP pin6 Enable"] #[inline(always)] pub fn wupen6(&mut self) -> WUPEN6_W { WUPEN6_W { w: self } } #[doc = "Bit 13 - WKUP pin5 Enable"] #[inline(always)] pub fn wupen5(&mut self) -> WUPEN5_W { WUPEN5_W { w: self } } #[doc = "Bit 12 - WKUP pin4 Enable"] #[inline(always)] pub fn wupen4(&mut self) -> WUPEN4_W { WUPEN4_W { w: self } } #[doc = "Bit 9 - WKUP pin1 Enable"] #[inline(always)] pub fn wupen1(&mut self) -> WUPEN1_W { WUPEN1_W { w: self } } #[doc = "Bit 8 - WKUP pin0 Enable"] #[inline(always)] pub fn wupen0(&mut self) -> WUPEN0_W { WUPEN0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "power control/status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cs](index.html) module"] pub struct CS_SPEC; impl crate::RegisterSpec for CS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cs::R](R) reader structure"] impl crate::Readable for CS_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cs::W](W) writer structure"] impl crate::Writable for CS_SPEC { type Writer = W; } #[doc = "`reset()` method sets CS to value 0"] impl crate::Resettable for CS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Reset and clock unit"] pub struct RCU { _marker: PhantomData<*const ()>, } unsafe impl Send for RCU {} impl RCU { #[doc = r"Pointer to the register block"] pub const PTR: *const rcu::RegisterBlock = 0x4002_1000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const rcu::RegisterBlock { Self::PTR } } impl Deref for RCU { type Target = rcu::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for RCU { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("RCU").finish() } } #[doc = "Reset and clock unit"] pub mod rcu { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Control register 0"] pub ctl0: crate::Reg, #[doc = "0x04 - Clock configuration register 0 (RCU_CFG0)"] pub cfg0: crate::Reg, #[doc = "0x08 - Clock interrupt register (RCU_INT)"] pub int: crate::Reg, #[doc = "0x0c - APB2 reset register (RCU_APB2RST)"] pub apb2rst: crate::Reg, #[doc = "0x10 - APB1 reset register (RCU_APB1RST)"] pub apb1rst: crate::Reg, #[doc = "0x14 - AHB enable register (RCU_AHBEN)"] pub ahben: crate::Reg, #[doc = "0x18 - APB2 enable register (RCU_APB2EN)"] pub apb2en: crate::Reg, #[doc = "0x1c - APB1 enable register (RCU_APB1EN)"] pub apb1en: crate::Reg, #[doc = "0x20 - Backup domain control register (RCU_BDCTL)"] pub bdctl: crate::Reg, #[doc = "0x24 - Reset source /clock register (RCU_RSTSCK)"] pub rstsck: crate::Reg, #[doc = "0x28 - AHB reset register"] pub ahbrst: crate::Reg, #[doc = "0x2c - Configuration register 1"] pub cfg1: crate::Reg, #[doc = "0x30 - Configuration register 2"] pub cfg2: crate::Reg, #[doc = "0x34 - Control register 1"] pub ctl1: crate::Reg, _reserved14: [u8; 0x88], #[doc = "0xc0 - Additional clock control register"] pub addctl: crate::Reg, _reserved15: [u8; 0x08], #[doc = "0xcc - Additional clock interrupt register"] pub addint: crate::Reg, _reserved16: [u8; 0x28], #[doc = "0xf8 - APB1 additional enable register"] pub addapb1en: crate::Reg, #[doc = "0xfc - APB1 additional reset register"] pub addapb1rst: crate::Reg, #[doc = "0x100 - Voltage key register"] pub vkey: crate::Reg, _reserved19: [u8; 0x30], #[doc = "0x134 - Deep-sleep mode voltage register"] pub dsv: crate::Reg, } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "Control register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PLLSTB` reader - PLL Clock Stabilization Flag"] pub struct PLLSTB_R(crate::FieldReader); impl PLLSTB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PLLSTB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLSTB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLEN` reader - PLL enable"] pub struct PLLEN_R(crate::FieldReader); impl PLLEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PLLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLEN` writer - PLL enable"] pub struct PLLEN_W<'a> { w: &'a mut W, } impl<'a> PLLEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `CKMEN` reader - HXTAL Clock Monitor Enable"] pub struct CKMEN_R(crate::FieldReader); impl CKMEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKMEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKMEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKMEN` writer - HXTAL Clock Monitor Enable"] pub struct CKMEN_W<'a> { w: &'a mut W, } impl<'a> CKMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `HXTALBPS` reader - External crystal oscillator (HXTAL) clock bypass mode enable"] pub struct HXTALBPS_R(crate::FieldReader); impl HXTALBPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HXTALBPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HXTALBPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HXTALBPS` writer - External crystal oscillator (HXTAL) clock bypass mode enable"] pub struct HXTALBPS_W<'a> { w: &'a mut W, } impl<'a> HXTALBPS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `HXTALSTB` reader - External crystal oscillator (HXTAL) clock stabilization flag"] pub struct HXTALSTB_R(crate::FieldReader); impl HXTALSTB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HXTALSTB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HXTALSTB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HXTALEN` reader - External High Speed oscillator Enable"] pub struct HXTALEN_R(crate::FieldReader); impl HXTALEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HXTALEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HXTALEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HXTALEN` writer - External High Speed oscillator Enable"] pub struct HXTALEN_W<'a> { w: &'a mut W, } impl<'a> HXTALEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `IRC8MCALIB` reader - High Speed Internal Oscillator calibration value register"] pub struct IRC8MCALIB_R(crate::FieldReader); impl IRC8MCALIB_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { IRC8MCALIB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC8MCALIB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC8MADJ` reader - High Speed Internal Oscillator clock trim adjust value"] pub struct IRC8MADJ_R(crate::FieldReader); impl IRC8MADJ_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { IRC8MADJ_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC8MADJ_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC8MADJ` writer - High Speed Internal Oscillator clock trim adjust value"] pub struct IRC8MADJ_W<'a> { w: &'a mut W, } impl<'a> IRC8MADJ_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 3)) | ((value as u32 & 0x1f) << 3); self.w } } #[doc = "Field `IRC8MSTB` reader - IRC8M High Speed Internal Oscillator stabilization Flag"] pub struct IRC8MSTB_R(crate::FieldReader); impl IRC8MSTB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC8MSTB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC8MSTB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC8MEN` reader - Internal High Speed oscillator Enable"] pub struct IRC8MEN_R(crate::FieldReader); impl IRC8MEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC8MEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC8MEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC8MEN` writer - Internal High Speed oscillator Enable"] pub struct IRC8MEN_W<'a> { w: &'a mut W, } impl<'a> IRC8MEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 25 - PLL Clock Stabilization Flag"] #[inline(always)] pub fn pllstb(&self) -> PLLSTB_R { PLLSTB_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 24 - PLL enable"] #[inline(always)] pub fn pllen(&self) -> PLLEN_R { PLLEN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 19 - HXTAL Clock Monitor Enable"] #[inline(always)] pub fn ckmen(&self) -> CKMEN_R { CKMEN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - External crystal oscillator (HXTAL) clock bypass mode enable"] #[inline(always)] pub fn hxtalbps(&self) -> HXTALBPS_R { HXTALBPS_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - External crystal oscillator (HXTAL) clock stabilization flag"] #[inline(always)] pub fn hxtalstb(&self) -> HXTALSTB_R { HXTALSTB_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - External High Speed oscillator Enable"] #[inline(always)] pub fn hxtalen(&self) -> HXTALEN_R { HXTALEN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bits 8:15 - High Speed Internal Oscillator calibration value register"] #[inline(always)] pub fn irc8mcalib(&self) -> IRC8MCALIB_R { IRC8MCALIB_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 3:7 - High Speed Internal Oscillator clock trim adjust value"] #[inline(always)] pub fn irc8madj(&self) -> IRC8MADJ_R { IRC8MADJ_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bit 1 - IRC8M High Speed Internal Oscillator stabilization Flag"] #[inline(always)] pub fn irc8mstb(&self) -> IRC8MSTB_R { IRC8MSTB_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Internal High Speed oscillator Enable"] #[inline(always)] pub fn irc8men(&self) -> IRC8MEN_R { IRC8MEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 24 - PLL enable"] #[inline(always)] pub fn pllen(&mut self) -> PLLEN_W { PLLEN_W { w: self } } #[doc = "Bit 19 - HXTAL Clock Monitor Enable"] #[inline(always)] pub fn ckmen(&mut self) -> CKMEN_W { CKMEN_W { w: self } } #[doc = "Bit 18 - External crystal oscillator (HXTAL) clock bypass mode enable"] #[inline(always)] pub fn hxtalbps(&mut self) -> HXTALBPS_W { HXTALBPS_W { w: self } } #[doc = "Bit 16 - External High Speed oscillator Enable"] #[inline(always)] pub fn hxtalen(&mut self) -> HXTALEN_W { HXTALEN_W { w: self } } #[doc = "Bits 3:7 - High Speed Internal Oscillator clock trim adjust value"] #[inline(always)] pub fn irc8madj(&mut self) -> IRC8MADJ_W { IRC8MADJ_W { w: self } } #[doc = "Bit 0 - Internal High Speed oscillator Enable"] #[inline(always)] pub fn irc8men(&mut self) -> IRC8MEN_W { IRC8MEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0x83"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x83 } } } #[doc = "CFG0 register accessor: an alias for `Reg`"] pub type CFG0 = crate::Reg; #[doc = "Clock configuration register 0 (RCU_CFG0)"] pub mod cfg0 { #[doc = "Register `CFG0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PLLDV` reader - The CK_PLL divide by 1 or 2 for CK_OUT"] pub struct PLLDV_R(crate::FieldReader); impl PLLDV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PLLDV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLDV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLDV` writer - The CK_PLL divide by 1 or 2 for CK_OUT"] pub struct PLLDV_W<'a> { w: &'a mut W, } impl<'a> PLLDV_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `CKOUTDIV` reader - The CK_OUT divider which the CK_OUT frequency can be reduced"] pub struct CKOUTDIV_R(crate::FieldReader); impl CKOUTDIV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CKOUTDIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKOUTDIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKOUTDIV` writer - The CK_OUT divider which the CK_OUT frequency can be reduced"] pub struct CKOUTDIV_W<'a> { w: &'a mut W, } impl<'a> CKOUTDIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 28)) | ((value as u32 & 0x07) << 28); self.w } } #[doc = "Field `PLLMF_MSB` reader - Bit 4 of PLLMF register"] pub struct PLLMF_MSB_R(crate::FieldReader); impl PLLMF_MSB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PLLMF_MSB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLMF_MSB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLMF_MSB` writer - Bit 4 of PLLMF register"] pub struct PLLMF_MSB_W<'a> { w: &'a mut W, } impl<'a> PLLMF_MSB_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CKOUTSEL` reader - CK_OUT Clock Source Selection"] pub struct CKOUTSEL_R(crate::FieldReader); impl CKOUTSEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CKOUTSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKOUTSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKOUTSEL` writer - CK_OUT Clock Source Selection"] pub struct CKOUTSEL_W<'a> { w: &'a mut W, } impl<'a> CKOUTSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 24)) | ((value as u32 & 0x07) << 24); self.w } } #[doc = "Field `USBFSPSC` reader - USBFS clock prescaler selection"] pub struct USBFSPSC_R(crate::FieldReader); impl USBFSPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { USBFSPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBFSPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBFSPSC` writer - USBFS clock prescaler selection"] pub struct USBFSPSC_W<'a> { w: &'a mut W, } impl<'a> USBFSPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 22)) | ((value as u32 & 0x03) << 22); self.w } } #[doc = "Field `PLLMF` reader - PLL multiply factor"] pub struct PLLMF_R(crate::FieldReader); impl PLLMF_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PLLMF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLMF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLMF` writer - PLL multiply factor"] pub struct PLLMF_W<'a> { w: &'a mut W, } impl<'a> PLLMF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 18)) | ((value as u32 & 0x0f) << 18); self.w } } #[doc = "Field `PLLPREDV` reader - HXTAL divider for PLL source clock selection."] pub struct PLLPREDV_R(crate::FieldReader); impl PLLPREDV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PLLPREDV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLPREDV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLPREDV` writer - HXTAL divider for PLL source clock selection."] pub struct PLLPREDV_W<'a> { w: &'a mut W, } impl<'a> PLLPREDV_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `PLLSEL` reader - PLL Clock Source Selection"] pub struct PLLSEL_R(crate::FieldReader); impl PLLSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PLLSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLSEL` writer - PLL Clock Source Selection"] pub struct PLLSEL_W<'a> { w: &'a mut W, } impl<'a> PLLSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `ADCPSC` reader - ADC clock prescaler selection"] pub struct ADCPSC_R(crate::FieldReader); impl ADCPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ADCPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADCPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADCPSC` writer - ADC clock prescaler selection"] pub struct ADCPSC_W<'a> { w: &'a mut W, } impl<'a> ADCPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 14)) | ((value as u32 & 0x03) << 14); self.w } } #[doc = "Field `APB2PSC` reader - APB2 prescaler selection"] pub struct APB2PSC_R(crate::FieldReader); impl APB2PSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { APB2PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for APB2PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `APB2PSC` writer - APB2 prescaler selection"] pub struct APB2PSC_W<'a> { w: &'a mut W, } impl<'a> APB2PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 11)) | ((value as u32 & 0x07) << 11); self.w } } #[doc = "Field `APB1PSC` reader - APB1 prescaler selection"] pub struct APB1PSC_R(crate::FieldReader); impl APB1PSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { APB1PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for APB1PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `APB1PSC` writer - APB1 prescaler selection"] pub struct APB1PSC_W<'a> { w: &'a mut W, } impl<'a> APB1PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 8)) | ((value as u32 & 0x07) << 8); self.w } } #[doc = "Field `AHBPSC` reader - AHB prescaler selection"] pub struct AHBPSC_R(crate::FieldReader); impl AHBPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { AHBPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for AHBPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `AHBPSC` writer - AHB prescaler selection"] pub struct AHBPSC_W<'a> { w: &'a mut W, } impl<'a> AHBPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `SCSS` reader - System clock switch status"] pub struct SCSS_R(crate::FieldReader); impl SCSS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SCSS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCSS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCS` reader - System clock switch"] pub struct SCS_R(crate::FieldReader); impl SCS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SCS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCS` writer - System clock switch"] pub struct SCS_W<'a> { w: &'a mut W, } impl<'a> SCS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bit 31 - The CK_PLL divide by 1 or 2 for CK_OUT"] #[inline(always)] pub fn plldv(&self) -> PLLDV_R { PLLDV_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bits 28:30 - The CK_OUT divider which the CK_OUT frequency can be reduced"] #[inline(always)] pub fn ckoutdiv(&self) -> CKOUTDIV_R { CKOUTDIV_R::new(((self.bits >> 28) & 0x07) as u8) } #[doc = "Bit 27 - Bit 4 of PLLMF register"] #[inline(always)] pub fn pllmf_msb(&self) -> PLLMF_MSB_R { PLLMF_MSB_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bits 24:26 - CK_OUT Clock Source Selection"] #[inline(always)] pub fn ckoutsel(&self) -> CKOUTSEL_R { CKOUTSEL_R::new(((self.bits >> 24) & 0x07) as u8) } #[doc = "Bits 22:23 - USBFS clock prescaler selection"] #[inline(always)] pub fn usbfspsc(&self) -> USBFSPSC_R { USBFSPSC_R::new(((self.bits >> 22) & 0x03) as u8) } #[doc = "Bits 18:21 - PLL multiply factor"] #[inline(always)] pub fn pllmf(&self) -> PLLMF_R { PLLMF_R::new(((self.bits >> 18) & 0x0f) as u8) } #[doc = "Bit 17 - HXTAL divider for PLL source clock selection."] #[inline(always)] pub fn pllpredv(&self) -> PLLPREDV_R { PLLPREDV_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - PLL Clock Source Selection"] #[inline(always)] pub fn pllsel(&self) -> PLLSEL_R { PLLSEL_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bits 14:15 - ADC clock prescaler selection"] #[inline(always)] pub fn adcpsc(&self) -> ADCPSC_R { ADCPSC_R::new(((self.bits >> 14) & 0x03) as u8) } #[doc = "Bits 11:13 - APB2 prescaler selection"] #[inline(always)] pub fn apb2psc(&self) -> APB2PSC_R { APB2PSC_R::new(((self.bits >> 11) & 0x07) as u8) } #[doc = "Bits 8:10 - APB1 prescaler selection"] #[inline(always)] pub fn apb1psc(&self) -> APB1PSC_R { APB1PSC_R::new(((self.bits >> 8) & 0x07) as u8) } #[doc = "Bits 4:7 - AHB prescaler selection"] #[inline(always)] pub fn ahbpsc(&self) -> AHBPSC_R { AHBPSC_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 2:3 - System clock switch status"] #[inline(always)] pub fn scss(&self) -> SCSS_R { SCSS_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - System clock switch"] #[inline(always)] pub fn scs(&self) -> SCS_R { SCS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bit 31 - The CK_PLL divide by 1 or 2 for CK_OUT"] #[inline(always)] pub fn plldv(&mut self) -> PLLDV_W { PLLDV_W { w: self } } #[doc = "Bits 28:30 - The CK_OUT divider which the CK_OUT frequency can be reduced"] #[inline(always)] pub fn ckoutdiv(&mut self) -> CKOUTDIV_W { CKOUTDIV_W { w: self } } #[doc = "Bit 27 - Bit 4 of PLLMF register"] #[inline(always)] pub fn pllmf_msb(&mut self) -> PLLMF_MSB_W { PLLMF_MSB_W { w: self } } #[doc = "Bits 24:26 - CK_OUT Clock Source Selection"] #[inline(always)] pub fn ckoutsel(&mut self) -> CKOUTSEL_W { CKOUTSEL_W { w: self } } #[doc = "Bits 22:23 - USBFS clock prescaler selection"] #[inline(always)] pub fn usbfspsc(&mut self) -> USBFSPSC_W { USBFSPSC_W { w: self } } #[doc = "Bits 18:21 - PLL multiply factor"] #[inline(always)] pub fn pllmf(&mut self) -> PLLMF_W { PLLMF_W { w: self } } #[doc = "Bit 17 - HXTAL divider for PLL source clock selection."] #[inline(always)] pub fn pllpredv(&mut self) -> PLLPREDV_W { PLLPREDV_W { w: self } } #[doc = "Bit 16 - PLL Clock Source Selection"] #[inline(always)] pub fn pllsel(&mut self) -> PLLSEL_W { PLLSEL_W { w: self } } #[doc = "Bits 14:15 - ADC clock prescaler selection"] #[inline(always)] pub fn adcpsc(&mut self) -> ADCPSC_W { ADCPSC_W { w: self } } #[doc = "Bits 11:13 - APB2 prescaler selection"] #[inline(always)] pub fn apb2psc(&mut self) -> APB2PSC_W { APB2PSC_W { w: self } } #[doc = "Bits 8:10 - APB1 prescaler selection"] #[inline(always)] pub fn apb1psc(&mut self) -> APB1PSC_W { APB1PSC_W { w: self } } #[doc = "Bits 4:7 - AHB prescaler selection"] #[inline(always)] pub fn ahbpsc(&mut self) -> AHBPSC_W { AHBPSC_W { w: self } } #[doc = "Bits 0:1 - System clock switch"] #[inline(always)] pub fn scs(&mut self) -> SCS_W { SCS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Clock configuration register 0 (RCU_CFG0)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"] pub struct CFG0_SPEC; impl crate::RegisterSpec for CFG0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg0::R](R) reader structure"] impl crate::Readable for CFG0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"] impl crate::Writable for CFG0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG0 to value 0"] impl crate::Resettable for CFG0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INT register accessor: an alias for `Reg`"] pub type INT = crate::Reg; #[doc = "Clock interrupt register (RCU_INT)"] pub mod int { #[doc = "Register `INT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CKMIC` writer - HXTAL Clock Stuck Interrupt Clear"] pub struct CKMIC_W<'a> { w: &'a mut W, } impl<'a> CKMIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `IRC28MSTBIC` writer - IRC28M stabilization Interrupt Clear"] pub struct IRC28MSTBIC_W<'a> { w: &'a mut W, } impl<'a> IRC28MSTBIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `PLLSTBIC` writer - PLL stabilization Interrupt Clear"] pub struct PLLSTBIC_W<'a> { w: &'a mut W, } impl<'a> PLLSTBIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `HXTALSTBIC` writer - HXTAL Stabilization Interrupt Clear"] pub struct HXTALSTBIC_W<'a> { w: &'a mut W, } impl<'a> HXTALSTBIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `IRC8MSTBIC` writer - IRC8M Stabilization Interrupt Clear"] pub struct IRC8MSTBIC_W<'a> { w: &'a mut W, } impl<'a> IRC8MSTBIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `LXTALSTBIC` writer - LXTAL Stabilization Interrupt Clear"] pub struct LXTALSTBIC_W<'a> { w: &'a mut W, } impl<'a> LXTALSTBIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `IRC40KSTBIC` writer - IRC40K Stabilization Interrupt Clear"] pub struct IRC40KSTBIC_W<'a> { w: &'a mut W, } impl<'a> IRC40KSTBIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `IRC28MSTBIE` reader - IRC28M Stabilization Interrupt Enable"] pub struct IRC28MSTBIE_R(crate::FieldReader); impl IRC28MSTBIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC28MSTBIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC28MSTBIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC28MSTBIE` writer - IRC28M Stabilization Interrupt Enable"] pub struct IRC28MSTBIE_W<'a> { w: &'a mut W, } impl<'a> IRC28MSTBIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `PLLSTBIE` reader - PLL Stabilization Interrupt Enable"] pub struct PLLSTBIE_R(crate::FieldReader); impl PLLSTBIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PLLSTBIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLSTBIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLSTBIE` writer - PLL Stabilization Interrupt Enable"] pub struct PLLSTBIE_W<'a> { w: &'a mut W, } impl<'a> PLLSTBIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `HXTALSTBIE` reader - HXTAL Stabilization Interrupt Enable"] pub struct HXTALSTBIE_R(crate::FieldReader); impl HXTALSTBIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HXTALSTBIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HXTALSTBIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HXTALSTBIE` writer - HXTAL Stabilization Interrupt Enable"] pub struct HXTALSTBIE_W<'a> { w: &'a mut W, } impl<'a> HXTALSTBIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `IRC8MSTBIE` reader - IRC8M Stabilization Interrupt Enable"] pub struct IRC8MSTBIE_R(crate::FieldReader); impl IRC8MSTBIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC8MSTBIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC8MSTBIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC8MSTBIE` writer - IRC8M Stabilization Interrupt Enable"] pub struct IRC8MSTBIE_W<'a> { w: &'a mut W, } impl<'a> IRC8MSTBIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `LXTALSTBIE` reader - LXTAL Stabilization Interrupt Enable"] pub struct LXTALSTBIE_R(crate::FieldReader); impl LXTALSTBIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LXTALSTBIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LXTALSTBIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LXTALSTBIE` writer - LXTAL Stabilization Interrupt Enable"] pub struct LXTALSTBIE_W<'a> { w: &'a mut W, } impl<'a> LXTALSTBIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `IRC40KSTBIE` reader - IRC40K Stabilization interrupt enable"] pub struct IRC40KSTBIE_R(crate::FieldReader); impl IRC40KSTBIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC40KSTBIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC40KSTBIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC40KSTBIE` writer - IRC40K Stabilization interrupt enable"] pub struct IRC40KSTBIE_W<'a> { w: &'a mut W, } impl<'a> IRC40KSTBIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CKMIF` reader - HXTAL Clock Stuck Interrupt Flag"] pub struct CKMIF_R(crate::FieldReader); impl CKMIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKMIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKMIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC28MSTBIF` reader - IRC28M stabilization interrupt flag"] pub struct IRC28MSTBIF_R(crate::FieldReader); impl IRC28MSTBIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC28MSTBIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC28MSTBIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLSTBIF` reader - PLL stabilization interrupt flag"] pub struct PLLSTBIF_R(crate::FieldReader); impl PLLSTBIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PLLSTBIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLSTBIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HXTALSTBIF` reader - HXTAL stabilization interrupt flag"] pub struct HXTALSTBIF_R(crate::FieldReader); impl HXTALSTBIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HXTALSTBIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HXTALSTBIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC8MSTBIF` reader - IRC8M stabilization interrupt flag"] pub struct IRC8MSTBIF_R(crate::FieldReader); impl IRC8MSTBIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC8MSTBIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC8MSTBIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LXTALSTBIF` reader - LXTAL stabilization interrupt flag"] pub struct LXTALSTBIF_R(crate::FieldReader); impl LXTALSTBIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LXTALSTBIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LXTALSTBIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC40KSTBIF` reader - IRC40K stabilization interrupt flag"] pub struct IRC40KSTBIF_R(crate::FieldReader); impl IRC40KSTBIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC40KSTBIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC40KSTBIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 13 - IRC28M Stabilization Interrupt Enable"] #[inline(always)] pub fn irc28mstbie(&self) -> IRC28MSTBIE_R { IRC28MSTBIE_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - PLL Stabilization Interrupt Enable"] #[inline(always)] pub fn pllstbie(&self) -> PLLSTBIE_R { PLLSTBIE_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - HXTAL Stabilization Interrupt Enable"] #[inline(always)] pub fn hxtalstbie(&self) -> HXTALSTBIE_R { HXTALSTBIE_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - IRC8M Stabilization Interrupt Enable"] #[inline(always)] pub fn irc8mstbie(&self) -> IRC8MSTBIE_R { IRC8MSTBIE_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - LXTAL Stabilization Interrupt Enable"] #[inline(always)] pub fn lxtalstbie(&self) -> LXTALSTBIE_R { LXTALSTBIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - IRC40K Stabilization interrupt enable"] #[inline(always)] pub fn irc40kstbie(&self) -> IRC40KSTBIE_R { IRC40KSTBIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - HXTAL Clock Stuck Interrupt Flag"] #[inline(always)] pub fn ckmif(&self) -> CKMIF_R { CKMIF_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 5 - IRC28M stabilization interrupt flag"] #[inline(always)] pub fn irc28mstbif(&self) -> IRC28MSTBIF_R { IRC28MSTBIF_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - PLL stabilization interrupt flag"] #[inline(always)] pub fn pllstbif(&self) -> PLLSTBIF_R { PLLSTBIF_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - HXTAL stabilization interrupt flag"] #[inline(always)] pub fn hxtalstbif(&self) -> HXTALSTBIF_R { HXTALSTBIF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - IRC8M stabilization interrupt flag"] #[inline(always)] pub fn irc8mstbif(&self) -> IRC8MSTBIF_R { IRC8MSTBIF_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - LXTAL stabilization interrupt flag"] #[inline(always)] pub fn lxtalstbif(&self) -> LXTALSTBIF_R { LXTALSTBIF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - IRC40K stabilization interrupt flag"] #[inline(always)] pub fn irc40kstbif(&self) -> IRC40KSTBIF_R { IRC40KSTBIF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 23 - HXTAL Clock Stuck Interrupt Clear"] #[inline(always)] pub fn ckmic(&mut self) -> CKMIC_W { CKMIC_W { w: self } } #[doc = "Bit 21 - IRC28M stabilization Interrupt Clear"] #[inline(always)] pub fn irc28mstbic(&mut self) -> IRC28MSTBIC_W { IRC28MSTBIC_W { w: self } } #[doc = "Bit 20 - PLL stabilization Interrupt Clear"] #[inline(always)] pub fn pllstbic(&mut self) -> PLLSTBIC_W { PLLSTBIC_W { w: self } } #[doc = "Bit 19 - HXTAL Stabilization Interrupt Clear"] #[inline(always)] pub fn hxtalstbic(&mut self) -> HXTALSTBIC_W { HXTALSTBIC_W { w: self } } #[doc = "Bit 18 - IRC8M Stabilization Interrupt Clear"] #[inline(always)] pub fn irc8mstbic(&mut self) -> IRC8MSTBIC_W { IRC8MSTBIC_W { w: self } } #[doc = "Bit 17 - LXTAL Stabilization Interrupt Clear"] #[inline(always)] pub fn lxtalstbic(&mut self) -> LXTALSTBIC_W { LXTALSTBIC_W { w: self } } #[doc = "Bit 16 - IRC40K Stabilization Interrupt Clear"] #[inline(always)] pub fn irc40kstbic(&mut self) -> IRC40KSTBIC_W { IRC40KSTBIC_W { w: self } } #[doc = "Bit 13 - IRC28M Stabilization Interrupt Enable"] #[inline(always)] pub fn irc28mstbie(&mut self) -> IRC28MSTBIE_W { IRC28MSTBIE_W { w: self } } #[doc = "Bit 12 - PLL Stabilization Interrupt Enable"] #[inline(always)] pub fn pllstbie(&mut self) -> PLLSTBIE_W { PLLSTBIE_W { w: self } } #[doc = "Bit 11 - HXTAL Stabilization Interrupt Enable"] #[inline(always)] pub fn hxtalstbie(&mut self) -> HXTALSTBIE_W { HXTALSTBIE_W { w: self } } #[doc = "Bit 10 - IRC8M Stabilization Interrupt Enable"] #[inline(always)] pub fn irc8mstbie(&mut self) -> IRC8MSTBIE_W { IRC8MSTBIE_W { w: self } } #[doc = "Bit 9 - LXTAL Stabilization Interrupt Enable"] #[inline(always)] pub fn lxtalstbie(&mut self) -> LXTALSTBIE_W { LXTALSTBIE_W { w: self } } #[doc = "Bit 8 - IRC40K Stabilization interrupt enable"] #[inline(always)] pub fn irc40kstbie(&mut self) -> IRC40KSTBIE_W { IRC40KSTBIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Clock interrupt register (RCU_INT)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int](index.html) module"] pub struct INT_SPEC; impl crate::RegisterSpec for INT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [int::R](R) reader structure"] impl crate::Readable for INT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [int::W](W) writer structure"] impl crate::Writable for INT_SPEC { type Writer = W; } #[doc = "`reset()` method sets INT to value 0"] impl crate::Resettable for INT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "APB2RST register accessor: an alias for `Reg`"] pub type APB2RST = crate::Reg; #[doc = "APB2 reset register (RCU_APB2RST)"] pub mod apb2rst { #[doc = "Register `APB2RST` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `APB2RST` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TIMER16RST` reader - TIMER16 reset"] pub struct TIMER16RST_R(crate::FieldReader); impl TIMER16RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER16RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER16RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER16RST` writer - TIMER16 reset"] pub struct TIMER16RST_W<'a> { w: &'a mut W, } impl<'a> TIMER16RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `TIMER15RST` reader - TIMER15 reset"] pub struct TIMER15RST_R(crate::FieldReader); impl TIMER15RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER15RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER15RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER15RST` writer - TIMER15 reset"] pub struct TIMER15RST_W<'a> { w: &'a mut W, } impl<'a> TIMER15RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `TIMER14RST` reader - TIMER14 reset"] pub struct TIMER14RST_R(crate::FieldReader); impl TIMER14RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER14RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER14RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER14RST` writer - TIMER14 reset"] pub struct TIMER14RST_W<'a> { w: &'a mut W, } impl<'a> TIMER14RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `USART0RST` reader - USART0 Reset"] pub struct USART0RST_R(crate::FieldReader); impl USART0RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USART0RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USART0RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USART0RST` writer - USART0 Reset"] pub struct USART0RST_W<'a> { w: &'a mut W, } impl<'a> USART0RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `SPI0RST` reader - SPI0 Reset"] pub struct SPI0RST_R(crate::FieldReader); impl SPI0RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPI0RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPI0RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPI0RST` writer - SPI0 Reset"] pub struct SPI0RST_W<'a> { w: &'a mut W, } impl<'a> SPI0RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TIMER0RST` reader - TIMER0 reset"] pub struct TIMER0RST_R(crate::FieldReader); impl TIMER0RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER0RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER0RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER0RST` writer - TIMER0 reset"] pub struct TIMER0RST_W<'a> { w: &'a mut W, } impl<'a> TIMER0RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `ADCRST` reader - ADC reset"] pub struct ADCRST_R(crate::FieldReader); impl ADCRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADCRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADCRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADCRST` writer - ADC reset"] pub struct ADCRST_W<'a> { w: &'a mut W, } impl<'a> ADCRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CFGCMPRST` reader - System configuration and comparator reset"] pub struct CFGCMPRST_R(crate::FieldReader); impl CFGCMPRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CFGCMPRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CFGCMPRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CFGCMPRST` writer - System configuration and comparator reset"] pub struct CFGCMPRST_W<'a> { w: &'a mut W, } impl<'a> CFGCMPRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 18 - TIMER16 reset"] #[inline(always)] pub fn timer16rst(&self) -> TIMER16RST_R { TIMER16RST_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - TIMER15 reset"] #[inline(always)] pub fn timer15rst(&self) -> TIMER15RST_R { TIMER15RST_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - TIMER14 reset"] #[inline(always)] pub fn timer14rst(&self) -> TIMER14RST_R { TIMER14RST_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 14 - USART0 Reset"] #[inline(always)] pub fn usart0rst(&self) -> USART0RST_R { USART0RST_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 12 - SPI0 Reset"] #[inline(always)] pub fn spi0rst(&self) -> SPI0RST_R { SPI0RST_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - TIMER0 reset"] #[inline(always)] pub fn timer0rst(&self) -> TIMER0RST_R { TIMER0RST_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 9 - ADC reset"] #[inline(always)] pub fn adcrst(&self) -> ADCRST_R { ADCRST_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 0 - System configuration and comparator reset"] #[inline(always)] pub fn cfgcmprst(&self) -> CFGCMPRST_R { CFGCMPRST_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 18 - TIMER16 reset"] #[inline(always)] pub fn timer16rst(&mut self) -> TIMER16RST_W { TIMER16RST_W { w: self } } #[doc = "Bit 17 - TIMER15 reset"] #[inline(always)] pub fn timer15rst(&mut self) -> TIMER15RST_W { TIMER15RST_W { w: self } } #[doc = "Bit 16 - TIMER14 reset"] #[inline(always)] pub fn timer14rst(&mut self) -> TIMER14RST_W { TIMER14RST_W { w: self } } #[doc = "Bit 14 - USART0 Reset"] #[inline(always)] pub fn usart0rst(&mut self) -> USART0RST_W { USART0RST_W { w: self } } #[doc = "Bit 12 - SPI0 Reset"] #[inline(always)] pub fn spi0rst(&mut self) -> SPI0RST_W { SPI0RST_W { w: self } } #[doc = "Bit 11 - TIMER0 reset"] #[inline(always)] pub fn timer0rst(&mut self) -> TIMER0RST_W { TIMER0RST_W { w: self } } #[doc = "Bit 9 - ADC reset"] #[inline(always)] pub fn adcrst(&mut self) -> ADCRST_W { ADCRST_W { w: self } } #[doc = "Bit 0 - System configuration and comparator reset"] #[inline(always)] pub fn cfgcmprst(&mut self) -> CFGCMPRST_W { CFGCMPRST_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "APB2 reset register (RCU_APB2RST)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2rst](index.html) module"] pub struct APB2RST_SPEC; impl crate::RegisterSpec for APB2RST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [apb2rst::R](R) reader structure"] impl crate::Readable for APB2RST_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [apb2rst::W](W) writer structure"] impl crate::Writable for APB2RST_SPEC { type Writer = W; } #[doc = "`reset()` method sets APB2RST to value 0"] impl crate::Resettable for APB2RST_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "APB1RST register accessor: an alias for `Reg`"] pub type APB1RST = crate::Reg; #[doc = "APB1 reset register (RCU_APB1RST)"] pub mod apb1rst { #[doc = "Register `APB1RST` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `APB1RST` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CECRST` reader - HDMI CEC reset"] pub struct CECRST_R(crate::FieldReader); impl CECRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CECRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CECRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CECRST` writer - HDMI CEC reset"] pub struct CECRST_W<'a> { w: &'a mut W, } impl<'a> CECRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `DACRST` reader - DAC reset"] pub struct DACRST_R(crate::FieldReader); impl DACRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DACRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DACRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DACRST` writer - DAC reset"] pub struct DACRST_W<'a> { w: &'a mut W, } impl<'a> DACRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `PMURST` reader - Power control reset"] pub struct PMURST_R(crate::FieldReader); impl PMURST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PMURST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PMURST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PMURST` writer - Power control reset"] pub struct PMURST_W<'a> { w: &'a mut W, } impl<'a> PMURST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `I2C1RST` reader - I2C1 reset"] pub struct I2C1RST_R(crate::FieldReader); impl I2C1RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2C1RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2C1RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2C1RST` writer - I2C1 reset"] pub struct I2C1RST_W<'a> { w: &'a mut W, } impl<'a> I2C1RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `I2C0RST` reader - I2C0 reset"] pub struct I2C0RST_R(crate::FieldReader); impl I2C0RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2C0RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2C0RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2C0RST` writer - I2C0 reset"] pub struct I2C0RST_W<'a> { w: &'a mut W, } impl<'a> I2C0RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `USART1RST` reader - USART1 reset"] pub struct USART1RST_R(crate::FieldReader); impl USART1RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USART1RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USART1RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USART1RST` writer - USART1 reset"] pub struct USART1RST_W<'a> { w: &'a mut W, } impl<'a> USART1RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `SPI1RST` reader - SPI1 reset"] pub struct SPI1RST_R(crate::FieldReader); impl SPI1RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPI1RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPI1RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPI1RST` writer - SPI1 reset"] pub struct SPI1RST_W<'a> { w: &'a mut W, } impl<'a> SPI1RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `WWDGTRST` reader - Window watchdog timer reset"] pub struct WWDGTRST_R(crate::FieldReader); impl WWDGTRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WWDGTRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WWDGTRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WWDGTRST` writer - Window watchdog timer reset"] pub struct WWDGTRST_W<'a> { w: &'a mut W, } impl<'a> WWDGTRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TIMER13RST` reader - TIMER13 timer reset"] pub struct TIMER13RST_R(crate::FieldReader); impl TIMER13RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER13RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER13RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER13RST` writer - TIMER13 timer reset"] pub struct TIMER13RST_W<'a> { w: &'a mut W, } impl<'a> TIMER13RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TIMER5RST` reader - TIMER5 timer reset"] pub struct TIMER5RST_R(crate::FieldReader); impl TIMER5RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER5RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER5RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER5RST` writer - TIMER5 timer reset"] pub struct TIMER5RST_W<'a> { w: &'a mut W, } impl<'a> TIMER5RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TIMER2RST` reader - TIMER2 timer reset"] pub struct TIMER2RST_R(crate::FieldReader); impl TIMER2RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER2RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER2RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER2RST` writer - TIMER2 timer reset"] pub struct TIMER2RST_W<'a> { w: &'a mut W, } impl<'a> TIMER2RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TIMER1RST` reader - TIMER1 timer reset"] pub struct TIMER1RST_R(crate::FieldReader); impl TIMER1RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER1RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER1RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER1RST` writer - TIMER1 timer reset"] pub struct TIMER1RST_W<'a> { w: &'a mut W, } impl<'a> TIMER1RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 30 - HDMI CEC reset"] #[inline(always)] pub fn cecrst(&self) -> CECRST_R { CECRST_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 29 - DAC reset"] #[inline(always)] pub fn dacrst(&self) -> DACRST_R { DACRST_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 28 - Power control reset"] #[inline(always)] pub fn pmurst(&self) -> PMURST_R { PMURST_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 22 - I2C1 reset"] #[inline(always)] pub fn i2c1rst(&self) -> I2C1RST_R { I2C1RST_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 21 - I2C0 reset"] #[inline(always)] pub fn i2c0rst(&self) -> I2C0RST_R { I2C0RST_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 17 - USART1 reset"] #[inline(always)] pub fn usart1rst(&self) -> USART1RST_R { USART1RST_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 14 - SPI1 reset"] #[inline(always)] pub fn spi1rst(&self) -> SPI1RST_R { SPI1RST_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 11 - Window watchdog timer reset"] #[inline(always)] pub fn wwdgtrst(&self) -> WWDGTRST_R { WWDGTRST_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 8 - TIMER13 timer reset"] #[inline(always)] pub fn timer13rst(&self) -> TIMER13RST_R { TIMER13RST_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 4 - TIMER5 timer reset"] #[inline(always)] pub fn timer5rst(&self) -> TIMER5RST_R { TIMER5RST_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 1 - TIMER2 timer reset"] #[inline(always)] pub fn timer2rst(&self) -> TIMER2RST_R { TIMER2RST_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - TIMER1 timer reset"] #[inline(always)] pub fn timer1rst(&self) -> TIMER1RST_R { TIMER1RST_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 30 - HDMI CEC reset"] #[inline(always)] pub fn cecrst(&mut self) -> CECRST_W { CECRST_W { w: self } } #[doc = "Bit 29 - DAC reset"] #[inline(always)] pub fn dacrst(&mut self) -> DACRST_W { DACRST_W { w: self } } #[doc = "Bit 28 - Power control reset"] #[inline(always)] pub fn pmurst(&mut self) -> PMURST_W { PMURST_W { w: self } } #[doc = "Bit 22 - I2C1 reset"] #[inline(always)] pub fn i2c1rst(&mut self) -> I2C1RST_W { I2C1RST_W { w: self } } #[doc = "Bit 21 - I2C0 reset"] #[inline(always)] pub fn i2c0rst(&mut self) -> I2C0RST_W { I2C0RST_W { w: self } } #[doc = "Bit 17 - USART1 reset"] #[inline(always)] pub fn usart1rst(&mut self) -> USART1RST_W { USART1RST_W { w: self } } #[doc = "Bit 14 - SPI1 reset"] #[inline(always)] pub fn spi1rst(&mut self) -> SPI1RST_W { SPI1RST_W { w: self } } #[doc = "Bit 11 - Window watchdog timer reset"] #[inline(always)] pub fn wwdgtrst(&mut self) -> WWDGTRST_W { WWDGTRST_W { w: self } } #[doc = "Bit 8 - TIMER13 timer reset"] #[inline(always)] pub fn timer13rst(&mut self) -> TIMER13RST_W { TIMER13RST_W { w: self } } #[doc = "Bit 4 - TIMER5 timer reset"] #[inline(always)] pub fn timer5rst(&mut self) -> TIMER5RST_W { TIMER5RST_W { w: self } } #[doc = "Bit 1 - TIMER2 timer reset"] #[inline(always)] pub fn timer2rst(&mut self) -> TIMER2RST_W { TIMER2RST_W { w: self } } #[doc = "Bit 0 - TIMER1 timer reset"] #[inline(always)] pub fn timer1rst(&mut self) -> TIMER1RST_W { TIMER1RST_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "APB1 reset register (RCU_APB1RST)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1rst](index.html) module"] pub struct APB1RST_SPEC; impl crate::RegisterSpec for APB1RST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [apb1rst::R](R) reader structure"] impl crate::Readable for APB1RST_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [apb1rst::W](W) writer structure"] impl crate::Writable for APB1RST_SPEC { type Writer = W; } #[doc = "`reset()` method sets APB1RST to value 0"] impl crate::Resettable for APB1RST_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "AHBEN register accessor: an alias for `Reg`"] pub type AHBEN = crate::Reg; #[doc = "AHB enable register (RCU_AHBEN)"] pub mod ahben { #[doc = "Register `AHBEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `AHBEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TSIEN` reader - TSI clock enable"] pub struct TSIEN_R(crate::FieldReader); impl TSIEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TSIEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TSIEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TSIEN` writer - TSI clock enable"] pub struct TSIEN_W<'a> { w: &'a mut W, } impl<'a> TSIEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `PFEN` reader - GPIO port F clock enable"] pub struct PFEN_R(crate::FieldReader); impl PFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PFEN` writer - GPIO port F clock enable"] pub struct PFEN_W<'a> { w: &'a mut W, } impl<'a> PFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `PDEN` reader - GPIO port D clock enable"] pub struct PDEN_R(crate::FieldReader); impl PDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PDEN` writer - GPIO port D clock enable"] pub struct PDEN_W<'a> { w: &'a mut W, } impl<'a> PDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `PCEN` reader - GPIO port C clock enable"] pub struct PCEN_R(crate::FieldReader); impl PCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCEN` writer - GPIO port C clock enable"] pub struct PCEN_W<'a> { w: &'a mut W, } impl<'a> PCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `PBEN` reader - GPIO port B clock enable"] pub struct PBEN_R(crate::FieldReader); impl PBEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PBEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PBEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PBEN` writer - GPIO port B clock enable"] pub struct PBEN_W<'a> { w: &'a mut W, } impl<'a> PBEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `PAEN` reader - GPIO port A clock enable"] pub struct PAEN_R(crate::FieldReader); impl PAEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PAEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PAEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PAEN` writer - GPIO port A clock enable"] pub struct PAEN_W<'a> { w: &'a mut W, } impl<'a> PAEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `USBFSEN` reader - USBFS clock enable"] pub struct USBFSEN_R(crate::FieldReader); impl USBFSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBFSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBFSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBFSEN` writer - USBFS clock enable"] pub struct USBFSEN_W<'a> { w: &'a mut W, } impl<'a> USBFSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CRCEN` reader - CRC clock enable"] pub struct CRCEN_R(crate::FieldReader); impl CRCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CRCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CRCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CRCEN` writer - CRC clock enable"] pub struct CRCEN_W<'a> { w: &'a mut W, } impl<'a> CRCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `FMCSPEN` reader - FMC clock enable"] pub struct FMCSPEN_R(crate::FieldReader); impl FMCSPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FMCSPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FMCSPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FMCSPEN` writer - FMC clock enable"] pub struct FMCSPEN_W<'a> { w: &'a mut W, } impl<'a> FMCSPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `SRAMSPEN` reader - SRAM interface clock enable"] pub struct SRAMSPEN_R(crate::FieldReader); impl SRAMSPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SRAMSPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SRAMSPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SRAMSPEN` writer - SRAM interface clock enable"] pub struct SRAMSPEN_W<'a> { w: &'a mut W, } impl<'a> SRAMSPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `DMAEN` reader - DMA clock enable"] pub struct DMAEN_R(crate::FieldReader); impl DMAEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DMAEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMAEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMAEN` writer - DMA clock enable"] pub struct DMAEN_W<'a> { w: &'a mut W, } impl<'a> DMAEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 24 - TSI clock enable"] #[inline(always)] pub fn tsien(&self) -> TSIEN_R { TSIEN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 22 - GPIO port F clock enable"] #[inline(always)] pub fn pfen(&self) -> PFEN_R { PFEN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 20 - GPIO port D clock enable"] #[inline(always)] pub fn pden(&self) -> PDEN_R { PDEN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - GPIO port C clock enable"] #[inline(always)] pub fn pcen(&self) -> PCEN_R { PCEN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - GPIO port B clock enable"] #[inline(always)] pub fn pben(&self) -> PBEN_R { PBEN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - GPIO port A clock enable"] #[inline(always)] pub fn paen(&self) -> PAEN_R { PAEN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 12 - USBFS clock enable"] #[inline(always)] pub fn usbfsen(&self) -> USBFSEN_R { USBFSEN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 6 - CRC clock enable"] #[inline(always)] pub fn crcen(&self) -> CRCEN_R { CRCEN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - FMC clock enable"] #[inline(always)] pub fn fmcspen(&self) -> FMCSPEN_R { FMCSPEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 2 - SRAM interface clock enable"] #[inline(always)] pub fn sramspen(&self) -> SRAMSPEN_R { SRAMSPEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 0 - DMA clock enable"] #[inline(always)] pub fn dmaen(&self) -> DMAEN_R { DMAEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 24 - TSI clock enable"] #[inline(always)] pub fn tsien(&mut self) -> TSIEN_W { TSIEN_W { w: self } } #[doc = "Bit 22 - GPIO port F clock enable"] #[inline(always)] pub fn pfen(&mut self) -> PFEN_W { PFEN_W { w: self } } #[doc = "Bit 20 - GPIO port D clock enable"] #[inline(always)] pub fn pden(&mut self) -> PDEN_W { PDEN_W { w: self } } #[doc = "Bit 19 - GPIO port C clock enable"] #[inline(always)] pub fn pcen(&mut self) -> PCEN_W { PCEN_W { w: self } } #[doc = "Bit 18 - GPIO port B clock enable"] #[inline(always)] pub fn pben(&mut self) -> PBEN_W { PBEN_W { w: self } } #[doc = "Bit 17 - GPIO port A clock enable"] #[inline(always)] pub fn paen(&mut self) -> PAEN_W { PAEN_W { w: self } } #[doc = "Bit 12 - USBFS clock enable"] #[inline(always)] pub fn usbfsen(&mut self) -> USBFSEN_W { USBFSEN_W { w: self } } #[doc = "Bit 6 - CRC clock enable"] #[inline(always)] pub fn crcen(&mut self) -> CRCEN_W { CRCEN_W { w: self } } #[doc = "Bit 4 - FMC clock enable"] #[inline(always)] pub fn fmcspen(&mut self) -> FMCSPEN_W { FMCSPEN_W { w: self } } #[doc = "Bit 2 - SRAM interface clock enable"] #[inline(always)] pub fn sramspen(&mut self) -> SRAMSPEN_W { SRAMSPEN_W { w: self } } #[doc = "Bit 0 - DMA clock enable"] #[inline(always)] pub fn dmaen(&mut self) -> DMAEN_W { DMAEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "AHB enable register (RCU_AHBEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahben](index.html) module"] pub struct AHBEN_SPEC; impl crate::RegisterSpec for AHBEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ahben::R](R) reader structure"] impl crate::Readable for AHBEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ahben::W](W) writer structure"] impl crate::Writable for AHBEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets AHBEN to value 0x14"] impl crate::Resettable for AHBEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x14 } } } #[doc = "APB2EN register accessor: an alias for `Reg`"] pub type APB2EN = crate::Reg; #[doc = "APB2 enable register (RCU_APB2EN)"] pub mod apb2en { #[doc = "Register `APB2EN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `APB2EN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TIMER16EN` reader - TIMER16 timer clock enable"] pub struct TIMER16EN_R(crate::FieldReader); impl TIMER16EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER16EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER16EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER16EN` writer - TIMER16 timer clock enable"] pub struct TIMER16EN_W<'a> { w: &'a mut W, } impl<'a> TIMER16EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `TIMER15EN` reader - TIMER15 timer clock enable"] pub struct TIMER15EN_R(crate::FieldReader); impl TIMER15EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER15EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER15EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER15EN` writer - TIMER15 timer clock enable"] pub struct TIMER15EN_W<'a> { w: &'a mut W, } impl<'a> TIMER15EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `TIMER14EN` reader - TIMER14 timer clock enable"] pub struct TIMER14EN_R(crate::FieldReader); impl TIMER14EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER14EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER14EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER14EN` writer - TIMER14 timer clock enable"] pub struct TIMER14EN_W<'a> { w: &'a mut W, } impl<'a> TIMER14EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `USART0EN` reader - USART0 clock enable"] pub struct USART0EN_R(crate::FieldReader); impl USART0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USART0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USART0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USART0EN` writer - USART0 clock enable"] pub struct USART0EN_W<'a> { w: &'a mut W, } impl<'a> USART0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `SPI0EN` reader - SPI0 clock enable"] pub struct SPI0EN_R(crate::FieldReader); impl SPI0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPI0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPI0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPI0EN` writer - SPI0 clock enable"] pub struct SPI0EN_W<'a> { w: &'a mut W, } impl<'a> SPI0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TIMER0EN` reader - TIMER0 timer clock enable"] pub struct TIMER0EN_R(crate::FieldReader); impl TIMER0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER0EN` writer - TIMER0 timer clock enable"] pub struct TIMER0EN_W<'a> { w: &'a mut W, } impl<'a> TIMER0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `ADCEN` reader - ADC interface clock enable"] pub struct ADCEN_R(crate::FieldReader); impl ADCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADCEN` writer - ADC interface clock enable"] pub struct ADCEN_W<'a> { w: &'a mut W, } impl<'a> ADCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CFGCMPEN` reader - System configuration and comparator clock enable"] pub struct CFGCMPEN_R(crate::FieldReader); impl CFGCMPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CFGCMPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CFGCMPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CFGCMPEN` writer - System configuration and comparator clock enable"] pub struct CFGCMPEN_W<'a> { w: &'a mut W, } impl<'a> CFGCMPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 18 - TIMER16 timer clock enable"] #[inline(always)] pub fn timer16en(&self) -> TIMER16EN_R { TIMER16EN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - TIMER15 timer clock enable"] #[inline(always)] pub fn timer15en(&self) -> TIMER15EN_R { TIMER15EN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - TIMER14 timer clock enable"] #[inline(always)] pub fn timer14en(&self) -> TIMER14EN_R { TIMER14EN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 14 - USART0 clock enable"] #[inline(always)] pub fn usart0en(&self) -> USART0EN_R { USART0EN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 12 - SPI0 clock enable"] #[inline(always)] pub fn spi0en(&self) -> SPI0EN_R { SPI0EN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - TIMER0 timer clock enable"] #[inline(always)] pub fn timer0en(&self) -> TIMER0EN_R { TIMER0EN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 9 - ADC interface clock enable"] #[inline(always)] pub fn adcen(&self) -> ADCEN_R { ADCEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 0 - System configuration and comparator clock enable"] #[inline(always)] pub fn cfgcmpen(&self) -> CFGCMPEN_R { CFGCMPEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 18 - TIMER16 timer clock enable"] #[inline(always)] pub fn timer16en(&mut self) -> TIMER16EN_W { TIMER16EN_W { w: self } } #[doc = "Bit 17 - TIMER15 timer clock enable"] #[inline(always)] pub fn timer15en(&mut self) -> TIMER15EN_W { TIMER15EN_W { w: self } } #[doc = "Bit 16 - TIMER14 timer clock enable"] #[inline(always)] pub fn timer14en(&mut self) -> TIMER14EN_W { TIMER14EN_W { w: self } } #[doc = "Bit 14 - USART0 clock enable"] #[inline(always)] pub fn usart0en(&mut self) -> USART0EN_W { USART0EN_W { w: self } } #[doc = "Bit 12 - SPI0 clock enable"] #[inline(always)] pub fn spi0en(&mut self) -> SPI0EN_W { SPI0EN_W { w: self } } #[doc = "Bit 11 - TIMER0 timer clock enable"] #[inline(always)] pub fn timer0en(&mut self) -> TIMER0EN_W { TIMER0EN_W { w: self } } #[doc = "Bit 9 - ADC interface clock enable"] #[inline(always)] pub fn adcen(&mut self) -> ADCEN_W { ADCEN_W { w: self } } #[doc = "Bit 0 - System configuration and comparator clock enable"] #[inline(always)] pub fn cfgcmpen(&mut self) -> CFGCMPEN_W { CFGCMPEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "APB2 enable register (RCU_APB2EN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb2en](index.html) module"] pub struct APB2EN_SPEC; impl crate::RegisterSpec for APB2EN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [apb2en::R](R) reader structure"] impl crate::Readable for APB2EN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [apb2en::W](W) writer structure"] impl crate::Writable for APB2EN_SPEC { type Writer = W; } #[doc = "`reset()` method sets APB2EN to value 0"] impl crate::Resettable for APB2EN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "APB1EN register accessor: an alias for `Reg`"] pub type APB1EN = crate::Reg; #[doc = "APB1 enable register (RCU_APB1EN)"] pub mod apb1en { #[doc = "Register `APB1EN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `APB1EN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CECEN` reader - HDMI CEC interface clock enable"] pub struct CECEN_R(crate::FieldReader); impl CECEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CECEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CECEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CECEN` writer - HDMI CEC interface clock enable"] pub struct CECEN_W<'a> { w: &'a mut W, } impl<'a> CECEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `DACEN` reader - DAC interface clock enable"] pub struct DACEN_R(crate::FieldReader); impl DACEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DACEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DACEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DACEN` writer - DAC interface clock enable"] pub struct DACEN_W<'a> { w: &'a mut W, } impl<'a> DACEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `PMUEN` reader - Power interface clock enable"] pub struct PMUEN_R(crate::FieldReader); impl PMUEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PMUEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PMUEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PMUEN` writer - Power interface clock enable"] pub struct PMUEN_W<'a> { w: &'a mut W, } impl<'a> PMUEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `I2C1EN` reader - I2C1 clock enable"] pub struct I2C1EN_R(crate::FieldReader); impl I2C1EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2C1EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2C1EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2C1EN` writer - I2C1 clock enable"] pub struct I2C1EN_W<'a> { w: &'a mut W, } impl<'a> I2C1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `I2C0EN` reader - I2C0 clock enable"] pub struct I2C0EN_R(crate::FieldReader); impl I2C0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2C0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2C0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2C0EN` writer - I2C0 clock enable"] pub struct I2C0EN_W<'a> { w: &'a mut W, } impl<'a> I2C0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `USART1EN` reader - USART1 clock enable"] pub struct USART1EN_R(crate::FieldReader); impl USART1EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USART1EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USART1EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USART1EN` writer - USART1 clock enable"] pub struct USART1EN_W<'a> { w: &'a mut W, } impl<'a> USART1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `SPI1EN` reader - SPI1 clock enable"] pub struct SPI1EN_R(crate::FieldReader); impl SPI1EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPI1EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPI1EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPI1EN` writer - SPI1 clock enable"] pub struct SPI1EN_W<'a> { w: &'a mut W, } impl<'a> SPI1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `WWDGTEN` reader - Window watchdog timer clock enable"] pub struct WWDGTEN_R(crate::FieldReader); impl WWDGTEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WWDGTEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WWDGTEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WWDGTEN` writer - Window watchdog timer clock enable"] pub struct WWDGTEN_W<'a> { w: &'a mut W, } impl<'a> WWDGTEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `TIMER13EN` reader - TIMER13 timer clock enable"] pub struct TIMER13EN_R(crate::FieldReader); impl TIMER13EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER13EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER13EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER13EN` writer - TIMER13 timer clock enable"] pub struct TIMER13EN_W<'a> { w: &'a mut W, } impl<'a> TIMER13EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TIMER5EN` reader - TIMER5 timer clock enable"] pub struct TIMER5EN_R(crate::FieldReader); impl TIMER5EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER5EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER5EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER5EN` writer - TIMER5 timer clock enable"] pub struct TIMER5EN_W<'a> { w: &'a mut W, } impl<'a> TIMER5EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TIMER2EN` reader - TIMER2 timer clock enable"] pub struct TIMER2EN_R(crate::FieldReader); impl TIMER2EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER2EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER2EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER2EN` writer - TIMER2 timer clock enable"] pub struct TIMER2EN_W<'a> { w: &'a mut W, } impl<'a> TIMER2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TIMER1EN` reader - TIMER1 timer clock enable"] pub struct TIMER1EN_R(crate::FieldReader); impl TIMER1EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER1EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER1EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER1EN` writer - TIMER1 timer clock enable"] pub struct TIMER1EN_W<'a> { w: &'a mut W, } impl<'a> TIMER1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 30 - HDMI CEC interface clock enable"] #[inline(always)] pub fn cecen(&self) -> CECEN_R { CECEN_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 29 - DAC interface clock enable"] #[inline(always)] pub fn dacen(&self) -> DACEN_R { DACEN_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 28 - Power interface clock enable"] #[inline(always)] pub fn pmuen(&self) -> PMUEN_R { PMUEN_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 22 - I2C1 clock enable"] #[inline(always)] pub fn i2c1en(&self) -> I2C1EN_R { I2C1EN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 21 - I2C0 clock enable"] #[inline(always)] pub fn i2c0en(&self) -> I2C0EN_R { I2C0EN_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 17 - USART1 clock enable"] #[inline(always)] pub fn usart1en(&self) -> USART1EN_R { USART1EN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 14 - SPI1 clock enable"] #[inline(always)] pub fn spi1en(&self) -> SPI1EN_R { SPI1EN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 11 - Window watchdog timer clock enable"] #[inline(always)] pub fn wwdgten(&self) -> WWDGTEN_R { WWDGTEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 8 - TIMER13 timer clock enable"] #[inline(always)] pub fn timer13en(&self) -> TIMER13EN_R { TIMER13EN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 4 - TIMER5 timer clock enable"] #[inline(always)] pub fn timer5en(&self) -> TIMER5EN_R { TIMER5EN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 1 - TIMER2 timer clock enable"] #[inline(always)] pub fn timer2en(&self) -> TIMER2EN_R { TIMER2EN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - TIMER1 timer clock enable"] #[inline(always)] pub fn timer1en(&self) -> TIMER1EN_R { TIMER1EN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 30 - HDMI CEC interface clock enable"] #[inline(always)] pub fn cecen(&mut self) -> CECEN_W { CECEN_W { w: self } } #[doc = "Bit 29 - DAC interface clock enable"] #[inline(always)] pub fn dacen(&mut self) -> DACEN_W { DACEN_W { w: self } } #[doc = "Bit 28 - Power interface clock enable"] #[inline(always)] pub fn pmuen(&mut self) -> PMUEN_W { PMUEN_W { w: self } } #[doc = "Bit 22 - I2C1 clock enable"] #[inline(always)] pub fn i2c1en(&mut self) -> I2C1EN_W { I2C1EN_W { w: self } } #[doc = "Bit 21 - I2C0 clock enable"] #[inline(always)] pub fn i2c0en(&mut self) -> I2C0EN_W { I2C0EN_W { w: self } } #[doc = "Bit 17 - USART1 clock enable"] #[inline(always)] pub fn usart1en(&mut self) -> USART1EN_W { USART1EN_W { w: self } } #[doc = "Bit 14 - SPI1 clock enable"] #[inline(always)] pub fn spi1en(&mut self) -> SPI1EN_W { SPI1EN_W { w: self } } #[doc = "Bit 11 - Window watchdog timer clock enable"] #[inline(always)] pub fn wwdgten(&mut self) -> WWDGTEN_W { WWDGTEN_W { w: self } } #[doc = "Bit 8 - TIMER13 timer clock enable"] #[inline(always)] pub fn timer13en(&mut self) -> TIMER13EN_W { TIMER13EN_W { w: self } } #[doc = "Bit 4 - TIMER5 timer clock enable"] #[inline(always)] pub fn timer5en(&mut self) -> TIMER5EN_W { TIMER5EN_W { w: self } } #[doc = "Bit 1 - TIMER2 timer clock enable"] #[inline(always)] pub fn timer2en(&mut self) -> TIMER2EN_W { TIMER2EN_W { w: self } } #[doc = "Bit 0 - TIMER1 timer clock enable"] #[inline(always)] pub fn timer1en(&mut self) -> TIMER1EN_W { TIMER1EN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "APB1 enable register (RCU_APB1EN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [apb1en](index.html) module"] pub struct APB1EN_SPEC; impl crate::RegisterSpec for APB1EN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [apb1en::R](R) reader structure"] impl crate::Readable for APB1EN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [apb1en::W](W) writer structure"] impl crate::Writable for APB1EN_SPEC { type Writer = W; } #[doc = "`reset()` method sets APB1EN to value 0"] impl crate::Resettable for APB1EN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BDCTL register accessor: an alias for `Reg`"] pub type BDCTL = crate::Reg; #[doc = "Backup domain control register (RCU_BDCTL)"] pub mod bdctl { #[doc = "Register `BDCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `BDCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BKPRST` reader - Backup domain reset"] pub struct BKPRST_R(crate::FieldReader); impl BKPRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BKPRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BKPRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BKPRST` writer - Backup domain reset"] pub struct BKPRST_W<'a> { w: &'a mut W, } impl<'a> BKPRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `RTCEN` reader - RTC clock enable"] pub struct RTCEN_R(crate::FieldReader); impl RTCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTCEN` writer - RTC clock enable"] pub struct RTCEN_W<'a> { w: &'a mut W, } impl<'a> RTCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `RTCSRC` reader - RTC clock entry selection"] pub struct RTCSRC_R(crate::FieldReader); impl RTCSRC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RTCSRC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTCSRC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTCSRC` writer - RTC clock entry selection"] pub struct RTCSRC_W<'a> { w: &'a mut W, } impl<'a> RTCSRC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `LXTALDRI` reader - LXTAL drive capability"] pub struct LXTALDRI_R(crate::FieldReader); impl LXTALDRI_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { LXTALDRI_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LXTALDRI_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LXTALDRI` writer - LXTAL drive capability"] pub struct LXTALDRI_W<'a> { w: &'a mut W, } impl<'a> LXTALDRI_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 3)) | ((value as u32 & 0x03) << 3); self.w } } #[doc = "Field `LXTALBPS` reader - LXTAL bypass mode enable"] pub struct LXTALBPS_R(crate::FieldReader); impl LXTALBPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LXTALBPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LXTALBPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LXTALBPS` writer - LXTAL bypass mode enable"] pub struct LXTALBPS_W<'a> { w: &'a mut W, } impl<'a> LXTALBPS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `LXTALSTB` reader - External low-speed oscillator stabilization"] pub struct LXTALSTB_R(crate::FieldReader); impl LXTALSTB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LXTALSTB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LXTALSTB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LXTALEN` reader - LXTAL enable"] pub struct LXTALEN_R(crate::FieldReader); impl LXTALEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LXTALEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LXTALEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LXTALEN` writer - LXTAL enable"] pub struct LXTALEN_W<'a> { w: &'a mut W, } impl<'a> LXTALEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 16 - Backup domain reset"] #[inline(always)] pub fn bkprst(&self) -> BKPRST_R { BKPRST_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - RTC clock enable"] #[inline(always)] pub fn rtcen(&self) -> RTCEN_R { RTCEN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 8:9 - RTC clock entry selection"] #[inline(always)] pub fn rtcsrc(&self) -> RTCSRC_R { RTCSRC_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 3:4 - LXTAL drive capability"] #[inline(always)] pub fn lxtaldri(&self) -> LXTALDRI_R { LXTALDRI_R::new(((self.bits >> 3) & 0x03) as u8) } #[doc = "Bit 2 - LXTAL bypass mode enable"] #[inline(always)] pub fn lxtalbps(&self) -> LXTALBPS_R { LXTALBPS_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - External low-speed oscillator stabilization"] #[inline(always)] pub fn lxtalstb(&self) -> LXTALSTB_R { LXTALSTB_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - LXTAL enable"] #[inline(always)] pub fn lxtalen(&self) -> LXTALEN_R { LXTALEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 16 - Backup domain reset"] #[inline(always)] pub fn bkprst(&mut self) -> BKPRST_W { BKPRST_W { w: self } } #[doc = "Bit 15 - RTC clock enable"] #[inline(always)] pub fn rtcen(&mut self) -> RTCEN_W { RTCEN_W { w: self } } #[doc = "Bits 8:9 - RTC clock entry selection"] #[inline(always)] pub fn rtcsrc(&mut self) -> RTCSRC_W { RTCSRC_W { w: self } } #[doc = "Bits 3:4 - LXTAL drive capability"] #[inline(always)] pub fn lxtaldri(&mut self) -> LXTALDRI_W { LXTALDRI_W { w: self } } #[doc = "Bit 2 - LXTAL bypass mode enable"] #[inline(always)] pub fn lxtalbps(&mut self) -> LXTALBPS_W { LXTALBPS_W { w: self } } #[doc = "Bit 0 - LXTAL enable"] #[inline(always)] pub fn lxtalen(&mut self) -> LXTALEN_W { LXTALEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Backup domain control register (RCU_BDCTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bdctl](index.html) module"] pub struct BDCTL_SPEC; impl crate::RegisterSpec for BDCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [bdctl::R](R) reader structure"] impl crate::Readable for BDCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [bdctl::W](W) writer structure"] impl crate::Writable for BDCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets BDCTL to value 0x18"] impl crate::Resettable for BDCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x18 } } } #[doc = "RSTSCK register accessor: an alias for `Reg`"] pub type RSTSCK = crate::Reg; #[doc = "Reset source /clock register (RCU_RSTSCK)"] pub mod rstsck { #[doc = "Register `RSTSCK` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `RSTSCK` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `LPRSTF` reader - Low-power reset flag"] pub struct LPRSTF_R(crate::FieldReader); impl LPRSTF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LPRSTF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LPRSTF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LPRSTF` writer - Low-power reset flag"] pub struct LPRSTF_W<'a> { w: &'a mut W, } impl<'a> LPRSTF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `WWDGTRSTF` reader - Window watchdog timer reset flag"] pub struct WWDGTRSTF_R(crate::FieldReader); impl WWDGTRSTF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WWDGTRSTF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WWDGTRSTF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WWDGTRSTF` writer - Window watchdog timer reset flag"] pub struct WWDGTRSTF_W<'a> { w: &'a mut W, } impl<'a> WWDGTRSTF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `FWDGTRSTF` reader - Free Watchdog timer reset flag"] pub struct FWDGTRSTF_R(crate::FieldReader); impl FWDGTRSTF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FWDGTRSTF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FWDGTRSTF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FWDGTRSTF` writer - Free Watchdog timer reset flag"] pub struct FWDGTRSTF_W<'a> { w: &'a mut W, } impl<'a> FWDGTRSTF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `SWRSTF` reader - Software reset flag"] pub struct SWRSTF_R(crate::FieldReader); impl SWRSTF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWRSTF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWRSTF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWRSTF` writer - Software reset flag"] pub struct SWRSTF_W<'a> { w: &'a mut W, } impl<'a> SWRSTF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `PORRSTF` reader - Power reset flag"] pub struct PORRSTF_R(crate::FieldReader); impl PORRSTF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PORRSTF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PORRSTF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PORRSTF` writer - Power reset flag"] pub struct PORRSTF_W<'a> { w: &'a mut W, } impl<'a> PORRSTF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `EPRSTF` reader - External PIN reset flag"] pub struct EPRSTF_R(crate::FieldReader); impl EPRSTF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPRSTF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPRSTF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPRSTF` writer - External PIN reset flag"] pub struct EPRSTF_W<'a> { w: &'a mut W, } impl<'a> EPRSTF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `OBLRSTF` reader - Option byte loader reset flag"] pub struct OBLRSTF_R(crate::FieldReader); impl OBLRSTF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OBLRSTF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OBLRSTF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OBLRSTF` writer - Option byte loader reset flag"] pub struct OBLRSTF_W<'a> { w: &'a mut W, } impl<'a> OBLRSTF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); self.w } } #[doc = "Field `RSTFC` reader - Reset flag clear"] pub struct RSTFC_R(crate::FieldReader); impl RSTFC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RSTFC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSTFC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSTFC` writer - Reset flag clear"] pub struct RSTFC_W<'a> { w: &'a mut W, } impl<'a> RSTFC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `V12RSTF` reader - V12 domain Power reset flag"] pub struct V12RSTF_R(crate::FieldReader); impl V12RSTF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { V12RSTF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for V12RSTF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `V12RSTF` writer - V12 domain Power reset flag"] pub struct V12RSTF_W<'a> { w: &'a mut W, } impl<'a> V12RSTF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `IRC40KSTB` reader - IRC40K stabilization"] pub struct IRC40KSTB_R(crate::FieldReader); impl IRC40KSTB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC40KSTB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC40KSTB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC40KEN` reader - IRC40K enable"] pub struct IRC40KEN_R(crate::FieldReader); impl IRC40KEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC40KEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC40KEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC40KEN` writer - IRC40K enable"] pub struct IRC40KEN_W<'a> { w: &'a mut W, } impl<'a> IRC40KEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 31 - Low-power reset flag"] #[inline(always)] pub fn lprstf(&self) -> LPRSTF_R { LPRSTF_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - Window watchdog timer reset flag"] #[inline(always)] pub fn wwdgtrstf(&self) -> WWDGTRSTF_R { WWDGTRSTF_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 29 - Free Watchdog timer reset flag"] #[inline(always)] pub fn fwdgtrstf(&self) -> FWDGTRSTF_R { FWDGTRSTF_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 28 - Software reset flag"] #[inline(always)] pub fn swrstf(&self) -> SWRSTF_R { SWRSTF_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 27 - Power reset flag"] #[inline(always)] pub fn porrstf(&self) -> PORRSTF_R { PORRSTF_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bit 26 - External PIN reset flag"] #[inline(always)] pub fn eprstf(&self) -> EPRSTF_R { EPRSTF_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 25 - Option byte loader reset flag"] #[inline(always)] pub fn oblrstf(&self) -> OBLRSTF_R { OBLRSTF_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 24 - Reset flag clear"] #[inline(always)] pub fn rstfc(&self) -> RSTFC_R { RSTFC_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 23 - V12 domain Power reset flag"] #[inline(always)] pub fn v12rstf(&self) -> V12RSTF_R { V12RSTF_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 1 - IRC40K stabilization"] #[inline(always)] pub fn irc40kstb(&self) -> IRC40KSTB_R { IRC40KSTB_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - IRC40K enable"] #[inline(always)] pub fn irc40ken(&self) -> IRC40KEN_R { IRC40KEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 31 - Low-power reset flag"] #[inline(always)] pub fn lprstf(&mut self) -> LPRSTF_W { LPRSTF_W { w: self } } #[doc = "Bit 30 - Window watchdog timer reset flag"] #[inline(always)] pub fn wwdgtrstf(&mut self) -> WWDGTRSTF_W { WWDGTRSTF_W { w: self } } #[doc = "Bit 29 - Free Watchdog timer reset flag"] #[inline(always)] pub fn fwdgtrstf(&mut self) -> FWDGTRSTF_W { FWDGTRSTF_W { w: self } } #[doc = "Bit 28 - Software reset flag"] #[inline(always)] pub fn swrstf(&mut self) -> SWRSTF_W { SWRSTF_W { w: self } } #[doc = "Bit 27 - Power reset flag"] #[inline(always)] pub fn porrstf(&mut self) -> PORRSTF_W { PORRSTF_W { w: self } } #[doc = "Bit 26 - External PIN reset flag"] #[inline(always)] pub fn eprstf(&mut self) -> EPRSTF_W { EPRSTF_W { w: self } } #[doc = "Bit 25 - Option byte loader reset flag"] #[inline(always)] pub fn oblrstf(&mut self) -> OBLRSTF_W { OBLRSTF_W { w: self } } #[doc = "Bit 24 - Reset flag clear"] #[inline(always)] pub fn rstfc(&mut self) -> RSTFC_W { RSTFC_W { w: self } } #[doc = "Bit 23 - V12 domain Power reset flag"] #[inline(always)] pub fn v12rstf(&mut self) -> V12RSTF_W { V12RSTF_W { w: self } } #[doc = "Bit 0 - IRC40K enable"] #[inline(always)] pub fn irc40ken(&mut self) -> IRC40KEN_W { IRC40KEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Reset source /clock register (RCU_RSTSCK)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rstsck](index.html) module"] pub struct RSTSCK_SPEC; impl crate::RegisterSpec for RSTSCK_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rstsck::R](R) reader structure"] impl crate::Readable for RSTSCK_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [rstsck::W](W) writer structure"] impl crate::Writable for RSTSCK_SPEC { type Writer = W; } #[doc = "`reset()` method sets RSTSCK to value 0x0c00_0000"] impl crate::Resettable for RSTSCK_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0c00_0000 } } } #[doc = "AHBRST register accessor: an alias for `Reg`"] pub type AHBRST = crate::Reg; #[doc = "AHB reset register"] pub mod ahbrst { #[doc = "Register `AHBRST` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `AHBRST` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TSIRST` reader - TSI unit reset"] pub struct TSIRST_R(crate::FieldReader); impl TSIRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TSIRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TSIRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TSIRST` writer - TSI unit reset"] pub struct TSIRST_W<'a> { w: &'a mut W, } impl<'a> TSIRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } #[doc = "Field `PFRST` reader - GPIO port F reset"] pub struct PFRST_R(crate::FieldReader); impl PFRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PFRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PFRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PFRST` writer - GPIO port F reset"] pub struct PFRST_W<'a> { w: &'a mut W, } impl<'a> PFRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `PDRST` reader - GPIO port D reset"] pub struct PDRST_R(crate::FieldReader); impl PDRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PDRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PDRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PDRST` writer - GPIO port D reset"] pub struct PDRST_W<'a> { w: &'a mut W, } impl<'a> PDRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `PCRST` reader - GPIO port C reset"] pub struct PCRST_R(crate::FieldReader); impl PCRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PCRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCRST` writer - GPIO port C reset"] pub struct PCRST_W<'a> { w: &'a mut W, } impl<'a> PCRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `PBRST` reader - GPIO port B reset"] pub struct PBRST_R(crate::FieldReader); impl PBRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PBRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PBRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PBRST` writer - GPIO port B reset"] pub struct PBRST_W<'a> { w: &'a mut W, } impl<'a> PBRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `PARST` reader - GPIO port A reset"] pub struct PARST_R(crate::FieldReader); impl PARST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PARST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PARST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PARST` writer - GPIO port A reset"] pub struct PARST_W<'a> { w: &'a mut W, } impl<'a> PARST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `USBFSRST` reader - USBFS unit reset"] pub struct USBFSRST_R(crate::FieldReader); impl USBFSRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBFSRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBFSRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBFSRST` writer - USBFS unit reset"] pub struct USBFSRST_W<'a> { w: &'a mut W, } impl<'a> USBFSRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } impl R { #[doc = "Bit 24 - TSI unit reset"] #[inline(always)] pub fn tsirst(&self) -> TSIRST_R { TSIRST_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 22 - GPIO port F reset"] #[inline(always)] pub fn pfrst(&self) -> PFRST_R { PFRST_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 20 - GPIO port D reset"] #[inline(always)] pub fn pdrst(&self) -> PDRST_R { PDRST_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - GPIO port C reset"] #[inline(always)] pub fn pcrst(&self) -> PCRST_R { PCRST_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - GPIO port B reset"] #[inline(always)] pub fn pbrst(&self) -> PBRST_R { PBRST_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - GPIO port A reset"] #[inline(always)] pub fn parst(&self) -> PARST_R { PARST_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 12 - USBFS unit reset"] #[inline(always)] pub fn usbfsrst(&self) -> USBFSRST_R { USBFSRST_R::new(((self.bits >> 12) & 0x01) != 0) } } impl W { #[doc = "Bit 24 - TSI unit reset"] #[inline(always)] pub fn tsirst(&mut self) -> TSIRST_W { TSIRST_W { w: self } } #[doc = "Bit 22 - GPIO port F reset"] #[inline(always)] pub fn pfrst(&mut self) -> PFRST_W { PFRST_W { w: self } } #[doc = "Bit 20 - GPIO port D reset"] #[inline(always)] pub fn pdrst(&mut self) -> PDRST_W { PDRST_W { w: self } } #[doc = "Bit 19 - GPIO port C reset"] #[inline(always)] pub fn pcrst(&mut self) -> PCRST_W { PCRST_W { w: self } } #[doc = "Bit 18 - GPIO port B reset"] #[inline(always)] pub fn pbrst(&mut self) -> PBRST_W { PBRST_W { w: self } } #[doc = "Bit 17 - GPIO port A reset"] #[inline(always)] pub fn parst(&mut self) -> PARST_W { PARST_W { w: self } } #[doc = "Bit 12 - USBFS unit reset"] #[inline(always)] pub fn usbfsrst(&mut self) -> USBFSRST_W { USBFSRST_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "AHB reset register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ahbrst](index.html) module"] pub struct AHBRST_SPEC; impl crate::RegisterSpec for AHBRST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ahbrst::R](R) reader structure"] impl crate::Readable for AHBRST_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ahbrst::W](W) writer structure"] impl crate::Writable for AHBRST_SPEC { type Writer = W; } #[doc = "`reset()` method sets AHBRST to value 0"] impl crate::Resettable for AHBRST_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CFG1 register accessor: an alias for `Reg`"] pub type CFG1 = crate::Reg; #[doc = "Configuration register 1"] pub mod cfg1 { #[doc = "Register `CFG1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PLLMF` reader - Bit 5 of PLLMF"] pub struct PLLMF_R(crate::FieldReader); impl PLLMF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PLLMF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLMF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLMF` writer - Bit 5 of PLLMF"] pub struct PLLMF_W<'a> { w: &'a mut W, } impl<'a> PLLMF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `PLLPRESEL` reader - PLL clock source preselection"] pub struct PLLPRESEL_R(crate::FieldReader); impl PLLPRESEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PLLPRESEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLLPRESEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PLLPRESEL` writer - PLL clock source preselection"] pub struct PLLPRESEL_W<'a> { w: &'a mut W, } impl<'a> PLLPRESEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `PREDV` reader - CK_HXTAL or CK_IRC48M divider previous PLL"] pub struct PREDV_R(crate::FieldReader); impl PREDV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PREDV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PREDV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PREDV` writer - CK_HXTAL or CK_IRC48M divider previous PLL"] pub struct PREDV_W<'a> { w: &'a mut W, } impl<'a> PREDV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bit 31 - Bit 5 of PLLMF"] #[inline(always)] pub fn pllmf(&self) -> PLLMF_R { PLLMF_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - PLL clock source preselection"] #[inline(always)] pub fn pllpresel(&self) -> PLLPRESEL_R { PLLPRESEL_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bits 0:3 - CK_HXTAL or CK_IRC48M divider previous PLL"] #[inline(always)] pub fn predv(&self) -> PREDV_R { PREDV_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bit 31 - Bit 5 of PLLMF"] #[inline(always)] pub fn pllmf(&mut self) -> PLLMF_W { PLLMF_W { w: self } } #[doc = "Bit 30 - PLL clock source preselection"] #[inline(always)] pub fn pllpresel(&mut self) -> PLLPRESEL_W { PLLPRESEL_W { w: self } } #[doc = "Bits 0:3 - CK_HXTAL or CK_IRC48M divider previous PLL"] #[inline(always)] pub fn predv(&mut self) -> PREDV_W { PREDV_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Configuration register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg1](index.html) module"] pub struct CFG1_SPEC; impl crate::RegisterSpec for CFG1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg1::R](R) reader structure"] impl crate::Readable for CFG1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg1::W](W) writer structure"] impl crate::Writable for CFG1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG1 to value 0"] impl crate::Resettable for CFG1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CFG2 register accessor: an alias for `Reg`"] pub type CFG2 = crate::Reg; #[doc = "Configuration register 2"] pub mod cfg2 { #[doc = "Register `CFG2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ADCPSC` reader - Bit 2 of ADCPSC"] pub struct ADCPSC_R(crate::FieldReader); impl ADCPSC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADCPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADCPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADCPSC` writer - Bit 2 of ADCPSC"] pub struct ADCPSC_W<'a> { w: &'a mut W, } impl<'a> ADCPSC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `USBFSPSC` reader - Bit 2 of USBFSPSC"] pub struct USBFSPSC_R(crate::FieldReader); impl USBFSPSC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBFSPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBFSPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBFSPSC` writer - Bit 2 of USBFSPSC"] pub struct USBFSPSC_W<'a> { w: &'a mut W, } impl<'a> USBFSPSC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `IRC28MDIV` reader - CK_IRC28M divider 2 or not"] pub struct IRC28MDIV_R(crate::FieldReader); impl IRC28MDIV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC28MDIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC28MDIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC28MDIV` writer - CK_IRC28M divider 2 or not"] pub struct IRC28MDIV_W<'a> { w: &'a mut W, } impl<'a> IRC28MDIV_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `ADCSEL` reader - CK_ADC clock source selection"] pub struct ADCSEL_R(crate::FieldReader); impl ADCSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADCSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADCSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADCSEL` writer - CK_ADC clock source selection"] pub struct ADCSEL_W<'a> { w: &'a mut W, } impl<'a> ADCSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CECSEL` reader - CK_CEC clock source selection"] pub struct CECSEL_R(crate::FieldReader); impl CECSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CECSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CECSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CECSEL` writer - CK_CEC clock source selection"] pub struct CECSEL_W<'a> { w: &'a mut W, } impl<'a> CECSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `USART0SEL` reader - CK_USART0 clock source selection"] pub struct USART0SEL_R(crate::FieldReader); impl USART0SEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { USART0SEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USART0SEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USART0SEL` writer - CK_USART0 clock source selection"] pub struct USART0SEL_W<'a> { w: &'a mut W, } impl<'a> USART0SEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bit 31 - Bit 2 of ADCPSC"] #[inline(always)] pub fn adcpsc(&self) -> ADCPSC_R { ADCPSC_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - Bit 2 of USBFSPSC"] #[inline(always)] pub fn usbfspsc(&self) -> USBFSPSC_R { USBFSPSC_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 16 - CK_IRC28M divider 2 or not"] #[inline(always)] pub fn irc28mdiv(&self) -> IRC28MDIV_R { IRC28MDIV_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 8 - CK_ADC clock source selection"] #[inline(always)] pub fn adcsel(&self) -> ADCSEL_R { ADCSEL_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 6 - CK_CEC clock source selection"] #[inline(always)] pub fn cecsel(&self) -> CECSEL_R { CECSEL_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bits 0:1 - CK_USART0 clock source selection"] #[inline(always)] pub fn usart0sel(&self) -> USART0SEL_R { USART0SEL_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bit 31 - Bit 2 of ADCPSC"] #[inline(always)] pub fn adcpsc(&mut self) -> ADCPSC_W { ADCPSC_W { w: self } } #[doc = "Bit 30 - Bit 2 of USBFSPSC"] #[inline(always)] pub fn usbfspsc(&mut self) -> USBFSPSC_W { USBFSPSC_W { w: self } } #[doc = "Bit 16 - CK_IRC28M divider 2 or not"] #[inline(always)] pub fn irc28mdiv(&mut self) -> IRC28MDIV_W { IRC28MDIV_W { w: self } } #[doc = "Bit 8 - CK_ADC clock source selection"] #[inline(always)] pub fn adcsel(&mut self) -> ADCSEL_W { ADCSEL_W { w: self } } #[doc = "Bit 6 - CK_CEC clock source selection"] #[inline(always)] pub fn cecsel(&mut self) -> CECSEL_W { CECSEL_W { w: self } } #[doc = "Bits 0:1 - CK_USART0 clock source selection"] #[inline(always)] pub fn usart0sel(&mut self) -> USART0SEL_W { USART0SEL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Configuration register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg2](index.html) module"] pub struct CFG2_SPEC; impl crate::RegisterSpec for CFG2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg2::R](R) reader structure"] impl crate::Readable for CFG2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg2::W](W) writer structure"] impl crate::Writable for CFG2_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG2 to value 0"] impl crate::Resettable for CFG2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "Control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IRC28MCALIB` reader - Internal 28M RC Oscillator calibration value register"] pub struct IRC28MCALIB_R(crate::FieldReader); impl IRC28MCALIB_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { IRC28MCALIB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC28MCALIB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC28MADJ` reader - Internal 28M RC Oscillator clock trim adjust value"] pub struct IRC28MADJ_R(crate::FieldReader); impl IRC28MADJ_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { IRC28MADJ_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC28MADJ_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC28MADJ` writer - Internal 28M RC Oscillator clock trim adjust value"] pub struct IRC28MADJ_W<'a> { w: &'a mut W, } impl<'a> IRC28MADJ_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 3)) | ((value as u32 & 0x1f) << 3); self.w } } #[doc = "Field `IRC28MSTB` reader - IRC28M Internal 28M RC Oscillator stabilization Flag"] pub struct IRC28MSTB_R(crate::FieldReader); impl IRC28MSTB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC28MSTB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC28MSTB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC28MEN` reader - IRC28M Internal 28M RC oscillator Enable"] pub struct IRC28MEN_R(crate::FieldReader); impl IRC28MEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC28MEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC28MEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC28MEN` writer - IRC28M Internal 28M RC oscillator Enable"] pub struct IRC28MEN_W<'a> { w: &'a mut W, } impl<'a> IRC28MEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 8:15 - Internal 28M RC Oscillator calibration value register"] #[inline(always)] pub fn irc28mcalib(&self) -> IRC28MCALIB_R { IRC28MCALIB_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 3:7 - Internal 28M RC Oscillator clock trim adjust value"] #[inline(always)] pub fn irc28madj(&self) -> IRC28MADJ_R { IRC28MADJ_R::new(((self.bits >> 3) & 0x1f) as u8) } #[doc = "Bit 1 - IRC28M Internal 28M RC Oscillator stabilization Flag"] #[inline(always)] pub fn irc28mstb(&self) -> IRC28MSTB_R { IRC28MSTB_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - IRC28M Internal 28M RC oscillator Enable"] #[inline(always)] pub fn irc28men(&self) -> IRC28MEN_R { IRC28MEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 3:7 - Internal 28M RC Oscillator clock trim adjust value"] #[inline(always)] pub fn irc28madj(&mut self) -> IRC28MADJ_W { IRC28MADJ_W { w: self } } #[doc = "Bit 0 - IRC28M Internal 28M RC oscillator Enable"] #[inline(always)] pub fn irc28men(&mut self) -> IRC28MEN_W { IRC28MEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0x80"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x80 } } } #[doc = "ADDCTL register accessor: an alias for `Reg`"] pub type ADDCTL = crate::Reg; #[doc = "Additional clock control register"] pub mod addctl { #[doc = "Register `ADDCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ADDCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IRC48MCALIB` reader - Internal 48MHz RC oscillator calibration value register"] pub struct IRC48MCALIB_R(crate::FieldReader); impl IRC48MCALIB_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { IRC48MCALIB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC48MCALIB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC48MCALIB` writer - Internal 48MHz RC oscillator calibration value register"] pub struct IRC48MCALIB_W<'a> { w: &'a mut W, } impl<'a> IRC48MCALIB_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0xff << 24)) | ((value as u32 & 0xff) << 24); self.w } } #[doc = "Field `IRC48MSTB` reader - Internal 48MHz RC oscillator clock stabilization Flag"] pub struct IRC48MSTB_R(crate::FieldReader); impl IRC48MSTB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC48MSTB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC48MSTB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC48MSTB` writer - Internal 48MHz RC oscillator clock stabilization Flag"] pub struct IRC48MSTB_W<'a> { w: &'a mut W, } impl<'a> IRC48MSTB_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `IRC48MEN` reader - Internal 48MHz RC oscillator enable"] pub struct IRC48MEN_R(crate::FieldReader); impl IRC48MEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC48MEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC48MEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC48MEN` writer - Internal 48MHz RC oscillator enable"] pub struct IRC48MEN_W<'a> { w: &'a mut W, } impl<'a> IRC48MEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `CK48MSEL` reader - 48MHz clock selection"] pub struct CK48MSEL_R(crate::FieldReader); impl CK48MSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CK48MSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CK48MSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CK48MSEL` writer - 48MHz clock selection"] pub struct CK48MSEL_W<'a> { w: &'a mut W, } impl<'a> CK48MSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 24:31 - Internal 48MHz RC oscillator calibration value register"] #[inline(always)] pub fn irc48mcalib(&self) -> IRC48MCALIB_R { IRC48MCALIB_R::new(((self.bits >> 24) & 0xff) as u8) } #[doc = "Bit 17 - Internal 48MHz RC oscillator clock stabilization Flag"] #[inline(always)] pub fn irc48mstb(&self) -> IRC48MSTB_R { IRC48MSTB_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - Internal 48MHz RC oscillator enable"] #[inline(always)] pub fn irc48men(&self) -> IRC48MEN_R { IRC48MEN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 0 - 48MHz clock selection"] #[inline(always)] pub fn ck48msel(&self) -> CK48MSEL_R { CK48MSEL_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 24:31 - Internal 48MHz RC oscillator calibration value register"] #[inline(always)] pub fn irc48mcalib(&mut self) -> IRC48MCALIB_W { IRC48MCALIB_W { w: self } } #[doc = "Bit 17 - Internal 48MHz RC oscillator clock stabilization Flag"] #[inline(always)] pub fn irc48mstb(&mut self) -> IRC48MSTB_W { IRC48MSTB_W { w: self } } #[doc = "Bit 16 - Internal 48MHz RC oscillator enable"] #[inline(always)] pub fn irc48men(&mut self) -> IRC48MEN_W { IRC48MEN_W { w: self } } #[doc = "Bit 0 - 48MHz clock selection"] #[inline(always)] pub fn ck48msel(&mut self) -> CK48MSEL_W { CK48MSEL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Additional clock control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addctl](index.html) module"] pub struct ADDCTL_SPEC; impl crate::RegisterSpec for ADDCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [addctl::R](R) reader structure"] impl crate::Readable for ADDCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [addctl::W](W) writer structure"] impl crate::Writable for ADDCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets ADDCTL to value 0x8000_0000"] impl crate::Resettable for ADDCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x8000_0000 } } } #[doc = "ADDINT register accessor: an alias for `Reg`"] pub type ADDINT = crate::Reg; #[doc = "Additional clock interrupt register"] pub mod addint { #[doc = "Register `ADDINT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ADDINT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IRC48MSTBIC` reader - Internal 48 MHz RC oscillator Stabilization Interrupt Clear"] pub struct IRC48MSTBIC_R(crate::FieldReader); impl IRC48MSTBIC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC48MSTBIC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC48MSTBIC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC48MSTBIC` writer - Internal 48 MHz RC oscillator Stabilization Interrupt Clear"] pub struct IRC48MSTBIC_W<'a> { w: &'a mut W, } impl<'a> IRC48MSTBIC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `IRC48MSTBIE` reader - Internal 48 MHz RC oscillator Stabilization Interrupt Enable"] pub struct IRC48MSTBIE_R(crate::FieldReader); impl IRC48MSTBIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC48MSTBIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC48MSTBIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRC48MSTBIE` writer - Internal 48 MHz RC oscillator Stabilization Interrupt Enable"] pub struct IRC48MSTBIE_W<'a> { w: &'a mut W, } impl<'a> IRC48MSTBIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `IRC48MSTBIF` reader - IRC48M stabilization interrupt flag"] pub struct IRC48MSTBIF_R(crate::FieldReader); impl IRC48MSTBIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRC48MSTBIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRC48MSTBIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 22 - Internal 48 MHz RC oscillator Stabilization Interrupt Clear"] #[inline(always)] pub fn irc48mstbic(&self) -> IRC48MSTBIC_R { IRC48MSTBIC_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 14 - Internal 48 MHz RC oscillator Stabilization Interrupt Enable"] #[inline(always)] pub fn irc48mstbie(&self) -> IRC48MSTBIE_R { IRC48MSTBIE_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 6 - IRC48M stabilization interrupt flag"] #[inline(always)] pub fn irc48mstbif(&self) -> IRC48MSTBIF_R { IRC48MSTBIF_R::new(((self.bits >> 6) & 0x01) != 0) } } impl W { #[doc = "Bit 22 - Internal 48 MHz RC oscillator Stabilization Interrupt Clear"] #[inline(always)] pub fn irc48mstbic(&mut self) -> IRC48MSTBIC_W { IRC48MSTBIC_W { w: self } } #[doc = "Bit 14 - Internal 48 MHz RC oscillator Stabilization Interrupt Enable"] #[inline(always)] pub fn irc48mstbie(&mut self) -> IRC48MSTBIE_W { IRC48MSTBIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Additional clock interrupt register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addint](index.html) module"] pub struct ADDINT_SPEC; impl crate::RegisterSpec for ADDINT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [addint::R](R) reader structure"] impl crate::Readable for ADDINT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [addint::W](W) writer structure"] impl crate::Writable for ADDINT_SPEC { type Writer = W; } #[doc = "`reset()` method sets ADDINT to value 0"] impl crate::Resettable for ADDINT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "ADDAPB1EN register accessor: an alias for `Reg`"] pub type ADDAPB1EN = crate::Reg; #[doc = "APB1 additional enable register"] pub mod addapb1en { #[doc = "Register `ADDAPB1EN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ADDAPB1EN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CTCEN` reader - CTC clock enable"] pub struct CTCEN_R(crate::FieldReader); impl CTCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CTCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTCEN` writer - CTC clock enable"] pub struct CTCEN_W<'a> { w: &'a mut W, } impl<'a> CTCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } impl R { #[doc = "Bit 27 - CTC clock enable"] #[inline(always)] pub fn ctcen(&self) -> CTCEN_R { CTCEN_R::new(((self.bits >> 27) & 0x01) != 0) } } impl W { #[doc = "Bit 27 - CTC clock enable"] #[inline(always)] pub fn ctcen(&mut self) -> CTCEN_W { CTCEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "APB1 additional enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addapb1en](index.html) module"] pub struct ADDAPB1EN_SPEC; impl crate::RegisterSpec for ADDAPB1EN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [addapb1en::R](R) reader structure"] impl crate::Readable for ADDAPB1EN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [addapb1en::W](W) writer structure"] impl crate::Writable for ADDAPB1EN_SPEC { type Writer = W; } #[doc = "`reset()` method sets ADDAPB1EN to value 0"] impl crate::Resettable for ADDAPB1EN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "ADDAPB1RST register accessor: an alias for `Reg`"] pub type ADDAPB1RST = crate::Reg; #[doc = "APB1 additional reset register"] pub mod addapb1rst { #[doc = "Register `ADDAPB1RST` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ADDAPB1RST` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CTCRST` reader - CTC reset"] pub struct CTCRST_R(crate::FieldReader); impl CTCRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CTCRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTCRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTCRST` writer - CTC reset"] pub struct CTCRST_W<'a> { w: &'a mut W, } impl<'a> CTCRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } impl R { #[doc = "Bit 27 - CTC reset"] #[inline(always)] pub fn ctcrst(&self) -> CTCRST_R { CTCRST_R::new(((self.bits >> 27) & 0x01) != 0) } } impl W { #[doc = "Bit 27 - CTC reset"] #[inline(always)] pub fn ctcrst(&mut self) -> CTCRST_W { CTCRST_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "APB1 additional reset register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addapb1rst](index.html) module"] pub struct ADDAPB1RST_SPEC; impl crate::RegisterSpec for ADDAPB1RST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [addapb1rst::R](R) reader structure"] impl crate::Readable for ADDAPB1RST_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [addapb1rst::W](W) writer structure"] impl crate::Writable for ADDAPB1RST_SPEC { type Writer = W; } #[doc = "`reset()` method sets ADDAPB1RST to value 0"] impl crate::Resettable for ADDAPB1RST_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "VKEY register accessor: an alias for `Reg`"] pub type VKEY = crate::Reg; #[doc = "Voltage key register"] pub mod vkey { #[doc = "Register `VKEY` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `VKEY` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `KEY` reader - The key of RCU_DSV register"] pub struct KEY_R(crate::FieldReader); impl KEY_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { KEY_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for KEY_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `KEY` writer - The key of RCU_DSV register"] pub struct KEY_W<'a> { w: &'a mut W, } impl<'a> KEY_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - The key of RCU_DSV register"] #[inline(always)] pub fn key(&self) -> KEY_R { KEY_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - The key of RCU_DSV register"] #[inline(always)] pub fn key(&mut self) -> KEY_W { KEY_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Voltage key register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vkey](index.html) module"] pub struct VKEY_SPEC; impl crate::RegisterSpec for VKEY_SPEC { type Ux = u32; } #[doc = "`read()` method returns [vkey::R](R) reader structure"] impl crate::Readable for VKEY_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [vkey::W](W) writer structure"] impl crate::Writable for VKEY_SPEC { type Writer = W; } #[doc = "`reset()` method sets VKEY to value 0"] impl crate::Resettable for VKEY_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DSV register accessor: an alias for `Reg`"] pub type DSV = crate::Reg; #[doc = "Deep-sleep mode voltage register"] pub mod dsv { #[doc = "Register `DSV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DSV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DSLPVS` reader - Deep-sleep mode voltage select"] pub struct DSLPVS_R(crate::FieldReader); impl DSLPVS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DSLPVS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DSLPVS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DSLPVS` writer - Deep-sleep mode voltage select"] pub struct DSLPVS_W<'a> { w: &'a mut W, } impl<'a> DSLPVS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 0:1 - Deep-sleep mode voltage select"] #[inline(always)] pub fn dslpvs(&self) -> DSLPVS_R { DSLPVS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 0:1 - Deep-sleep mode voltage select"] #[inline(always)] pub fn dslpvs(&mut self) -> DSLPVS_W { DSLPVS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Deep-sleep mode voltage register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dsv](index.html) module"] pub struct DSV_SPEC; impl crate::RegisterSpec for DSV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dsv::R](R) reader structure"] impl crate::Readable for DSV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dsv::W](W) writer structure"] impl crate::Writable for DSV_SPEC { type Writer = W; } #[doc = "`reset()` method sets DSV to value 0"] impl crate::Resettable for DSV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Real-time clock"] pub struct RTC { _marker: PhantomData<*const ()>, } unsafe impl Send for RTC {} impl RTC { #[doc = r"Pointer to the register block"] pub const PTR: *const rtc::RegisterBlock = 0x4000_2800 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const rtc::RegisterBlock { Self::PTR } } impl Deref for RTC { type Target = rtc::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for RTC { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("RTC").finish() } } #[doc = "Real-time clock"] pub mod rtc { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - time register"] pub time: crate::Reg, #[doc = "0x04 - date register"] pub date: crate::Reg, #[doc = "0x08 - control register"] pub ctl: crate::Reg, #[doc = "0x0c - initialization and status register"] pub stat: crate::Reg, #[doc = "0x10 - prescaler register"] pub psc: crate::Reg, _reserved5: [u8; 0x08], #[doc = "0x1c - alarm A register"] pub alrm0td: crate::Reg, _reserved6: [u8; 0x04], #[doc = "0x24 - write protection register"] pub wpk: crate::Reg, #[doc = "0x28 - sub second register"] pub ss: crate::Reg, #[doc = "0x2c - shift control register"] pub shiftctl: crate::Reg, #[doc = "0x30 - timestamp time register"] pub tts: crate::Reg, #[doc = "0x34 - Date of time stamp register"] pub dts: crate::Reg, #[doc = "0x38 - time-stamp sub second register"] pub ssts: crate::Reg, #[doc = "0x3c - High resolution frequency compensation register"] pub hrfc: crate::Reg, #[doc = "0x40 - tamper and alternate function configuration register"] pub tamp: crate::Reg, #[doc = "0x44 - alarm 0 sub second register"] pub alrm0ss: crate::Reg, _reserved15: [u8; 0x08], #[doc = "0x50 - backup register"] pub bkp0: crate::Reg, #[doc = "0x54 - backup register"] pub bkp1: crate::Reg, #[doc = "0x58 - backup register"] pub bkp2: crate::Reg, #[doc = "0x5c - backup register"] pub bkp3: crate::Reg, #[doc = "0x60 - backup register"] pub bkp4: crate::Reg, } #[doc = "TIME register accessor: an alias for `Reg`"] pub type TIME = crate::Reg; #[doc = "time register"] pub mod time { #[doc = "Register `TIME` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `TIME` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PM` reader - AM/PM mark"] pub struct PM_R(crate::FieldReader); impl PM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PM` writer - AM/PM mark"] pub struct PM_W<'a> { w: &'a mut W, } impl<'a> PM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `HRT` reader - Hour tens in BCD code"] pub struct HRT_R(crate::FieldReader); impl HRT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { HRT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HRT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HRT` writer - Hour tens in BCD code"] pub struct HRT_W<'a> { w: &'a mut W, } impl<'a> HRT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `HRU` reader - Hour units in BCD format"] pub struct HRU_R(crate::FieldReader); impl HRU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { HRU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HRU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HRU` writer - Hour units in BCD format"] pub struct HRU_W<'a> { w: &'a mut W, } impl<'a> HRU_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16); self.w } } #[doc = "Field `MNT` reader - Minute tens in BCD code"] pub struct MNT_R(crate::FieldReader); impl MNT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNT` writer - Minute tens in BCD code"] pub struct MNT_W<'a> { w: &'a mut W, } impl<'a> MNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `MNU` reader - Minute units in BCD code"] pub struct MNU_R(crate::FieldReader); impl MNU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MNU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNU` writer - Minute units in BCD code"] pub struct MNU_W<'a> { w: &'a mut W, } impl<'a> MNU_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `SCT` reader - Second tens in BCD code"] pub struct SCT_R(crate::FieldReader); impl SCT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SCT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCT` writer - Second tens in BCD code"] pub struct SCT_W<'a> { w: &'a mut W, } impl<'a> SCT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `SCU` reader - Second units in BCD code"] pub struct SCU_R(crate::FieldReader); impl SCU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SCU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCU` writer - Second units in BCD code"] pub struct SCU_W<'a> { w: &'a mut W, } impl<'a> SCU_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bit 22 - AM/PM mark"] #[inline(always)] pub fn pm(&self) -> PM_R { PM_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bits 20:21 - Hour tens in BCD code"] #[inline(always)] pub fn hrt(&self) -> HRT_R { HRT_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 16:19 - Hour units in BCD format"] #[inline(always)] pub fn hru(&self) -> HRU_R { HRU_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 12:14 - Minute tens in BCD code"] #[inline(always)] pub fn mnt(&self) -> MNT_R { MNT_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bits 8:11 - Minute units in BCD code"] #[inline(always)] pub fn mnu(&self) -> MNU_R { MNU_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:6 - Second tens in BCD code"] #[inline(always)] pub fn sct(&self) -> SCT_R { SCT_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bits 0:3 - Second units in BCD code"] #[inline(always)] pub fn scu(&self) -> SCU_R { SCU_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bit 22 - AM/PM mark"] #[inline(always)] pub fn pm(&mut self) -> PM_W { PM_W { w: self } } #[doc = "Bits 20:21 - Hour tens in BCD code"] #[inline(always)] pub fn hrt(&mut self) -> HRT_W { HRT_W { w: self } } #[doc = "Bits 16:19 - Hour units in BCD format"] #[inline(always)] pub fn hru(&mut self) -> HRU_W { HRU_W { w: self } } #[doc = "Bits 12:14 - Minute tens in BCD code"] #[inline(always)] pub fn mnt(&mut self) -> MNT_W { MNT_W { w: self } } #[doc = "Bits 8:11 - Minute units in BCD code"] #[inline(always)] pub fn mnu(&mut self) -> MNU_W { MNU_W { w: self } } #[doc = "Bits 4:6 - Second tens in BCD code"] #[inline(always)] pub fn sct(&mut self) -> SCT_W { SCT_W { w: self } } #[doc = "Bits 0:3 - Second units in BCD code"] #[inline(always)] pub fn scu(&mut self) -> SCU_W { SCU_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [time](index.html) module"] pub struct TIME_SPEC; impl crate::RegisterSpec for TIME_SPEC { type Ux = u32; } #[doc = "`read()` method returns [time::R](R) reader structure"] impl crate::Readable for TIME_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [time::W](W) writer structure"] impl crate::Writable for TIME_SPEC { type Writer = W; } #[doc = "`reset()` method sets TIME to value 0"] impl crate::Resettable for TIME_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DATE register accessor: an alias for `Reg`"] pub type DATE = crate::Reg; #[doc = "date register"] pub mod date { #[doc = "Register `DATE` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DATE` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `YRT` reader - Year tens in BCD code"] pub struct YRT_R(crate::FieldReader); impl YRT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { YRT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for YRT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `YRT` writer - Year tens in BCD code"] pub struct YRT_W<'a> { w: &'a mut W, } impl<'a> YRT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 20)) | ((value as u32 & 0x0f) << 20); self.w } } #[doc = "Field `YRU` reader - Year units in BCD code"] pub struct YRU_R(crate::FieldReader); impl YRU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { YRU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for YRU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `YRU` writer - Year units in BCD code"] pub struct YRU_W<'a> { w: &'a mut W, } impl<'a> YRU_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16); self.w } } #[doc = "Field `DOW` reader - Days of the week"] pub struct DOW_R(crate::FieldReader); impl DOW_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DOW_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DOW_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DOW` writer - Days of the week"] pub struct DOW_W<'a> { w: &'a mut W, } impl<'a> DOW_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 13)) | ((value as u32 & 0x07) << 13); self.w } } #[doc = "Field `MONT` reader - Month tens in BCD code"] pub struct MONT_R(crate::FieldReader); impl MONT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MONT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MONT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MONT` writer - Month tens in BCD code"] pub struct MONT_W<'a> { w: &'a mut W, } impl<'a> MONT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `MONU` reader - Month units in BCD code"] pub struct MONU_R(crate::FieldReader); impl MONU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MONU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MONU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MONU` writer - Month units in BCD code"] pub struct MONU_W<'a> { w: &'a mut W, } impl<'a> MONU_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `DAYT` reader - Date tens in BCD code"] pub struct DAYT_R(crate::FieldReader); impl DAYT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAYT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAYT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAYT` writer - Date tens in BCD code"] pub struct DAYT_W<'a> { w: &'a mut W, } impl<'a> DAYT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `DAYU` reader - Date units in BCD code"] pub struct DAYU_R(crate::FieldReader); impl DAYU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAYU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAYU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAYU` writer - Date units in BCD code"] pub struct DAYU_W<'a> { w: &'a mut W, } impl<'a> DAYU_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 20:23 - Year tens in BCD code"] #[inline(always)] pub fn yrt(&self) -> YRT_R { YRT_R::new(((self.bits >> 20) & 0x0f) as u8) } #[doc = "Bits 16:19 - Year units in BCD code"] #[inline(always)] pub fn yru(&self) -> YRU_R { YRU_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 13:15 - Days of the week"] #[inline(always)] pub fn dow(&self) -> DOW_R { DOW_R::new(((self.bits >> 13) & 0x07) as u8) } #[doc = "Bit 12 - Month tens in BCD code"] #[inline(always)] pub fn mont(&self) -> MONT_R { MONT_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bits 8:11 - Month units in BCD code"] #[inline(always)] pub fn monu(&self) -> MONU_R { MONU_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:5 - Date tens in BCD code"] #[inline(always)] pub fn dayt(&self) -> DAYT_R { DAYT_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 0:3 - Date units in BCD code"] #[inline(always)] pub fn dayu(&self) -> DAYU_R { DAYU_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 20:23 - Year tens in BCD code"] #[inline(always)] pub fn yrt(&mut self) -> YRT_W { YRT_W { w: self } } #[doc = "Bits 16:19 - Year units in BCD code"] #[inline(always)] pub fn yru(&mut self) -> YRU_W { YRU_W { w: self } } #[doc = "Bits 13:15 - Days of the week"] #[inline(always)] pub fn dow(&mut self) -> DOW_W { DOW_W { w: self } } #[doc = "Bit 12 - Month tens in BCD code"] #[inline(always)] pub fn mont(&mut self) -> MONT_W { MONT_W { w: self } } #[doc = "Bits 8:11 - Month units in BCD code"] #[inline(always)] pub fn monu(&mut self) -> MONU_W { MONU_W { w: self } } #[doc = "Bits 4:5 - Date tens in BCD code"] #[inline(always)] pub fn dayt(&mut self) -> DAYT_W { DAYT_W { w: self } } #[doc = "Bits 0:3 - Date units in BCD code"] #[inline(always)] pub fn dayu(&mut self) -> DAYU_W { DAYU_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "date register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [date](index.html) module"] pub struct DATE_SPEC; impl crate::RegisterSpec for DATE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [date::R](R) reader structure"] impl crate::Readable for DATE_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [date::W](W) writer structure"] impl crate::Writable for DATE_SPEC { type Writer = W; } #[doc = "`reset()` method sets DATE to value 0x2101"] impl crate::Resettable for DATE_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x2101 } } } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `COEN` reader - Calibration output enable"] pub struct COEN_R(crate::FieldReader); impl COEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { COEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for COEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `COEN` writer - Calibration output enable"] pub struct COEN_W<'a> { w: &'a mut W, } impl<'a> COEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `OS` reader - Output selection"] pub struct OS_R(crate::FieldReader); impl OS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OS` writer - Output selection"] pub struct OS_W<'a> { w: &'a mut W, } impl<'a> OS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 21)) | ((value as u32 & 0x03) << 21); self.w } } #[doc = "Field `OPOL` reader - Output polarity"] pub struct OPOL_R(crate::FieldReader); impl OPOL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OPOL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OPOL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OPOL` writer - Output polarity"] pub struct OPOL_W<'a> { w: &'a mut W, } impl<'a> OPOL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `COS` reader - Calibration output selection"] pub struct COS_R(crate::FieldReader); impl COS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { COS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for COS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `COS` writer - Calibration output selection"] pub struct COS_W<'a> { w: &'a mut W, } impl<'a> COS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `DSM` reader - Backup"] pub struct DSM_R(crate::FieldReader); impl DSM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DSM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DSM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DSM` writer - Backup"] pub struct DSM_W<'a> { w: &'a mut W, } impl<'a> DSM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `S1H` writer - Subtract 1 hour (winter time change)"] pub struct S1H_W<'a> { w: &'a mut W, } impl<'a> S1H_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `A1H` writer - Add 1 hour (summer time change)"] pub struct A1H_W<'a> { w: &'a mut W, } impl<'a> A1H_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `TSIE` reader - Time-stamp interrupt enable"] pub struct TSIE_R(crate::FieldReader); impl TSIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TSIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TSIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TSIE` writer - Time-stamp interrupt enable"] pub struct TSIE_W<'a> { w: &'a mut W, } impl<'a> TSIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `ALRM0IE` reader - Alarm A interrupt enable"] pub struct ALRM0IE_R(crate::FieldReader); impl ALRM0IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ALRM0IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ALRM0IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ALRM0IE` writer - Alarm A interrupt enable"] pub struct ALRM0IE_W<'a> { w: &'a mut W, } impl<'a> ALRM0IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TSEN` reader - timestamp enable"] pub struct TSEN_R(crate::FieldReader); impl TSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TSEN` writer - timestamp enable"] pub struct TSEN_W<'a> { w: &'a mut W, } impl<'a> TSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `ALRM0EN` reader - Alarm A enable"] pub struct ALRM0EN_R(crate::FieldReader); impl ALRM0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ALRM0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ALRM0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ALRM0EN` writer - Alarm A enable"] pub struct ALRM0EN_W<'a> { w: &'a mut W, } impl<'a> ALRM0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CS` reader - Hour format"] pub struct CS_R(crate::FieldReader); impl CS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CS` writer - Hour format"] pub struct CS_W<'a> { w: &'a mut W, } impl<'a> CS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `BPSHAD` reader - Bypass the shadow registers"] pub struct BPSHAD_R(crate::FieldReader); impl BPSHAD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BPSHAD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BPSHAD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BPSHAD` writer - Bypass the shadow registers"] pub struct BPSHAD_W<'a> { w: &'a mut W, } impl<'a> BPSHAD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `REFEN` reader - RTC_REFIN reference clock detection enable (50 or 60 Hz)"] pub struct REFEN_R(crate::FieldReader); impl REFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REFEN` writer - RTC_REFIN reference clock detection enable (50 or 60 Hz)"] pub struct REFEN_W<'a> { w: &'a mut W, } impl<'a> REFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TSEG` reader - Time-stamp event active edge"] pub struct TSEG_R(crate::FieldReader); impl TSEG_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TSEG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TSEG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TSEG` writer - Time-stamp event active edge"] pub struct TSEG_W<'a> { w: &'a mut W, } impl<'a> TSEG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } impl R { #[doc = "Bit 23 - Calibration output enable"] #[inline(always)] pub fn coen(&self) -> COEN_R { COEN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bits 21:22 - Output selection"] #[inline(always)] pub fn os(&self) -> OS_R { OS_R::new(((self.bits >> 21) & 0x03) as u8) } #[doc = "Bit 20 - Output polarity"] #[inline(always)] pub fn opol(&self) -> OPOL_R { OPOL_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - Calibration output selection"] #[inline(always)] pub fn cos(&self) -> COS_R { COS_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - Backup"] #[inline(always)] pub fn dsm(&self) -> DSM_R { DSM_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 15 - Time-stamp interrupt enable"] #[inline(always)] pub fn tsie(&self) -> TSIE_R { TSIE_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 12 - Alarm A interrupt enable"] #[inline(always)] pub fn alrm0ie(&self) -> ALRM0IE_R { ALRM0IE_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - timestamp enable"] #[inline(always)] pub fn tsen(&self) -> TSEN_R { TSEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 8 - Alarm A enable"] #[inline(always)] pub fn alrm0en(&self) -> ALRM0EN_R { ALRM0EN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 6 - Hour format"] #[inline(always)] pub fn cs(&self) -> CS_R { CS_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Bypass the shadow registers"] #[inline(always)] pub fn bpshad(&self) -> BPSHAD_R { BPSHAD_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - RTC_REFIN reference clock detection enable (50 or 60 Hz)"] #[inline(always)] pub fn refen(&self) -> REFEN_R { REFEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Time-stamp event active edge"] #[inline(always)] pub fn tseg(&self) -> TSEG_R { TSEG_R::new(((self.bits >> 3) & 0x01) != 0) } } impl W { #[doc = "Bit 23 - Calibration output enable"] #[inline(always)] pub fn coen(&mut self) -> COEN_W { COEN_W { w: self } } #[doc = "Bits 21:22 - Output selection"] #[inline(always)] pub fn os(&mut self) -> OS_W { OS_W { w: self } } #[doc = "Bit 20 - Output polarity"] #[inline(always)] pub fn opol(&mut self) -> OPOL_W { OPOL_W { w: self } } #[doc = "Bit 19 - Calibration output selection"] #[inline(always)] pub fn cos(&mut self) -> COS_W { COS_W { w: self } } #[doc = "Bit 18 - Backup"] #[inline(always)] pub fn dsm(&mut self) -> DSM_W { DSM_W { w: self } } #[doc = "Bit 17 - Subtract 1 hour (winter time change)"] #[inline(always)] pub fn s1h(&mut self) -> S1H_W { S1H_W { w: self } } #[doc = "Bit 16 - Add 1 hour (summer time change)"] #[inline(always)] pub fn a1h(&mut self) -> A1H_W { A1H_W { w: self } } #[doc = "Bit 15 - Time-stamp interrupt enable"] #[inline(always)] pub fn tsie(&mut self) -> TSIE_W { TSIE_W { w: self } } #[doc = "Bit 12 - Alarm A interrupt enable"] #[inline(always)] pub fn alrm0ie(&mut self) -> ALRM0IE_W { ALRM0IE_W { w: self } } #[doc = "Bit 11 - timestamp enable"] #[inline(always)] pub fn tsen(&mut self) -> TSEN_W { TSEN_W { w: self } } #[doc = "Bit 8 - Alarm A enable"] #[inline(always)] pub fn alrm0en(&mut self) -> ALRM0EN_W { ALRM0EN_W { w: self } } #[doc = "Bit 6 - Hour format"] #[inline(always)] pub fn cs(&mut self) -> CS_W { CS_W { w: self } } #[doc = "Bit 5 - Bypass the shadow registers"] #[inline(always)] pub fn bpshad(&mut self) -> BPSHAD_W { BPSHAD_W { w: self } } #[doc = "Bit 4 - RTC_REFIN reference clock detection enable (50 or 60 Hz)"] #[inline(always)] pub fn refen(&mut self) -> REFEN_W { REFEN_W { w: self } } #[doc = "Bit 3 - Time-stamp event active edge"] #[inline(always)] pub fn tseg(&mut self) -> TSEG_W { TSEG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "STAT register accessor: an alias for `Reg`"] pub type STAT = crate::Reg; #[doc = "initialization and status register"] pub mod stat { #[doc = "Register `STAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `STAT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SCPF` reader - Recalibration pending Flag"] pub struct SCPF_R(crate::FieldReader); impl SCPF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SCPF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCPF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TP1F` reader - RTC_TAMP1 detection flag"] pub struct TP1F_R(crate::FieldReader); impl TP1F_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TP1F_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TP1F_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TP1F` writer - RTC_TAMP1 detection flag"] pub struct TP1F_W<'a> { w: &'a mut W, } impl<'a> TP1F_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `TP0F` reader - RTC_TAMP0 detection flag"] pub struct TP0F_R(crate::FieldReader); impl TP0F_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TP0F_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TP0F_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TP0F` writer - RTC_TAMP0 detection flag"] pub struct TP0F_W<'a> { w: &'a mut W, } impl<'a> TP0F_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `TSOVRF` reader - Time-stamp overflow flag"] pub struct TSOVRF_R(crate::FieldReader); impl TSOVRF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TSOVRF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TSOVRF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TSOVRF` writer - Time-stamp overflow flag"] pub struct TSOVRF_W<'a> { w: &'a mut W, } impl<'a> TSOVRF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TSF` reader - Time-stamp flag"] pub struct TSF_R(crate::FieldReader); impl TSF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TSF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TSF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TSF` writer - Time-stamp flag"] pub struct TSF_W<'a> { w: &'a mut W, } impl<'a> TSF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `ALRM0F` reader - Alarm A flag"] pub struct ALRM0F_R(crate::FieldReader); impl ALRM0F_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ALRM0F_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ALRM0F_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ALRM0F` writer - Alarm A flag"] pub struct ALRM0F_W<'a> { w: &'a mut W, } impl<'a> ALRM0F_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `INITM` reader - Initialization mode"] pub struct INITM_R(crate::FieldReader); impl INITM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INITM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INITM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `INITM` writer - Initialization mode"] pub struct INITM_W<'a> { w: &'a mut W, } impl<'a> INITM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `INITF` reader - Initialization flag"] pub struct INITF_R(crate::FieldReader); impl INITF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { INITF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for INITF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSYNF` reader - Registers synchronization flag"] pub struct RSYNF_R(crate::FieldReader); impl RSYNF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RSYNF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSYNF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSYNF` writer - Registers synchronization flag"] pub struct RSYNF_W<'a> { w: &'a mut W, } impl<'a> RSYNF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `YCM` reader - Initialization status flag"] pub struct YCM_R(crate::FieldReader); impl YCM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { YCM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for YCM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SOPF` reader - Shift operation pending"] pub struct SOPF_R(crate::FieldReader); impl SOPF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SOPF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SOPF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SOPF` writer - Shift operation pending"] pub struct SOPF_W<'a> { w: &'a mut W, } impl<'a> SOPF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `ALRM0WF` reader - Alarm A write flag"] pub struct ALRM0WF_R(crate::FieldReader); impl ALRM0WF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ALRM0WF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ALRM0WF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 16 - Recalibration pending Flag"] #[inline(always)] pub fn scpf(&self) -> SCPF_R { SCPF_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 14 - RTC_TAMP1 detection flag"] #[inline(always)] pub fn tp1f(&self) -> TP1F_R { TP1F_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - RTC_TAMP0 detection flag"] #[inline(always)] pub fn tp0f(&self) -> TP0F_R { TP0F_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Time-stamp overflow flag"] #[inline(always)] pub fn tsovrf(&self) -> TSOVRF_R { TSOVRF_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Time-stamp flag"] #[inline(always)] pub fn tsf(&self) -> TSF_R { TSF_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 8 - Alarm A flag"] #[inline(always)] pub fn alrm0f(&self) -> ALRM0F_R { ALRM0F_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Initialization mode"] #[inline(always)] pub fn initm(&self) -> INITM_R { INITM_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Initialization flag"] #[inline(always)] pub fn initf(&self) -> INITF_R { INITF_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Registers synchronization flag"] #[inline(always)] pub fn rsynf(&self) -> RSYNF_R { RSYNF_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Initialization status flag"] #[inline(always)] pub fn ycm(&self) -> YCM_R { YCM_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Shift operation pending"] #[inline(always)] pub fn sopf(&self) -> SOPF_R { SOPF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 0 - Alarm A write flag"] #[inline(always)] pub fn alrm0wf(&self) -> ALRM0WF_R { ALRM0WF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 14 - RTC_TAMP1 detection flag"] #[inline(always)] pub fn tp1f(&mut self) -> TP1F_W { TP1F_W { w: self } } #[doc = "Bit 13 - RTC_TAMP0 detection flag"] #[inline(always)] pub fn tp0f(&mut self) -> TP0F_W { TP0F_W { w: self } } #[doc = "Bit 12 - Time-stamp overflow flag"] #[inline(always)] pub fn tsovrf(&mut self) -> TSOVRF_W { TSOVRF_W { w: self } } #[doc = "Bit 11 - Time-stamp flag"] #[inline(always)] pub fn tsf(&mut self) -> TSF_W { TSF_W { w: self } } #[doc = "Bit 8 - Alarm A flag"] #[inline(always)] pub fn alrm0f(&mut self) -> ALRM0F_W { ALRM0F_W { w: self } } #[doc = "Bit 7 - Initialization mode"] #[inline(always)] pub fn initm(&mut self) -> INITM_W { INITM_W { w: self } } #[doc = "Bit 5 - Registers synchronization flag"] #[inline(always)] pub fn rsynf(&mut self) -> RSYNF_W { RSYNF_W { w: self } } #[doc = "Bit 3 - Shift operation pending"] #[inline(always)] pub fn sopf(&mut self) -> SOPF_W { SOPF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "initialization and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"] pub struct STAT_SPEC; impl crate::RegisterSpec for STAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat::R](R) reader structure"] impl crate::Readable for STAT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [stat::W](W) writer structure"] impl crate::Writable for STAT_SPEC { type Writer = W; } #[doc = "`reset()` method sets STAT to value 0x07"] impl crate::Resettable for STAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x07 } } } #[doc = "PSC register accessor: an alias for `Reg`"] pub type PSC = crate::Reg; #[doc = "prescaler register"] pub mod psc { #[doc = "Register `PSC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PSC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `FACTOR_A` reader - Asynchronous prescaler factor"] pub struct FACTOR_A_R(crate::FieldReader); impl FACTOR_A_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { FACTOR_A_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FACTOR_A_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FACTOR_A` writer - Asynchronous prescaler factor"] pub struct FACTOR_A_W<'a> { w: &'a mut W, } impl<'a> FACTOR_A_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 16)) | ((value as u32 & 0x7f) << 16); self.w } } #[doc = "Field `FACTOR_S` reader - Synchronous prescaler factor"] pub struct FACTOR_S_R(crate::FieldReader); impl FACTOR_S_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { FACTOR_S_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FACTOR_S_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FACTOR_S` writer - Synchronous prescaler factor"] pub struct FACTOR_S_W<'a> { w: &'a mut W, } impl<'a> FACTOR_S_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x7fff) | (value as u32 & 0x7fff); self.w } } impl R { #[doc = "Bits 16:22 - Asynchronous prescaler factor"] #[inline(always)] pub fn factor_a(&self) -> FACTOR_A_R { FACTOR_A_R::new(((self.bits >> 16) & 0x7f) as u8) } #[doc = "Bits 0:14 - Synchronous prescaler factor"] #[inline(always)] pub fn factor_s(&self) -> FACTOR_S_R { FACTOR_S_R::new((self.bits & 0x7fff) as u16) } } impl W { #[doc = "Bits 16:22 - Asynchronous prescaler factor"] #[inline(always)] pub fn factor_a(&mut self) -> FACTOR_A_W { FACTOR_A_W { w: self } } #[doc = "Bits 0:14 - Synchronous prescaler factor"] #[inline(always)] pub fn factor_s(&mut self) -> FACTOR_S_W { FACTOR_S_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "prescaler register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](index.html) module"] pub struct PSC_SPEC; impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [psc::R](R) reader structure"] impl crate::Readable for PSC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [psc::W](W) writer structure"] impl crate::Writable for PSC_SPEC { type Writer = W; } #[doc = "`reset()` method sets PSC to value 0x007f_00ff"] impl crate::Resettable for PSC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x007f_00ff } } } #[doc = "ALRM0TD register accessor: an alias for `Reg`"] pub type ALRM0TD = crate::Reg; #[doc = "alarm A register"] pub mod alrm0td { #[doc = "Register `ALRM0TD` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ALRM0TD` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MSKD` reader - Alarm date mask"] pub struct MSKD_R(crate::FieldReader); impl MSKD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MSKD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MSKD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MSKD` writer - Alarm date mask"] pub struct MSKD_W<'a> { w: &'a mut W, } impl<'a> MSKD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `DOWS` reader - Week day selection"] pub struct DOWS_R(crate::FieldReader); impl DOWS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DOWS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DOWS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DOWS` writer - Week day selection"] pub struct DOWS_W<'a> { w: &'a mut W, } impl<'a> DOWS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `DAYT` reader - Date tens in BCD format."] pub struct DAYT_R(crate::FieldReader); impl DAYT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAYT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAYT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAYT` writer - Date tens in BCD format."] pub struct DAYT_W<'a> { w: &'a mut W, } impl<'a> DAYT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `DAYU` reader - Date units or day in BCD format."] pub struct DAYU_R(crate::FieldReader); impl DAYU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAYU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAYU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAYU` writer - Date units or day in BCD format."] pub struct DAYU_W<'a> { w: &'a mut W, } impl<'a> DAYU_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); self.w } } #[doc = "Field `MSKH` reader - Alarm hours mask"] pub struct MSKH_R(crate::FieldReader); impl MSKH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MSKH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MSKH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MSKH` writer - Alarm hours mask"] pub struct MSKH_W<'a> { w: &'a mut W, } impl<'a> MSKH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `PM` reader - AM/PM notation"] pub struct PM_R(crate::FieldReader); impl PM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PM` writer - AM/PM notation"] pub struct PM_W<'a> { w: &'a mut W, } impl<'a> PM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `HRT` reader - Hour tens in BCD format."] pub struct HRT_R(crate::FieldReader); impl HRT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { HRT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HRT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HRT` writer - Hour tens in BCD format."] pub struct HRT_W<'a> { w: &'a mut W, } impl<'a> HRT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `HRU` reader - Hour units in BCD format."] pub struct HRU_R(crate::FieldReader); impl HRU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { HRU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HRU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HRU` writer - Hour units in BCD format."] pub struct HRU_W<'a> { w: &'a mut W, } impl<'a> HRU_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16); self.w } } #[doc = "Field `MSKM` reader - Alarm minutes mask"] pub struct MSKM_R(crate::FieldReader); impl MSKM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MSKM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MSKM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MSKM` writer - Alarm minutes mask"] pub struct MSKM_W<'a> { w: &'a mut W, } impl<'a> MSKM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `MNT` reader - Minute tens in BCD format."] pub struct MNT_R(crate::FieldReader); impl MNT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNT` writer - Minute tens in BCD format."] pub struct MNT_W<'a> { w: &'a mut W, } impl<'a> MNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `MNU` reader - Minute units in BCD format."] pub struct MNU_R(crate::FieldReader); impl MNU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MNU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNU` writer - Minute units in BCD format."] pub struct MNU_W<'a> { w: &'a mut W, } impl<'a> MNU_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `MSKS` reader - Alarm seconds mask"] pub struct MSKS_R(crate::FieldReader); impl MSKS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MSKS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MSKS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MSKS` writer - Alarm seconds mask"] pub struct MSKS_W<'a> { w: &'a mut W, } impl<'a> MSKS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SCT` reader - Second tens in BCD format."] pub struct SCT_R(crate::FieldReader); impl SCT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SCT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCT` writer - Second tens in BCD format."] pub struct SCT_W<'a> { w: &'a mut W, } impl<'a> SCT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `SCU` reader - Second units in BCD format."] pub struct SCU_R(crate::FieldReader); impl SCU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SCU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCU` writer - Second units in BCD format."] pub struct SCU_W<'a> { w: &'a mut W, } impl<'a> SCU_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bit 31 - Alarm date mask"] #[inline(always)] pub fn mskd(&self) -> MSKD_R { MSKD_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - Week day selection"] #[inline(always)] pub fn dows(&self) -> DOWS_R { DOWS_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bits 28:29 - Date tens in BCD format."] #[inline(always)] pub fn dayt(&self) -> DAYT_R { DAYT_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bits 24:27 - Date units or day in BCD format."] #[inline(always)] pub fn dayu(&self) -> DAYU_R { DAYU_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bit 23 - Alarm hours mask"] #[inline(always)] pub fn mskh(&self) -> MSKH_R { MSKH_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 22 - AM/PM notation"] #[inline(always)] pub fn pm(&self) -> PM_R { PM_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bits 20:21 - Hour tens in BCD format."] #[inline(always)] pub fn hrt(&self) -> HRT_R { HRT_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 16:19 - Hour units in BCD format."] #[inline(always)] pub fn hru(&self) -> HRU_R { HRU_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bit 15 - Alarm minutes mask"] #[inline(always)] pub fn mskm(&self) -> MSKM_R { MSKM_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 12:14 - Minute tens in BCD format."] #[inline(always)] pub fn mnt(&self) -> MNT_R { MNT_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bits 8:11 - Minute units in BCD format."] #[inline(always)] pub fn mnu(&self) -> MNU_R { MNU_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 7 - Alarm seconds mask"] #[inline(always)] pub fn msks(&self) -> MSKS_R { MSKS_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:6 - Second tens in BCD format."] #[inline(always)] pub fn sct(&self) -> SCT_R { SCT_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bits 0:3 - Second units in BCD format."] #[inline(always)] pub fn scu(&self) -> SCU_R { SCU_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bit 31 - Alarm date mask"] #[inline(always)] pub fn mskd(&mut self) -> MSKD_W { MSKD_W { w: self } } #[doc = "Bit 30 - Week day selection"] #[inline(always)] pub fn dows(&mut self) -> DOWS_W { DOWS_W { w: self } } #[doc = "Bits 28:29 - Date tens in BCD format."] #[inline(always)] pub fn dayt(&mut self) -> DAYT_W { DAYT_W { w: self } } #[doc = "Bits 24:27 - Date units or day in BCD format."] #[inline(always)] pub fn dayu(&mut self) -> DAYU_W { DAYU_W { w: self } } #[doc = "Bit 23 - Alarm hours mask"] #[inline(always)] pub fn mskh(&mut self) -> MSKH_W { MSKH_W { w: self } } #[doc = "Bit 22 - AM/PM notation"] #[inline(always)] pub fn pm(&mut self) -> PM_W { PM_W { w: self } } #[doc = "Bits 20:21 - Hour tens in BCD format."] #[inline(always)] pub fn hrt(&mut self) -> HRT_W { HRT_W { w: self } } #[doc = "Bits 16:19 - Hour units in BCD format."] #[inline(always)] pub fn hru(&mut self) -> HRU_W { HRU_W { w: self } } #[doc = "Bit 15 - Alarm minutes mask"] #[inline(always)] pub fn mskm(&mut self) -> MSKM_W { MSKM_W { w: self } } #[doc = "Bits 12:14 - Minute tens in BCD format."] #[inline(always)] pub fn mnt(&mut self) -> MNT_W { MNT_W { w: self } } #[doc = "Bits 8:11 - Minute units in BCD format."] #[inline(always)] pub fn mnu(&mut self) -> MNU_W { MNU_W { w: self } } #[doc = "Bit 7 - Alarm seconds mask"] #[inline(always)] pub fn msks(&mut self) -> MSKS_W { MSKS_W { w: self } } #[doc = "Bits 4:6 - Second tens in BCD format."] #[inline(always)] pub fn sct(&mut self) -> SCT_W { SCT_W { w: self } } #[doc = "Bits 0:3 - Second units in BCD format."] #[inline(always)] pub fn scu(&mut self) -> SCU_W { SCU_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "alarm A register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alrm0td](index.html) module"] pub struct ALRM0TD_SPEC; impl crate::RegisterSpec for ALRM0TD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [alrm0td::R](R) reader structure"] impl crate::Readable for ALRM0TD_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [alrm0td::W](W) writer structure"] impl crate::Writable for ALRM0TD_SPEC { type Writer = W; } #[doc = "`reset()` method sets ALRM0TD to value 0"] impl crate::Resettable for ALRM0TD_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "WPK register accessor: an alias for `Reg`"] pub type WPK = crate::Reg; #[doc = "write protection register"] pub mod wpk { #[doc = "Register `WPK` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `WPK` writer - Write protection key"] pub struct WPK_W<'a> { w: &'a mut W, } impl<'a> WPK_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl W { #[doc = "Bits 0:7 - Write protection key"] #[inline(always)] pub fn wpk(&mut self) -> WPK_W { WPK_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "write protection register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [wpk](index.html) module"] pub struct WPK_SPEC; impl crate::RegisterSpec for WPK_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [wpk::W](W) writer structure"] impl crate::Writable for WPK_SPEC { type Writer = W; } #[doc = "`reset()` method sets WPK to value 0"] impl crate::Resettable for WPK_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SS register accessor: an alias for `Reg`"] pub type SS = crate::Reg; #[doc = "sub second register"] pub mod ss { #[doc = "Register `SS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `SSC` reader - Sub second value"] pub struct SSC_R(crate::FieldReader); impl SSC_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { SSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Sub second value"] #[inline(always)] pub fn ssc(&self) -> SSC_R { SSC_R::new((self.bits & 0xffff) as u16) } } #[doc = "sub second register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ss](index.html) module"] pub struct SS_SPEC; impl crate::RegisterSpec for SS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ss::R](R) reader structure"] impl crate::Readable for SS_SPEC { type Reader = R; } #[doc = "`reset()` method sets SS to value 0"] impl crate::Resettable for SS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SHIFTCTL register accessor: an alias for `Reg`"] pub type SHIFTCTL = crate::Reg; #[doc = "shift control register"] pub mod shiftctl { #[doc = "Register `SHIFTCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `A1S` writer - One second add"] pub struct A1S_W<'a> { w: &'a mut W, } impl<'a> A1S_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `SFS` writer - Subtract a fraction of a second"] pub struct SFS_W<'a> { w: &'a mut W, } impl<'a> SFS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x7fff) | (value as u32 & 0x7fff); self.w } } impl W { #[doc = "Bit 31 - One second add"] #[inline(always)] pub fn a1s(&mut self) -> A1S_W { A1S_W { w: self } } #[doc = "Bits 0:14 - Subtract a fraction of a second"] #[inline(always)] pub fn sfs(&mut self) -> SFS_W { SFS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "shift control register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [shiftctl](index.html) module"] pub struct SHIFTCTL_SPEC; impl crate::RegisterSpec for SHIFTCTL_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [shiftctl::W](W) writer structure"] impl crate::Writable for SHIFTCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets SHIFTCTL to value 0"] impl crate::Resettable for SHIFTCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "TTS register accessor: an alias for `Reg`"] pub type TTS = crate::Reg; #[doc = "timestamp time register"] pub mod tts { #[doc = "Register `TTS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `PM` reader - AM/PM mark"] pub struct PM_R(crate::FieldReader); impl PM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HRT` reader - Hour tens in BCD code"] pub struct HRT_R(crate::FieldReader); impl HRT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { HRT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HRT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HRU` reader - Hour units in BCD code"] pub struct HRU_R(crate::FieldReader); impl HRU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { HRU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HRU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNT` reader - Minute tens in BCD code"] pub struct MNT_R(crate::FieldReader); impl MNT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNU` reader - Minute units in BCD code"] pub struct MNU_R(crate::FieldReader); impl MNU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MNU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCT` reader - Second tens in BCD code"] pub struct SCT_R(crate::FieldReader); impl SCT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SCT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCU` reader - Second units in BCD code"] pub struct SCU_R(crate::FieldReader); impl SCU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SCU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 22 - AM/PM mark"] #[inline(always)] pub fn pm(&self) -> PM_R { PM_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bits 20:21 - Hour tens in BCD code"] #[inline(always)] pub fn hrt(&self) -> HRT_R { HRT_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 16:19 - Hour units in BCD code"] #[inline(always)] pub fn hru(&self) -> HRU_R { HRU_R::new(((self.bits >> 16) & 0x0f) as u8) } #[doc = "Bits 12:14 - Minute tens in BCD code"] #[inline(always)] pub fn mnt(&self) -> MNT_R { MNT_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bits 8:11 - Minute units in BCD code"] #[inline(always)] pub fn mnu(&self) -> MNU_R { MNU_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:6 - Second tens in BCD code"] #[inline(always)] pub fn sct(&self) -> SCT_R { SCT_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bits 0:3 - Second units in BCD code"] #[inline(always)] pub fn scu(&self) -> SCU_R { SCU_R::new((self.bits & 0x0f) as u8) } } #[doc = "timestamp time register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tts](index.html) module"] pub struct TTS_SPEC; impl crate::RegisterSpec for TTS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [tts::R](R) reader structure"] impl crate::Readable for TTS_SPEC { type Reader = R; } #[doc = "`reset()` method sets TTS to value 0"] impl crate::Resettable for TTS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DTS register accessor: an alias for `Reg`"] pub type DTS = crate::Reg; #[doc = "Date of time stamp register"] pub mod dts { #[doc = "Register `DTS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `DOW` reader - Week day units"] pub struct DOW_R(crate::FieldReader); impl DOW_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DOW_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DOW_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MONT` reader - Month tens in BCD code"] pub struct MONT_R(crate::FieldReader); impl MONT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MONT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MONT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MONU` reader - Month units in BCD code"] pub struct MONU_R(crate::FieldReader); impl MONU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MONU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MONU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAYT` reader - Date tens in BCD code"] pub struct DAYT_R(crate::FieldReader); impl DAYT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAYT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAYT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAYU` reader - Date units in BCD code"] pub struct DAYU_R(crate::FieldReader); impl DAYU_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAYU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAYU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 13:15 - Week day units"] #[inline(always)] pub fn dow(&self) -> DOW_R { DOW_R::new(((self.bits >> 13) & 0x07) as u8) } #[doc = "Bit 12 - Month tens in BCD code"] #[inline(always)] pub fn mont(&self) -> MONT_R { MONT_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bits 8:11 - Month units in BCD code"] #[inline(always)] pub fn monu(&self) -> MONU_R { MONU_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:5 - Date tens in BCD code"] #[inline(always)] pub fn dayt(&self) -> DAYT_R { DAYT_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bits 0:3 - Date units in BCD code"] #[inline(always)] pub fn dayu(&self) -> DAYU_R { DAYU_R::new((self.bits & 0x0f) as u8) } } #[doc = "Date of time stamp register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dts](index.html) module"] pub struct DTS_SPEC; impl crate::RegisterSpec for DTS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dts::R](R) reader structure"] impl crate::Readable for DTS_SPEC { type Reader = R; } #[doc = "`reset()` method sets DTS to value 0"] impl crate::Resettable for DTS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SSTS register accessor: an alias for `Reg`"] pub type SSTS = crate::Reg; #[doc = "time-stamp sub second register"] pub mod ssts { #[doc = "Register `SSTS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `SSC` reader - Sub second value"] pub struct SSC_R(crate::FieldReader); impl SSC_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { SSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Sub second value"] #[inline(always)] pub fn ssc(&self) -> SSC_R { SSC_R::new((self.bits & 0xffff) as u16) } } #[doc = "time-stamp sub second register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ssts](index.html) module"] pub struct SSTS_SPEC; impl crate::RegisterSpec for SSTS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ssts::R](R) reader structure"] impl crate::Readable for SSTS_SPEC { type Reader = R; } #[doc = "`reset()` method sets SSTS to value 0"] impl crate::Resettable for SSTS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HRFC register accessor: an alias for `Reg`"] pub type HRFC = crate::Reg; #[doc = "High resolution frequency compensation register"] pub mod hrfc { #[doc = "Register `HRFC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HRFC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `FREQI` reader - Increase RTC frequency by 488.5PPM"] pub struct FREQI_R(crate::FieldReader); impl FREQI_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FREQI_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FREQI_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FREQI` writer - Increase RTC frequency by 488.5PPM"] pub struct FREQI_W<'a> { w: &'a mut W, } impl<'a> FREQI_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `CWND8` reader - Frequency compensation window 8 second selected"] pub struct CWND8_R(crate::FieldReader); impl CWND8_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CWND8_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CWND8_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CWND8` writer - Frequency compensation window 8 second selected"] pub struct CWND8_W<'a> { w: &'a mut W, } impl<'a> CWND8_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CWND16` reader - Frequency compensation window 16 second selected"] pub struct CWND16_R(crate::FieldReader); impl CWND16_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CWND16_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CWND16_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CWND16` writer - Frequency compensation window 16 second selected"] pub struct CWND16_W<'a> { w: &'a mut W, } impl<'a> CWND16_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CMSK` reader - Calibration mask number"] pub struct CMSK_R(crate::FieldReader); impl CMSK_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CMSK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMSK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMSK` writer - Calibration mask number"] pub struct CMSK_W<'a> { w: &'a mut W, } impl<'a> CMSK_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x01ff) | (value as u32 & 0x01ff); self.w } } impl R { #[doc = "Bit 15 - Increase RTC frequency by 488.5PPM"] #[inline(always)] pub fn freqi(&self) -> FREQI_R { FREQI_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Frequency compensation window 8 second selected"] #[inline(always)] pub fn cwnd8(&self) -> CWND8_R { CWND8_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Frequency compensation window 16 second selected"] #[inline(always)] pub fn cwnd16(&self) -> CWND16_R { CWND16_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bits 0:8 - Calibration mask number"] #[inline(always)] pub fn cmsk(&self) -> CMSK_R { CMSK_R::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bit 15 - Increase RTC frequency by 488.5PPM"] #[inline(always)] pub fn freqi(&mut self) -> FREQI_W { FREQI_W { w: self } } #[doc = "Bit 14 - Frequency compensation window 8 second selected"] #[inline(always)] pub fn cwnd8(&mut self) -> CWND8_W { CWND8_W { w: self } } #[doc = "Bit 13 - Frequency compensation window 16 second selected"] #[inline(always)] pub fn cwnd16(&mut self) -> CWND16_W { CWND16_W { w: self } } #[doc = "Bits 0:8 - Calibration mask number"] #[inline(always)] pub fn cmsk(&mut self) -> CMSK_W { CMSK_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "High resolution frequency compensation register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hrfc](index.html) module"] pub struct HRFC_SPEC; impl crate::RegisterSpec for HRFC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hrfc::R](R) reader structure"] impl crate::Readable for HRFC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hrfc::W](W) writer structure"] impl crate::Writable for HRFC_SPEC { type Writer = W; } #[doc = "`reset()` method sets HRFC to value 0"] impl crate::Resettable for HRFC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "TAMP register accessor: an alias for `Reg`"] pub type TAMP = crate::Reg; #[doc = "tamper and alternate function configuration register"] pub mod tamp { #[doc = "Register `TAMP` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `TAMP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PC15MDE` reader - PC15 mode"] pub struct PC15MDE_R(crate::FieldReader); impl PC15MDE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PC15MDE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PC15MDE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PC15MDE` writer - PC15 mode"] pub struct PC15MDE_W<'a> { w: &'a mut W, } impl<'a> PC15MDE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `PC15VAL` reader - PC15 value"] pub struct PC15VAL_R(crate::FieldReader); impl PC15VAL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PC15VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PC15VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PC15VAL` writer - PC15 value"] pub struct PC15VAL_W<'a> { w: &'a mut W, } impl<'a> PC15VAL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `PC14MDE` reader - PC14 mode"] pub struct PC14MDE_R(crate::FieldReader); impl PC14MDE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PC14MDE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PC14MDE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PC14MDE` writer - PC14 mode"] pub struct PC14MDE_W<'a> { w: &'a mut W, } impl<'a> PC14MDE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `PC14VAL` reader - PC14 value"] pub struct PC14VAL_R(crate::FieldReader); impl PC14VAL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PC14VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PC14VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PC14VAL` writer - PC14 value"] pub struct PC14VAL_W<'a> { w: &'a mut W, } impl<'a> PC14VAL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `PC13MDE` reader - PC13 mode"] pub struct PC13MDE_R(crate::FieldReader); impl PC13MDE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PC13MDE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PC13MDE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PC13MDE` writer - PC13 mode"] pub struct PC13MDE_W<'a> { w: &'a mut W, } impl<'a> PC13MDE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `PC13VAL` reader - RTC_ALARM output type/PC13 value"] pub struct PC13VAL_R(crate::FieldReader); impl PC13VAL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PC13VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PC13VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PC13VAL` writer - RTC_ALARM output type/PC13 value"] pub struct PC13VAL_W<'a> { w: &'a mut W, } impl<'a> PC13VAL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `DISPU` reader - RTC_TAMPx pull-up disable"] pub struct DISPU_R(crate::FieldReader); impl DISPU_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DISPU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DISPU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DISPU` writer - RTC_TAMPx pull-up disable"] pub struct DISPU_W<'a> { w: &'a mut W, } impl<'a> DISPU_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `PRCH` reader - RTC_TAMPx precharge duration"] pub struct PRCH_R(crate::FieldReader); impl PRCH_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PRCH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PRCH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PRCH` writer - RTC_TAMPx precharge duration"] pub struct PRCH_W<'a> { w: &'a mut W, } impl<'a> PRCH_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 13)) | ((value as u32 & 0x03) << 13); self.w } } #[doc = "Field `FLT` reader - RTC_TAMPx filter count"] pub struct FLT_R(crate::FieldReader); impl FLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { FLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FLT` writer - RTC_TAMPx filter count"] pub struct FLT_W<'a> { w: &'a mut W, } impl<'a> FLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 11)) | ((value as u32 & 0x03) << 11); self.w } } #[doc = "Field `FREQ` reader - Tamper sampling frequency"] pub struct FREQ_R(crate::FieldReader); impl FREQ_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { FREQ_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FREQ_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FREQ` writer - Tamper sampling frequency"] pub struct FREQ_W<'a> { w: &'a mut W, } impl<'a> FREQ_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 8)) | ((value as u32 & 0x07) << 8); self.w } } #[doc = "Field `TPTS` reader - Activate timestamp on tamper detection event"] pub struct TPTS_R(crate::FieldReader); impl TPTS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TPTS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TPTS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TPTS` writer - Activate timestamp on tamper detection event"] pub struct TPTS_W<'a> { w: &'a mut W, } impl<'a> TPTS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TP1EG` reader - Tamper 1 event trigger edge"] pub struct TP1EG_R(crate::FieldReader); impl TP1EG_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TP1EG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TP1EG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TP1EG` writer - Tamper 1 event trigger edge"] pub struct TP1EG_W<'a> { w: &'a mut W, } impl<'a> TP1EG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TP1EN` reader - Tamper 1 detection enable"] pub struct TP1EN_R(crate::FieldReader); impl TP1EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TP1EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TP1EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TP1EN` writer - Tamper 1 detection enable"] pub struct TP1EN_W<'a> { w: &'a mut W, } impl<'a> TP1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `TPIE` reader - Tamper detection interrupt enable"] pub struct TPIE_R(crate::FieldReader); impl TPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TPIE` writer - Tamper detection interrupt enable"] pub struct TPIE_W<'a> { w: &'a mut W, } impl<'a> TPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `TP0EG` reader - Active level for RTC_TAMP1 input"] pub struct TP0EG_R(crate::FieldReader); impl TP0EG_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TP0EG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TP0EG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TP0EG` writer - Active level for RTC_TAMP1 input"] pub struct TP0EG_W<'a> { w: &'a mut W, } impl<'a> TP0EG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TP0EN` reader - Tamper 0 event trigger edge"] pub struct TP0EN_R(crate::FieldReader); impl TP0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TP0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TP0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TP0EN` writer - Tamper 0 event trigger edge"] pub struct TP0EN_W<'a> { w: &'a mut W, } impl<'a> TP0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 23 - PC15 mode"] #[inline(always)] pub fn pc15mde(&self) -> PC15MDE_R { PC15MDE_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 22 - PC15 value"] #[inline(always)] pub fn pc15val(&self) -> PC15VAL_R { PC15VAL_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 21 - PC14 mode"] #[inline(always)] pub fn pc14mde(&self) -> PC14MDE_R { PC14MDE_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - PC14 value"] #[inline(always)] pub fn pc14val(&self) -> PC14VAL_R { PC14VAL_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - PC13 mode"] #[inline(always)] pub fn pc13mde(&self) -> PC13MDE_R { PC13MDE_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - RTC_ALARM output type/PC13 value"] #[inline(always)] pub fn pc13val(&self) -> PC13VAL_R { PC13VAL_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 15 - RTC_TAMPx pull-up disable"] #[inline(always)] pub fn dispu(&self) -> DISPU_R { DISPU_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 13:14 - RTC_TAMPx precharge duration"] #[inline(always)] pub fn prch(&self) -> PRCH_R { PRCH_R::new(((self.bits >> 13) & 0x03) as u8) } #[doc = "Bits 11:12 - RTC_TAMPx filter count"] #[inline(always)] pub fn flt(&self) -> FLT_R { FLT_R::new(((self.bits >> 11) & 0x03) as u8) } #[doc = "Bits 8:10 - Tamper sampling frequency"] #[inline(always)] pub fn freq(&self) -> FREQ_R { FREQ_R::new(((self.bits >> 8) & 0x07) as u8) } #[doc = "Bit 7 - Activate timestamp on tamper detection event"] #[inline(always)] pub fn tpts(&self) -> TPTS_R { TPTS_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 4 - Tamper 1 event trigger edge"] #[inline(always)] pub fn tp1eg(&self) -> TP1EG_R { TP1EG_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Tamper 1 detection enable"] #[inline(always)] pub fn tp1en(&self) -> TP1EN_R { TP1EN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Tamper detection interrupt enable"] #[inline(always)] pub fn tpie(&self) -> TPIE_R { TPIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Active level for RTC_TAMP1 input"] #[inline(always)] pub fn tp0eg(&self) -> TP0EG_R { TP0EG_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Tamper 0 event trigger edge"] #[inline(always)] pub fn tp0en(&self) -> TP0EN_R { TP0EN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 23 - PC15 mode"] #[inline(always)] pub fn pc15mde(&mut self) -> PC15MDE_W { PC15MDE_W { w: self } } #[doc = "Bit 22 - PC15 value"] #[inline(always)] pub fn pc15val(&mut self) -> PC15VAL_W { PC15VAL_W { w: self } } #[doc = "Bit 21 - PC14 mode"] #[inline(always)] pub fn pc14mde(&mut self) -> PC14MDE_W { PC14MDE_W { w: self } } #[doc = "Bit 20 - PC14 value"] #[inline(always)] pub fn pc14val(&mut self) -> PC14VAL_W { PC14VAL_W { w: self } } #[doc = "Bit 19 - PC13 mode"] #[inline(always)] pub fn pc13mde(&mut self) -> PC13MDE_W { PC13MDE_W { w: self } } #[doc = "Bit 18 - RTC_ALARM output type/PC13 value"] #[inline(always)] pub fn pc13val(&mut self) -> PC13VAL_W { PC13VAL_W { w: self } } #[doc = "Bit 15 - RTC_TAMPx pull-up disable"] #[inline(always)] pub fn dispu(&mut self) -> DISPU_W { DISPU_W { w: self } } #[doc = "Bits 13:14 - RTC_TAMPx precharge duration"] #[inline(always)] pub fn prch(&mut self) -> PRCH_W { PRCH_W { w: self } } #[doc = "Bits 11:12 - RTC_TAMPx filter count"] #[inline(always)] pub fn flt(&mut self) -> FLT_W { FLT_W { w: self } } #[doc = "Bits 8:10 - Tamper sampling frequency"] #[inline(always)] pub fn freq(&mut self) -> FREQ_W { FREQ_W { w: self } } #[doc = "Bit 7 - Activate timestamp on tamper detection event"] #[inline(always)] pub fn tpts(&mut self) -> TPTS_W { TPTS_W { w: self } } #[doc = "Bit 4 - Tamper 1 event trigger edge"] #[inline(always)] pub fn tp1eg(&mut self) -> TP1EG_W { TP1EG_W { w: self } } #[doc = "Bit 3 - Tamper 1 detection enable"] #[inline(always)] pub fn tp1en(&mut self) -> TP1EN_W { TP1EN_W { w: self } } #[doc = "Bit 2 - Tamper detection interrupt enable"] #[inline(always)] pub fn tpie(&mut self) -> TPIE_W { TPIE_W { w: self } } #[doc = "Bit 1 - Active level for RTC_TAMP1 input"] #[inline(always)] pub fn tp0eg(&mut self) -> TP0EG_W { TP0EG_W { w: self } } #[doc = "Bit 0 - Tamper 0 event trigger edge"] #[inline(always)] pub fn tp0en(&mut self) -> TP0EN_W { TP0EN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "tamper and alternate function configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tamp](index.html) module"] pub struct TAMP_SPEC; impl crate::RegisterSpec for TAMP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [tamp::R](R) reader structure"] impl crate::Readable for TAMP_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [tamp::W](W) writer structure"] impl crate::Writable for TAMP_SPEC { type Writer = W; } #[doc = "`reset()` method sets TAMP to value 0"] impl crate::Resettable for TAMP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "ALRM0SS register accessor: an alias for `Reg`"] pub type ALRM0SS = crate::Reg; #[doc = "alarm 0 sub second register"] pub mod alrm0ss { #[doc = "Register `ALRM0SS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ALRM0SS` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MSKSSC` reader - Mask control bit of SSC"] pub struct MSKSSC_R(crate::FieldReader); impl MSKSSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MSKSSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MSKSSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MSKSSC` writer - Mask control bit of SSC"] pub struct MSKSSC_W<'a> { w: &'a mut W, } impl<'a> MSKSSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); self.w } } #[doc = "Field `SSC` reader - Alarm sub second value"] pub struct SSC_R(crate::FieldReader); impl SSC_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { SSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SSC` writer - Alarm sub second value"] pub struct SSC_W<'a> { w: &'a mut W, } impl<'a> SSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x7fff) | (value as u32 & 0x7fff); self.w } } impl R { #[doc = "Bits 24:27 - Mask control bit of SSC"] #[inline(always)] pub fn mskssc(&self) -> MSKSSC_R { MSKSSC_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 0:14 - Alarm sub second value"] #[inline(always)] pub fn ssc(&self) -> SSC_R { SSC_R::new((self.bits & 0x7fff) as u16) } } impl W { #[doc = "Bits 24:27 - Mask control bit of SSC"] #[inline(always)] pub fn mskssc(&mut self) -> MSKSSC_W { MSKSSC_W { w: self } } #[doc = "Bits 0:14 - Alarm sub second value"] #[inline(always)] pub fn ssc(&mut self) -> SSC_W { SSC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "alarm 0 sub second register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alrm0ss](index.html) module"] pub struct ALRM0SS_SPEC; impl crate::RegisterSpec for ALRM0SS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [alrm0ss::R](R) reader structure"] impl crate::Readable for ALRM0SS_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [alrm0ss::W](W) writer structure"] impl crate::Writable for ALRM0SS_SPEC { type Writer = W; } #[doc = "`reset()` method sets ALRM0SS to value 0"] impl crate::Resettable for ALRM0SS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BKP0 register accessor: an alias for `Reg`"] pub type BKP0 = crate::Reg; #[doc = "backup register"] pub mod bkp0 { #[doc = "Register `BKP0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `BKP0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DATA` reader - BKP data"] pub struct DATA_R(crate::FieldReader); impl DATA_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { DATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DATA` writer - BKP data"] pub struct DATA_W<'a> { w: &'a mut W, } impl<'a> DATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - BKP data"] #[inline(always)] pub fn data(&self) -> DATA_R { DATA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - BKP data"] #[inline(always)] pub fn data(&mut self) -> DATA_W { DATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "backup register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bkp0](index.html) module"] pub struct BKP0_SPEC; impl crate::RegisterSpec for BKP0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [bkp0::R](R) reader structure"] impl crate::Readable for BKP0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [bkp0::W](W) writer structure"] impl crate::Writable for BKP0_SPEC { type Writer = W; } #[doc = "`reset()` method sets BKP0 to value 0"] impl crate::Resettable for BKP0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BKP1 register accessor: an alias for `Reg`"] pub type BKP1 = crate::Reg; #[doc = "backup register"] pub mod bkp1 { #[doc = "Register `BKP1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `BKP1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DATA` reader - BKP data"] pub struct DATA_R(crate::FieldReader); impl DATA_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { DATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DATA` writer - BKP data"] pub struct DATA_W<'a> { w: &'a mut W, } impl<'a> DATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - BKP data"] #[inline(always)] pub fn data(&self) -> DATA_R { DATA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - BKP data"] #[inline(always)] pub fn data(&mut self) -> DATA_W { DATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "backup register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bkp1](index.html) module"] pub struct BKP1_SPEC; impl crate::RegisterSpec for BKP1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [bkp1::R](R) reader structure"] impl crate::Readable for BKP1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [bkp1::W](W) writer structure"] impl crate::Writable for BKP1_SPEC { type Writer = W; } #[doc = "`reset()` method sets BKP1 to value 0"] impl crate::Resettable for BKP1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BKP2 register accessor: an alias for `Reg`"] pub type BKP2 = crate::Reg; #[doc = "backup register"] pub mod bkp2 { #[doc = "Register `BKP2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `BKP2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DATA` reader - BKP data"] pub struct DATA_R(crate::FieldReader); impl DATA_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { DATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DATA` writer - BKP data"] pub struct DATA_W<'a> { w: &'a mut W, } impl<'a> DATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - BKP data"] #[inline(always)] pub fn data(&self) -> DATA_R { DATA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - BKP data"] #[inline(always)] pub fn data(&mut self) -> DATA_W { DATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "backup register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bkp2](index.html) module"] pub struct BKP2_SPEC; impl crate::RegisterSpec for BKP2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [bkp2::R](R) reader structure"] impl crate::Readable for BKP2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [bkp2::W](W) writer structure"] impl crate::Writable for BKP2_SPEC { type Writer = W; } #[doc = "`reset()` method sets BKP2 to value 0"] impl crate::Resettable for BKP2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BKP3 register accessor: an alias for `Reg`"] pub type BKP3 = crate::Reg; #[doc = "backup register"] pub mod bkp3 { #[doc = "Register `BKP3` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `BKP3` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DATA` reader - BKP data"] pub struct DATA_R(crate::FieldReader); impl DATA_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { DATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DATA` writer - BKP data"] pub struct DATA_W<'a> { w: &'a mut W, } impl<'a> DATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - BKP data"] #[inline(always)] pub fn data(&self) -> DATA_R { DATA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - BKP data"] #[inline(always)] pub fn data(&mut self) -> DATA_W { DATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "backup register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bkp3](index.html) module"] pub struct BKP3_SPEC; impl crate::RegisterSpec for BKP3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [bkp3::R](R) reader structure"] impl crate::Readable for BKP3_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [bkp3::W](W) writer structure"] impl crate::Writable for BKP3_SPEC { type Writer = W; } #[doc = "`reset()` method sets BKP3 to value 0"] impl crate::Resettable for BKP3_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BKP4 register accessor: an alias for `Reg`"] pub type BKP4 = crate::Reg; #[doc = "backup register"] pub mod bkp4 { #[doc = "Register `BKP4` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `BKP4` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DATA` reader - BKP data"] pub struct DATA_R(crate::FieldReader); impl DATA_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { DATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DATA` writer - BKP data"] pub struct DATA_W<'a> { w: &'a mut W, } impl<'a> DATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - BKP data"] #[inline(always)] pub fn data(&self) -> DATA_R { DATA_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - BKP data"] #[inline(always)] pub fn data(&mut self) -> DATA_W { DATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "backup register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [bkp4](index.html) module"] pub struct BKP4_SPEC; impl crate::RegisterSpec for BKP4_SPEC { type Ux = u32; } #[doc = "`read()` method returns [bkp4::R](R) reader structure"] impl crate::Readable for BKP4_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [bkp4::W](W) writer structure"] impl crate::Writable for BKP4_SPEC { type Writer = W; } #[doc = "`reset()` method sets BKP4 to value 0"] impl crate::Resettable for BKP4_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Serial peripheral interface"] pub struct SPI0 { _marker: PhantomData<*const ()>, } unsafe impl Send for SPI0 {} impl SPI0 { #[doc = r"Pointer to the register block"] pub const PTR: *const spi0::RegisterBlock = 0x4001_3000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const spi0::RegisterBlock { Self::PTR } } impl Deref for SPI0 { type Target = spi0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for SPI0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("SPI0").finish() } } #[doc = "Serial peripheral interface"] pub mod spi0 { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register 0"] pub ctl0: crate::Reg, #[doc = "0x04 - control register 1"] pub ctl1: crate::Reg, #[doc = "0x08 - status register"] pub stat: crate::Reg, #[doc = "0x0c - data register"] pub data: crate::Reg, #[doc = "0x10 - CRC polynomial register"] pub cpcpoly: crate::Reg, #[doc = "0x14 - RX CRC register"] pub rcrc: crate::Reg, #[doc = "0x18 - TX CRC register"] pub tcrc: crate::Reg, #[doc = "0x1c - I2S configuration register"] pub i2sctl: crate::Reg, #[doc = "0x20 - I2S prescaler register"] pub i2spsc: crate::Reg, _reserved9: [u8; 0x5c], #[doc = "0x80 - SPI quad wird control register"] pub qctl: crate::Reg, } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "control register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BDEN` reader - Bidirectional enable"] pub struct BDEN_R(crate::FieldReader); impl BDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BDEN` writer - Bidirectional enable"] pub struct BDEN_W<'a> { w: &'a mut W, } impl<'a> BDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `BDOEN` reader - Bidirectional Transmit output enable"] pub struct BDOEN_R(crate::FieldReader); impl BDOEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BDOEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BDOEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BDOEN` writer - Bidirectional Transmit output enable"] pub struct BDOEN_W<'a> { w: &'a mut W, } impl<'a> BDOEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CRCEN` reader - Hardware CRC calculation enable"] pub struct CRCEN_R(crate::FieldReader); impl CRCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CRCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CRCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CRCEN` writer - Hardware CRC calculation enable"] pub struct CRCEN_W<'a> { w: &'a mut W, } impl<'a> CRCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CRCNT` reader - CRC transfer next"] pub struct CRCNT_R(crate::FieldReader); impl CRCNT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CRCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CRCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CRCNT` writer - CRC transfer next"] pub struct CRCNT_W<'a> { w: &'a mut W, } impl<'a> CRCNT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `FF16` reader - Data frame format"] pub struct FF16_R(crate::FieldReader); impl FF16_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FF16_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FF16_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FF16` writer - Data frame format"] pub struct FF16_W<'a> { w: &'a mut W, } impl<'a> FF16_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `RO` reader - Receive only"] pub struct RO_R(crate::FieldReader); impl RO_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RO` writer - Receive only"] pub struct RO_W<'a> { w: &'a mut W, } impl<'a> RO_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `SWNSSEN` reader - NSS Software Mode Selection"] pub struct SWNSSEN_R(crate::FieldReader); impl SWNSSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWNSSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWNSSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWNSSEN` writer - NSS Software Mode Selection"] pub struct SWNSSEN_W<'a> { w: &'a mut W, } impl<'a> SWNSSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `SWNSS` reader - NSS Pin Selection In NSS Software Mode"] pub struct SWNSS_R(crate::FieldReader); impl SWNSS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SWNSS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SWNSS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SWNSS` writer - NSS Pin Selection In NSS Software Mode"] pub struct SWNSS_W<'a> { w: &'a mut W, } impl<'a> SWNSS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `LF` reader - LSB First Mode"] pub struct LF_R(crate::FieldReader); impl LF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LF` writer - LSB First Mode"] pub struct LF_W<'a> { w: &'a mut W, } impl<'a> LF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SPIEN` reader - SPI enable"] pub struct SPIEN_R(crate::FieldReader); impl SPIEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPIEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPIEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPIEN` writer - SPI enable"] pub struct SPIEN_W<'a> { w: &'a mut W, } impl<'a> SPIEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `PSC` reader - Master Clock Prescaler Selection"] pub struct PSC_R(crate::FieldReader); impl PSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSC` writer - Master Clock Prescaler Selection"] pub struct PSC_W<'a> { w: &'a mut W, } impl<'a> PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 3)) | ((value as u32 & 0x07) << 3); self.w } } #[doc = "Field `MSTMOD` reader - Master Mode Enable"] pub struct MSTMOD_R(crate::FieldReader); impl MSTMOD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MSTMOD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MSTMOD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MSTMOD` writer - Master Mode Enable"] pub struct MSTMOD_W<'a> { w: &'a mut W, } impl<'a> MSTMOD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CKPL` reader - Clock Polarity Selection"] pub struct CKPL_R(crate::FieldReader); impl CKPL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKPL` writer - Clock Polarity Selection"] pub struct CKPL_W<'a> { w: &'a mut W, } impl<'a> CKPL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CKPH` reader - Clock Phase Selection"] pub struct CKPH_R(crate::FieldReader); impl CKPH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKPH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKPH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKPH` writer - Clock Phase Selection"] pub struct CKPH_W<'a> { w: &'a mut W, } impl<'a> CKPH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Bidirectional enable"] #[inline(always)] pub fn bden(&self) -> BDEN_R { BDEN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Bidirectional Transmit output enable"] #[inline(always)] pub fn bdoen(&self) -> BDOEN_R { BDOEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Hardware CRC calculation enable"] #[inline(always)] pub fn crcen(&self) -> CRCEN_R { CRCEN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - CRC transfer next"] #[inline(always)] pub fn crcnt(&self) -> CRCNT_R { CRCNT_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Data frame format"] #[inline(always)] pub fn ff16(&self) -> FF16_R { FF16_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Receive only"] #[inline(always)] pub fn ro(&self) -> RO_R { RO_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - NSS Software Mode Selection"] #[inline(always)] pub fn swnssen(&self) -> SWNSSEN_R { SWNSSEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - NSS Pin Selection In NSS Software Mode"] #[inline(always)] pub fn swnss(&self) -> SWNSS_R { SWNSS_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - LSB First Mode"] #[inline(always)] pub fn lf(&self) -> LF_R { LF_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - SPI enable"] #[inline(always)] pub fn spien(&self) -> SPIEN_R { SPIEN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bits 3:5 - Master Clock Prescaler Selection"] #[inline(always)] pub fn psc(&self) -> PSC_R { PSC_R::new(((self.bits >> 3) & 0x07) as u8) } #[doc = "Bit 2 - Master Mode Enable"] #[inline(always)] pub fn mstmod(&self) -> MSTMOD_R { MSTMOD_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Clock Polarity Selection"] #[inline(always)] pub fn ckpl(&self) -> CKPL_R { CKPL_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Clock Phase Selection"] #[inline(always)] pub fn ckph(&self) -> CKPH_R { CKPH_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Bidirectional enable"] #[inline(always)] pub fn bden(&mut self) -> BDEN_W { BDEN_W { w: self } } #[doc = "Bit 14 - Bidirectional Transmit output enable"] #[inline(always)] pub fn bdoen(&mut self) -> BDOEN_W { BDOEN_W { w: self } } #[doc = "Bit 13 - Hardware CRC calculation enable"] #[inline(always)] pub fn crcen(&mut self) -> CRCEN_W { CRCEN_W { w: self } } #[doc = "Bit 12 - CRC transfer next"] #[inline(always)] pub fn crcnt(&mut self) -> CRCNT_W { CRCNT_W { w: self } } #[doc = "Bit 11 - Data frame format"] #[inline(always)] pub fn ff16(&mut self) -> FF16_W { FF16_W { w: self } } #[doc = "Bit 10 - Receive only"] #[inline(always)] pub fn ro(&mut self) -> RO_W { RO_W { w: self } } #[doc = "Bit 9 - NSS Software Mode Selection"] #[inline(always)] pub fn swnssen(&mut self) -> SWNSSEN_W { SWNSSEN_W { w: self } } #[doc = "Bit 8 - NSS Pin Selection In NSS Software Mode"] #[inline(always)] pub fn swnss(&mut self) -> SWNSS_W { SWNSS_W { w: self } } #[doc = "Bit 7 - LSB First Mode"] #[inline(always)] pub fn lf(&mut self) -> LF_W { LF_W { w: self } } #[doc = "Bit 6 - SPI enable"] #[inline(always)] pub fn spien(&mut self) -> SPIEN_W { SPIEN_W { w: self } } #[doc = "Bits 3:5 - Master Clock Prescaler Selection"] #[inline(always)] pub fn psc(&mut self) -> PSC_W { PSC_W { w: self } } #[doc = "Bit 2 - Master Mode Enable"] #[inline(always)] pub fn mstmod(&mut self) -> MSTMOD_W { MSTMOD_W { w: self } } #[doc = "Bit 1 - Clock Polarity Selection"] #[inline(always)] pub fn ckpl(&mut self) -> CKPL_W { CKPL_W { w: self } } #[doc = "Bit 0 - Clock Phase Selection"] #[inline(always)] pub fn ckph(&mut self) -> CKPH_W { CKPH_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TBEIE` reader - Transmit Buffer Empty Interrupt Enable"] pub struct TBEIE_R(crate::FieldReader); impl TBEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TBEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TBEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TBEIE` writer - Transmit Buffer Empty Interrupt Enable"] pub struct TBEIE_W<'a> { w: &'a mut W, } impl<'a> TBEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `RBNEIE` reader - Receive Buffer Not Empty Interrupt Enable"] pub struct RBNEIE_R(crate::FieldReader); impl RBNEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RBNEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RBNEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RBNEIE` writer - Receive Buffer Not Empty Interrupt Enable"] pub struct RBNEIE_W<'a> { w: &'a mut W, } impl<'a> RBNEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `ERRIE` reader - Error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `TMOD` reader - SPI TI Mode Enable"] pub struct TMOD_R(crate::FieldReader); impl TMOD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TMOD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TMOD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TMOD` writer - SPI TI Mode Enable"] pub struct TMOD_W<'a> { w: &'a mut W, } impl<'a> TMOD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `NSSP` reader - SPI NSS Pulse Mode Enable"] pub struct NSSP_R(crate::FieldReader); impl NSSP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NSSP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NSSP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NSSP` writer - SPI NSS Pulse Mode Enable"] pub struct NSSP_W<'a> { w: &'a mut W, } impl<'a> NSSP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NSSDRV` reader - NSS output enable"] pub struct NSSDRV_R(crate::FieldReader); impl NSSDRV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NSSDRV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NSSDRV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NSSDRV` writer - NSS output enable"] pub struct NSSDRV_W<'a> { w: &'a mut W, } impl<'a> NSSDRV_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `DMATEN` reader - Tx buffer DMA enable"] pub struct DMATEN_R(crate::FieldReader); impl DMATEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DMATEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATEN` writer - Tx buffer DMA enable"] pub struct DMATEN_W<'a> { w: &'a mut W, } impl<'a> DMATEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `DMAREN` reader - Rx buffer DMA enable"] pub struct DMAREN_R(crate::FieldReader); impl DMAREN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DMAREN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMAREN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMAREN` writer - Rx buffer DMA enable"] pub struct DMAREN_W<'a> { w: &'a mut W, } impl<'a> DMAREN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 7 - Transmit Buffer Empty Interrupt Enable"] #[inline(always)] pub fn tbeie(&self) -> TBEIE_R { TBEIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Receive Buffer Not Empty Interrupt Enable"] #[inline(always)] pub fn rbneie(&self) -> RBNEIE_R { RBNEIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - SPI TI Mode Enable"] #[inline(always)] pub fn tmod(&self) -> TMOD_R { TMOD_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - SPI NSS Pulse Mode Enable"] #[inline(always)] pub fn nssp(&self) -> NSSP_R { NSSP_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - NSS output enable"] #[inline(always)] pub fn nssdrv(&self) -> NSSDRV_R { NSSDRV_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Tx buffer DMA enable"] #[inline(always)] pub fn dmaten(&self) -> DMATEN_R { DMATEN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Rx buffer DMA enable"] #[inline(always)] pub fn dmaren(&self) -> DMAREN_R { DMAREN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 7 - Transmit Buffer Empty Interrupt Enable"] #[inline(always)] pub fn tbeie(&mut self) -> TBEIE_W { TBEIE_W { w: self } } #[doc = "Bit 6 - Receive Buffer Not Empty Interrupt Enable"] #[inline(always)] pub fn rbneie(&mut self) -> RBNEIE_W { RBNEIE_W { w: self } } #[doc = "Bit 5 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Bit 4 - SPI TI Mode Enable"] #[inline(always)] pub fn tmod(&mut self) -> TMOD_W { TMOD_W { w: self } } #[doc = "Bit 3 - SPI NSS Pulse Mode Enable"] #[inline(always)] pub fn nssp(&mut self) -> NSSP_W { NSSP_W { w: self } } #[doc = "Bit 2 - NSS output enable"] #[inline(always)] pub fn nssdrv(&mut self) -> NSSDRV_W { NSSDRV_W { w: self } } #[doc = "Bit 1 - Tx buffer DMA enable"] #[inline(always)] pub fn dmaten(&mut self) -> DMATEN_W { DMATEN_W { w: self } } #[doc = "Bit 0 - Rx buffer DMA enable"] #[inline(always)] pub fn dmaren(&mut self) -> DMAREN_W { DMAREN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "STAT register accessor: an alias for `Reg`"] pub type STAT = crate::Reg; #[doc = "status register"] pub mod stat { #[doc = "Register `STAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `STAT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `FERR` reader - Format Error"] pub struct FERR_R(crate::FieldReader); impl FERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRANS` reader - Transmitting On-going Bit"] pub struct TRANS_R(crate::FieldReader); impl TRANS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRANS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRANS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RXORERR` reader - Reception Overrun Error Bit"] pub struct RXORERR_R(crate::FieldReader); impl RXORERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RXORERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RXORERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CONFERR` reader - SPI Configuration error"] pub struct CONFERR_R(crate::FieldReader); impl CONFERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CONFERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CONFERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CRCERR` reader - SPI CRC Error Bit"] pub struct CRCERR_R(crate::FieldReader); impl CRCERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CRCERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CRCERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CRCERR` writer - SPI CRC Error Bit"] pub struct CRCERR_W<'a> { w: &'a mut W, } impl<'a> CRCERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TXURERR` reader - Transmission underrun error bit"] pub struct TXURERR_R(crate::FieldReader); impl TXURERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TXURERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXURERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2SCH` reader - I2S channel side"] pub struct I2SCH_R(crate::FieldReader); impl I2SCH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2SCH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2SCH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TBE` reader - Transmit Buffer Empty"] pub struct TBE_R(crate::FieldReader); impl TBE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TBE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TBE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RBNE` reader - Receive Buffer Not Empty"] pub struct RBNE_R(crate::FieldReader); impl RBNE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RBNE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RBNE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 8 - Format Error"] #[inline(always)] pub fn ferr(&self) -> FERR_R { FERR_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Transmitting On-going Bit"] #[inline(always)] pub fn trans(&self) -> TRANS_R { TRANS_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Reception Overrun Error Bit"] #[inline(always)] pub fn rxorerr(&self) -> RXORERR_R { RXORERR_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - SPI Configuration error"] #[inline(always)] pub fn conferr(&self) -> CONFERR_R { CONFERR_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - SPI CRC Error Bit"] #[inline(always)] pub fn crcerr(&self) -> CRCERR_R { CRCERR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Transmission underrun error bit"] #[inline(always)] pub fn txurerr(&self) -> TXURERR_R { TXURERR_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - I2S channel side"] #[inline(always)] pub fn i2sch(&self) -> I2SCH_R { I2SCH_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Transmit Buffer Empty"] #[inline(always)] pub fn tbe(&self) -> TBE_R { TBE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Receive Buffer Not Empty"] #[inline(always)] pub fn rbne(&self) -> RBNE_R { RBNE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 4 - SPI CRC Error Bit"] #[inline(always)] pub fn crcerr(&mut self) -> CRCERR_W { CRCERR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"] pub struct STAT_SPEC; impl crate::RegisterSpec for STAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat::R](R) reader structure"] impl crate::Readable for STAT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [stat::W](W) writer structure"] impl crate::Writable for STAT_SPEC { type Writer = W; } #[doc = "`reset()` method sets STAT to value 0x02"] impl crate::Resettable for STAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x02 } } } #[doc = "DATA register accessor: an alias for `Reg`"] pub type DATA = crate::Reg; #[doc = "data register"] pub mod data { #[doc = "Register `DATA` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DATA` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DATA` reader - Data register"] pub struct DATA_R(crate::FieldReader); impl DATA_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { DATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DATA` writer - Data register"] pub struct DATA_W<'a> { w: &'a mut W, } impl<'a> DATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Data register"] #[inline(always)] pub fn data(&self) -> DATA_R { DATA_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Data register"] #[inline(always)] pub fn data(&mut self) -> DATA_W { DATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data](index.html) module"] pub struct DATA_SPEC; impl crate::RegisterSpec for DATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [data::R](R) reader structure"] impl crate::Readable for DATA_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [data::W](W) writer structure"] impl crate::Writable for DATA_SPEC { type Writer = W; } #[doc = "`reset()` method sets DATA to value 0"] impl crate::Resettable for DATA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CPCPOLY register accessor: an alias for `Reg`"] pub type CPCPOLY = crate::Reg; #[doc = "CRC polynomial register"] pub mod cpcpoly { #[doc = "Register `CPCPOLY` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CPCPOLY` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CPR` reader - CRC polynomial register"] pub struct CPR_R(crate::FieldReader); impl CPR_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CPR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CPR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CPR` writer - CRC polynomial register"] pub struct CPR_W<'a> { w: &'a mut W, } impl<'a> CPR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - CRC polynomial register"] #[inline(always)] pub fn cpr(&self) -> CPR_R { CPR_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - CRC polynomial register"] #[inline(always)] pub fn cpr(&mut self) -> CPR_W { CPR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "CRC polynomial register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpcpoly](index.html) module"] pub struct CPCPOLY_SPEC; impl crate::RegisterSpec for CPCPOLY_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cpcpoly::R](R) reader structure"] impl crate::Readable for CPCPOLY_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cpcpoly::W](W) writer structure"] impl crate::Writable for CPCPOLY_SPEC { type Writer = W; } #[doc = "`reset()` method sets CPCPOLY to value 0x07"] impl crate::Resettable for CPCPOLY_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x07 } } } #[doc = "RCRC register accessor: an alias for `Reg`"] pub type RCRC = crate::Reg; #[doc = "RX CRC register"] pub mod rcrc { #[doc = "Register `RCRC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `RCR` reader - RX RCR register"] pub struct RCR_R(crate::FieldReader); impl RCR_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { RCR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RCR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - RX RCR register"] #[inline(always)] pub fn rcr(&self) -> RCR_R { RCR_R::new((self.bits & 0xffff) as u16) } } #[doc = "RX CRC register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rcrc](index.html) module"] pub struct RCRC_SPEC; impl crate::RegisterSpec for RCRC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rcrc::R](R) reader structure"] impl crate::Readable for RCRC_SPEC { type Reader = R; } #[doc = "`reset()` method sets RCRC to value 0"] impl crate::Resettable for RCRC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "TCRC register accessor: an alias for `Reg`"] pub type TCRC = crate::Reg; #[doc = "TX CRC register"] pub mod tcrc { #[doc = "Register `TCRC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `TCR` reader - Tx CRC register"] pub struct TCR_R(crate::FieldReader); impl TCR_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { TCR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TCR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Tx CRC register"] #[inline(always)] pub fn tcr(&self) -> TCR_R { TCR_R::new((self.bits & 0xffff) as u16) } } #[doc = "TX CRC register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tcrc](index.html) module"] pub struct TCRC_SPEC; impl crate::RegisterSpec for TCRC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [tcrc::R](R) reader structure"] impl crate::Readable for TCRC_SPEC { type Reader = R; } #[doc = "`reset()` method sets TCRC to value 0"] impl crate::Resettable for TCRC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "I2SCTL register accessor: an alias for `Reg`"] pub type I2SCTL = crate::Reg; #[doc = "I2S configuration register"] pub mod i2sctl { #[doc = "Register `I2SCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `I2SCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `I2SSEL` reader - I2S mode selection"] pub struct I2SSEL_R(crate::FieldReader); impl I2SSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2SSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2SSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2SSEL` writer - I2S mode selection"] pub struct I2SSEL_W<'a> { w: &'a mut W, } impl<'a> I2SSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `I2SEN` reader - I2S Enable"] pub struct I2SEN_R(crate::FieldReader); impl I2SEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { I2SEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2SEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2SEN` writer - I2S Enable"] pub struct I2SEN_W<'a> { w: &'a mut W, } impl<'a> I2SEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `I2SOPMOD` reader - I2S configuration mode"] pub struct I2SOPMOD_R(crate::FieldReader); impl I2SOPMOD_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { I2SOPMOD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2SOPMOD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2SOPMOD` writer - I2S configuration mode"] pub struct I2SOPMOD_W<'a> { w: &'a mut W, } impl<'a> I2SOPMOD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `PCMSMOD` reader - PCM frame synchronization"] pub struct PCMSMOD_R(crate::FieldReader); impl PCMSMOD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PCMSMOD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCMSMOD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCMSMOD` writer - PCM frame synchronization"] pub struct PCMSMOD_W<'a> { w: &'a mut W, } impl<'a> PCMSMOD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `I2SSTD` reader - I2S standard selection"] pub struct I2SSTD_R(crate::FieldReader); impl I2SSTD_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { I2SSTD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for I2SSTD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `I2SSTD` writer - I2S standard selection"] pub struct I2SSTD_W<'a> { w: &'a mut W, } impl<'a> I2SSTD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); self.w } } #[doc = "Field `CKPL` reader - Idle state clock polarity"] pub struct CKPL_R(crate::FieldReader); impl CKPL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKPL` writer - Idle state clock polarity"] pub struct CKPL_W<'a> { w: &'a mut W, } impl<'a> CKPL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `DTLEN` reader - Data length to be transferred"] pub struct DTLEN_R(crate::FieldReader); impl DTLEN_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DTLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTLEN` writer - Data length to be transferred"] pub struct DTLEN_W<'a> { w: &'a mut W, } impl<'a> DTLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 1)) | ((value as u32 & 0x03) << 1); self.w } } #[doc = "Field `CHLEN` reader - Channel length (number of bits per audio channel)"] pub struct CHLEN_R(crate::FieldReader); impl CHLEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHLEN` writer - Channel length (number of bits per audio channel)"] pub struct CHLEN_W<'a> { w: &'a mut W, } impl<'a> CHLEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 11 - I2S mode selection"] #[inline(always)] pub fn i2ssel(&self) -> I2SSEL_R { I2SSEL_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - I2S Enable"] #[inline(always)] pub fn i2sen(&self) -> I2SEN_R { I2SEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 8:9 - I2S configuration mode"] #[inline(always)] pub fn i2sopmod(&self) -> I2SOPMOD_R { I2SOPMOD_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - PCM frame synchronization"] #[inline(always)] pub fn pcmsmod(&self) -> PCMSMOD_R { PCMSMOD_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:5 - I2S standard selection"] #[inline(always)] pub fn i2sstd(&self) -> I2SSTD_R { I2SSTD_R::new(((self.bits >> 4) & 0x03) as u8) } #[doc = "Bit 3 - Idle state clock polarity"] #[inline(always)] pub fn ckpl(&self) -> CKPL_R { CKPL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bits 1:2 - Data length to be transferred"] #[inline(always)] pub fn dtlen(&self) -> DTLEN_R { DTLEN_R::new(((self.bits >> 1) & 0x03) as u8) } #[doc = "Bit 0 - Channel length (number of bits per audio channel)"] #[inline(always)] pub fn chlen(&self) -> CHLEN_R { CHLEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 11 - I2S mode selection"] #[inline(always)] pub fn i2ssel(&mut self) -> I2SSEL_W { I2SSEL_W { w: self } } #[doc = "Bit 10 - I2S Enable"] #[inline(always)] pub fn i2sen(&mut self) -> I2SEN_W { I2SEN_W { w: self } } #[doc = "Bits 8:9 - I2S configuration mode"] #[inline(always)] pub fn i2sopmod(&mut self) -> I2SOPMOD_W { I2SOPMOD_W { w: self } } #[doc = "Bit 7 - PCM frame synchronization"] #[inline(always)] pub fn pcmsmod(&mut self) -> PCMSMOD_W { PCMSMOD_W { w: self } } #[doc = "Bits 4:5 - I2S standard selection"] #[inline(always)] pub fn i2sstd(&mut self) -> I2SSTD_W { I2SSTD_W { w: self } } #[doc = "Bit 3 - Idle state clock polarity"] #[inline(always)] pub fn ckpl(&mut self) -> CKPL_W { CKPL_W { w: self } } #[doc = "Bits 1:2 - Data length to be transferred"] #[inline(always)] pub fn dtlen(&mut self) -> DTLEN_W { DTLEN_W { w: self } } #[doc = "Bit 0 - Channel length (number of bits per audio channel)"] #[inline(always)] pub fn chlen(&mut self) -> CHLEN_W { CHLEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "I2S configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2sctl](index.html) module"] pub struct I2SCTL_SPEC; impl crate::RegisterSpec for I2SCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [i2sctl::R](R) reader structure"] impl crate::Readable for I2SCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [i2sctl::W](W) writer structure"] impl crate::Writable for I2SCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets I2SCTL to value 0"] impl crate::Resettable for I2SCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "I2SPSC register accessor: an alias for `Reg`"] pub type I2SPSC = crate::Reg; #[doc = "I2S prescaler register"] pub mod i2spsc { #[doc = "Register `I2SPSC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `I2SPSC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MCKOEN` reader - I2S_MCK output enable"] pub struct MCKOEN_R(crate::FieldReader); impl MCKOEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MCKOEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MCKOEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MCKOEN` writer - I2S_MCK output enable"] pub struct MCKOEN_W<'a> { w: &'a mut W, } impl<'a> MCKOEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `OF` reader - Odd factor for the prescaler"] pub struct OF_R(crate::FieldReader); impl OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OF` writer - Odd factor for the prescaler"] pub struct OF_W<'a> { w: &'a mut W, } impl<'a> OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `DIV` reader - Dividing factor for the prescaler"] pub struct DIV_R(crate::FieldReader); impl DIV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DIV` writer - Dividing factor for the prescaler"] pub struct DIV_W<'a> { w: &'a mut W, } impl<'a> DIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bit 9 - I2S_MCK output enable"] #[inline(always)] pub fn mckoen(&self) -> MCKOEN_R { MCKOEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Odd factor for the prescaler"] #[inline(always)] pub fn of(&self) -> OF_R { OF_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 0:7 - Dividing factor for the prescaler"] #[inline(always)] pub fn div(&self) -> DIV_R { DIV_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bit 9 - I2S_MCK output enable"] #[inline(always)] pub fn mckoen(&mut self) -> MCKOEN_W { MCKOEN_W { w: self } } #[doc = "Bit 8 - Odd factor for the prescaler"] #[inline(always)] pub fn of(&mut self) -> OF_W { OF_W { w: self } } #[doc = "Bits 0:7 - Dividing factor for the prescaler"] #[inline(always)] pub fn div(&mut self) -> DIV_W { DIV_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "I2S prescaler register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2spsc](index.html) module"] pub struct I2SPSC_SPEC; impl crate::RegisterSpec for I2SPSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [i2spsc::R](R) reader structure"] impl crate::Readable for I2SPSC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [i2spsc::W](W) writer structure"] impl crate::Writable for I2SPSC_SPEC { type Writer = W; } #[doc = "`reset()` method sets I2SPSC to value 0x02"] impl crate::Resettable for I2SPSC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x02 } } } #[doc = "QCTL register accessor: an alias for `Reg`"] pub type QCTL = crate::Reg; #[doc = "SPI quad wird control register"] pub mod qctl { #[doc = "Register `QCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `QCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IO23_DRV` reader - Drive IO2 and IO3 enable"] pub struct IO23_DRV_R(crate::FieldReader); impl IO23_DRV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IO23_DRV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IO23_DRV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IO23_DRV` writer - Drive IO2 and IO3 enable"] pub struct IO23_DRV_W<'a> { w: &'a mut W, } impl<'a> IO23_DRV_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `QRD` reader - Quad wire read select"] pub struct QRD_R(crate::FieldReader); impl QRD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { QRD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for QRD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `QRD` writer - Quad wire read select"] pub struct QRD_W<'a> { w: &'a mut W, } impl<'a> QRD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `QMOD` reader - Quad wire mode enable"] pub struct QMOD_R(crate::FieldReader); impl QMOD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { QMOD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for QMOD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `QMOD` writer - Quad wire mode enable"] pub struct QMOD_W<'a> { w: &'a mut W, } impl<'a> QMOD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 2 - Drive IO2 and IO3 enable"] #[inline(always)] pub fn io23_drv(&self) -> IO23_DRV_R { IO23_DRV_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Quad wire read select"] #[inline(always)] pub fn qrd(&self) -> QRD_R { QRD_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Quad wire mode enable"] #[inline(always)] pub fn qmod(&self) -> QMOD_R { QMOD_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 2 - Drive IO2 and IO3 enable"] #[inline(always)] pub fn io23_drv(&mut self) -> IO23_DRV_W { IO23_DRV_W { w: self } } #[doc = "Bit 1 - Quad wire read select"] #[inline(always)] pub fn qrd(&mut self) -> QRD_W { QRD_W { w: self } } #[doc = "Bit 0 - Quad wire mode enable"] #[inline(always)] pub fn qmod(&mut self) -> QMOD_W { QMOD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "SPI quad wird control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [qctl](index.html) module"] pub struct QCTL_SPEC; impl crate::RegisterSpec for QCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [qctl::R](R) reader structure"] impl crate::Readable for QCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [qctl::W](W) writer structure"] impl crate::Writable for QCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets QCTL to value 0"] impl crate::Resettable for QCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Serial peripheral interface"] pub struct SPI1 { _marker: PhantomData<*const ()>, } unsafe impl Send for SPI1 {} impl SPI1 { #[doc = r"Pointer to the register block"] pub const PTR: *const spi0::RegisterBlock = 0x4000_3800 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const spi0::RegisterBlock { Self::PTR } } impl Deref for SPI1 { type Target = spi0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for SPI1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("SPI1").finish() } } #[doc = "Serial peripheral interface"] pub use spi0 as spi1; #[doc = "System configuration controller"] pub struct SYSCFG { _marker: PhantomData<*const ()>, } unsafe impl Send for SYSCFG {} impl SYSCFG { #[doc = r"Pointer to the register block"] pub const PTR: *const syscfg::RegisterBlock = 0x4001_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const syscfg::RegisterBlock { Self::PTR } } impl Deref for SYSCFG { type Target = syscfg::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for SYSCFG { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("SYSCFG").finish() } } #[doc = "System configuration controller"] pub mod syscfg { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - System configuration register 0"] pub cfg0: crate::Reg, _reserved1: [u8; 0x04], #[doc = "0x08 - EXTI sources selection register 0"] pub extiss0: crate::Reg, #[doc = "0x0c - EXTI sources selection register 1"] pub extiss1: crate::Reg, #[doc = "0x10 - EXTI sources selection register 2"] pub extiss2: crate::Reg, #[doc = "0x14 - EXTI sources selection register 3"] pub extiss3: crate::Reg, #[doc = "0x18 - System configuration register 2"] pub cfg2: crate::Reg, _reserved6: [u8; 0x04], #[doc = "0x20 - I/O compensation control register"] pub cpsctl: crate::Reg, } #[doc = "CFG0 register accessor: an alias for `Reg`"] pub type CFG0 = crate::Reg; #[doc = "System configuration register 0"] pub mod cfg0 { #[doc = "Register `CFG0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PB9_HCCE` reader - PB9 pin high current capability enable"] pub struct PB9_HCCE_R(crate::FieldReader); impl PB9_HCCE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PB9_HCCE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PB9_HCCE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PB9_HCCE` writer - PB9 pin high current capability enable"] pub struct PB9_HCCE_W<'a> { w: &'a mut W, } impl<'a> PB9_HCCE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `TIMER16_DMA_RMP` reader - Timer 16 DMA request remapping enable"] pub struct TIMER16_DMA_RMP_R(crate::FieldReader); impl TIMER16_DMA_RMP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER16_DMA_RMP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER16_DMA_RMP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER16_DMA_RMP` writer - Timer 16 DMA request remapping enable"] pub struct TIMER16_DMA_RMP_W<'a> { w: &'a mut W, } impl<'a> TIMER16_DMA_RMP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `TIMER15_DMA_RMP` reader - Timer 15 DMA request remapping enable"] pub struct TIMER15_DMA_RMP_R(crate::FieldReader); impl TIMER15_DMA_RMP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TIMER15_DMA_RMP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TIMER15_DMA_RMP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TIMER15_DMA_RMP` writer - Timer 15 DMA request remapping enable"] pub struct TIMER15_DMA_RMP_W<'a> { w: &'a mut W, } impl<'a> TIMER15_DMA_RMP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `USART0_RX_DMA_RMP` reader - USART0_RX DMA request remapping enable"] pub struct USART0_RX_DMA_RMP_R(crate::FieldReader); impl USART0_RX_DMA_RMP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USART0_RX_DMA_RMP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USART0_RX_DMA_RMP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USART0_RX_DMA_RMP` writer - USART0_RX DMA request remapping enable"] pub struct USART0_RX_DMA_RMP_W<'a> { w: &'a mut W, } impl<'a> USART0_RX_DMA_RMP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `USART0_TX_DMA_RMP` reader - USART0_TX DMA request remapping enable"] pub struct USART0_TX_DMA_RMP_R(crate::FieldReader); impl USART0_TX_DMA_RMP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USART0_TX_DMA_RMP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USART0_TX_DMA_RMP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USART0_TX_DMA_RMP` writer - USART0_TX DMA request remapping enable"] pub struct USART0_TX_DMA_RMP_W<'a> { w: &'a mut W, } impl<'a> USART0_TX_DMA_RMP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `ADC_DMA_RMP` reader - ADC DMA request remapping enable"] pub struct ADC_DMA_RMP_R(crate::FieldReader); impl ADC_DMA_RMP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADC_DMA_RMP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADC_DMA_RMP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADC_DMA_RMP` writer - ADC DMA request remapping enable"] pub struct ADC_DMA_RMP_W<'a> { w: &'a mut W, } impl<'a> ADC_DMA_RMP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `BOOT_MODE` reader - Boot mode"] pub struct BOOT_MODE_R(crate::FieldReader); impl BOOT_MODE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { BOOT_MODE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BOOT_MODE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 19 - PB9 pin high current capability enable"] #[inline(always)] pub fn pb9_hcce(&self) -> PB9_HCCE_R { PB9_HCCE_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 12 - Timer 16 DMA request remapping enable"] #[inline(always)] pub fn timer16_dma_rmp(&self) -> TIMER16_DMA_RMP_R { TIMER16_DMA_RMP_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Timer 15 DMA request remapping enable"] #[inline(always)] pub fn timer15_dma_rmp(&self) -> TIMER15_DMA_RMP_R { TIMER15_DMA_RMP_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - USART0_RX DMA request remapping enable"] #[inline(always)] pub fn usart0_rx_dma_rmp(&self) -> USART0_RX_DMA_RMP_R { USART0_RX_DMA_RMP_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - USART0_TX DMA request remapping enable"] #[inline(always)] pub fn usart0_tx_dma_rmp(&self) -> USART0_TX_DMA_RMP_R { USART0_TX_DMA_RMP_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - ADC DMA request remapping enable"] #[inline(always)] pub fn adc_dma_rmp(&self) -> ADC_DMA_RMP_R { ADC_DMA_RMP_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 0:1 - Boot mode"] #[inline(always)] pub fn boot_mode(&self) -> BOOT_MODE_R { BOOT_MODE_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bit 19 - PB9 pin high current capability enable"] #[inline(always)] pub fn pb9_hcce(&mut self) -> PB9_HCCE_W { PB9_HCCE_W { w: self } } #[doc = "Bit 12 - Timer 16 DMA request remapping enable"] #[inline(always)] pub fn timer16_dma_rmp(&mut self) -> TIMER16_DMA_RMP_W { TIMER16_DMA_RMP_W { w: self } } #[doc = "Bit 11 - Timer 15 DMA request remapping enable"] #[inline(always)] pub fn timer15_dma_rmp(&mut self) -> TIMER15_DMA_RMP_W { TIMER15_DMA_RMP_W { w: self } } #[doc = "Bit 10 - USART0_RX DMA request remapping enable"] #[inline(always)] pub fn usart0_rx_dma_rmp(&mut self) -> USART0_RX_DMA_RMP_W { USART0_RX_DMA_RMP_W { w: self } } #[doc = "Bit 9 - USART0_TX DMA request remapping enable"] #[inline(always)] pub fn usart0_tx_dma_rmp(&mut self) -> USART0_TX_DMA_RMP_W { USART0_TX_DMA_RMP_W { w: self } } #[doc = "Bit 8 - ADC DMA request remapping enable"] #[inline(always)] pub fn adc_dma_rmp(&mut self) -> ADC_DMA_RMP_W { ADC_DMA_RMP_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "System configuration register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"] pub struct CFG0_SPEC; impl crate::RegisterSpec for CFG0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg0::R](R) reader structure"] impl crate::Readable for CFG0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"] impl crate::Writable for CFG0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG0 to value 0"] impl crate::Resettable for CFG0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "EXTISS0 register accessor: an alias for `Reg`"] pub type EXTISS0 = crate::Reg; #[doc = "EXTI sources selection register 0"] pub mod extiss0 { #[doc = "Register `EXTISS0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `EXTISS0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EXTI3_SS` reader - EXTI 3 sources selection"] pub struct EXTI3_SS_R(crate::FieldReader); impl EXTI3_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI3_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI3_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI3_SS` writer - EXTI 3 sources selection"] pub struct EXTI3_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI3_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `EXTI2_SS` reader - EXTI 2 sources selection"] pub struct EXTI2_SS_R(crate::FieldReader); impl EXTI2_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI2_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI2_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI2_SS` writer - EXTI 2 sources selection"] pub struct EXTI2_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI2_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `EXTI1_SS` reader - EXTI 1 sources selection"] pub struct EXTI1_SS_R(crate::FieldReader); impl EXTI1_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI1_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI1_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI1_SS` writer - EXTI 1 sources selection"] pub struct EXTI1_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI1_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `EXTI0_SS` reader - EXTI 0 sources selection"] pub struct EXTI0_SS_R(crate::FieldReader); impl EXTI0_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI0_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI0_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI0_SS` writer - EXTI 0 sources selection"] pub struct EXTI0_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI0_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 12:15 - EXTI 3 sources selection"] #[inline(always)] pub fn exti3_ss(&self) -> EXTI3_SS_R { EXTI3_SS_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 8:11 - EXTI 2 sources selection"] #[inline(always)] pub fn exti2_ss(&self) -> EXTI2_SS_R { EXTI2_SS_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:7 - EXTI 1 sources selection"] #[inline(always)] pub fn exti1_ss(&self) -> EXTI1_SS_R { EXTI1_SS_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:3 - EXTI 0 sources selection"] #[inline(always)] pub fn exti0_ss(&self) -> EXTI0_SS_R { EXTI0_SS_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 12:15 - EXTI 3 sources selection"] #[inline(always)] pub fn exti3_ss(&mut self) -> EXTI3_SS_W { EXTI3_SS_W { w: self } } #[doc = "Bits 8:11 - EXTI 2 sources selection"] #[inline(always)] pub fn exti2_ss(&mut self) -> EXTI2_SS_W { EXTI2_SS_W { w: self } } #[doc = "Bits 4:7 - EXTI 1 sources selection"] #[inline(always)] pub fn exti1_ss(&mut self) -> EXTI1_SS_W { EXTI1_SS_W { w: self } } #[doc = "Bits 0:3 - EXTI 0 sources selection"] #[inline(always)] pub fn exti0_ss(&mut self) -> EXTI0_SS_W { EXTI0_SS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "EXTI sources selection register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extiss0](index.html) module"] pub struct EXTISS0_SPEC; impl crate::RegisterSpec for EXTISS0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [extiss0::R](R) reader structure"] impl crate::Readable for EXTISS0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [extiss0::W](W) writer structure"] impl crate::Writable for EXTISS0_SPEC { type Writer = W; } #[doc = "`reset()` method sets EXTISS0 to value 0"] impl crate::Resettable for EXTISS0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "EXTISS1 register accessor: an alias for `Reg`"] pub type EXTISS1 = crate::Reg; #[doc = "EXTI sources selection register 1"] pub mod extiss1 { #[doc = "Register `EXTISS1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `EXTISS1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EXTI7_SS` reader - EXTI 7 sources selection"] pub struct EXTI7_SS_R(crate::FieldReader); impl EXTI7_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI7_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI7_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI7_SS` writer - EXTI 7 sources selection"] pub struct EXTI7_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI7_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `EXTI6_SS` reader - EXTI 6 sources selection"] pub struct EXTI6_SS_R(crate::FieldReader); impl EXTI6_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI6_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI6_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI6_SS` writer - EXTI 6 sources selection"] pub struct EXTI6_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI6_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `EXTI5_SS` reader - EXTI 5 sources selection"] pub struct EXTI5_SS_R(crate::FieldReader); impl EXTI5_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI5_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI5_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI5_SS` writer - EXTI 5 sources selection"] pub struct EXTI5_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI5_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `EXTI4_SS` reader - EXTI 4 sources selection"] pub struct EXTI4_SS_R(crate::FieldReader); impl EXTI4_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI4_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI4_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI4_SS` writer - EXTI 4 sources selection"] pub struct EXTI4_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI4_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 12:15 - EXTI 7 sources selection"] #[inline(always)] pub fn exti7_ss(&self) -> EXTI7_SS_R { EXTI7_SS_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 8:11 - EXTI 6 sources selection"] #[inline(always)] pub fn exti6_ss(&self) -> EXTI6_SS_R { EXTI6_SS_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:7 - EXTI 5 sources selection"] #[inline(always)] pub fn exti5_ss(&self) -> EXTI5_SS_R { EXTI5_SS_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:3 - EXTI 4 sources selection"] #[inline(always)] pub fn exti4_ss(&self) -> EXTI4_SS_R { EXTI4_SS_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 12:15 - EXTI 7 sources selection"] #[inline(always)] pub fn exti7_ss(&mut self) -> EXTI7_SS_W { EXTI7_SS_W { w: self } } #[doc = "Bits 8:11 - EXTI 6 sources selection"] #[inline(always)] pub fn exti6_ss(&mut self) -> EXTI6_SS_W { EXTI6_SS_W { w: self } } #[doc = "Bits 4:7 - EXTI 5 sources selection"] #[inline(always)] pub fn exti5_ss(&mut self) -> EXTI5_SS_W { EXTI5_SS_W { w: self } } #[doc = "Bits 0:3 - EXTI 4 sources selection"] #[inline(always)] pub fn exti4_ss(&mut self) -> EXTI4_SS_W { EXTI4_SS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "EXTI sources selection register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extiss1](index.html) module"] pub struct EXTISS1_SPEC; impl crate::RegisterSpec for EXTISS1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [extiss1::R](R) reader structure"] impl crate::Readable for EXTISS1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [extiss1::W](W) writer structure"] impl crate::Writable for EXTISS1_SPEC { type Writer = W; } #[doc = "`reset()` method sets EXTISS1 to value 0"] impl crate::Resettable for EXTISS1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "EXTISS2 register accessor: an alias for `Reg`"] pub type EXTISS2 = crate::Reg; #[doc = "EXTI sources selection register 2"] pub mod extiss2 { #[doc = "Register `EXTISS2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `EXTISS2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EXTI11_SS` reader - EXTI 11 sources selection"] pub struct EXTI11_SS_R(crate::FieldReader); impl EXTI11_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI11_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI11_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI11_SS` writer - EXTI 11 sources selection"] pub struct EXTI11_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI11_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `EXTI10_SS` reader - EXTI 10 sources selection"] pub struct EXTI10_SS_R(crate::FieldReader); impl EXTI10_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI10_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI10_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI10_SS` writer - EXTI 10 sources selection"] pub struct EXTI10_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI10_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `EXTI9_SS` reader - EXTI 9 sources selection"] pub struct EXTI9_SS_R(crate::FieldReader); impl EXTI9_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI9_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI9_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI9_SS` writer - EXTI 9 sources selection"] pub struct EXTI9_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI9_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `EXTI8_SS` reader - EXTI 8 sources selection"] pub struct EXTI8_SS_R(crate::FieldReader); impl EXTI8_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI8_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI8_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI8_SS` writer - EXTI 8 sources selection"] pub struct EXTI8_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI8_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 12:15 - EXTI 11 sources selection"] #[inline(always)] pub fn exti11_ss(&self) -> EXTI11_SS_R { EXTI11_SS_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 8:11 - EXTI 10 sources selection"] #[inline(always)] pub fn exti10_ss(&self) -> EXTI10_SS_R { EXTI10_SS_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:7 - EXTI 9 sources selection"] #[inline(always)] pub fn exti9_ss(&self) -> EXTI9_SS_R { EXTI9_SS_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:3 - EXTI 8 sources selection"] #[inline(always)] pub fn exti8_ss(&self) -> EXTI8_SS_R { EXTI8_SS_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 12:15 - EXTI 11 sources selection"] #[inline(always)] pub fn exti11_ss(&mut self) -> EXTI11_SS_W { EXTI11_SS_W { w: self } } #[doc = "Bits 8:11 - EXTI 10 sources selection"] #[inline(always)] pub fn exti10_ss(&mut self) -> EXTI10_SS_W { EXTI10_SS_W { w: self } } #[doc = "Bits 4:7 - EXTI 9 sources selection"] #[inline(always)] pub fn exti9_ss(&mut self) -> EXTI9_SS_W { EXTI9_SS_W { w: self } } #[doc = "Bits 0:3 - EXTI 8 sources selection"] #[inline(always)] pub fn exti8_ss(&mut self) -> EXTI8_SS_W { EXTI8_SS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "EXTI sources selection register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extiss2](index.html) module"] pub struct EXTISS2_SPEC; impl crate::RegisterSpec for EXTISS2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [extiss2::R](R) reader structure"] impl crate::Readable for EXTISS2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [extiss2::W](W) writer structure"] impl crate::Writable for EXTISS2_SPEC { type Writer = W; } #[doc = "`reset()` method sets EXTISS2 to value 0"] impl crate::Resettable for EXTISS2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "EXTISS3 register accessor: an alias for `Reg`"] pub type EXTISS3 = crate::Reg; #[doc = "EXTI sources selection register 3"] pub mod extiss3 { #[doc = "Register `EXTISS3` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `EXTISS3` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EXTI15_SS` reader - EXTI 15 sources selection"] pub struct EXTI15_SS_R(crate::FieldReader); impl EXTI15_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI15_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI15_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI15_SS` writer - EXTI 15 sources selection"] pub struct EXTI15_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI15_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `EXTI14_SS` reader - EXTI 14 sources selection"] pub struct EXTI14_SS_R(crate::FieldReader); impl EXTI14_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI14_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI14_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI14_SS` writer - EXTI 14 sources selection"] pub struct EXTI14_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI14_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `EXTI13_SS` reader - EXTI 13 sources selection"] pub struct EXTI13_SS_R(crate::FieldReader); impl EXTI13_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI13_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI13_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI13_SS` writer - EXTI 13 sources selection"] pub struct EXTI13_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI13_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `EXTI12_SS` reader - EXTI 12 sources selection"] pub struct EXTI12_SS_R(crate::FieldReader); impl EXTI12_SS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EXTI12_SS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EXTI12_SS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EXTI12_SS` writer - EXTI 12 sources selection"] pub struct EXTI12_SS_W<'a> { w: &'a mut W, } impl<'a> EXTI12_SS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 12:15 - EXTI 15 sources selection"] #[inline(always)] pub fn exti15_ss(&self) -> EXTI15_SS_R { EXTI15_SS_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 8:11 - EXTI 14 sources selection"] #[inline(always)] pub fn exti14_ss(&self) -> EXTI14_SS_R { EXTI14_SS_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bits 4:7 - EXTI 13 sources selection"] #[inline(always)] pub fn exti13_ss(&self) -> EXTI13_SS_R { EXTI13_SS_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 0:3 - EXTI 12 sources selection"] #[inline(always)] pub fn exti12_ss(&self) -> EXTI12_SS_R { EXTI12_SS_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 12:15 - EXTI 15 sources selection"] #[inline(always)] pub fn exti15_ss(&mut self) -> EXTI15_SS_W { EXTI15_SS_W { w: self } } #[doc = "Bits 8:11 - EXTI 14 sources selection"] #[inline(always)] pub fn exti14_ss(&mut self) -> EXTI14_SS_W { EXTI14_SS_W { w: self } } #[doc = "Bits 4:7 - EXTI 13 sources selection"] #[inline(always)] pub fn exti13_ss(&mut self) -> EXTI13_SS_W { EXTI13_SS_W { w: self } } #[doc = "Bits 0:3 - EXTI 12 sources selection"] #[inline(always)] pub fn exti12_ss(&mut self) -> EXTI12_SS_W { EXTI12_SS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "EXTI sources selection register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extiss3](index.html) module"] pub struct EXTISS3_SPEC; impl crate::RegisterSpec for EXTISS3_SPEC { type Ux = u32; } #[doc = "`read()` method returns [extiss3::R](R) reader structure"] impl crate::Readable for EXTISS3_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [extiss3::W](W) writer structure"] impl crate::Writable for EXTISS3_SPEC { type Writer = W; } #[doc = "`reset()` method sets EXTISS3 to value 0"] impl crate::Resettable for EXTISS3_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CFG2 register accessor: an alias for `Reg`"] pub type CFG2 = crate::Reg; #[doc = "System configuration register 2"] pub mod cfg2 { #[doc = "Register `CFG2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SRAM_PCEF` reader - SRAM parity check error flag"] pub struct SRAM_PCEF_R(crate::FieldReader); impl SRAM_PCEF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SRAM_PCEF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SRAM_PCEF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SRAM_PCEF` writer - SRAM parity check error flag"] pub struct SRAM_PCEF_W<'a> { w: &'a mut W, } impl<'a> SRAM_PCEF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `LVD_LOCK` reader - LVD lock"] pub struct LVD_LOCK_R(crate::FieldReader); impl LVD_LOCK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LVD_LOCK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LVD_LOCK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LVD_LOCK` writer - LVD lock"] pub struct LVD_LOCK_W<'a> { w: &'a mut W, } impl<'a> LVD_LOCK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `SRAM_PARITY_ERROR_LOCK` reader - SRAM parity check error lock"] pub struct SRAM_PARITY_ERROR_LOCK_R(crate::FieldReader); impl SRAM_PARITY_ERROR_LOCK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SRAM_PARITY_ERROR_LOCK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SRAM_PARITY_ERROR_LOCK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SRAM_PARITY_ERROR_LOCK` writer - SRAM parity check error lock"] pub struct SRAM_PARITY_ERROR_LOCK_W<'a> { w: &'a mut W, } impl<'a> SRAM_PARITY_ERROR_LOCK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `LOCKUP_LOCK` reader - Cortex-M4 LOCKUP output lock"] pub struct LOCKUP_LOCK_R(crate::FieldReader); impl LOCKUP_LOCK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LOCKUP_LOCK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LOCKUP_LOCK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LOCKUP_LOCK` writer - Cortex-M4 LOCKUP output lock"] pub struct LOCKUP_LOCK_W<'a> { w: &'a mut W, } impl<'a> LOCKUP_LOCK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 8 - SRAM parity check error flag"] #[inline(always)] pub fn sram_pcef(&self) -> SRAM_PCEF_R { SRAM_PCEF_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 2 - LVD lock"] #[inline(always)] pub fn lvd_lock(&self) -> LVD_LOCK_R { LVD_LOCK_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - SRAM parity check error lock"] #[inline(always)] pub fn sram_parity_error_lock(&self) -> SRAM_PARITY_ERROR_LOCK_R { SRAM_PARITY_ERROR_LOCK_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Cortex-M4 LOCKUP output lock"] #[inline(always)] pub fn lockup_lock(&self) -> LOCKUP_LOCK_R { LOCKUP_LOCK_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 8 - SRAM parity check error flag"] #[inline(always)] pub fn sram_pcef(&mut self) -> SRAM_PCEF_W { SRAM_PCEF_W { w: self } } #[doc = "Bit 2 - LVD lock"] #[inline(always)] pub fn lvd_lock(&mut self) -> LVD_LOCK_W { LVD_LOCK_W { w: self } } #[doc = "Bit 1 - SRAM parity check error lock"] #[inline(always)] pub fn sram_parity_error_lock(&mut self) -> SRAM_PARITY_ERROR_LOCK_W { SRAM_PARITY_ERROR_LOCK_W { w: self } } #[doc = "Bit 0 - Cortex-M4 LOCKUP output lock"] #[inline(always)] pub fn lockup_lock(&mut self) -> LOCKUP_LOCK_W { LOCKUP_LOCK_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "System configuration register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg2](index.html) module"] pub struct CFG2_SPEC; impl crate::RegisterSpec for CFG2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg2::R](R) reader structure"] impl crate::Readable for CFG2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg2::W](W) writer structure"] impl crate::Writable for CFG2_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG2 to value 0"] impl crate::Resettable for CFG2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CPSCTL register accessor: an alias for `Reg`"] pub type CPSCTL = crate::Reg; #[doc = "I/O compensation control register"] pub mod cpsctl { #[doc = "Register `CPSCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CPSCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CPS_RDY` reader - I/O compensation cell is ready"] pub struct CPS_RDY_R(crate::FieldReader); impl CPS_RDY_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CPS_RDY_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CPS_RDY_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CPS_RDY` writer - I/O compensation cell is ready"] pub struct CPS_RDY_W<'a> { w: &'a mut W, } impl<'a> CPS_RDY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CPS_EN` reader - I/O compensation cell enable"] pub struct CPS_EN_R(crate::FieldReader); impl CPS_EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CPS_EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CPS_EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CPS_EN` writer - I/O compensation cell enable"] pub struct CPS_EN_W<'a> { w: &'a mut W, } impl<'a> CPS_EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 8 - I/O compensation cell is ready"] #[inline(always)] pub fn cps_rdy(&self) -> CPS_RDY_R { CPS_RDY_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 0 - I/O compensation cell enable"] #[inline(always)] pub fn cps_en(&self) -> CPS_EN_R { CPS_EN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 8 - I/O compensation cell is ready"] #[inline(always)] pub fn cps_rdy(&mut self) -> CPS_RDY_W { CPS_RDY_W { w: self } } #[doc = "Bit 0 - I/O compensation cell enable"] #[inline(always)] pub fn cps_en(&mut self) -> CPS_EN_W { CPS_EN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "I/O compensation control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpsctl](index.html) module"] pub struct CPSCTL_SPEC; impl crate::RegisterSpec for CPSCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cpsctl::R](R) reader structure"] impl crate::Readable for CPSCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cpsctl::W](W) writer structure"] impl crate::Writable for CPSCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CPSCTL to value 0"] impl crate::Resettable for CPSCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Advanced-timers"] pub struct TIMER0 { _marker: PhantomData<*const ()>, } unsafe impl Send for TIMER0 {} impl TIMER0 { #[doc = r"Pointer to the register block"] pub const PTR: *const timer0::RegisterBlock = 0x4001_2c00 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const timer0::RegisterBlock { Self::PTR } } impl Deref for TIMER0 { type Target = timer0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for TIMER0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("TIMER0").finish() } } #[doc = "Advanced-timers"] pub mod timer0 { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register 0"] pub ctl0: crate::Reg, #[doc = "0x04 - control register 1"] pub ctl1: crate::Reg, #[doc = "0x08 - slave mode configuration register"] pub smcfg: crate::Reg, #[doc = "0x0c - DMA/Interrupt enable register"] pub dmainten: crate::Reg, #[doc = "0x10 - status register"] pub intf: crate::Reg, #[doc = "0x14 - Software event generation register"] pub swevg: crate::Reg, _reserved_6_chctl0: [u8; 0x04], _reserved_7_chctl1: [u8; 0x04], #[doc = "0x20 - capture/compare enable register"] pub chctl2: crate::Reg, #[doc = "0x24 - counter"] pub cnt: crate::Reg, #[doc = "0x28 - prescaler"] pub psc: crate::Reg, #[doc = "0x2c - auto-reload register"] pub car: crate::Reg, #[doc = "0x30 - repetition counter register"] pub crep: crate::Reg, #[doc = "0x34 - capture/compare register 0"] pub ch0cv: crate::Reg, #[doc = "0x38 - capture/compare register 1"] pub ch1cv: crate::Reg, #[doc = "0x3c - capture/compare register 2"] pub ch2cv: crate::Reg, #[doc = "0x40 - capture/compare register 3"] pub ch3cv: crate::Reg, #[doc = "0x44 - channel complementary protection register"] pub cchp: crate::Reg, #[doc = "0x48 - DMA configuration register"] pub dmacfg: crate::Reg, #[doc = "0x4c - DMA address for full transfer"] pub dmatb: crate::Reg, _reserved20: [u8; 0xac], #[doc = "0xfc - Configuration register"] pub cfg: crate::Reg, } impl RegisterBlock { #[doc = "0x18 - capture/compare mode register 0 (input mode)"] #[inline(always)] pub fn chctl0_input(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const crate::Reg) } } #[doc = "0x18 - capture/compare mode register (output mode)"] #[inline(always)] pub fn chctl0_output(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const crate::Reg) } } #[doc = "0x1c - capture/compare mode register 1 (input mode)"] #[inline(always)] pub fn chctl1_input(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const crate::Reg) } } #[doc = "0x1c - capture/compare mode register (output mode)"] #[inline(always)] pub fn chctl1_output(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const crate::Reg) } } } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "control register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CKDIV` reader - Clock division"] pub struct CKDIV_R(crate::FieldReader); impl CKDIV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CKDIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKDIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKDIV` writer - Clock division"] pub struct CKDIV_W<'a> { w: &'a mut W, } impl<'a> CKDIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `ARSE` reader - Auto-reload preload enable"] pub struct ARSE_R(crate::FieldReader); impl ARSE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ARSE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ARSE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ARSE` writer - Auto-reload preload enable"] pub struct ARSE_W<'a> { w: &'a mut W, } impl<'a> ARSE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CAM` reader - Center-aligned mode selection"] pub struct CAM_R(crate::FieldReader); impl CAM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CAM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CAM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CAM` writer - Center-aligned mode selection"] pub struct CAM_W<'a> { w: &'a mut W, } impl<'a> CAM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 5)) | ((value as u32 & 0x03) << 5); self.w } } #[doc = "Field `DIR` reader - Direction"] pub struct DIR_R(crate::FieldReader); impl DIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DIR` writer - Direction"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `SPM` reader - One-pulse mode"] pub struct SPM_R(crate::FieldReader); impl SPM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPM` writer - One-pulse mode"] pub struct SPM_W<'a> { w: &'a mut W, } impl<'a> SPM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `UPS` reader - Update request source"] pub struct UPS_R(crate::FieldReader); impl UPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPS` writer - Update request source"] pub struct UPS_W<'a> { w: &'a mut W, } impl<'a> UPS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `UPDIS` reader - Update disable"] pub struct UPDIS_R(crate::FieldReader); impl UPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDIS` writer - Update disable"] pub struct UPDIS_W<'a> { w: &'a mut W, } impl<'a> UPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CEN` reader - Counter enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Counter enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckdiv(&self) -> CKDIV_R { CKDIV_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&self) -> ARSE_R { ARSE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 5:6 - Center-aligned mode selection"] #[inline(always)] pub fn cam(&self) -> CAM_R { CAM_R::new(((self.bits >> 5) & 0x03) as u8) } #[doc = "Bit 4 - Direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn spm(&self) -> SPM_R { SPM_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&self) -> UPS_R { UPS_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&self) -> UPDIS_R { UPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckdiv(&mut self) -> CKDIV_W { CKDIV_W { w: self } } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&mut self) -> ARSE_W { ARSE_W { w: self } } #[doc = "Bits 5:6 - Center-aligned mode selection"] #[inline(always)] pub fn cam(&mut self) -> CAM_W { CAM_W { w: self } } #[doc = "Bit 4 - Direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn spm(&mut self) -> SPM_W { SPM_W { w: self } } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&mut self) -> UPS_W { UPS_W { w: self } } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&mut self) -> UPDIS_W { UPDIS_W { w: self } } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ISO3` reader - Idle state of channel 3 output"] pub struct ISO3_R(crate::FieldReader); impl ISO3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO3` writer - Idle state of channel 3 output"] pub struct ISO3_W<'a> { w: &'a mut W, } impl<'a> ISO3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `ISO2N` reader - Idle state of channel 2 complementary output"] pub struct ISO2N_R(crate::FieldReader); impl ISO2N_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO2N_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO2N_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO2N` writer - Idle state of channel 2 complementary output"] pub struct ISO2N_W<'a> { w: &'a mut W, } impl<'a> ISO2N_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `ISO2` reader - Idle state of channel 2 output"] pub struct ISO2_R(crate::FieldReader); impl ISO2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO2` writer - Idle state of channel 2 output"] pub struct ISO2_W<'a> { w: &'a mut W, } impl<'a> ISO2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `ISO1N` reader - Idle state of channel 1 complementary output"] pub struct ISO1N_R(crate::FieldReader); impl ISO1N_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO1N_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO1N_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO1N` writer - Idle state of channel 1 complementary output"] pub struct ISO1N_W<'a> { w: &'a mut W, } impl<'a> ISO1N_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `ISO1` reader - Idle state of channel 1 output"] pub struct ISO1_R(crate::FieldReader); impl ISO1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO1` writer - Idle state of channel 1 output"] pub struct ISO1_W<'a> { w: &'a mut W, } impl<'a> ISO1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `ISO0N` reader - Idle state of channel 0 complementary output"] pub struct ISO0N_R(crate::FieldReader); impl ISO0N_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO0N_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO0N_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO0N` writer - Idle state of channel 0 complementary output"] pub struct ISO0N_W<'a> { w: &'a mut W, } impl<'a> ISO0N_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `ISO0` reader - Idle state of channel 0 output"] pub struct ISO0_R(crate::FieldReader); impl ISO0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO0` writer - Idle state of channel 0 output"] pub struct ISO0_W<'a> { w: &'a mut W, } impl<'a> ISO0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TI0S` reader - Channel 0 trigger input selection"] pub struct TI0S_R(crate::FieldReader); impl TI0S_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TI0S_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TI0S_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TI0S` writer - Channel 0 trigger input selection"] pub struct TI0S_W<'a> { w: &'a mut W, } impl<'a> TI0S_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `MMC` reader - Master mode control"] pub struct MMC_R(crate::FieldReader); impl MMC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MMC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MMC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MMC` writer - Master mode control"] pub struct MMC_W<'a> { w: &'a mut W, } impl<'a> MMC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `DMAS` reader - DMA request source selection"] pub struct DMAS_R(crate::FieldReader); impl DMAS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DMAS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMAS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMAS` writer - DMA request source selection"] pub struct DMAS_W<'a> { w: &'a mut W, } impl<'a> DMAS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CCUC` reader - Commutation control shadow register update control"] pub struct CCUC_R(crate::FieldReader); impl CCUC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CCUC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CCUC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CCUC` writer - Commutation control shadow register update control"] pub struct CCUC_W<'a> { w: &'a mut W, } impl<'a> CCUC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CCSE` reader - Commutation control shadow enable"] pub struct CCSE_R(crate::FieldReader); impl CCSE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CCSE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CCSE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CCSE` writer - Commutation control shadow enable"] pub struct CCSE_W<'a> { w: &'a mut W, } impl<'a> CCSE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 14 - Idle state of channel 3 output"] #[inline(always)] pub fn iso3(&self) -> ISO3_R { ISO3_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Idle state of channel 2 complementary output"] #[inline(always)] pub fn iso2n(&self) -> ISO2N_R { ISO2N_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Idle state of channel 2 output"] #[inline(always)] pub fn iso2(&self) -> ISO2_R { ISO2_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Idle state of channel 1 complementary output"] #[inline(always)] pub fn iso1n(&self) -> ISO1N_R { ISO1N_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Idle state of channel 1 output"] #[inline(always)] pub fn iso1(&self) -> ISO1_R { ISO1_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Idle state of channel 0 complementary output"] #[inline(always)] pub fn iso0n(&self) -> ISO0N_R { ISO0N_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Idle state of channel 0 output"] #[inline(always)] pub fn iso0(&self) -> ISO0_R { ISO0_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Channel 0 trigger input selection"] #[inline(always)] pub fn ti0s(&self) -> TI0S_R { TI0S_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:6 - Master mode control"] #[inline(always)] pub fn mmc(&self) -> MMC_R { MMC_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - DMA request source selection"] #[inline(always)] pub fn dmas(&self) -> DMAS_R { DMAS_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Commutation control shadow register update control"] #[inline(always)] pub fn ccuc(&self) -> CCUC_R { CCUC_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 0 - Commutation control shadow enable"] #[inline(always)] pub fn ccse(&self) -> CCSE_R { CCSE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 14 - Idle state of channel 3 output"] #[inline(always)] pub fn iso3(&mut self) -> ISO3_W { ISO3_W { w: self } } #[doc = "Bit 13 - Idle state of channel 2 complementary output"] #[inline(always)] pub fn iso2n(&mut self) -> ISO2N_W { ISO2N_W { w: self } } #[doc = "Bit 12 - Idle state of channel 2 output"] #[inline(always)] pub fn iso2(&mut self) -> ISO2_W { ISO2_W { w: self } } #[doc = "Bit 11 - Idle state of channel 1 complementary output"] #[inline(always)] pub fn iso1n(&mut self) -> ISO1N_W { ISO1N_W { w: self } } #[doc = "Bit 10 - Idle state of channel 1 output"] #[inline(always)] pub fn iso1(&mut self) -> ISO1_W { ISO1_W { w: self } } #[doc = "Bit 9 - Idle state of channel 0 complementary output"] #[inline(always)] pub fn iso0n(&mut self) -> ISO0N_W { ISO0N_W { w: self } } #[doc = "Bit 8 - Idle state of channel 0 output"] #[inline(always)] pub fn iso0(&mut self) -> ISO0_W { ISO0_W { w: self } } #[doc = "Bit 7 - Channel 0 trigger input selection"] #[inline(always)] pub fn ti0s(&mut self) -> TI0S_W { TI0S_W { w: self } } #[doc = "Bits 4:6 - Master mode control"] #[inline(always)] pub fn mmc(&mut self) -> MMC_W { MMC_W { w: self } } #[doc = "Bit 3 - DMA request source selection"] #[inline(always)] pub fn dmas(&mut self) -> DMAS_W { DMAS_W { w: self } } #[doc = "Bit 2 - Commutation control shadow register update control"] #[inline(always)] pub fn ccuc(&mut self) -> CCUC_W { CCUC_W { w: self } } #[doc = "Bit 0 - Commutation control shadow enable"] #[inline(always)] pub fn ccse(&mut self) -> CCSE_W { CCSE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SMCFG register accessor: an alias for `Reg`"] pub type SMCFG = crate::Reg; #[doc = "slave mode configuration register"] pub mod smcfg { #[doc = "Register `SMCFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `SMCFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ETP` reader - External trigger polarity"] pub struct ETP_R(crate::FieldReader); impl ETP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ETP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ETP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ETP` writer - External trigger polarity"] pub struct ETP_W<'a> { w: &'a mut W, } impl<'a> ETP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `SMC1` reader - Part of SMC for enable External clock mode1"] pub struct SMC1_R(crate::FieldReader); impl SMC1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SMC1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SMC1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SMC1` writer - Part of SMC for enable External clock mode1"] pub struct SMC1_W<'a> { w: &'a mut W, } impl<'a> SMC1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `ETPSC` reader - External trigger prescaler"] pub struct ETPSC_R(crate::FieldReader); impl ETPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ETPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ETPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ETPSC` writer - External trigger prescaler"] pub struct ETPSC_W<'a> { w: &'a mut W, } impl<'a> ETPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `ETFC` reader - External trigger filter"] pub struct ETFC_R(crate::FieldReader); impl ETFC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ETFC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ETFC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ETFC` writer - External trigger filter"] pub struct ETFC_W<'a> { w: &'a mut W, } impl<'a> ETFC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `MSM` reader - Master/Slave mode"] pub struct MSM_R(crate::FieldReader); impl MSM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MSM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MSM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MSM` writer - Master/Slave mode"] pub struct MSM_W<'a> { w: &'a mut W, } impl<'a> MSM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TRGS` reader - Trigger selection"] pub struct TRGS_R(crate::FieldReader); impl TRGS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TRGS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGS` writer - Trigger selection"] pub struct TRGS_W<'a> { w: &'a mut W, } impl<'a> TRGS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `OCRC` reader - Trigger selection"] pub struct OCRC_R(crate::FieldReader); impl OCRC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCRC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCRC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCRC` writer - Trigger selection"] pub struct OCRC_W<'a> { w: &'a mut W, } impl<'a> OCRC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `SMC` reader - Slave mode selection"] pub struct SMC_R(crate::FieldReader); impl SMC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SMC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SMC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SMC` writer - Slave mode selection"] pub struct SMC_W<'a> { w: &'a mut W, } impl<'a> SMC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); self.w } } impl R { #[doc = "Bit 15 - External trigger polarity"] #[inline(always)] pub fn etp(&self) -> ETP_R { ETP_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Part of SMC for enable External clock mode1"] #[inline(always)] pub fn smc1(&self) -> SMC1_R { SMC1_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bits 12:13 - External trigger prescaler"] #[inline(always)] pub fn etpsc(&self) -> ETPSC_R { ETPSC_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 8:11 - External trigger filter"] #[inline(always)] pub fn etfc(&self) -> ETFC_R { ETFC_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 7 - Master/Slave mode"] #[inline(always)] pub fn msm(&self) -> MSM_R { MSM_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:6 - Trigger selection"] #[inline(always)] pub fn trgs(&self) -> TRGS_R { TRGS_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - Trigger selection"] #[inline(always)] pub fn ocrc(&self) -> OCRC_R { OCRC_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bits 0:2 - Slave mode selection"] #[inline(always)] pub fn smc(&self) -> SMC_R { SMC_R::new((self.bits & 0x07) as u8) } } impl W { #[doc = "Bit 15 - External trigger polarity"] #[inline(always)] pub fn etp(&mut self) -> ETP_W { ETP_W { w: self } } #[doc = "Bit 14 - Part of SMC for enable External clock mode1"] #[inline(always)] pub fn smc1(&mut self) -> SMC1_W { SMC1_W { w: self } } #[doc = "Bits 12:13 - External trigger prescaler"] #[inline(always)] pub fn etpsc(&mut self) -> ETPSC_W { ETPSC_W { w: self } } #[doc = "Bits 8:11 - External trigger filter"] #[inline(always)] pub fn etfc(&mut self) -> ETFC_W { ETFC_W { w: self } } #[doc = "Bit 7 - Master/Slave mode"] #[inline(always)] pub fn msm(&mut self) -> MSM_W { MSM_W { w: self } } #[doc = "Bits 4:6 - Trigger selection"] #[inline(always)] pub fn trgs(&mut self) -> TRGS_W { TRGS_W { w: self } } #[doc = "Bit 3 - Trigger selection"] #[inline(always)] pub fn ocrc(&mut self) -> OCRC_W { OCRC_W { w: self } } #[doc = "Bits 0:2 - Slave mode selection"] #[inline(always)] pub fn smc(&mut self) -> SMC_W { SMC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "slave mode configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smcfg](index.html) module"] pub struct SMCFG_SPEC; impl crate::RegisterSpec for SMCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [smcfg::R](R) reader structure"] impl crate::Readable for SMCFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [smcfg::W](W) writer structure"] impl crate::Writable for SMCFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SMCFG to value 0"] impl crate::Resettable for SMCFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMAINTEN register accessor: an alias for `Reg`"] pub type DMAINTEN = crate::Reg; #[doc = "DMA/Interrupt enable register"] pub mod dmainten { #[doc = "Register `DMAINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMAINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TRGDEN` reader - Trigger DMA request enable"] pub struct TRGDEN_R(crate::FieldReader); impl TRGDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRGDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGDEN` writer - Trigger DMA request enable"] pub struct TRGDEN_W<'a> { w: &'a mut W, } impl<'a> TRGDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CMTDEN` reader - Reserved"] pub struct CMTDEN_R(crate::FieldReader); impl CMTDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMTDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMTDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMTDEN` writer - Reserved"] pub struct CMTDEN_W<'a> { w: &'a mut W, } impl<'a> CMTDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CH3DEN` reader - Capture/Compare 3 DMA request enable"] pub struct CH3DEN_R(crate::FieldReader); impl CH3DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3DEN` writer - Capture/Compare 3 DMA request enable"] pub struct CH3DEN_W<'a> { w: &'a mut W, } impl<'a> CH3DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CH2DEN` reader - Capture/Compare 2 DMA request enable"] pub struct CH2DEN_R(crate::FieldReader); impl CH2DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2DEN` writer - Capture/Compare 2 DMA request enable"] pub struct CH2DEN_W<'a> { w: &'a mut W, } impl<'a> CH2DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH1DEN` reader - Capture/Compare 1 DMA request enable"] pub struct CH1DEN_R(crate::FieldReader); impl CH1DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1DEN` writer - Capture/Compare 1 DMA request enable"] pub struct CH1DEN_W<'a> { w: &'a mut W, } impl<'a> CH1DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH0DEN` reader - Capture/Compare 0 DMA request enable"] pub struct CH0DEN_R(crate::FieldReader); impl CH0DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0DEN` writer - Capture/Compare 0 DMA request enable"] pub struct CH0DEN_W<'a> { w: &'a mut W, } impl<'a> CH0DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `UPDEN` reader - Update DMA request enable"] pub struct UPDEN_R(crate::FieldReader); impl UPDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDEN` writer - Update DMA request enable"] pub struct UPDEN_W<'a> { w: &'a mut W, } impl<'a> UPDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `BRKIE` reader - Break interrupt enable"] pub struct BRKIE_R(crate::FieldReader); impl BRKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKIE` writer - Break interrupt enable"] pub struct BRKIE_W<'a> { w: &'a mut W, } impl<'a> BRKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TRGIE` reader - Trigger interrupt enable"] pub struct TRGIE_R(crate::FieldReader); impl TRGIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRGIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGIE` writer - Trigger interrupt enable"] pub struct TRGIE_W<'a> { w: &'a mut W, } impl<'a> TRGIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CMTIE` reader - COM interrupt enable"] pub struct CMTIE_R(crate::FieldReader); impl CMTIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMTIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMTIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMTIE` writer - COM interrupt enable"] pub struct CMTIE_W<'a> { w: &'a mut W, } impl<'a> CMTIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH3IE` reader - Capture/Compare 3 interrupt enable"] pub struct CH3IE_R(crate::FieldReader); impl CH3IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3IE` writer - Capture/Compare 3 interrupt enable"] pub struct CH3IE_W<'a> { w: &'a mut W, } impl<'a> CH3IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CH2IE` reader - Capture/Compare 2 interrupt enable"] pub struct CH2IE_R(crate::FieldReader); impl CH2IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2IE` writer - Capture/Compare 2 interrupt enable"] pub struct CH2IE_W<'a> { w: &'a mut W, } impl<'a> CH2IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH1IE` reader - Capture/Compare 1 interrupt enable"] pub struct CH1IE_R(crate::FieldReader); impl CH1IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1IE` writer - Capture/Compare 1 interrupt enable"] pub struct CH1IE_W<'a> { w: &'a mut W, } impl<'a> CH1IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0IE` reader - Capture/Compare 0 interrupt enable"] pub struct CH0IE_R(crate::FieldReader); impl CH0IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0IE` writer - Capture/Compare 0 interrupt enable"] pub struct CH0IE_W<'a> { w: &'a mut W, } impl<'a> CH0IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPIE` reader - Update interrupt enable"] pub struct UPIE_R(crate::FieldReader); impl UPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIE` writer - Update interrupt enable"] pub struct UPIE_W<'a> { w: &'a mut W, } impl<'a> UPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 14 - Trigger DMA request enable"] #[inline(always)] pub fn trgden(&self) -> TRGDEN_R { TRGDEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Reserved"] #[inline(always)] pub fn cmtden(&self) -> CMTDEN_R { CMTDEN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Capture/Compare 3 DMA request enable"] #[inline(always)] pub fn ch3den(&self) -> CH3DEN_R { CH3DEN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Capture/Compare 2 DMA request enable"] #[inline(always)] pub fn ch2den(&self) -> CH2DEN_R { CH2DEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Capture/Compare 1 DMA request enable"] #[inline(always)] pub fn ch1den(&self) -> CH1DEN_R { CH1DEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Capture/Compare 0 DMA request enable"] #[inline(always)] pub fn ch0den(&self) -> CH0DEN_R { CH0DEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Update DMA request enable"] #[inline(always)] pub fn upden(&self) -> UPDEN_R { UPDEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Break interrupt enable"] #[inline(always)] pub fn brkie(&self) -> BRKIE_R { BRKIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Trigger interrupt enable"] #[inline(always)] pub fn trgie(&self) -> TRGIE_R { TRGIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - COM interrupt enable"] #[inline(always)] pub fn cmtie(&self) -> CMTIE_R { CMTIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Capture/Compare 3 interrupt enable"] #[inline(always)] pub fn ch3ie(&self) -> CH3IE_R { CH3IE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Capture/Compare 2 interrupt enable"] #[inline(always)] pub fn ch2ie(&self) -> CH2IE_R { CH2IE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Capture/Compare 1 interrupt enable"] #[inline(always)] pub fn ch1ie(&self) -> CH1IE_R { CH1IE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Capture/Compare 0 interrupt enable"] #[inline(always)] pub fn ch0ie(&self) -> CH0IE_R { CH0IE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&self) -> UPIE_R { UPIE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 14 - Trigger DMA request enable"] #[inline(always)] pub fn trgden(&mut self) -> TRGDEN_W { TRGDEN_W { w: self } } #[doc = "Bit 13 - Reserved"] #[inline(always)] pub fn cmtden(&mut self) -> CMTDEN_W { CMTDEN_W { w: self } } #[doc = "Bit 12 - Capture/Compare 3 DMA request enable"] #[inline(always)] pub fn ch3den(&mut self) -> CH3DEN_W { CH3DEN_W { w: self } } #[doc = "Bit 11 - Capture/Compare 2 DMA request enable"] #[inline(always)] pub fn ch2den(&mut self) -> CH2DEN_W { CH2DEN_W { w: self } } #[doc = "Bit 10 - Capture/Compare 1 DMA request enable"] #[inline(always)] pub fn ch1den(&mut self) -> CH1DEN_W { CH1DEN_W { w: self } } #[doc = "Bit 9 - Capture/Compare 0 DMA request enable"] #[inline(always)] pub fn ch0den(&mut self) -> CH0DEN_W { CH0DEN_W { w: self } } #[doc = "Bit 8 - Update DMA request enable"] #[inline(always)] pub fn upden(&mut self) -> UPDEN_W { UPDEN_W { w: self } } #[doc = "Bit 7 - Break interrupt enable"] #[inline(always)] pub fn brkie(&mut self) -> BRKIE_W { BRKIE_W { w: self } } #[doc = "Bit 6 - Trigger interrupt enable"] #[inline(always)] pub fn trgie(&mut self) -> TRGIE_W { TRGIE_W { w: self } } #[doc = "Bit 5 - COM interrupt enable"] #[inline(always)] pub fn cmtie(&mut self) -> CMTIE_W { CMTIE_W { w: self } } #[doc = "Bit 4 - Capture/Compare 3 interrupt enable"] #[inline(always)] pub fn ch3ie(&mut self) -> CH3IE_W { CH3IE_W { w: self } } #[doc = "Bit 3 - Capture/Compare 2 interrupt enable"] #[inline(always)] pub fn ch2ie(&mut self) -> CH2IE_W { CH2IE_W { w: self } } #[doc = "Bit 2 - Capture/Compare 1 interrupt enable"] #[inline(always)] pub fn ch1ie(&mut self) -> CH1IE_W { CH1IE_W { w: self } } #[doc = "Bit 1 - Capture/Compare 0 interrupt enable"] #[inline(always)] pub fn ch0ie(&mut self) -> CH0IE_W { CH0IE_W { w: self } } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&mut self) -> UPIE_W { UPIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmainten](index.html) module"] pub struct DMAINTEN_SPEC; impl crate::RegisterSpec for DMAINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmainten::R](R) reader structure"] impl crate::Readable for DMAINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmainten::W](W) writer structure"] impl crate::Writable for DMAINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMAINTEN to value 0"] impl crate::Resettable for DMAINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTF register accessor: an alias for `Reg`"] pub type INTF = crate::Reg; #[doc = "status register"] pub mod intf { #[doc = "Register `INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH3OF` reader - Channel 3 over capture flag"] pub struct CH3OF_R(crate::FieldReader); impl CH3OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3OF` writer - Channel 3 over capture flag"] pub struct CH3OF_W<'a> { w: &'a mut W, } impl<'a> CH3OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CH2OF` reader - Channel 2 over capture flag"] pub struct CH2OF_R(crate::FieldReader); impl CH2OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2OF` writer - Channel 2 over capture flag"] pub struct CH2OF_W<'a> { w: &'a mut W, } impl<'a> CH2OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH1OF` reader - Channel 1 over capture flag"] pub struct CH1OF_R(crate::FieldReader); impl CH1OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1OF` writer - Channel 1 over capture flag"] pub struct CH1OF_W<'a> { w: &'a mut W, } impl<'a> CH1OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH0OF` reader - Channel 0 over capture flag"] pub struct CH0OF_R(crate::FieldReader); impl CH0OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0OF` writer - Channel 0 over capture flag"] pub struct CH0OF_W<'a> { w: &'a mut W, } impl<'a> CH0OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `BRKIF` reader - Break interrupt flag"] pub struct BRKIF_R(crate::FieldReader); impl BRKIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKIF` writer - Break interrupt flag"] pub struct BRKIF_W<'a> { w: &'a mut W, } impl<'a> BRKIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TRGIF` reader - Trigger interrupt flag"] pub struct TRGIF_R(crate::FieldReader); impl TRGIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRGIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGIF` writer - Trigger interrupt flag"] pub struct TRGIF_W<'a> { w: &'a mut W, } impl<'a> TRGIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CMTIF` reader - COM interrupt flag"] pub struct CMTIF_R(crate::FieldReader); impl CMTIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMTIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMTIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMTIF` writer - COM interrupt flag"] pub struct CMTIF_W<'a> { w: &'a mut W, } impl<'a> CMTIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH3IF` reader - Capture/Compare 3 interrupt flag"] pub struct CH3IF_R(crate::FieldReader); impl CH3IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3IF` writer - Capture/Compare 3 interrupt flag"] pub struct CH3IF_W<'a> { w: &'a mut W, } impl<'a> CH3IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CH2IF` reader - Capture/Compare 2 interrupt flag"] pub struct CH2IF_R(crate::FieldReader); impl CH2IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2IF` writer - Capture/Compare 2 interrupt flag"] pub struct CH2IF_W<'a> { w: &'a mut W, } impl<'a> CH2IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH1IF` reader - Capture/Compare 1 interrupt flag"] pub struct CH1IF_R(crate::FieldReader); impl CH1IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1IF` writer - Capture/Compare 1 interrupt flag"] pub struct CH1IF_W<'a> { w: &'a mut W, } impl<'a> CH1IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0IF` reader - Capture/compare 0 interrupt flag"] pub struct CH0IF_R(crate::FieldReader); impl CH0IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0IF` writer - Capture/compare 0 interrupt flag"] pub struct CH0IF_W<'a> { w: &'a mut W, } impl<'a> CH0IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPIF` reader - Update interrupt flag"] pub struct UPIF_R(crate::FieldReader); impl UPIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIF` writer - Update interrupt flag"] pub struct UPIF_W<'a> { w: &'a mut W, } impl<'a> UPIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 12 - Channel 3 over capture flag"] #[inline(always)] pub fn ch3of(&self) -> CH3OF_R { CH3OF_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Channel 2 over capture flag"] #[inline(always)] pub fn ch2of(&self) -> CH2OF_R { CH2OF_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Channel 1 over capture flag"] #[inline(always)] pub fn ch1of(&self) -> CH1OF_R { CH1OF_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Channel 0 over capture flag"] #[inline(always)] pub fn ch0of(&self) -> CH0OF_R { CH0OF_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 7 - Break interrupt flag"] #[inline(always)] pub fn brkif(&self) -> BRKIF_R { BRKIF_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Trigger interrupt flag"] #[inline(always)] pub fn trgif(&self) -> TRGIF_R { TRGIF_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - COM interrupt flag"] #[inline(always)] pub fn cmtif(&self) -> CMTIF_R { CMTIF_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Capture/Compare 3 interrupt flag"] #[inline(always)] pub fn ch3if(&self) -> CH3IF_R { CH3IF_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Capture/Compare 2 interrupt flag"] #[inline(always)] pub fn ch2if(&self) -> CH2IF_R { CH2IF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Capture/Compare 1 interrupt flag"] #[inline(always)] pub fn ch1if(&self) -> CH1IF_R { CH1IF_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Capture/compare 0 interrupt flag"] #[inline(always)] pub fn ch0if(&self) -> CH0IF_R { CH0IF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&self) -> UPIF_R { UPIF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 12 - Channel 3 over capture flag"] #[inline(always)] pub fn ch3of(&mut self) -> CH3OF_W { CH3OF_W { w: self } } #[doc = "Bit 11 - Channel 2 over capture flag"] #[inline(always)] pub fn ch2of(&mut self) -> CH2OF_W { CH2OF_W { w: self } } #[doc = "Bit 10 - Channel 1 over capture flag"] #[inline(always)] pub fn ch1of(&mut self) -> CH1OF_W { CH1OF_W { w: self } } #[doc = "Bit 9 - Channel 0 over capture flag"] #[inline(always)] pub fn ch0of(&mut self) -> CH0OF_W { CH0OF_W { w: self } } #[doc = "Bit 7 - Break interrupt flag"] #[inline(always)] pub fn brkif(&mut self) -> BRKIF_W { BRKIF_W { w: self } } #[doc = "Bit 6 - Trigger interrupt flag"] #[inline(always)] pub fn trgif(&mut self) -> TRGIF_W { TRGIF_W { w: self } } #[doc = "Bit 5 - COM interrupt flag"] #[inline(always)] pub fn cmtif(&mut self) -> CMTIF_W { CMTIF_W { w: self } } #[doc = "Bit 4 - Capture/Compare 3 interrupt flag"] #[inline(always)] pub fn ch3if(&mut self) -> CH3IF_W { CH3IF_W { w: self } } #[doc = "Bit 3 - Capture/Compare 2 interrupt flag"] #[inline(always)] pub fn ch2if(&mut self) -> CH2IF_W { CH2IF_W { w: self } } #[doc = "Bit 2 - Capture/Compare 1 interrupt flag"] #[inline(always)] pub fn ch1if(&mut self) -> CH1IF_W { CH1IF_W { w: self } } #[doc = "Bit 1 - Capture/compare 0 interrupt flag"] #[inline(always)] pub fn ch0if(&mut self) -> CH0IF_W { CH0IF_W { w: self } } #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&mut self) -> UPIF_W { UPIF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intf](index.html) module"] pub struct INTF_SPEC; impl crate::RegisterSpec for INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [intf::R](R) reader structure"] impl crate::Readable for INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [intf::W](W) writer structure"] impl crate::Writable for INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTF to value 0"] impl crate::Resettable for INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SWEVG register accessor: an alias for `Reg`"] pub type SWEVG = crate::Reg; #[doc = "Software event generation register"] pub mod swevg { #[doc = "Register `SWEVG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BRKG` writer - Break event generation"] pub struct BRKG_W<'a> { w: &'a mut W, } impl<'a> BRKG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TRGG` writer - Trigger event generation"] pub struct TRGG_W<'a> { w: &'a mut W, } impl<'a> TRGG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CMTG` writer - Channel commutation event generation"] pub struct CMTG_W<'a> { w: &'a mut W, } impl<'a> CMTG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH3G` writer - Channel 3's capture or compare event generation"] pub struct CH3G_W<'a> { w: &'a mut W, } impl<'a> CH3G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CH2G` writer - Channel 2's capture or compare event generation"] pub struct CH2G_W<'a> { w: &'a mut W, } impl<'a> CH2G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH1G` writer - Channel 1's capture or compare event generation"] pub struct CH1G_W<'a> { w: &'a mut W, } impl<'a> CH1G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0G` writer - Channel 0's capture or compare event generation"] pub struct CH0G_W<'a> { w: &'a mut W, } impl<'a> CH0G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPG` writer - Update event generation"] pub struct UPG_W<'a> { w: &'a mut W, } impl<'a> UPG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 7 - Break event generation"] #[inline(always)] pub fn brkg(&mut self) -> BRKG_W { BRKG_W { w: self } } #[doc = "Bit 6 - Trigger event generation"] #[inline(always)] pub fn trgg(&mut self) -> TRGG_W { TRGG_W { w: self } } #[doc = "Bit 5 - Channel commutation event generation"] #[inline(always)] pub fn cmtg(&mut self) -> CMTG_W { CMTG_W { w: self } } #[doc = "Bit 4 - Channel 3's capture or compare event generation"] #[inline(always)] pub fn ch3g(&mut self) -> CH3G_W { CH3G_W { w: self } } #[doc = "Bit 3 - Channel 2's capture or compare event generation"] #[inline(always)] pub fn ch2g(&mut self) -> CH2G_W { CH2G_W { w: self } } #[doc = "Bit 2 - Channel 1's capture or compare event generation"] #[inline(always)] pub fn ch1g(&mut self) -> CH1G_W { CH1G_W { w: self } } #[doc = "Bit 1 - Channel 0's capture or compare event generation"] #[inline(always)] pub fn ch0g(&mut self) -> CH0G_W { CH0G_W { w: self } } #[doc = "Bit 0 - Update event generation"] #[inline(always)] pub fn upg(&mut self) -> UPG_W { UPG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Software event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swevg](index.html) module"] pub struct SWEVG_SPEC; impl crate::RegisterSpec for SWEVG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [swevg::W](W) writer structure"] impl crate::Writable for SWEVG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SWEVG to value 0"] impl crate::Resettable for SWEVG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL0_Output register accessor: an alias for `Reg`"] pub type CHCTL0_OUTPUT = crate::Reg; #[doc = "capture/compare mode register (output mode)"] pub mod chctl0_output { #[doc = "Register `CHCTL0_Output` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL0_Output` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1COMCEN` reader - Channel 1 output compare clear enable"] pub struct CH1COMCEN_R(crate::FieldReader); impl CH1COMCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1COMCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMCEN` writer - Channel 1 output compare clear enable"] pub struct CH1COMCEN_W<'a> { w: &'a mut W, } impl<'a> CH1COMCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `CH1COMCTL` reader - Channel 1 compare output control"] pub struct CH1COMCTL_R(crate::FieldReader); impl CH1COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMCTL` writer - Channel 1 compare output control"] pub struct CH1COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH1COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `CH1COMSEN` reader - Channel 1 output compare shadow enable"] pub struct CH1COMSEN_R(crate::FieldReader); impl CH1COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMSEN` writer - Channel 1 output compare shadow enable"] pub struct CH1COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH1COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH1COMFEN` reader - Channel 1 output compare fast enable"] pub struct CH1COMFEN_R(crate::FieldReader); impl CH1COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMFEN` writer - Channel 1 output compare fast enable"] pub struct CH1COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH1COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH1MS` reader - Channel 1 mode selection"] pub struct CH1MS_R(crate::FieldReader); impl CH1MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1MS` writer - Channel 1 mode selection"] pub struct CH1MS_W<'a> { w: &'a mut W, } impl<'a> CH1MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CH0COMCEN` reader - Channel 0 output compare clear enable"] pub struct CH0COMCEN_R(crate::FieldReader); impl CH0COMCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMCEN` writer - Channel 0 output compare clear enable"] pub struct CH0COMCEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CH0COMCTL` reader - Channel 0 compare output control"] pub struct CH0COMCTL_R(crate::FieldReader); impl CH0COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMCTL` writer - Channel 0 compare output control"] pub struct CH0COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH0COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `CH0COMSEN` reader - Channel 0 compare output shadow enable"] pub struct CH0COMSEN_R(crate::FieldReader); impl CH0COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMSEN` writer - Channel 0 compare output shadow enable"] pub struct CH0COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH0COMFEN` reader - Channel 0 output compare fast enable"] pub struct CH0COMFEN_R(crate::FieldReader); impl CH0COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMFEN` writer - Channel 0 output compare fast enable"] pub struct CH0COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0MS` reader - Channel 0 I/O mode selection"] pub struct CH0MS_R(crate::FieldReader); impl CH0MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0MS` writer - Channel 0 I/O mode selection"] pub struct CH0MS_W<'a> { w: &'a mut W, } impl<'a> CH0MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bit 15 - Channel 1 output compare clear enable"] #[inline(always)] pub fn ch1comcen(&self) -> CH1COMCEN_R { CH1COMCEN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 12:14 - Channel 1 compare output control"] #[inline(always)] pub fn ch1comctl(&self) -> CH1COMCTL_R { CH1COMCTL_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bit 11 - Channel 1 output compare shadow enable"] #[inline(always)] pub fn ch1comsen(&self) -> CH1COMSEN_R { CH1COMSEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Channel 1 output compare fast enable"] #[inline(always)] pub fn ch1comfen(&self) -> CH1COMFEN_R { CH1COMFEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 8:9 - Channel 1 mode selection"] #[inline(always)] pub fn ch1ms(&self) -> CH1MS_R { CH1MS_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Channel 0 output compare clear enable"] #[inline(always)] pub fn ch0comcen(&self) -> CH0COMCEN_R { CH0COMCEN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:6 - Channel 0 compare output control"] #[inline(always)] pub fn ch0comctl(&self) -> CH0COMCTL_R { CH0COMCTL_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - Channel 0 compare output shadow enable"] #[inline(always)] pub fn ch0comsen(&self) -> CH0COMSEN_R { CH0COMSEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Channel 0 output compare fast enable"] #[inline(always)] pub fn ch0comfen(&self) -> CH0COMFEN_R { CH0COMFEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bits 0:1 - Channel 0 I/O mode selection"] #[inline(always)] pub fn ch0ms(&self) -> CH0MS_R { CH0MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bit 15 - Channel 1 output compare clear enable"] #[inline(always)] pub fn ch1comcen(&mut self) -> CH1COMCEN_W { CH1COMCEN_W { w: self } } #[doc = "Bits 12:14 - Channel 1 compare output control"] #[inline(always)] pub fn ch1comctl(&mut self) -> CH1COMCTL_W { CH1COMCTL_W { w: self } } #[doc = "Bit 11 - Channel 1 output compare shadow enable"] #[inline(always)] pub fn ch1comsen(&mut self) -> CH1COMSEN_W { CH1COMSEN_W { w: self } } #[doc = "Bit 10 - Channel 1 output compare fast enable"] #[inline(always)] pub fn ch1comfen(&mut self) -> CH1COMFEN_W { CH1COMFEN_W { w: self } } #[doc = "Bits 8:9 - Channel 1 mode selection"] #[inline(always)] pub fn ch1ms(&mut self) -> CH1MS_W { CH1MS_W { w: self } } #[doc = "Bit 7 - Channel 0 output compare clear enable"] #[inline(always)] pub fn ch0comcen(&mut self) -> CH0COMCEN_W { CH0COMCEN_W { w: self } } #[doc = "Bits 4:6 - Channel 0 compare output control"] #[inline(always)] pub fn ch0comctl(&mut self) -> CH0COMCTL_W { CH0COMCTL_W { w: self } } #[doc = "Bit 3 - Channel 0 compare output shadow enable"] #[inline(always)] pub fn ch0comsen(&mut self) -> CH0COMSEN_W { CH0COMSEN_W { w: self } } #[doc = "Bit 2 - Channel 0 output compare fast enable"] #[inline(always)] pub fn ch0comfen(&mut self) -> CH0COMFEN_W { CH0COMFEN_W { w: self } } #[doc = "Bits 0:1 - Channel 0 I/O mode selection"] #[inline(always)] pub fn ch0ms(&mut self) -> CH0MS_W { CH0MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl0_output](index.html) module"] pub struct CHCTL0_OUTPUT_SPEC; impl crate::RegisterSpec for CHCTL0_OUTPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl0_output::R](R) reader structure"] impl crate::Readable for CHCTL0_OUTPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl0_output::W](W) writer structure"] impl crate::Writable for CHCTL0_OUTPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL0_Output to value 0"] impl crate::Resettable for CHCTL0_OUTPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL0_Input register accessor: an alias for `Reg`"] pub type CHCTL0_INPUT = crate::Reg; #[doc = "capture/compare mode register 0 (input mode)"] pub mod chctl0_input { #[doc = "Register `CHCTL0_Input` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL0_Input` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1CAPFLT` reader - Channel 1 input capture filter control"] pub struct CH1CAPFLT_R(crate::FieldReader); impl CH1CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1CAPFLT` writer - Channel 1 input capture filter control"] pub struct CH1CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH1CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `CH1CAPPSC` reader - Channel 1 input capture prescaler"] pub struct CH1CAPPSC_R(crate::FieldReader); impl CH1CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1CAPPSC` writer - Channel 1 input capture prescaler"] pub struct CH1CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH1CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `CH1MS` reader - Channel 1 mode selection"] pub struct CH1MS_R(crate::FieldReader); impl CH1MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1MS` writer - Channel 1 mode selection"] pub struct CH1MS_W<'a> { w: &'a mut W, } impl<'a> CH1MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CH0CAPFLT` reader - Channel 0 input capture filter control"] pub struct CH0CAPFLT_R(crate::FieldReader); impl CH0CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0CAPFLT` writer - Channel 0 input capture filter control"] pub struct CH0CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH0CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `CH0CAPPSC` reader - Channel 0 input capture prescaler"] pub struct CH0CAPPSC_R(crate::FieldReader); impl CH0CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0CAPPSC` writer - Channel 0 input capture prescaler"] pub struct CH0CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH0CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CH0MS` reader - Channel 0 mode selection"] pub struct CH0MS_R(crate::FieldReader); impl CH0MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0MS` writer - Channel 0 mode selection"] pub struct CH0MS_W<'a> { w: &'a mut W, } impl<'a> CH0MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 12:15 - Channel 1 input capture filter control"] #[inline(always)] pub fn ch1capflt(&self) -> CH1CAPFLT_R { CH1CAPFLT_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 10:11 - Channel 1 input capture prescaler"] #[inline(always)] pub fn ch1cappsc(&self) -> CH1CAPPSC_R { CH1CAPPSC_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Channel 1 mode selection"] #[inline(always)] pub fn ch1ms(&self) -> CH1MS_R { CH1MS_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 4:7 - Channel 0 input capture filter control"] #[inline(always)] pub fn ch0capflt(&self) -> CH0CAPFLT_R { CH0CAPFLT_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 2:3 - Channel 0 input capture prescaler"] #[inline(always)] pub fn ch0cappsc(&self) -> CH0CAPPSC_R { CH0CAPPSC_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Channel 0 mode selection"] #[inline(always)] pub fn ch0ms(&self) -> CH0MS_R { CH0MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 12:15 - Channel 1 input capture filter control"] #[inline(always)] pub fn ch1capflt(&mut self) -> CH1CAPFLT_W { CH1CAPFLT_W { w: self } } #[doc = "Bits 10:11 - Channel 1 input capture prescaler"] #[inline(always)] pub fn ch1cappsc(&mut self) -> CH1CAPPSC_W { CH1CAPPSC_W { w: self } } #[doc = "Bits 8:9 - Channel 1 mode selection"] #[inline(always)] pub fn ch1ms(&mut self) -> CH1MS_W { CH1MS_W { w: self } } #[doc = "Bits 4:7 - Channel 0 input capture filter control"] #[inline(always)] pub fn ch0capflt(&mut self) -> CH0CAPFLT_W { CH0CAPFLT_W { w: self } } #[doc = "Bits 2:3 - Channel 0 input capture prescaler"] #[inline(always)] pub fn ch0cappsc(&mut self) -> CH0CAPPSC_W { CH0CAPPSC_W { w: self } } #[doc = "Bits 0:1 - Channel 0 mode selection"] #[inline(always)] pub fn ch0ms(&mut self) -> CH0MS_W { CH0MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register 0 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl0_input](index.html) module"] pub struct CHCTL0_INPUT_SPEC; impl crate::RegisterSpec for CHCTL0_INPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl0_input::R](R) reader structure"] impl crate::Readable for CHCTL0_INPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl0_input::W](W) writer structure"] impl crate::Writable for CHCTL0_INPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL0_Input to value 0"] impl crate::Resettable for CHCTL0_INPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL1_Output register accessor: an alias for `Reg`"] pub type CHCTL1_OUTPUT = crate::Reg; #[doc = "capture/compare mode register (output mode)"] pub mod chctl1_output { #[doc = "Register `CHCTL1_Output` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL1_Output` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH3COMCEN` reader - Channel 3 output compare clear enable"] pub struct CH3COMCEN_R(crate::FieldReader); impl CH3COMCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3COMCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3COMCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3COMCEN` writer - Channel 3 output compare clear enable"] pub struct CH3COMCEN_W<'a> { w: &'a mut W, } impl<'a> CH3COMCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `CH3COMCTL` reader - Channel 3 compare output control"] pub struct CH3COMCTL_R(crate::FieldReader); impl CH3COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH3COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3COMCTL` writer - Channel 3 compare output control"] pub struct CH3COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH3COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `CH3COMSEN` reader - Channel 3 output compare shadow enable"] pub struct CH3COMSEN_R(crate::FieldReader); impl CH3COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3COMSEN` writer - Channel 3 output compare shadow enable"] pub struct CH3COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH3COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH3COMFEN` reader - Channel 3 output compare fast enable"] pub struct CH3COMFEN_R(crate::FieldReader); impl CH3COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3COMFEN` writer - Channel 3 output compare fast enable"] pub struct CH3COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH3COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH3MS` reader - Channel 3 mode selection"] pub struct CH3MS_R(crate::FieldReader); impl CH3MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH3MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3MS` writer - Channel 3 mode selection"] pub struct CH3MS_W<'a> { w: &'a mut W, } impl<'a> CH3MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CH2COMCEN` reader - Channel 2 output compare clear enable"] pub struct CH2COMCEN_R(crate::FieldReader); impl CH2COMCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2COMCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2COMCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2COMCEN` writer - Channel 2 output compare clear enable"] pub struct CH2COMCEN_W<'a> { w: &'a mut W, } impl<'a> CH2COMCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CH2COMCTL` reader - Channel 2 compare output control"] pub struct CH2COMCTL_R(crate::FieldReader); impl CH2COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH2COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2COMCTL` writer - Channel 2 compare output control"] pub struct CH2COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH2COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `CH2COMSEN` reader - Channel 2 compare output shadow enable"] pub struct CH2COMSEN_R(crate::FieldReader); impl CH2COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2COMSEN` writer - Channel 2 compare output shadow enable"] pub struct CH2COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH2COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH2COMFEN` reader - Channel 2 output compare fast enable"] pub struct CH2COMFEN_R(crate::FieldReader); impl CH2COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2COMFEN` writer - Channel 2 output compare fast enable"] pub struct CH2COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH2COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH2MS` reader - Channel 2 I/O mode selection"] pub struct CH2MS_R(crate::FieldReader); impl CH2MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH2MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2MS` writer - Channel 2 I/O mode selection"] pub struct CH2MS_W<'a> { w: &'a mut W, } impl<'a> CH2MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bit 15 - Channel 3 output compare clear enable"] #[inline(always)] pub fn ch3comcen(&self) -> CH3COMCEN_R { CH3COMCEN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 12:14 - Channel 3 compare output control"] #[inline(always)] pub fn ch3comctl(&self) -> CH3COMCTL_R { CH3COMCTL_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bit 11 - Channel 3 output compare shadow enable"] #[inline(always)] pub fn ch3comsen(&self) -> CH3COMSEN_R { CH3COMSEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Channel 3 output compare fast enable"] #[inline(always)] pub fn ch3comfen(&self) -> CH3COMFEN_R { CH3COMFEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 8:9 - Channel 3 mode selection"] #[inline(always)] pub fn ch3ms(&self) -> CH3MS_R { CH3MS_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Channel 2 output compare clear enable"] #[inline(always)] pub fn ch2comcen(&self) -> CH2COMCEN_R { CH2COMCEN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:6 - Channel 2 compare output control"] #[inline(always)] pub fn ch2comctl(&self) -> CH2COMCTL_R { CH2COMCTL_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - Channel 2 compare output shadow enable"] #[inline(always)] pub fn ch2comsen(&self) -> CH2COMSEN_R { CH2COMSEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Channel 2 output compare fast enable"] #[inline(always)] pub fn ch2comfen(&self) -> CH2COMFEN_R { CH2COMFEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bits 0:1 - Channel 2 I/O mode selection"] #[inline(always)] pub fn ch2ms(&self) -> CH2MS_R { CH2MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bit 15 - Channel 3 output compare clear enable"] #[inline(always)] pub fn ch3comcen(&mut self) -> CH3COMCEN_W { CH3COMCEN_W { w: self } } #[doc = "Bits 12:14 - Channel 3 compare output control"] #[inline(always)] pub fn ch3comctl(&mut self) -> CH3COMCTL_W { CH3COMCTL_W { w: self } } #[doc = "Bit 11 - Channel 3 output compare shadow enable"] #[inline(always)] pub fn ch3comsen(&mut self) -> CH3COMSEN_W { CH3COMSEN_W { w: self } } #[doc = "Bit 10 - Channel 3 output compare fast enable"] #[inline(always)] pub fn ch3comfen(&mut self) -> CH3COMFEN_W { CH3COMFEN_W { w: self } } #[doc = "Bits 8:9 - Channel 3 mode selection"] #[inline(always)] pub fn ch3ms(&mut self) -> CH3MS_W { CH3MS_W { w: self } } #[doc = "Bit 7 - Channel 2 output compare clear enable"] #[inline(always)] pub fn ch2comcen(&mut self) -> CH2COMCEN_W { CH2COMCEN_W { w: self } } #[doc = "Bits 4:6 - Channel 2 compare output control"] #[inline(always)] pub fn ch2comctl(&mut self) -> CH2COMCTL_W { CH2COMCTL_W { w: self } } #[doc = "Bit 3 - Channel 2 compare output shadow enable"] #[inline(always)] pub fn ch2comsen(&mut self) -> CH2COMSEN_W { CH2COMSEN_W { w: self } } #[doc = "Bit 2 - Channel 2 output compare fast enable"] #[inline(always)] pub fn ch2comfen(&mut self) -> CH2COMFEN_W { CH2COMFEN_W { w: self } } #[doc = "Bits 0:1 - Channel 2 I/O mode selection"] #[inline(always)] pub fn ch2ms(&mut self) -> CH2MS_W { CH2MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl1_output](index.html) module"] pub struct CHCTL1_OUTPUT_SPEC; impl crate::RegisterSpec for CHCTL1_OUTPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl1_output::R](R) reader structure"] impl crate::Readable for CHCTL1_OUTPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl1_output::W](W) writer structure"] impl crate::Writable for CHCTL1_OUTPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL1_Output to value 0"] impl crate::Resettable for CHCTL1_OUTPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL1_Input register accessor: an alias for `Reg`"] pub type CHCTL1_INPUT = crate::Reg; #[doc = "capture/compare mode register 1 (input mode)"] pub mod chctl1_input { #[doc = "Register `CHCTL1_Input` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL1_Input` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH3CAPFLT` reader - Channel 3 input capture filter control"] pub struct CH3CAPFLT_R(crate::FieldReader); impl CH3CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH3CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3CAPFLT` writer - Channel 3 input capture filter control"] pub struct CH3CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH3CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `CH3CAPPSC` reader - Channel 3 input capture prescaler"] pub struct CH3CAPPSC_R(crate::FieldReader); impl CH3CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH3CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3CAPPSC` writer - Channel 3 input capture prescaler"] pub struct CH3CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH3CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `CH3MS` reader - Channel 3 mode selection"] pub struct CH3MS_R(crate::FieldReader); impl CH3MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH3MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3MS` writer - Channel 3 mode selection"] pub struct CH3MS_W<'a> { w: &'a mut W, } impl<'a> CH3MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CH2CAPFLT` reader - Input capture 2 filter"] pub struct CH2CAPFLT_R(crate::FieldReader); impl CH2CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH2CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2CAPFLT` writer - Input capture 2 filter"] pub struct CH2CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH2CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `CH2CAPPSC` reader - Input capture 2 prescaler"] pub struct CH2CAPPSC_R(crate::FieldReader); impl CH2CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH2CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2CAPPSC` writer - Input capture 2 prescaler"] pub struct CH2CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH2CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CH2MS` reader - Capture/compare 2 selection"] pub struct CH2MS_R(crate::FieldReader); impl CH2MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH2MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2MS` writer - Capture/compare 2 selection"] pub struct CH2MS_W<'a> { w: &'a mut W, } impl<'a> CH2MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 12:15 - Channel 3 input capture filter control"] #[inline(always)] pub fn ch3capflt(&self) -> CH3CAPFLT_R { CH3CAPFLT_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 10:11 - Channel 3 input capture prescaler"] #[inline(always)] pub fn ch3cappsc(&self) -> CH3CAPPSC_R { CH3CAPPSC_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Channel 3 mode selection"] #[inline(always)] pub fn ch3ms(&self) -> CH3MS_R { CH3MS_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 4:7 - Input capture 2 filter"] #[inline(always)] pub fn ch2capflt(&self) -> CH2CAPFLT_R { CH2CAPFLT_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 2:3 - Input capture 2 prescaler"] #[inline(always)] pub fn ch2cappsc(&self) -> CH2CAPPSC_R { CH2CAPPSC_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Capture/compare 2 selection"] #[inline(always)] pub fn ch2ms(&self) -> CH2MS_R { CH2MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 12:15 - Channel 3 input capture filter control"] #[inline(always)] pub fn ch3capflt(&mut self) -> CH3CAPFLT_W { CH3CAPFLT_W { w: self } } #[doc = "Bits 10:11 - Channel 3 input capture prescaler"] #[inline(always)] pub fn ch3cappsc(&mut self) -> CH3CAPPSC_W { CH3CAPPSC_W { w: self } } #[doc = "Bits 8:9 - Channel 3 mode selection"] #[inline(always)] pub fn ch3ms(&mut self) -> CH3MS_W { CH3MS_W { w: self } } #[doc = "Bits 4:7 - Input capture 2 filter"] #[inline(always)] pub fn ch2capflt(&mut self) -> CH2CAPFLT_W { CH2CAPFLT_W { w: self } } #[doc = "Bits 2:3 - Input capture 2 prescaler"] #[inline(always)] pub fn ch2cappsc(&mut self) -> CH2CAPPSC_W { CH2CAPPSC_W { w: self } } #[doc = "Bits 0:1 - Capture/compare 2 selection"] #[inline(always)] pub fn ch2ms(&mut self) -> CH2MS_W { CH2MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl1_input](index.html) module"] pub struct CHCTL1_INPUT_SPEC; impl crate::RegisterSpec for CHCTL1_INPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl1_input::R](R) reader structure"] impl crate::Readable for CHCTL1_INPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl1_input::W](W) writer structure"] impl crate::Writable for CHCTL1_INPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL1_Input to value 0"] impl crate::Resettable for CHCTL1_INPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL2 register accessor: an alias for `Reg`"] pub type CHCTL2 = crate::Reg; #[doc = "capture/compare enable register"] pub mod chctl2 { #[doc = "Register `CHCTL2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH3P` reader - Capture/Compare 3 output Polarity"] pub struct CH3P_R(crate::FieldReader); impl CH3P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3P` writer - Capture/Compare 3 output Polarity"] pub struct CH3P_W<'a> { w: &'a mut W, } impl<'a> CH3P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CH3EN` reader - Capture/Compare 3 output enable"] pub struct CH3EN_R(crate::FieldReader); impl CH3EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3EN` writer - Capture/Compare 3 output enable"] pub struct CH3EN_W<'a> { w: &'a mut W, } impl<'a> CH3EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CH2NP` reader - Capture/Compare 2 output Polarity"] pub struct CH2NP_R(crate::FieldReader); impl CH2NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2NP` writer - Capture/Compare 2 output Polarity"] pub struct CH2NP_W<'a> { w: &'a mut W, } impl<'a> CH2NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH2NEN` reader - Capture/Compare 2 complementary output enable"] pub struct CH2NEN_R(crate::FieldReader); impl CH2NEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2NEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2NEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2NEN` writer - Capture/Compare 2 complementary output enable"] pub struct CH2NEN_W<'a> { w: &'a mut W, } impl<'a> CH2NEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH2P` reader - Capture/Compare 2 output Polarity"] pub struct CH2P_R(crate::FieldReader); impl CH2P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2P` writer - Capture/Compare 2 output Polarity"] pub struct CH2P_W<'a> { w: &'a mut W, } impl<'a> CH2P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CH2EN` reader - Capture/Compare 2 output enable"] pub struct CH2EN_R(crate::FieldReader); impl CH2EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2EN` writer - Capture/Compare 2 output enable"] pub struct CH2EN_W<'a> { w: &'a mut W, } impl<'a> CH2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CH1NP` reader - Capture/Compare 1 output Polarity"] pub struct CH1NP_R(crate::FieldReader); impl CH1NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1NP` writer - Capture/Compare 1 output Polarity"] pub struct CH1NP_W<'a> { w: &'a mut W, } impl<'a> CH1NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CH1NEN` reader - Capture/Compare 1 complementary output enable"] pub struct CH1NEN_R(crate::FieldReader); impl CH1NEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1NEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1NEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1NEN` writer - Capture/Compare 1 complementary output enable"] pub struct CH1NEN_W<'a> { w: &'a mut W, } impl<'a> CH1NEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CH1P` reader - Capture/Compare 1 output Polarity"] pub struct CH1P_R(crate::FieldReader); impl CH1P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1P` writer - Capture/Compare 1 output Polarity"] pub struct CH1P_W<'a> { w: &'a mut W, } impl<'a> CH1P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH1EN` reader - Capture/Compare 1 output enable"] pub struct CH1EN_R(crate::FieldReader); impl CH1EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1EN` writer - Capture/Compare 1 output enable"] pub struct CH1EN_W<'a> { w: &'a mut W, } impl<'a> CH1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CH0NP` reader - Capture/Compare 0 output Polarity"] pub struct CH0NP_R(crate::FieldReader); impl CH0NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0NP` writer - Capture/Compare 0 output Polarity"] pub struct CH0NP_W<'a> { w: &'a mut W, } impl<'a> CH0NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH0NEN` reader - Capture/Compare 0 complementary output enable"] pub struct CH0NEN_R(crate::FieldReader); impl CH0NEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0NEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0NEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0NEN` writer - Capture/Compare 0 complementary output enable"] pub struct CH0NEN_W<'a> { w: &'a mut W, } impl<'a> CH0NEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0P` reader - Capture/Compare 0 output Polarity"] pub struct CH0P_R(crate::FieldReader); impl CH0P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0P` writer - Capture/Compare 0 output Polarity"] pub struct CH0P_W<'a> { w: &'a mut W, } impl<'a> CH0P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CH0EN` reader - Capture/Compare 1 output enable"] pub struct CH0EN_R(crate::FieldReader); impl CH0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0EN` writer - Capture/Compare 1 output enable"] pub struct CH0EN_W<'a> { w: &'a mut W, } impl<'a> CH0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 13 - Capture/Compare 3 output Polarity"] #[inline(always)] pub fn ch3p(&self) -> CH3P_R { CH3P_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Capture/Compare 3 output enable"] #[inline(always)] pub fn ch3en(&self) -> CH3EN_R { CH3EN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Capture/Compare 2 output Polarity"] #[inline(always)] pub fn ch2np(&self) -> CH2NP_R { CH2NP_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Capture/Compare 2 complementary output enable"] #[inline(always)] pub fn ch2nen(&self) -> CH2NEN_R { CH2NEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Capture/Compare 2 output Polarity"] #[inline(always)] pub fn ch2p(&self) -> CH2P_R { CH2P_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Capture/Compare 2 output enable"] #[inline(always)] pub fn ch2en(&self) -> CH2EN_R { CH2EN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1np(&self) -> CH1NP_R { CH1NP_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Capture/Compare 1 complementary output enable"] #[inline(always)] pub fn ch1nen(&self) -> CH1NEN_R { CH1NEN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1p(&self) -> CH1P_R { CH1P_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Capture/Compare 1 output enable"] #[inline(always)] pub fn ch1en(&self) -> CH1EN_R { CH1EN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0np(&self) -> CH0NP_R { CH0NP_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Capture/Compare 0 complementary output enable"] #[inline(always)] pub fn ch0nen(&self) -> CH0NEN_R { CH0NEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0p(&self) -> CH0P_R { CH0P_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Capture/Compare 1 output enable"] #[inline(always)] pub fn ch0en(&self) -> CH0EN_R { CH0EN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 13 - Capture/Compare 3 output Polarity"] #[inline(always)] pub fn ch3p(&mut self) -> CH3P_W { CH3P_W { w: self } } #[doc = "Bit 12 - Capture/Compare 3 output enable"] #[inline(always)] pub fn ch3en(&mut self) -> CH3EN_W { CH3EN_W { w: self } } #[doc = "Bit 11 - Capture/Compare 2 output Polarity"] #[inline(always)] pub fn ch2np(&mut self) -> CH2NP_W { CH2NP_W { w: self } } #[doc = "Bit 10 - Capture/Compare 2 complementary output enable"] #[inline(always)] pub fn ch2nen(&mut self) -> CH2NEN_W { CH2NEN_W { w: self } } #[doc = "Bit 9 - Capture/Compare 2 output Polarity"] #[inline(always)] pub fn ch2p(&mut self) -> CH2P_W { CH2P_W { w: self } } #[doc = "Bit 8 - Capture/Compare 2 output enable"] #[inline(always)] pub fn ch2en(&mut self) -> CH2EN_W { CH2EN_W { w: self } } #[doc = "Bit 7 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1np(&mut self) -> CH1NP_W { CH1NP_W { w: self } } #[doc = "Bit 6 - Capture/Compare 1 complementary output enable"] #[inline(always)] pub fn ch1nen(&mut self) -> CH1NEN_W { CH1NEN_W { w: self } } #[doc = "Bit 5 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1p(&mut self) -> CH1P_W { CH1P_W { w: self } } #[doc = "Bit 4 - Capture/Compare 1 output enable"] #[inline(always)] pub fn ch1en(&mut self) -> CH1EN_W { CH1EN_W { w: self } } #[doc = "Bit 3 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0np(&mut self) -> CH0NP_W { CH0NP_W { w: self } } #[doc = "Bit 2 - Capture/Compare 0 complementary output enable"] #[inline(always)] pub fn ch0nen(&mut self) -> CH0NEN_W { CH0NEN_W { w: self } } #[doc = "Bit 1 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0p(&mut self) -> CH0P_W { CH0P_W { w: self } } #[doc = "Bit 0 - Capture/Compare 1 output enable"] #[inline(always)] pub fn ch0en(&mut self) -> CH0EN_W { CH0EN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl2](index.html) module"] pub struct CHCTL2_SPEC; impl crate::RegisterSpec for CHCTL2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl2::R](R) reader structure"] impl crate::Readable for CHCTL2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl2::W](W) writer structure"] impl crate::Writable for CHCTL2_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL2 to value 0"] impl crate::Resettable for CHCTL2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CNT register accessor: an alias for `Reg`"] pub type CNT = crate::Reg; #[doc = "counter"] pub mod cnt { #[doc = "Register `CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - counter value"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - counter value"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - counter value"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - counter value"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] pub struct CNT_SPEC; impl crate::RegisterSpec for CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cnt::R](R) reader structure"] impl crate::Readable for CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] impl crate::Writable for CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CNT to value 0"] impl crate::Resettable for CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PSC register accessor: an alias for `Reg`"] pub type PSC = crate::Reg; #[doc = "prescaler"] pub mod psc { #[doc = "Register `PSC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PSC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PSC` reader - Prescaler value"] pub struct PSC_R(crate::FieldReader); impl PSC_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSC` writer - Prescaler value"] pub struct PSC_W<'a> { w: &'a mut W, } impl<'a> PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&self) -> PSC_R { PSC_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&mut self) -> PSC_W { PSC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](index.html) module"] pub struct PSC_SPEC; impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [psc::R](R) reader structure"] impl crate::Readable for PSC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [psc::W](W) writer structure"] impl crate::Writable for PSC_SPEC { type Writer = W; } #[doc = "`reset()` method sets PSC to value 0"] impl crate::Resettable for PSC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CAR register accessor: an alias for `Reg`"] pub type CAR = crate::Reg; #[doc = "auto-reload register"] pub mod car { #[doc = "Register `CAR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CAR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CARL` reader - Counter auto reload value"] pub struct CARL_R(crate::FieldReader); impl CARL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CARL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CARL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CARL` writer - Counter auto reload value"] pub struct CARL_W<'a> { w: &'a mut W, } impl<'a> CARL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Counter auto reload value"] #[inline(always)] pub fn carl(&self) -> CARL_R { CARL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Counter auto reload value"] #[inline(always)] pub fn carl(&mut self) -> CARL_W { CARL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [car](index.html) module"] pub struct CAR_SPEC; impl crate::RegisterSpec for CAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [car::R](R) reader structure"] impl crate::Readable for CAR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [car::W](W) writer structure"] impl crate::Writable for CAR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CAR to value 0"] impl crate::Resettable for CAR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CREP register accessor: an alias for `Reg`"] pub type CREP = crate::Reg; #[doc = "repetition counter register"] pub mod crep { #[doc = "Register `CREP` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CREP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CREP` reader - Repetition counter value"] pub struct CREP_R(crate::FieldReader); impl CREP_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CREP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CREP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CREP` writer - Repetition counter value"] pub struct CREP_W<'a> { w: &'a mut W, } impl<'a> CREP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bits 0:7 - Repetition counter value"] #[inline(always)] pub fn crep(&self) -> CREP_R { CREP_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Repetition counter value"] #[inline(always)] pub fn crep(&mut self) -> CREP_W { CREP_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "repetition counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [crep](index.html) module"] pub struct CREP_SPEC; impl crate::RegisterSpec for CREP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [crep::R](R) reader structure"] impl crate::Readable for CREP_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [crep::W](W) writer structure"] impl crate::Writable for CREP_SPEC { type Writer = W; } #[doc = "`reset()` method sets CREP to value 0"] impl crate::Resettable for CREP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH0CV register accessor: an alias for `Reg`"] pub type CH0CV = crate::Reg; #[doc = "capture/compare register 0"] pub mod ch0cv { #[doc = "Register `CH0CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH0CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0VAL` reader - Capture/Compare 0 value"] pub struct CH0VAL_R(crate::FieldReader); impl CH0VAL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CH0VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0VAL` writer - Capture/Compare 0 value"] pub struct CH0VAL_W<'a> { w: &'a mut W, } impl<'a> CH0VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Capture/Compare 0 value"] #[inline(always)] pub fn ch0val(&self) -> CH0VAL_R { CH0VAL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Capture/Compare 0 value"] #[inline(always)] pub fn ch0val(&mut self) -> CH0VAL_W { CH0VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0cv](index.html) module"] pub struct CH0CV_SPEC; impl crate::RegisterSpec for CH0CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch0cv::R](R) reader structure"] impl crate::Readable for CH0CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch0cv::W](W) writer structure"] impl crate::Writable for CH0CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH0CV to value 0"] impl crate::Resettable for CH0CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH1CV register accessor: an alias for `Reg`"] pub type CH1CV = crate::Reg; #[doc = "capture/compare register 1"] pub mod ch1cv { #[doc = "Register `CH1CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH1CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1VAL` reader - Capture/Compare 1 value"] pub struct CH1VAL_R(crate::FieldReader); impl CH1VAL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CH1VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1VAL` writer - Capture/Compare 1 value"] pub struct CH1VAL_W<'a> { w: &'a mut W, } impl<'a> CH1VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Capture/Compare 1 value"] #[inline(always)] pub fn ch1val(&self) -> CH1VAL_R { CH1VAL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Capture/Compare 1 value"] #[inline(always)] pub fn ch1val(&mut self) -> CH1VAL_W { CH1VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1cv](index.html) module"] pub struct CH1CV_SPEC; impl crate::RegisterSpec for CH1CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch1cv::R](R) reader structure"] impl crate::Readable for CH1CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch1cv::W](W) writer structure"] impl crate::Writable for CH1CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH1CV to value 0"] impl crate::Resettable for CH1CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH2CV register accessor: an alias for `Reg`"] pub type CH2CV = crate::Reg; #[doc = "capture/compare register 2"] pub mod ch2cv { #[doc = "Register `CH2CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH2CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH2VAL` reader - Capture/Compare 2 value"] pub struct CH2VAL_R(crate::FieldReader); impl CH2VAL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CH2VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2VAL` writer - Capture/Compare 2 value"] pub struct CH2VAL_W<'a> { w: &'a mut W, } impl<'a> CH2VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Capture/Compare 2 value"] #[inline(always)] pub fn ch2val(&self) -> CH2VAL_R { CH2VAL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Capture/Compare 2 value"] #[inline(always)] pub fn ch2val(&mut self) -> CH2VAL_W { CH2VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2cv](index.html) module"] pub struct CH2CV_SPEC; impl crate::RegisterSpec for CH2CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch2cv::R](R) reader structure"] impl crate::Readable for CH2CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch2cv::W](W) writer structure"] impl crate::Writable for CH2CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH2CV to value 0"] impl crate::Resettable for CH2CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH3CV register accessor: an alias for `Reg`"] pub type CH3CV = crate::Reg; #[doc = "capture/compare register 3"] pub mod ch3cv { #[doc = "Register `CH3CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH3CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH3VAL` reader - Capture/Compare 3 value"] pub struct CH3VAL_R(crate::FieldReader); impl CH3VAL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CH3VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3VAL` writer - Capture/Compare 3 value"] pub struct CH3VAL_W<'a> { w: &'a mut W, } impl<'a> CH3VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Capture/Compare 3 value"] #[inline(always)] pub fn ch3val(&self) -> CH3VAL_R { CH3VAL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Capture/Compare 3 value"] #[inline(always)] pub fn ch3val(&mut self) -> CH3VAL_W { CH3VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3cv](index.html) module"] pub struct CH3CV_SPEC; impl crate::RegisterSpec for CH3CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch3cv::R](R) reader structure"] impl crate::Readable for CH3CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch3cv::W](W) writer structure"] impl crate::Writable for CH3CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH3CV to value 0"] impl crate::Resettable for CH3CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CCHP register accessor: an alias for `Reg`"] pub type CCHP = crate::Reg; #[doc = "channel complementary protection register"] pub mod cchp { #[doc = "Register `CCHP` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CCHP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `POEN` reader - Main output enable"] pub struct POEN_R(crate::FieldReader); impl POEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { POEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for POEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `POEN` writer - Main output enable"] pub struct POEN_W<'a> { w: &'a mut W, } impl<'a> POEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OAEN` reader - Automatic output enable"] pub struct OAEN_R(crate::FieldReader); impl OAEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OAEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OAEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OAEN` writer - Automatic output enable"] pub struct OAEN_W<'a> { w: &'a mut W, } impl<'a> OAEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `BRKP` reader - Break polarity"] pub struct BRKP_R(crate::FieldReader); impl BRKP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKP` writer - Break polarity"] pub struct BRKP_W<'a> { w: &'a mut W, } impl<'a> BRKP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `BRKEN` reader - Break enable"] pub struct BRKEN_R(crate::FieldReader); impl BRKEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKEN` writer - Break enable"] pub struct BRKEN_W<'a> { w: &'a mut W, } impl<'a> BRKEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `ROS` reader - Off-state selection for Run mode"] pub struct ROS_R(crate::FieldReader); impl ROS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ROS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ROS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ROS` writer - Off-state selection for Run mode"] pub struct ROS_W<'a> { w: &'a mut W, } impl<'a> ROS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `IOS` reader - Off-state selection for Idle mode"] pub struct IOS_R(crate::FieldReader); impl IOS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IOS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IOS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IOS` writer - Off-state selection for Idle mode"] pub struct IOS_W<'a> { w: &'a mut W, } impl<'a> IOS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `PROT` reader - Lock configuration"] pub struct PROT_R(crate::FieldReader); impl PROT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PROT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PROT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PROT` writer - Lock configuration"] pub struct PROT_W<'a> { w: &'a mut W, } impl<'a> PROT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `DTCFG` reader - Dead-time generator setup"] pub struct DTCFG_R(crate::FieldReader); impl DTCFG_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DTCFG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTCFG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTCFG` writer - Dead-time generator setup"] pub struct DTCFG_W<'a> { w: &'a mut W, } impl<'a> DTCFG_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bit 15 - Main output enable"] #[inline(always)] pub fn poen(&self) -> POEN_R { POEN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Automatic output enable"] #[inline(always)] pub fn oaen(&self) -> OAEN_R { OAEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Break polarity"] #[inline(always)] pub fn brkp(&self) -> BRKP_R { BRKP_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Break enable"] #[inline(always)] pub fn brken(&self) -> BRKEN_R { BRKEN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Off-state selection for Run mode"] #[inline(always)] pub fn ros(&self) -> ROS_R { ROS_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Off-state selection for Idle mode"] #[inline(always)] pub fn ios(&self) -> IOS_R { IOS_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 8:9 - Lock configuration"] #[inline(always)] pub fn prot(&self) -> PROT_R { PROT_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 0:7 - Dead-time generator setup"] #[inline(always)] pub fn dtcfg(&self) -> DTCFG_R { DTCFG_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bit 15 - Main output enable"] #[inline(always)] pub fn poen(&mut self) -> POEN_W { POEN_W { w: self } } #[doc = "Bit 14 - Automatic output enable"] #[inline(always)] pub fn oaen(&mut self) -> OAEN_W { OAEN_W { w: self } } #[doc = "Bit 13 - Break polarity"] #[inline(always)] pub fn brkp(&mut self) -> BRKP_W { BRKP_W { w: self } } #[doc = "Bit 12 - Break enable"] #[inline(always)] pub fn brken(&mut self) -> BRKEN_W { BRKEN_W { w: self } } #[doc = "Bit 11 - Off-state selection for Run mode"] #[inline(always)] pub fn ros(&mut self) -> ROS_W { ROS_W { w: self } } #[doc = "Bit 10 - Off-state selection for Idle mode"] #[inline(always)] pub fn ios(&mut self) -> IOS_W { IOS_W { w: self } } #[doc = "Bits 8:9 - Lock configuration"] #[inline(always)] pub fn prot(&mut self) -> PROT_W { PROT_W { w: self } } #[doc = "Bits 0:7 - Dead-time generator setup"] #[inline(always)] pub fn dtcfg(&mut self) -> DTCFG_W { DTCFG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "channel complementary protection register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cchp](index.html) module"] pub struct CCHP_SPEC; impl crate::RegisterSpec for CCHP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cchp::R](R) reader structure"] impl crate::Readable for CCHP_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cchp::W](W) writer structure"] impl crate::Writable for CCHP_SPEC { type Writer = W; } #[doc = "`reset()` method sets CCHP to value 0"] impl crate::Resettable for CCHP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMACFG register accessor: an alias for `Reg`"] pub type DMACFG = crate::Reg; #[doc = "DMA configuration register"] pub mod dmacfg { #[doc = "Register `DMACFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMACFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DMATC` reader - DMA transfer count"] pub struct DMATC_R(crate::FieldReader); impl DMATC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DMATC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATC` writer - DMA transfer count"] pub struct DMATC_W<'a> { w: &'a mut W, } impl<'a> DMATC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 8)) | ((value as u32 & 0x1f) << 8); self.w } } #[doc = "Field `DMATA` reader - DMA transfer access start address"] pub struct DMATA_R(crate::FieldReader); impl DMATA_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DMATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATA` writer - DMA transfer access start address"] pub struct DMATA_W<'a> { w: &'a mut W, } impl<'a> DMATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); self.w } } impl R { #[doc = "Bits 8:12 - DMA transfer count"] #[inline(always)] pub fn dmatc(&self) -> DMATC_R { DMATC_R::new(((self.bits >> 8) & 0x1f) as u8) } #[doc = "Bits 0:4 - DMA transfer access start address"] #[inline(always)] pub fn dmata(&self) -> DMATA_R { DMATA_R::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 8:12 - DMA transfer count"] #[inline(always)] pub fn dmatc(&mut self) -> DMATC_W { DMATC_W { w: self } } #[doc = "Bits 0:4 - DMA transfer access start address"] #[inline(always)] pub fn dmata(&mut self) -> DMATA_W { DMATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmacfg](index.html) module"] pub struct DMACFG_SPEC; impl crate::RegisterSpec for DMACFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmacfg::R](R) reader structure"] impl crate::Readable for DMACFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmacfg::W](W) writer structure"] impl crate::Writable for DMACFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMACFG to value 0"] impl crate::Resettable for DMACFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMATB register accessor: an alias for `Reg`"] pub type DMATB = crate::Reg; #[doc = "DMA address for full transfer"] pub mod dmatb { #[doc = "Register `DMATB` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMATB` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DMATB` reader - DMA register for burst accesses"] pub struct DMATB_R(crate::FieldReader); impl DMATB_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { DMATB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATB` writer - DMA register for burst accesses"] pub struct DMATB_W<'a> { w: &'a mut W, } impl<'a> DMATB_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - DMA register for burst accesses"] #[inline(always)] pub fn dmatb(&self) -> DMATB_R { DMATB_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - DMA register for burst accesses"] #[inline(always)] pub fn dmatb(&mut self) -> DMATB_W { DMATB_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA address for full transfer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmatb](index.html) module"] pub struct DMATB_SPEC; impl crate::RegisterSpec for DMATB_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmatb::R](R) reader structure"] impl crate::Readable for DMATB_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmatb::W](W) writer structure"] impl crate::Writable for DMATB_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMATB to value 0"] impl crate::Resettable for DMATB_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CFG register accessor: an alias for `Reg`"] pub type CFG = crate::Reg; #[doc = "Configuration register"] pub mod cfg { #[doc = "Register `CFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHVSEL` reader - Write CHxVAL register selection"] pub struct CHVSEL_R(crate::FieldReader); impl CHVSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHVSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHVSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHVSEL` writer - Write CHxVAL register selection"] pub struct CHVSEL_W<'a> { w: &'a mut W, } impl<'a> CHVSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OUTSEL` reader - The output value selection"] pub struct OUTSEL_R(crate::FieldReader); impl OUTSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OUTSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OUTSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OUTSEL` writer - The output value selection"] pub struct OUTSEL_W<'a> { w: &'a mut W, } impl<'a> OUTSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 1 - Write CHxVAL register selection"] #[inline(always)] pub fn chvsel(&self) -> CHVSEL_R { CHVSEL_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - The output value selection"] #[inline(always)] pub fn outsel(&self) -> OUTSEL_R { OUTSEL_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Write CHxVAL register selection"] #[inline(always)] pub fn chvsel(&mut self) -> CHVSEL_W { CHVSEL_W { w: self } } #[doc = "Bit 0 - The output value selection"] #[inline(always)] pub fn outsel(&mut self) -> OUTSEL_W { OUTSEL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFG_SPEC; impl crate::RegisterSpec for CFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg::R](R) reader structure"] impl crate::Readable for CFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] impl crate::Writable for CFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG to value 0"] impl crate::Resettable for CFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose-timers"] pub struct TIMER1 { _marker: PhantomData<*const ()>, } unsafe impl Send for TIMER1 {} impl TIMER1 { #[doc = r"Pointer to the register block"] pub const PTR: *const timer1::RegisterBlock = 0x4000_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const timer1::RegisterBlock { Self::PTR } } impl Deref for TIMER1 { type Target = timer1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for TIMER1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("TIMER1").finish() } } #[doc = "General-purpose-timers"] pub mod timer1 { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register 0"] pub ctl0: crate::Reg, #[doc = "0x04 - control register 1"] pub ctl1: crate::Reg, #[doc = "0x08 - slave mode control register"] pub smcfg: crate::Reg, #[doc = "0x0c - DMA/Interrupt enable register"] pub dmainten: crate::Reg, #[doc = "0x10 - interrupt flag register"] pub intf: crate::Reg, #[doc = "0x14 - event generation register"] pub swevg: crate::Reg, _reserved_6_chctl0: [u8; 0x04], _reserved_7_chctl1: [u8; 0x04], #[doc = "0x20 - capture/compare enable register"] pub chctl2: crate::Reg, #[doc = "0x24 - counter"] pub cnt: crate::Reg, #[doc = "0x28 - prescaler"] pub psc: crate::Reg, #[doc = "0x2c - auto-reload register"] pub car: crate::Reg, _reserved12: [u8; 0x04], #[doc = "0x34 - capture/compare register 1"] pub ch0cv: crate::Reg, #[doc = "0x38 - capture/compare register 2"] pub ch1cv: crate::Reg, #[doc = "0x3c - capture/compare register 2"] pub ch2cv: crate::Reg, #[doc = "0x40 - capture/compare register 3"] pub ch3cv: crate::Reg, _reserved16: [u8; 0x04], #[doc = "0x48 - DMA control register"] pub dmacfg: crate::Reg, #[doc = "0x4c - DMA address for full transfer"] pub dmatb: crate::Reg, _reserved18: [u8; 0xac], #[doc = "0xfc - Configuration"] pub cfg: crate::Reg, } impl RegisterBlock { #[doc = "0x18 - capture/compare mode register 0 (input mode)"] #[inline(always)] pub fn chctl0_input(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const crate::Reg) } } #[doc = "0x18 - capture/compare mode register 0 (output mode)"] #[inline(always)] pub fn chctl0_output(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const crate::Reg) } } #[doc = "0x1c - capture/compare mode register 1 (input mode)"] #[inline(always)] pub fn chctl1_input(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const crate::Reg) } } #[doc = "0x1c - capture/compare mode register 1 (output mode)"] #[inline(always)] pub fn chctl1_output(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const crate::Reg) } } } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "control register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CKDIV` reader - Clock division"] pub struct CKDIV_R(crate::FieldReader); impl CKDIV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CKDIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKDIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKDIV` writer - Clock division"] pub struct CKDIV_W<'a> { w: &'a mut W, } impl<'a> CKDIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `ARSE` reader - Auto-reload preload enable"] pub struct ARSE_R(crate::FieldReader); impl ARSE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ARSE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ARSE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ARSE` writer - Auto-reload preload enable"] pub struct ARSE_W<'a> { w: &'a mut W, } impl<'a> ARSE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CAM` reader - Center-aligned mode selection"] pub struct CAM_R(crate::FieldReader); impl CAM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CAM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CAM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CAM` writer - Center-aligned mode selection"] pub struct CAM_W<'a> { w: &'a mut W, } impl<'a> CAM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 5)) | ((value as u32 & 0x03) << 5); self.w } } #[doc = "Field `DIR` reader - Direction"] pub struct DIR_R(crate::FieldReader); impl DIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DIR` writer - Direction"] pub struct DIR_W<'a> { w: &'a mut W, } impl<'a> DIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `SPM` reader - One-pulse mode"] pub struct SPM_R(crate::FieldReader); impl SPM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPM` writer - One-pulse mode"] pub struct SPM_W<'a> { w: &'a mut W, } impl<'a> SPM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `UPS` reader - Update request source"] pub struct UPS_R(crate::FieldReader); impl UPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPS` writer - Update request source"] pub struct UPS_W<'a> { w: &'a mut W, } impl<'a> UPS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `UPDIS` reader - Update disable"] pub struct UPDIS_R(crate::FieldReader); impl UPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDIS` writer - Update disable"] pub struct UPDIS_W<'a> { w: &'a mut W, } impl<'a> UPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CEN` reader - Counter enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Counter enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckdiv(&self) -> CKDIV_R { CKDIV_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&self) -> ARSE_R { ARSE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 5:6 - Center-aligned mode selection"] #[inline(always)] pub fn cam(&self) -> CAM_R { CAM_R::new(((self.bits >> 5) & 0x03) as u8) } #[doc = "Bit 4 - Direction"] #[inline(always)] pub fn dir(&self) -> DIR_R { DIR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn spm(&self) -> SPM_R { SPM_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&self) -> UPS_R { UPS_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&self) -> UPDIS_R { UPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckdiv(&mut self) -> CKDIV_W { CKDIV_W { w: self } } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&mut self) -> ARSE_W { ARSE_W { w: self } } #[doc = "Bits 5:6 - Center-aligned mode selection"] #[inline(always)] pub fn cam(&mut self) -> CAM_W { CAM_W { w: self } } #[doc = "Bit 4 - Direction"] #[inline(always)] pub fn dir(&mut self) -> DIR_W { DIR_W { w: self } } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn spm(&mut self) -> SPM_W { SPM_W { w: self } } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&mut self) -> UPS_W { UPS_W { w: self } } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&mut self) -> UPDIS_W { UPDIS_W { w: self } } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TI0S` reader - TI0 selection"] pub struct TI0S_R(crate::FieldReader); impl TI0S_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TI0S_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TI0S_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TI0S` writer - TI0 selection"] pub struct TI0S_W<'a> { w: &'a mut W, } impl<'a> TI0S_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `MMC` reader - Master mode selection"] pub struct MMC_R(crate::FieldReader); impl MMC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MMC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MMC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MMC` writer - Master mode selection"] pub struct MMC_W<'a> { w: &'a mut W, } impl<'a> MMC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `DMAS` reader - Capture/compare DMA selection"] pub struct DMAS_R(crate::FieldReader); impl DMAS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DMAS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMAS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMAS` writer - Capture/compare DMA selection"] pub struct DMAS_W<'a> { w: &'a mut W, } impl<'a> DMAS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } impl R { #[doc = "Bit 7 - TI0 selection"] #[inline(always)] pub fn ti0s(&self) -> TI0S_R { TI0S_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:6 - Master mode selection"] #[inline(always)] pub fn mmc(&self) -> MMC_R { MMC_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - Capture/compare DMA selection"] #[inline(always)] pub fn dmas(&self) -> DMAS_R { DMAS_R::new(((self.bits >> 3) & 0x01) != 0) } } impl W { #[doc = "Bit 7 - TI0 selection"] #[inline(always)] pub fn ti0s(&mut self) -> TI0S_W { TI0S_W { w: self } } #[doc = "Bits 4:6 - Master mode selection"] #[inline(always)] pub fn mmc(&mut self) -> MMC_W { MMC_W { w: self } } #[doc = "Bit 3 - Capture/compare DMA selection"] #[inline(always)] pub fn dmas(&mut self) -> DMAS_W { DMAS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SMCFG register accessor: an alias for `Reg`"] pub type SMCFG = crate::Reg; #[doc = "slave mode control register"] pub mod smcfg { #[doc = "Register `SMCFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `SMCFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ETP` reader - External trigger polarity"] pub struct ETP_R(crate::FieldReader); impl ETP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ETP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ETP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ETP` writer - External trigger polarity"] pub struct ETP_W<'a> { w: &'a mut W, } impl<'a> ETP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `SMC1` reader - External clock enable"] pub struct SMC1_R(crate::FieldReader); impl SMC1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SMC1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SMC1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SMC1` writer - External clock enable"] pub struct SMC1_W<'a> { w: &'a mut W, } impl<'a> SMC1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `ETPSC` reader - External trigger prescaler"] pub struct ETPSC_R(crate::FieldReader); impl ETPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ETPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ETPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ETPSC` writer - External trigger prescaler"] pub struct ETPSC_W<'a> { w: &'a mut W, } impl<'a> ETPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `ETFC` reader - External trigger filter"] pub struct ETFC_R(crate::FieldReader); impl ETFC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ETFC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ETFC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ETFC` writer - External trigger filter"] pub struct ETFC_W<'a> { w: &'a mut W, } impl<'a> ETFC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 8)) | ((value as u32 & 0x0f) << 8); self.w } } #[doc = "Field `MSM` reader - Master/Slave mode"] pub struct MSM_R(crate::FieldReader); impl MSM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MSM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MSM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MSM` writer - Master/Slave mode"] pub struct MSM_W<'a> { w: &'a mut W, } impl<'a> MSM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TRGS` reader - Trigger selection"] pub struct TRGS_R(crate::FieldReader); impl TRGS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TRGS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGS` writer - Trigger selection"] pub struct TRGS_W<'a> { w: &'a mut W, } impl<'a> TRGS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `OCRC` reader - OCREF clear source selection"] pub struct OCRC_R(crate::FieldReader); impl OCRC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OCRC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OCRC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OCRC` writer - OCREF clear source selection"] pub struct OCRC_W<'a> { w: &'a mut W, } impl<'a> OCRC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `SMC` reader - Slave mode selection"] pub struct SMC_R(crate::FieldReader); impl SMC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SMC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SMC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SMC` writer - Slave mode selection"] pub struct SMC_W<'a> { w: &'a mut W, } impl<'a> SMC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); self.w } } impl R { #[doc = "Bit 15 - External trigger polarity"] #[inline(always)] pub fn etp(&self) -> ETP_R { ETP_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - External clock enable"] #[inline(always)] pub fn smc1(&self) -> SMC1_R { SMC1_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bits 12:13 - External trigger prescaler"] #[inline(always)] pub fn etpsc(&self) -> ETPSC_R { ETPSC_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bits 8:11 - External trigger filter"] #[inline(always)] pub fn etfc(&self) -> ETFC_R { ETFC_R::new(((self.bits >> 8) & 0x0f) as u8) } #[doc = "Bit 7 - Master/Slave mode"] #[inline(always)] pub fn msm(&self) -> MSM_R { MSM_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:6 - Trigger selection"] #[inline(always)] pub fn trgs(&self) -> TRGS_R { TRGS_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - OCREF clear source selection"] #[inline(always)] pub fn ocrc(&self) -> OCRC_R { OCRC_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bits 0:2 - Slave mode selection"] #[inline(always)] pub fn smc(&self) -> SMC_R { SMC_R::new((self.bits & 0x07) as u8) } } impl W { #[doc = "Bit 15 - External trigger polarity"] #[inline(always)] pub fn etp(&mut self) -> ETP_W { ETP_W { w: self } } #[doc = "Bit 14 - External clock enable"] #[inline(always)] pub fn smc1(&mut self) -> SMC1_W { SMC1_W { w: self } } #[doc = "Bits 12:13 - External trigger prescaler"] #[inline(always)] pub fn etpsc(&mut self) -> ETPSC_W { ETPSC_W { w: self } } #[doc = "Bits 8:11 - External trigger filter"] #[inline(always)] pub fn etfc(&mut self) -> ETFC_W { ETFC_W { w: self } } #[doc = "Bit 7 - Master/Slave mode"] #[inline(always)] pub fn msm(&mut self) -> MSM_W { MSM_W { w: self } } #[doc = "Bits 4:6 - Trigger selection"] #[inline(always)] pub fn trgs(&mut self) -> TRGS_W { TRGS_W { w: self } } #[doc = "Bit 3 - OCREF clear source selection"] #[inline(always)] pub fn ocrc(&mut self) -> OCRC_W { OCRC_W { w: self } } #[doc = "Bits 0:2 - Slave mode selection"] #[inline(always)] pub fn smc(&mut self) -> SMC_W { SMC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "slave mode control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smcfg](index.html) module"] pub struct SMCFG_SPEC; impl crate::RegisterSpec for SMCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [smcfg::R](R) reader structure"] impl crate::Readable for SMCFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [smcfg::W](W) writer structure"] impl crate::Writable for SMCFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SMCFG to value 0"] impl crate::Resettable for SMCFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMAINTEN register accessor: an alias for `Reg`"] pub type DMAINTEN = crate::Reg; #[doc = "DMA/Interrupt enable register"] pub mod dmainten { #[doc = "Register `DMAINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMAINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TRGDEN` reader - Trigger DMA request enable"] pub struct TRGDEN_R(crate::FieldReader); impl TRGDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRGDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGDEN` writer - Trigger DMA request enable"] pub struct TRGDEN_W<'a> { w: &'a mut W, } impl<'a> TRGDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CH3DEN` reader - Capture/Compare 3 DMA request enable"] pub struct CH3DEN_R(crate::FieldReader); impl CH3DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3DEN` writer - Capture/Compare 3 DMA request enable"] pub struct CH3DEN_W<'a> { w: &'a mut W, } impl<'a> CH3DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CH2DEN` reader - Capture/Compare 2 DMA request enable"] pub struct CH2DEN_R(crate::FieldReader); impl CH2DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2DEN` writer - Capture/Compare 2 DMA request enable"] pub struct CH2DEN_W<'a> { w: &'a mut W, } impl<'a> CH2DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH1DEN` reader - Capture/Compare 1 DMA request enable"] pub struct CH1DEN_R(crate::FieldReader); impl CH1DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1DEN` writer - Capture/Compare 1 DMA request enable"] pub struct CH1DEN_W<'a> { w: &'a mut W, } impl<'a> CH1DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH0DEN` reader - Capture/Compare 1 DMA request enable"] pub struct CH0DEN_R(crate::FieldReader); impl CH0DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0DEN` writer - Capture/Compare 1 DMA request enable"] pub struct CH0DEN_W<'a> { w: &'a mut W, } impl<'a> CH0DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `UPDEN` reader - Update DMA request enable"] pub struct UPDEN_R(crate::FieldReader); impl UPDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDEN` writer - Update DMA request enable"] pub struct UPDEN_W<'a> { w: &'a mut W, } impl<'a> UPDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TRGIE` reader - Trigger interrupt enable"] pub struct TRGIE_R(crate::FieldReader); impl TRGIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRGIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGIE` writer - Trigger interrupt enable"] pub struct TRGIE_W<'a> { w: &'a mut W, } impl<'a> TRGIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CH3IE` reader - Capture/Compare 3 interrupt enable"] pub struct CH3IE_R(crate::FieldReader); impl CH3IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3IE` writer - Capture/Compare 3 interrupt enable"] pub struct CH3IE_W<'a> { w: &'a mut W, } impl<'a> CH3IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CH2IE` reader - Capture/Compare 2 interrupt enable"] pub struct CH2IE_R(crate::FieldReader); impl CH2IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2IE` writer - Capture/Compare 2 interrupt enable"] pub struct CH2IE_W<'a> { w: &'a mut W, } impl<'a> CH2IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH1IE` reader - Capture/Compare 1 interrupt enable"] pub struct CH1IE_R(crate::FieldReader); impl CH1IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1IE` writer - Capture/Compare 1 interrupt enable"] pub struct CH1IE_W<'a> { w: &'a mut W, } impl<'a> CH1IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0IE` reader - Capture/Compare 0 interrupt enable"] pub struct CH0IE_R(crate::FieldReader); impl CH0IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0IE` writer - Capture/Compare 0 interrupt enable"] pub struct CH0IE_W<'a> { w: &'a mut W, } impl<'a> CH0IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPIE` reader - Update interrupt enable"] pub struct UPIE_R(crate::FieldReader); impl UPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIE` writer - Update interrupt enable"] pub struct UPIE_W<'a> { w: &'a mut W, } impl<'a> UPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 14 - Trigger DMA request enable"] #[inline(always)] pub fn trgden(&self) -> TRGDEN_R { TRGDEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 12 - Capture/Compare 3 DMA request enable"] #[inline(always)] pub fn ch3den(&self) -> CH3DEN_R { CH3DEN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Capture/Compare 2 DMA request enable"] #[inline(always)] pub fn ch2den(&self) -> CH2DEN_R { CH2DEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Capture/Compare 1 DMA request enable"] #[inline(always)] pub fn ch1den(&self) -> CH1DEN_R { CH1DEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Capture/Compare 1 DMA request enable"] #[inline(always)] pub fn ch0den(&self) -> CH0DEN_R { CH0DEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Update DMA request enable"] #[inline(always)] pub fn upden(&self) -> UPDEN_R { UPDEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 6 - Trigger interrupt enable"] #[inline(always)] pub fn trgie(&self) -> TRGIE_R { TRGIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Capture/Compare 3 interrupt enable"] #[inline(always)] pub fn ch3ie(&self) -> CH3IE_R { CH3IE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Capture/Compare 2 interrupt enable"] #[inline(always)] pub fn ch2ie(&self) -> CH2IE_R { CH2IE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Capture/Compare 1 interrupt enable"] #[inline(always)] pub fn ch1ie(&self) -> CH1IE_R { CH1IE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Capture/Compare 0 interrupt enable"] #[inline(always)] pub fn ch0ie(&self) -> CH0IE_R { CH0IE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&self) -> UPIE_R { UPIE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 14 - Trigger DMA request enable"] #[inline(always)] pub fn trgden(&mut self) -> TRGDEN_W { TRGDEN_W { w: self } } #[doc = "Bit 12 - Capture/Compare 3 DMA request enable"] #[inline(always)] pub fn ch3den(&mut self) -> CH3DEN_W { CH3DEN_W { w: self } } #[doc = "Bit 11 - Capture/Compare 2 DMA request enable"] #[inline(always)] pub fn ch2den(&mut self) -> CH2DEN_W { CH2DEN_W { w: self } } #[doc = "Bit 10 - Capture/Compare 1 DMA request enable"] #[inline(always)] pub fn ch1den(&mut self) -> CH1DEN_W { CH1DEN_W { w: self } } #[doc = "Bit 9 - Capture/Compare 1 DMA request enable"] #[inline(always)] pub fn ch0den(&mut self) -> CH0DEN_W { CH0DEN_W { w: self } } #[doc = "Bit 8 - Update DMA request enable"] #[inline(always)] pub fn upden(&mut self) -> UPDEN_W { UPDEN_W { w: self } } #[doc = "Bit 6 - Trigger interrupt enable"] #[inline(always)] pub fn trgie(&mut self) -> TRGIE_W { TRGIE_W { w: self } } #[doc = "Bit 4 - Capture/Compare 3 interrupt enable"] #[inline(always)] pub fn ch3ie(&mut self) -> CH3IE_W { CH3IE_W { w: self } } #[doc = "Bit 3 - Capture/Compare 2 interrupt enable"] #[inline(always)] pub fn ch2ie(&mut self) -> CH2IE_W { CH2IE_W { w: self } } #[doc = "Bit 2 - Capture/Compare 1 interrupt enable"] #[inline(always)] pub fn ch1ie(&mut self) -> CH1IE_W { CH1IE_W { w: self } } #[doc = "Bit 1 - Capture/Compare 0 interrupt enable"] #[inline(always)] pub fn ch0ie(&mut self) -> CH0IE_W { CH0IE_W { w: self } } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&mut self) -> UPIE_W { UPIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmainten](index.html) module"] pub struct DMAINTEN_SPEC; impl crate::RegisterSpec for DMAINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmainten::R](R) reader structure"] impl crate::Readable for DMAINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmainten::W](W) writer structure"] impl crate::Writable for DMAINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMAINTEN to value 0"] impl crate::Resettable for DMAINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTF register accessor: an alias for `Reg`"] pub type INTF = crate::Reg; #[doc = "interrupt flag register"] pub mod intf { #[doc = "Register `INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH3OF` reader - Capture/Compare 3 overcapture flag"] pub struct CH3OF_R(crate::FieldReader); impl CH3OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3OF` writer - Capture/Compare 3 overcapture flag"] pub struct CH3OF_W<'a> { w: &'a mut W, } impl<'a> CH3OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CH2OF` reader - Capture/Compare 2 overcapture flag"] pub struct CH2OF_R(crate::FieldReader); impl CH2OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2OF` writer - Capture/Compare 2 overcapture flag"] pub struct CH2OF_W<'a> { w: &'a mut W, } impl<'a> CH2OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH1OF` reader - Capture/compare 1 overcapture flag"] pub struct CH1OF_R(crate::FieldReader); impl CH1OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1OF` writer - Capture/compare 1 overcapture flag"] pub struct CH1OF_W<'a> { w: &'a mut W, } impl<'a> CH1OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH0OF` reader - Capture/Compare 0 overcapture flag"] pub struct CH0OF_R(crate::FieldReader); impl CH0OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0OF` writer - Capture/Compare 0 overcapture flag"] pub struct CH0OF_W<'a> { w: &'a mut W, } impl<'a> CH0OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `TRGIF` reader - Trigger interrupt flag"] pub struct TRGIF_R(crate::FieldReader); impl TRGIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRGIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGIF` writer - Trigger interrupt flag"] pub struct TRGIF_W<'a> { w: &'a mut W, } impl<'a> TRGIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CH3IF` reader - Capture/Compare 3 interrupt flag"] pub struct CH3IF_R(crate::FieldReader); impl CH3IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3IF` writer - Capture/Compare 3 interrupt flag"] pub struct CH3IF_W<'a> { w: &'a mut W, } impl<'a> CH3IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CH2IF` reader - Capture/Compare 2 interrupt flag"] pub struct CH2IF_R(crate::FieldReader); impl CH2IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2IF` writer - Capture/Compare 2 interrupt flag"] pub struct CH2IF_W<'a> { w: &'a mut W, } impl<'a> CH2IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH1IF` reader - Capture/Compare 1 interrupt flag"] pub struct CH1IF_R(crate::FieldReader); impl CH1IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1IF` writer - Capture/Compare 1 interrupt flag"] pub struct CH1IF_W<'a> { w: &'a mut W, } impl<'a> CH1IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0IF` reader - Capture/compare 0 interrupt flag"] pub struct CH0IF_R(crate::FieldReader); impl CH0IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0IF` writer - Capture/compare 0 interrupt flag"] pub struct CH0IF_W<'a> { w: &'a mut W, } impl<'a> CH0IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPIF` reader - Update interrupt flag"] pub struct UPIF_R(crate::FieldReader); impl UPIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIF` writer - Update interrupt flag"] pub struct UPIF_W<'a> { w: &'a mut W, } impl<'a> UPIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 12 - Capture/Compare 3 overcapture flag"] #[inline(always)] pub fn ch3of(&self) -> CH3OF_R { CH3OF_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Capture/Compare 2 overcapture flag"] #[inline(always)] pub fn ch2of(&self) -> CH2OF_R { CH2OF_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Capture/compare 1 overcapture flag"] #[inline(always)] pub fn ch1of(&self) -> CH1OF_R { CH1OF_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Capture/Compare 0 overcapture flag"] #[inline(always)] pub fn ch0of(&self) -> CH0OF_R { CH0OF_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 6 - Trigger interrupt flag"] #[inline(always)] pub fn trgif(&self) -> TRGIF_R { TRGIF_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Capture/Compare 3 interrupt flag"] #[inline(always)] pub fn ch3if(&self) -> CH3IF_R { CH3IF_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Capture/Compare 2 interrupt flag"] #[inline(always)] pub fn ch2if(&self) -> CH2IF_R { CH2IF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Capture/Compare 1 interrupt flag"] #[inline(always)] pub fn ch1if(&self) -> CH1IF_R { CH1IF_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Capture/compare 0 interrupt flag"] #[inline(always)] pub fn ch0if(&self) -> CH0IF_R { CH0IF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&self) -> UPIF_R { UPIF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 12 - Capture/Compare 3 overcapture flag"] #[inline(always)] pub fn ch3of(&mut self) -> CH3OF_W { CH3OF_W { w: self } } #[doc = "Bit 11 - Capture/Compare 2 overcapture flag"] #[inline(always)] pub fn ch2of(&mut self) -> CH2OF_W { CH2OF_W { w: self } } #[doc = "Bit 10 - Capture/compare 1 overcapture flag"] #[inline(always)] pub fn ch1of(&mut self) -> CH1OF_W { CH1OF_W { w: self } } #[doc = "Bit 9 - Capture/Compare 0 overcapture flag"] #[inline(always)] pub fn ch0of(&mut self) -> CH0OF_W { CH0OF_W { w: self } } #[doc = "Bit 6 - Trigger interrupt flag"] #[inline(always)] pub fn trgif(&mut self) -> TRGIF_W { TRGIF_W { w: self } } #[doc = "Bit 4 - Capture/Compare 3 interrupt flag"] #[inline(always)] pub fn ch3if(&mut self) -> CH3IF_W { CH3IF_W { w: self } } #[doc = "Bit 3 - Capture/Compare 2 interrupt flag"] #[inline(always)] pub fn ch2if(&mut self) -> CH2IF_W { CH2IF_W { w: self } } #[doc = "Bit 2 - Capture/Compare 1 interrupt flag"] #[inline(always)] pub fn ch1if(&mut self) -> CH1IF_W { CH1IF_W { w: self } } #[doc = "Bit 1 - Capture/compare 0 interrupt flag"] #[inline(always)] pub fn ch0if(&mut self) -> CH0IF_W { CH0IF_W { w: self } } #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&mut self) -> UPIF_W { UPIF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intf](index.html) module"] pub struct INTF_SPEC; impl crate::RegisterSpec for INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [intf::R](R) reader structure"] impl crate::Readable for INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [intf::W](W) writer structure"] impl crate::Writable for INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTF to value 0"] impl crate::Resettable for INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SWEVG register accessor: an alias for `Reg`"] pub type SWEVG = crate::Reg; #[doc = "event generation register"] pub mod swevg { #[doc = "Register `SWEVG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TRGG` writer - Trigger generation"] pub struct TRGG_W<'a> { w: &'a mut W, } impl<'a> TRGG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CH3G` writer - Capture/compare 3 generation"] pub struct CH3G_W<'a> { w: &'a mut W, } impl<'a> CH3G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CH2G` writer - Capture/compare 2 generation"] pub struct CH2G_W<'a> { w: &'a mut W, } impl<'a> CH2G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH1G` writer - Capture/compare 1 generation"] pub struct CH1G_W<'a> { w: &'a mut W, } impl<'a> CH1G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0G` writer - Capture/compare 0 generation"] pub struct CH0G_W<'a> { w: &'a mut W, } impl<'a> CH0G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPG` writer - Update generation"] pub struct UPG_W<'a> { w: &'a mut W, } impl<'a> UPG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 6 - Trigger generation"] #[inline(always)] pub fn trgg(&mut self) -> TRGG_W { TRGG_W { w: self } } #[doc = "Bit 4 - Capture/compare 3 generation"] #[inline(always)] pub fn ch3g(&mut self) -> CH3G_W { CH3G_W { w: self } } #[doc = "Bit 3 - Capture/compare 2 generation"] #[inline(always)] pub fn ch2g(&mut self) -> CH2G_W { CH2G_W { w: self } } #[doc = "Bit 2 - Capture/compare 1 generation"] #[inline(always)] pub fn ch1g(&mut self) -> CH1G_W { CH1G_W { w: self } } #[doc = "Bit 1 - Capture/compare 0 generation"] #[inline(always)] pub fn ch0g(&mut self) -> CH0G_W { CH0G_W { w: self } } #[doc = "Bit 0 - Update generation"] #[inline(always)] pub fn upg(&mut self) -> UPG_W { UPG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swevg](index.html) module"] pub struct SWEVG_SPEC; impl crate::RegisterSpec for SWEVG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [swevg::W](W) writer structure"] impl crate::Writable for SWEVG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SWEVG to value 0"] impl crate::Resettable for SWEVG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL0_Output register accessor: an alias for `Reg`"] pub type CHCTL0_OUTPUT = crate::Reg; #[doc = "capture/compare mode register 0 (output mode)"] pub mod chctl0_output { #[doc = "Register `CHCTL0_Output` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL0_Output` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1COMCEN` reader - Output compare 1 clear enable"] pub struct CH1COMCEN_R(crate::FieldReader); impl CH1COMCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1COMCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMCEN` writer - Output compare 1 clear enable"] pub struct CH1COMCEN_W<'a> { w: &'a mut W, } impl<'a> CH1COMCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `CH1COMCTL` reader - Output compare 1 mode"] pub struct CH1COMCTL_R(crate::FieldReader); impl CH1COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMCTL` writer - Output compare 1 mode"] pub struct CH1COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH1COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `CH1COMSEN` reader - Output compare 1 preload enable"] pub struct CH1COMSEN_R(crate::FieldReader); impl CH1COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMSEN` writer - Output compare 1 preload enable"] pub struct CH1COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH1COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH1COMFEN` reader - Output compare 1 fast enable"] pub struct CH1COMFEN_R(crate::FieldReader); impl CH1COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMFEN` writer - Output compare 1 fast enable"] pub struct CH1COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH1COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH1MS` reader - Capture/Compare 1 selection"] pub struct CH1MS_R(crate::FieldReader); impl CH1MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1MS` writer - Capture/Compare 1 selection"] pub struct CH1MS_W<'a> { w: &'a mut W, } impl<'a> CH1MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CH0COMCEN` reader - Output compare 0 clear enable"] pub struct CH0COMCEN_R(crate::FieldReader); impl CH0COMCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMCEN` writer - Output compare 0 clear enable"] pub struct CH0COMCEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CH0COMCTL` reader - Output compare 0 mode"] pub struct CH0COMCTL_R(crate::FieldReader); impl CH0COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMCTL` writer - Output compare 0 mode"] pub struct CH0COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH0COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `CH0COMSEN` reader - Output compare 0 preload enable"] pub struct CH0COMSEN_R(crate::FieldReader); impl CH0COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMSEN` writer - Output compare 0 preload enable"] pub struct CH0COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH0COMFEN` reader - Output compare 0 fast enable"] pub struct CH0COMFEN_R(crate::FieldReader); impl CH0COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMFEN` writer - Output compare 0 fast enable"] pub struct CH0COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0MS` reader - Capture/Compare 0 selection"] pub struct CH0MS_R(crate::FieldReader); impl CH0MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0MS` writer - Capture/Compare 0 selection"] pub struct CH0MS_W<'a> { w: &'a mut W, } impl<'a> CH0MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bit 15 - Output compare 1 clear enable"] #[inline(always)] pub fn ch1comcen(&self) -> CH1COMCEN_R { CH1COMCEN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 12:14 - Output compare 1 mode"] #[inline(always)] pub fn ch1comctl(&self) -> CH1COMCTL_R { CH1COMCTL_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bit 11 - Output compare 1 preload enable"] #[inline(always)] pub fn ch1comsen(&self) -> CH1COMSEN_R { CH1COMSEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Output compare 1 fast enable"] #[inline(always)] pub fn ch1comfen(&self) -> CH1COMFEN_R { CH1COMFEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 8:9 - Capture/Compare 1 selection"] #[inline(always)] pub fn ch1ms(&self) -> CH1MS_R { CH1MS_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Output compare 0 clear enable"] #[inline(always)] pub fn ch0comcen(&self) -> CH0COMCEN_R { CH0COMCEN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:6 - Output compare 0 mode"] #[inline(always)] pub fn ch0comctl(&self) -> CH0COMCTL_R { CH0COMCTL_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - Output compare 0 preload enable"] #[inline(always)] pub fn ch0comsen(&self) -> CH0COMSEN_R { CH0COMSEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Output compare 0 fast enable"] #[inline(always)] pub fn ch0comfen(&self) -> CH0COMFEN_R { CH0COMFEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&self) -> CH0MS_R { CH0MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bit 15 - Output compare 1 clear enable"] #[inline(always)] pub fn ch1comcen(&mut self) -> CH1COMCEN_W { CH1COMCEN_W { w: self } } #[doc = "Bits 12:14 - Output compare 1 mode"] #[inline(always)] pub fn ch1comctl(&mut self) -> CH1COMCTL_W { CH1COMCTL_W { w: self } } #[doc = "Bit 11 - Output compare 1 preload enable"] #[inline(always)] pub fn ch1comsen(&mut self) -> CH1COMSEN_W { CH1COMSEN_W { w: self } } #[doc = "Bit 10 - Output compare 1 fast enable"] #[inline(always)] pub fn ch1comfen(&mut self) -> CH1COMFEN_W { CH1COMFEN_W { w: self } } #[doc = "Bits 8:9 - Capture/Compare 1 selection"] #[inline(always)] pub fn ch1ms(&mut self) -> CH1MS_W { CH1MS_W { w: self } } #[doc = "Bit 7 - Output compare 0 clear enable"] #[inline(always)] pub fn ch0comcen(&mut self) -> CH0COMCEN_W { CH0COMCEN_W { w: self } } #[doc = "Bits 4:6 - Output compare 0 mode"] #[inline(always)] pub fn ch0comctl(&mut self) -> CH0COMCTL_W { CH0COMCTL_W { w: self } } #[doc = "Bit 3 - Output compare 0 preload enable"] #[inline(always)] pub fn ch0comsen(&mut self) -> CH0COMSEN_W { CH0COMSEN_W { w: self } } #[doc = "Bit 2 - Output compare 0 fast enable"] #[inline(always)] pub fn ch0comfen(&mut self) -> CH0COMFEN_W { CH0COMFEN_W { w: self } } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&mut self) -> CH0MS_W { CH0MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register 0 (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl0_output](index.html) module"] pub struct CHCTL0_OUTPUT_SPEC; impl crate::RegisterSpec for CHCTL0_OUTPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl0_output::R](R) reader structure"] impl crate::Readable for CHCTL0_OUTPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl0_output::W](W) writer structure"] impl crate::Writable for CHCTL0_OUTPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL0_Output to value 0"] impl crate::Resettable for CHCTL0_OUTPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL0_Input register accessor: an alias for `Reg`"] pub type CHCTL0_INPUT = crate::Reg; #[doc = "capture/compare mode register 0 (input mode)"] pub mod chctl0_input { #[doc = "Register `CHCTL0_Input` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL0_Input` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1CAPFLT` reader - Input capture 1 filter"] pub struct CH1CAPFLT_R(crate::FieldReader); impl CH1CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1CAPFLT` writer - Input capture 1 filter"] pub struct CH1CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH1CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `CH1CAPPSC` reader - Input capture 1 prescaler"] pub struct CH1CAPPSC_R(crate::FieldReader); impl CH1CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1CAPPSC` writer - Input capture 1 prescaler"] pub struct CH1CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH1CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `CH1MS` reader - Capture/compare 1 selection"] pub struct CH1MS_R(crate::FieldReader); impl CH1MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1MS` writer - Capture/compare 1 selection"] pub struct CH1MS_W<'a> { w: &'a mut W, } impl<'a> CH1MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CH0CAPFLT` reader - Input capture 0 filter"] pub struct CH0CAPFLT_R(crate::FieldReader); impl CH0CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0CAPFLT` writer - Input capture 0 filter"] pub struct CH0CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH0CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `CH0CAPPSC` reader - Input capture 0 prescaler"] pub struct CH0CAPPSC_R(crate::FieldReader); impl CH0CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0CAPPSC` writer - Input capture 0 prescaler"] pub struct CH0CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH0CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CH0MS` reader - Capture/Compare 0 selection"] pub struct CH0MS_R(crate::FieldReader); impl CH0MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0MS` writer - Capture/Compare 0 selection"] pub struct CH0MS_W<'a> { w: &'a mut W, } impl<'a> CH0MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 12:15 - Input capture 1 filter"] #[inline(always)] pub fn ch1capflt(&self) -> CH1CAPFLT_R { CH1CAPFLT_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 10:11 - Input capture 1 prescaler"] #[inline(always)] pub fn ch1cappsc(&self) -> CH1CAPPSC_R { CH1CAPPSC_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Capture/compare 1 selection"] #[inline(always)] pub fn ch1ms(&self) -> CH1MS_R { CH1MS_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 4:7 - Input capture 0 filter"] #[inline(always)] pub fn ch0capflt(&self) -> CH0CAPFLT_R { CH0CAPFLT_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 2:3 - Input capture 0 prescaler"] #[inline(always)] pub fn ch0cappsc(&self) -> CH0CAPPSC_R { CH0CAPPSC_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&self) -> CH0MS_R { CH0MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 12:15 - Input capture 1 filter"] #[inline(always)] pub fn ch1capflt(&mut self) -> CH1CAPFLT_W { CH1CAPFLT_W { w: self } } #[doc = "Bits 10:11 - Input capture 1 prescaler"] #[inline(always)] pub fn ch1cappsc(&mut self) -> CH1CAPPSC_W { CH1CAPPSC_W { w: self } } #[doc = "Bits 8:9 - Capture/compare 1 selection"] #[inline(always)] pub fn ch1ms(&mut self) -> CH1MS_W { CH1MS_W { w: self } } #[doc = "Bits 4:7 - Input capture 0 filter"] #[inline(always)] pub fn ch0capflt(&mut self) -> CH0CAPFLT_W { CH0CAPFLT_W { w: self } } #[doc = "Bits 2:3 - Input capture 0 prescaler"] #[inline(always)] pub fn ch0cappsc(&mut self) -> CH0CAPPSC_W { CH0CAPPSC_W { w: self } } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&mut self) -> CH0MS_W { CH0MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register 0 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl0_input](index.html) module"] pub struct CHCTL0_INPUT_SPEC; impl crate::RegisterSpec for CHCTL0_INPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl0_input::R](R) reader structure"] impl crate::Readable for CHCTL0_INPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl0_input::W](W) writer structure"] impl crate::Writable for CHCTL0_INPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL0_Input to value 0"] impl crate::Resettable for CHCTL0_INPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL1_Output register accessor: an alias for `Reg`"] pub type CHCTL1_OUTPUT = crate::Reg; #[doc = "capture/compare mode register 1 (output mode)"] pub mod chctl1_output { #[doc = "Register `CHCTL1_Output` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL1_Output` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH3COMCEN` reader - Output compare 3 clear enable"] pub struct CH3COMCEN_R(crate::FieldReader); impl CH3COMCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3COMCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3COMCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3COMCEN` writer - Output compare 3 clear enable"] pub struct CH3COMCEN_W<'a> { w: &'a mut W, } impl<'a> CH3COMCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `CH3COMCTL` reader - Output compare 3 mode"] pub struct CH3COMCTL_R(crate::FieldReader); impl CH3COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH3COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3COMCTL` writer - Output compare 3 mode"] pub struct CH3COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH3COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `CH3COMSEN` reader - Output compare 3 preload enable"] pub struct CH3COMSEN_R(crate::FieldReader); impl CH3COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3COMSEN` writer - Output compare 3 preload enable"] pub struct CH3COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH3COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH3COMFEN` reader - Output compare 3 fast enable"] pub struct CH3COMFEN_R(crate::FieldReader); impl CH3COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3COMFEN` writer - Output compare 3 fast enable"] pub struct CH3COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH3COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH3MS` reader - Capture/Compare 3 selection"] pub struct CH3MS_R(crate::FieldReader); impl CH3MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH3MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3MS` writer - Capture/Compare 3 selection"] pub struct CH3MS_W<'a> { w: &'a mut W, } impl<'a> CH3MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CH2COMCEN` reader - Output compare 2 clear enable"] pub struct CH2COMCEN_R(crate::FieldReader); impl CH2COMCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2COMCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2COMCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2COMCEN` writer - Output compare 2 clear enable"] pub struct CH2COMCEN_W<'a> { w: &'a mut W, } impl<'a> CH2COMCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CH2COMCTL` reader - Output compare 2 mode"] pub struct CH2COMCTL_R(crate::FieldReader); impl CH2COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH2COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2COMCTL` writer - Output compare 2 mode"] pub struct CH2COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH2COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `CH2COMSEN` reader - Output compare 2 preload enable"] pub struct CH2COMSEN_R(crate::FieldReader); impl CH2COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2COMSEN` writer - Output compare 2 preload enable"] pub struct CH2COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH2COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH2COMFEN` reader - Output compare 2 fast enable"] pub struct CH2COMFEN_R(crate::FieldReader); impl CH2COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2COMFEN` writer - Output compare 2 fast enable"] pub struct CH2COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH2COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH2MS` reader - Capture/Compare 2 selection"] pub struct CH2MS_R(crate::FieldReader); impl CH2MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH2MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2MS` writer - Capture/Compare 2 selection"] pub struct CH2MS_W<'a> { w: &'a mut W, } impl<'a> CH2MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bit 15 - Output compare 3 clear enable"] #[inline(always)] pub fn ch3comcen(&self) -> CH3COMCEN_R { CH3COMCEN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 12:14 - Output compare 3 mode"] #[inline(always)] pub fn ch3comctl(&self) -> CH3COMCTL_R { CH3COMCTL_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bit 11 - Output compare 3 preload enable"] #[inline(always)] pub fn ch3comsen(&self) -> CH3COMSEN_R { CH3COMSEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Output compare 3 fast enable"] #[inline(always)] pub fn ch3comfen(&self) -> CH3COMFEN_R { CH3COMFEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 8:9 - Capture/Compare 3 selection"] #[inline(always)] pub fn ch3ms(&self) -> CH3MS_R { CH3MS_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Output compare 2 clear enable"] #[inline(always)] pub fn ch2comcen(&self) -> CH2COMCEN_R { CH2COMCEN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:6 - Output compare 2 mode"] #[inline(always)] pub fn ch2comctl(&self) -> CH2COMCTL_R { CH2COMCTL_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - Output compare 2 preload enable"] #[inline(always)] pub fn ch2comsen(&self) -> CH2COMSEN_R { CH2COMSEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Output compare 2 fast enable"] #[inline(always)] pub fn ch2comfen(&self) -> CH2COMFEN_R { CH2COMFEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bits 0:1 - Capture/Compare 2 selection"] #[inline(always)] pub fn ch2ms(&self) -> CH2MS_R { CH2MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bit 15 - Output compare 3 clear enable"] #[inline(always)] pub fn ch3comcen(&mut self) -> CH3COMCEN_W { CH3COMCEN_W { w: self } } #[doc = "Bits 12:14 - Output compare 3 mode"] #[inline(always)] pub fn ch3comctl(&mut self) -> CH3COMCTL_W { CH3COMCTL_W { w: self } } #[doc = "Bit 11 - Output compare 3 preload enable"] #[inline(always)] pub fn ch3comsen(&mut self) -> CH3COMSEN_W { CH3COMSEN_W { w: self } } #[doc = "Bit 10 - Output compare 3 fast enable"] #[inline(always)] pub fn ch3comfen(&mut self) -> CH3COMFEN_W { CH3COMFEN_W { w: self } } #[doc = "Bits 8:9 - Capture/Compare 3 selection"] #[inline(always)] pub fn ch3ms(&mut self) -> CH3MS_W { CH3MS_W { w: self } } #[doc = "Bit 7 - Output compare 2 clear enable"] #[inline(always)] pub fn ch2comcen(&mut self) -> CH2COMCEN_W { CH2COMCEN_W { w: self } } #[doc = "Bits 4:6 - Output compare 2 mode"] #[inline(always)] pub fn ch2comctl(&mut self) -> CH2COMCTL_W { CH2COMCTL_W { w: self } } #[doc = "Bit 3 - Output compare 2 preload enable"] #[inline(always)] pub fn ch2comsen(&mut self) -> CH2COMSEN_W { CH2COMSEN_W { w: self } } #[doc = "Bit 2 - Output compare 2 fast enable"] #[inline(always)] pub fn ch2comfen(&mut self) -> CH2COMFEN_W { CH2COMFEN_W { w: self } } #[doc = "Bits 0:1 - Capture/Compare 2 selection"] #[inline(always)] pub fn ch2ms(&mut self) -> CH2MS_W { CH2MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register 1 (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl1_output](index.html) module"] pub struct CHCTL1_OUTPUT_SPEC; impl crate::RegisterSpec for CHCTL1_OUTPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl1_output::R](R) reader structure"] impl crate::Readable for CHCTL1_OUTPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl1_output::W](W) writer structure"] impl crate::Writable for CHCTL1_OUTPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL1_Output to value 0"] impl crate::Resettable for CHCTL1_OUTPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL1_Input register accessor: an alias for `Reg`"] pub type CHCTL1_INPUT = crate::Reg; #[doc = "capture/compare mode register 1 (input mode)"] pub mod chctl1_input { #[doc = "Register `CHCTL1_Input` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL1_Input` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH3CAPFLT` reader - Input capture 3 filter"] pub struct CH3CAPFLT_R(crate::FieldReader); impl CH3CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH3CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3CAPFLT` writer - Input capture 3 filter"] pub struct CH3CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH3CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `CH3CAPPSC` reader - Input capture 3 prescaler"] pub struct CH3CAPPSC_R(crate::FieldReader); impl CH3CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH3CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3CAPPSC` writer - Input capture 3 prescaler"] pub struct CH3CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH3CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `CH3MS` reader - Capture/Compare 3 selection"] pub struct CH3MS_R(crate::FieldReader); impl CH3MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH3MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3MS` writer - Capture/Compare 3 selection"] pub struct CH3MS_W<'a> { w: &'a mut W, } impl<'a> CH3MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CH2CAPFLT` reader - Input capture 2 filter"] pub struct CH2CAPFLT_R(crate::FieldReader); impl CH2CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH2CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2CAPFLT` writer - Input capture 2 filter"] pub struct CH2CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH2CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `CH2CAPPSC` reader - Input capture 2 prescaler"] pub struct CH2CAPPSC_R(crate::FieldReader); impl CH2CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH2CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2CAPPSC` writer - Input capture 2 prescaler"] pub struct CH2CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH2CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CH2MS` reader - Capture/Compare 2 selection"] pub struct CH2MS_R(crate::FieldReader); impl CH2MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH2MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2MS` writer - Capture/Compare 2 selection"] pub struct CH2MS_W<'a> { w: &'a mut W, } impl<'a> CH2MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 12:15 - Input capture 3 filter"] #[inline(always)] pub fn ch3capflt(&self) -> CH3CAPFLT_R { CH3CAPFLT_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 10:11 - Input capture 3 prescaler"] #[inline(always)] pub fn ch3cappsc(&self) -> CH3CAPPSC_R { CH3CAPPSC_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Capture/Compare 3 selection"] #[inline(always)] pub fn ch3ms(&self) -> CH3MS_R { CH3MS_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 4:7 - Input capture 2 filter"] #[inline(always)] pub fn ch2capflt(&self) -> CH2CAPFLT_R { CH2CAPFLT_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 2:3 - Input capture 2 prescaler"] #[inline(always)] pub fn ch2cappsc(&self) -> CH2CAPPSC_R { CH2CAPPSC_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Capture/Compare 2 selection"] #[inline(always)] pub fn ch2ms(&self) -> CH2MS_R { CH2MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 12:15 - Input capture 3 filter"] #[inline(always)] pub fn ch3capflt(&mut self) -> CH3CAPFLT_W { CH3CAPFLT_W { w: self } } #[doc = "Bits 10:11 - Input capture 3 prescaler"] #[inline(always)] pub fn ch3cappsc(&mut self) -> CH3CAPPSC_W { CH3CAPPSC_W { w: self } } #[doc = "Bits 8:9 - Capture/Compare 3 selection"] #[inline(always)] pub fn ch3ms(&mut self) -> CH3MS_W { CH3MS_W { w: self } } #[doc = "Bits 4:7 - Input capture 2 filter"] #[inline(always)] pub fn ch2capflt(&mut self) -> CH2CAPFLT_W { CH2CAPFLT_W { w: self } } #[doc = "Bits 2:3 - Input capture 2 prescaler"] #[inline(always)] pub fn ch2cappsc(&mut self) -> CH2CAPPSC_W { CH2CAPPSC_W { w: self } } #[doc = "Bits 0:1 - Capture/Compare 2 selection"] #[inline(always)] pub fn ch2ms(&mut self) -> CH2MS_W { CH2MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register 1 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl1_input](index.html) module"] pub struct CHCTL1_INPUT_SPEC; impl crate::RegisterSpec for CHCTL1_INPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl1_input::R](R) reader structure"] impl crate::Readable for CHCTL1_INPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl1_input::W](W) writer structure"] impl crate::Writable for CHCTL1_INPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL1_Input to value 0"] impl crate::Resettable for CHCTL1_INPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL2 register accessor: an alias for `Reg`"] pub type CHCTL2 = crate::Reg; #[doc = "capture/compare enable register"] pub mod chctl2 { #[doc = "Register `CHCTL2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH3NP` reader - Capture/Compare 3 output Polarity"] pub struct CH3NP_R(crate::FieldReader); impl CH3NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3NP` writer - Capture/Compare 3 output Polarity"] pub struct CH3NP_W<'a> { w: &'a mut W, } impl<'a> CH3NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `CH3P` reader - Capture/Compare 3 output Polarity"] pub struct CH3P_R(crate::FieldReader); impl CH3P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3P` writer - Capture/Compare 3 output Polarity"] pub struct CH3P_W<'a> { w: &'a mut W, } impl<'a> CH3P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CH3EN` reader - Capture/Compare 3 output enable"] pub struct CH3EN_R(crate::FieldReader); impl CH3EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH3EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3EN` writer - Capture/Compare 3 output enable"] pub struct CH3EN_W<'a> { w: &'a mut W, } impl<'a> CH3EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `CH2NP` reader - Capture/Compare 2 output Polarity"] pub struct CH2NP_R(crate::FieldReader); impl CH2NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2NP` writer - Capture/Compare 2 output Polarity"] pub struct CH2NP_W<'a> { w: &'a mut W, } impl<'a> CH2NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH2P` reader - Capture/Compare 2 output Polarity"] pub struct CH2P_R(crate::FieldReader); impl CH2P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2P` writer - Capture/Compare 2 output Polarity"] pub struct CH2P_W<'a> { w: &'a mut W, } impl<'a> CH2P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CH2EN` reader - Capture/Compare 2 output enable"] pub struct CH2EN_R(crate::FieldReader); impl CH2EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH2EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2EN` writer - Capture/Compare 2 output enable"] pub struct CH2EN_W<'a> { w: &'a mut W, } impl<'a> CH2EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `CH1NP` reader - Capture/Compare 1 output Polarity"] pub struct CH1NP_R(crate::FieldReader); impl CH1NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1NP` writer - Capture/Compare 1 output Polarity"] pub struct CH1NP_W<'a> { w: &'a mut W, } impl<'a> CH1NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CH1P` reader - Capture/Compare 1 output Polarity"] pub struct CH1P_R(crate::FieldReader); impl CH1P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1P` writer - Capture/Compare 1 output Polarity"] pub struct CH1P_W<'a> { w: &'a mut W, } impl<'a> CH1P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH1EN` reader - Capture/Compare 1 output enable"] pub struct CH1EN_R(crate::FieldReader); impl CH1EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1EN` writer - Capture/Compare 1 output enable"] pub struct CH1EN_W<'a> { w: &'a mut W, } impl<'a> CH1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CH0NP` reader - Capture/Compare 0 output Polarity"] pub struct CH0NP_R(crate::FieldReader); impl CH0NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0NP` writer - Capture/Compare 0 output Polarity"] pub struct CH0NP_W<'a> { w: &'a mut W, } impl<'a> CH0NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH0P` reader - Capture/Compare 0 output Polarity"] pub struct CH0P_R(crate::FieldReader); impl CH0P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0P` writer - Capture/Compare 0 output Polarity"] pub struct CH0P_W<'a> { w: &'a mut W, } impl<'a> CH0P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CH0EN` reader - Capture/Compare 0 output enable"] pub struct CH0EN_R(crate::FieldReader); impl CH0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0EN` writer - Capture/Compare 0 output enable"] pub struct CH0EN_W<'a> { w: &'a mut W, } impl<'a> CH0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Capture/Compare 3 output Polarity"] #[inline(always)] pub fn ch3np(&self) -> CH3NP_R { CH3NP_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 13 - Capture/Compare 3 output Polarity"] #[inline(always)] pub fn ch3p(&self) -> CH3P_R { CH3P_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Capture/Compare 3 output enable"] #[inline(always)] pub fn ch3en(&self) -> CH3EN_R { CH3EN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Capture/Compare 2 output Polarity"] #[inline(always)] pub fn ch2np(&self) -> CH2NP_R { CH2NP_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 9 - Capture/Compare 2 output Polarity"] #[inline(always)] pub fn ch2p(&self) -> CH2P_R { CH2P_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Capture/Compare 2 output enable"] #[inline(always)] pub fn ch2en(&self) -> CH2EN_R { CH2EN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1np(&self) -> CH1NP_R { CH1NP_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 5 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1p(&self) -> CH1P_R { CH1P_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Capture/Compare 1 output enable"] #[inline(always)] pub fn ch1en(&self) -> CH1EN_R { CH1EN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0np(&self) -> CH0NP_R { CH0NP_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0p(&self) -> CH0P_R { CH0P_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Capture/Compare 0 output enable"] #[inline(always)] pub fn ch0en(&self) -> CH0EN_R { CH0EN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Capture/Compare 3 output Polarity"] #[inline(always)] pub fn ch3np(&mut self) -> CH3NP_W { CH3NP_W { w: self } } #[doc = "Bit 13 - Capture/Compare 3 output Polarity"] #[inline(always)] pub fn ch3p(&mut self) -> CH3P_W { CH3P_W { w: self } } #[doc = "Bit 12 - Capture/Compare 3 output enable"] #[inline(always)] pub fn ch3en(&mut self) -> CH3EN_W { CH3EN_W { w: self } } #[doc = "Bit 11 - Capture/Compare 2 output Polarity"] #[inline(always)] pub fn ch2np(&mut self) -> CH2NP_W { CH2NP_W { w: self } } #[doc = "Bit 9 - Capture/Compare 2 output Polarity"] #[inline(always)] pub fn ch2p(&mut self) -> CH2P_W { CH2P_W { w: self } } #[doc = "Bit 8 - Capture/Compare 2 output enable"] #[inline(always)] pub fn ch2en(&mut self) -> CH2EN_W { CH2EN_W { w: self } } #[doc = "Bit 7 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1np(&mut self) -> CH1NP_W { CH1NP_W { w: self } } #[doc = "Bit 5 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1p(&mut self) -> CH1P_W { CH1P_W { w: self } } #[doc = "Bit 4 - Capture/Compare 1 output enable"] #[inline(always)] pub fn ch1en(&mut self) -> CH1EN_W { CH1EN_W { w: self } } #[doc = "Bit 3 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0np(&mut self) -> CH0NP_W { CH0NP_W { w: self } } #[doc = "Bit 1 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0p(&mut self) -> CH0P_W { CH0P_W { w: self } } #[doc = "Bit 0 - Capture/Compare 0 output enable"] #[inline(always)] pub fn ch0en(&mut self) -> CH0EN_W { CH0EN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl2](index.html) module"] pub struct CHCTL2_SPEC; impl crate::RegisterSpec for CHCTL2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl2::R](R) reader structure"] impl crate::Readable for CHCTL2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl2::W](W) writer structure"] impl crate::Writable for CHCTL2_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL2 to value 0"] impl crate::Resettable for CHCTL2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CNT register accessor: an alias for `Reg`"] pub type CNT = crate::Reg; #[doc = "counter"] pub mod cnt { #[doc = "Register `CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - counter value"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - counter value"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - counter value"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - counter value"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] pub struct CNT_SPEC; impl crate::RegisterSpec for CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cnt::R](R) reader structure"] impl crate::Readable for CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] impl crate::Writable for CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CNT to value 0"] impl crate::Resettable for CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PSC register accessor: an alias for `Reg`"] pub type PSC = crate::Reg; #[doc = "prescaler"] pub mod psc { #[doc = "Register `PSC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PSC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PSC` reader - Prescaler value"] pub struct PSC_R(crate::FieldReader); impl PSC_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSC` writer - Prescaler value"] pub struct PSC_W<'a> { w: &'a mut W, } impl<'a> PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&self) -> PSC_R { PSC_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&mut self) -> PSC_W { PSC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](index.html) module"] pub struct PSC_SPEC; impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [psc::R](R) reader structure"] impl crate::Readable for PSC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [psc::W](W) writer structure"] impl crate::Writable for PSC_SPEC { type Writer = W; } #[doc = "`reset()` method sets PSC to value 0"] impl crate::Resettable for PSC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CAR register accessor: an alias for `Reg`"] pub type CAR = crate::Reg; #[doc = "auto-reload register"] pub mod car { #[doc = "Register `CAR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CAR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CARL` reader - Low Auto-reload value"] pub struct CARL_R(crate::FieldReader); impl CARL_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { CARL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CARL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CARL` writer - Low Auto-reload value"] pub struct CARL_W<'a> { w: &'a mut W, } impl<'a> CARL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Low Auto-reload value"] #[inline(always)] pub fn carl(&self) -> CARL_R { CARL_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Low Auto-reload value"] #[inline(always)] pub fn carl(&mut self) -> CARL_W { CARL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [car](index.html) module"] pub struct CAR_SPEC; impl crate::RegisterSpec for CAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [car::R](R) reader structure"] impl crate::Readable for CAR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [car::W](W) writer structure"] impl crate::Writable for CAR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CAR to value 0"] impl crate::Resettable for CAR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH0CV register accessor: an alias for `Reg`"] pub type CH0CV = crate::Reg; #[doc = "capture/compare register 1"] pub mod ch0cv { #[doc = "Register `CH0CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH0CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0VAL` reader - Low Capture/Compare 1 value"] pub struct CH0VAL_R(crate::FieldReader); impl CH0VAL_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { CH0VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0VAL` writer - Low Capture/Compare 1 value"] pub struct CH0VAL_W<'a> { w: &'a mut W, } impl<'a> CH0VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Low Capture/Compare 1 value"] #[inline(always)] pub fn ch0val(&self) -> CH0VAL_R { CH0VAL_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Low Capture/Compare 1 value"] #[inline(always)] pub fn ch0val(&mut self) -> CH0VAL_W { CH0VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0cv](index.html) module"] pub struct CH0CV_SPEC; impl crate::RegisterSpec for CH0CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch0cv::R](R) reader structure"] impl crate::Readable for CH0CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch0cv::W](W) writer structure"] impl crate::Writable for CH0CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH0CV to value 0"] impl crate::Resettable for CH0CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH1CV register accessor: an alias for `Reg`"] pub type CH1CV = crate::Reg; #[doc = "capture/compare register 2"] pub mod ch1cv { #[doc = "Register `CH1CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH1CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1VAL` reader - Low Capture/Compare 2 value"] pub struct CH1VAL_R(crate::FieldReader); impl CH1VAL_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { CH1VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1VAL` writer - Low Capture/Compare 2 value"] pub struct CH1VAL_W<'a> { w: &'a mut W, } impl<'a> CH1VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Low Capture/Compare 2 value"] #[inline(always)] pub fn ch1val(&self) -> CH1VAL_R { CH1VAL_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Low Capture/Compare 2 value"] #[inline(always)] pub fn ch1val(&mut self) -> CH1VAL_W { CH1VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1cv](index.html) module"] pub struct CH1CV_SPEC; impl crate::RegisterSpec for CH1CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch1cv::R](R) reader structure"] impl crate::Readable for CH1CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch1cv::W](W) writer structure"] impl crate::Writable for CH1CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH1CV to value 0"] impl crate::Resettable for CH1CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH2CV register accessor: an alias for `Reg`"] pub type CH2CV = crate::Reg; #[doc = "capture/compare register 2"] pub mod ch2cv { #[doc = "Register `CH2CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH2CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH2VAL` reader - High Capture/Compare value (TIM2 only)"] pub struct CH2VAL_R(crate::FieldReader); impl CH2VAL_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { CH2VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH2VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH2VAL` writer - High Capture/Compare value (TIM2 only)"] pub struct CH2VAL_W<'a> { w: &'a mut W, } impl<'a> CH2VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - High Capture/Compare value (TIM2 only)"] #[inline(always)] pub fn ch2val(&self) -> CH2VAL_R { CH2VAL_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - High Capture/Compare value (TIM2 only)"] #[inline(always)] pub fn ch2val(&mut self) -> CH2VAL_W { CH2VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch2cv](index.html) module"] pub struct CH2CV_SPEC; impl crate::RegisterSpec for CH2CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch2cv::R](R) reader structure"] impl crate::Readable for CH2CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch2cv::W](W) writer structure"] impl crate::Writable for CH2CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH2CV to value 0"] impl crate::Resettable for CH2CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH3CV register accessor: an alias for `Reg`"] pub type CH3CV = crate::Reg; #[doc = "capture/compare register 3"] pub mod ch3cv { #[doc = "Register `CH3CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH3CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH3VAL` reader - High Capture/Compare value (TIM2 only)"] pub struct CH3VAL_R(crate::FieldReader); impl CH3VAL_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { CH3VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH3VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH3VAL` writer - High Capture/Compare value (TIM2 only)"] pub struct CH3VAL_W<'a> { w: &'a mut W, } impl<'a> CH3VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - High Capture/Compare value (TIM2 only)"] #[inline(always)] pub fn ch3val(&self) -> CH3VAL_R { CH3VAL_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - High Capture/Compare value (TIM2 only)"] #[inline(always)] pub fn ch3val(&mut self) -> CH3VAL_W { CH3VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch3cv](index.html) module"] pub struct CH3CV_SPEC; impl crate::RegisterSpec for CH3CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch3cv::R](R) reader structure"] impl crate::Readable for CH3CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch3cv::W](W) writer structure"] impl crate::Writable for CH3CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH3CV to value 0"] impl crate::Resettable for CH3CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMACFG register accessor: an alias for `Reg`"] pub type DMACFG = crate::Reg; #[doc = "DMA control register"] pub mod dmacfg { #[doc = "Register `DMACFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMACFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DMATC` reader - DMA burst length"] pub struct DMATC_R(crate::FieldReader); impl DMATC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DMATC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATC` writer - DMA burst length"] pub struct DMATC_W<'a> { w: &'a mut W, } impl<'a> DMATC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 8)) | ((value as u32 & 0x1f) << 8); self.w } } #[doc = "Field `DMATA` reader - DMA base address"] pub struct DMATA_R(crate::FieldReader); impl DMATA_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DMATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATA` writer - DMA base address"] pub struct DMATA_W<'a> { w: &'a mut W, } impl<'a> DMATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); self.w } } impl R { #[doc = "Bits 8:12 - DMA burst length"] #[inline(always)] pub fn dmatc(&self) -> DMATC_R { DMATC_R::new(((self.bits >> 8) & 0x1f) as u8) } #[doc = "Bits 0:4 - DMA base address"] #[inline(always)] pub fn dmata(&self) -> DMATA_R { DMATA_R::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 8:12 - DMA burst length"] #[inline(always)] pub fn dmatc(&mut self) -> DMATC_W { DMATC_W { w: self } } #[doc = "Bits 0:4 - DMA base address"] #[inline(always)] pub fn dmata(&mut self) -> DMATA_W { DMATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmacfg](index.html) module"] pub struct DMACFG_SPEC; impl crate::RegisterSpec for DMACFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmacfg::R](R) reader structure"] impl crate::Readable for DMACFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmacfg::W](W) writer structure"] impl crate::Writable for DMACFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMACFG to value 0"] impl crate::Resettable for DMACFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMATB register accessor: an alias for `Reg`"] pub type DMATB = crate::Reg; #[doc = "DMA address for full transfer"] pub mod dmatb { #[doc = "Register `DMATB` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMATB` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DMATB` reader - DMA register for burst accesses"] pub struct DMATB_R(crate::FieldReader); impl DMATB_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { DMATB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATB` writer - DMA register for burst accesses"] pub struct DMATB_W<'a> { w: &'a mut W, } impl<'a> DMATB_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - DMA register for burst accesses"] #[inline(always)] pub fn dmatb(&self) -> DMATB_R { DMATB_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - DMA register for burst accesses"] #[inline(always)] pub fn dmatb(&mut self) -> DMATB_W { DMATB_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA address for full transfer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmatb](index.html) module"] pub struct DMATB_SPEC; impl crate::RegisterSpec for DMATB_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmatb::R](R) reader structure"] impl crate::Readable for DMATB_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmatb::W](W) writer structure"] impl crate::Writable for DMATB_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMATB to value 0"] impl crate::Resettable for DMATB_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CFG register accessor: an alias for `Reg`"] pub type CFG = crate::Reg; #[doc = "Configuration"] pub mod cfg { #[doc = "Register `CFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHVSEL` reader - Write CHxVAL register selection"] pub struct CHVSEL_R(crate::FieldReader); impl CHVSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHVSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHVSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHVSEL` writer - Write CHxVAL register selection"] pub struct CHVSEL_W<'a> { w: &'a mut W, } impl<'a> CHVSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } impl R { #[doc = "Bit 1 - Write CHxVAL register selection"] #[inline(always)] pub fn chvsel(&self) -> CHVSEL_R { CHVSEL_R::new(((self.bits >> 1) & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Write CHxVAL register selection"] #[inline(always)] pub fn chvsel(&mut self) -> CHVSEL_W { CHVSEL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFG_SPEC; impl crate::RegisterSpec for CFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg::R](R) reader structure"] impl crate::Readable for CFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] impl crate::Writable for CFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG to value 0"] impl crate::Resettable for CFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose-timers"] pub struct TIMER2 { _marker: PhantomData<*const ()>, } unsafe impl Send for TIMER2 {} impl TIMER2 { #[doc = r"Pointer to the register block"] pub const PTR: *const timer1::RegisterBlock = 0x4000_0400 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const timer1::RegisterBlock { Self::PTR } } impl Deref for TIMER2 { type Target = timer1::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for TIMER2 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("TIMER2").finish() } } #[doc = "General-purpose-timers"] pub use timer1 as timer2; #[doc = "Basic-timers"] pub struct TIMER5 { _marker: PhantomData<*const ()>, } unsafe impl Send for TIMER5 {} impl TIMER5 { #[doc = r"Pointer to the register block"] pub const PTR: *const timer5::RegisterBlock = 0x4000_1000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const timer5::RegisterBlock { Self::PTR } } impl Deref for TIMER5 { type Target = timer5::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for TIMER5 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("TIMER5").finish() } } #[doc = "Basic-timers"] pub mod timer5 { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register 0"] pub ctl0: crate::Reg, #[doc = "0x04 - control register 1"] pub ctl1: crate::Reg, _reserved2: [u8; 0x04], #[doc = "0x0c - DMA/Interrupt enable register"] pub dmainten: crate::Reg, #[doc = "0x10 - status register"] pub intf: crate::Reg, #[doc = "0x14 - event generation register"] pub swevg: crate::Reg, _reserved5: [u8; 0x0c], #[doc = "0x24 - counter"] pub cnt: crate::Reg, #[doc = "0x28 - prescaler"] pub psc: crate::Reg, #[doc = "0x2c - auto-reload register"] pub car: crate::Reg, } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "control register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ARSE` reader - Auto-reload preload enable"] pub struct ARSE_R(crate::FieldReader); impl ARSE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ARSE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ARSE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ARSE` writer - Auto-reload preload enable"] pub struct ARSE_W<'a> { w: &'a mut W, } impl<'a> ARSE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SPM` reader - One-pulse mode"] pub struct SPM_R(crate::FieldReader); impl SPM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPM` writer - One-pulse mode"] pub struct SPM_W<'a> { w: &'a mut W, } impl<'a> SPM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `UPS` reader - Update request source"] pub struct UPS_R(crate::FieldReader); impl UPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPS` writer - Update request source"] pub struct UPS_W<'a> { w: &'a mut W, } impl<'a> UPS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `UPDIS` reader - Update disable"] pub struct UPDIS_R(crate::FieldReader); impl UPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDIS` writer - Update disable"] pub struct UPDIS_W<'a> { w: &'a mut W, } impl<'a> UPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CEN` reader - Counter enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Counter enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&self) -> ARSE_R { ARSE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn spm(&self) -> SPM_R { SPM_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&self) -> UPS_R { UPS_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&self) -> UPDIS_R { UPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&mut self) -> ARSE_W { ARSE_W { w: self } } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn spm(&mut self) -> SPM_W { SPM_W { w: self } } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&mut self) -> UPS_W { UPS_W { w: self } } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&mut self) -> UPDIS_W { UPDIS_W { w: self } } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MMC` reader - Master mode selection"] pub struct MMC_R(crate::FieldReader); impl MMC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MMC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MMC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MMC` writer - Master mode selection"] pub struct MMC_W<'a> { w: &'a mut W, } impl<'a> MMC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } impl R { #[doc = "Bits 4:6 - Master mode selection"] #[inline(always)] pub fn mmc(&self) -> MMC_R { MMC_R::new(((self.bits >> 4) & 0x07) as u8) } } impl W { #[doc = "Bits 4:6 - Master mode selection"] #[inline(always)] pub fn mmc(&mut self) -> MMC_W { MMC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMAINTEN register accessor: an alias for `Reg`"] pub type DMAINTEN = crate::Reg; #[doc = "DMA/Interrupt enable register"] pub mod dmainten { #[doc = "Register `DMAINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMAINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `UPDEN` reader - Update DMA request enable"] pub struct UPDEN_R(crate::FieldReader); impl UPDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDEN` writer - Update DMA request enable"] pub struct UPDEN_W<'a> { w: &'a mut W, } impl<'a> UPDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `UPIE` reader - Update interrupt enable"] pub struct UPIE_R(crate::FieldReader); impl UPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIE` writer - Update interrupt enable"] pub struct UPIE_W<'a> { w: &'a mut W, } impl<'a> UPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 8 - Update DMA request enable"] #[inline(always)] pub fn upden(&self) -> UPDEN_R { UPDEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&self) -> UPIE_R { UPIE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 8 - Update DMA request enable"] #[inline(always)] pub fn upden(&mut self) -> UPDEN_W { UPDEN_W { w: self } } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&mut self) -> UPIE_W { UPIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmainten](index.html) module"] pub struct DMAINTEN_SPEC; impl crate::RegisterSpec for DMAINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmainten::R](R) reader structure"] impl crate::Readable for DMAINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmainten::W](W) writer structure"] impl crate::Writable for DMAINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMAINTEN to value 0"] impl crate::Resettable for DMAINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTF register accessor: an alias for `Reg`"] pub type INTF = crate::Reg; #[doc = "status register"] pub mod intf { #[doc = "Register `INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `UPIF` reader - Update interrupt flag"] pub struct UPIF_R(crate::FieldReader); impl UPIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIF` writer - Update interrupt flag"] pub struct UPIF_W<'a> { w: &'a mut W, } impl<'a> UPIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&self) -> UPIF_R { UPIF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&mut self) -> UPIF_W { UPIF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intf](index.html) module"] pub struct INTF_SPEC; impl crate::RegisterSpec for INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [intf::R](R) reader structure"] impl crate::Readable for INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [intf::W](W) writer structure"] impl crate::Writable for INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTF to value 0"] impl crate::Resettable for INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SWEVG register accessor: an alias for `Reg`"] pub type SWEVG = crate::Reg; #[doc = "event generation register"] pub mod swevg { #[doc = "Register `SWEVG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `UPG` writer - Update generation"] pub struct UPG_W<'a> { w: &'a mut W, } impl<'a> UPG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 0 - Update generation"] #[inline(always)] pub fn upg(&mut self) -> UPG_W { UPG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swevg](index.html) module"] pub struct SWEVG_SPEC; impl crate::RegisterSpec for SWEVG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [swevg::W](W) writer structure"] impl crate::Writable for SWEVG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SWEVG to value 0"] impl crate::Resettable for SWEVG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CNT register accessor: an alias for `Reg`"] pub type CNT = crate::Reg; #[doc = "counter"] pub mod cnt { #[doc = "Register `CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - Low counter value"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - Low counter value"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Low counter value"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Low counter value"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] pub struct CNT_SPEC; impl crate::RegisterSpec for CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cnt::R](R) reader structure"] impl crate::Readable for CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] impl crate::Writable for CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CNT to value 0"] impl crate::Resettable for CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PSC register accessor: an alias for `Reg`"] pub type PSC = crate::Reg; #[doc = "prescaler"] pub mod psc { #[doc = "Register `PSC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PSC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PSC` reader - Prescaler value"] pub struct PSC_R(crate::FieldReader); impl PSC_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSC` writer - Prescaler value"] pub struct PSC_W<'a> { w: &'a mut W, } impl<'a> PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&self) -> PSC_R { PSC_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&mut self) -> PSC_W { PSC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](index.html) module"] pub struct PSC_SPEC; impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [psc::R](R) reader structure"] impl crate::Readable for PSC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [psc::W](W) writer structure"] impl crate::Writable for PSC_SPEC { type Writer = W; } #[doc = "`reset()` method sets PSC to value 0"] impl crate::Resettable for PSC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CAR register accessor: an alias for `Reg`"] pub type CAR = crate::Reg; #[doc = "auto-reload register"] pub mod car { #[doc = "Register `CAR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CAR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CARL` reader - Low Auto-reload value"] pub struct CARL_R(crate::FieldReader); impl CARL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CARL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CARL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CARL` writer - Low Auto-reload value"] pub struct CARL_W<'a> { w: &'a mut W, } impl<'a> CARL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Low Auto-reload value"] #[inline(always)] pub fn carl(&self) -> CARL_R { CARL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Low Auto-reload value"] #[inline(always)] pub fn carl(&mut self) -> CARL_W { CARL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [car](index.html) module"] pub struct CAR_SPEC; impl crate::RegisterSpec for CAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [car::R](R) reader structure"] impl crate::Readable for CAR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [car::W](W) writer structure"] impl crate::Writable for CAR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CAR to value 0"] impl crate::Resettable for CAR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose-timers"] pub struct TIMER13 { _marker: PhantomData<*const ()>, } unsafe impl Send for TIMER13 {} impl TIMER13 { #[doc = r"Pointer to the register block"] pub const PTR: *const timer13::RegisterBlock = 0x4000_2000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const timer13::RegisterBlock { Self::PTR } } impl Deref for TIMER13 { type Target = timer13::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for TIMER13 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("TIMER13").finish() } } #[doc = "General-purpose-timers"] pub mod timer13 { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register 1"] pub ctl0: crate::Reg, _reserved1: [u8; 0x08], #[doc = "0x0c - DMA/Interrupt enable register"] pub dmainten: crate::Reg, #[doc = "0x10 - interrupt flag register"] pub intf: crate::Reg, #[doc = "0x14 - event generation register"] pub swevg: crate::Reg, _reserved_4_chctl0: [u8; 0x04], _reserved5: [u8; 0x04], #[doc = "0x20 - capture/compare enable register"] pub chctl2: crate::Reg, #[doc = "0x24 - counter"] pub cnt: crate::Reg, #[doc = "0x28 - prescaler"] pub psc: crate::Reg, #[doc = "0x2c - auto-reload register"] pub car: crate::Reg, _reserved9: [u8; 0x04], #[doc = "0x34 - capture/compare register 0"] pub ch0cv: crate::Reg, _reserved10: [u8; 0x18], #[doc = "0x50 - channel input remap register"] pub irmp: crate::Reg, _reserved11: [u8; 0xa8], #[doc = "0xfc - configuration register"] pub cfg: crate::Reg, } impl RegisterBlock { #[doc = "0x18 - capture/compare mode register (input mode)"] #[inline(always)] pub fn chctl0_input(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const crate::Reg) } } #[doc = "0x18 - capture/compare mode register (output mode)"] #[inline(always)] pub fn chctl0_output(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const crate::Reg) } } } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "control register 1"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CKDIV` reader - Clock division"] pub struct CKDIV_R(crate::FieldReader); impl CKDIV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CKDIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKDIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKDIV` writer - Clock division"] pub struct CKDIV_W<'a> { w: &'a mut W, } impl<'a> CKDIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `ARSE` reader - Auto-reload preload enable"] pub struct ARSE_R(crate::FieldReader); impl ARSE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ARSE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ARSE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ARSE` writer - Auto-reload preload enable"] pub struct ARSE_W<'a> { w: &'a mut W, } impl<'a> ARSE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `UPS` reader - Update request source"] pub struct UPS_R(crate::FieldReader); impl UPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPS` writer - Update request source"] pub struct UPS_W<'a> { w: &'a mut W, } impl<'a> UPS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `UPDIS` reader - Update disable"] pub struct UPDIS_R(crate::FieldReader); impl UPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDIS` writer - Update disable"] pub struct UPDIS_W<'a> { w: &'a mut W, } impl<'a> UPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CEN` reader - Counter enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Counter enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckdiv(&self) -> CKDIV_R { CKDIV_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&self) -> ARSE_R { ARSE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&self) -> UPS_R { UPS_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&self) -> UPDIS_R { UPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckdiv(&mut self) -> CKDIV_W { CKDIV_W { w: self } } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&mut self) -> ARSE_W { ARSE_W { w: self } } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&mut self) -> UPS_W { UPS_W { w: self } } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&mut self) -> UPDIS_W { UPDIS_W { w: self } } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMAINTEN register accessor: an alias for `Reg`"] pub type DMAINTEN = crate::Reg; #[doc = "DMA/Interrupt enable register"] pub mod dmainten { #[doc = "Register `DMAINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMAINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0IE` reader - Capture/Compare 0 interrupt enable"] pub struct CH0IE_R(crate::FieldReader); impl CH0IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0IE` writer - Capture/Compare 0 interrupt enable"] pub struct CH0IE_W<'a> { w: &'a mut W, } impl<'a> CH0IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPIE` reader - Update interrupt enable"] pub struct UPIE_R(crate::FieldReader); impl UPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIE` writer - Update interrupt enable"] pub struct UPIE_W<'a> { w: &'a mut W, } impl<'a> UPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 1 - Capture/Compare 0 interrupt enable"] #[inline(always)] pub fn ch0ie(&self) -> CH0IE_R { CH0IE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&self) -> UPIE_R { UPIE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Capture/Compare 0 interrupt enable"] #[inline(always)] pub fn ch0ie(&mut self) -> CH0IE_W { CH0IE_W { w: self } } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&mut self) -> UPIE_W { UPIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmainten](index.html) module"] pub struct DMAINTEN_SPEC; impl crate::RegisterSpec for DMAINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmainten::R](R) reader structure"] impl crate::Readable for DMAINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmainten::W](W) writer structure"] impl crate::Writable for DMAINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMAINTEN to value 0"] impl crate::Resettable for DMAINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTF register accessor: an alias for `Reg`"] pub type INTF = crate::Reg; #[doc = "interrupt flag register"] pub mod intf { #[doc = "Register `INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0OF` reader - Capture/Compare 0 overcapture flag"] pub struct CH0OF_R(crate::FieldReader); impl CH0OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0OF` writer - Capture/Compare 0 overcapture flag"] pub struct CH0OF_W<'a> { w: &'a mut W, } impl<'a> CH0OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CH0IF` reader - Capture/compare 0 interrupt flag"] pub struct CH0IF_R(crate::FieldReader); impl CH0IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0IF` writer - Capture/compare 0 interrupt flag"] pub struct CH0IF_W<'a> { w: &'a mut W, } impl<'a> CH0IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPIF` reader - Update interrupt flag"] pub struct UPIF_R(crate::FieldReader); impl UPIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIF` writer - Update interrupt flag"] pub struct UPIF_W<'a> { w: &'a mut W, } impl<'a> UPIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 9 - Capture/Compare 0 overcapture flag"] #[inline(always)] pub fn ch0of(&self) -> CH0OF_R { CH0OF_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 1 - Capture/compare 0 interrupt flag"] #[inline(always)] pub fn ch0if(&self) -> CH0IF_R { CH0IF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&self) -> UPIF_R { UPIF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 9 - Capture/Compare 0 overcapture flag"] #[inline(always)] pub fn ch0of(&mut self) -> CH0OF_W { CH0OF_W { w: self } } #[doc = "Bit 1 - Capture/compare 0 interrupt flag"] #[inline(always)] pub fn ch0if(&mut self) -> CH0IF_W { CH0IF_W { w: self } } #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&mut self) -> UPIF_W { UPIF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intf](index.html) module"] pub struct INTF_SPEC; impl crate::RegisterSpec for INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [intf::R](R) reader structure"] impl crate::Readable for INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [intf::W](W) writer structure"] impl crate::Writable for INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTF to value 0"] impl crate::Resettable for INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SWEVG register accessor: an alias for `Reg`"] pub type SWEVG = crate::Reg; #[doc = "event generation register"] pub mod swevg { #[doc = "Register `SWEVG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0G` writer - Capture/compare 0 generation"] pub struct CH0G_W<'a> { w: &'a mut W, } impl<'a> CH0G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPG` writer - Update generation"] pub struct UPG_W<'a> { w: &'a mut W, } impl<'a> UPG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 1 - Capture/compare 0 generation"] #[inline(always)] pub fn ch0g(&mut self) -> CH0G_W { CH0G_W { w: self } } #[doc = "Bit 0 - Update generation"] #[inline(always)] pub fn upg(&mut self) -> UPG_W { UPG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swevg](index.html) module"] pub struct SWEVG_SPEC; impl crate::RegisterSpec for SWEVG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [swevg::W](W) writer structure"] impl crate::Writable for SWEVG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SWEVG to value 0"] impl crate::Resettable for SWEVG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL0_Output register accessor: an alias for `Reg`"] pub type CHCTL0_OUTPUT = crate::Reg; #[doc = "capture/compare mode register (output mode)"] pub mod chctl0_output { #[doc = "Register `CHCTL0_Output` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL0_Output` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0MS` reader - Capture/Compare 0 selection"] pub struct CH0MS_R(crate::FieldReader); impl CH0MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0MS` writer - Capture/Compare 0 selection"] pub struct CH0MS_W<'a> { w: &'a mut W, } impl<'a> CH0MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } #[doc = "Field `CH0COMFEN` reader - Output compare 0 fast enable"] pub struct CH0COMFEN_R(crate::FieldReader); impl CH0COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMFEN` writer - Output compare 0 fast enable"] pub struct CH0COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0COMSEN` reader - Output Compare 0 preload enable"] pub struct CH0COMSEN_R(crate::FieldReader); impl CH0COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMSEN` writer - Output Compare 0 preload enable"] pub struct CH0COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH0COMCTL` reader - Output Compare 0 mode"] pub struct CH0COMCTL_R(crate::FieldReader); impl CH0COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMCTL` writer - Output Compare 0 mode"] pub struct CH0COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH0COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } impl R { #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&self) -> CH0MS_R { CH0MS_R::new((self.bits & 0x03) as u8) } #[doc = "Bit 2 - Output compare 0 fast enable"] #[inline(always)] pub fn ch0comfen(&self) -> CH0COMFEN_R { CH0COMFEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Output Compare 0 preload enable"] #[inline(always)] pub fn ch0comsen(&self) -> CH0COMSEN_R { CH0COMSEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bits 4:6 - Output Compare 0 mode"] #[inline(always)] pub fn ch0comctl(&self) -> CH0COMCTL_R { CH0COMCTL_R::new(((self.bits >> 4) & 0x07) as u8) } } impl W { #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&mut self) -> CH0MS_W { CH0MS_W { w: self } } #[doc = "Bit 2 - Output compare 0 fast enable"] #[inline(always)] pub fn ch0comfen(&mut self) -> CH0COMFEN_W { CH0COMFEN_W { w: self } } #[doc = "Bit 3 - Output Compare 0 preload enable"] #[inline(always)] pub fn ch0comsen(&mut self) -> CH0COMSEN_W { CH0COMSEN_W { w: self } } #[doc = "Bits 4:6 - Output Compare 0 mode"] #[inline(always)] pub fn ch0comctl(&mut self) -> CH0COMCTL_W { CH0COMCTL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl0_output](index.html) module"] pub struct CHCTL0_OUTPUT_SPEC; impl crate::RegisterSpec for CHCTL0_OUTPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl0_output::R](R) reader structure"] impl crate::Readable for CHCTL0_OUTPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl0_output::W](W) writer structure"] impl crate::Writable for CHCTL0_OUTPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL0_Output to value 0"] impl crate::Resettable for CHCTL0_OUTPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL0_Input register accessor: an alias for `Reg`"] pub type CHCTL0_INPUT = crate::Reg; #[doc = "capture/compare mode register (input mode)"] pub mod chctl0_input { #[doc = "Register `CHCTL0_Input` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL0_Input` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0CAPFLT` reader - Input capture 0 filter"] pub struct CH0CAPFLT_R(crate::FieldReader); impl CH0CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0CAPFLT` writer - Input capture 0 filter"] pub struct CH0CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH0CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `CH0CAPPSC` reader - Input capture 0 prescaler"] pub struct CH0CAPPSC_R(crate::FieldReader); impl CH0CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0CAPPSC` writer - Input capture 0 prescaler"] pub struct CH0CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH0CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CH0MS` reader - Capture/Compare 0 selection"] pub struct CH0MS_R(crate::FieldReader); impl CH0MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0MS` writer - Capture/Compare 0 selection"] pub struct CH0MS_W<'a> { w: &'a mut W, } impl<'a> CH0MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 4:7 - Input capture 0 filter"] #[inline(always)] pub fn ch0capflt(&self) -> CH0CAPFLT_R { CH0CAPFLT_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 2:3 - Input capture 0 prescaler"] #[inline(always)] pub fn ch0cappsc(&self) -> CH0CAPPSC_R { CH0CAPPSC_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&self) -> CH0MS_R { CH0MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 4:7 - Input capture 0 filter"] #[inline(always)] pub fn ch0capflt(&mut self) -> CH0CAPFLT_W { CH0CAPFLT_W { w: self } } #[doc = "Bits 2:3 - Input capture 0 prescaler"] #[inline(always)] pub fn ch0cappsc(&mut self) -> CH0CAPPSC_W { CH0CAPPSC_W { w: self } } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&mut self) -> CH0MS_W { CH0MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl0_input](index.html) module"] pub struct CHCTL0_INPUT_SPEC; impl crate::RegisterSpec for CHCTL0_INPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl0_input::R](R) reader structure"] impl crate::Readable for CHCTL0_INPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl0_input::W](W) writer structure"] impl crate::Writable for CHCTL0_INPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL0_Input to value 0"] impl crate::Resettable for CHCTL0_INPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL2 register accessor: an alias for `Reg`"] pub type CHCTL2 = crate::Reg; #[doc = "capture/compare enable register"] pub mod chctl2 { #[doc = "Register `CHCTL2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0NP` reader - Capture/Compare 0 output Polarity"] pub struct CH0NP_R(crate::FieldReader); impl CH0NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0NP` writer - Capture/Compare 0 output Polarity"] pub struct CH0NP_W<'a> { w: &'a mut W, } impl<'a> CH0NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH0P` reader - Capture/Compare 0 output Polarity"] pub struct CH0P_R(crate::FieldReader); impl CH0P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0P` writer - Capture/Compare 0 output Polarity"] pub struct CH0P_W<'a> { w: &'a mut W, } impl<'a> CH0P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CH0EN` reader - Capture/Compare 1 output enable"] pub struct CH0EN_R(crate::FieldReader); impl CH0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0EN` writer - Capture/Compare 1 output enable"] pub struct CH0EN_W<'a> { w: &'a mut W, } impl<'a> CH0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 3 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0np(&self) -> CH0NP_R { CH0NP_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0p(&self) -> CH0P_R { CH0P_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Capture/Compare 1 output enable"] #[inline(always)] pub fn ch0en(&self) -> CH0EN_R { CH0EN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 3 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0np(&mut self) -> CH0NP_W { CH0NP_W { w: self } } #[doc = "Bit 1 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0p(&mut self) -> CH0P_W { CH0P_W { w: self } } #[doc = "Bit 0 - Capture/Compare 1 output enable"] #[inline(always)] pub fn ch0en(&mut self) -> CH0EN_W { CH0EN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl2](index.html) module"] pub struct CHCTL2_SPEC; impl crate::RegisterSpec for CHCTL2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl2::R](R) reader structure"] impl crate::Readable for CHCTL2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl2::W](W) writer structure"] impl crate::Writable for CHCTL2_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL2 to value 0"] impl crate::Resettable for CHCTL2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CNT register accessor: an alias for `Reg`"] pub type CNT = crate::Reg; #[doc = "counter"] pub mod cnt { #[doc = "Register `CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - counter value"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - counter value"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - counter value"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - counter value"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] pub struct CNT_SPEC; impl crate::RegisterSpec for CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cnt::R](R) reader structure"] impl crate::Readable for CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] impl crate::Writable for CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CNT to value 0"] impl crate::Resettable for CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PSC register accessor: an alias for `Reg`"] pub type PSC = crate::Reg; #[doc = "prescaler"] pub mod psc { #[doc = "Register `PSC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PSC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PSC` reader - Prescaler value"] pub struct PSC_R(crate::FieldReader); impl PSC_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSC` writer - Prescaler value"] pub struct PSC_W<'a> { w: &'a mut W, } impl<'a> PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&self) -> PSC_R { PSC_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&mut self) -> PSC_W { PSC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](index.html) module"] pub struct PSC_SPEC; impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [psc::R](R) reader structure"] impl crate::Readable for PSC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [psc::W](W) writer structure"] impl crate::Writable for PSC_SPEC { type Writer = W; } #[doc = "`reset()` method sets PSC to value 0"] impl crate::Resettable for PSC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CAR register accessor: an alias for `Reg`"] pub type CAR = crate::Reg; #[doc = "auto-reload register"] pub mod car { #[doc = "Register `CAR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CAR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CARL` reader - Auto-reload value"] pub struct CARL_R(crate::FieldReader); impl CARL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CARL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CARL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CARL` writer - Auto-reload value"] pub struct CARL_W<'a> { w: &'a mut W, } impl<'a> CARL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Auto-reload value"] #[inline(always)] pub fn carl(&self) -> CARL_R { CARL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Auto-reload value"] #[inline(always)] pub fn carl(&mut self) -> CARL_W { CARL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [car](index.html) module"] pub struct CAR_SPEC; impl crate::RegisterSpec for CAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [car::R](R) reader structure"] impl crate::Readable for CAR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [car::W](W) writer structure"] impl crate::Writable for CAR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CAR to value 0"] impl crate::Resettable for CAR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH0CV register accessor: an alias for `Reg`"] pub type CH0CV = crate::Reg; #[doc = "capture/compare register 0"] pub mod ch0cv { #[doc = "Register `CH0CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH0CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0VAL` reader - Capture/Compare 1 value"] pub struct CH0VAL_R(crate::FieldReader); impl CH0VAL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CH0VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0VAL` writer - Capture/Compare 1 value"] pub struct CH0VAL_W<'a> { w: &'a mut W, } impl<'a> CH0VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Capture/Compare 1 value"] #[inline(always)] pub fn ch0val(&self) -> CH0VAL_R { CH0VAL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Capture/Compare 1 value"] #[inline(always)] pub fn ch0val(&mut self) -> CH0VAL_W { CH0VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0cv](index.html) module"] pub struct CH0CV_SPEC; impl crate::RegisterSpec for CH0CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch0cv::R](R) reader structure"] impl crate::Readable for CH0CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch0cv::W](W) writer structure"] impl crate::Writable for CH0CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH0CV to value 0"] impl crate::Resettable for CH0CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "IRMP register accessor: an alias for `Reg`"] pub type IRMP = crate::Reg; #[doc = "channel input remap register"] pub mod irmp { #[doc = "Register `IRMP` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `IRMP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CI0_RMP` reader - Timer input 0 remap"] pub struct CI0_RMP_R(crate::FieldReader); impl CI0_RMP_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CI0_RMP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CI0_RMP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CI0_RMP` writer - Timer input 0 remap"] pub struct CI0_RMP_W<'a> { w: &'a mut W, } impl<'a> CI0_RMP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 0:1 - Timer input 0 remap"] #[inline(always)] pub fn ci0_rmp(&self) -> CI0_RMP_R { CI0_RMP_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 0:1 - Timer input 0 remap"] #[inline(always)] pub fn ci0_rmp(&mut self) -> CI0_RMP_W { CI0_RMP_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "channel input remap register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irmp](index.html) module"] pub struct IRMP_SPEC; impl crate::RegisterSpec for IRMP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [irmp::R](R) reader structure"] impl crate::Readable for IRMP_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [irmp::W](W) writer structure"] impl crate::Writable for IRMP_SPEC { type Writer = W; } #[doc = "`reset()` method sets IRMP to value 0"] impl crate::Resettable for IRMP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CFG register accessor: an alias for `Reg`"] pub type CFG = crate::Reg; #[doc = "configuration register"] pub mod cfg { #[doc = "Register `CFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHVSEL` reader - Write CHxVAL register selection"] pub struct CHVSEL_R(crate::FieldReader); impl CHVSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHVSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHVSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHVSEL` writer - Write CHxVAL register selection"] pub struct CHVSEL_W<'a> { w: &'a mut W, } impl<'a> CHVSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } impl R { #[doc = "Bit 1 - Write CHxVAL register selection"] #[inline(always)] pub fn chvsel(&self) -> CHVSEL_R { CHVSEL_R::new(((self.bits >> 1) & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Write CHxVAL register selection"] #[inline(always)] pub fn chvsel(&mut self) -> CHVSEL_W { CHVSEL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFG_SPEC; impl crate::RegisterSpec for CFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg::R](R) reader structure"] impl crate::Readable for CFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] impl crate::Writable for CFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG to value 0"] impl crate::Resettable for CFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose-timers"] pub struct TIMER14 { _marker: PhantomData<*const ()>, } unsafe impl Send for TIMER14 {} impl TIMER14 { #[doc = r"Pointer to the register block"] pub const PTR: *const timer14::RegisterBlock = 0x4001_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const timer14::RegisterBlock { Self::PTR } } impl Deref for TIMER14 { type Target = timer14::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for TIMER14 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("TIMER14").finish() } } #[doc = "General-purpose-timers"] pub mod timer14 { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register 0"] pub ctl0: crate::Reg, #[doc = "0x04 - control register 1"] pub ctl1: crate::Reg, #[doc = "0x08 - slave mode configuration register"] pub smcfg: crate::Reg, #[doc = "0x0c - DMA/Interrupt enable register"] pub dmainten: crate::Reg, #[doc = "0x10 - interrupt flag register"] pub intf: crate::Reg, #[doc = "0x14 - event generation register"] pub swevg: crate::Reg, _reserved_6_chctl0: [u8; 0x04], _reserved7: [u8; 0x04], #[doc = "0x20 - capture/compare enable register"] pub chctl2: crate::Reg, #[doc = "0x24 - counter"] pub cnt: crate::Reg, #[doc = "0x28 - prescaler"] pub psc: crate::Reg, #[doc = "0x2c - auto-reload register"] pub car: crate::Reg, #[doc = "0x30 - repetition counter register"] pub crep: crate::Reg, #[doc = "0x34 - capture/compare register 0"] pub ch0cv: crate::Reg, #[doc = "0x38 - capture/compare register 1"] pub ch1cv: crate::Reg, _reserved14: [u8; 0x08], #[doc = "0x44 - break and dead-time register"] pub cchp: crate::Reg, #[doc = "0x48 - DMA configuration register"] pub dmacfg: crate::Reg, #[doc = "0x4c - DMA transfer buffer register"] pub dmatb: crate::Reg, _reserved17: [u8; 0xac], #[doc = "0xfc - configuration register"] pub cfg: crate::Reg, } impl RegisterBlock { #[doc = "0x18 - capture/compare mode register 0 (input mode)"] #[inline(always)] pub fn chctl0_input(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const crate::Reg) } } #[doc = "0x18 - capture/compare mode register (output mode)"] #[inline(always)] pub fn chctl0_output(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const crate::Reg) } } } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "control register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CKDIV` reader - Clock division"] pub struct CKDIV_R(crate::FieldReader); impl CKDIV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CKDIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKDIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKDIV` writer - Clock division"] pub struct CKDIV_W<'a> { w: &'a mut W, } impl<'a> CKDIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `ARSE` reader - Auto-reload preload enable"] pub struct ARSE_R(crate::FieldReader); impl ARSE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ARSE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ARSE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ARSE` writer - Auto-reload preload enable"] pub struct ARSE_W<'a> { w: &'a mut W, } impl<'a> ARSE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SPM` reader - One-pulse mode"] pub struct SPM_R(crate::FieldReader); impl SPM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPM` writer - One-pulse mode"] pub struct SPM_W<'a> { w: &'a mut W, } impl<'a> SPM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `UPS` reader - Update request source"] pub struct UPS_R(crate::FieldReader); impl UPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPS` writer - Update request source"] pub struct UPS_W<'a> { w: &'a mut W, } impl<'a> UPS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `UPDIS` reader - Update disable"] pub struct UPDIS_R(crate::FieldReader); impl UPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDIS` writer - Update disable"] pub struct UPDIS_W<'a> { w: &'a mut W, } impl<'a> UPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CEN` reader - Counter enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Counter enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckdiv(&self) -> CKDIV_R { CKDIV_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&self) -> ARSE_R { ARSE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn spm(&self) -> SPM_R { SPM_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&self) -> UPS_R { UPS_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&self) -> UPDIS_R { UPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckdiv(&mut self) -> CKDIV_W { CKDIV_W { w: self } } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&mut self) -> ARSE_W { ARSE_W { w: self } } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn spm(&mut self) -> SPM_W { SPM_W { w: self } } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&mut self) -> UPS_W { UPS_W { w: self } } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&mut self) -> UPDIS_W { UPDIS_W { w: self } } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ISO1` reader - Output Idle state 1"] pub struct ISO1_R(crate::FieldReader); impl ISO1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO1` writer - Output Idle state 1"] pub struct ISO1_W<'a> { w: &'a mut W, } impl<'a> ISO1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `ISO0N` reader - Output Idle state 0"] pub struct ISO0N_R(crate::FieldReader); impl ISO0N_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO0N_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO0N_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO0N` writer - Output Idle state 0"] pub struct ISO0N_W<'a> { w: &'a mut W, } impl<'a> ISO0N_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `ISO0` reader - Output Idle state 0"] pub struct ISO0_R(crate::FieldReader); impl ISO0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO0` writer - Output Idle state 0"] pub struct ISO0_W<'a> { w: &'a mut W, } impl<'a> ISO0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `MMC` reader - Master mode selection"] pub struct MMC_R(crate::FieldReader); impl MMC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MMC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MMC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MMC` writer - Master mode selection"] pub struct MMC_W<'a> { w: &'a mut W, } impl<'a> MMC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `DMAS` reader - Capture/compare DMA selection"] pub struct DMAS_R(crate::FieldReader); impl DMAS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DMAS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMAS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMAS` writer - Capture/compare DMA selection"] pub struct DMAS_W<'a> { w: &'a mut W, } impl<'a> DMAS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CCUC` reader - Capture/compare control update selection"] pub struct CCUC_R(crate::FieldReader); impl CCUC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CCUC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CCUC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CCUC` writer - Capture/compare control update selection"] pub struct CCUC_W<'a> { w: &'a mut W, } impl<'a> CCUC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CCSE` reader - Capture/compare preloaded control"] pub struct CCSE_R(crate::FieldReader); impl CCSE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CCSE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CCSE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CCSE` writer - Capture/compare preloaded control"] pub struct CCSE_W<'a> { w: &'a mut W, } impl<'a> CCSE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 10 - Output Idle state 1"] #[inline(always)] pub fn iso1(&self) -> ISO1_R { ISO1_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Output Idle state 0"] #[inline(always)] pub fn iso0n(&self) -> ISO0N_R { ISO0N_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Output Idle state 0"] #[inline(always)] pub fn iso0(&self) -> ISO0_R { ISO0_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 4:6 - Master mode selection"] #[inline(always)] pub fn mmc(&self) -> MMC_R { MMC_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - Capture/compare DMA selection"] #[inline(always)] pub fn dmas(&self) -> DMAS_R { DMAS_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Capture/compare control update selection"] #[inline(always)] pub fn ccuc(&self) -> CCUC_R { CCUC_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 0 - Capture/compare preloaded control"] #[inline(always)] pub fn ccse(&self) -> CCSE_R { CCSE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 10 - Output Idle state 1"] #[inline(always)] pub fn iso1(&mut self) -> ISO1_W { ISO1_W { w: self } } #[doc = "Bit 9 - Output Idle state 0"] #[inline(always)] pub fn iso0n(&mut self) -> ISO0N_W { ISO0N_W { w: self } } #[doc = "Bit 8 - Output Idle state 0"] #[inline(always)] pub fn iso0(&mut self) -> ISO0_W { ISO0_W { w: self } } #[doc = "Bits 4:6 - Master mode selection"] #[inline(always)] pub fn mmc(&mut self) -> MMC_W { MMC_W { w: self } } #[doc = "Bit 3 - Capture/compare DMA selection"] #[inline(always)] pub fn dmas(&mut self) -> DMAS_W { DMAS_W { w: self } } #[doc = "Bit 2 - Capture/compare control update selection"] #[inline(always)] pub fn ccuc(&mut self) -> CCUC_W { CCUC_W { w: self } } #[doc = "Bit 0 - Capture/compare preloaded control"] #[inline(always)] pub fn ccse(&mut self) -> CCSE_W { CCSE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SMCFG register accessor: an alias for `Reg`"] pub type SMCFG = crate::Reg; #[doc = "slave mode configuration register"] pub mod smcfg { #[doc = "Register `SMCFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `SMCFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MSM` reader - Master/Slave mode"] pub struct MSM_R(crate::FieldReader); impl MSM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MSM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MSM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MSM` writer - Master/Slave mode"] pub struct MSM_W<'a> { w: &'a mut W, } impl<'a> MSM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TRGS` reader - Trigger selection"] pub struct TRGS_R(crate::FieldReader); impl TRGS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TRGS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGS` writer - Trigger selection"] pub struct TRGS_W<'a> { w: &'a mut W, } impl<'a> TRGS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `SMC` reader - Slave mode selection"] pub struct SMC_R(crate::FieldReader); impl SMC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SMC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SMC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SMC` writer - Slave mode selection"] pub struct SMC_W<'a> { w: &'a mut W, } impl<'a> SMC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); self.w } } impl R { #[doc = "Bit 7 - Master/Slave mode"] #[inline(always)] pub fn msm(&self) -> MSM_R { MSM_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 4:6 - Trigger selection"] #[inline(always)] pub fn trgs(&self) -> TRGS_R { TRGS_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bits 0:2 - Slave mode selection"] #[inline(always)] pub fn smc(&self) -> SMC_R { SMC_R::new((self.bits & 0x07) as u8) } } impl W { #[doc = "Bit 7 - Master/Slave mode"] #[inline(always)] pub fn msm(&mut self) -> MSM_W { MSM_W { w: self } } #[doc = "Bits 4:6 - Trigger selection"] #[inline(always)] pub fn trgs(&mut self) -> TRGS_W { TRGS_W { w: self } } #[doc = "Bits 0:2 - Slave mode selection"] #[inline(always)] pub fn smc(&mut self) -> SMC_W { SMC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "slave mode configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [smcfg](index.html) module"] pub struct SMCFG_SPEC; impl crate::RegisterSpec for SMCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [smcfg::R](R) reader structure"] impl crate::Readable for SMCFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [smcfg::W](W) writer structure"] impl crate::Writable for SMCFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SMCFG to value 0"] impl crate::Resettable for SMCFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMAINTEN register accessor: an alias for `Reg`"] pub type DMAINTEN = crate::Reg; #[doc = "DMA/Interrupt enable register"] pub mod dmainten { #[doc = "Register `DMAINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMAINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TRGDEN` reader - Trigger DMA request enable"] pub struct TRGDEN_R(crate::FieldReader); impl TRGDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRGDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGDEN` writer - Trigger DMA request enable"] pub struct TRGDEN_W<'a> { w: &'a mut W, } impl<'a> TRGDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `CMTDEN` reader - Commutation DMA request enable"] pub struct CMTDEN_R(crate::FieldReader); impl CMTDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMTDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMTDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMTDEN` writer - Commutation DMA request enable"] pub struct CMTDEN_W<'a> { w: &'a mut W, } impl<'a> CMTDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `CH1DEN` reader - Capture/Compare 1 DMA request enable"] pub struct CH1DEN_R(crate::FieldReader); impl CH1DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1DEN` writer - Capture/Compare 1 DMA request enable"] pub struct CH1DEN_W<'a> { w: &'a mut W, } impl<'a> CH1DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH0DEN` reader - Capture/Compare 0 DMA request enable"] pub struct CH0DEN_R(crate::FieldReader); impl CH0DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0DEN` writer - Capture/Compare 0 DMA request enable"] pub struct CH0DEN_W<'a> { w: &'a mut W, } impl<'a> CH0DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `UPDEN` reader - Update DMA request enable"] pub struct UPDEN_R(crate::FieldReader); impl UPDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDEN` writer - Update DMA request enable"] pub struct UPDEN_W<'a> { w: &'a mut W, } impl<'a> UPDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `BRKIE` reader - Break interrupt enable"] pub struct BRKIE_R(crate::FieldReader); impl BRKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKIE` writer - Break interrupt enable"] pub struct BRKIE_W<'a> { w: &'a mut W, } impl<'a> BRKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TRGIE` reader - Trigger interrupt enable"] pub struct TRGIE_R(crate::FieldReader); impl TRGIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRGIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGIE` writer - Trigger interrupt enable"] pub struct TRGIE_W<'a> { w: &'a mut W, } impl<'a> TRGIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CMTIE` reader - COM interrupt enable"] pub struct CMTIE_R(crate::FieldReader); impl CMTIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMTIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMTIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMTIE` writer - COM interrupt enable"] pub struct CMTIE_W<'a> { w: &'a mut W, } impl<'a> CMTIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH1IE` reader - Capture/Compare 2 interrupt enable"] pub struct CH1IE_R(crate::FieldReader); impl CH1IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1IE` writer - Capture/Compare 2 interrupt enable"] pub struct CH1IE_W<'a> { w: &'a mut W, } impl<'a> CH1IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0IE` reader - Capture/Compare 1 interrupt enable"] pub struct CH0IE_R(crate::FieldReader); impl CH0IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0IE` writer - Capture/Compare 1 interrupt enable"] pub struct CH0IE_W<'a> { w: &'a mut W, } impl<'a> CH0IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPIE` reader - Update interrupt enable"] pub struct UPIE_R(crate::FieldReader); impl UPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIE` writer - Update interrupt enable"] pub struct UPIE_W<'a> { w: &'a mut W, } impl<'a> UPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 14 - Trigger DMA request enable"] #[inline(always)] pub fn trgden(&self) -> TRGDEN_R { TRGDEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Commutation DMA request enable"] #[inline(always)] pub fn cmtden(&self) -> CMTDEN_R { CMTDEN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 10 - Capture/Compare 1 DMA request enable"] #[inline(always)] pub fn ch1den(&self) -> CH1DEN_R { CH1DEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Capture/Compare 0 DMA request enable"] #[inline(always)] pub fn ch0den(&self) -> CH0DEN_R { CH0DEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Update DMA request enable"] #[inline(always)] pub fn upden(&self) -> UPDEN_R { UPDEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Break interrupt enable"] #[inline(always)] pub fn brkie(&self) -> BRKIE_R { BRKIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Trigger interrupt enable"] #[inline(always)] pub fn trgie(&self) -> TRGIE_R { TRGIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - COM interrupt enable"] #[inline(always)] pub fn cmtie(&self) -> CMTIE_R { CMTIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 2 - Capture/Compare 2 interrupt enable"] #[inline(always)] pub fn ch1ie(&self) -> CH1IE_R { CH1IE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Capture/Compare 1 interrupt enable"] #[inline(always)] pub fn ch0ie(&self) -> CH0IE_R { CH0IE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&self) -> UPIE_R { UPIE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 14 - Trigger DMA request enable"] #[inline(always)] pub fn trgden(&mut self) -> TRGDEN_W { TRGDEN_W { w: self } } #[doc = "Bit 13 - Commutation DMA request enable"] #[inline(always)] pub fn cmtden(&mut self) -> CMTDEN_W { CMTDEN_W { w: self } } #[doc = "Bit 10 - Capture/Compare 1 DMA request enable"] #[inline(always)] pub fn ch1den(&mut self) -> CH1DEN_W { CH1DEN_W { w: self } } #[doc = "Bit 9 - Capture/Compare 0 DMA request enable"] #[inline(always)] pub fn ch0den(&mut self) -> CH0DEN_W { CH0DEN_W { w: self } } #[doc = "Bit 8 - Update DMA request enable"] #[inline(always)] pub fn upden(&mut self) -> UPDEN_W { UPDEN_W { w: self } } #[doc = "Bit 7 - Break interrupt enable"] #[inline(always)] pub fn brkie(&mut self) -> BRKIE_W { BRKIE_W { w: self } } #[doc = "Bit 6 - Trigger interrupt enable"] #[inline(always)] pub fn trgie(&mut self) -> TRGIE_W { TRGIE_W { w: self } } #[doc = "Bit 5 - COM interrupt enable"] #[inline(always)] pub fn cmtie(&mut self) -> CMTIE_W { CMTIE_W { w: self } } #[doc = "Bit 2 - Capture/Compare 2 interrupt enable"] #[inline(always)] pub fn ch1ie(&mut self) -> CH1IE_W { CH1IE_W { w: self } } #[doc = "Bit 1 - Capture/Compare 1 interrupt enable"] #[inline(always)] pub fn ch0ie(&mut self) -> CH0IE_W { CH0IE_W { w: self } } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&mut self) -> UPIE_W { UPIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmainten](index.html) module"] pub struct DMAINTEN_SPEC; impl crate::RegisterSpec for DMAINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmainten::R](R) reader structure"] impl crate::Readable for DMAINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmainten::W](W) writer structure"] impl crate::Writable for DMAINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMAINTEN to value 0"] impl crate::Resettable for DMAINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTF register accessor: an alias for `Reg`"] pub type INTF = crate::Reg; #[doc = "interrupt flag register"] pub mod intf { #[doc = "Register `INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1OF` reader - Capture/compare 1 overcapture flag"] pub struct CH1OF_R(crate::FieldReader); impl CH1OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1OF` writer - Capture/compare 1 overcapture flag"] pub struct CH1OF_W<'a> { w: &'a mut W, } impl<'a> CH1OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH0OF` reader - Capture/Compare 0 overcapture flag"] pub struct CH0OF_R(crate::FieldReader); impl CH0OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0OF` writer - Capture/Compare 0 overcapture flag"] pub struct CH0OF_W<'a> { w: &'a mut W, } impl<'a> CH0OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `BRKIF` reader - Break interrupt flag"] pub struct BRKIF_R(crate::FieldReader); impl BRKIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKIF` writer - Break interrupt flag"] pub struct BRKIF_W<'a> { w: &'a mut W, } impl<'a> BRKIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TRGIF` reader - Trigger interrupt flag"] pub struct TRGIF_R(crate::FieldReader); impl TRGIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRGIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGIF` writer - Trigger interrupt flag"] pub struct TRGIF_W<'a> { w: &'a mut W, } impl<'a> TRGIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CMTIF` reader - COM interrupt flag"] pub struct CMTIF_R(crate::FieldReader); impl CMTIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMTIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMTIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMTIF` writer - COM interrupt flag"] pub struct CMTIF_W<'a> { w: &'a mut W, } impl<'a> CMTIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH1IF` reader - Capture/Compare 1 interrupt flag"] pub struct CH1IF_R(crate::FieldReader); impl CH1IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1IF` writer - Capture/Compare 1 interrupt flag"] pub struct CH1IF_W<'a> { w: &'a mut W, } impl<'a> CH1IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0IF` reader - Capture/compare 0 interrupt flag"] pub struct CH0IF_R(crate::FieldReader); impl CH0IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0IF` writer - Capture/compare 0 interrupt flag"] pub struct CH0IF_W<'a> { w: &'a mut W, } impl<'a> CH0IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPIF` reader - Update interrupt flag"] pub struct UPIF_R(crate::FieldReader); impl UPIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIF` writer - Update interrupt flag"] pub struct UPIF_W<'a> { w: &'a mut W, } impl<'a> UPIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 10 - Capture/compare 1 overcapture flag"] #[inline(always)] pub fn ch1of(&self) -> CH1OF_R { CH1OF_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Capture/Compare 0 overcapture flag"] #[inline(always)] pub fn ch0of(&self) -> CH0OF_R { CH0OF_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 7 - Break interrupt flag"] #[inline(always)] pub fn brkif(&self) -> BRKIF_R { BRKIF_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Trigger interrupt flag"] #[inline(always)] pub fn trgif(&self) -> TRGIF_R { TRGIF_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - COM interrupt flag"] #[inline(always)] pub fn cmtif(&self) -> CMTIF_R { CMTIF_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 2 - Capture/Compare 1 interrupt flag"] #[inline(always)] pub fn ch1if(&self) -> CH1IF_R { CH1IF_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Capture/compare 0 interrupt flag"] #[inline(always)] pub fn ch0if(&self) -> CH0IF_R { CH0IF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&self) -> UPIF_R { UPIF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 10 - Capture/compare 1 overcapture flag"] #[inline(always)] pub fn ch1of(&mut self) -> CH1OF_W { CH1OF_W { w: self } } #[doc = "Bit 9 - Capture/Compare 0 overcapture flag"] #[inline(always)] pub fn ch0of(&mut self) -> CH0OF_W { CH0OF_W { w: self } } #[doc = "Bit 7 - Break interrupt flag"] #[inline(always)] pub fn brkif(&mut self) -> BRKIF_W { BRKIF_W { w: self } } #[doc = "Bit 6 - Trigger interrupt flag"] #[inline(always)] pub fn trgif(&mut self) -> TRGIF_W { TRGIF_W { w: self } } #[doc = "Bit 5 - COM interrupt flag"] #[inline(always)] pub fn cmtif(&mut self) -> CMTIF_W { CMTIF_W { w: self } } #[doc = "Bit 2 - Capture/Compare 1 interrupt flag"] #[inline(always)] pub fn ch1if(&mut self) -> CH1IF_W { CH1IF_W { w: self } } #[doc = "Bit 1 - Capture/compare 0 interrupt flag"] #[inline(always)] pub fn ch0if(&mut self) -> CH0IF_W { CH0IF_W { w: self } } #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&mut self) -> UPIF_W { UPIF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intf](index.html) module"] pub struct INTF_SPEC; impl crate::RegisterSpec for INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [intf::R](R) reader structure"] impl crate::Readable for INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [intf::W](W) writer structure"] impl crate::Writable for INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTF to value 0"] impl crate::Resettable for INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SWEVG register accessor: an alias for `Reg`"] pub type SWEVG = crate::Reg; #[doc = "event generation register"] pub mod swevg { #[doc = "Register `SWEVG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BRKG` writer - Break generation"] pub struct BRKG_W<'a> { w: &'a mut W, } impl<'a> BRKG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TRGG` writer - Trigger generation"] pub struct TRGG_W<'a> { w: &'a mut W, } impl<'a> TRGG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `CMTG` writer - Capture/Compare control update generation"] pub struct CMTG_W<'a> { w: &'a mut W, } impl<'a> CMTG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH1G` writer - Capture/compare 1 generation"] pub struct CH1G_W<'a> { w: &'a mut W, } impl<'a> CH1G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0G` writer - Capture/compare 0 generation"] pub struct CH0G_W<'a> { w: &'a mut W, } impl<'a> CH0G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPG` writer - Update generation"] pub struct UPG_W<'a> { w: &'a mut W, } impl<'a> UPG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 7 - Break generation"] #[inline(always)] pub fn brkg(&mut self) -> BRKG_W { BRKG_W { w: self } } #[doc = "Bit 6 - Trigger generation"] #[inline(always)] pub fn trgg(&mut self) -> TRGG_W { TRGG_W { w: self } } #[doc = "Bit 5 - Capture/Compare control update generation"] #[inline(always)] pub fn cmtg(&mut self) -> CMTG_W { CMTG_W { w: self } } #[doc = "Bit 2 - Capture/compare 1 generation"] #[inline(always)] pub fn ch1g(&mut self) -> CH1G_W { CH1G_W { w: self } } #[doc = "Bit 1 - Capture/compare 0 generation"] #[inline(always)] pub fn ch0g(&mut self) -> CH0G_W { CH0G_W { w: self } } #[doc = "Bit 0 - Update generation"] #[inline(always)] pub fn upg(&mut self) -> UPG_W { UPG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swevg](index.html) module"] pub struct SWEVG_SPEC; impl crate::RegisterSpec for SWEVG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [swevg::W](W) writer structure"] impl crate::Writable for SWEVG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SWEVG to value 0"] impl crate::Resettable for SWEVG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL0_Output register accessor: an alias for `Reg`"] pub type CHCTL0_OUTPUT = crate::Reg; #[doc = "capture/compare mode register (output mode)"] pub mod chctl0_output { #[doc = "Register `CHCTL0_Output` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL0_Output` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1COMCTL` reader - Output Compare 1 mode"] pub struct CH1COMCTL_R(crate::FieldReader); impl CH1COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMCTL` writer - Output Compare 1 mode"] pub struct CH1COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH1COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `CH1COMSEN` reader - Output Compare 1 preload enable"] pub struct CH1COMSEN_R(crate::FieldReader); impl CH1COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMSEN` writer - Output Compare 1 preload enable"] pub struct CH1COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH1COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CH1COMFEN` reader - Output Compare 1 fast enable"] pub struct CH1COMFEN_R(crate::FieldReader); impl CH1COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1COMFEN` writer - Output Compare 1 fast enable"] pub struct CH1COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH1COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CH1MS` reader - Capture/Compare 1 selection"] pub struct CH1MS_R(crate::FieldReader); impl CH1MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1MS` writer - Capture/Compare 1 selection"] pub struct CH1MS_W<'a> { w: &'a mut W, } impl<'a> CH1MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CH0COMCTL` reader - Output Compare 0 mode"] pub struct CH0COMCTL_R(crate::FieldReader); impl CH0COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMCTL` writer - Output Compare 0 mode"] pub struct CH0COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH0COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `CH0COMSEN` reader - Output Compare 0 preload enable"] pub struct CH0COMSEN_R(crate::FieldReader); impl CH0COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMSEN` writer - Output Compare 0 preload enable"] pub struct CH0COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH0COMFEN` reader - Output Compare 0 fast enable"] pub struct CH0COMFEN_R(crate::FieldReader); impl CH0COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMFEN` writer - Output Compare 0 fast enable"] pub struct CH0COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0MS` reader - Capture/Compare 0 selection"] pub struct CH0MS_R(crate::FieldReader); impl CH0MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0MS` writer - Capture/Compare 0 selection"] pub struct CH0MS_W<'a> { w: &'a mut W, } impl<'a> CH0MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 12:14 - Output Compare 1 mode"] #[inline(always)] pub fn ch1comctl(&self) -> CH1COMCTL_R { CH1COMCTL_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bit 11 - Output Compare 1 preload enable"] #[inline(always)] pub fn ch1comsen(&self) -> CH1COMSEN_R { CH1COMSEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Output Compare 1 fast enable"] #[inline(always)] pub fn ch1comfen(&self) -> CH1COMFEN_R { CH1COMFEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 8:9 - Capture/Compare 1 selection"] #[inline(always)] pub fn ch1ms(&self) -> CH1MS_R { CH1MS_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 4:6 - Output Compare 0 mode"] #[inline(always)] pub fn ch0comctl(&self) -> CH0COMCTL_R { CH0COMCTL_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - Output Compare 0 preload enable"] #[inline(always)] pub fn ch0comsen(&self) -> CH0COMSEN_R { CH0COMSEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Output Compare 0 fast enable"] #[inline(always)] pub fn ch0comfen(&self) -> CH0COMFEN_R { CH0COMFEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&self) -> CH0MS_R { CH0MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 12:14 - Output Compare 1 mode"] #[inline(always)] pub fn ch1comctl(&mut self) -> CH1COMCTL_W { CH1COMCTL_W { w: self } } #[doc = "Bit 11 - Output Compare 1 preload enable"] #[inline(always)] pub fn ch1comsen(&mut self) -> CH1COMSEN_W { CH1COMSEN_W { w: self } } #[doc = "Bit 10 - Output Compare 1 fast enable"] #[inline(always)] pub fn ch1comfen(&mut self) -> CH1COMFEN_W { CH1COMFEN_W { w: self } } #[doc = "Bits 8:9 - Capture/Compare 1 selection"] #[inline(always)] pub fn ch1ms(&mut self) -> CH1MS_W { CH1MS_W { w: self } } #[doc = "Bits 4:6 - Output Compare 0 mode"] #[inline(always)] pub fn ch0comctl(&mut self) -> CH0COMCTL_W { CH0COMCTL_W { w: self } } #[doc = "Bit 3 - Output Compare 0 preload enable"] #[inline(always)] pub fn ch0comsen(&mut self) -> CH0COMSEN_W { CH0COMSEN_W { w: self } } #[doc = "Bit 2 - Output Compare 0 fast enable"] #[inline(always)] pub fn ch0comfen(&mut self) -> CH0COMFEN_W { CH0COMFEN_W { w: self } } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&mut self) -> CH0MS_W { CH0MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl0_output](index.html) module"] pub struct CHCTL0_OUTPUT_SPEC; impl crate::RegisterSpec for CHCTL0_OUTPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl0_output::R](R) reader structure"] impl crate::Readable for CHCTL0_OUTPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl0_output::W](W) writer structure"] impl crate::Writable for CHCTL0_OUTPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL0_Output to value 0"] impl crate::Resettable for CHCTL0_OUTPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL0_Input register accessor: an alias for `Reg`"] pub type CHCTL0_INPUT = crate::Reg; #[doc = "capture/compare mode register 0 (input mode)"] pub mod chctl0_input { #[doc = "Register `CHCTL0_Input` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL0_Input` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1CAPFLT` reader - Input capture 1 filter"] pub struct CH1CAPFLT_R(crate::FieldReader); impl CH1CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1CAPFLT` writer - Input capture 1 filter"] pub struct CH1CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH1CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 12)) | ((value as u32 & 0x0f) << 12); self.w } } #[doc = "Field `CH1CAPPSC` reader - Input capture 1 prescaler"] pub struct CH1CAPPSC_R(crate::FieldReader); impl CH1CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1CAPPSC` writer - Input capture 1 prescaler"] pub struct CH1CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH1CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 10)) | ((value as u32 & 0x03) << 10); self.w } } #[doc = "Field `CH1MS` reader - Capture/Compare 1 selection"] pub struct CH1MS_R(crate::FieldReader); impl CH1MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH1MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1MS` writer - Capture/Compare 1 selection"] pub struct CH1MS_W<'a> { w: &'a mut W, } impl<'a> CH1MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `CH0CAPFLT` reader - Input capture 0 filter"] pub struct CH0CAPFLT_R(crate::FieldReader); impl CH0CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0CAPFLT` writer - Input capture 0 filter"] pub struct CH0CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH0CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `CH0CAPPSC` reader - Input capture 0 prescaler"] pub struct CH0CAPPSC_R(crate::FieldReader); impl CH0CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0CAPPSC` writer - Input capture 0 prescaler"] pub struct CH0CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH0CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CH0MS` reader - Capture/Compare 0 selection"] pub struct CH0MS_R(crate::FieldReader); impl CH0MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0MS` writer - Capture/Compare 0 selection"] pub struct CH0MS_W<'a> { w: &'a mut W, } impl<'a> CH0MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 12:15 - Input capture 1 filter"] #[inline(always)] pub fn ch1capflt(&self) -> CH1CAPFLT_R { CH1CAPFLT_R::new(((self.bits >> 12) & 0x0f) as u8) } #[doc = "Bits 10:11 - Input capture 1 prescaler"] #[inline(always)] pub fn ch1cappsc(&self) -> CH1CAPPSC_R { CH1CAPPSC_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bits 8:9 - Capture/Compare 1 selection"] #[inline(always)] pub fn ch1ms(&self) -> CH1MS_R { CH1MS_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 4:7 - Input capture 0 filter"] #[inline(always)] pub fn ch0capflt(&self) -> CH0CAPFLT_R { CH0CAPFLT_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 2:3 - Input capture 0 prescaler"] #[inline(always)] pub fn ch0cappsc(&self) -> CH0CAPPSC_R { CH0CAPPSC_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&self) -> CH0MS_R { CH0MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 12:15 - Input capture 1 filter"] #[inline(always)] pub fn ch1capflt(&mut self) -> CH1CAPFLT_W { CH1CAPFLT_W { w: self } } #[doc = "Bits 10:11 - Input capture 1 prescaler"] #[inline(always)] pub fn ch1cappsc(&mut self) -> CH1CAPPSC_W { CH1CAPPSC_W { w: self } } #[doc = "Bits 8:9 - Capture/Compare 1 selection"] #[inline(always)] pub fn ch1ms(&mut self) -> CH1MS_W { CH1MS_W { w: self } } #[doc = "Bits 4:7 - Input capture 0 filter"] #[inline(always)] pub fn ch0capflt(&mut self) -> CH0CAPFLT_W { CH0CAPFLT_W { w: self } } #[doc = "Bits 2:3 - Input capture 0 prescaler"] #[inline(always)] pub fn ch0cappsc(&mut self) -> CH0CAPPSC_W { CH0CAPPSC_W { w: self } } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&mut self) -> CH0MS_W { CH0MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register 0 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl0_input](index.html) module"] pub struct CHCTL0_INPUT_SPEC; impl crate::RegisterSpec for CHCTL0_INPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl0_input::R](R) reader structure"] impl crate::Readable for CHCTL0_INPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl0_input::W](W) writer structure"] impl crate::Writable for CHCTL0_INPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL0_Input to value 0"] impl crate::Resettable for CHCTL0_INPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL2 register accessor: an alias for `Reg`"] pub type CHCTL2 = crate::Reg; #[doc = "capture/compare enable register"] pub mod chctl2 { #[doc = "Register `CHCTL2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1NP` reader - Capture/Compare 1 output Polarity"] pub struct CH1NP_R(crate::FieldReader); impl CH1NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1NP` writer - Capture/Compare 1 output Polarity"] pub struct CH1NP_W<'a> { w: &'a mut W, } impl<'a> CH1NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CH1P` reader - Capture/Compare 1 output Polarity"] pub struct CH1P_R(crate::FieldReader); impl CH1P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1P` writer - Capture/Compare 1 output Polarity"] pub struct CH1P_W<'a> { w: &'a mut W, } impl<'a> CH1P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH1EN` reader - Capture/Compare 1 output enable"] pub struct CH1EN_R(crate::FieldReader); impl CH1EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH1EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1EN` writer - Capture/Compare 1 output enable"] pub struct CH1EN_W<'a> { w: &'a mut W, } impl<'a> CH1EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CH0NP` reader - Capture/Compare 0 output Polarity"] pub struct CH0NP_R(crate::FieldReader); impl CH0NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0NP` writer - Capture/Compare 0 output Polarity"] pub struct CH0NP_W<'a> { w: &'a mut W, } impl<'a> CH0NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH0NEN` reader - Capture/Compare 0 complementary output enable"] pub struct CH0NEN_R(crate::FieldReader); impl CH0NEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0NEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0NEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0NEN` writer - Capture/Compare 0 complementary output enable"] pub struct CH0NEN_W<'a> { w: &'a mut W, } impl<'a> CH0NEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0P` reader - Capture/Compare 0 output Polarity"] pub struct CH0P_R(crate::FieldReader); impl CH0P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0P` writer - Capture/Compare 0 output Polarity"] pub struct CH0P_W<'a> { w: &'a mut W, } impl<'a> CH0P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CH0EN` reader - Capture/Compare 0 output enable"] pub struct CH0EN_R(crate::FieldReader); impl CH0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0EN` writer - Capture/Compare 0 output enable"] pub struct CH0EN_W<'a> { w: &'a mut W, } impl<'a> CH0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 7 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1np(&self) -> CH1NP_R { CH1NP_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 5 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1p(&self) -> CH1P_R { CH1P_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Capture/Compare 1 output enable"] #[inline(always)] pub fn ch1en(&self) -> CH1EN_R { CH1EN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0np(&self) -> CH0NP_R { CH0NP_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Capture/Compare 0 complementary output enable"] #[inline(always)] pub fn ch0nen(&self) -> CH0NEN_R { CH0NEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0p(&self) -> CH0P_R { CH0P_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Capture/Compare 0 output enable"] #[inline(always)] pub fn ch0en(&self) -> CH0EN_R { CH0EN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 7 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1np(&mut self) -> CH1NP_W { CH1NP_W { w: self } } #[doc = "Bit 5 - Capture/Compare 1 output Polarity"] #[inline(always)] pub fn ch1p(&mut self) -> CH1P_W { CH1P_W { w: self } } #[doc = "Bit 4 - Capture/Compare 1 output enable"] #[inline(always)] pub fn ch1en(&mut self) -> CH1EN_W { CH1EN_W { w: self } } #[doc = "Bit 3 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0np(&mut self) -> CH0NP_W { CH0NP_W { w: self } } #[doc = "Bit 2 - Capture/Compare 0 complementary output enable"] #[inline(always)] pub fn ch0nen(&mut self) -> CH0NEN_W { CH0NEN_W { w: self } } #[doc = "Bit 1 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0p(&mut self) -> CH0P_W { CH0P_W { w: self } } #[doc = "Bit 0 - Capture/Compare 0 output enable"] #[inline(always)] pub fn ch0en(&mut self) -> CH0EN_W { CH0EN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl2](index.html) module"] pub struct CHCTL2_SPEC; impl crate::RegisterSpec for CHCTL2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl2::R](R) reader structure"] impl crate::Readable for CHCTL2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl2::W](W) writer structure"] impl crate::Writable for CHCTL2_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL2 to value 0"] impl crate::Resettable for CHCTL2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CNT register accessor: an alias for `Reg`"] pub type CNT = crate::Reg; #[doc = "counter"] pub mod cnt { #[doc = "Register `CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - counter value"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - counter value"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - counter value"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - counter value"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] pub struct CNT_SPEC; impl crate::RegisterSpec for CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cnt::R](R) reader structure"] impl crate::Readable for CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] impl crate::Writable for CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CNT to value 0"] impl crate::Resettable for CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PSC register accessor: an alias for `Reg`"] pub type PSC = crate::Reg; #[doc = "prescaler"] pub mod psc { #[doc = "Register `PSC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PSC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PSC` reader - Prescaler value"] pub struct PSC_R(crate::FieldReader); impl PSC_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSC` writer - Prescaler value"] pub struct PSC_W<'a> { w: &'a mut W, } impl<'a> PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&self) -> PSC_R { PSC_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&mut self) -> PSC_W { PSC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](index.html) module"] pub struct PSC_SPEC; impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [psc::R](R) reader structure"] impl crate::Readable for PSC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [psc::W](W) writer structure"] impl crate::Writable for PSC_SPEC { type Writer = W; } #[doc = "`reset()` method sets PSC to value 0"] impl crate::Resettable for PSC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CAR register accessor: an alias for `Reg`"] pub type CAR = crate::Reg; #[doc = "auto-reload register"] pub mod car { #[doc = "Register `CAR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CAR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CARL` reader - Auto-reload value"] pub struct CARL_R(crate::FieldReader); impl CARL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CARL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CARL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CARL` writer - Auto-reload value"] pub struct CARL_W<'a> { w: &'a mut W, } impl<'a> CARL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Auto-reload value"] #[inline(always)] pub fn carl(&self) -> CARL_R { CARL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Auto-reload value"] #[inline(always)] pub fn carl(&mut self) -> CARL_W { CARL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [car](index.html) module"] pub struct CAR_SPEC; impl crate::RegisterSpec for CAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [car::R](R) reader structure"] impl crate::Readable for CAR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [car::W](W) writer structure"] impl crate::Writable for CAR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CAR to value 0"] impl crate::Resettable for CAR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CREP register accessor: an alias for `Reg`"] pub type CREP = crate::Reg; #[doc = "repetition counter register"] pub mod crep { #[doc = "Register `CREP` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CREP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CREP` reader - Repetition counter value"] pub struct CREP_R(crate::FieldReader); impl CREP_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CREP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CREP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CREP` writer - Repetition counter value"] pub struct CREP_W<'a> { w: &'a mut W, } impl<'a> CREP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bits 0:7 - Repetition counter value"] #[inline(always)] pub fn crep(&self) -> CREP_R { CREP_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Repetition counter value"] #[inline(always)] pub fn crep(&mut self) -> CREP_W { CREP_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "repetition counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [crep](index.html) module"] pub struct CREP_SPEC; impl crate::RegisterSpec for CREP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [crep::R](R) reader structure"] impl crate::Readable for CREP_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [crep::W](W) writer structure"] impl crate::Writable for CREP_SPEC { type Writer = W; } #[doc = "`reset()` method sets CREP to value 0"] impl crate::Resettable for CREP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH0CV register accessor: an alias for `Reg`"] pub type CH0CV = crate::Reg; #[doc = "capture/compare register 0"] pub mod ch0cv { #[doc = "Register `CH0CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH0CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0VAL` reader - Capture/Compare 0 value"] pub struct CH0VAL_R(crate::FieldReader); impl CH0VAL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CH0VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0VAL` writer - Capture/Compare 0 value"] pub struct CH0VAL_W<'a> { w: &'a mut W, } impl<'a> CH0VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Capture/Compare 0 value"] #[inline(always)] pub fn ch0val(&self) -> CH0VAL_R { CH0VAL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Capture/Compare 0 value"] #[inline(always)] pub fn ch0val(&mut self) -> CH0VAL_W { CH0VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0cv](index.html) module"] pub struct CH0CV_SPEC; impl crate::RegisterSpec for CH0CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch0cv::R](R) reader structure"] impl crate::Readable for CH0CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch0cv::W](W) writer structure"] impl crate::Writable for CH0CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH0CV to value 0"] impl crate::Resettable for CH0CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH1CV register accessor: an alias for `Reg`"] pub type CH1CV = crate::Reg; #[doc = "capture/compare register 1"] pub mod ch1cv { #[doc = "Register `CH1CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH1CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH1VAL` reader - Capture/Compare 1 value"] pub struct CH1VAL_R(crate::FieldReader); impl CH1VAL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CH1VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH1VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH1VAL` writer - Capture/Compare 1 value"] pub struct CH1VAL_W<'a> { w: &'a mut W, } impl<'a> CH1VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Capture/Compare 1 value"] #[inline(always)] pub fn ch1val(&self) -> CH1VAL_R { CH1VAL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Capture/Compare 1 value"] #[inline(always)] pub fn ch1val(&mut self) -> CH1VAL_W { CH1VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1cv](index.html) module"] pub struct CH1CV_SPEC; impl crate::RegisterSpec for CH1CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch1cv::R](R) reader structure"] impl crate::Readable for CH1CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch1cv::W](W) writer structure"] impl crate::Writable for CH1CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH1CV to value 0"] impl crate::Resettable for CH1CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CCHP register accessor: an alias for `Reg`"] pub type CCHP = crate::Reg; #[doc = "break and dead-time register"] pub mod cchp { #[doc = "Register `CCHP` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CCHP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `POEN` reader - Main output enable"] pub struct POEN_R(crate::FieldReader); impl POEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { POEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for POEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `POEN` writer - Main output enable"] pub struct POEN_W<'a> { w: &'a mut W, } impl<'a> POEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OAEN` reader - Automatic output enable"] pub struct OAEN_R(crate::FieldReader); impl OAEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OAEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OAEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OAEN` writer - Automatic output enable"] pub struct OAEN_W<'a> { w: &'a mut W, } impl<'a> OAEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `BRKP` reader - Break polarity"] pub struct BRKP_R(crate::FieldReader); impl BRKP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKP` writer - Break polarity"] pub struct BRKP_W<'a> { w: &'a mut W, } impl<'a> BRKP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `BRKEN` reader - Break enable"] pub struct BRKEN_R(crate::FieldReader); impl BRKEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKEN` writer - Break enable"] pub struct BRKEN_W<'a> { w: &'a mut W, } impl<'a> BRKEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `ROS` reader - Off-state selection for Run mode"] pub struct ROS_R(crate::FieldReader); impl ROS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ROS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ROS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ROS` writer - Off-state selection for Run mode"] pub struct ROS_W<'a> { w: &'a mut W, } impl<'a> ROS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `IOS` reader - Off-state selection for Idle mode"] pub struct IOS_R(crate::FieldReader); impl IOS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IOS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IOS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IOS` writer - Off-state selection for Idle mode"] pub struct IOS_W<'a> { w: &'a mut W, } impl<'a> IOS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `PROT` reader - complementary register protect control"] pub struct PROT_R(crate::FieldReader); impl PROT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PROT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PROT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PROT` writer - complementary register protect control"] pub struct PROT_W<'a> { w: &'a mut W, } impl<'a> PROT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `DTCFG` reader - Dead-time generator configure"] pub struct DTCFG_R(crate::FieldReader); impl DTCFG_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DTCFG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTCFG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTCFG` writer - Dead-time generator configure"] pub struct DTCFG_W<'a> { w: &'a mut W, } impl<'a> DTCFG_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bit 15 - Main output enable"] #[inline(always)] pub fn poen(&self) -> POEN_R { POEN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Automatic output enable"] #[inline(always)] pub fn oaen(&self) -> OAEN_R { OAEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Break polarity"] #[inline(always)] pub fn brkp(&self) -> BRKP_R { BRKP_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Break enable"] #[inline(always)] pub fn brken(&self) -> BRKEN_R { BRKEN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Off-state selection for Run mode"] #[inline(always)] pub fn ros(&self) -> ROS_R { ROS_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Off-state selection for Idle mode"] #[inline(always)] pub fn ios(&self) -> IOS_R { IOS_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 8:9 - complementary register protect control"] #[inline(always)] pub fn prot(&self) -> PROT_R { PROT_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 0:7 - Dead-time generator configure"] #[inline(always)] pub fn dtcfg(&self) -> DTCFG_R { DTCFG_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bit 15 - Main output enable"] #[inline(always)] pub fn poen(&mut self) -> POEN_W { POEN_W { w: self } } #[doc = "Bit 14 - Automatic output enable"] #[inline(always)] pub fn oaen(&mut self) -> OAEN_W { OAEN_W { w: self } } #[doc = "Bit 13 - Break polarity"] #[inline(always)] pub fn brkp(&mut self) -> BRKP_W { BRKP_W { w: self } } #[doc = "Bit 12 - Break enable"] #[inline(always)] pub fn brken(&mut self) -> BRKEN_W { BRKEN_W { w: self } } #[doc = "Bit 11 - Off-state selection for Run mode"] #[inline(always)] pub fn ros(&mut self) -> ROS_W { ROS_W { w: self } } #[doc = "Bit 10 - Off-state selection for Idle mode"] #[inline(always)] pub fn ios(&mut self) -> IOS_W { IOS_W { w: self } } #[doc = "Bits 8:9 - complementary register protect control"] #[inline(always)] pub fn prot(&mut self) -> PROT_W { PROT_W { w: self } } #[doc = "Bits 0:7 - Dead-time generator configure"] #[inline(always)] pub fn dtcfg(&mut self) -> DTCFG_W { DTCFG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "break and dead-time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cchp](index.html) module"] pub struct CCHP_SPEC; impl crate::RegisterSpec for CCHP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cchp::R](R) reader structure"] impl crate::Readable for CCHP_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cchp::W](W) writer structure"] impl crate::Writable for CCHP_SPEC { type Writer = W; } #[doc = "`reset()` method sets CCHP to value 0"] impl crate::Resettable for CCHP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMACFG register accessor: an alias for `Reg`"] pub type DMACFG = crate::Reg; #[doc = "DMA configuration register"] pub mod dmacfg { #[doc = "Register `DMACFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMACFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DMATC` reader - DMA burst length"] pub struct DMATC_R(crate::FieldReader); impl DMATC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DMATC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATC` writer - DMA burst length"] pub struct DMATC_W<'a> { w: &'a mut W, } impl<'a> DMATC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 8)) | ((value as u32 & 0x1f) << 8); self.w } } #[doc = "Field `DMATA` reader - DMA base address"] pub struct DMATA_R(crate::FieldReader); impl DMATA_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DMATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATA` writer - DMA base address"] pub struct DMATA_W<'a> { w: &'a mut W, } impl<'a> DMATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); self.w } } impl R { #[doc = "Bits 8:12 - DMA burst length"] #[inline(always)] pub fn dmatc(&self) -> DMATC_R { DMATC_R::new(((self.bits >> 8) & 0x1f) as u8) } #[doc = "Bits 0:4 - DMA base address"] #[inline(always)] pub fn dmata(&self) -> DMATA_R { DMATA_R::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 8:12 - DMA burst length"] #[inline(always)] pub fn dmatc(&mut self) -> DMATC_W { DMATC_W { w: self } } #[doc = "Bits 0:4 - DMA base address"] #[inline(always)] pub fn dmata(&mut self) -> DMATA_W { DMATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmacfg](index.html) module"] pub struct DMACFG_SPEC; impl crate::RegisterSpec for DMACFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmacfg::R](R) reader structure"] impl crate::Readable for DMACFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmacfg::W](W) writer structure"] impl crate::Writable for DMACFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMACFG to value 0"] impl crate::Resettable for DMACFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMATB register accessor: an alias for `Reg`"] pub type DMATB = crate::Reg; #[doc = "DMA transfer buffer register"] pub mod dmatb { #[doc = "Register `DMATB` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMATB` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DMATB` reader - DMA register for burst accesses"] pub struct DMATB_R(crate::FieldReader); impl DMATB_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { DMATB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATB` writer - DMA register for burst accesses"] pub struct DMATB_W<'a> { w: &'a mut W, } impl<'a> DMATB_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - DMA register for burst accesses"] #[inline(always)] pub fn dmatb(&self) -> DMATB_R { DMATB_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - DMA register for burst accesses"] #[inline(always)] pub fn dmatb(&mut self) -> DMATB_W { DMATB_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA transfer buffer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmatb](index.html) module"] pub struct DMATB_SPEC; impl crate::RegisterSpec for DMATB_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmatb::R](R) reader structure"] impl crate::Readable for DMATB_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmatb::W](W) writer structure"] impl crate::Writable for DMATB_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMATB to value 0"] impl crate::Resettable for DMATB_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CFG register accessor: an alias for `Reg`"] pub type CFG = crate::Reg; #[doc = "configuration register"] pub mod cfg { #[doc = "Register `CFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CHVSEL` reader - Write CHxVAL register selection"] pub struct CHVSEL_R(crate::FieldReader); impl CHVSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHVSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHVSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHVSEL` writer - Write CHxVAL register selection"] pub struct CHVSEL_W<'a> { w: &'a mut W, } impl<'a> CHVSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OUTSEL` reader - The output value selection"] pub struct OUTSEL_R(crate::FieldReader); impl OUTSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OUTSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OUTSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OUTSEL` writer - The output value selection"] pub struct OUTSEL_W<'a> { w: &'a mut W, } impl<'a> OUTSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 1 - Write CHxVAL register selection"] #[inline(always)] pub fn chvsel(&self) -> CHVSEL_R { CHVSEL_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - The output value selection"] #[inline(always)] pub fn outsel(&self) -> OUTSEL_R { OUTSEL_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Write CHxVAL register selection"] #[inline(always)] pub fn chvsel(&mut self) -> CHVSEL_W { CHVSEL_W { w: self } } #[doc = "Bit 0 - The output value selection"] #[inline(always)] pub fn outsel(&mut self) -> OUTSEL_W { OUTSEL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFG_SPEC; impl crate::RegisterSpec for CFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg::R](R) reader structure"] impl crate::Readable for CFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] impl crate::Writable for CFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG to value 0"] impl crate::Resettable for CFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose-timers"] pub struct TIMER15 { _marker: PhantomData<*const ()>, } unsafe impl Send for TIMER15 {} impl TIMER15 { #[doc = r"Pointer to the register block"] pub const PTR: *const timer15::RegisterBlock = 0x4001_4400 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const timer15::RegisterBlock { Self::PTR } } impl Deref for TIMER15 { type Target = timer15::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for TIMER15 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("TIMER15").finish() } } #[doc = "General-purpose-timers"] pub mod timer15 { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register 0"] pub ctl0: crate::Reg, #[doc = "0x04 - control register 1"] pub ctl1: crate::Reg, _reserved2: [u8; 0x04], #[doc = "0x0c - DMA/Interrupt enable register"] pub dmainten: crate::Reg, #[doc = "0x10 - interrupt flag register"] pub intf: crate::Reg, #[doc = "0x14 - event generation register"] pub swevg: crate::Reg, _reserved_5_chctl0: [u8; 0x04], _reserved6: [u8; 0x04], #[doc = "0x20 - capture/compare enable register"] pub chctl2: crate::Reg, #[doc = "0x24 - counter"] pub cnt: crate::Reg, #[doc = "0x28 - prescaler"] pub psc: crate::Reg, #[doc = "0x2c - auto-reload register"] pub car: crate::Reg, #[doc = "0x30 - repetition counter register"] pub crep: crate::Reg, #[doc = "0x34 - capture/compare register 0"] pub ch0cv: crate::Reg, _reserved12: [u8; 0x0c], #[doc = "0x44 - break and dead-time register"] pub cchp: crate::Reg, #[doc = "0x48 - DMA configuration register"] pub dmacfg: crate::Reg, #[doc = "0x4c - DMA transfer buffer register"] pub dmatb: crate::Reg, _reserved15: [u8; 0xac], #[doc = "0xfc - configuration register"] pub cfg: crate::Reg, } impl RegisterBlock { #[doc = "0x18 - capture/compare mode register 0 (input mode)"] #[inline(always)] pub fn chctl0_input(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const crate::Reg) } } #[doc = "0x18 - capture/compare mode register (output mode)"] #[inline(always)] pub fn chctl0_output(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(24usize) as *const crate::Reg) } } } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "control register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CKDIV` reader - Clock division"] pub struct CKDIV_R(crate::FieldReader); impl CKDIV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CKDIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKDIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKDIV` writer - Clock division"] pub struct CKDIV_W<'a> { w: &'a mut W, } impl<'a> CKDIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `ARSE` reader - Auto-reload preload enable"] pub struct ARSE_R(crate::FieldReader); impl ARSE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ARSE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ARSE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ARSE` writer - Auto-reload preload enable"] pub struct ARSE_W<'a> { w: &'a mut W, } impl<'a> ARSE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `SPM` reader - One-pulse mode"] pub struct SPM_R(crate::FieldReader); impl SPM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPM` writer - One-pulse mode"] pub struct SPM_W<'a> { w: &'a mut W, } impl<'a> SPM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `UPS` reader - Update request source"] pub struct UPS_R(crate::FieldReader); impl UPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPS` writer - Update request source"] pub struct UPS_W<'a> { w: &'a mut W, } impl<'a> UPS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `UPDIS` reader - Update disable"] pub struct UPDIS_R(crate::FieldReader); impl UPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDIS` writer - Update disable"] pub struct UPDIS_W<'a> { w: &'a mut W, } impl<'a> UPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CEN` reader - Counter enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Counter enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckdiv(&self) -> CKDIV_R { CKDIV_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&self) -> ARSE_R { ARSE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn spm(&self) -> SPM_R { SPM_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&self) -> UPS_R { UPS_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&self) -> UPDIS_R { UPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 8:9 - Clock division"] #[inline(always)] pub fn ckdiv(&mut self) -> CKDIV_W { CKDIV_W { w: self } } #[doc = "Bit 7 - Auto-reload preload enable"] #[inline(always)] pub fn arse(&mut self) -> ARSE_W { ARSE_W { w: self } } #[doc = "Bit 3 - One-pulse mode"] #[inline(always)] pub fn spm(&mut self) -> SPM_W { SPM_W { w: self } } #[doc = "Bit 2 - Update request source"] #[inline(always)] pub fn ups(&mut self) -> UPS_W { UPS_W { w: self } } #[doc = "Bit 1 - Update disable"] #[inline(always)] pub fn updis(&mut self) -> UPDIS_W { UPDIS_W { w: self } } #[doc = "Bit 0 - Counter enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ISO0N` reader - Output Idle state 0"] pub struct ISO0N_R(crate::FieldReader); impl ISO0N_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO0N_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO0N_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO0N` writer - Output Idle state 0"] pub struct ISO0N_W<'a> { w: &'a mut W, } impl<'a> ISO0N_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `ISO0` reader - Output Idle state 0"] pub struct ISO0_R(crate::FieldReader); impl ISO0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISO0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISO0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISO0` writer - Output Idle state 0"] pub struct ISO0_W<'a> { w: &'a mut W, } impl<'a> ISO0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `DMAS` reader - Capture/compare DMA selection"] pub struct DMAS_R(crate::FieldReader); impl DMAS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DMAS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMAS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMAS` writer - Capture/compare DMA selection"] pub struct DMAS_W<'a> { w: &'a mut W, } impl<'a> DMAS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CCUC` reader - Capture/compare control update selection"] pub struct CCUC_R(crate::FieldReader); impl CCUC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CCUC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CCUC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CCUC` writer - Capture/compare control update selection"] pub struct CCUC_W<'a> { w: &'a mut W, } impl<'a> CCUC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CCSE` reader - Capture/compare preloaded control"] pub struct CCSE_R(crate::FieldReader); impl CCSE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CCSE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CCSE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CCSE` writer - Capture/compare preloaded control"] pub struct CCSE_W<'a> { w: &'a mut W, } impl<'a> CCSE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 9 - Output Idle state 0"] #[inline(always)] pub fn iso0n(&self) -> ISO0N_R { ISO0N_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Output Idle state 0"] #[inline(always)] pub fn iso0(&self) -> ISO0_R { ISO0_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 3 - Capture/compare DMA selection"] #[inline(always)] pub fn dmas(&self) -> DMAS_R { DMAS_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Capture/compare control update selection"] #[inline(always)] pub fn ccuc(&self) -> CCUC_R { CCUC_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 0 - Capture/compare preloaded control"] #[inline(always)] pub fn ccse(&self) -> CCSE_R { CCSE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 9 - Output Idle state 0"] #[inline(always)] pub fn iso0n(&mut self) -> ISO0N_W { ISO0N_W { w: self } } #[doc = "Bit 8 - Output Idle state 0"] #[inline(always)] pub fn iso0(&mut self) -> ISO0_W { ISO0_W { w: self } } #[doc = "Bit 3 - Capture/compare DMA selection"] #[inline(always)] pub fn dmas(&mut self) -> DMAS_W { DMAS_W { w: self } } #[doc = "Bit 2 - Capture/compare control update selection"] #[inline(always)] pub fn ccuc(&mut self) -> CCUC_W { CCUC_W { w: self } } #[doc = "Bit 0 - Capture/compare preloaded control"] #[inline(always)] pub fn ccse(&mut self) -> CCSE_W { CCSE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMAINTEN register accessor: an alias for `Reg`"] pub type DMAINTEN = crate::Reg; #[doc = "DMA/Interrupt enable register"] pub mod dmainten { #[doc = "Register `DMAINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMAINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0DEN` reader - Capture/Compare 0 DMA request enable"] pub struct CH0DEN_R(crate::FieldReader); impl CH0DEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0DEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0DEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0DEN` writer - Capture/Compare 0 DMA request enable"] pub struct CH0DEN_W<'a> { w: &'a mut W, } impl<'a> CH0DEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `UPDEN` reader - Update DMA request enable"] pub struct UPDEN_R(crate::FieldReader); impl UPDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPDEN` writer - Update DMA request enable"] pub struct UPDEN_W<'a> { w: &'a mut W, } impl<'a> UPDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `BRKIE` reader - Break interrupt enable"] pub struct BRKIE_R(crate::FieldReader); impl BRKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKIE` writer - Break interrupt enable"] pub struct BRKIE_W<'a> { w: &'a mut W, } impl<'a> BRKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CMTIE` reader - COM interrupt enable"] pub struct CMTIE_R(crate::FieldReader); impl CMTIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMTIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMTIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMTIE` writer - COM interrupt enable"] pub struct CMTIE_W<'a> { w: &'a mut W, } impl<'a> CMTIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH0IE` reader - Capture/Compare 0 interrupt enable"] pub struct CH0IE_R(crate::FieldReader); impl CH0IE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0IE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0IE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0IE` writer - Capture/Compare 0 interrupt enable"] pub struct CH0IE_W<'a> { w: &'a mut W, } impl<'a> CH0IE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPIE` reader - Update interrupt enable"] pub struct UPIE_R(crate::FieldReader); impl UPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIE` writer - Update interrupt enable"] pub struct UPIE_W<'a> { w: &'a mut W, } impl<'a> UPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 9 - Capture/Compare 0 DMA request enable"] #[inline(always)] pub fn ch0den(&self) -> CH0DEN_R { CH0DEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Update DMA request enable"] #[inline(always)] pub fn upden(&self) -> UPDEN_R { UPDEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Break interrupt enable"] #[inline(always)] pub fn brkie(&self) -> BRKIE_R { BRKIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 5 - COM interrupt enable"] #[inline(always)] pub fn cmtie(&self) -> CMTIE_R { CMTIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 1 - Capture/Compare 0 interrupt enable"] #[inline(always)] pub fn ch0ie(&self) -> CH0IE_R { CH0IE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&self) -> UPIE_R { UPIE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 9 - Capture/Compare 0 DMA request enable"] #[inline(always)] pub fn ch0den(&mut self) -> CH0DEN_W { CH0DEN_W { w: self } } #[doc = "Bit 8 - Update DMA request enable"] #[inline(always)] pub fn upden(&mut self) -> UPDEN_W { UPDEN_W { w: self } } #[doc = "Bit 7 - Break interrupt enable"] #[inline(always)] pub fn brkie(&mut self) -> BRKIE_W { BRKIE_W { w: self } } #[doc = "Bit 5 - COM interrupt enable"] #[inline(always)] pub fn cmtie(&mut self) -> CMTIE_W { CMTIE_W { w: self } } #[doc = "Bit 1 - Capture/Compare 0 interrupt enable"] #[inline(always)] pub fn ch0ie(&mut self) -> CH0IE_W { CH0IE_W { w: self } } #[doc = "Bit 0 - Update interrupt enable"] #[inline(always)] pub fn upie(&mut self) -> UPIE_W { UPIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA/Interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmainten](index.html) module"] pub struct DMAINTEN_SPEC; impl crate::RegisterSpec for DMAINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmainten::R](R) reader structure"] impl crate::Readable for DMAINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmainten::W](W) writer structure"] impl crate::Writable for DMAINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMAINTEN to value 0"] impl crate::Resettable for DMAINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTF register accessor: an alias for `Reg`"] pub type INTF = crate::Reg; #[doc = "interrupt flag register"] pub mod intf { #[doc = "Register `INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0OF` reader - Capture/Compare 0 overcapture flag"] pub struct CH0OF_R(crate::FieldReader); impl CH0OF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0OF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0OF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0OF` writer - Capture/Compare 0 overcapture flag"] pub struct CH0OF_W<'a> { w: &'a mut W, } impl<'a> CH0OF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `BRKIF` reader - Break interrupt flag"] pub struct BRKIF_R(crate::FieldReader); impl BRKIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKIF` writer - Break interrupt flag"] pub struct BRKIF_W<'a> { w: &'a mut W, } impl<'a> BRKIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CMTIF` reader - COM interrupt flag"] pub struct CMTIF_R(crate::FieldReader); impl CMTIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMTIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMTIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMTIF` writer - COM interrupt flag"] pub struct CMTIF_W<'a> { w: &'a mut W, } impl<'a> CMTIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH0IF` reader - Capture/compare 0 interrupt flag"] pub struct CH0IF_R(crate::FieldReader); impl CH0IF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0IF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0IF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0IF` writer - Capture/compare 0 interrupt flag"] pub struct CH0IF_W<'a> { w: &'a mut W, } impl<'a> CH0IF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPIF` reader - Update interrupt flag"] pub struct UPIF_R(crate::FieldReader); impl UPIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UPIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UPIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UPIF` writer - Update interrupt flag"] pub struct UPIF_W<'a> { w: &'a mut W, } impl<'a> UPIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 9 - Capture/Compare 0 overcapture flag"] #[inline(always)] pub fn ch0of(&self) -> CH0OF_R { CH0OF_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 7 - Break interrupt flag"] #[inline(always)] pub fn brkif(&self) -> BRKIF_R { BRKIF_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 5 - COM interrupt flag"] #[inline(always)] pub fn cmtif(&self) -> CMTIF_R { CMTIF_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 1 - Capture/compare 0 interrupt flag"] #[inline(always)] pub fn ch0if(&self) -> CH0IF_R { CH0IF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&self) -> UPIF_R { UPIF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 9 - Capture/Compare 0 overcapture flag"] #[inline(always)] pub fn ch0of(&mut self) -> CH0OF_W { CH0OF_W { w: self } } #[doc = "Bit 7 - Break interrupt flag"] #[inline(always)] pub fn brkif(&mut self) -> BRKIF_W { BRKIF_W { w: self } } #[doc = "Bit 5 - COM interrupt flag"] #[inline(always)] pub fn cmtif(&mut self) -> CMTIF_W { CMTIF_W { w: self } } #[doc = "Bit 1 - Capture/compare 0 interrupt flag"] #[inline(always)] pub fn ch0if(&mut self) -> CH0IF_W { CH0IF_W { w: self } } #[doc = "Bit 0 - Update interrupt flag"] #[inline(always)] pub fn upif(&mut self) -> UPIF_W { UPIF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intf](index.html) module"] pub struct INTF_SPEC; impl crate::RegisterSpec for INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [intf::R](R) reader structure"] impl crate::Readable for INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [intf::W](W) writer structure"] impl crate::Writable for INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTF to value 0"] impl crate::Resettable for INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SWEVG register accessor: an alias for `Reg`"] pub type SWEVG = crate::Reg; #[doc = "event generation register"] pub mod swevg { #[doc = "Register `SWEVG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BRKG` writer - Break generation"] pub struct BRKG_W<'a> { w: &'a mut W, } impl<'a> BRKG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CMTG` writer - Capture/Compare control update generation"] pub struct CMTG_W<'a> { w: &'a mut W, } impl<'a> CMTG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `CH0G` writer - Capture/compare 0 generation"] pub struct CH0G_W<'a> { w: &'a mut W, } impl<'a> CH0G_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UPG` writer - Update generation"] pub struct UPG_W<'a> { w: &'a mut W, } impl<'a> UPG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 7 - Break generation"] #[inline(always)] pub fn brkg(&mut self) -> BRKG_W { BRKG_W { w: self } } #[doc = "Bit 5 - Capture/Compare control update generation"] #[inline(always)] pub fn cmtg(&mut self) -> CMTG_W { CMTG_W { w: self } } #[doc = "Bit 1 - Capture/compare 0 generation"] #[inline(always)] pub fn ch0g(&mut self) -> CH0G_W { CH0G_W { w: self } } #[doc = "Bit 0 - Update generation"] #[inline(always)] pub fn upg(&mut self) -> UPG_W { UPG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "event generation register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swevg](index.html) module"] pub struct SWEVG_SPEC; impl crate::RegisterSpec for SWEVG_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [swevg::W](W) writer structure"] impl crate::Writable for SWEVG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SWEVG to value 0"] impl crate::Resettable for SWEVG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL0_Output register accessor: an alias for `Reg`"] pub type CHCTL0_OUTPUT = crate::Reg; #[doc = "capture/compare mode register (output mode)"] pub mod chctl0_output { #[doc = "Register `CHCTL0_Output` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL0_Output` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0COMCTL` reader - Output Compare 0 mode"] pub struct CH0COMCTL_R(crate::FieldReader); impl CH0COMCTL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0COMCTL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMCTL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMCTL` writer - Output Compare 0 mode"] pub struct CH0COMCTL_W<'a> { w: &'a mut W, } impl<'a> CH0COMCTL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 4)) | ((value as u32 & 0x07) << 4); self.w } } #[doc = "Field `CH0COMSEN` reader - Output Compare 0 preload enable"] pub struct CH0COMSEN_R(crate::FieldReader); impl CH0COMSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMSEN` writer - Output Compare 0 preload enable"] pub struct CH0COMSEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH0COMFEN` reader - Output Compare 0 fast enable"] pub struct CH0COMFEN_R(crate::FieldReader); impl CH0COMFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0COMFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0COMFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0COMFEN` writer - Output Compare 0 fast enable"] pub struct CH0COMFEN_W<'a> { w: &'a mut W, } impl<'a> CH0COMFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0MS` reader - Capture/Compare 0 selection"] pub struct CH0MS_R(crate::FieldReader); impl CH0MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0MS` writer - Capture/Compare 0 selection"] pub struct CH0MS_W<'a> { w: &'a mut W, } impl<'a> CH0MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 4:6 - Output Compare 0 mode"] #[inline(always)] pub fn ch0comctl(&self) -> CH0COMCTL_R { CH0COMCTL_R::new(((self.bits >> 4) & 0x07) as u8) } #[doc = "Bit 3 - Output Compare 0 preload enable"] #[inline(always)] pub fn ch0comsen(&self) -> CH0COMSEN_R { CH0COMSEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Output Compare 0 fast enable"] #[inline(always)] pub fn ch0comfen(&self) -> CH0COMFEN_R { CH0COMFEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&self) -> CH0MS_R { CH0MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 4:6 - Output Compare 0 mode"] #[inline(always)] pub fn ch0comctl(&mut self) -> CH0COMCTL_W { CH0COMCTL_W { w: self } } #[doc = "Bit 3 - Output Compare 0 preload enable"] #[inline(always)] pub fn ch0comsen(&mut self) -> CH0COMSEN_W { CH0COMSEN_W { w: self } } #[doc = "Bit 2 - Output Compare 0 fast enable"] #[inline(always)] pub fn ch0comfen(&mut self) -> CH0COMFEN_W { CH0COMFEN_W { w: self } } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&mut self) -> CH0MS_W { CH0MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register (output mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl0_output](index.html) module"] pub struct CHCTL0_OUTPUT_SPEC; impl crate::RegisterSpec for CHCTL0_OUTPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl0_output::R](R) reader structure"] impl crate::Readable for CHCTL0_OUTPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl0_output::W](W) writer structure"] impl crate::Writable for CHCTL0_OUTPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL0_Output to value 0"] impl crate::Resettable for CHCTL0_OUTPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL0_Input register accessor: an alias for `Reg`"] pub type CHCTL0_INPUT = crate::Reg; #[doc = "capture/compare mode register 0 (input mode)"] pub mod chctl0_input { #[doc = "Register `CHCTL0_Input` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL0_Input` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0CAPFLT` reader - Input capture 0 filter"] pub struct CH0CAPFLT_R(crate::FieldReader); impl CH0CAPFLT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0CAPFLT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0CAPFLT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0CAPFLT` writer - Input capture 0 filter"] pub struct CH0CAPFLT_W<'a> { w: &'a mut W, } impl<'a> CH0CAPFLT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 4)) | ((value as u32 & 0x0f) << 4); self.w } } #[doc = "Field `CH0CAPPSC` reader - Input capture 0 prescaler"] pub struct CH0CAPPSC_R(crate::FieldReader); impl CH0CAPPSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0CAPPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0CAPPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0CAPPSC` writer - Input capture 0 prescaler"] pub struct CH0CAPPSC_W<'a> { w: &'a mut W, } impl<'a> CH0CAPPSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 2)) | ((value as u32 & 0x03) << 2); self.w } } #[doc = "Field `CH0MS` reader - Capture/Compare 0 selection"] pub struct CH0MS_R(crate::FieldReader); impl CH0MS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CH0MS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0MS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0MS` writer - Capture/Compare 0 selection"] pub struct CH0MS_W<'a> { w: &'a mut W, } impl<'a> CH0MS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 4:7 - Input capture 0 filter"] #[inline(always)] pub fn ch0capflt(&self) -> CH0CAPFLT_R { CH0CAPFLT_R::new(((self.bits >> 4) & 0x0f) as u8) } #[doc = "Bits 2:3 - Input capture 0 prescaler"] #[inline(always)] pub fn ch0cappsc(&self) -> CH0CAPPSC_R { CH0CAPPSC_R::new(((self.bits >> 2) & 0x03) as u8) } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&self) -> CH0MS_R { CH0MS_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 4:7 - Input capture 0 filter"] #[inline(always)] pub fn ch0capflt(&mut self) -> CH0CAPFLT_W { CH0CAPFLT_W { w: self } } #[doc = "Bits 2:3 - Input capture 0 prescaler"] #[inline(always)] pub fn ch0cappsc(&mut self) -> CH0CAPPSC_W { CH0CAPPSC_W { w: self } } #[doc = "Bits 0:1 - Capture/Compare 0 selection"] #[inline(always)] pub fn ch0ms(&mut self) -> CH0MS_W { CH0MS_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare mode register 0 (input mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl0_input](index.html) module"] pub struct CHCTL0_INPUT_SPEC; impl crate::RegisterSpec for CHCTL0_INPUT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl0_input::R](R) reader structure"] impl crate::Readable for CHCTL0_INPUT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl0_input::W](W) writer structure"] impl crate::Writable for CHCTL0_INPUT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL0_Input to value 0"] impl crate::Resettable for CHCTL0_INPUT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCTL2 register accessor: an alias for `Reg`"] pub type CHCTL2 = crate::Reg; #[doc = "capture/compare enable register"] pub mod chctl2 { #[doc = "Register `CHCTL2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCTL2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0NP` reader - Capture/Compare 0 output Polarity"] pub struct CH0NP_R(crate::FieldReader); impl CH0NP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0NP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0NP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0NP` writer - Capture/Compare 0 output Polarity"] pub struct CH0NP_W<'a> { w: &'a mut W, } impl<'a> CH0NP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `CH0NEN` reader - Capture/Compare 0 complementary output enable"] pub struct CH0NEN_R(crate::FieldReader); impl CH0NEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0NEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0NEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0NEN` writer - Capture/Compare 0 complementary output enable"] pub struct CH0NEN_W<'a> { w: &'a mut W, } impl<'a> CH0NEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `CH0P` reader - Capture/Compare 0 output Polarity"] pub struct CH0P_R(crate::FieldReader); impl CH0P_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0P_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0P_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0P` writer - Capture/Compare 0 output Polarity"] pub struct CH0P_W<'a> { w: &'a mut W, } impl<'a> CH0P_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CH0EN` reader - Capture/Compare 0 output enable"] pub struct CH0EN_R(crate::FieldReader); impl CH0EN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH0EN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0EN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0EN` writer - Capture/Compare 0 output enable"] pub struct CH0EN_W<'a> { w: &'a mut W, } impl<'a> CH0EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 3 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0np(&self) -> CH0NP_R { CH0NP_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Capture/Compare 0 complementary output enable"] #[inline(always)] pub fn ch0nen(&self) -> CH0NEN_R { CH0NEN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0p(&self) -> CH0P_R { CH0P_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Capture/Compare 0 output enable"] #[inline(always)] pub fn ch0en(&self) -> CH0EN_R { CH0EN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 3 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0np(&mut self) -> CH0NP_W { CH0NP_W { w: self } } #[doc = "Bit 2 - Capture/Compare 0 complementary output enable"] #[inline(always)] pub fn ch0nen(&mut self) -> CH0NEN_W { CH0NEN_W { w: self } } #[doc = "Bit 1 - Capture/Compare 0 output Polarity"] #[inline(always)] pub fn ch0p(&mut self) -> CH0P_W { CH0P_W { w: self } } #[doc = "Bit 0 - Capture/Compare 0 output enable"] #[inline(always)] pub fn ch0en(&mut self) -> CH0EN_W { CH0EN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chctl2](index.html) module"] pub struct CHCTL2_SPEC; impl crate::RegisterSpec for CHCTL2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chctl2::R](R) reader structure"] impl crate::Readable for CHCTL2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chctl2::W](W) writer structure"] impl crate::Writable for CHCTL2_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCTL2 to value 0"] impl crate::Resettable for CHCTL2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CNT register accessor: an alias for `Reg`"] pub type CNT = crate::Reg; #[doc = "counter"] pub mod cnt { #[doc = "Register `CNT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CNT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CNT` reader - counter value"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - counter value"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - counter value"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - counter value"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnt](index.html) module"] pub struct CNT_SPEC; impl crate::RegisterSpec for CNT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cnt::R](R) reader structure"] impl crate::Readable for CNT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cnt::W](W) writer structure"] impl crate::Writable for CNT_SPEC { type Writer = W; } #[doc = "`reset()` method sets CNT to value 0"] impl crate::Resettable for CNT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PSC register accessor: an alias for `Reg`"] pub type PSC = crate::Reg; #[doc = "prescaler"] pub mod psc { #[doc = "Register `PSC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PSC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PSC` reader - Prescaler value"] pub struct PSC_R(crate::FieldReader); impl PSC_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSC` writer - Prescaler value"] pub struct PSC_W<'a> { w: &'a mut W, } impl<'a> PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&self) -> PSC_R { PSC_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Prescaler value"] #[inline(always)] pub fn psc(&mut self) -> PSC_W { PSC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "prescaler\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psc](index.html) module"] pub struct PSC_SPEC; impl crate::RegisterSpec for PSC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [psc::R](R) reader structure"] impl crate::Readable for PSC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [psc::W](W) writer structure"] impl crate::Writable for PSC_SPEC { type Writer = W; } #[doc = "`reset()` method sets PSC to value 0"] impl crate::Resettable for PSC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CAR register accessor: an alias for `Reg`"] pub type CAR = crate::Reg; #[doc = "auto-reload register"] pub mod car { #[doc = "Register `CAR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CAR` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CARL` reader - Auto-reload value"] pub struct CARL_R(crate::FieldReader); impl CARL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CARL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CARL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CARL` writer - Auto-reload value"] pub struct CARL_W<'a> { w: &'a mut W, } impl<'a> CARL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Auto-reload value"] #[inline(always)] pub fn carl(&self) -> CARL_R { CARL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Auto-reload value"] #[inline(always)] pub fn carl(&mut self) -> CARL_W { CARL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "auto-reload register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [car](index.html) module"] pub struct CAR_SPEC; impl crate::RegisterSpec for CAR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [car::R](R) reader structure"] impl crate::Readable for CAR_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [car::W](W) writer structure"] impl crate::Writable for CAR_SPEC { type Writer = W; } #[doc = "`reset()` method sets CAR to value 0"] impl crate::Resettable for CAR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CREP register accessor: an alias for `Reg`"] pub type CREP = crate::Reg; #[doc = "repetition counter register"] pub mod crep { #[doc = "Register `CREP` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CREP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CREP` reader - Repetition counter value"] pub struct CREP_R(crate::FieldReader); impl CREP_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CREP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CREP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CREP` writer - Repetition counter value"] pub struct CREP_W<'a> { w: &'a mut W, } impl<'a> CREP_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bits 0:7 - Repetition counter value"] #[inline(always)] pub fn crep(&self) -> CREP_R { CREP_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Repetition counter value"] #[inline(always)] pub fn crep(&mut self) -> CREP_W { CREP_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "repetition counter register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [crep](index.html) module"] pub struct CREP_SPEC; impl crate::RegisterSpec for CREP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [crep::R](R) reader structure"] impl crate::Readable for CREP_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [crep::W](W) writer structure"] impl crate::Writable for CREP_SPEC { type Writer = W; } #[doc = "`reset()` method sets CREP to value 0"] impl crate::Resettable for CREP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CH0CV register accessor: an alias for `Reg`"] pub type CH0CV = crate::Reg; #[doc = "capture/compare register 0"] pub mod ch0cv { #[doc = "Register `CH0CV` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CH0CV` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CH0VAL` reader - Capture/Compare 0 value"] pub struct CH0VAL_R(crate::FieldReader); impl CH0VAL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CH0VAL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH0VAL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH0VAL` writer - Capture/Compare 0 value"] pub struct CH0VAL_W<'a> { w: &'a mut W, } impl<'a> CH0VAL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Capture/Compare 0 value"] #[inline(always)] pub fn ch0val(&self) -> CH0VAL_R { CH0VAL_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Capture/Compare 0 value"] #[inline(always)] pub fn ch0val(&mut self) -> CH0VAL_W { CH0VAL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "capture/compare register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch0cv](index.html) module"] pub struct CH0CV_SPEC; impl crate::RegisterSpec for CH0CV_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ch0cv::R](R) reader structure"] impl crate::Readable for CH0CV_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ch0cv::W](W) writer structure"] impl crate::Writable for CH0CV_SPEC { type Writer = W; } #[doc = "`reset()` method sets CH0CV to value 0"] impl crate::Resettable for CH0CV_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CCHP register accessor: an alias for `Reg`"] pub type CCHP = crate::Reg; #[doc = "break and dead-time register"] pub mod cchp { #[doc = "Register `CCHP` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CCHP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `POEN` reader - Main output enable"] pub struct POEN_R(crate::FieldReader); impl POEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { POEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for POEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `POEN` writer - Main output enable"] pub struct POEN_W<'a> { w: &'a mut W, } impl<'a> POEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `OAEN` reader - Automatic output enable"] pub struct OAEN_R(crate::FieldReader); impl OAEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OAEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OAEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OAEN` writer - Automatic output enable"] pub struct OAEN_W<'a> { w: &'a mut W, } impl<'a> OAEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `BRKP` reader - Break polarity"] pub struct BRKP_R(crate::FieldReader); impl BRKP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKP` writer - Break polarity"] pub struct BRKP_W<'a> { w: &'a mut W, } impl<'a> BRKP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `BRKEN` reader - Break enable"] pub struct BRKEN_R(crate::FieldReader); impl BRKEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BRKEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRKEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRKEN` writer - Break enable"] pub struct BRKEN_W<'a> { w: &'a mut W, } impl<'a> BRKEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `ROS` reader - Off-state selection for Run mode"] pub struct ROS_R(crate::FieldReader); impl ROS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ROS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ROS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ROS` writer - Off-state selection for Run mode"] pub struct ROS_W<'a> { w: &'a mut W, } impl<'a> ROS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `IOS` reader - Off-state selection for Idle mode"] pub struct IOS_R(crate::FieldReader); impl IOS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IOS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IOS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IOS` writer - Off-state selection for Idle mode"] pub struct IOS_W<'a> { w: &'a mut W, } impl<'a> IOS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `PROT` reader - complementary register protect control"] pub struct PROT_R(crate::FieldReader); impl PROT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PROT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PROT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PROT` writer - complementary register protect control"] pub struct PROT_W<'a> { w: &'a mut W, } impl<'a> PROT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 8)) | ((value as u32 & 0x03) << 8); self.w } } #[doc = "Field `DTCFG` reader - Dead-time generator setup"] pub struct DTCFG_R(crate::FieldReader); impl DTCFG_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DTCFG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTCFG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTCFG` writer - Dead-time generator setup"] pub struct DTCFG_W<'a> { w: &'a mut W, } impl<'a> DTCFG_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bit 15 - Main output enable"] #[inline(always)] pub fn poen(&self) -> POEN_R { POEN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Automatic output enable"] #[inline(always)] pub fn oaen(&self) -> OAEN_R { OAEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Break polarity"] #[inline(always)] pub fn brkp(&self) -> BRKP_R { BRKP_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Break enable"] #[inline(always)] pub fn brken(&self) -> BRKEN_R { BRKEN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Off-state selection for Run mode"] #[inline(always)] pub fn ros(&self) -> ROS_R { ROS_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Off-state selection for Idle mode"] #[inline(always)] pub fn ios(&self) -> IOS_R { IOS_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bits 8:9 - complementary register protect control"] #[inline(always)] pub fn prot(&self) -> PROT_R { PROT_R::new(((self.bits >> 8) & 0x03) as u8) } #[doc = "Bits 0:7 - Dead-time generator setup"] #[inline(always)] pub fn dtcfg(&self) -> DTCFG_R { DTCFG_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bit 15 - Main output enable"] #[inline(always)] pub fn poen(&mut self) -> POEN_W { POEN_W { w: self } } #[doc = "Bit 14 - Automatic output enable"] #[inline(always)] pub fn oaen(&mut self) -> OAEN_W { OAEN_W { w: self } } #[doc = "Bit 13 - Break polarity"] #[inline(always)] pub fn brkp(&mut self) -> BRKP_W { BRKP_W { w: self } } #[doc = "Bit 12 - Break enable"] #[inline(always)] pub fn brken(&mut self) -> BRKEN_W { BRKEN_W { w: self } } #[doc = "Bit 11 - Off-state selection for Run mode"] #[inline(always)] pub fn ros(&mut self) -> ROS_W { ROS_W { w: self } } #[doc = "Bit 10 - Off-state selection for Idle mode"] #[inline(always)] pub fn ios(&mut self) -> IOS_W { IOS_W { w: self } } #[doc = "Bits 8:9 - complementary register protect control"] #[inline(always)] pub fn prot(&mut self) -> PROT_W { PROT_W { w: self } } #[doc = "Bits 0:7 - Dead-time generator setup"] #[inline(always)] pub fn dtcfg(&mut self) -> DTCFG_W { DTCFG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "break and dead-time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cchp](index.html) module"] pub struct CCHP_SPEC; impl crate::RegisterSpec for CCHP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cchp::R](R) reader structure"] impl crate::Readable for CCHP_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cchp::W](W) writer structure"] impl crate::Writable for CCHP_SPEC { type Writer = W; } #[doc = "`reset()` method sets CCHP to value 0"] impl crate::Resettable for CCHP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMACFG register accessor: an alias for `Reg`"] pub type DMACFG = crate::Reg; #[doc = "DMA configuration register"] pub mod dmacfg { #[doc = "Register `DMACFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMACFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DMATC` reader - DMA transfer count"] pub struct DMATC_R(crate::FieldReader); impl DMATC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DMATC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATC` writer - DMA transfer count"] pub struct DMATC_W<'a> { w: &'a mut W, } impl<'a> DMATC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 8)) | ((value as u32 & 0x1f) << 8); self.w } } #[doc = "Field `DMATA` reader - DMA transfer access start address"] pub struct DMATA_R(crate::FieldReader); impl DMATA_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DMATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATA` writer - DMA transfer access start address"] pub struct DMATA_W<'a> { w: &'a mut W, } impl<'a> DMATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); self.w } } impl R { #[doc = "Bits 8:12 - DMA transfer count"] #[inline(always)] pub fn dmatc(&self) -> DMATC_R { DMATC_R::new(((self.bits >> 8) & 0x1f) as u8) } #[doc = "Bits 0:4 - DMA transfer access start address"] #[inline(always)] pub fn dmata(&self) -> DMATA_R { DMATA_R::new((self.bits & 0x1f) as u8) } } impl W { #[doc = "Bits 8:12 - DMA transfer count"] #[inline(always)] pub fn dmatc(&mut self) -> DMATC_W { DMATC_W { w: self } } #[doc = "Bits 0:4 - DMA transfer access start address"] #[inline(always)] pub fn dmata(&mut self) -> DMATA_W { DMATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmacfg](index.html) module"] pub struct DMACFG_SPEC; impl crate::RegisterSpec for DMACFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmacfg::R](R) reader structure"] impl crate::Readable for DMACFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmacfg::W](W) writer structure"] impl crate::Writable for DMACFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMACFG to value 0"] impl crate::Resettable for DMACFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DMATB register accessor: an alias for `Reg`"] pub type DMATB = crate::Reg; #[doc = "DMA transfer buffer register"] pub mod dmatb { #[doc = "Register `DMATB` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DMATB` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DMATB` reader - DMA register for burst accesses"] pub struct DMATB_R(crate::FieldReader); impl DMATB_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { DMATB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DMATB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DMATB` writer - DMA register for burst accesses"] pub struct DMATB_W<'a> { w: &'a mut W, } impl<'a> DMATB_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - DMA register for burst accesses"] #[inline(always)] pub fn dmatb(&self) -> DMATB_R { DMATB_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - DMA register for burst accesses"] #[inline(always)] pub fn dmatb(&mut self) -> DMATB_W { DMATB_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "DMA transfer buffer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmatb](index.html) module"] pub struct DMATB_SPEC; impl crate::RegisterSpec for DMATB_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dmatb::R](R) reader structure"] impl crate::Readable for DMATB_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dmatb::W](W) writer structure"] impl crate::Writable for DMATB_SPEC { type Writer = W; } #[doc = "`reset()` method sets DMATB to value 0"] impl crate::Resettable for DMATB_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CFG register accessor: an alias for `Reg`"] pub type CFG = crate::Reg; #[doc = "configuration register"] pub mod cfg { #[doc = "Register `CFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `OUTSEL` reader - The output value selection"] pub struct OUTSEL_R(crate::FieldReader); impl OUTSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OUTSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OUTSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OUTSEL` writer - The output value selection"] pub struct OUTSEL_W<'a> { w: &'a mut W, } impl<'a> OUTSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CHVSEL` reader - Write CHxVAL register selection"] pub struct CHVSEL_R(crate::FieldReader); impl CHVSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHVSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHVSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHVSEL` writer - Write CHxVAL register selection"] pub struct CHVSEL_W<'a> { w: &'a mut W, } impl<'a> CHVSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } impl R { #[doc = "Bit 0 - The output value selection"] #[inline(always)] pub fn outsel(&self) -> OUTSEL_R { OUTSEL_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Write CHxVAL register selection"] #[inline(always)] pub fn chvsel(&self) -> CHVSEL_R { CHVSEL_R::new(((self.bits >> 1) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - The output value selection"] #[inline(always)] pub fn outsel(&mut self) -> OUTSEL_W { OUTSEL_W { w: self } } #[doc = "Bit 1 - Write CHxVAL register selection"] #[inline(always)] pub fn chvsel(&mut self) -> CHVSEL_W { CHVSEL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFG_SPEC; impl crate::RegisterSpec for CFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg::R](R) reader structure"] impl crate::Readable for CFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] impl crate::Writable for CFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG to value 0"] impl crate::Resettable for CFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "General-purpose-timers"] pub struct TIMER16 { _marker: PhantomData<*const ()>, } unsafe impl Send for TIMER16 {} impl TIMER16 { #[doc = r"Pointer to the register block"] pub const PTR: *const timer15::RegisterBlock = 0x4001_4800 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const timer15::RegisterBlock { Self::PTR } } impl Deref for TIMER16 { type Target = timer15::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for TIMER16 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("TIMER16").finish() } } #[doc = "General-purpose-timers"] pub use timer15 as timer16; #[doc = "Touch sensing Interface"] pub struct TSI { _marker: PhantomData<*const ()>, } unsafe impl Send for TSI {} impl TSI { #[doc = r"Pointer to the register block"] pub const PTR: *const tsi::RegisterBlock = 0x4002_4000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const tsi::RegisterBlock { Self::PTR } } impl Deref for TSI { type Target = tsi::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for TSI { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("TSI").finish() } } #[doc = "Touch sensing Interface"] pub mod tsi { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - control register"] pub ctl0: crate::Reg, #[doc = "0x04 - interrupt enable register"] pub inten: crate::Reg, #[doc = "0x08 - interrupt flag clear register"] pub intc: crate::Reg, #[doc = "0x0c - interrupt flag register"] pub intf: crate::Reg, #[doc = "0x10 - Pin hysteresis mode register"] pub phm: crate::Reg, _reserved5: [u8; 0x04], #[doc = "0x18 - I/O analog switch register"] pub asw: crate::Reg, _reserved6: [u8; 0x04], #[doc = "0x20 - I/O sample configuration register"] pub sampcfg: crate::Reg, _reserved7: [u8; 0x04], #[doc = "0x28 - I/O channel configuration register"] pub chcfg: crate::Reg, _reserved8: [u8; 0x04], #[doc = "0x30 - I/O group control register"] pub gctl: crate::Reg, #[doc = "0x34 - I/O group x cycle number register"] pub g0cycn: crate::Reg, #[doc = "0x38 - I/O group x cycle number register"] pub g1cycn: crate::Reg, #[doc = "0x3c - I/O group x cycle number register"] pub g2cycn: crate::Reg, #[doc = "0x40 - I/O group x cycle number register"] pub g3cycn: crate::Reg, #[doc = "0x44 - I/O group x cycle number register"] pub g4cycn: crate::Reg, #[doc = "0x48 - I/O group x cycle number register"] pub g5cycn: crate::Reg, _reserved15: [u8; 0x02b4], #[doc = "0x300 - control register 1"] pub ctl1: crate::Reg, } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "control register"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CDT` reader - Charge transfer pulse high"] pub struct CDT_R(crate::FieldReader); impl CDT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CDT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CDT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CDT` writer - Charge transfer pulse high"] pub struct CDT_W<'a> { w: &'a mut W, } impl<'a> CDT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 28)) | ((value as u32 & 0x0f) << 28); self.w } } #[doc = "Field `CTDT` reader - Charge transfer pulse low"] pub struct CTDT_R(crate::FieldReader); impl CTDT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTDT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTDT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTDT` writer - Charge transfer pulse low"] pub struct CTDT_W<'a> { w: &'a mut W, } impl<'a> CTDT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 24)) | ((value as u32 & 0x0f) << 24); self.w } } #[doc = "Field `ECDT` reader - Spread spectrum deviation"] pub struct ECDT_R(crate::FieldReader); impl ECDT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ECDT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ECDT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ECDT` writer - Spread spectrum deviation"] pub struct ECDT_W<'a> { w: &'a mut W, } impl<'a> ECDT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 17)) | ((value as u32 & 0x7f) << 17); self.w } } #[doc = "Field `ECEN` reader - Spread spectrum enable"] pub struct ECEN_R(crate::FieldReader); impl ECEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ECEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ECEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ECEN` writer - Spread spectrum enable"] pub struct ECEN_W<'a> { w: &'a mut W, } impl<'a> ECEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `ECDIV` reader - Spread spectrum prescaler"] pub struct ECDIV_R(crate::FieldReader); impl ECDIV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ECDIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ECDIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ECDIV` writer - Spread spectrum prescaler"] pub struct ECDIV_W<'a> { w: &'a mut W, } impl<'a> ECDIV_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `CTCDIV` reader - pulse generator prescaler"] pub struct CTCDIV_R(crate::FieldReader); impl CTCDIV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CTCDIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTCDIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTCDIV` writer - pulse generator prescaler"] pub struct CTCDIV_W<'a> { w: &'a mut W, } impl<'a> CTCDIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `MCN` reader - Max count value"] pub struct MCN_R(crate::FieldReader); impl MCN_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MCN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MCN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MCN` writer - Max count value"] pub struct MCN_W<'a> { w: &'a mut W, } impl<'a> MCN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); self.w } } #[doc = "Field `PINMOD` reader - I/O Default mode"] pub struct PINMOD_R(crate::FieldReader); impl PINMOD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PINMOD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PINMOD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PINMOD` writer - I/O Default mode"] pub struct PINMOD_W<'a> { w: &'a mut W, } impl<'a> PINMOD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `EGSEL` reader - Edge selection"] pub struct EGSEL_R(crate::FieldReader); impl EGSEL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EGSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EGSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EGSEL` writer - Edge selection"] pub struct EGSEL_W<'a> { w: &'a mut W, } impl<'a> EGSEL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `TRGMOD` reader - Trigger mode selection"] pub struct TRGMOD_R(crate::FieldReader); impl TRGMOD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TRGMOD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TRGMOD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TRGMOD` writer - Trigger mode selection"] pub struct TRGMOD_W<'a> { w: &'a mut W, } impl<'a> TRGMOD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `TSIS` reader - Start a new acquisition"] pub struct TSIS_R(crate::FieldReader); impl TSIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TSIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TSIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TSIS` writer - Start a new acquisition"] pub struct TSIS_W<'a> { w: &'a mut W, } impl<'a> TSIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TSIEN` reader - Touch sensing controller enable"] pub struct TSIEN_R(crate::FieldReader); impl TSIEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TSIEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TSIEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TSIEN` writer - Touch sensing controller enable"] pub struct TSIEN_W<'a> { w: &'a mut W, } impl<'a> TSIEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bits 28:31 - Charge transfer pulse high"] #[inline(always)] pub fn cdt(&self) -> CDT_R { CDT_R::new(((self.bits >> 28) & 0x0f) as u8) } #[doc = "Bits 24:27 - Charge transfer pulse low"] #[inline(always)] pub fn ctdt(&self) -> CTDT_R { CTDT_R::new(((self.bits >> 24) & 0x0f) as u8) } #[doc = "Bits 17:23 - Spread spectrum deviation"] #[inline(always)] pub fn ecdt(&self) -> ECDT_R { ECDT_R::new(((self.bits >> 17) & 0x7f) as u8) } #[doc = "Bit 16 - Spread spectrum enable"] #[inline(always)] pub fn ecen(&self) -> ECEN_R { ECEN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Spread spectrum prescaler"] #[inline(always)] pub fn ecdiv(&self) -> ECDIV_R { ECDIV_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 12:14 - pulse generator prescaler"] #[inline(always)] pub fn ctcdiv(&self) -> CTCDIV_R { CTCDIV_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bits 5:7 - Max count value"] #[inline(always)] pub fn mcn(&self) -> MCN_R { MCN_R::new(((self.bits >> 5) & 0x07) as u8) } #[doc = "Bit 4 - I/O Default mode"] #[inline(always)] pub fn pinmod(&self) -> PINMOD_R { PINMOD_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Edge selection"] #[inline(always)] pub fn egsel(&self) -> EGSEL_R { EGSEL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Trigger mode selection"] #[inline(always)] pub fn trgmod(&self) -> TRGMOD_R { TRGMOD_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Start a new acquisition"] #[inline(always)] pub fn tsis(&self) -> TSIS_R { TSIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Touch sensing controller enable"] #[inline(always)] pub fn tsien(&self) -> TSIEN_R { TSIEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bits 28:31 - Charge transfer pulse high"] #[inline(always)] pub fn cdt(&mut self) -> CDT_W { CDT_W { w: self } } #[doc = "Bits 24:27 - Charge transfer pulse low"] #[inline(always)] pub fn ctdt(&mut self) -> CTDT_W { CTDT_W { w: self } } #[doc = "Bits 17:23 - Spread spectrum deviation"] #[inline(always)] pub fn ecdt(&mut self) -> ECDT_W { ECDT_W { w: self } } #[doc = "Bit 16 - Spread spectrum enable"] #[inline(always)] pub fn ecen(&mut self) -> ECEN_W { ECEN_W { w: self } } #[doc = "Bit 15 - Spread spectrum prescaler"] #[inline(always)] pub fn ecdiv(&mut self) -> ECDIV_W { ECDIV_W { w: self } } #[doc = "Bits 12:14 - pulse generator prescaler"] #[inline(always)] pub fn ctcdiv(&mut self) -> CTCDIV_W { CTCDIV_W { w: self } } #[doc = "Bits 5:7 - Max count value"] #[inline(always)] pub fn mcn(&mut self) -> MCN_W { MCN_W { w: self } } #[doc = "Bit 4 - I/O Default mode"] #[inline(always)] pub fn pinmod(&mut self) -> PINMOD_W { PINMOD_W { w: self } } #[doc = "Bit 3 - Edge selection"] #[inline(always)] pub fn egsel(&mut self) -> EGSEL_W { EGSEL_W { w: self } } #[doc = "Bit 2 - Trigger mode selection"] #[inline(always)] pub fn trgmod(&mut self) -> TRGMOD_W { TRGMOD_W { w: self } } #[doc = "Bit 1 - Start a new acquisition"] #[inline(always)] pub fn tsis(&mut self) -> TSIS_W { TSIS_W { w: self } } #[doc = "Bit 0 - Touch sensing controller enable"] #[inline(always)] pub fn tsien(&mut self) -> TSIEN_W { TSIEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTEN register accessor: an alias for `Reg`"] pub type INTEN = crate::Reg; #[doc = "interrupt enable register"] pub mod inten { #[doc = "Register `INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MNERRIE` reader - Max Cycle Number Error Interrupt Enable"] pub struct MNERRIE_R(crate::FieldReader); impl MNERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MNERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNERRIE` writer - Max Cycle Number Error Interrupt Enable"] pub struct MNERRIE_W<'a> { w: &'a mut W, } impl<'a> MNERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CTCFIE` reader - Charge-transfer complete flag Interrupt Enable"] pub struct CTCFIE_R(crate::FieldReader); impl CTCFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CTCFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTCFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTCFIE` writer - Charge-transfer complete flag Interrupt Enable"] pub struct CTCFIE_W<'a> { w: &'a mut W, } impl<'a> CTCFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 1 - Max Cycle Number Error Interrupt Enable"] #[inline(always)] pub fn mnerrie(&self) -> MNERRIE_R { MNERRIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Charge-transfer complete flag Interrupt Enable"] #[inline(always)] pub fn ctcfie(&self) -> CTCFIE_R { CTCFIE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Max Cycle Number Error Interrupt Enable"] #[inline(always)] pub fn mnerrie(&mut self) -> MNERRIE_W { MNERRIE_W { w: self } } #[doc = "Bit 0 - Charge-transfer complete flag Interrupt Enable"] #[inline(always)] pub fn ctcfie(&mut self) -> CTCFIE_W { CTCFIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"] pub struct INTEN_SPEC; impl crate::RegisterSpec for INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [inten::R](R) reader structure"] impl crate::Readable for INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"] impl crate::Writable for INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTEN to value 0"] impl crate::Resettable for INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTC register accessor: an alias for `Reg`"] pub type INTC = crate::Reg; #[doc = "interrupt flag clear register"] pub mod intc { #[doc = "Register `INTC` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CMNERR` reader - Clear max cycle number error"] pub struct CMNERR_R(crate::FieldReader); impl CMNERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CMNERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CMNERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CMNERR` writer - Clear max cycle number error"] pub struct CMNERR_W<'a> { w: &'a mut W, } impl<'a> CMNERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CCTCF` reader - Clear charge-transfer complete flag"] pub struct CCTCF_R(crate::FieldReader); impl CCTCF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CCTCF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CCTCF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CCTCF` writer - Clear charge-transfer complete flag"] pub struct CCTCF_W<'a> { w: &'a mut W, } impl<'a> CCTCF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 1 - Clear max cycle number error"] #[inline(always)] pub fn cmnerr(&self) -> CMNERR_R { CMNERR_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Clear charge-transfer complete flag"] #[inline(always)] pub fn cctcf(&self) -> CCTCF_R { CCTCF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Clear max cycle number error"] #[inline(always)] pub fn cmnerr(&mut self) -> CMNERR_W { CMNERR_W { w: self } } #[doc = "Bit 0 - Clear charge-transfer complete flag"] #[inline(always)] pub fn cctcf(&mut self) -> CCTCF_W { CCTCF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "interrupt flag clear register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intc](index.html) module"] pub struct INTC_SPEC; impl crate::RegisterSpec for INTC_SPEC { type Ux = u32; } #[doc = "`read()` method returns [intc::R](R) reader structure"] impl crate::Readable for INTC_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [intc::W](W) writer structure"] impl crate::Writable for INTC_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTC to value 0"] impl crate::Resettable for INTC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "INTF register accessor: an alias for `Reg`"] pub type INTF = crate::Reg; #[doc = "interrupt flag register"] pub mod intf { #[doc = "Register `INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MNERR` reader - Max count error flag"] pub struct MNERR_R(crate::FieldReader); impl MNERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MNERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MNERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MNERR` writer - Max count error flag"] pub struct MNERR_W<'a> { w: &'a mut W, } impl<'a> MNERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CTCF` reader - End of acquisition flag"] pub struct CTCF_R(crate::FieldReader); impl CTCF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CTCF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTCF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTCF` writer - End of acquisition flag"] pub struct CTCF_W<'a> { w: &'a mut W, } impl<'a> CTCF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 1 - Max count error flag"] #[inline(always)] pub fn mnerr(&self) -> MNERR_R { MNERR_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - End of acquisition flag"] #[inline(always)] pub fn ctcf(&self) -> CTCF_R { CTCF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Max count error flag"] #[inline(always)] pub fn mnerr(&mut self) -> MNERR_W { MNERR_W { w: self } } #[doc = "Bit 0 - End of acquisition flag"] #[inline(always)] pub fn ctcf(&mut self) -> CTCF_W { CTCF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intf](index.html) module"] pub struct INTF_SPEC; impl crate::RegisterSpec for INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [intf::R](R) reader structure"] impl crate::Readable for INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [intf::W](W) writer structure"] impl crate::Writable for INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTF to value 0"] impl crate::Resettable for INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "PHM register accessor: an alias for `Reg`"] pub type PHM = crate::Reg; #[doc = "Pin hysteresis mode register"] pub mod phm { #[doc = "Register `PHM` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PHM` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `G5P3` reader - G5P3 Schmitt trigger hysteresis mode"] pub struct G5P3_R(crate::FieldReader); impl G5P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P3` writer - G5P3 Schmitt trigger hysteresis mode"] pub struct G5P3_W<'a> { w: &'a mut W, } impl<'a> G5P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `G5P2` reader - G5P2 Schmitt trigger hysteresis mode"] pub struct G5P2_R(crate::FieldReader); impl G5P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P2` writer - G5P2 Schmitt trigger hysteresis mode"] pub struct G5P2_W<'a> { w: &'a mut W, } impl<'a> G5P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `G5P1` reader - G5P1 Schmitt trigger hysteresis mode"] pub struct G5P1_R(crate::FieldReader); impl G5P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P1` writer - G5P1 Schmitt trigger hysteresis mode"] pub struct G5P1_W<'a> { w: &'a mut W, } impl<'a> G5P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `G5P0` reader - G5P0 Schmitt trigger hysteresis mode"] pub struct G5P0_R(crate::FieldReader); impl G5P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P0` writer - G5P0 Schmitt trigger hysteresis mode"] pub struct G5P0_W<'a> { w: &'a mut W, } impl<'a> G5P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `G4P3` reader - G4P3 Schmitt trigger hysteresis mode"] pub struct G4P3_R(crate::FieldReader); impl G4P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P3` writer - G4P3 Schmitt trigger hysteresis mode"] pub struct G4P3_W<'a> { w: &'a mut W, } impl<'a> G4P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `G4P2` reader - G4P2 Schmitt trigger hysteresis mode"] pub struct G4P2_R(crate::FieldReader); impl G4P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P2` writer - G4P2 Schmitt trigger hysteresis mode"] pub struct G4P2_W<'a> { w: &'a mut W, } impl<'a> G4P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `G4P1` reader - G4P1 Schmitt trigger hysteresis mode"] pub struct G4P1_R(crate::FieldReader); impl G4P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P1` writer - G4P1 Schmitt trigger hysteresis mode"] pub struct G4P1_W<'a> { w: &'a mut W, } impl<'a> G4P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `G4P0` reader - G4P0 Schmitt trigger hysteresis mode"] pub struct G4P0_R(crate::FieldReader); impl G4P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P0` writer - G4P0 Schmitt trigger hysteresis mode"] pub struct G4P0_W<'a> { w: &'a mut W, } impl<'a> G4P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `G3P3` reader - G3P3 Schmitt trigger hysteresis mode"] pub struct G3P3_R(crate::FieldReader); impl G3P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P3` writer - G3P3 Schmitt trigger hysteresis mode"] pub struct G3P3_W<'a> { w: &'a mut W, } impl<'a> G3P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `G3P2` reader - G3P2 Schmitt trigger hysteresis mode"] pub struct G3P2_R(crate::FieldReader); impl G3P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P2` writer - G3P2 Schmitt trigger hysteresis mode"] pub struct G3P2_W<'a> { w: &'a mut W, } impl<'a> G3P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `G3P1` reader - G3P1 Schmitt trigger hysteresis mode"] pub struct G3P1_R(crate::FieldReader); impl G3P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P1` writer - G3P1 Schmitt trigger hysteresis mode"] pub struct G3P1_W<'a> { w: &'a mut W, } impl<'a> G3P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `G3P0` reader - G3P0 Schmitt trigger hysteresis mode"] pub struct G3P0_R(crate::FieldReader); impl G3P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P0` writer - G3P0 Schmitt trigger hysteresis mode"] pub struct G3P0_W<'a> { w: &'a mut W, } impl<'a> G3P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `G2P3` reader - G2P3 Schmitt trigger hysteresis mode"] pub struct G2P3_R(crate::FieldReader); impl G2P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P3` writer - G2P3 Schmitt trigger hysteresis mode"] pub struct G2P3_W<'a> { w: &'a mut W, } impl<'a> G2P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `G2P2` reader - G2P2 Schmitt trigger hysteresis mode"] pub struct G2P2_R(crate::FieldReader); impl G2P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P2` writer - G2P2 Schmitt trigger hysteresis mode"] pub struct G2P2_W<'a> { w: &'a mut W, } impl<'a> G2P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `G2P1` reader - G2P1 Schmitt trigger hysteresis mode"] pub struct G2P1_R(crate::FieldReader); impl G2P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P1` writer - G2P1 Schmitt trigger hysteresis mode"] pub struct G2P1_W<'a> { w: &'a mut W, } impl<'a> G2P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `G2P0` reader - G2P0 Schmitt trigger hysteresis mode"] pub struct G2P0_R(crate::FieldReader); impl G2P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P0` writer - G2P0 Schmitt trigger hysteresis mode"] pub struct G2P0_W<'a> { w: &'a mut W, } impl<'a> G2P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `G1P3` reader - G1P3 Schmitt trigger hysteresis mode"] pub struct G1P3_R(crate::FieldReader); impl G1P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P3` writer - G1P3 Schmitt trigger hysteresis mode"] pub struct G1P3_W<'a> { w: &'a mut W, } impl<'a> G1P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `G1P2` reader - G1P2 Schmitt trigger hysteresis mode"] pub struct G1P2_R(crate::FieldReader); impl G1P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P2` writer - G1P2 Schmitt trigger hysteresis mode"] pub struct G1P2_W<'a> { w: &'a mut W, } impl<'a> G1P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `G1P1` reader - G1P1 Schmitt trigger hysteresis mode"] pub struct G1P1_R(crate::FieldReader); impl G1P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P1` writer - G1P1 Schmitt trigger hysteresis mode"] pub struct G1P1_W<'a> { w: &'a mut W, } impl<'a> G1P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `G1P0` reader - G1P0 Schmitt trigger hysteresis mode"] pub struct G1P0_R(crate::FieldReader); impl G1P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P0` writer - G1P0 Schmitt trigger hysteresis mode"] pub struct G1P0_W<'a> { w: &'a mut W, } impl<'a> G1P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `G0P3` reader - G0P3 Schmitt trigger hysteresis mode"] pub struct G0P3_R(crate::FieldReader); impl G0P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P3` writer - G0P3 Schmitt trigger hysteresis mode"] pub struct G0P3_W<'a> { w: &'a mut W, } impl<'a> G0P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `G0P2` reader - G0P2 Schmitt trigger hysteresis mode"] pub struct G0P2_R(crate::FieldReader); impl G0P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P2` writer - G0P2 Schmitt trigger hysteresis mode"] pub struct G0P2_W<'a> { w: &'a mut W, } impl<'a> G0P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `G0P1` reader - G0P1 Schmitt trigger hysteresis mode"] pub struct G0P1_R(crate::FieldReader); impl G0P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P1` writer - G0P1 Schmitt trigger hysteresis mode"] pub struct G0P1_W<'a> { w: &'a mut W, } impl<'a> G0P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `G0P0` reader - G0P0 Schmitt trigger hysteresis mode"] pub struct G0P0_R(crate::FieldReader); impl G0P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P0` writer - G0P0 Schmitt trigger hysteresis mode"] pub struct G0P0_W<'a> { w: &'a mut W, } impl<'a> G0P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 23 - G5P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g5p3(&self) -> G5P3_R { G5P3_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 22 - G5P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g5p2(&self) -> G5P2_R { G5P2_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 21 - G5P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g5p1(&self) -> G5P1_R { G5P1_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - G5P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g5p0(&self) -> G5P0_R { G5P0_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - G4P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g4p3(&self) -> G4P3_R { G4P3_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - G4P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g4p2(&self) -> G4P2_R { G4P2_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - G4P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g4p1(&self) -> G4P1_R { G4P1_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - G4P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g4p0(&self) -> G4P0_R { G4P0_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - G3P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g3p3(&self) -> G3P3_R { G3P3_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - G3P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g3p2(&self) -> G3P2_R { G3P2_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - G3P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g3p1(&self) -> G3P1_R { G3P1_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - G3P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g3p0(&self) -> G3P0_R { G3P0_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - G2P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g2p3(&self) -> G2P3_R { G2P3_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - G2P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g2p2(&self) -> G2P2_R { G2P2_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - G2P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g2p1(&self) -> G2P1_R { G2P1_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - G2P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g2p0(&self) -> G2P0_R { G2P0_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - G1P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g1p3(&self) -> G1P3_R { G1P3_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - G1P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g1p2(&self) -> G1P2_R { G1P2_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - G1P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g1p1(&self) -> G1P1_R { G1P1_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - G1P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g1p0(&self) -> G1P0_R { G1P0_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - G0P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g0p3(&self) -> G0P3_R { G0P3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - G0P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g0p2(&self) -> G0P2_R { G0P2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - G0P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g0p1(&self) -> G0P1_R { G0P1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - G0P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g0p0(&self) -> G0P0_R { G0P0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 23 - G5P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g5p3(&mut self) -> G5P3_W { G5P3_W { w: self } } #[doc = "Bit 22 - G5P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g5p2(&mut self) -> G5P2_W { G5P2_W { w: self } } #[doc = "Bit 21 - G5P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g5p1(&mut self) -> G5P1_W { G5P1_W { w: self } } #[doc = "Bit 20 - G5P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g5p0(&mut self) -> G5P0_W { G5P0_W { w: self } } #[doc = "Bit 19 - G4P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g4p3(&mut self) -> G4P3_W { G4P3_W { w: self } } #[doc = "Bit 18 - G4P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g4p2(&mut self) -> G4P2_W { G4P2_W { w: self } } #[doc = "Bit 17 - G4P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g4p1(&mut self) -> G4P1_W { G4P1_W { w: self } } #[doc = "Bit 16 - G4P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g4p0(&mut self) -> G4P0_W { G4P0_W { w: self } } #[doc = "Bit 15 - G3P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g3p3(&mut self) -> G3P3_W { G3P3_W { w: self } } #[doc = "Bit 14 - G3P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g3p2(&mut self) -> G3P2_W { G3P2_W { w: self } } #[doc = "Bit 13 - G3P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g3p1(&mut self) -> G3P1_W { G3P1_W { w: self } } #[doc = "Bit 12 - G3P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g3p0(&mut self) -> G3P0_W { G3P0_W { w: self } } #[doc = "Bit 11 - G2P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g2p3(&mut self) -> G2P3_W { G2P3_W { w: self } } #[doc = "Bit 10 - G2P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g2p2(&mut self) -> G2P2_W { G2P2_W { w: self } } #[doc = "Bit 9 - G2P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g2p1(&mut self) -> G2P1_W { G2P1_W { w: self } } #[doc = "Bit 8 - G2P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g2p0(&mut self) -> G2P0_W { G2P0_W { w: self } } #[doc = "Bit 7 - G1P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g1p3(&mut self) -> G1P3_W { G1P3_W { w: self } } #[doc = "Bit 6 - G1P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g1p2(&mut self) -> G1P2_W { G1P2_W { w: self } } #[doc = "Bit 5 - G1P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g1p1(&mut self) -> G1P1_W { G1P1_W { w: self } } #[doc = "Bit 4 - G1P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g1p0(&mut self) -> G1P0_W { G1P0_W { w: self } } #[doc = "Bit 3 - G0P3 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g0p3(&mut self) -> G0P3_W { G0P3_W { w: self } } #[doc = "Bit 2 - G0P2 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g0p2(&mut self) -> G0P2_W { G0P2_W { w: self } } #[doc = "Bit 1 - G0P1 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g0p1(&mut self) -> G0P1_W { G0P1_W { w: self } } #[doc = "Bit 0 - G0P0 Schmitt trigger hysteresis mode"] #[inline(always)] pub fn g0p0(&mut self) -> G0P0_W { G0P0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Pin hysteresis mode register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [phm](index.html) module"] pub struct PHM_SPEC; impl crate::RegisterSpec for PHM_SPEC { type Ux = u32; } #[doc = "`read()` method returns [phm::R](R) reader structure"] impl crate::Readable for PHM_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [phm::W](W) writer structure"] impl crate::Writable for PHM_SPEC { type Writer = W; } #[doc = "`reset()` method sets PHM to value 0xffff_ffff"] impl crate::Resettable for PHM_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0xffff_ffff } } } #[doc = "ASW register accessor: an alias for `Reg`"] pub type ASW = crate::Reg; #[doc = "I/O analog switch register"] pub mod asw { #[doc = "Register `ASW` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ASW` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `G5P3` reader - G5P3 analog switch enable"] pub struct G5P3_R(crate::FieldReader); impl G5P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P3` writer - G5P3 analog switch enable"] pub struct G5P3_W<'a> { w: &'a mut W, } impl<'a> G5P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `G5P2` reader - G5P2 analog switch enable"] pub struct G5P2_R(crate::FieldReader); impl G5P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P2` writer - G5P2 analog switch enable"] pub struct G5P2_W<'a> { w: &'a mut W, } impl<'a> G5P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `G5P1` reader - G5P1 analog switch enable"] pub struct G5P1_R(crate::FieldReader); impl G5P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P1` writer - G5P1 analog switch enable"] pub struct G5P1_W<'a> { w: &'a mut W, } impl<'a> G5P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `G5P0` reader - G5P0 analog switch enable"] pub struct G5P0_R(crate::FieldReader); impl G5P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P0` writer - G5P0 analog switch enable"] pub struct G5P0_W<'a> { w: &'a mut W, } impl<'a> G5P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `G4P3` reader - G4P3 analog switch enable"] pub struct G4P3_R(crate::FieldReader); impl G4P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P3` writer - G4P3 analog switch enable"] pub struct G4P3_W<'a> { w: &'a mut W, } impl<'a> G4P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `G4P2` reader - G4P2 analog switch enable"] pub struct G4P2_R(crate::FieldReader); impl G4P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P2` writer - G4P2 analog switch enable"] pub struct G4P2_W<'a> { w: &'a mut W, } impl<'a> G4P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `G4P1` reader - G4P1 analog switch enable"] pub struct G4P1_R(crate::FieldReader); impl G4P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P1` writer - G4P1 analog switch enable"] pub struct G4P1_W<'a> { w: &'a mut W, } impl<'a> G4P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `G4P0` reader - G4P0 analog switch enable"] pub struct G4P0_R(crate::FieldReader); impl G4P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P0` writer - G4P0 analog switch enable"] pub struct G4P0_W<'a> { w: &'a mut W, } impl<'a> G4P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `G3P3` reader - G3P3 analog switch enable"] pub struct G3P3_R(crate::FieldReader); impl G3P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P3` writer - G3P3 analog switch enable"] pub struct G3P3_W<'a> { w: &'a mut W, } impl<'a> G3P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `G3P2` reader - G3P2 analog switch enable"] pub struct G3P2_R(crate::FieldReader); impl G3P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P2` writer - G3P2 analog switch enable"] pub struct G3P2_W<'a> { w: &'a mut W, } impl<'a> G3P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `G3P1` reader - G3P1 analog switch enable"] pub struct G3P1_R(crate::FieldReader); impl G3P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P1` writer - G3P1 analog switch enable"] pub struct G3P1_W<'a> { w: &'a mut W, } impl<'a> G3P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `G3P0` reader - G3P0 analog switch enable"] pub struct G3P0_R(crate::FieldReader); impl G3P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P0` writer - G3P0 analog switch enable"] pub struct G3P0_W<'a> { w: &'a mut W, } impl<'a> G3P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `G2P3` reader - G2P3 analog switch enable"] pub struct G2P3_R(crate::FieldReader); impl G2P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P3` writer - G2P3 analog switch enable"] pub struct G2P3_W<'a> { w: &'a mut W, } impl<'a> G2P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `G2P2` reader - G2P2 analog switch enable"] pub struct G2P2_R(crate::FieldReader); impl G2P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P2` writer - G2P2 analog switch enable"] pub struct G2P2_W<'a> { w: &'a mut W, } impl<'a> G2P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `G2P1` reader - G2P1 analog switch enable"] pub struct G2P1_R(crate::FieldReader); impl G2P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P1` writer - G2P1 analog switch enable"] pub struct G2P1_W<'a> { w: &'a mut W, } impl<'a> G2P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `G2P0` reader - G2P0 analog switch enable"] pub struct G2P0_R(crate::FieldReader); impl G2P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P0` writer - G2P0 analog switch enable"] pub struct G2P0_W<'a> { w: &'a mut W, } impl<'a> G2P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `G1P3` reader - G1P3 analog switch enable"] pub struct G1P3_R(crate::FieldReader); impl G1P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P3` writer - G1P3 analog switch enable"] pub struct G1P3_W<'a> { w: &'a mut W, } impl<'a> G1P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `G1P2` reader - G1P2 analog switch enable"] pub struct G1P2_R(crate::FieldReader); impl G1P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P2` writer - G1P2 analog switch enable"] pub struct G1P2_W<'a> { w: &'a mut W, } impl<'a> G1P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `G1P1` reader - G1P1 analog switch enable"] pub struct G1P1_R(crate::FieldReader); impl G1P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P1` writer - G1P1 analog switch enable"] pub struct G1P1_W<'a> { w: &'a mut W, } impl<'a> G1P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `G1P0` reader - G1P0 analog switch enable"] pub struct G1P0_R(crate::FieldReader); impl G1P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P0` writer - G1P0 analog switch enable"] pub struct G1P0_W<'a> { w: &'a mut W, } impl<'a> G1P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `G0P3` reader - G0P3 analog switch enable"] pub struct G0P3_R(crate::FieldReader); impl G0P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P3` writer - G0P3 analog switch enable"] pub struct G0P3_W<'a> { w: &'a mut W, } impl<'a> G0P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `G0P2` reader - G0P2 analog switch enable"] pub struct G0P2_R(crate::FieldReader); impl G0P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P2` writer - G0P2 analog switch enable"] pub struct G0P2_W<'a> { w: &'a mut W, } impl<'a> G0P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `G0P1` reader - G0P1 analog switch enable"] pub struct G0P1_R(crate::FieldReader); impl G0P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P1` writer - G0P1 analog switch enable"] pub struct G0P1_W<'a> { w: &'a mut W, } impl<'a> G0P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `G0P0` reader - G0P0 analog switch enable"] pub struct G0P0_R(crate::FieldReader); impl G0P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P0` writer - G0P0 analog switch enable"] pub struct G0P0_W<'a> { w: &'a mut W, } impl<'a> G0P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 23 - G5P3 analog switch enable"] #[inline(always)] pub fn g5p3(&self) -> G5P3_R { G5P3_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 22 - G5P2 analog switch enable"] #[inline(always)] pub fn g5p2(&self) -> G5P2_R { G5P2_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 21 - G5P1 analog switch enable"] #[inline(always)] pub fn g5p1(&self) -> G5P1_R { G5P1_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - G5P0 analog switch enable"] #[inline(always)] pub fn g5p0(&self) -> G5P0_R { G5P0_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - G4P3 analog switch enable"] #[inline(always)] pub fn g4p3(&self) -> G4P3_R { G4P3_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - G4P2 analog switch enable"] #[inline(always)] pub fn g4p2(&self) -> G4P2_R { G4P2_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - G4P1 analog switch enable"] #[inline(always)] pub fn g4p1(&self) -> G4P1_R { G4P1_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - G4P0 analog switch enable"] #[inline(always)] pub fn g4p0(&self) -> G4P0_R { G4P0_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - G3P3 analog switch enable"] #[inline(always)] pub fn g3p3(&self) -> G3P3_R { G3P3_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - G3P2 analog switch enable"] #[inline(always)] pub fn g3p2(&self) -> G3P2_R { G3P2_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - G3P1 analog switch enable"] #[inline(always)] pub fn g3p1(&self) -> G3P1_R { G3P1_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - G3P0 analog switch enable"] #[inline(always)] pub fn g3p0(&self) -> G3P0_R { G3P0_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - G2P3 analog switch enable"] #[inline(always)] pub fn g2p3(&self) -> G2P3_R { G2P3_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - G2P2 analog switch enable"] #[inline(always)] pub fn g2p2(&self) -> G2P2_R { G2P2_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - G2P1 analog switch enable"] #[inline(always)] pub fn g2p1(&self) -> G2P1_R { G2P1_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - G2P0 analog switch enable"] #[inline(always)] pub fn g2p0(&self) -> G2P0_R { G2P0_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - G1P3 analog switch enable"] #[inline(always)] pub fn g1p3(&self) -> G1P3_R { G1P3_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - G1P2 analog switch enable"] #[inline(always)] pub fn g1p2(&self) -> G1P2_R { G1P2_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - G1P1 analog switch enable"] #[inline(always)] pub fn g1p1(&self) -> G1P1_R { G1P1_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - G1P0 analog switch enable"] #[inline(always)] pub fn g1p0(&self) -> G1P0_R { G1P0_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - G0P3 analog switch enable"] #[inline(always)] pub fn g0p3(&self) -> G0P3_R { G0P3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - G0P2 analog switch enable"] #[inline(always)] pub fn g0p2(&self) -> G0P2_R { G0P2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - G0P1 analog switch enable"] #[inline(always)] pub fn g0p1(&self) -> G0P1_R { G0P1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - G0P0 analog switch enable"] #[inline(always)] pub fn g0p0(&self) -> G0P0_R { G0P0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 23 - G5P3 analog switch enable"] #[inline(always)] pub fn g5p3(&mut self) -> G5P3_W { G5P3_W { w: self } } #[doc = "Bit 22 - G5P2 analog switch enable"] #[inline(always)] pub fn g5p2(&mut self) -> G5P2_W { G5P2_W { w: self } } #[doc = "Bit 21 - G5P1 analog switch enable"] #[inline(always)] pub fn g5p1(&mut self) -> G5P1_W { G5P1_W { w: self } } #[doc = "Bit 20 - G5P0 analog switch enable"] #[inline(always)] pub fn g5p0(&mut self) -> G5P0_W { G5P0_W { w: self } } #[doc = "Bit 19 - G4P3 analog switch enable"] #[inline(always)] pub fn g4p3(&mut self) -> G4P3_W { G4P3_W { w: self } } #[doc = "Bit 18 - G4P2 analog switch enable"] #[inline(always)] pub fn g4p2(&mut self) -> G4P2_W { G4P2_W { w: self } } #[doc = "Bit 17 - G4P1 analog switch enable"] #[inline(always)] pub fn g4p1(&mut self) -> G4P1_W { G4P1_W { w: self } } #[doc = "Bit 16 - G4P0 analog switch enable"] #[inline(always)] pub fn g4p0(&mut self) -> G4P0_W { G4P0_W { w: self } } #[doc = "Bit 15 - G3P3 analog switch enable"] #[inline(always)] pub fn g3p3(&mut self) -> G3P3_W { G3P3_W { w: self } } #[doc = "Bit 14 - G3P2 analog switch enable"] #[inline(always)] pub fn g3p2(&mut self) -> G3P2_W { G3P2_W { w: self } } #[doc = "Bit 13 - G3P1 analog switch enable"] #[inline(always)] pub fn g3p1(&mut self) -> G3P1_W { G3P1_W { w: self } } #[doc = "Bit 12 - G3P0 analog switch enable"] #[inline(always)] pub fn g3p0(&mut self) -> G3P0_W { G3P0_W { w: self } } #[doc = "Bit 11 - G2P3 analog switch enable"] #[inline(always)] pub fn g2p3(&mut self) -> G2P3_W { G2P3_W { w: self } } #[doc = "Bit 10 - G2P2 analog switch enable"] #[inline(always)] pub fn g2p2(&mut self) -> G2P2_W { G2P2_W { w: self } } #[doc = "Bit 9 - G2P1 analog switch enable"] #[inline(always)] pub fn g2p1(&mut self) -> G2P1_W { G2P1_W { w: self } } #[doc = "Bit 8 - G2P0 analog switch enable"] #[inline(always)] pub fn g2p0(&mut self) -> G2P0_W { G2P0_W { w: self } } #[doc = "Bit 7 - G1P3 analog switch enable"] #[inline(always)] pub fn g1p3(&mut self) -> G1P3_W { G1P3_W { w: self } } #[doc = "Bit 6 - G1P2 analog switch enable"] #[inline(always)] pub fn g1p2(&mut self) -> G1P2_W { G1P2_W { w: self } } #[doc = "Bit 5 - G1P1 analog switch enable"] #[inline(always)] pub fn g1p1(&mut self) -> G1P1_W { G1P1_W { w: self } } #[doc = "Bit 4 - G1P0 analog switch enable"] #[inline(always)] pub fn g1p0(&mut self) -> G1P0_W { G1P0_W { w: self } } #[doc = "Bit 3 - G0P3 analog switch enable"] #[inline(always)] pub fn g0p3(&mut self) -> G0P3_W { G0P3_W { w: self } } #[doc = "Bit 2 - G0P2 analog switch enable"] #[inline(always)] pub fn g0p2(&mut self) -> G0P2_W { G0P2_W { w: self } } #[doc = "Bit 1 - G0P1 analog switch enable"] #[inline(always)] pub fn g0p1(&mut self) -> G0P1_W { G0P1_W { w: self } } #[doc = "Bit 0 - G0P0 analog switch enable"] #[inline(always)] pub fn g0p0(&mut self) -> G0P0_W { G0P0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "I/O analog switch register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [asw](index.html) module"] pub struct ASW_SPEC; impl crate::RegisterSpec for ASW_SPEC { type Ux = u32; } #[doc = "`read()` method returns [asw::R](R) reader structure"] impl crate::Readable for ASW_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [asw::W](W) writer structure"] impl crate::Writable for ASW_SPEC { type Writer = W; } #[doc = "`reset()` method sets ASW to value 0"] impl crate::Resettable for ASW_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "SAMPCFG register accessor: an alias for `Reg`"] pub type SAMPCFG = crate::Reg; #[doc = "I/O sample configuration register"] pub mod sampcfg { #[doc = "Register `SAMPCFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `SAMPCFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `G5P3` reader - G5P3 sampling mode"] pub struct G5P3_R(crate::FieldReader); impl G5P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P3` writer - G5P3 sampling mode"] pub struct G5P3_W<'a> { w: &'a mut W, } impl<'a> G5P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `G5P2` reader - G5P2 sampling mode"] pub struct G5P2_R(crate::FieldReader); impl G5P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P2` writer - G5P2 sampling mode"] pub struct G5P2_W<'a> { w: &'a mut W, } impl<'a> G5P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `G5P1` reader - G5P1 sampling mode"] pub struct G5P1_R(crate::FieldReader); impl G5P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P1` writer - G5P1 sampling mode"] pub struct G5P1_W<'a> { w: &'a mut W, } impl<'a> G5P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `G5P0` reader - G5P0 sampling mode"] pub struct G5P0_R(crate::FieldReader); impl G5P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P0` writer - G5P0 sampling mode"] pub struct G5P0_W<'a> { w: &'a mut W, } impl<'a> G5P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `G4P3` reader - G4P3 sampling mode"] pub struct G4P3_R(crate::FieldReader); impl G4P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P3` writer - G4P3 sampling mode"] pub struct G4P3_W<'a> { w: &'a mut W, } impl<'a> G4P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `G4P2` reader - G4P2 sampling mode"] pub struct G4P2_R(crate::FieldReader); impl G4P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P2` writer - G4P2 sampling mode"] pub struct G4P2_W<'a> { w: &'a mut W, } impl<'a> G4P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `G4P1` reader - G4P1 sampling mode"] pub struct G4P1_R(crate::FieldReader); impl G4P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P1` writer - G4P1 sampling mode"] pub struct G4P1_W<'a> { w: &'a mut W, } impl<'a> G4P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `G4P0` reader - G4P0 sampling mode"] pub struct G4P0_R(crate::FieldReader); impl G4P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P0` writer - G4P0 sampling mode"] pub struct G4P0_W<'a> { w: &'a mut W, } impl<'a> G4P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `G3P3` reader - G3P3 sampling mode"] pub struct G3P3_R(crate::FieldReader); impl G3P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P3` writer - G3P3 sampling mode"] pub struct G3P3_W<'a> { w: &'a mut W, } impl<'a> G3P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `G3P2` reader - G3P2 sampling mode"] pub struct G3P2_R(crate::FieldReader); impl G3P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P2` writer - G3P2 sampling mode"] pub struct G3P2_W<'a> { w: &'a mut W, } impl<'a> G3P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `G3P1` reader - G3P1 sampling mode"] pub struct G3P1_R(crate::FieldReader); impl G3P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P1` writer - G3P1 sampling mode"] pub struct G3P1_W<'a> { w: &'a mut W, } impl<'a> G3P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `G3P0` reader - G3P0 sampling mode"] pub struct G3P0_R(crate::FieldReader); impl G3P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P0` writer - G3P0 sampling mode"] pub struct G3P0_W<'a> { w: &'a mut W, } impl<'a> G3P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `G2P3` reader - G2P3 sampling mode"] pub struct G2P3_R(crate::FieldReader); impl G2P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P3` writer - G2P3 sampling mode"] pub struct G2P3_W<'a> { w: &'a mut W, } impl<'a> G2P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `G2P2` reader - G2P2 sampling mode"] pub struct G2P2_R(crate::FieldReader); impl G2P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P2` writer - G2P2 sampling mode"] pub struct G2P2_W<'a> { w: &'a mut W, } impl<'a> G2P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `G2P1` reader - G2P1 sampling mode"] pub struct G2P1_R(crate::FieldReader); impl G2P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P1` writer - G2P1 sampling mode"] pub struct G2P1_W<'a> { w: &'a mut W, } impl<'a> G2P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `G2P0` reader - G2P0 sampling mode"] pub struct G2P0_R(crate::FieldReader); impl G2P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P0` writer - G2P0 sampling mode"] pub struct G2P0_W<'a> { w: &'a mut W, } impl<'a> G2P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `G1P3` reader - G1P3 sampling mode"] pub struct G1P3_R(crate::FieldReader); impl G1P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P3` writer - G1P3 sampling mode"] pub struct G1P3_W<'a> { w: &'a mut W, } impl<'a> G1P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `G1P2` reader - G1P2 sampling mode"] pub struct G1P2_R(crate::FieldReader); impl G1P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P2` writer - G1P2 sampling mode"] pub struct G1P2_W<'a> { w: &'a mut W, } impl<'a> G1P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `G1P1` reader - G1P1 sampling mode"] pub struct G1P1_R(crate::FieldReader); impl G1P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P1` writer - G1P1 sampling mode"] pub struct G1P1_W<'a> { w: &'a mut W, } impl<'a> G1P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `G1P0` reader - G1P0 sampling mode"] pub struct G1P0_R(crate::FieldReader); impl G1P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P0` writer - G1P0 sampling mode"] pub struct G1P0_W<'a> { w: &'a mut W, } impl<'a> G1P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `G0P3` reader - G0P3 sampling mode"] pub struct G0P3_R(crate::FieldReader); impl G0P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P3` writer - G0P3 sampling mode"] pub struct G0P3_W<'a> { w: &'a mut W, } impl<'a> G0P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `G0P2` reader - G0P2 sampling mode"] pub struct G0P2_R(crate::FieldReader); impl G0P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P2` writer - G0P2 sampling mode"] pub struct G0P2_W<'a> { w: &'a mut W, } impl<'a> G0P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `G0P1` reader - G0P1 sampling mode"] pub struct G0P1_R(crate::FieldReader); impl G0P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P1` writer - G0P1 sampling mode"] pub struct G0P1_W<'a> { w: &'a mut W, } impl<'a> G0P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `G0P0` reader - G0P0 sampling mode"] pub struct G0P0_R(crate::FieldReader); impl G0P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P0` writer - G0P0 sampling mode"] pub struct G0P0_W<'a> { w: &'a mut W, } impl<'a> G0P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 23 - G5P3 sampling mode"] #[inline(always)] pub fn g5p3(&self) -> G5P3_R { G5P3_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 22 - G5P2 sampling mode"] #[inline(always)] pub fn g5p2(&self) -> G5P2_R { G5P2_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 21 - G5P1 sampling mode"] #[inline(always)] pub fn g5p1(&self) -> G5P1_R { G5P1_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - G5P0 sampling mode"] #[inline(always)] pub fn g5p0(&self) -> G5P0_R { G5P0_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - G4P3 sampling mode"] #[inline(always)] pub fn g4p3(&self) -> G4P3_R { G4P3_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - G4P2 sampling mode"] #[inline(always)] pub fn g4p2(&self) -> G4P2_R { G4P2_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - G4P1 sampling mode"] #[inline(always)] pub fn g4p1(&self) -> G4P1_R { G4P1_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - G4P0 sampling mode"] #[inline(always)] pub fn g4p0(&self) -> G4P0_R { G4P0_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - G3P3 sampling mode"] #[inline(always)] pub fn g3p3(&self) -> G3P3_R { G3P3_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - G3P2 sampling mode"] #[inline(always)] pub fn g3p2(&self) -> G3P2_R { G3P2_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - G3P1 sampling mode"] #[inline(always)] pub fn g3p1(&self) -> G3P1_R { G3P1_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - G3P0 sampling mode"] #[inline(always)] pub fn g3p0(&self) -> G3P0_R { G3P0_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - G2P3 sampling mode"] #[inline(always)] pub fn g2p3(&self) -> G2P3_R { G2P3_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - G2P2 sampling mode"] #[inline(always)] pub fn g2p2(&self) -> G2P2_R { G2P2_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - G2P1 sampling mode"] #[inline(always)] pub fn g2p1(&self) -> G2P1_R { G2P1_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - G2P0 sampling mode"] #[inline(always)] pub fn g2p0(&self) -> G2P0_R { G2P0_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - G1P3 sampling mode"] #[inline(always)] pub fn g1p3(&self) -> G1P3_R { G1P3_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - G1P2 sampling mode"] #[inline(always)] pub fn g1p2(&self) -> G1P2_R { G1P2_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - G1P1 sampling mode"] #[inline(always)] pub fn g1p1(&self) -> G1P1_R { G1P1_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - G1P0 sampling mode"] #[inline(always)] pub fn g1p0(&self) -> G1P0_R { G1P0_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - G0P3 sampling mode"] #[inline(always)] pub fn g0p3(&self) -> G0P3_R { G0P3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - G0P2 sampling mode"] #[inline(always)] pub fn g0p2(&self) -> G0P2_R { G0P2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - G0P1 sampling mode"] #[inline(always)] pub fn g0p1(&self) -> G0P1_R { G0P1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - G0P0 sampling mode"] #[inline(always)] pub fn g0p0(&self) -> G0P0_R { G0P0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 23 - G5P3 sampling mode"] #[inline(always)] pub fn g5p3(&mut self) -> G5P3_W { G5P3_W { w: self } } #[doc = "Bit 22 - G5P2 sampling mode"] #[inline(always)] pub fn g5p2(&mut self) -> G5P2_W { G5P2_W { w: self } } #[doc = "Bit 21 - G5P1 sampling mode"] #[inline(always)] pub fn g5p1(&mut self) -> G5P1_W { G5P1_W { w: self } } #[doc = "Bit 20 - G5P0 sampling mode"] #[inline(always)] pub fn g5p0(&mut self) -> G5P0_W { G5P0_W { w: self } } #[doc = "Bit 19 - G4P3 sampling mode"] #[inline(always)] pub fn g4p3(&mut self) -> G4P3_W { G4P3_W { w: self } } #[doc = "Bit 18 - G4P2 sampling mode"] #[inline(always)] pub fn g4p2(&mut self) -> G4P2_W { G4P2_W { w: self } } #[doc = "Bit 17 - G4P1 sampling mode"] #[inline(always)] pub fn g4p1(&mut self) -> G4P1_W { G4P1_W { w: self } } #[doc = "Bit 16 - G4P0 sampling mode"] #[inline(always)] pub fn g4p0(&mut self) -> G4P0_W { G4P0_W { w: self } } #[doc = "Bit 15 - G3P3 sampling mode"] #[inline(always)] pub fn g3p3(&mut self) -> G3P3_W { G3P3_W { w: self } } #[doc = "Bit 14 - G3P2 sampling mode"] #[inline(always)] pub fn g3p2(&mut self) -> G3P2_W { G3P2_W { w: self } } #[doc = "Bit 13 - G3P1 sampling mode"] #[inline(always)] pub fn g3p1(&mut self) -> G3P1_W { G3P1_W { w: self } } #[doc = "Bit 12 - G3P0 sampling mode"] #[inline(always)] pub fn g3p0(&mut self) -> G3P0_W { G3P0_W { w: self } } #[doc = "Bit 11 - G2P3 sampling mode"] #[inline(always)] pub fn g2p3(&mut self) -> G2P3_W { G2P3_W { w: self } } #[doc = "Bit 10 - G2P2 sampling mode"] #[inline(always)] pub fn g2p2(&mut self) -> G2P2_W { G2P2_W { w: self } } #[doc = "Bit 9 - G2P1 sampling mode"] #[inline(always)] pub fn g2p1(&mut self) -> G2P1_W { G2P1_W { w: self } } #[doc = "Bit 8 - G2P0 sampling mode"] #[inline(always)] pub fn g2p0(&mut self) -> G2P0_W { G2P0_W { w: self } } #[doc = "Bit 7 - G1P3 sampling mode"] #[inline(always)] pub fn g1p3(&mut self) -> G1P3_W { G1P3_W { w: self } } #[doc = "Bit 6 - G1P2 sampling mode"] #[inline(always)] pub fn g1p2(&mut self) -> G1P2_W { G1P2_W { w: self } } #[doc = "Bit 5 - G1P1 sampling mode"] #[inline(always)] pub fn g1p1(&mut self) -> G1P1_W { G1P1_W { w: self } } #[doc = "Bit 4 - G1P0 sampling mode"] #[inline(always)] pub fn g1p0(&mut self) -> G1P0_W { G1P0_W { w: self } } #[doc = "Bit 3 - G0P3 sampling mode"] #[inline(always)] pub fn g0p3(&mut self) -> G0P3_W { G0P3_W { w: self } } #[doc = "Bit 2 - G0P2 sampling mode"] #[inline(always)] pub fn g0p2(&mut self) -> G0P2_W { G0P2_W { w: self } } #[doc = "Bit 1 - G0P1 sampling mode"] #[inline(always)] pub fn g0p1(&mut self) -> G0P1_W { G0P1_W { w: self } } #[doc = "Bit 0 - G0P0 sampling mode"] #[inline(always)] pub fn g0p0(&mut self) -> G0P0_W { G0P0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "I/O sample configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sampcfg](index.html) module"] pub struct SAMPCFG_SPEC; impl crate::RegisterSpec for SAMPCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [sampcfg::R](R) reader structure"] impl crate::Readable for SAMPCFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [sampcfg::W](W) writer structure"] impl crate::Writable for SAMPCFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets SAMPCFG to value 0"] impl crate::Resettable for SAMPCFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CHCFG register accessor: an alias for `Reg`"] pub type CHCFG = crate::Reg; #[doc = "I/O channel configuration register"] pub mod chcfg { #[doc = "Register `CHCFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CHCFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `G5P3` reader - G5P3 channel mode"] pub struct G5P3_R(crate::FieldReader); impl G5P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P3` writer - G5P3 channel mode"] pub struct G5P3_W<'a> { w: &'a mut W, } impl<'a> G5P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `G5P2` reader - G5P2 channel mode"] pub struct G5P2_R(crate::FieldReader); impl G5P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P2` writer - G5P2 channel mode"] pub struct G5P2_W<'a> { w: &'a mut W, } impl<'a> G5P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `G5P1` reader - G5P1 channel mode"] pub struct G5P1_R(crate::FieldReader); impl G5P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P1` writer - G5P1 channel mode"] pub struct G5P1_W<'a> { w: &'a mut W, } impl<'a> G5P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `G5P0` reader - G5P0 channel mode"] pub struct G5P0_R(crate::FieldReader); impl G5P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G5P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G5P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G5P0` writer - G5P0 channel mode"] pub struct G5P0_W<'a> { w: &'a mut W, } impl<'a> G5P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `G4P3` reader - G4P3 channel mode"] pub struct G4P3_R(crate::FieldReader); impl G4P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P3` writer - G4P3 channel mode"] pub struct G4P3_W<'a> { w: &'a mut W, } impl<'a> G4P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `G4P2` reader - G4P2 channel mode"] pub struct G4P2_R(crate::FieldReader); impl G4P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P2` writer - G4P2 channel mode"] pub struct G4P2_W<'a> { w: &'a mut W, } impl<'a> G4P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `G4P1` reader - G4P1 channel mode"] pub struct G4P1_R(crate::FieldReader); impl G4P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P1` writer - G4P1 channel mode"] pub struct G4P1_W<'a> { w: &'a mut W, } impl<'a> G4P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `G4P0` reader - G4P0 channel mode"] pub struct G4P0_R(crate::FieldReader); impl G4P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G4P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G4P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G4P0` writer - G4P0 channel mode"] pub struct G4P0_W<'a> { w: &'a mut W, } impl<'a> G4P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `G3P3` reader - G3P3 channel mode"] pub struct G3P3_R(crate::FieldReader); impl G3P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P3` writer - G3P3 channel mode"] pub struct G3P3_W<'a> { w: &'a mut W, } impl<'a> G3P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `G3P2` reader - G3P2 channel mode"] pub struct G3P2_R(crate::FieldReader); impl G3P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P2` writer - G3P2 channel mode"] pub struct G3P2_W<'a> { w: &'a mut W, } impl<'a> G3P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `G3P1` reader - G3P1 channel mode"] pub struct G3P1_R(crate::FieldReader); impl G3P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P1` writer - G3P1 channel mode"] pub struct G3P1_W<'a> { w: &'a mut W, } impl<'a> G3P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `G3P0` reader - G3P0 channel mode"] pub struct G3P0_R(crate::FieldReader); impl G3P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G3P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G3P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G3P0` writer - G3P0 channel mode"] pub struct G3P0_W<'a> { w: &'a mut W, } impl<'a> G3P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `G2P3` reader - G2P3 channel mode"] pub struct G2P3_R(crate::FieldReader); impl G2P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P3` writer - G2P3 channel mode"] pub struct G2P3_W<'a> { w: &'a mut W, } impl<'a> G2P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `G2P2` reader - G2P2 channel mode"] pub struct G2P2_R(crate::FieldReader); impl G2P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P2` writer - G2P2 channel mode"] pub struct G2P2_W<'a> { w: &'a mut W, } impl<'a> G2P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `G2P1` reader - G2P1 channel mode"] pub struct G2P1_R(crate::FieldReader); impl G2P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P1` writer - G2P1 channel mode"] pub struct G2P1_W<'a> { w: &'a mut W, } impl<'a> G2P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `G2P0` reader - G2P0 channel mode"] pub struct G2P0_R(crate::FieldReader); impl G2P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G2P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G2P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G2P0` writer - G2P0 channel mode"] pub struct G2P0_W<'a> { w: &'a mut W, } impl<'a> G2P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `G1P3` reader - G1P3 channel mode"] pub struct G1P3_R(crate::FieldReader); impl G1P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P3` writer - G1P3 channel mode"] pub struct G1P3_W<'a> { w: &'a mut W, } impl<'a> G1P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `G1P2` reader - G1P2 channel mode"] pub struct G1P2_R(crate::FieldReader); impl G1P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P2` writer - G1P2 channel mode"] pub struct G1P2_W<'a> { w: &'a mut W, } impl<'a> G1P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `G1P1` reader - G1P1 channel mode"] pub struct G1P1_R(crate::FieldReader); impl G1P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P1` writer - G1P1 channel mode"] pub struct G1P1_W<'a> { w: &'a mut W, } impl<'a> G1P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `G1P0` reader - G1P0 channel mode"] pub struct G1P0_R(crate::FieldReader); impl G1P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G1P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G1P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G1P0` writer - G1P0 channel mode"] pub struct G1P0_W<'a> { w: &'a mut W, } impl<'a> G1P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `G0P3` reader - G0P3 channel mode"] pub struct G0P3_R(crate::FieldReader); impl G0P3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P3` writer - G0P3 channel mode"] pub struct G0P3_W<'a> { w: &'a mut W, } impl<'a> G0P3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `G0P2` reader - G0P2 channel mode"] pub struct G0P2_R(crate::FieldReader); impl G0P2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P2` writer - G0P2 channel mode"] pub struct G0P2_W<'a> { w: &'a mut W, } impl<'a> G0P2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `G0P1` reader - G0P1 channel mode"] pub struct G0P1_R(crate::FieldReader); impl G0P1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P1` writer - G0P1 channel mode"] pub struct G0P1_W<'a> { w: &'a mut W, } impl<'a> G0P1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `G0P0` reader - G0P0 channel mode"] pub struct G0P0_R(crate::FieldReader); impl G0P0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { G0P0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for G0P0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `G0P0` writer - G0P0 channel mode"] pub struct G0P0_W<'a> { w: &'a mut W, } impl<'a> G0P0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 23 - G5P3 channel mode"] #[inline(always)] pub fn g5p3(&self) -> G5P3_R { G5P3_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 22 - G5P2 channel mode"] #[inline(always)] pub fn g5p2(&self) -> G5P2_R { G5P2_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 21 - G5P1 channel mode"] #[inline(always)] pub fn g5p1(&self) -> G5P1_R { G5P1_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - G5P0 channel mode"] #[inline(always)] pub fn g5p0(&self) -> G5P0_R { G5P0_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - G4P3 channel mode"] #[inline(always)] pub fn g4p3(&self) -> G4P3_R { G4P3_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - G4P2 channel mode"] #[inline(always)] pub fn g4p2(&self) -> G4P2_R { G4P2_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - G4P1 channel mode"] #[inline(always)] pub fn g4p1(&self) -> G4P1_R { G4P1_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - G4P0 channel mode"] #[inline(always)] pub fn g4p0(&self) -> G4P0_R { G4P0_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - G3P3 channel mode"] #[inline(always)] pub fn g3p3(&self) -> G3P3_R { G3P3_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - G3P2 channel mode"] #[inline(always)] pub fn g3p2(&self) -> G3P2_R { G3P2_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - G3P1 channel mode"] #[inline(always)] pub fn g3p1(&self) -> G3P1_R { G3P1_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - G3P0 channel mode"] #[inline(always)] pub fn g3p0(&self) -> G3P0_R { G3P0_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - G2P3 channel mode"] #[inline(always)] pub fn g2p3(&self) -> G2P3_R { G2P3_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - G2P2 channel mode"] #[inline(always)] pub fn g2p2(&self) -> G2P2_R { G2P2_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - G2P1 channel mode"] #[inline(always)] pub fn g2p1(&self) -> G2P1_R { G2P1_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - G2P0 channel mode"] #[inline(always)] pub fn g2p0(&self) -> G2P0_R { G2P0_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - G1P3 channel mode"] #[inline(always)] pub fn g1p3(&self) -> G1P3_R { G1P3_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - G1P2 channel mode"] #[inline(always)] pub fn g1p2(&self) -> G1P2_R { G1P2_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - G1P1 channel mode"] #[inline(always)] pub fn g1p1(&self) -> G1P1_R { G1P1_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - G1P0 channel mode"] #[inline(always)] pub fn g1p0(&self) -> G1P0_R { G1P0_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - G0P3 channel mode"] #[inline(always)] pub fn g0p3(&self) -> G0P3_R { G0P3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - G0P2 channel mode"] #[inline(always)] pub fn g0p2(&self) -> G0P2_R { G0P2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - G0P1 channel mode"] #[inline(always)] pub fn g0p1(&self) -> G0P1_R { G0P1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - G0P0 channel mode"] #[inline(always)] pub fn g0p0(&self) -> G0P0_R { G0P0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 23 - G5P3 channel mode"] #[inline(always)] pub fn g5p3(&mut self) -> G5P3_W { G5P3_W { w: self } } #[doc = "Bit 22 - G5P2 channel mode"] #[inline(always)] pub fn g5p2(&mut self) -> G5P2_W { G5P2_W { w: self } } #[doc = "Bit 21 - G5P1 channel mode"] #[inline(always)] pub fn g5p1(&mut self) -> G5P1_W { G5P1_W { w: self } } #[doc = "Bit 20 - G5P0 channel mode"] #[inline(always)] pub fn g5p0(&mut self) -> G5P0_W { G5P0_W { w: self } } #[doc = "Bit 19 - G4P3 channel mode"] #[inline(always)] pub fn g4p3(&mut self) -> G4P3_W { G4P3_W { w: self } } #[doc = "Bit 18 - G4P2 channel mode"] #[inline(always)] pub fn g4p2(&mut self) -> G4P2_W { G4P2_W { w: self } } #[doc = "Bit 17 - G4P1 channel mode"] #[inline(always)] pub fn g4p1(&mut self) -> G4P1_W { G4P1_W { w: self } } #[doc = "Bit 16 - G4P0 channel mode"] #[inline(always)] pub fn g4p0(&mut self) -> G4P0_W { G4P0_W { w: self } } #[doc = "Bit 15 - G3P3 channel mode"] #[inline(always)] pub fn g3p3(&mut self) -> G3P3_W { G3P3_W { w: self } } #[doc = "Bit 14 - G3P2 channel mode"] #[inline(always)] pub fn g3p2(&mut self) -> G3P2_W { G3P2_W { w: self } } #[doc = "Bit 13 - G3P1 channel mode"] #[inline(always)] pub fn g3p1(&mut self) -> G3P1_W { G3P1_W { w: self } } #[doc = "Bit 12 - G3P0 channel mode"] #[inline(always)] pub fn g3p0(&mut self) -> G3P0_W { G3P0_W { w: self } } #[doc = "Bit 11 - G2P3 channel mode"] #[inline(always)] pub fn g2p3(&mut self) -> G2P3_W { G2P3_W { w: self } } #[doc = "Bit 10 - G2P2 channel mode"] #[inline(always)] pub fn g2p2(&mut self) -> G2P2_W { G2P2_W { w: self } } #[doc = "Bit 9 - G2P1 channel mode"] #[inline(always)] pub fn g2p1(&mut self) -> G2P1_W { G2P1_W { w: self } } #[doc = "Bit 8 - G2P0 channel mode"] #[inline(always)] pub fn g2p0(&mut self) -> G2P0_W { G2P0_W { w: self } } #[doc = "Bit 7 - G1P3 channel mode"] #[inline(always)] pub fn g1p3(&mut self) -> G1P3_W { G1P3_W { w: self } } #[doc = "Bit 6 - G1P2 channel mode"] #[inline(always)] pub fn g1p2(&mut self) -> G1P2_W { G1P2_W { w: self } } #[doc = "Bit 5 - G1P1 channel mode"] #[inline(always)] pub fn g1p1(&mut self) -> G1P1_W { G1P1_W { w: self } } #[doc = "Bit 4 - G1P0 channel mode"] #[inline(always)] pub fn g1p0(&mut self) -> G1P0_W { G1P0_W { w: self } } #[doc = "Bit 3 - G0P3 channel mode"] #[inline(always)] pub fn g0p3(&mut self) -> G0P3_W { G0P3_W { w: self } } #[doc = "Bit 2 - G0P2 channel mode"] #[inline(always)] pub fn g0p2(&mut self) -> G0P2_W { G0P2_W { w: self } } #[doc = "Bit 1 - G0P1 channel mode"] #[inline(always)] pub fn g0p1(&mut self) -> G0P1_W { G0P1_W { w: self } } #[doc = "Bit 0 - G0P0 channel mode"] #[inline(always)] pub fn g0p0(&mut self) -> G0P0_W { G0P0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "I/O channel configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chcfg](index.html) module"] pub struct CHCFG_SPEC; impl crate::RegisterSpec for CHCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [chcfg::R](R) reader structure"] impl crate::Readable for CHCFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [chcfg::W](W) writer structure"] impl crate::Writable for CHCFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets CHCFG to value 0"] impl crate::Resettable for CHCFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "GCTL register accessor: an alias for `Reg`"] pub type GCTL = crate::Reg; #[doc = "I/O group control register"] pub mod gctl { #[doc = "Register `GCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `GC5` reader - Analog I/O group x status"] pub struct GC5_R(crate::FieldReader); impl GC5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GC5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GC5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GC4` reader - Analog I/O group x status"] pub struct GC4_R(crate::FieldReader); impl GC4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GC4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GC4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GC3` reader - Analog I/O group x status"] pub struct GC3_R(crate::FieldReader); impl GC3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GC3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GC3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GC2` reader - Analog I/O group x status"] pub struct GC2_R(crate::FieldReader); impl GC2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GC2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GC2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GC1` reader - Analog I/O group x status"] pub struct GC1_R(crate::FieldReader); impl GC1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GC1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GC1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GC0` reader - Analog I/O group x status"] pub struct GC0_R(crate::FieldReader); impl GC0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GC0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GC0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GE5` reader - Analog I/O group x enable"] pub struct GE5_R(crate::FieldReader); impl GE5_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GE5_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GE5_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GE5` writer - Analog I/O group x enable"] pub struct GE5_W<'a> { w: &'a mut W, } impl<'a> GE5_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `GE4` reader - Analog I/O group x enable"] pub struct GE4_R(crate::FieldReader); impl GE4_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GE4_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GE4_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GE4` writer - Analog I/O group x enable"] pub struct GE4_W<'a> { w: &'a mut W, } impl<'a> GE4_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `GE3` reader - Analog I/O group x enable"] pub struct GE3_R(crate::FieldReader); impl GE3_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GE3_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GE3_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GE3` writer - Analog I/O group x enable"] pub struct GE3_W<'a> { w: &'a mut W, } impl<'a> GE3_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `GE2` reader - Analog I/O group x enable"] pub struct GE2_R(crate::FieldReader); impl GE2_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GE2_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GE2_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GE2` writer - Analog I/O group x enable"] pub struct GE2_W<'a> { w: &'a mut W, } impl<'a> GE2_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `GE1` reader - Analog I/O group x enable"] pub struct GE1_R(crate::FieldReader); impl GE1_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GE1_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GE1_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GE1` writer - Analog I/O group x enable"] pub struct GE1_W<'a> { w: &'a mut W, } impl<'a> GE1_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `GE0` reader - Analog I/O group x enable"] pub struct GE0_R(crate::FieldReader); impl GE0_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GE0_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GE0_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GE0` writer - Analog I/O group x enable"] pub struct GE0_W<'a> { w: &'a mut W, } impl<'a> GE0_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 21 - Analog I/O group x status"] #[inline(always)] pub fn gc5(&self) -> GC5_R { GC5_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - Analog I/O group x status"] #[inline(always)] pub fn gc4(&self) -> GC4_R { GC4_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - Analog I/O group x status"] #[inline(always)] pub fn gc3(&self) -> GC3_R { GC3_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - Analog I/O group x status"] #[inline(always)] pub fn gc2(&self) -> GC2_R { GC2_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - Analog I/O group x status"] #[inline(always)] pub fn gc1(&self) -> GC1_R { GC1_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - Analog I/O group x status"] #[inline(always)] pub fn gc0(&self) -> GC0_R { GC0_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 5 - Analog I/O group x enable"] #[inline(always)] pub fn ge5(&self) -> GE5_R { GE5_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Analog I/O group x enable"] #[inline(always)] pub fn ge4(&self) -> GE4_R { GE4_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Analog I/O group x enable"] #[inline(always)] pub fn ge3(&self) -> GE3_R { GE3_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Analog I/O group x enable"] #[inline(always)] pub fn ge2(&self) -> GE2_R { GE2_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Analog I/O group x enable"] #[inline(always)] pub fn ge1(&self) -> GE1_R { GE1_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Analog I/O group x enable"] #[inline(always)] pub fn ge0(&self) -> GE0_R { GE0_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 5 - Analog I/O group x enable"] #[inline(always)] pub fn ge5(&mut self) -> GE5_W { GE5_W { w: self } } #[doc = "Bit 4 - Analog I/O group x enable"] #[inline(always)] pub fn ge4(&mut self) -> GE4_W { GE4_W { w: self } } #[doc = "Bit 3 - Analog I/O group x enable"] #[inline(always)] pub fn ge3(&mut self) -> GE3_W { GE3_W { w: self } } #[doc = "Bit 2 - Analog I/O group x enable"] #[inline(always)] pub fn ge2(&mut self) -> GE2_W { GE2_W { w: self } } #[doc = "Bit 1 - Analog I/O group x enable"] #[inline(always)] pub fn ge1(&mut self) -> GE1_W { GE1_W { w: self } } #[doc = "Bit 0 - Analog I/O group x enable"] #[inline(always)] pub fn ge0(&mut self) -> GE0_W { GE0_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "I/O group control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gctl](index.html) module"] pub struct GCTL_SPEC; impl crate::RegisterSpec for GCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [gctl::R](R) reader structure"] impl crate::Readable for GCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [gctl::W](W) writer structure"] impl crate::Writable for GCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets GCTL to value 0"] impl crate::Resettable for GCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "G0CYCN register accessor: an alias for `Reg`"] pub type G0CYCN = crate::Reg; #[doc = "I/O group x cycle number register"] pub mod g0cycn { #[doc = "Register `G0CYCN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `CYCN` reader - Cycle number"] pub struct CYCN_R(crate::FieldReader); impl CYCN_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CYCN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CYCN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:13 - Cycle number"] #[inline(always)] pub fn cycn(&self) -> CYCN_R { CYCN_R::new((self.bits & 0x3fff) as u16) } } #[doc = "I/O group x cycle number register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [g0cycn](index.html) module"] pub struct G0CYCN_SPEC; impl crate::RegisterSpec for G0CYCN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [g0cycn::R](R) reader structure"] impl crate::Readable for G0CYCN_SPEC { type Reader = R; } #[doc = "`reset()` method sets G0CYCN to value 0"] impl crate::Resettable for G0CYCN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "G1CYCN register accessor: an alias for `Reg`"] pub type G1CYCN = crate::Reg; #[doc = "I/O group x cycle number register"] pub mod g1cycn { #[doc = "Register `G1CYCN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `CYCN` reader - Cycle number"] pub struct CYCN_R(crate::FieldReader); impl CYCN_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CYCN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CYCN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:13 - Cycle number"] #[inline(always)] pub fn cycn(&self) -> CYCN_R { CYCN_R::new((self.bits & 0x3fff) as u16) } } #[doc = "I/O group x cycle number register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [g1cycn](index.html) module"] pub struct G1CYCN_SPEC; impl crate::RegisterSpec for G1CYCN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [g1cycn::R](R) reader structure"] impl crate::Readable for G1CYCN_SPEC { type Reader = R; } #[doc = "`reset()` method sets G1CYCN to value 0"] impl crate::Resettable for G1CYCN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "G2CYCN register accessor: an alias for `Reg`"] pub type G2CYCN = crate::Reg; #[doc = "I/O group x cycle number register"] pub mod g2cycn { #[doc = "Register `G2CYCN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `CYCN` reader - Cycle number"] pub struct CYCN_R(crate::FieldReader); impl CYCN_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CYCN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CYCN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:13 - Cycle number"] #[inline(always)] pub fn cycn(&self) -> CYCN_R { CYCN_R::new((self.bits & 0x3fff) as u16) } } #[doc = "I/O group x cycle number register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [g2cycn](index.html) module"] pub struct G2CYCN_SPEC; impl crate::RegisterSpec for G2CYCN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [g2cycn::R](R) reader structure"] impl crate::Readable for G2CYCN_SPEC { type Reader = R; } #[doc = "`reset()` method sets G2CYCN to value 0"] impl crate::Resettable for G2CYCN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "G3CYCN register accessor: an alias for `Reg`"] pub type G3CYCN = crate::Reg; #[doc = "I/O group x cycle number register"] pub mod g3cycn { #[doc = "Register `G3CYCN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `CYCN` reader - Cycle number"] pub struct CYCN_R(crate::FieldReader); impl CYCN_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CYCN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CYCN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:13 - Cycle number"] #[inline(always)] pub fn cycn(&self) -> CYCN_R { CYCN_R::new((self.bits & 0x3fff) as u16) } } #[doc = "I/O group x cycle number register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [g3cycn](index.html) module"] pub struct G3CYCN_SPEC; impl crate::RegisterSpec for G3CYCN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [g3cycn::R](R) reader structure"] impl crate::Readable for G3CYCN_SPEC { type Reader = R; } #[doc = "`reset()` method sets G3CYCN to value 0"] impl crate::Resettable for G3CYCN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "G4CYCN register accessor: an alias for `Reg`"] pub type G4CYCN = crate::Reg; #[doc = "I/O group x cycle number register"] pub mod g4cycn { #[doc = "Register `G4CYCN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `CYCN` reader - Cycle number"] pub struct CYCN_R(crate::FieldReader); impl CYCN_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CYCN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CYCN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:13 - Cycle number"] #[inline(always)] pub fn cycn(&self) -> CYCN_R { CYCN_R::new((self.bits & 0x3fff) as u16) } } #[doc = "I/O group x cycle number register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [g4cycn](index.html) module"] pub struct G4CYCN_SPEC; impl crate::RegisterSpec for G4CYCN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [g4cycn::R](R) reader structure"] impl crate::Readable for G4CYCN_SPEC { type Reader = R; } #[doc = "`reset()` method sets G4CYCN to value 0"] impl crate::Resettable for G4CYCN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "G5CYCN register accessor: an alias for `Reg`"] pub type G5CYCN = crate::Reg; #[doc = "I/O group x cycle number register"] pub mod g5cycn { #[doc = "Register `G5CYCN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `CYCN` reader - Cycle number"] pub struct CYCN_R(crate::FieldReader); impl CYCN_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { CYCN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CYCN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:13 - Cycle number"] #[inline(always)] pub fn cycn(&self) -> CYCN_R { CYCN_R::new((self.bits & 0x3fff) as u16) } } #[doc = "I/O group x cycle number register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [g5cycn](index.html) module"] pub struct G5CYCN_SPEC; impl crate::RegisterSpec for G5CYCN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [g5cycn::R](R) reader structure"] impl crate::Readable for G5CYCN_SPEC { type Reader = R; } #[doc = "`reset()` method sets G5CYCN to value 0"] impl crate::Resettable for G5CYCN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ECDIV` reader - Extend Charge clock division factor"] pub struct ECDIV_R(crate::FieldReader); impl ECDIV_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ECDIV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ECDIV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ECDIV` writer - Extend Charge clock division factor"] pub struct ECDIV_W<'a> { w: &'a mut W, } impl<'a> ECDIV_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 28)) | ((value as u32 & 0x03) << 28); self.w } } #[doc = "Field `CTCDIV_MSB` reader - Charge Transfer clock division factor"] pub struct CTCDIV_MSB_R(crate::FieldReader); impl CTCDIV_MSB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CTCDIV_MSB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTCDIV_MSB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTCDIV_MSB` writer - Charge Transfer clock division factor"] pub struct CTCDIV_MSB_W<'a> { w: &'a mut W, } impl<'a> CTCDIV_MSB_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 24)) | ((value as u32 & 0x01) << 24); self.w } } impl R { #[doc = "Bits 28:29 - Extend Charge clock division factor"] #[inline(always)] pub fn ecdiv(&self) -> ECDIV_R { ECDIV_R::new(((self.bits >> 28) & 0x03) as u8) } #[doc = "Bit 24 - Charge Transfer clock division factor"] #[inline(always)] pub fn ctcdiv_msb(&self) -> CTCDIV_MSB_R { CTCDIV_MSB_R::new(((self.bits >> 24) & 0x01) != 0) } } impl W { #[doc = "Bits 28:29 - Extend Charge clock division factor"] #[inline(always)] pub fn ecdiv(&mut self) -> ECDIV_W { ECDIV_W { w: self } } #[doc = "Bit 24 - Charge Transfer clock division factor"] #[inline(always)] pub fn ctcdiv_msb(&mut self) -> CTCDIV_MSB_W { CTCDIV_MSB_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Universal synchronous asynchronous receiver transmitter"] pub struct USART0 { _marker: PhantomData<*const ()>, } unsafe impl Send for USART0 {} impl USART0 { #[doc = r"Pointer to the register block"] pub const PTR: *const usart0::RegisterBlock = 0x4001_3800 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const usart0::RegisterBlock { Self::PTR } } impl Deref for USART0 { type Target = usart0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for USART0 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("USART0").finish() } } #[doc = "Universal synchronous asynchronous receiver transmitter"] pub mod usart0 { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Control register 0"] pub ctl0: crate::Reg, #[doc = "0x04 - Control register 1"] pub ctl1: crate::Reg, #[doc = "0x08 - Control register 2"] pub ctl2: crate::Reg, #[doc = "0x0c - Baud rate register"] pub baud: crate::Reg, #[doc = "0x10 - Guard time and prescaler register"] pub gp: crate::Reg, #[doc = "0x14 - Receiver timeout register"] pub rt: crate::Reg, #[doc = "0x18 - Request register"] pub cmd: crate::Reg, #[doc = "0x1c - Interrupt & status register"] pub stat: crate::Reg, #[doc = "0x20 - Interrupt flag clear register"] pub intc: crate::Reg, #[doc = "0x24 - Receive data register"] pub rdata: crate::Reg, #[doc = "0x28 - Transmit data register"] pub tdata: crate::Reg, _reserved11: [u8; 0xa4], #[doc = "0xd0 - USART receive FIFO control and status register"] pub rfcs: crate::Reg, } #[doc = "CTL0 register accessor: an alias for `Reg`"] pub type CTL0 = crate::Reg; #[doc = "Control register 0"] pub mod ctl0 { #[doc = "Register `CTL0` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL0` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EBIE` reader - End of Block interrupt enable"] pub struct EBIE_R(crate::FieldReader); impl EBIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EBIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EBIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EBIE` writer - End of Block interrupt enable"] pub struct EBIE_W<'a> { w: &'a mut W, } impl<'a> EBIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `RTIE` reader - Receiver timeout interrupt enable"] pub struct RTIE_R(crate::FieldReader); impl RTIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTIE` writer - Receiver timeout interrupt enable"] pub struct RTIE_W<'a> { w: &'a mut W, } impl<'a> RTIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `DEA` reader - Driver Enable assertion time"] pub struct DEA_R(crate::FieldReader); impl DEA_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DEA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DEA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DEA` writer - Driver Enable assertion time"] pub struct DEA_W<'a> { w: &'a mut W, } impl<'a> DEA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 21)) | ((value as u32 & 0x1f) << 21); self.w } } #[doc = "Field `DED` reader - Driver Enable deassertion time"] pub struct DED_R(crate::FieldReader); impl DED_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DED_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DED_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DED` writer - Driver Enable deassertion time"] pub struct DED_W<'a> { w: &'a mut W, } impl<'a> DED_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 16)) | ((value as u32 & 0x1f) << 16); self.w } } #[doc = "Field `OVSMOD` reader - Oversampling mode"] pub struct OVSMOD_R(crate::FieldReader); impl OVSMOD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OVSMOD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OVSMOD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OVSMOD` writer - Oversampling mode"] pub struct OVSMOD_W<'a> { w: &'a mut W, } impl<'a> OVSMOD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `AMIE` reader - Character match interrupt enable"] pub struct AMIE_R(crate::FieldReader); impl AMIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { AMIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for AMIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `AMIE` writer - Character match interrupt enable"] pub struct AMIE_W<'a> { w: &'a mut W, } impl<'a> AMIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `MEN` reader - Mute mode enable"] pub struct MEN_R(crate::FieldReader); impl MEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MEN` writer - Mute mode enable"] pub struct MEN_W<'a> { w: &'a mut W, } impl<'a> MEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `WL` reader - Word length"] pub struct WL_R(crate::FieldReader); impl WL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WL` writer - Word length"] pub struct WL_W<'a> { w: &'a mut W, } impl<'a> WL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `WM` reader - Receiver wakeup method"] pub struct WM_R(crate::FieldReader); impl WM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WM` writer - Receiver wakeup method"] pub struct WM_W<'a> { w: &'a mut W, } impl<'a> WM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `PCEN` reader - Parity control enable"] pub struct PCEN_R(crate::FieldReader); impl PCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCEN` writer - Parity control enable"] pub struct PCEN_W<'a> { w: &'a mut W, } impl<'a> PCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `PM` reader - Parity selection"] pub struct PM_R(crate::FieldReader); impl PM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PM` writer - Parity selection"] pub struct PM_W<'a> { w: &'a mut W, } impl<'a> PM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `PERRIE` reader - PE interrupt enable"] pub struct PERRIE_R(crate::FieldReader); impl PERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PERRIE` writer - PE interrupt enable"] pub struct PERRIE_W<'a> { w: &'a mut W, } impl<'a> PERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TBEIE` reader - interrupt enable"] pub struct TBEIE_R(crate::FieldReader); impl TBEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TBEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TBEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TBEIE` writer - interrupt enable"] pub struct TBEIE_W<'a> { w: &'a mut W, } impl<'a> TBEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `TCIE` reader - Transmission complete interrupt enable"] pub struct TCIE_R(crate::FieldReader); impl TCIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TCIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TCIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TCIE` writer - Transmission complete interrupt enable"] pub struct TCIE_W<'a> { w: &'a mut W, } impl<'a> TCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `RBNEIE` reader - RXNE interrupt enable"] pub struct RBNEIE_R(crate::FieldReader); impl RBNEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RBNEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RBNEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RBNEIE` writer - RXNE interrupt enable"] pub struct RBNEIE_W<'a> { w: &'a mut W, } impl<'a> RBNEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `IDLEIE` reader - IDLE interrupt enable"] pub struct IDLEIE_R(crate::FieldReader); impl IDLEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IDLEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IDLEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IDLEIE` writer - IDLE interrupt enable"] pub struct IDLEIE_W<'a> { w: &'a mut W, } impl<'a> IDLEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TEN` reader - Transmitter enable"] pub struct TEN_R(crate::FieldReader); impl TEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TEN` writer - Transmitter enable"] pub struct TEN_W<'a> { w: &'a mut W, } impl<'a> TEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `REN` reader - Receiver enable"] pub struct REN_R(crate::FieldReader); impl REN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REN` writer - Receiver enable"] pub struct REN_W<'a> { w: &'a mut W, } impl<'a> REN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `UESM` reader - USART enable in Stop mode"] pub struct UESM_R(crate::FieldReader); impl UESM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UESM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UESM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UESM` writer - USART enable in Stop mode"] pub struct UESM_W<'a> { w: &'a mut W, } impl<'a> UESM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `UEN` reader - USART enable"] pub struct UEN_R(crate::FieldReader); impl UEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { UEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UEN` writer - USART enable"] pub struct UEN_W<'a> { w: &'a mut W, } impl<'a> UEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 27 - End of Block interrupt enable"] #[inline(always)] pub fn ebie(&self) -> EBIE_R { EBIE_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bit 26 - Receiver timeout interrupt enable"] #[inline(always)] pub fn rtie(&self) -> RTIE_R { RTIE_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bits 21:25 - Driver Enable assertion time"] #[inline(always)] pub fn dea(&self) -> DEA_R { DEA_R::new(((self.bits >> 21) & 0x1f) as u8) } #[doc = "Bits 16:20 - Driver Enable deassertion time"] #[inline(always)] pub fn ded(&self) -> DED_R { DED_R::new(((self.bits >> 16) & 0x1f) as u8) } #[doc = "Bit 15 - Oversampling mode"] #[inline(always)] pub fn ovsmod(&self) -> OVSMOD_R { OVSMOD_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Character match interrupt enable"] #[inline(always)] pub fn amie(&self) -> AMIE_R { AMIE_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - Mute mode enable"] #[inline(always)] pub fn men(&self) -> MEN_R { MEN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Word length"] #[inline(always)] pub fn wl(&self) -> WL_R { WL_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Receiver wakeup method"] #[inline(always)] pub fn wm(&self) -> WM_R { WM_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Parity control enable"] #[inline(always)] pub fn pcen(&self) -> PCEN_R { PCEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Parity selection"] #[inline(always)] pub fn pm(&self) -> PM_R { PM_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - PE interrupt enable"] #[inline(always)] pub fn perrie(&self) -> PERRIE_R { PERRIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - interrupt enable"] #[inline(always)] pub fn tbeie(&self) -> TBEIE_R { TBEIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Transmission complete interrupt enable"] #[inline(always)] pub fn tcie(&self) -> TCIE_R { TCIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - RXNE interrupt enable"] #[inline(always)] pub fn rbneie(&self) -> RBNEIE_R { RBNEIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - IDLE interrupt enable"] #[inline(always)] pub fn idleie(&self) -> IDLEIE_R { IDLEIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Transmitter enable"] #[inline(always)] pub fn ten(&self) -> TEN_R { TEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Receiver enable"] #[inline(always)] pub fn ren(&self) -> REN_R { REN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - USART enable in Stop mode"] #[inline(always)] pub fn uesm(&self) -> UESM_R { UESM_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - USART enable"] #[inline(always)] pub fn uen(&self) -> UEN_R { UEN_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 27 - End of Block interrupt enable"] #[inline(always)] pub fn ebie(&mut self) -> EBIE_W { EBIE_W { w: self } } #[doc = "Bit 26 - Receiver timeout interrupt enable"] #[inline(always)] pub fn rtie(&mut self) -> RTIE_W { RTIE_W { w: self } } #[doc = "Bits 21:25 - Driver Enable assertion time"] #[inline(always)] pub fn dea(&mut self) -> DEA_W { DEA_W { w: self } } #[doc = "Bits 16:20 - Driver Enable deassertion time"] #[inline(always)] pub fn ded(&mut self) -> DED_W { DED_W { w: self } } #[doc = "Bit 15 - Oversampling mode"] #[inline(always)] pub fn ovsmod(&mut self) -> OVSMOD_W { OVSMOD_W { w: self } } #[doc = "Bit 14 - Character match interrupt enable"] #[inline(always)] pub fn amie(&mut self) -> AMIE_W { AMIE_W { w: self } } #[doc = "Bit 13 - Mute mode enable"] #[inline(always)] pub fn men(&mut self) -> MEN_W { MEN_W { w: self } } #[doc = "Bit 12 - Word length"] #[inline(always)] pub fn wl(&mut self) -> WL_W { WL_W { w: self } } #[doc = "Bit 11 - Receiver wakeup method"] #[inline(always)] pub fn wm(&mut self) -> WM_W { WM_W { w: self } } #[doc = "Bit 10 - Parity control enable"] #[inline(always)] pub fn pcen(&mut self) -> PCEN_W { PCEN_W { w: self } } #[doc = "Bit 9 - Parity selection"] #[inline(always)] pub fn pm(&mut self) -> PM_W { PM_W { w: self } } #[doc = "Bit 8 - PE interrupt enable"] #[inline(always)] pub fn perrie(&mut self) -> PERRIE_W { PERRIE_W { w: self } } #[doc = "Bit 7 - interrupt enable"] #[inline(always)] pub fn tbeie(&mut self) -> TBEIE_W { TBEIE_W { w: self } } #[doc = "Bit 6 - Transmission complete interrupt enable"] #[inline(always)] pub fn tcie(&mut self) -> TCIE_W { TCIE_W { w: self } } #[doc = "Bit 5 - RXNE interrupt enable"] #[inline(always)] pub fn rbneie(&mut self) -> RBNEIE_W { RBNEIE_W { w: self } } #[doc = "Bit 4 - IDLE interrupt enable"] #[inline(always)] pub fn idleie(&mut self) -> IDLEIE_W { IDLEIE_W { w: self } } #[doc = "Bit 3 - Transmitter enable"] #[inline(always)] pub fn ten(&mut self) -> TEN_W { TEN_W { w: self } } #[doc = "Bit 2 - Receiver enable"] #[inline(always)] pub fn ren(&mut self) -> REN_W { REN_W { w: self } } #[doc = "Bit 1 - USART enable in Stop mode"] #[inline(always)] pub fn uesm(&mut self) -> UESM_W { UESM_W { w: self } } #[doc = "Bit 0 - USART enable"] #[inline(always)] pub fn uen(&mut self) -> UEN_W { UEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl0](index.html) module"] pub struct CTL0_SPEC; impl crate::RegisterSpec for CTL0_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl0::R](R) reader structure"] impl crate::Readable for CTL0_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl0::W](W) writer structure"] impl crate::Writable for CTL0_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL0 to value 0"] impl crate::Resettable for CTL0_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL1 register accessor: an alias for `Reg`"] pub type CTL1 = crate::Reg; #[doc = "Control register 1"] pub mod ctl1 { #[doc = "Register `CTL1` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL1` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ADDR` reader - Address of the USART node"] pub struct ADDR_R(crate::FieldReader); impl ADDR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ADDR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADDR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADDR` writer - Address of the USART node"] pub struct ADDR_W<'a> { w: &'a mut W, } impl<'a> ADDR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0xff << 24)) | ((value as u32 & 0xff) << 24); self.w } } #[doc = "Field `RTEN` reader - Receiver timeout enable"] pub struct RTEN_R(crate::FieldReader); impl RTEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTEN` writer - Receiver timeout enable"] pub struct RTEN_W<'a> { w: &'a mut W, } impl<'a> RTEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 23)) | ((value as u32 & 0x01) << 23); self.w } } #[doc = "Field `ABDM` reader - Auto baud rate mode"] pub struct ABDM_R(crate::FieldReader); impl ABDM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ABDM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ABDM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ABDM` writer - Auto baud rate mode"] pub struct ABDM_W<'a> { w: &'a mut W, } impl<'a> ABDM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 21)) | ((value as u32 & 0x03) << 21); self.w } } #[doc = "Field `ABDEN` reader - Auto baud rate enable"] pub struct ABDEN_R(crate::FieldReader); impl ABDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ABDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ABDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ABDEN` writer - Auto baud rate enable"] pub struct ABDEN_W<'a> { w: &'a mut W, } impl<'a> ABDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `MSBF` reader - Most significant bit first"] pub struct MSBF_R(crate::FieldReader); impl MSBF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MSBF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MSBF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MSBF` writer - Most significant bit first"] pub struct MSBF_W<'a> { w: &'a mut W, } impl<'a> MSBF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `DINV` reader - Binary data inversion"] pub struct DINV_R(crate::FieldReader); impl DINV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DINV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DINV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DINV` writer - Binary data inversion"] pub struct DINV_W<'a> { w: &'a mut W, } impl<'a> DINV_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `TINV` reader - TX pin active level inversion"] pub struct TINV_R(crate::FieldReader); impl TINV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TINV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TINV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TINV` writer - TX pin active level inversion"] pub struct TINV_W<'a> { w: &'a mut W, } impl<'a> TINV_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `RINV` reader - RX pin active level inversion"] pub struct RINV_R(crate::FieldReader); impl RINV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RINV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RINV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RINV` writer - RX pin active level inversion"] pub struct RINV_W<'a> { w: &'a mut W, } impl<'a> RINV_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `STRP` reader - Swap TX/RX pins"] pub struct STRP_R(crate::FieldReader); impl STRP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STRP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STRP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STRP` writer - Swap TX/RX pins"] pub struct STRP_W<'a> { w: &'a mut W, } impl<'a> STRP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LMEN` reader - LIN mode enable"] pub struct LMEN_R(crate::FieldReader); impl LMEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LMEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LMEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LMEN` writer - LIN mode enable"] pub struct LMEN_W<'a> { w: &'a mut W, } impl<'a> LMEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `STB` reader - STOP bits"] pub struct STB_R(crate::FieldReader); impl STB_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { STB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STB` writer - STOP bits"] pub struct STB_W<'a> { w: &'a mut W, } impl<'a> STB_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 12)) | ((value as u32 & 0x03) << 12); self.w } } #[doc = "Field `CKEN` reader - Clock enable"] pub struct CKEN_R(crate::FieldReader); impl CKEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CKEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CKEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CKEN` writer - Clock enable"] pub struct CKEN_W<'a> { w: &'a mut W, } impl<'a> CKEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CPL` reader - Clock polarity"] pub struct CPL_R(crate::FieldReader); impl CPL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CPL` writer - Clock polarity"] pub struct CPL_W<'a> { w: &'a mut W, } impl<'a> CPL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CPH` reader - Clock phase"] pub struct CPH_R(crate::FieldReader); impl CPH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CPH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CPH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CPH` writer - Clock phase"] pub struct CPH_W<'a> { w: &'a mut W, } impl<'a> CPH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CLEN` reader - Last bit clock pulse"] pub struct CLEN_R(crate::FieldReader); impl CLEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CLEN` writer - Last bit clock pulse"] pub struct CLEN_W<'a> { w: &'a mut W, } impl<'a> CLEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `LBDIE` reader - LIN break detection interrupt enable"] pub struct LBDIE_R(crate::FieldReader); impl LBDIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LBDIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LBDIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LBDIE` writer - LIN break detection interrupt enable"] pub struct LBDIE_W<'a> { w: &'a mut W, } impl<'a> LBDIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `LBLEN` reader - LIN break detection length"] pub struct LBLEN_R(crate::FieldReader); impl LBLEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LBLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LBLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LBLEN` writer - LIN break detection length"] pub struct LBLEN_W<'a> { w: &'a mut W, } impl<'a> LBLEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `ADDM` reader - 7-bit Address Detection/4-bit Address Detection"] pub struct ADDM_R(crate::FieldReader); impl ADDM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADDM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADDM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADDM` writer - 7-bit Address Detection/4-bit Address Detection"] pub struct ADDM_W<'a> { w: &'a mut W, } impl<'a> ADDM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } impl R { #[doc = "Bits 24:31 - Address of the USART node"] #[inline(always)] pub fn addr(&self) -> ADDR_R { ADDR_R::new(((self.bits >> 24) & 0xff) as u8) } #[doc = "Bit 23 - Receiver timeout enable"] #[inline(always)] pub fn rten(&self) -> RTEN_R { RTEN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bits 21:22 - Auto baud rate mode"] #[inline(always)] pub fn abdm(&self) -> ABDM_R { ABDM_R::new(((self.bits >> 21) & 0x03) as u8) } #[doc = "Bit 20 - Auto baud rate enable"] #[inline(always)] pub fn abden(&self) -> ABDEN_R { ABDEN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - Most significant bit first"] #[inline(always)] pub fn msbf(&self) -> MSBF_R { MSBF_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - Binary data inversion"] #[inline(always)] pub fn dinv(&self) -> DINV_R { DINV_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - TX pin active level inversion"] #[inline(always)] pub fn tinv(&self) -> TINV_R { TINV_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - RX pin active level inversion"] #[inline(always)] pub fn rinv(&self) -> RINV_R { RINV_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Swap TX/RX pins"] #[inline(always)] pub fn strp(&self) -> STRP_R { STRP_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - LIN mode enable"] #[inline(always)] pub fn lmen(&self) -> LMEN_R { LMEN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bits 12:13 - STOP bits"] #[inline(always)] pub fn stb(&self) -> STB_R { STB_R::new(((self.bits >> 12) & 0x03) as u8) } #[doc = "Bit 11 - Clock enable"] #[inline(always)] pub fn cken(&self) -> CKEN_R { CKEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Clock polarity"] #[inline(always)] pub fn cpl(&self) -> CPL_R { CPL_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Clock phase"] #[inline(always)] pub fn cph(&self) -> CPH_R { CPH_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Last bit clock pulse"] #[inline(always)] pub fn clen(&self) -> CLEN_R { CLEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 6 - LIN break detection interrupt enable"] #[inline(always)] pub fn lbdie(&self) -> LBDIE_R { LBDIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - LIN break detection length"] #[inline(always)] pub fn lblen(&self) -> LBLEN_R { LBLEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - 7-bit Address Detection/4-bit Address Detection"] #[inline(always)] pub fn addm(&self) -> ADDM_R { ADDM_R::new(((self.bits >> 4) & 0x01) != 0) } } impl W { #[doc = "Bits 24:31 - Address of the USART node"] #[inline(always)] pub fn addr(&mut self) -> ADDR_W { ADDR_W { w: self } } #[doc = "Bit 23 - Receiver timeout enable"] #[inline(always)] pub fn rten(&mut self) -> RTEN_W { RTEN_W { w: self } } #[doc = "Bits 21:22 - Auto baud rate mode"] #[inline(always)] pub fn abdm(&mut self) -> ABDM_W { ABDM_W { w: self } } #[doc = "Bit 20 - Auto baud rate enable"] #[inline(always)] pub fn abden(&mut self) -> ABDEN_W { ABDEN_W { w: self } } #[doc = "Bit 19 - Most significant bit first"] #[inline(always)] pub fn msbf(&mut self) -> MSBF_W { MSBF_W { w: self } } #[doc = "Bit 18 - Binary data inversion"] #[inline(always)] pub fn dinv(&mut self) -> DINV_W { DINV_W { w: self } } #[doc = "Bit 17 - TX pin active level inversion"] #[inline(always)] pub fn tinv(&mut self) -> TINV_W { TINV_W { w: self } } #[doc = "Bit 16 - RX pin active level inversion"] #[inline(always)] pub fn rinv(&mut self) -> RINV_W { RINV_W { w: self } } #[doc = "Bit 15 - Swap TX/RX pins"] #[inline(always)] pub fn strp(&mut self) -> STRP_W { STRP_W { w: self } } #[doc = "Bit 14 - LIN mode enable"] #[inline(always)] pub fn lmen(&mut self) -> LMEN_W { LMEN_W { w: self } } #[doc = "Bits 12:13 - STOP bits"] #[inline(always)] pub fn stb(&mut self) -> STB_W { STB_W { w: self } } #[doc = "Bit 11 - Clock enable"] #[inline(always)] pub fn cken(&mut self) -> CKEN_W { CKEN_W { w: self } } #[doc = "Bit 10 - Clock polarity"] #[inline(always)] pub fn cpl(&mut self) -> CPL_W { CPL_W { w: self } } #[doc = "Bit 9 - Clock phase"] #[inline(always)] pub fn cph(&mut self) -> CPH_W { CPH_W { w: self } } #[doc = "Bit 8 - Last bit clock pulse"] #[inline(always)] pub fn clen(&mut self) -> CLEN_W { CLEN_W { w: self } } #[doc = "Bit 6 - LIN break detection interrupt enable"] #[inline(always)] pub fn lbdie(&mut self) -> LBDIE_W { LBDIE_W { w: self } } #[doc = "Bit 5 - LIN break detection length"] #[inline(always)] pub fn lblen(&mut self) -> LBLEN_W { LBLEN_W { w: self } } #[doc = "Bit 4 - 7-bit Address Detection/4-bit Address Detection"] #[inline(always)] pub fn addm(&mut self) -> ADDM_W { ADDM_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl1](index.html) module"] pub struct CTL1_SPEC; impl crate::RegisterSpec for CTL1_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl1::R](R) reader structure"] impl crate::Readable for CTL1_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl1::W](W) writer structure"] impl crate::Writable for CTL1_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL1 to value 0"] impl crate::Resettable for CTL1_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CTL2 register accessor: an alias for `Reg`"] pub type CTL2 = crate::Reg; #[doc = "Control register 2"] pub mod ctl2 { #[doc = "Register `CTL2` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL2` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `WUIE` reader - Wakeup from Stop mode interrupt enable"] pub struct WUIE_R(crate::FieldReader); impl WUIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WUIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WUIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WUIE` writer - Wakeup from Stop mode interrupt enable"] pub struct WUIE_W<'a> { w: &'a mut W, } impl<'a> WUIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 22)) | ((value as u32 & 0x01) << 22); self.w } } #[doc = "Field `WUM` reader - Wakeup from Stop mode interrupt flag selection"] pub struct WUM_R(crate::FieldReader); impl WUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { WUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WUM` writer - Wakeup from Stop mode interrupt flag selection"] pub struct WUM_W<'a> { w: &'a mut W, } impl<'a> WUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 20)) | ((value as u32 & 0x03) << 20); self.w } } #[doc = "Field `SCRTNUM` reader - Smartcard auto-retry count"] pub struct SCRTNUM_R(crate::FieldReader); impl SCRTNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { SCRTNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCRTNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCRTNUM` writer - Smartcard auto-retry count"] pub struct SCRTNUM_W<'a> { w: &'a mut W, } impl<'a> SCRTNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 17)) | ((value as u32 & 0x07) << 17); self.w } } #[doc = "Field `DEP` reader - Driver enable polarity selection"] pub struct DEP_R(crate::FieldReader); impl DEP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DEP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DEP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DEP` writer - Driver enable polarity selection"] pub struct DEP_W<'a> { w: &'a mut W, } impl<'a> DEP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `DEM` reader - Driver enable mode"] pub struct DEM_R(crate::FieldReader); impl DEM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DEM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DEM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DEM` writer - Driver enable mode"] pub struct DEM_W<'a> { w: &'a mut W, } impl<'a> DEM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `DDRE` reader - DMA Disable on Reception Error"] pub struct DDRE_R(crate::FieldReader); impl DDRE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DDRE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DDRE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DDRE` writer - DMA Disable on Reception Error"] pub struct DDRE_W<'a> { w: &'a mut W, } impl<'a> DDRE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `OVRD` reader - Overrun Disable"] pub struct OVRD_R(crate::FieldReader); impl OVRD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OVRD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OVRD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OVRD` writer - Overrun Disable"] pub struct OVRD_W<'a> { w: &'a mut W, } impl<'a> OVRD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `OSB` reader - One sample bit method enable"] pub struct OSB_R(crate::FieldReader); impl OSB_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OSB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OSB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OSB` writer - One sample bit method enable"] pub struct OSB_W<'a> { w: &'a mut W, } impl<'a> OSB_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CTSIE` reader - CTS interrupt enable"] pub struct CTSIE_R(crate::FieldReader); impl CTSIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CTSIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTSIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTSIE` writer - CTS interrupt enable"] pub struct CTSIE_W<'a> { w: &'a mut W, } impl<'a> CTSIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `CTSEN` reader - CTS enable"] pub struct CTSEN_R(crate::FieldReader); impl CTSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CTSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTSEN` writer - CTS enable"] pub struct CTSEN_W<'a> { w: &'a mut W, } impl<'a> CTSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `RTSEN` reader - RTS enable"] pub struct RTSEN_R(crate::FieldReader); impl RTSEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTSEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTSEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTSEN` writer - RTS enable"] pub struct RTSEN_W<'a> { w: &'a mut W, } impl<'a> RTSEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `DENT` reader - DMA enable transmitter"] pub struct DENT_R(crate::FieldReader); impl DENT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DENT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DENT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DENT` writer - DMA enable transmitter"] pub struct DENT_W<'a> { w: &'a mut W, } impl<'a> DENT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `DENR` reader - DMA enable receiver"] pub struct DENR_R(crate::FieldReader); impl DENR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DENR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DENR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DENR` writer - DMA enable receiver"] pub struct DENR_W<'a> { w: &'a mut W, } impl<'a> DENR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `SCEN` reader - Smartcard mode enable"] pub struct SCEN_R(crate::FieldReader); impl SCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SCEN` writer - Smartcard mode enable"] pub struct SCEN_W<'a> { w: &'a mut W, } impl<'a> SCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `NKEN` reader - Smartcard NACK enable"] pub struct NKEN_R(crate::FieldReader); impl NKEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NKEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NKEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NKEN` writer - Smartcard NACK enable"] pub struct NKEN_W<'a> { w: &'a mut W, } impl<'a> NKEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `HDEN` reader - Half-duplex selection"] pub struct HDEN_R(crate::FieldReader); impl HDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HDEN` writer - Half-duplex selection"] pub struct HDEN_W<'a> { w: &'a mut W, } impl<'a> HDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `IRLP` reader - IrDA low-power"] pub struct IRLP_R(crate::FieldReader); impl IRLP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IRLP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IRLP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IRLP` writer - IrDA low-power"] pub struct IRLP_W<'a> { w: &'a mut W, } impl<'a> IRLP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `IREN` reader - IrDA mode enable"] pub struct IREN_R(crate::FieldReader); impl IREN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IREN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IREN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IREN` writer - IrDA mode enable"] pub struct IREN_W<'a> { w: &'a mut W, } impl<'a> IREN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `ERRIE` reader - Error interrupt enable"] pub struct ERRIE_R(crate::FieldReader); impl ERRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ERRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ERRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ERRIE` writer - Error interrupt enable"] pub struct ERRIE_W<'a> { w: &'a mut W, } impl<'a> ERRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 22 - Wakeup from Stop mode interrupt enable"] #[inline(always)] pub fn wuie(&self) -> WUIE_R { WUIE_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bits 20:21 - Wakeup from Stop mode interrupt flag selection"] #[inline(always)] pub fn wum(&self) -> WUM_R { WUM_R::new(((self.bits >> 20) & 0x03) as u8) } #[doc = "Bits 17:19 - Smartcard auto-retry count"] #[inline(always)] pub fn scrtnum(&self) -> SCRTNUM_R { SCRTNUM_R::new(((self.bits >> 17) & 0x07) as u8) } #[doc = "Bit 15 - Driver enable polarity selection"] #[inline(always)] pub fn dep(&self) -> DEP_R { DEP_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Driver enable mode"] #[inline(always)] pub fn dem(&self) -> DEM_R { DEM_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 13 - DMA Disable on Reception Error"] #[inline(always)] pub fn ddre(&self) -> DDRE_R { DDRE_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 12 - Overrun Disable"] #[inline(always)] pub fn ovrd(&self) -> OVRD_R { OVRD_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - One sample bit method enable"] #[inline(always)] pub fn osb(&self) -> OSB_R { OSB_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - CTS interrupt enable"] #[inline(always)] pub fn ctsie(&self) -> CTSIE_R { CTSIE_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - CTS enable"] #[inline(always)] pub fn ctsen(&self) -> CTSEN_R { CTSEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - RTS enable"] #[inline(always)] pub fn rtsen(&self) -> RTSEN_R { RTSEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - DMA enable transmitter"] #[inline(always)] pub fn dent(&self) -> DENT_R { DENT_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - DMA enable receiver"] #[inline(always)] pub fn denr(&self) -> DENR_R { DENR_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Smartcard mode enable"] #[inline(always)] pub fn scen(&self) -> SCEN_R { SCEN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Smartcard NACK enable"] #[inline(always)] pub fn nken(&self) -> NKEN_R { NKEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Half-duplex selection"] #[inline(always)] pub fn hden(&self) -> HDEN_R { HDEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - IrDA low-power"] #[inline(always)] pub fn irlp(&self) -> IRLP_R { IRLP_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - IrDA mode enable"] #[inline(always)] pub fn iren(&self) -> IREN_R { IREN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Error interrupt enable"] #[inline(always)] pub fn errie(&self) -> ERRIE_R { ERRIE_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 22 - Wakeup from Stop mode interrupt enable"] #[inline(always)] pub fn wuie(&mut self) -> WUIE_W { WUIE_W { w: self } } #[doc = "Bits 20:21 - Wakeup from Stop mode interrupt flag selection"] #[inline(always)] pub fn wum(&mut self) -> WUM_W { WUM_W { w: self } } #[doc = "Bits 17:19 - Smartcard auto-retry count"] #[inline(always)] pub fn scrtnum(&mut self) -> SCRTNUM_W { SCRTNUM_W { w: self } } #[doc = "Bit 15 - Driver enable polarity selection"] #[inline(always)] pub fn dep(&mut self) -> DEP_W { DEP_W { w: self } } #[doc = "Bit 14 - Driver enable mode"] #[inline(always)] pub fn dem(&mut self) -> DEM_W { DEM_W { w: self } } #[doc = "Bit 13 - DMA Disable on Reception Error"] #[inline(always)] pub fn ddre(&mut self) -> DDRE_W { DDRE_W { w: self } } #[doc = "Bit 12 - Overrun Disable"] #[inline(always)] pub fn ovrd(&mut self) -> OVRD_W { OVRD_W { w: self } } #[doc = "Bit 11 - One sample bit method enable"] #[inline(always)] pub fn osb(&mut self) -> OSB_W { OSB_W { w: self } } #[doc = "Bit 10 - CTS interrupt enable"] #[inline(always)] pub fn ctsie(&mut self) -> CTSIE_W { CTSIE_W { w: self } } #[doc = "Bit 9 - CTS enable"] #[inline(always)] pub fn ctsen(&mut self) -> CTSEN_W { CTSEN_W { w: self } } #[doc = "Bit 8 - RTS enable"] #[inline(always)] pub fn rtsen(&mut self) -> RTSEN_W { RTSEN_W { w: self } } #[doc = "Bit 7 - DMA enable transmitter"] #[inline(always)] pub fn dent(&mut self) -> DENT_W { DENT_W { w: self } } #[doc = "Bit 6 - DMA enable receiver"] #[inline(always)] pub fn denr(&mut self) -> DENR_W { DENR_W { w: self } } #[doc = "Bit 5 - Smartcard mode enable"] #[inline(always)] pub fn scen(&mut self) -> SCEN_W { SCEN_W { w: self } } #[doc = "Bit 4 - Smartcard NACK enable"] #[inline(always)] pub fn nken(&mut self) -> NKEN_W { NKEN_W { w: self } } #[doc = "Bit 3 - Half-duplex selection"] #[inline(always)] pub fn hden(&mut self) -> HDEN_W { HDEN_W { w: self } } #[doc = "Bit 2 - IrDA low-power"] #[inline(always)] pub fn irlp(&mut self) -> IRLP_W { IRLP_W { w: self } } #[doc = "Bit 1 - IrDA mode enable"] #[inline(always)] pub fn iren(&mut self) -> IREN_W { IREN_W { w: self } } #[doc = "Bit 0 - Error interrupt enable"] #[inline(always)] pub fn errie(&mut self) -> ERRIE_W { ERRIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl2](index.html) module"] pub struct CTL2_SPEC; impl crate::RegisterSpec for CTL2_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl2::R](R) reader structure"] impl crate::Readable for CTL2_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl2::W](W) writer structure"] impl crate::Writable for CTL2_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL2 to value 0"] impl crate::Resettable for CTL2_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "BAUD register accessor: an alias for `Reg`"] pub type BAUD = crate::Reg; #[doc = "Baud rate register"] pub mod baud { #[doc = "Register `BAUD` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `BAUD` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BRR_INT` reader - integer of baud-rate divider"] pub struct BRR_INT_R(crate::FieldReader); impl BRR_INT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { BRR_INT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRR_INT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRR_INT` writer - integer of baud-rate divider"] pub struct BRR_INT_W<'a> { w: &'a mut W, } impl<'a> BRR_INT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0fff << 4)) | ((value as u32 & 0x0fff) << 4); self.w } } #[doc = "Field `BRR_FRA` reader - integer of baud-rate divider"] pub struct BRR_FRA_R(crate::FieldReader); impl BRR_FRA_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { BRR_FRA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BRR_FRA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BRR_FRA` writer - integer of baud-rate divider"] pub struct BRR_FRA_W<'a> { w: &'a mut W, } impl<'a> BRR_FRA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 4:15 - integer of baud-rate divider"] #[inline(always)] pub fn brr_int(&self) -> BRR_INT_R { BRR_INT_R::new(((self.bits >> 4) & 0x0fff) as u16) } #[doc = "Bits 0:3 - integer of baud-rate divider"] #[inline(always)] pub fn brr_fra(&self) -> BRR_FRA_R { BRR_FRA_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 4:15 - integer of baud-rate divider"] #[inline(always)] pub fn brr_int(&mut self) -> BRR_INT_W { BRR_INT_W { w: self } } #[doc = "Bits 0:3 - integer of baud-rate divider"] #[inline(always)] pub fn brr_fra(&mut self) -> BRR_FRA_W { BRR_FRA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Baud rate register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baud](index.html) module"] pub struct BAUD_SPEC; impl crate::RegisterSpec for BAUD_SPEC { type Ux = u32; } #[doc = "`read()` method returns [baud::R](R) reader structure"] impl crate::Readable for BAUD_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [baud::W](W) writer structure"] impl crate::Writable for BAUD_SPEC { type Writer = W; } #[doc = "`reset()` method sets BAUD to value 0"] impl crate::Resettable for BAUD_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "GP register accessor: an alias for `Reg`"] pub type GP = crate::Reg; #[doc = "Guard time and prescaler register"] pub mod gp { #[doc = "Register `GP` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GP` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `GUAT` reader - Guard time value"] pub struct GUAT_R(crate::FieldReader); impl GUAT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { GUAT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GUAT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GUAT` writer - Guard time value"] pub struct GUAT_W<'a> { w: &'a mut W, } impl<'a> GUAT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); self.w } } #[doc = "Field `PSC` reader - Prescaler value"] pub struct PSC_R(crate::FieldReader); impl PSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSC` writer - Prescaler value"] pub struct PSC_W<'a> { w: &'a mut W, } impl<'a> PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bits 8:15 - Guard time value"] #[inline(always)] pub fn guat(&self) -> GUAT_R { GUAT_R::new(((self.bits >> 8) & 0xff) as u8) } #[doc = "Bits 0:7 - Prescaler value"] #[inline(always)] pub fn psc(&self) -> PSC_R { PSC_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 8:15 - Guard time value"] #[inline(always)] pub fn guat(&mut self) -> GUAT_W { GUAT_W { w: self } } #[doc = "Bits 0:7 - Prescaler value"] #[inline(always)] pub fn psc(&mut self) -> PSC_W { PSC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Guard time and prescaler register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gp](index.html) module"] pub struct GP_SPEC; impl crate::RegisterSpec for GP_SPEC { type Ux = u32; } #[doc = "`read()` method returns [gp::R](R) reader structure"] impl crate::Readable for GP_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [gp::W](W) writer structure"] impl crate::Writable for GP_SPEC { type Writer = W; } #[doc = "`reset()` method sets GP to value 0"] impl crate::Resettable for GP_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RT register accessor: an alias for `Reg`"] pub type RT = crate::Reg; #[doc = "Receiver timeout register"] pub mod rt { #[doc = "Register `RT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `RT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BL` reader - Block Length"] pub struct BL_R(crate::FieldReader); impl BL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { BL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BL` writer - Block Length"] pub struct BL_W<'a> { w: &'a mut W, } impl<'a> BL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0xff << 24)) | ((value as u32 & 0xff) << 24); self.w } } #[doc = "Field `RT` reader - Receiver timeout value"] pub struct RT_R(crate::FieldReader); impl RT_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { RT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RT` writer - Receiver timeout value"] pub struct RT_W<'a> { w: &'a mut W, } impl<'a> RT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x00ff_ffff) | (value as u32 & 0x00ff_ffff); self.w } } impl R { #[doc = "Bits 24:31 - Block Length"] #[inline(always)] pub fn bl(&self) -> BL_R { BL_R::new(((self.bits >> 24) & 0xff) as u8) } #[doc = "Bits 0:23 - Receiver timeout value"] #[inline(always)] pub fn rt(&self) -> RT_R { RT_R::new((self.bits & 0x00ff_ffff) as u32) } } impl W { #[doc = "Bits 24:31 - Block Length"] #[inline(always)] pub fn bl(&mut self) -> BL_W { BL_W { w: self } } #[doc = "Bits 0:23 - Receiver timeout value"] #[inline(always)] pub fn rt(&mut self) -> RT_W { RT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Receiver timeout register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rt](index.html) module"] pub struct RT_SPEC; impl crate::RegisterSpec for RT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rt::R](R) reader structure"] impl crate::Readable for RT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [rt::W](W) writer structure"] impl crate::Writable for RT_SPEC { type Writer = W; } #[doc = "`reset()` method sets RT to value 0"] impl crate::Resettable for RT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CMD register accessor: an alias for `Reg`"] pub type CMD = crate::Reg; #[doc = "Request register"] pub mod cmd { #[doc = "Register `CMD` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TXFCMD` writer - Transmit data flush request"] pub struct TXFCMD_W<'a> { w: &'a mut W, } impl<'a> TXFCMD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `RXFCMD` writer - Receive data flush request"] pub struct RXFCMD_W<'a> { w: &'a mut W, } impl<'a> RXFCMD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `MMCMD` writer - Mute mode request"] pub struct MMCMD_W<'a> { w: &'a mut W, } impl<'a> MMCMD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `SBKCMD` writer - Send break request"] pub struct SBKCMD_W<'a> { w: &'a mut W, } impl<'a> SBKCMD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `ABDCMD` writer - Auto baud rate request"] pub struct ABDCMD_W<'a> { w: &'a mut W, } impl<'a> ABDCMD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 4 - Transmit data flush request"] #[inline(always)] pub fn txfcmd(&mut self) -> TXFCMD_W { TXFCMD_W { w: self } } #[doc = "Bit 3 - Receive data flush request"] #[inline(always)] pub fn rxfcmd(&mut self) -> RXFCMD_W { RXFCMD_W { w: self } } #[doc = "Bit 2 - Mute mode request"] #[inline(always)] pub fn mmcmd(&mut self) -> MMCMD_W { MMCMD_W { w: self } } #[doc = "Bit 1 - Send break request"] #[inline(always)] pub fn sbkcmd(&mut self) -> SBKCMD_W { SBKCMD_W { w: self } } #[doc = "Bit 0 - Auto baud rate request"] #[inline(always)] pub fn abdcmd(&mut self) -> ABDCMD_W { ABDCMD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Request register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"] pub struct CMD_SPEC; impl crate::RegisterSpec for CMD_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"] impl crate::Writable for CMD_SPEC { type Writer = W; } #[doc = "`reset()` method sets CMD to value 0"] impl crate::Resettable for CMD_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "STAT register accessor: an alias for `Reg`"] pub type STAT = crate::Reg; #[doc = "Interrupt & status register"] pub mod stat { #[doc = "Register `STAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `REA` reader - Receive enable acknowledge flag"] pub struct REA_R(crate::FieldReader); impl REA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TEA` reader - Transmit enable acknowledge flag"] pub struct TEA_R(crate::FieldReader); impl TEA_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TEA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TEA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WUF` reader - Wakeup from Stop mode flag"] pub struct WUF_R(crate::FieldReader); impl WUF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WUF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WUF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RWU` reader - Receiver wakeup from Mute mode"] pub struct RWU_R(crate::FieldReader); impl RWU_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RWU_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RWU_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SBF` reader - Send break flag"] pub struct SBF_R(crate::FieldReader); impl SBF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SBF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SBF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `AMF` reader - character match flag"] pub struct AMF_R(crate::FieldReader); impl AMF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { AMF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for AMF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BSY` reader - Busy flag"] pub struct BSY_R(crate::FieldReader); impl BSY_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BSY_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BSY_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ABDF` reader - Auto baud rate flag"] pub struct ABDF_R(crate::FieldReader); impl ABDF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ABDF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ABDF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ABDE` reader - Auto baud rate error"] pub struct ABDE_R(crate::FieldReader); impl ABDE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ABDE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ABDE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EBF` reader - End of block flag"] pub struct EBF_R(crate::FieldReader); impl EBF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EBF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EBF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RTF` reader - Receiver timeout"] pub struct RTF_R(crate::FieldReader); impl RTF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RTF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RTF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTS` reader - CTS flag"] pub struct CTS_R(crate::FieldReader); impl CTS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CTS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CTSF` reader - CTS interrupt flag"] pub struct CTSF_R(crate::FieldReader); impl CTSF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CTSF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CTSF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LBDF` reader - LIN break detection flag"] pub struct LBDF_R(crate::FieldReader); impl LBDF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LBDF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LBDF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TBE` reader - Transmit data register empty"] pub struct TBE_R(crate::FieldReader); impl TBE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TBE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TBE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TC` reader - Transmission complete"] pub struct TC_R(crate::FieldReader); impl TC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RBNE` reader - Read data register not empty"] pub struct RBNE_R(crate::FieldReader); impl RBNE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RBNE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RBNE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IDLEF` reader - Idle line detected"] pub struct IDLEF_R(crate::FieldReader); impl IDLEF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IDLEF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IDLEF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ORERR` reader - Overrun error"] pub struct ORERR_R(crate::FieldReader); impl ORERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ORERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ORERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NERR` reader - Noise detected flag"] pub struct NERR_R(crate::FieldReader); impl NERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FERR` reader - Framing error"] pub struct FERR_R(crate::FieldReader); impl FERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PERR` reader - Parity error"] pub struct PERR_R(crate::FieldReader); impl PERR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PERR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PERR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 22 - Receive enable acknowledge flag"] #[inline(always)] pub fn rea(&self) -> REA_R { REA_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 21 - Transmit enable acknowledge flag"] #[inline(always)] pub fn tea(&self) -> TEA_R { TEA_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - Wakeup from Stop mode flag"] #[inline(always)] pub fn wuf(&self) -> WUF_R { WUF_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 19 - Receiver wakeup from Mute mode"] #[inline(always)] pub fn rwu(&self) -> RWU_R { RWU_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 18 - Send break flag"] #[inline(always)] pub fn sbf(&self) -> SBF_R { SBF_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 17 - character match flag"] #[inline(always)] pub fn amf(&self) -> AMF_R { AMF_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - Busy flag"] #[inline(always)] pub fn bsy(&self) -> BSY_R { BSY_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Auto baud rate flag"] #[inline(always)] pub fn abdf(&self) -> ABDF_R { ABDF_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 14 - Auto baud rate error"] #[inline(always)] pub fn abde(&self) -> ABDE_R { ABDE_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 12 - End of block flag"] #[inline(always)] pub fn ebf(&self) -> EBF_R { EBF_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 11 - Receiver timeout"] #[inline(always)] pub fn rtf(&self) -> RTF_R { RTF_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - CTS flag"] #[inline(always)] pub fn cts(&self) -> CTS_R { CTS_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - CTS interrupt flag"] #[inline(always)] pub fn ctsf(&self) -> CTSF_R { CTSF_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - LIN break detection flag"] #[inline(always)] pub fn lbdf(&self) -> LBDF_R { LBDF_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 7 - Transmit data register empty"] #[inline(always)] pub fn tbe(&self) -> TBE_R { TBE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - Transmission complete"] #[inline(always)] pub fn tc(&self) -> TC_R { TC_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 5 - Read data register not empty"] #[inline(always)] pub fn rbne(&self) -> RBNE_R { RBNE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 4 - Idle line detected"] #[inline(always)] pub fn idlef(&self) -> IDLEF_R { IDLEF_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Overrun error"] #[inline(always)] pub fn orerr(&self) -> ORERR_R { ORERR_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 2 - Noise detected flag"] #[inline(always)] pub fn nerr(&self) -> NERR_R { NERR_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 1 - Framing error"] #[inline(always)] pub fn ferr(&self) -> FERR_R { FERR_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Parity error"] #[inline(always)] pub fn perr(&self) -> PERR_R { PERR_R::new((self.bits & 0x01) != 0) } } #[doc = "Interrupt & status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"] pub struct STAT_SPEC; impl crate::RegisterSpec for STAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat::R](R) reader structure"] impl crate::Readable for STAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets STAT to value 0xc0"] impl crate::Resettable for STAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0xc0 } } } #[doc = "INTC register accessor: an alias for `Reg`"] pub type INTC = crate::Reg; #[doc = "Interrupt flag clear register"] pub mod intc { #[doc = "Register `INTC` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `WUC` writer - Wakeup from Stop mode clear flag"] pub struct WUC_W<'a> { w: &'a mut W, } impl<'a> WUC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `AMC` writer - Character match clear flag"] pub struct AMC_W<'a> { w: &'a mut W, } impl<'a> AMC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `EBC` writer - End of timeout clear flag"] pub struct EBC_W<'a> { w: &'a mut W, } impl<'a> EBC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `RTC` writer - Receiver timeout clear flag"] pub struct RTC_W<'a> { w: &'a mut W, } impl<'a> RTC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `CTSC` writer - CTS clear flag"] pub struct CTSC_W<'a> { w: &'a mut W, } impl<'a> CTSC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `LBDC` writer - LIN break detection clear flag"] pub struct LBDC_W<'a> { w: &'a mut W, } impl<'a> LBDC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `TCC` writer - Transmission complete clear flag"] pub struct TCC_W<'a> { w: &'a mut W, } impl<'a> TCC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `IDLEC` writer - Idle line detected clear flag"] pub struct IDLEC_W<'a> { w: &'a mut W, } impl<'a> IDLEC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `OREC` writer - Overrun error clear flag"] pub struct OREC_W<'a> { w: &'a mut W, } impl<'a> OREC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NEC` writer - Noise detected clear flag"] pub struct NEC_W<'a> { w: &'a mut W, } impl<'a> NEC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `FEC` writer - Framing error clear flag"] pub struct FEC_W<'a> { w: &'a mut W, } impl<'a> FEC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `PEC` writer - Parity error clear flag"] pub struct PEC_W<'a> { w: &'a mut W, } impl<'a> PEC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl W { #[doc = "Bit 20 - Wakeup from Stop mode clear flag"] #[inline(always)] pub fn wuc(&mut self) -> WUC_W { WUC_W { w: self } } #[doc = "Bit 17 - Character match clear flag"] #[inline(always)] pub fn amc(&mut self) -> AMC_W { AMC_W { w: self } } #[doc = "Bit 12 - End of timeout clear flag"] #[inline(always)] pub fn ebc(&mut self) -> EBC_W { EBC_W { w: self } } #[doc = "Bit 11 - Receiver timeout clear flag"] #[inline(always)] pub fn rtc(&mut self) -> RTC_W { RTC_W { w: self } } #[doc = "Bit 9 - CTS clear flag"] #[inline(always)] pub fn ctsc(&mut self) -> CTSC_W { CTSC_W { w: self } } #[doc = "Bit 8 - LIN break detection clear flag"] #[inline(always)] pub fn lbdc(&mut self) -> LBDC_W { LBDC_W { w: self } } #[doc = "Bit 6 - Transmission complete clear flag"] #[inline(always)] pub fn tcc(&mut self) -> TCC_W { TCC_W { w: self } } #[doc = "Bit 4 - Idle line detected clear flag"] #[inline(always)] pub fn idlec(&mut self) -> IDLEC_W { IDLEC_W { w: self } } #[doc = "Bit 3 - Overrun error clear flag"] #[inline(always)] pub fn orec(&mut self) -> OREC_W { OREC_W { w: self } } #[doc = "Bit 2 - Noise detected clear flag"] #[inline(always)] pub fn nec(&mut self) -> NEC_W { NEC_W { w: self } } #[doc = "Bit 1 - Framing error clear flag"] #[inline(always)] pub fn fec(&mut self) -> FEC_W { FEC_W { w: self } } #[doc = "Bit 0 - Parity error clear flag"] #[inline(always)] pub fn pec(&mut self) -> PEC_W { PEC_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Interrupt flag clear register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intc](index.html) module"] pub struct INTC_SPEC; impl crate::RegisterSpec for INTC_SPEC { type Ux = u32; } #[doc = "`write(|w| ..)` method takes [intc::W](W) writer structure"] impl crate::Writable for INTC_SPEC { type Writer = W; } #[doc = "`reset()` method sets INTC to value 0"] impl crate::Resettable for INTC_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RDATA register accessor: an alias for `Reg`"] pub type RDATA = crate::Reg; #[doc = "Receive data register"] pub mod rdata { #[doc = "Register `RDATA` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `RDATA` reader - Receive data value"] pub struct RDATA_R(crate::FieldReader); impl RDATA_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { RDATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RDATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:8 - Receive data value"] #[inline(always)] pub fn rdata(&self) -> RDATA_R { RDATA_R::new((self.bits & 0x01ff) as u16) } } #[doc = "Receive data register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rdata](index.html) module"] pub struct RDATA_SPEC; impl crate::RegisterSpec for RDATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rdata::R](R) reader structure"] impl crate::Readable for RDATA_SPEC { type Reader = R; } #[doc = "`reset()` method sets RDATA to value 0"] impl crate::Resettable for RDATA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "TDATA register accessor: an alias for `Reg`"] pub type TDATA = crate::Reg; #[doc = "Transmit data register"] pub mod tdata { #[doc = "Register `TDATA` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `TDATA` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TDATA` reader - Transmit data value"] pub struct TDATA_R(crate::FieldReader); impl TDATA_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { TDATA_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TDATA_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TDATA` writer - Transmit data value"] pub struct TDATA_W<'a> { w: &'a mut W, } impl<'a> TDATA_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x01ff) | (value as u32 & 0x01ff); self.w } } impl R { #[doc = "Bits 0:8 - Transmit data value"] #[inline(always)] pub fn tdata(&self) -> TDATA_R { TDATA_R::new((self.bits & 0x01ff) as u16) } } impl W { #[doc = "Bits 0:8 - Transmit data value"] #[inline(always)] pub fn tdata(&mut self) -> TDATA_W { TDATA_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Transmit data register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tdata](index.html) module"] pub struct TDATA_SPEC; impl crate::RegisterSpec for TDATA_SPEC { type Ux = u32; } #[doc = "`read()` method returns [tdata::R](R) reader structure"] impl crate::Readable for TDATA_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [tdata::W](W) writer structure"] impl crate::Writable for TDATA_SPEC { type Writer = W; } #[doc = "`reset()` method sets TDATA to value 0"] impl crate::Resettable for TDATA_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "RFCS register accessor: an alias for `Reg`"] pub type RFCS = crate::Reg; #[doc = "USART receive FIFO control and status register"] pub mod rfcs { #[doc = "Register `RFCS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `RFCS` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RFFINT` reader - Receive FIFO full interrupt flag"] pub struct RFFINT_R(crate::FieldReader); impl RFFINT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RFFINT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RFFINT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RFFINT` writer - Receive FIFO full interrupt flag"] pub struct RFFINT_W<'a> { w: &'a mut W, } impl<'a> RFFINT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `RFCNT` reader - Receive FIFO count number"] pub struct RFCNT_R(crate::FieldReader); impl RFCNT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RFCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RFCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RFCNT` writer - Receive FIFO count number"] pub struct RFCNT_W<'a> { w: &'a mut W, } impl<'a> RFCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x07 << 12)) | ((value as u32 & 0x07) << 12); self.w } } #[doc = "Field `RFF` reader - Receive FIFO full flag"] pub struct RFF_R(crate::FieldReader); impl RFF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RFF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RFF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RFF` writer - Receive FIFO full flag"] pub struct RFF_W<'a> { w: &'a mut W, } impl<'a> RFF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `RFE` reader - Receive FIFO empty flag"] pub struct RFE_R(crate::FieldReader); impl RFE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RFE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RFE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RFE` writer - Receive FIFO empty flag"] pub struct RFE_W<'a> { w: &'a mut W, } impl<'a> RFE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `RFFIE` reader - Receive FIFO full interrupt enable"] pub struct RFFIE_R(crate::FieldReader); impl RFFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RFFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RFFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RFFIE` writer - Receive FIFO full interrupt enable"] pub struct RFFIE_W<'a> { w: &'a mut W, } impl<'a> RFFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `RFEN` reader - Receive FIFO enable"] pub struct RFEN_R(crate::FieldReader); impl RFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RFEN` writer - Receive FIFO enable"] pub struct RFEN_W<'a> { w: &'a mut W, } impl<'a> RFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `ELNACK` reader - Early NKEN when smartcard mode is selected"] pub struct ELNACK_R(crate::FieldReader); impl ELNACK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ELNACK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ELNACK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ELNACK` writer - Early NKEN when smartcard mode is selected"] pub struct ELNACK_W<'a> { w: &'a mut W, } impl<'a> ELNACK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 15 - Receive FIFO full interrupt flag"] #[inline(always)] pub fn rffint(&self) -> RFFINT_R { RFFINT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 12:14 - Receive FIFO count number"] #[inline(always)] pub fn rfcnt(&self) -> RFCNT_R { RFCNT_R::new(((self.bits >> 12) & 0x07) as u8) } #[doc = "Bit 11 - Receive FIFO full flag"] #[inline(always)] pub fn rff(&self) -> RFF_R { RFF_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 10 - Receive FIFO empty flag"] #[inline(always)] pub fn rfe(&self) -> RFE_R { RFE_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 9 - Receive FIFO full interrupt enable"] #[inline(always)] pub fn rffie(&self) -> RFFIE_R { RFFIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 8 - Receive FIFO enable"] #[inline(always)] pub fn rfen(&self) -> RFEN_R { RFEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 0 - Early NKEN when smartcard mode is selected"] #[inline(always)] pub fn elnack(&self) -> ELNACK_R { ELNACK_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 15 - Receive FIFO full interrupt flag"] #[inline(always)] pub fn rffint(&mut self) -> RFFINT_W { RFFINT_W { w: self } } #[doc = "Bits 12:14 - Receive FIFO count number"] #[inline(always)] pub fn rfcnt(&mut self) -> RFCNT_W { RFCNT_W { w: self } } #[doc = "Bit 11 - Receive FIFO full flag"] #[inline(always)] pub fn rff(&mut self) -> RFF_W { RFF_W { w: self } } #[doc = "Bit 10 - Receive FIFO empty flag"] #[inline(always)] pub fn rfe(&mut self) -> RFE_W { RFE_W { w: self } } #[doc = "Bit 9 - Receive FIFO full interrupt enable"] #[inline(always)] pub fn rffie(&mut self) -> RFFIE_W { RFFIE_W { w: self } } #[doc = "Bit 8 - Receive FIFO enable"] #[inline(always)] pub fn rfen(&mut self) -> RFEN_W { RFEN_W { w: self } } #[doc = "Bit 0 - Early NKEN when smartcard mode is selected"] #[inline(always)] pub fn elnack(&mut self) -> ELNACK_W { ELNACK_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "USART receive FIFO control and status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rfcs](index.html) module"] pub struct RFCS_SPEC; impl crate::RegisterSpec for RFCS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [rfcs::R](R) reader structure"] impl crate::Readable for RFCS_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [rfcs::W](W) writer structure"] impl crate::Writable for RFCS_SPEC { type Writer = W; } #[doc = "`reset()` method sets RFCS to value 0x0400"] impl crate::Resettable for RFCS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0400 } } } } #[doc = "Universal synchronous asynchronous receiver transmitter"] pub struct USART1 { _marker: PhantomData<*const ()>, } unsafe impl Send for USART1 {} impl USART1 { #[doc = r"Pointer to the register block"] pub const PTR: *const usart0::RegisterBlock = 0x4000_4400 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const usart0::RegisterBlock { Self::PTR } } impl Deref for USART1 { type Target = usart0::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for USART1 { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("USART1").finish() } } #[doc = "Universal synchronous asynchronous receiver transmitter"] pub use usart0 as usart1; #[doc = "USB full speed global registers"] pub struct USBFS_GLOBAL { _marker: PhantomData<*const ()>, } unsafe impl Send for USBFS_GLOBAL {} impl USBFS_GLOBAL { #[doc = r"Pointer to the register block"] pub const PTR: *const usbfs_global::RegisterBlock = 0x5000_0000 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const usbfs_global::RegisterBlock { Self::PTR } } impl Deref for USBFS_GLOBAL { type Target = usbfs_global::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for USBFS_GLOBAL { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("USBFS_GLOBAL").finish() } } #[doc = "USB full speed global registers"] pub mod usbfs_global { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Global OTG control and status register (USBFS_GOTGCS)"] pub gotgcs: crate::Reg, #[doc = "0x04 - Global OTG interrupt flag register (USBFS_GOTGINTF)"] pub gotgintf: crate::Reg, #[doc = "0x08 - Global AHB control and status register (USBFS_GAHBCS)"] pub gahbcs: crate::Reg, #[doc = "0x0c - Global USB control and status register (OTG_FS_GUSBCS)"] pub gusbcs: crate::Reg, #[doc = "0x10 - Global reset control register (USBFS_GRSTCTL)"] pub grstctl: crate::Reg, #[doc = "0x14 - Global interrupt flag register (USBFS_GINTF)"] pub gintf: crate::Reg, #[doc = "0x18 - Global interrupt enable register (USBFS_GINTEN)"] pub ginten: crate::Reg, _reserved_7_grstatr: [u8; 0x04], _reserved_8_grstatp: [u8; 0x04], #[doc = "0x24 - Global Receive FIFO size register (USBFS_GRFLEN)"] pub grflen: crate::Reg, _reserved_10_hnptflen: [u8; 0x04], #[doc = "0x2c - Host non-periodic transmit FIFO/queue status register (HNPTFQSTAT)"] pub hnptfqstat: crate::Reg, _reserved12: [u8; 0x08], #[doc = "0x38 - Global core configuration register (USBFS_GCCFG)"] pub gccfg: crate::Reg, #[doc = "0x3c - core ID register"] pub cid: crate::Reg, _reserved14: [u8; 0xc0], #[doc = "0x100 - Host periodic transmit FIFO length register (HPTFLEN)"] pub hptflen: crate::Reg, #[doc = "0x104 - device IN endpoint transmit FIFO size register (DIEP1TFLEN)"] pub diep1tflen: crate::Reg, #[doc = "0x108 - device IN endpoint transmit FIFO size register (DIEP2TFLEN)"] pub diep2tflen: crate::Reg, #[doc = "0x10c - device IN endpoint transmit FIFO size register (FS_DIEP3TXFLEN)"] pub diep3tflen: crate::Reg, } impl RegisterBlock { #[doc = "0x1c - Global Receive status read(Host mode)"] #[inline(always)] pub fn grstatr_host(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const crate::Reg) } } #[doc = "0x1c - Global Receive status read(Device mode)"] #[inline(always)] pub fn grstatr_device(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(28usize) as *const crate::Reg) } } #[doc = "0x20 - Global Receive status pop(Host mode)"] #[inline(always)] pub fn grstatp_host(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(32usize) as *const crate::Reg) } } #[doc = "0x20 - Global Receive status pop(Device mode)"] #[inline(always)] pub fn grstatp_device(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(32usize) as *const crate::Reg) } } #[doc = "0x28 - Device IN endpoint 0 transmit FIFO length (Device mode)"] #[inline(always)] pub fn diep0tflen(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(40usize) as *const crate::Reg) } } #[doc = "0x28 - Host non-periodic transmit FIFO length register (Host mode)"] #[inline(always)] pub fn hnptflen(&self) -> &crate::Reg { unsafe { &*(((self as *const Self) as *const u8).add(40usize) as *const crate::Reg) } } } #[doc = "GOTGCS register accessor: an alias for `Reg`"] pub type GOTGCS = crate::Reg; #[doc = "Global OTG control and status register (USBFS_GOTGCS)"] pub mod gotgcs { #[doc = "Register `GOTGCS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GOTGCS` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SRPS` reader - SRP success"] pub struct SRPS_R(crate::FieldReader); impl SRPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SRPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SRPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SRPREQ` reader - SRP request"] pub struct SRPREQ_R(crate::FieldReader); impl SRPREQ_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SRPREQ_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SRPREQ_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SRPREQ` writer - SRP request"] pub struct SRPREQ_W<'a> { w: &'a mut W, } impl<'a> SRPREQ_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `HNPS` reader - Host success"] pub struct HNPS_R(crate::FieldReader); impl HNPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HNPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HNPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HNPREQ` reader - HNP request"] pub struct HNPREQ_R(crate::FieldReader); impl HNPREQ_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HNPREQ_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HNPREQ_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HNPREQ` writer - HNP request"] pub struct HNPREQ_W<'a> { w: &'a mut W, } impl<'a> HNPREQ_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `HHNPEN` reader - Host HNP enable"] pub struct HHNPEN_R(crate::FieldReader); impl HHNPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HHNPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HHNPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HHNPEN` writer - Host HNP enable"] pub struct HHNPEN_W<'a> { w: &'a mut W, } impl<'a> HHNPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `DHNPEN` reader - Device HNP enabled"] pub struct DHNPEN_R(crate::FieldReader); impl DHNPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DHNPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DHNPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DHNPEN` writer - Device HNP enabled"] pub struct DHNPEN_W<'a> { w: &'a mut W, } impl<'a> DHNPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `IDPS` reader - ID pin status"] pub struct IDPS_R(crate::FieldReader); impl IDPS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IDPS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IDPS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DI` reader - Debounce interval"] pub struct DI_R(crate::FieldReader); impl DI_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DI_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DI_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ASV` reader - A-session valid"] pub struct ASV_R(crate::FieldReader); impl ASV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ASV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ASV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BSV` reader - B-session valid"] pub struct BSV_R(crate::FieldReader); impl BSV_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BSV_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BSV_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 0 - SRP success"] #[inline(always)] pub fn srps(&self) -> SRPS_R { SRPS_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - SRP request"] #[inline(always)] pub fn srpreq(&self) -> SRPREQ_R { SRPREQ_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 8 - Host success"] #[inline(always)] pub fn hnps(&self) -> HNPS_R { HNPS_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - HNP request"] #[inline(always)] pub fn hnpreq(&self) -> HNPREQ_R { HNPREQ_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Host HNP enable"] #[inline(always)] pub fn hhnpen(&self) -> HHNPEN_R { HHNPEN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Device HNP enabled"] #[inline(always)] pub fn dhnpen(&self) -> DHNPEN_R { DHNPEN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 16 - ID pin status"] #[inline(always)] pub fn idps(&self) -> IDPS_R { IDPS_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Debounce interval"] #[inline(always)] pub fn di(&self) -> DI_R { DI_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - A-session valid"] #[inline(always)] pub fn asv(&self) -> ASV_R { ASV_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - B-session valid"] #[inline(always)] pub fn bsv(&self) -> BSV_R { BSV_R::new(((self.bits >> 19) & 0x01) != 0) } } impl W { #[doc = "Bit 1 - SRP request"] #[inline(always)] pub fn srpreq(&mut self) -> SRPREQ_W { SRPREQ_W { w: self } } #[doc = "Bit 9 - HNP request"] #[inline(always)] pub fn hnpreq(&mut self) -> HNPREQ_W { HNPREQ_W { w: self } } #[doc = "Bit 10 - Host HNP enable"] #[inline(always)] pub fn hhnpen(&mut self) -> HHNPEN_W { HHNPEN_W { w: self } } #[doc = "Bit 11 - Device HNP enabled"] #[inline(always)] pub fn dhnpen(&mut self) -> DHNPEN_W { DHNPEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Global OTG control and status register (USBFS_GOTGCS)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gotgcs](index.html) module"] pub struct GOTGCS_SPEC; impl crate::RegisterSpec for GOTGCS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [gotgcs::R](R) reader structure"] impl crate::Readable for GOTGCS_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [gotgcs::W](W) writer structure"] impl crate::Writable for GOTGCS_SPEC { type Writer = W; } #[doc = "`reset()` method sets GOTGCS to value 0x0800"] impl crate::Resettable for GOTGCS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0800 } } } #[doc = "GOTGINTF register accessor: an alias for `Reg`"] pub type GOTGINTF = crate::Reg; #[doc = "Global OTG interrupt flag register (USBFS_GOTGINTF)"] pub mod gotgintf { #[doc = "Register `GOTGINTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GOTGINTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SESEND` reader - Session end"] pub struct SESEND_R(crate::FieldReader); impl SESEND_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SESEND_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SESEND_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SESEND` writer - Session end"] pub struct SESEND_W<'a> { w: &'a mut W, } impl<'a> SESEND_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `SRPEND` reader - Session request success status change"] pub struct SRPEND_R(crate::FieldReader); impl SRPEND_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SRPEND_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SRPEND_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SRPEND` writer - Session request success status change"] pub struct SRPEND_W<'a> { w: &'a mut W, } impl<'a> SRPEND_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `HNPEND` reader - HNP end"] pub struct HNPEND_R(crate::FieldReader); impl HNPEND_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HNPEND_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HNPEND_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HNPEND` writer - HNP end"] pub struct HNPEND_W<'a> { w: &'a mut W, } impl<'a> HNPEND_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `HNPDET` reader - Host negotiation request detected"] pub struct HNPDET_R(crate::FieldReader); impl HNPDET_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HNPDET_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HNPDET_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HNPDET` writer - Host negotiation request detected"] pub struct HNPDET_W<'a> { w: &'a mut W, } impl<'a> HNPDET_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `ADTO` reader - A-device timeout"] pub struct ADTO_R(crate::FieldReader); impl ADTO_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ADTO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ADTO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ADTO` writer - A-device timeout"] pub struct ADTO_W<'a> { w: &'a mut W, } impl<'a> ADTO_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `DF` reader - Debounce finish"] pub struct DF_R(crate::FieldReader); impl DF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DF` writer - Debounce finish"] pub struct DF_W<'a> { w: &'a mut W, } impl<'a> DF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } impl R { #[doc = "Bit 2 - Session end"] #[inline(always)] pub fn sesend(&self) -> SESEND_R { SESEND_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 8 - Session request success status change"] #[inline(always)] pub fn srpend(&self) -> SRPEND_R { SRPEND_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - HNP end"] #[inline(always)] pub fn hnpend(&self) -> HNPEND_R { HNPEND_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 17 - Host negotiation request detected"] #[inline(always)] pub fn hnpdet(&self) -> HNPDET_R { HNPDET_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - A-device timeout"] #[inline(always)] pub fn adto(&self) -> ADTO_R { ADTO_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - Debounce finish"] #[inline(always)] pub fn df(&self) -> DF_R { DF_R::new(((self.bits >> 19) & 0x01) != 0) } } impl W { #[doc = "Bit 2 - Session end"] #[inline(always)] pub fn sesend(&mut self) -> SESEND_W { SESEND_W { w: self } } #[doc = "Bit 8 - Session request success status change"] #[inline(always)] pub fn srpend(&mut self) -> SRPEND_W { SRPEND_W { w: self } } #[doc = "Bit 9 - HNP end"] #[inline(always)] pub fn hnpend(&mut self) -> HNPEND_W { HNPEND_W { w: self } } #[doc = "Bit 17 - Host negotiation request detected"] #[inline(always)] pub fn hnpdet(&mut self) -> HNPDET_W { HNPDET_W { w: self } } #[doc = "Bit 18 - A-device timeout"] #[inline(always)] pub fn adto(&mut self) -> ADTO_W { ADTO_W { w: self } } #[doc = "Bit 19 - Debounce finish"] #[inline(always)] pub fn df(&mut self) -> DF_W { DF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Global OTG interrupt flag register (USBFS_GOTGINTF)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gotgintf](index.html) module"] pub struct GOTGINTF_SPEC; impl crate::RegisterSpec for GOTGINTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [gotgintf::R](R) reader structure"] impl crate::Readable for GOTGINTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [gotgintf::W](W) writer structure"] impl crate::Writable for GOTGINTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets GOTGINTF to value 0"] impl crate::Resettable for GOTGINTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "GAHBCS register accessor: an alias for `Reg`"] pub type GAHBCS = crate::Reg; #[doc = "Global AHB control and status register (USBFS_GAHBCS)"] pub mod gahbcs { #[doc = "Register `GAHBCS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GAHBCS` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `GINTEN` reader - Global interrupt enable"] pub struct GINTEN_R(crate::FieldReader); impl GINTEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GINTEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GINTEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GINTEN` writer - Global interrupt enable"] pub struct GINTEN_W<'a> { w: &'a mut W, } impl<'a> GINTEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `TXFTH` reader - Tx FIFO threshold"] pub struct TXFTH_R(crate::FieldReader); impl TXFTH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TXFTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TXFTH` writer - Tx FIFO threshold"] pub struct TXFTH_W<'a> { w: &'a mut W, } impl<'a> TXFTH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PTXFTH` reader - Periodic Tx FIFO threshold"] pub struct PTXFTH_R(crate::FieldReader); impl PTXFTH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PTXFTH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PTXFTH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PTXFTH` writer - Periodic Tx FIFO threshold"] pub struct PTXFTH_W<'a> { w: &'a mut W, } impl<'a> PTXFTH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } impl R { #[doc = "Bit 0 - Global interrupt enable"] #[inline(always)] pub fn ginten(&self) -> GINTEN_R { GINTEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 7 - Tx FIFO threshold"] #[inline(always)] pub fn txfth(&self) -> TXFTH_R { TXFTH_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Periodic Tx FIFO threshold"] #[inline(always)] pub fn ptxfth(&self) -> PTXFTH_R { PTXFTH_R::new(((self.bits >> 8) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Global interrupt enable"] #[inline(always)] pub fn ginten(&mut self) -> GINTEN_W { GINTEN_W { w: self } } #[doc = "Bit 7 - Tx FIFO threshold"] #[inline(always)] pub fn txfth(&mut self) -> TXFTH_W { TXFTH_W { w: self } } #[doc = "Bit 8 - Periodic Tx FIFO threshold"] #[inline(always)] pub fn ptxfth(&mut self) -> PTXFTH_W { PTXFTH_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Global AHB control and status register (USBFS_GAHBCS)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gahbcs](index.html) module"] pub struct GAHBCS_SPEC; impl crate::RegisterSpec for GAHBCS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [gahbcs::R](R) reader structure"] impl crate::Readable for GAHBCS_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [gahbcs::W](W) writer structure"] impl crate::Writable for GAHBCS_SPEC { type Writer = W; } #[doc = "`reset()` method sets GAHBCS to value 0"] impl crate::Resettable for GAHBCS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "GUSBCS register accessor: an alias for `Reg`"] pub type GUSBCS = crate::Reg; #[doc = "Global USB control and status register (OTG_FS_GUSBCS)"] pub mod gusbcs { #[doc = "Register `GUSBCS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GUSBCS` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TOC` reader - Timeout calibration"] pub struct TOC_R(crate::FieldReader); impl TOC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TOC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TOC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TOC` writer - Timeout calibration"] pub struct TOC_W<'a> { w: &'a mut W, } impl<'a> TOC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x07) | (value as u32 & 0x07); self.w } } #[doc = "Field `SRPCEN` reader - SRP capability enable"] pub struct SRPCEN_R(crate::FieldReader); impl SRPCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SRPCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SRPCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SRPCEN` writer - SRP capability enable"] pub struct SRPCEN_W<'a> { w: &'a mut W, } impl<'a> SRPCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `HNPCEN` reader - HNP capability enable"] pub struct HNPCEN_R(crate::FieldReader); impl HNPCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HNPCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HNPCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HNPCEN` writer - HNP capability enable"] pub struct HNPCEN_W<'a> { w: &'a mut W, } impl<'a> HNPCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `UTT` reader - USB turnaround time"] pub struct UTT_R(crate::FieldReader); impl UTT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { UTT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for UTT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `UTT` writer - USB turnaround time"] pub struct UTT_W<'a> { w: &'a mut W, } impl<'a> UTT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 10)) | ((value as u32 & 0x0f) << 10); self.w } } #[doc = "Field `FHM` reader - Force host mode"] pub struct FHM_R(crate::FieldReader); impl FHM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FHM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FHM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FHM` writer - Force host mode"] pub struct FHM_W<'a> { w: &'a mut W, } impl<'a> FHM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `FDM` reader - Force device mode"] pub struct FDM_R(crate::FieldReader); impl FDM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { FDM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FDM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FDM` writer - Force device mode"] pub struct FDM_W<'a> { w: &'a mut W, } impl<'a> FDM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } impl R { #[doc = "Bits 0:2 - Timeout calibration"] #[inline(always)] pub fn toc(&self) -> TOC_R { TOC_R::new((self.bits & 0x07) as u8) } #[doc = "Bit 8 - SRP capability enable"] #[inline(always)] pub fn srpcen(&self) -> SRPCEN_R { SRPCEN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - HNP capability enable"] #[inline(always)] pub fn hnpcen(&self) -> HNPCEN_R { HNPCEN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bits 10:13 - USB turnaround time"] #[inline(always)] pub fn utt(&self) -> UTT_R { UTT_R::new(((self.bits >> 10) & 0x0f) as u8) } #[doc = "Bit 29 - Force host mode"] #[inline(always)] pub fn fhm(&self) -> FHM_R { FHM_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Force device mode"] #[inline(always)] pub fn fdm(&self) -> FDM_R { FDM_R::new(((self.bits >> 30) & 0x01) != 0) } } impl W { #[doc = "Bits 0:2 - Timeout calibration"] #[inline(always)] pub fn toc(&mut self) -> TOC_W { TOC_W { w: self } } #[doc = "Bit 8 - SRP capability enable"] #[inline(always)] pub fn srpcen(&mut self) -> SRPCEN_W { SRPCEN_W { w: self } } #[doc = "Bit 9 - HNP capability enable"] #[inline(always)] pub fn hnpcen(&mut self) -> HNPCEN_W { HNPCEN_W { w: self } } #[doc = "Bits 10:13 - USB turnaround time"] #[inline(always)] pub fn utt(&mut self) -> UTT_W { UTT_W { w: self } } #[doc = "Bit 29 - Force host mode"] #[inline(always)] pub fn fhm(&mut self) -> FHM_W { FHM_W { w: self } } #[doc = "Bit 30 - Force device mode"] #[inline(always)] pub fn fdm(&mut self) -> FDM_W { FDM_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Global USB control and status register (OTG_FS_GUSBCS)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gusbcs](index.html) module"] pub struct GUSBCS_SPEC; impl crate::RegisterSpec for GUSBCS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [gusbcs::R](R) reader structure"] impl crate::Readable for GUSBCS_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [gusbcs::W](W) writer structure"] impl crate::Writable for GUSBCS_SPEC { type Writer = W; } #[doc = "`reset()` method sets GUSBCS to value 0x0a80"] impl crate::Resettable for GUSBCS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0a80 } } } #[doc = "GRSTCTL register accessor: an alias for `Reg`"] pub type GRSTCTL = crate::Reg; #[doc = "Global reset control register (USBFS_GRSTCTL)"] pub mod grstctl { #[doc = "Register `GRSTCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GRSTCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CSRST` reader - Core soft reset"] pub struct CSRST_R(crate::FieldReader); impl CSRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CSRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CSRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CSRST` writer - Core soft reset"] pub struct CSRST_W<'a> { w: &'a mut W, } impl<'a> CSRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `HCSRST` reader - HCLK soft reset"] pub struct HCSRST_R(crate::FieldReader); impl HCSRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HCSRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HCSRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HCSRST` writer - HCLK soft reset"] pub struct HCSRST_W<'a> { w: &'a mut W, } impl<'a> HCSRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `HFCRST` reader - Host frame counter reset"] pub struct HFCRST_R(crate::FieldReader); impl HFCRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HFCRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HFCRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HFCRST` writer - Host frame counter reset"] pub struct HFCRST_W<'a> { w: &'a mut W, } impl<'a> HFCRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `RXFF` reader - RxFIFO flush"] pub struct RXFF_R(crate::FieldReader); impl RXFF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RXFF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RXFF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RXFF` writer - RxFIFO flush"] pub struct RXFF_W<'a> { w: &'a mut W, } impl<'a> RXFF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `TXFF` reader - TxFIFO flush"] pub struct TXFF_R(crate::FieldReader); impl TXFF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TXFF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TXFF` writer - TxFIFO flush"] pub struct TXFF_W<'a> { w: &'a mut W, } impl<'a> TXFF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `TXFNUM` reader - TxFIFO number"] pub struct TXFNUM_R(crate::FieldReader); impl TXFNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TXFNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TXFNUM` writer - TxFIFO number"] pub struct TXFNUM_W<'a> { w: &'a mut W, } impl<'a> TXFNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x1f << 6)) | ((value as u32 & 0x1f) << 6); self.w } } impl R { #[doc = "Bit 0 - Core soft reset"] #[inline(always)] pub fn csrst(&self) -> CSRST_R { CSRST_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - HCLK soft reset"] #[inline(always)] pub fn hcsrst(&self) -> HCSRST_R { HCSRST_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Host frame counter reset"] #[inline(always)] pub fn hfcrst(&self) -> HFCRST_R { HFCRST_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 4 - RxFIFO flush"] #[inline(always)] pub fn rxff(&self) -> RXFF_R { RXFF_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - TxFIFO flush"] #[inline(always)] pub fn txff(&self) -> TXFF_R { TXFF_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bits 6:10 - TxFIFO number"] #[inline(always)] pub fn txfnum(&self) -> TXFNUM_R { TXFNUM_R::new(((self.bits >> 6) & 0x1f) as u8) } } impl W { #[doc = "Bit 0 - Core soft reset"] #[inline(always)] pub fn csrst(&mut self) -> CSRST_W { CSRST_W { w: self } } #[doc = "Bit 1 - HCLK soft reset"] #[inline(always)] pub fn hcsrst(&mut self) -> HCSRST_W { HCSRST_W { w: self } } #[doc = "Bit 2 - Host frame counter reset"] #[inline(always)] pub fn hfcrst(&mut self) -> HFCRST_W { HFCRST_W { w: self } } #[doc = "Bit 4 - RxFIFO flush"] #[inline(always)] pub fn rxff(&mut self) -> RXFF_W { RXFF_W { w: self } } #[doc = "Bit 5 - TxFIFO flush"] #[inline(always)] pub fn txff(&mut self) -> TXFF_W { TXFF_W { w: self } } #[doc = "Bits 6:10 - TxFIFO number"] #[inline(always)] pub fn txfnum(&mut self) -> TXFNUM_W { TXFNUM_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Global reset control register (USBFS_GRSTCTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grstctl](index.html) module"] pub struct GRSTCTL_SPEC; impl crate::RegisterSpec for GRSTCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [grstctl::R](R) reader structure"] impl crate::Readable for GRSTCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [grstctl::W](W) writer structure"] impl crate::Writable for GRSTCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets GRSTCTL to value 0x8000_0000"] impl crate::Resettable for GRSTCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x8000_0000 } } } #[doc = "GINTF register accessor: an alias for `Reg`"] pub type GINTF = crate::Reg; #[doc = "Global interrupt flag register (USBFS_GINTF)"] pub mod gintf { #[doc = "Register `GINTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GINTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `COPM` reader - Current operation mode"] pub struct COPM_R(crate::FieldReader); impl COPM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { COPM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for COPM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MFIF` reader - Mode fault interrupt flag"] pub struct MFIF_R(crate::FieldReader); impl MFIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MFIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MFIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MFIF` writer - Mode fault interrupt flag"] pub struct MFIF_W<'a> { w: &'a mut W, } impl<'a> MFIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OTGIF` reader - OTG interrupt flag"] pub struct OTGIF_R(crate::FieldReader); impl OTGIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OTGIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OTGIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SOF` reader - Start of frame"] pub struct SOF_R(crate::FieldReader); impl SOF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SOF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SOF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SOF` writer - Start of frame"] pub struct SOF_W<'a> { w: &'a mut W, } impl<'a> SOF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `RXFNEIF` reader - RxFIFO non-empty interrupt flag"] pub struct RXFNEIF_R(crate::FieldReader); impl RXFNEIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RXFNEIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RXFNEIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NPTXFEIF` reader - Non-periodic TxFIFO empty interrupt flag"] pub struct NPTXFEIF_R(crate::FieldReader); impl NPTXFEIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NPTXFEIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NPTXFEIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GNPINAK` reader - Global Non-Periodic IN NAK effective"] pub struct GNPINAK_R(crate::FieldReader); impl GNPINAK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GNPINAK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GNPINAK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GONAK` reader - Global OUT NAK effective"] pub struct GONAK_R(crate::FieldReader); impl GONAK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GONAK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GONAK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ESP` reader - Early suspend"] pub struct ESP_R(crate::FieldReader); impl ESP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ESP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ESP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ESP` writer - Early suspend"] pub struct ESP_W<'a> { w: &'a mut W, } impl<'a> ESP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `SP` reader - USB suspend"] pub struct SP_R(crate::FieldReader); impl SP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SP` writer - USB suspend"] pub struct SP_W<'a> { w: &'a mut W, } impl<'a> SP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `RST` reader - USB reset"] pub struct RST_R(crate::FieldReader); impl RST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RST` writer - USB reset"] pub struct RST_W<'a> { w: &'a mut W, } impl<'a> RST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `ENUMF` reader - Enumeration finished"] pub struct ENUMF_R(crate::FieldReader); impl ENUMF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ENUMF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ENUMF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ENUMF` writer - Enumeration finished"] pub struct ENUMF_W<'a> { w: &'a mut W, } impl<'a> ENUMF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `ISOOPDIF` reader - Isochronous OUT packet dropped interrupt"] pub struct ISOOPDIF_R(crate::FieldReader); impl ISOOPDIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISOOPDIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISOOPDIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISOOPDIF` writer - Isochronous OUT packet dropped interrupt"] pub struct ISOOPDIF_W<'a> { w: &'a mut W, } impl<'a> ISOOPDIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `EOPFIF` reader - End of periodic frame interrupt flag"] pub struct EOPFIF_R(crate::FieldReader); impl EOPFIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOPFIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOPFIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOPFIF` writer - End of periodic frame interrupt flag"] pub struct EOPFIF_W<'a> { w: &'a mut W, } impl<'a> EOPFIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `IEPIF` reader - IN endpoint interrupt flag"] pub struct IEPIF_R(crate::FieldReader); impl IEPIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IEPIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OEPIF` reader - OUT endpoint interrupt flag"] pub struct OEPIF_R(crate::FieldReader); impl OEPIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OEPIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OEPIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISOINCIF` reader - Isochronous IN transfer Not Complete Interrupt Flag"] pub struct ISOINCIF_R(crate::FieldReader); impl ISOINCIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISOINCIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISOINCIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISOINCIF` writer - Isochronous IN transfer Not Complete Interrupt Flag"] pub struct ISOINCIF_W<'a> { w: &'a mut W, } impl<'a> ISOINCIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `PXNCIF_ISOONCIF` reader - periodic transfer not complete interrupt flag(Host mode)/isochronous OUT transfer not complete interrupt flag(Device mode)"] pub struct PXNCIF_ISOONCIF_R(crate::FieldReader); impl PXNCIF_ISOONCIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PXNCIF_ISOONCIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PXNCIF_ISOONCIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PXNCIF_ISOONCIF` writer - periodic transfer not complete interrupt flag(Host mode)/isochronous OUT transfer not complete interrupt flag(Device mode)"] pub struct PXNCIF_ISOONCIF_W<'a> { w: &'a mut W, } impl<'a> PXNCIF_ISOONCIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `HPIF` reader - Host port interrupt flag"] pub struct HPIF_R(crate::FieldReader); impl HPIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HPIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HPIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HCIF` reader - Host channels interrupt flag"] pub struct HCIF_R(crate::FieldReader); impl HCIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HCIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HCIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PTXFEIF` reader - Periodic TxFIFO empty interrupt flag"] pub struct PTXFEIF_R(crate::FieldReader); impl PTXFEIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PTXFEIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PTXFEIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IDPSC` reader - ID pin status change"] pub struct IDPSC_R(crate::FieldReader); impl IDPSC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IDPSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IDPSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IDPSC` writer - ID pin status change"] pub struct IDPSC_W<'a> { w: &'a mut W, } impl<'a> IDPSC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `DISCIF` reader - Disconnect interrupt flag"] pub struct DISCIF_R(crate::FieldReader); impl DISCIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DISCIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DISCIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DISCIF` writer - Disconnect interrupt flag"] pub struct DISCIF_W<'a> { w: &'a mut W, } impl<'a> DISCIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `SESIF` reader - Session interrupt flag"] pub struct SESIF_R(crate::FieldReader); impl SESIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SESIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SESIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SESIF` writer - Session interrupt flag"] pub struct SESIF_W<'a> { w: &'a mut W, } impl<'a> SESIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `WKUPIF` reader - Wakeup interrupt flag"] pub struct WKUPIF_R(crate::FieldReader); impl WKUPIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WKUPIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WKUPIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WKUPIF` writer - Wakeup interrupt flag"] pub struct WKUPIF_W<'a> { w: &'a mut W, } impl<'a> WKUPIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bit 0 - Current operation mode"] #[inline(always)] pub fn copm(&self) -> COPM_R { COPM_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Mode fault interrupt flag"] #[inline(always)] pub fn mfif(&self) -> MFIF_R { MFIF_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - OTG interrupt flag"] #[inline(always)] pub fn otgif(&self) -> OTGIF_R { OTGIF_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Start of frame"] #[inline(always)] pub fn sof(&self) -> SOF_R { SOF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - RxFIFO non-empty interrupt flag"] #[inline(always)] pub fn rxfneif(&self) -> RXFNEIF_R { RXFNEIF_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Non-periodic TxFIFO empty interrupt flag"] #[inline(always)] pub fn nptxfeif(&self) -> NPTXFEIF_R { NPTXFEIF_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Global Non-Periodic IN NAK effective"] #[inline(always)] pub fn gnpinak(&self) -> GNPINAK_R { GNPINAK_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Global OUT NAK effective"] #[inline(always)] pub fn gonak(&self) -> GONAK_R { GONAK_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 10 - Early suspend"] #[inline(always)] pub fn esp(&self) -> ESP_R { ESP_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - USB suspend"] #[inline(always)] pub fn sp(&self) -> SP_R { SP_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - USB reset"] #[inline(always)] pub fn rst(&self) -> RST_R { RST_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Enumeration finished"] #[inline(always)] pub fn enumf(&self) -> ENUMF_R { ENUMF_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Isochronous OUT packet dropped interrupt"] #[inline(always)] pub fn isoopdif(&self) -> ISOOPDIF_R { ISOOPDIF_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - End of periodic frame interrupt flag"] #[inline(always)] pub fn eopfif(&self) -> EOPFIF_R { EOPFIF_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 18 - IN endpoint interrupt flag"] #[inline(always)] pub fn iepif(&self) -> IEPIF_R { IEPIF_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - OUT endpoint interrupt flag"] #[inline(always)] pub fn oepif(&self) -> OEPIF_R { OEPIF_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - Isochronous IN transfer Not Complete Interrupt Flag"] #[inline(always)] pub fn isoincif(&self) -> ISOINCIF_R { ISOINCIF_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21 - periodic transfer not complete interrupt flag(Host mode)/isochronous OUT transfer not complete interrupt flag(Device mode)"] #[inline(always)] pub fn pxncif_isooncif(&self) -> PXNCIF_ISOONCIF_R { PXNCIF_ISOONCIF_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 24 - Host port interrupt flag"] #[inline(always)] pub fn hpif(&self) -> HPIF_R { HPIF_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25 - Host channels interrupt flag"] #[inline(always)] pub fn hcif(&self) -> HCIF_R { HCIF_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26 - Periodic TxFIFO empty interrupt flag"] #[inline(always)] pub fn ptxfeif(&self) -> PTXFEIF_R { PTXFEIF_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 28 - ID pin status change"] #[inline(always)] pub fn idpsc(&self) -> IDPSC_R { IDPSC_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29 - Disconnect interrupt flag"] #[inline(always)] pub fn discif(&self) -> DISCIF_R { DISCIF_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Session interrupt flag"] #[inline(always)] pub fn sesif(&self) -> SESIF_R { SESIF_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Wakeup interrupt flag"] #[inline(always)] pub fn wkupif(&self) -> WKUPIF_R { WKUPIF_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Mode fault interrupt flag"] #[inline(always)] pub fn mfif(&mut self) -> MFIF_W { MFIF_W { w: self } } #[doc = "Bit 3 - Start of frame"] #[inline(always)] pub fn sof(&mut self) -> SOF_W { SOF_W { w: self } } #[doc = "Bit 10 - Early suspend"] #[inline(always)] pub fn esp(&mut self) -> ESP_W { ESP_W { w: self } } #[doc = "Bit 11 - USB suspend"] #[inline(always)] pub fn sp(&mut self) -> SP_W { SP_W { w: self } } #[doc = "Bit 12 - USB reset"] #[inline(always)] pub fn rst(&mut self) -> RST_W { RST_W { w: self } } #[doc = "Bit 13 - Enumeration finished"] #[inline(always)] pub fn enumf(&mut self) -> ENUMF_W { ENUMF_W { w: self } } #[doc = "Bit 14 - Isochronous OUT packet dropped interrupt"] #[inline(always)] pub fn isoopdif(&mut self) -> ISOOPDIF_W { ISOOPDIF_W { w: self } } #[doc = "Bit 15 - End of periodic frame interrupt flag"] #[inline(always)] pub fn eopfif(&mut self) -> EOPFIF_W { EOPFIF_W { w: self } } #[doc = "Bit 20 - Isochronous IN transfer Not Complete Interrupt Flag"] #[inline(always)] pub fn isoincif(&mut self) -> ISOINCIF_W { ISOINCIF_W { w: self } } #[doc = "Bit 21 - periodic transfer not complete interrupt flag(Host mode)/isochronous OUT transfer not complete interrupt flag(Device mode)"] #[inline(always)] pub fn pxncif_isooncif(&mut self) -> PXNCIF_ISOONCIF_W { PXNCIF_ISOONCIF_W { w: self } } #[doc = "Bit 28 - ID pin status change"] #[inline(always)] pub fn idpsc(&mut self) -> IDPSC_W { IDPSC_W { w: self } } #[doc = "Bit 29 - Disconnect interrupt flag"] #[inline(always)] pub fn discif(&mut self) -> DISCIF_W { DISCIF_W { w: self } } #[doc = "Bit 30 - Session interrupt flag"] #[inline(always)] pub fn sesif(&mut self) -> SESIF_W { SESIF_W { w: self } } #[doc = "Bit 31 - Wakeup interrupt flag"] #[inline(always)] pub fn wkupif(&mut self) -> WKUPIF_W { WKUPIF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Global interrupt flag register (USBFS_GINTF)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gintf](index.html) module"] pub struct GINTF_SPEC; impl crate::RegisterSpec for GINTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [gintf::R](R) reader structure"] impl crate::Readable for GINTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [gintf::W](W) writer structure"] impl crate::Writable for GINTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets GINTF to value 0x0400_0021"] impl crate::Resettable for GINTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0400_0021 } } } #[doc = "GINTEN register accessor: an alias for `Reg`"] pub type GINTEN = crate::Reg; #[doc = "Global interrupt enable register (USBFS_GINTEN)"] pub mod ginten { #[doc = "Register `GINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MFIE` reader - Mode fault interrupt enable"] pub struct MFIE_R(crate::FieldReader); impl MFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { MFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MFIE` writer - Mode fault interrupt enable"] pub struct MFIE_W<'a> { w: &'a mut W, } impl<'a> MFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `OTGIE` reader - OTG interrupt enable"] pub struct OTGIE_R(crate::FieldReader); impl OTGIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OTGIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OTGIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OTGIE` writer - OTG interrupt enable"] pub struct OTGIE_W<'a> { w: &'a mut W, } impl<'a> OTGIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `SOFIE` reader - Start of frame interrupt enable"] pub struct SOFIE_R(crate::FieldReader); impl SOFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SOFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SOFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SOFIE` writer - Start of frame interrupt enable"] pub struct SOFIE_W<'a> { w: &'a mut W, } impl<'a> SOFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `RXFNEIE` reader - Receive FIFO non-empty interrupt enable"] pub struct RXFNEIE_R(crate::FieldReader); impl RXFNEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RXFNEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RXFNEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RXFNEIE` writer - Receive FIFO non-empty interrupt enable"] pub struct RXFNEIE_W<'a> { w: &'a mut W, } impl<'a> RXFNEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `NPTXFEIE` reader - Non-periodic TxFIFO empty interrupt enable"] pub struct NPTXFEIE_R(crate::FieldReader); impl NPTXFEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NPTXFEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NPTXFEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NPTXFEIE` writer - Non-periodic TxFIFO empty interrupt enable"] pub struct NPTXFEIE_W<'a> { w: &'a mut W, } impl<'a> NPTXFEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `GNPINAKIE` reader - Global non-periodic IN NAK effective interrupt enable"] pub struct GNPINAKIE_R(crate::FieldReader); impl GNPINAKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GNPINAKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GNPINAKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GNPINAKIE` writer - Global non-periodic IN NAK effective interrupt enable"] pub struct GNPINAKIE_W<'a> { w: &'a mut W, } impl<'a> GNPINAKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `GONAKIE` reader - Global OUT NAK effective interrupt enable"] pub struct GONAKIE_R(crate::FieldReader); impl GONAKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GONAKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GONAKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GONAKIE` writer - Global OUT NAK effective interrupt enable"] pub struct GONAKIE_W<'a> { w: &'a mut W, } impl<'a> GONAKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `ESPIE` reader - Early suspend interrupt enable"] pub struct ESPIE_R(crate::FieldReader); impl ESPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ESPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ESPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ESPIE` writer - Early suspend interrupt enable"] pub struct ESPIE_W<'a> { w: &'a mut W, } impl<'a> ESPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `SPIE` reader - USB suspend interrupt enable"] pub struct SPIE_R(crate::FieldReader); impl SPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SPIE` writer - USB suspend interrupt enable"] pub struct SPIE_W<'a> { w: &'a mut W, } impl<'a> SPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } #[doc = "Field `RSTIE` reader - USB reset interrupt enable"] pub struct RSTIE_R(crate::FieldReader); impl RSTIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RSTIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RSTIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RSTIE` writer - USB reset interrupt enable"] pub struct RSTIE_W<'a> { w: &'a mut W, } impl<'a> RSTIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `ENUMFIE` reader - Enumeration finish interrupt enable"] pub struct ENUMFIE_R(crate::FieldReader); impl ENUMFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ENUMFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ENUMFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ENUMFIE` writer - Enumeration finish interrupt enable"] pub struct ENUMFIE_W<'a> { w: &'a mut W, } impl<'a> ENUMFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); self.w } } #[doc = "Field `ISOOPDIE` reader - Isochronous OUT packet dropped interrupt enable"] pub struct ISOOPDIE_R(crate::FieldReader); impl ISOOPDIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISOOPDIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISOOPDIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISOOPDIE` writer - Isochronous OUT packet dropped interrupt enable"] pub struct ISOOPDIE_W<'a> { w: &'a mut W, } impl<'a> ISOOPDIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 14)) | ((value as u32 & 0x01) << 14); self.w } } #[doc = "Field `EOPFIE` reader - End of periodic frame interrupt enable"] pub struct EOPFIE_R(crate::FieldReader); impl EOPFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOPFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOPFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOPFIE` writer - End of periodic frame interrupt enable"] pub struct EOPFIE_W<'a> { w: &'a mut W, } impl<'a> EOPFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `IEPIE` reader - IN endpoints interrupt enable"] pub struct IEPIE_R(crate::FieldReader); impl IEPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IEPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPIE` writer - IN endpoints interrupt enable"] pub struct IEPIE_W<'a> { w: &'a mut W, } impl<'a> IEPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `OEPIE` reader - OUT endpoints interrupt enable"] pub struct OEPIE_R(crate::FieldReader); impl OEPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { OEPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OEPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OEPIE` writer - OUT endpoints interrupt enable"] pub struct OEPIE_W<'a> { w: &'a mut W, } impl<'a> OEPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `ISOINCIE` reader - isochronous IN transfer not complete interrupt enable"] pub struct ISOINCIE_R(crate::FieldReader); impl ISOINCIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ISOINCIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ISOINCIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ISOINCIE` writer - isochronous IN transfer not complete interrupt enable"] pub struct ISOINCIE_W<'a> { w: &'a mut W, } impl<'a> ISOINCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `PXNCIE_ISOONCIE` reader - periodic transfer not compelete Interrupt enable(Host mode)/isochronous OUT transfer not complete interrupt enable(Device mode)"] pub struct PXNCIE_ISOONCIE_R(crate::FieldReader); impl PXNCIE_ISOONCIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PXNCIE_ISOONCIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PXNCIE_ISOONCIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PXNCIE_ISOONCIE` writer - periodic transfer not compelete Interrupt enable(Host mode)/isochronous OUT transfer not complete interrupt enable(Device mode)"] pub struct PXNCIE_ISOONCIE_W<'a> { w: &'a mut W, } impl<'a> PXNCIE_ISOONCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `HPIE` reader - Host port interrupt enable"] pub struct HPIE_R(crate::FieldReader); impl HPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HCIE` reader - Host channels interrupt enable"] pub struct HCIE_R(crate::FieldReader); impl HCIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { HCIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HCIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HCIE` writer - Host channels interrupt enable"] pub struct HCIE_W<'a> { w: &'a mut W, } impl<'a> HCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 25)) | ((value as u32 & 0x01) << 25); self.w } } #[doc = "Field `PTXFEIE` reader - Periodic TxFIFO empty interrupt enable"] pub struct PTXFEIE_R(crate::FieldReader); impl PTXFEIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PTXFEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PTXFEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PTXFEIE` writer - Periodic TxFIFO empty interrupt enable"] pub struct PTXFEIE_W<'a> { w: &'a mut W, } impl<'a> PTXFEIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `IDPSCIE` reader - ID pin status change interrupt enable"] pub struct IDPSCIE_R(crate::FieldReader); impl IDPSCIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IDPSCIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IDPSCIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IDPSCIE` writer - ID pin status change interrupt enable"] pub struct IDPSCIE_W<'a> { w: &'a mut W, } impl<'a> IDPSCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `DISCIE` reader - Disconnect interrupt enable"] pub struct DISCIE_R(crate::FieldReader); impl DISCIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DISCIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DISCIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DISCIE` writer - Disconnect interrupt enable"] pub struct DISCIE_W<'a> { w: &'a mut W, } impl<'a> DISCIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `SESIE` reader - Session interrupt enable"] pub struct SESIE_R(crate::FieldReader); impl SESIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SESIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SESIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SESIE` writer - Session interrupt enable"] pub struct SESIE_W<'a> { w: &'a mut W, } impl<'a> SESIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `WKUPIE` reader - Wakeup interrupt enable"] pub struct WKUPIE_R(crate::FieldReader); impl WKUPIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WKUPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WKUPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WKUPIE` writer - Wakeup interrupt enable"] pub struct WKUPIE_W<'a> { w: &'a mut W, } impl<'a> WKUPIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bit 1 - Mode fault interrupt enable"] #[inline(always)] pub fn mfie(&self) -> MFIE_R { MFIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - OTG interrupt enable"] #[inline(always)] pub fn otgie(&self) -> OTGIE_R { OTGIE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Start of frame interrupt enable"] #[inline(always)] pub fn sofie(&self) -> SOFIE_R { SOFIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Receive FIFO non-empty interrupt enable"] #[inline(always)] pub fn rxfneie(&self) -> RXFNEIE_R { RXFNEIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Non-periodic TxFIFO empty interrupt enable"] #[inline(always)] pub fn nptxfeie(&self) -> NPTXFEIE_R { NPTXFEIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6 - Global non-periodic IN NAK effective interrupt enable"] #[inline(always)] pub fn gnpinakie(&self) -> GNPINAKIE_R { GNPINAKIE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Global OUT NAK effective interrupt enable"] #[inline(always)] pub fn gonakie(&self) -> GONAKIE_R { GONAKIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 10 - Early suspend interrupt enable"] #[inline(always)] pub fn espie(&self) -> ESPIE_R { ESPIE_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - USB suspend interrupt enable"] #[inline(always)] pub fn spie(&self) -> SPIE_R { SPIE_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - USB reset interrupt enable"] #[inline(always)] pub fn rstie(&self) -> RSTIE_R { RSTIE_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Enumeration finish interrupt enable"] #[inline(always)] pub fn enumfie(&self) -> ENUMFIE_R { ENUMFIE_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14 - Isochronous OUT packet dropped interrupt enable"] #[inline(always)] pub fn isoopdie(&self) -> ISOOPDIE_R { ISOOPDIE_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15 - End of periodic frame interrupt enable"] #[inline(always)] pub fn eopfie(&self) -> EOPFIE_R { EOPFIE_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 18 - IN endpoints interrupt enable"] #[inline(always)] pub fn iepie(&self) -> IEPIE_R { IEPIE_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - OUT endpoints interrupt enable"] #[inline(always)] pub fn oepie(&self) -> OEPIE_R { OEPIE_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - isochronous IN transfer not complete interrupt enable"] #[inline(always)] pub fn isoincie(&self) -> ISOINCIE_R { ISOINCIE_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21 - periodic transfer not compelete Interrupt enable(Host mode)/isochronous OUT transfer not complete interrupt enable(Device mode)"] #[inline(always)] pub fn pxncie_isooncie(&self) -> PXNCIE_ISOONCIE_R { PXNCIE_ISOONCIE_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 24 - Host port interrupt enable"] #[inline(always)] pub fn hpie(&self) -> HPIE_R { HPIE_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25 - Host channels interrupt enable"] #[inline(always)] pub fn hcie(&self) -> HCIE_R { HCIE_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26 - Periodic TxFIFO empty interrupt enable"] #[inline(always)] pub fn ptxfeie(&self) -> PTXFEIE_R { PTXFEIE_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 28 - ID pin status change interrupt enable"] #[inline(always)] pub fn idpscie(&self) -> IDPSCIE_R { IDPSCIE_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29 - Disconnect interrupt enable"] #[inline(always)] pub fn discie(&self) -> DISCIE_R { DISCIE_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Session interrupt enable"] #[inline(always)] pub fn sesie(&self) -> SESIE_R { SESIE_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Wakeup interrupt enable"] #[inline(always)] pub fn wkupie(&self) -> WKUPIE_R { WKUPIE_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bit 1 - Mode fault interrupt enable"] #[inline(always)] pub fn mfie(&mut self) -> MFIE_W { MFIE_W { w: self } } #[doc = "Bit 2 - OTG interrupt enable"] #[inline(always)] pub fn otgie(&mut self) -> OTGIE_W { OTGIE_W { w: self } } #[doc = "Bit 3 - Start of frame interrupt enable"] #[inline(always)] pub fn sofie(&mut self) -> SOFIE_W { SOFIE_W { w: self } } #[doc = "Bit 4 - Receive FIFO non-empty interrupt enable"] #[inline(always)] pub fn rxfneie(&mut self) -> RXFNEIE_W { RXFNEIE_W { w: self } } #[doc = "Bit 5 - Non-periodic TxFIFO empty interrupt enable"] #[inline(always)] pub fn nptxfeie(&mut self) -> NPTXFEIE_W { NPTXFEIE_W { w: self } } #[doc = "Bit 6 - Global non-periodic IN NAK effective interrupt enable"] #[inline(always)] pub fn gnpinakie(&mut self) -> GNPINAKIE_W { GNPINAKIE_W { w: self } } #[doc = "Bit 7 - Global OUT NAK effective interrupt enable"] #[inline(always)] pub fn gonakie(&mut self) -> GONAKIE_W { GONAKIE_W { w: self } } #[doc = "Bit 10 - Early suspend interrupt enable"] #[inline(always)] pub fn espie(&mut self) -> ESPIE_W { ESPIE_W { w: self } } #[doc = "Bit 11 - USB suspend interrupt enable"] #[inline(always)] pub fn spie(&mut self) -> SPIE_W { SPIE_W { w: self } } #[doc = "Bit 12 - USB reset interrupt enable"] #[inline(always)] pub fn rstie(&mut self) -> RSTIE_W { RSTIE_W { w: self } } #[doc = "Bit 13 - Enumeration finish interrupt enable"] #[inline(always)] pub fn enumfie(&mut self) -> ENUMFIE_W { ENUMFIE_W { w: self } } #[doc = "Bit 14 - Isochronous OUT packet dropped interrupt enable"] #[inline(always)] pub fn isoopdie(&mut self) -> ISOOPDIE_W { ISOOPDIE_W { w: self } } #[doc = "Bit 15 - End of periodic frame interrupt enable"] #[inline(always)] pub fn eopfie(&mut self) -> EOPFIE_W { EOPFIE_W { w: self } } #[doc = "Bit 18 - IN endpoints interrupt enable"] #[inline(always)] pub fn iepie(&mut self) -> IEPIE_W { IEPIE_W { w: self } } #[doc = "Bit 19 - OUT endpoints interrupt enable"] #[inline(always)] pub fn oepie(&mut self) -> OEPIE_W { OEPIE_W { w: self } } #[doc = "Bit 20 - isochronous IN transfer not complete interrupt enable"] #[inline(always)] pub fn isoincie(&mut self) -> ISOINCIE_W { ISOINCIE_W { w: self } } #[doc = "Bit 21 - periodic transfer not compelete Interrupt enable(Host mode)/isochronous OUT transfer not complete interrupt enable(Device mode)"] #[inline(always)] pub fn pxncie_isooncie(&mut self) -> PXNCIE_ISOONCIE_W { PXNCIE_ISOONCIE_W { w: self } } #[doc = "Bit 25 - Host channels interrupt enable"] #[inline(always)] pub fn hcie(&mut self) -> HCIE_W { HCIE_W { w: self } } #[doc = "Bit 26 - Periodic TxFIFO empty interrupt enable"] #[inline(always)] pub fn ptxfeie(&mut self) -> PTXFEIE_W { PTXFEIE_W { w: self } } #[doc = "Bit 28 - ID pin status change interrupt enable"] #[inline(always)] pub fn idpscie(&mut self) -> IDPSCIE_W { IDPSCIE_W { w: self } } #[doc = "Bit 29 - Disconnect interrupt enable"] #[inline(always)] pub fn discie(&mut self) -> DISCIE_W { DISCIE_W { w: self } } #[doc = "Bit 30 - Session interrupt enable"] #[inline(always)] pub fn sesie(&mut self) -> SESIE_W { SESIE_W { w: self } } #[doc = "Bit 31 - Wakeup interrupt enable"] #[inline(always)] pub fn wkupie(&mut self) -> WKUPIE_W { WKUPIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Global interrupt enable register (USBFS_GINTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ginten](index.html) module"] pub struct GINTEN_SPEC; impl crate::RegisterSpec for GINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ginten::R](R) reader structure"] impl crate::Readable for GINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ginten::W](W) writer structure"] impl crate::Writable for GINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets GINTEN to value 0"] impl crate::Resettable for GINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "GRSTATR_Device register accessor: an alias for `Reg`"] pub type GRSTATR_DEVICE = crate::Reg; #[doc = "Global Receive status read(Device mode)"] pub mod grstatr_device { #[doc = "Register `GRSTATR_Device` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `EPNUM` reader - Endpoint number"] pub struct EPNUM_R(crate::FieldReader); impl EPNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BCOUNT` reader - Byte count"] pub struct BCOUNT_R(crate::FieldReader); impl BCOUNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { BCOUNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BCOUNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RPCKST` reader - Recieve packet status"] pub struct RPCKST_R(crate::FieldReader); impl RPCKST_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RPCKST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RPCKST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:3 - Endpoint number"] #[inline(always)] pub fn epnum(&self) -> EPNUM_R { EPNUM_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:14 - Byte count"] #[inline(always)] pub fn bcount(&self) -> BCOUNT_R { BCOUNT_R::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bits 15:16 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 15) & 0x03) as u8) } #[doc = "Bits 17:20 - Recieve packet status"] #[inline(always)] pub fn rpckst(&self) -> RPCKST_R { RPCKST_R::new(((self.bits >> 17) & 0x0f) as u8) } } #[doc = "Global Receive status read(Device mode)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grstatr_device](index.html) module"] pub struct GRSTATR_DEVICE_SPEC; impl crate::RegisterSpec for GRSTATR_DEVICE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [grstatr_device::R](R) reader structure"] impl crate::Readable for GRSTATR_DEVICE_SPEC { type Reader = R; } #[doc = "`reset()` method sets GRSTATR_Device to value 0"] impl crate::Resettable for GRSTATR_DEVICE_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "GRSTATR_Host register accessor: an alias for `Reg`"] pub type GRSTATR_HOST = crate::Reg; #[doc = "Global Receive status read(Host mode)"] pub mod grstatr_host { #[doc = "Register `GRSTATR_Host` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `CNUM` reader - Channel number"] pub struct CNUM_R(crate::FieldReader); impl CNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BCOUNT` reader - Byte count"] pub struct BCOUNT_R(crate::FieldReader); impl BCOUNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { BCOUNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BCOUNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RPCKST` reader - Reivece packet status"] pub struct RPCKST_R(crate::FieldReader); impl RPCKST_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RPCKST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RPCKST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:3 - Channel number"] #[inline(always)] pub fn cnum(&self) -> CNUM_R { CNUM_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:14 - Byte count"] #[inline(always)] pub fn bcount(&self) -> BCOUNT_R { BCOUNT_R::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bits 15:16 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 15) & 0x03) as u8) } #[doc = "Bits 17:20 - Reivece packet status"] #[inline(always)] pub fn rpckst(&self) -> RPCKST_R { RPCKST_R::new(((self.bits >> 17) & 0x0f) as u8) } } #[doc = "Global Receive status read(Host mode)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grstatr_host](index.html) module"] pub struct GRSTATR_HOST_SPEC; impl crate::RegisterSpec for GRSTATR_HOST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [grstatr_host::R](R) reader structure"] impl crate::Readable for GRSTATR_HOST_SPEC { type Reader = R; } #[doc = "`reset()` method sets GRSTATR_Host to value 0"] impl crate::Resettable for GRSTATR_HOST_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "GRSTATP_Device register accessor: an alias for `Reg`"] pub type GRSTATP_DEVICE = crate::Reg; #[doc = "Global Receive status pop(Device mode)"] pub mod grstatp_device { #[doc = "Register `GRSTATP_Device` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `EPNUM` reader - Endpoint number"] pub struct EPNUM_R(crate::FieldReader); impl EPNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BCOUNT` reader - Byte count"] pub struct BCOUNT_R(crate::FieldReader); impl BCOUNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { BCOUNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BCOUNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RPCKST` reader - Recieve packet status"] pub struct RPCKST_R(crate::FieldReader); impl RPCKST_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RPCKST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RPCKST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:3 - Endpoint number"] #[inline(always)] pub fn epnum(&self) -> EPNUM_R { EPNUM_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:14 - Byte count"] #[inline(always)] pub fn bcount(&self) -> BCOUNT_R { BCOUNT_R::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bits 15:16 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 15) & 0x03) as u8) } #[doc = "Bits 17:20 - Recieve packet status"] #[inline(always)] pub fn rpckst(&self) -> RPCKST_R { RPCKST_R::new(((self.bits >> 17) & 0x0f) as u8) } } #[doc = "Global Receive status pop(Device mode)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grstatp_device](index.html) module"] pub struct GRSTATP_DEVICE_SPEC; impl crate::RegisterSpec for GRSTATP_DEVICE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [grstatp_device::R](R) reader structure"] impl crate::Readable for GRSTATP_DEVICE_SPEC { type Reader = R; } #[doc = "`reset()` method sets GRSTATP_Device to value 0"] impl crate::Resettable for GRSTATP_DEVICE_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "GRSTATP_Host register accessor: an alias for `Reg`"] pub type GRSTATP_HOST = crate::Reg; #[doc = "Global Receive status pop(Host mode)"] pub mod grstatp_host { #[doc = "Register `GRSTATP_Host` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `CNUM` reader - Channel number"] pub struct CNUM_R(crate::FieldReader); impl CNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BCOUNT` reader - Byte count"] pub struct BCOUNT_R(crate::FieldReader); impl BCOUNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { BCOUNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BCOUNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RPCKST` reader - Reivece packet status"] pub struct RPCKST_R(crate::FieldReader); impl RPCKST_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { RPCKST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RPCKST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:3 - Channel number"] #[inline(always)] pub fn cnum(&self) -> CNUM_R { CNUM_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 4:14 - Byte count"] #[inline(always)] pub fn bcount(&self) -> BCOUNT_R { BCOUNT_R::new(((self.bits >> 4) & 0x07ff) as u16) } #[doc = "Bits 15:16 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 15) & 0x03) as u8) } #[doc = "Bits 17:20 - Reivece packet status"] #[inline(always)] pub fn rpckst(&self) -> RPCKST_R { RPCKST_R::new(((self.bits >> 17) & 0x0f) as u8) } } #[doc = "Global Receive status pop(Host mode)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grstatp_host](index.html) module"] pub struct GRSTATP_HOST_SPEC; impl crate::RegisterSpec for GRSTATP_HOST_SPEC { type Ux = u32; } #[doc = "`read()` method returns [grstatp_host::R](R) reader structure"] impl crate::Readable for GRSTATP_HOST_SPEC { type Reader = R; } #[doc = "`reset()` method sets GRSTATP_Host to value 0"] impl crate::Resettable for GRSTATP_HOST_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "GRFLEN register accessor: an alias for `Reg`"] pub type GRFLEN = crate::Reg; #[doc = "Global Receive FIFO size register (USBFS_GRFLEN)"] pub mod grflen { #[doc = "Register `GRFLEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GRFLEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RXFD` reader - Rx FIFO depth"] pub struct RXFD_R(crate::FieldReader); impl RXFD_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { RXFD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RXFD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RXFD` writer - Rx FIFO depth"] pub struct RXFD_W<'a> { w: &'a mut W, } impl<'a> RXFD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Rx FIFO depth"] #[inline(always)] pub fn rxfd(&self) -> RXFD_R { RXFD_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Rx FIFO depth"] #[inline(always)] pub fn rxfd(&mut self) -> RXFD_W { RXFD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Global Receive FIFO size register (USBFS_GRFLEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [grflen](index.html) module"] pub struct GRFLEN_SPEC; impl crate::RegisterSpec for GRFLEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [grflen::R](R) reader structure"] impl crate::Readable for GRFLEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [grflen::W](W) writer structure"] impl crate::Writable for GRFLEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets GRFLEN to value 0x0200"] impl crate::Resettable for GRFLEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200 } } } #[doc = "HNPTFLEN register accessor: an alias for `Reg`"] pub type HNPTFLEN = crate::Reg; #[doc = "Host non-periodic transmit FIFO length register (Host mode)"] pub mod hnptflen { #[doc = "Register `HNPTFLEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HNPTFLEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `HNPTXRSAR` reader - host non-periodic transmit Tx RAM start address"] pub struct HNPTXRSAR_R(crate::FieldReader); impl HNPTXRSAR_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { HNPTXRSAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HNPTXRSAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HNPTXRSAR` writer - host non-periodic transmit Tx RAM start address"] pub struct HNPTXRSAR_W<'a> { w: &'a mut W, } impl<'a> HNPTXRSAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } #[doc = "Field `HNPTXFD` reader - host non-periodic TxFIFO depth"] pub struct HNPTXFD_R(crate::FieldReader); impl HNPTXFD_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { HNPTXFD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HNPTXFD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HNPTXFD` writer - host non-periodic TxFIFO depth"] pub struct HNPTXFD_W<'a> { w: &'a mut W, } impl<'a> HNPTXFD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16); self.w } } impl R { #[doc = "Bits 0:15 - host non-periodic transmit Tx RAM start address"] #[inline(always)] pub fn hnptxrsar(&self) -> HNPTXRSAR_R { HNPTXRSAR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - host non-periodic TxFIFO depth"] #[inline(always)] pub fn hnptxfd(&self) -> HNPTXFD_R { HNPTXFD_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - host non-periodic transmit Tx RAM start address"] #[inline(always)] pub fn hnptxrsar(&mut self) -> HNPTXRSAR_W { HNPTXRSAR_W { w: self } } #[doc = "Bits 16:31 - host non-periodic TxFIFO depth"] #[inline(always)] pub fn hnptxfd(&mut self) -> HNPTXFD_W { HNPTXFD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Host non-periodic transmit FIFO length register (Host mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hnptflen](index.html) module"] pub struct HNPTFLEN_SPEC; impl crate::RegisterSpec for HNPTFLEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hnptflen::R](R) reader structure"] impl crate::Readable for HNPTFLEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hnptflen::W](W) writer structure"] impl crate::Writable for HNPTFLEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HNPTFLEN to value 0x0200_0200"] impl crate::Resettable for HNPTFLEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200_0200 } } } #[doc = "DIEP0TFLEN register accessor: an alias for `Reg`"] pub type DIEP0TFLEN = crate::Reg; #[doc = "Device IN endpoint 0 transmit FIFO length (Device mode)"] pub mod diep0tflen { #[doc = "Register `DIEP0TFLEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP0TFLEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IEP0TXFD` reader - in endpoint 0 Tx FIFO depth"] pub struct IEP0TXFD_R(crate::FieldReader); impl IEP0TXFD_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEP0TXFD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEP0TXFD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEP0TXFD` writer - in endpoint 0 Tx FIFO depth"] pub struct IEP0TXFD_W<'a> { w: &'a mut W, } impl<'a> IEP0TXFD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16); self.w } } #[doc = "Field `IEP0TXRSAR` reader - in endpoint 0 Tx RAM start address"] pub struct IEP0TXRSAR_R(crate::FieldReader); impl IEP0TXRSAR_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEP0TXRSAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEP0TXRSAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEP0TXRSAR` writer - in endpoint 0 Tx RAM start address"] pub struct IEP0TXRSAR_W<'a> { w: &'a mut W, } impl<'a> IEP0TXRSAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 16:31 - in endpoint 0 Tx FIFO depth"] #[inline(always)] pub fn iep0txfd(&self) -> IEP0TXFD_R { IEP0TXFD_R::new(((self.bits >> 16) & 0xffff) as u16) } #[doc = "Bits 0:15 - in endpoint 0 Tx RAM start address"] #[inline(always)] pub fn iep0txrsar(&self) -> IEP0TXRSAR_R { IEP0TXRSAR_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 16:31 - in endpoint 0 Tx FIFO depth"] #[inline(always)] pub fn iep0txfd(&mut self) -> IEP0TXFD_W { IEP0TXFD_W { w: self } } #[doc = "Bits 0:15 - in endpoint 0 Tx RAM start address"] #[inline(always)] pub fn iep0txrsar(&mut self) -> IEP0TXRSAR_W { IEP0TXRSAR_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Device IN endpoint 0 transmit FIFO length (Device mode)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep0tflen](index.html) module"] pub struct DIEP0TFLEN_SPEC; impl crate::RegisterSpec for DIEP0TFLEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep0tflen::R](R) reader structure"] impl crate::Readable for DIEP0TFLEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep0tflen::W](W) writer structure"] impl crate::Writable for DIEP0TFLEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP0TFLEN to value 0x0200_0200"] impl crate::Resettable for DIEP0TFLEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200_0200 } } } #[doc = "HNPTFQSTAT register accessor: an alias for `Reg`"] pub type HNPTFQSTAT = crate::Reg; #[doc = "Host non-periodic transmit FIFO/queue status register (HNPTFQSTAT)"] pub mod hnptfqstat { #[doc = "Register `HNPTFQSTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `NPTXFS` reader - Non-periodic TxFIFO space"] pub struct NPTXFS_R(crate::FieldReader); impl NPTXFS_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { NPTXFS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NPTXFS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NPTXRQS` reader - Non-periodic transmit request queue space"] pub struct NPTXRQS_R(crate::FieldReader); impl NPTXRQS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { NPTXRQS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NPTXRQS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NPTXRQTOP` reader - Top of the non-periodic transmit request queue"] pub struct NPTXRQTOP_R(crate::FieldReader); impl NPTXRQTOP_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { NPTXRQTOP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NPTXRQTOP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Non-periodic TxFIFO space"] #[inline(always)] pub fn nptxfs(&self) -> NPTXFS_R { NPTXFS_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:23 - Non-periodic transmit request queue space"] #[inline(always)] pub fn nptxrqs(&self) -> NPTXRQS_R { NPTXRQS_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:30 - Top of the non-periodic transmit request queue"] #[inline(always)] pub fn nptxrqtop(&self) -> NPTXRQTOP_R { NPTXRQTOP_R::new(((self.bits >> 24) & 0x7f) as u8) } } #[doc = "Host non-periodic transmit FIFO/queue status register (HNPTFQSTAT)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hnptfqstat](index.html) module"] pub struct HNPTFQSTAT_SPEC; impl crate::RegisterSpec for HNPTFQSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hnptfqstat::R](R) reader structure"] impl crate::Readable for HNPTFQSTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets HNPTFQSTAT to value 0x0008_0200"] impl crate::Resettable for HNPTFQSTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0008_0200 } } } #[doc = "GCCFG register accessor: an alias for `Reg`"] pub type GCCFG = crate::Reg; #[doc = "Global core configuration register (USBFS_GCCFG)"] pub mod gccfg { #[doc = "Register `GCCFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `GCCFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PWRON` reader - Power on"] pub struct PWRON_R(crate::FieldReader); impl PWRON_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PWRON_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PWRON_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PWRON` writer - Power on"] pub struct PWRON_W<'a> { w: &'a mut W, } impl<'a> PWRON_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); self.w } } #[doc = "Field `VBUSACEN` reader - The VBUS A-device Comparer enable"] pub struct VBUSACEN_R(crate::FieldReader); impl VBUSACEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { VBUSACEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for VBUSACEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `VBUSACEN` writer - The VBUS A-device Comparer enable"] pub struct VBUSACEN_W<'a> { w: &'a mut W, } impl<'a> VBUSACEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 18)) | ((value as u32 & 0x01) << 18); self.w } } #[doc = "Field `VBUSBCEN` reader - The VBUS B-device Comparer enable"] pub struct VBUSBCEN_R(crate::FieldReader); impl VBUSBCEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { VBUSBCEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for VBUSBCEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `VBUSBCEN` writer - The VBUS B-device Comparer enable"] pub struct VBUSBCEN_W<'a> { w: &'a mut W, } impl<'a> VBUSBCEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `SOFOEN` reader - SOF output enable"] pub struct SOFOEN_R(crate::FieldReader); impl SOFOEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SOFOEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SOFOEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SOFOEN` writer - SOF output enable"] pub struct SOFOEN_W<'a> { w: &'a mut W, } impl<'a> SOFOEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `VBUSIG` reader - VBUS ignored"] pub struct VBUSIG_R(crate::FieldReader); impl VBUSIG_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { VBUSIG_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for VBUSIG_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `VBUSIG` writer - VBUS ignored"] pub struct VBUSIG_W<'a> { w: &'a mut W, } impl<'a> VBUSIG_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } impl R { #[doc = "Bit 16 - Power on"] #[inline(always)] pub fn pwron(&self) -> PWRON_R { PWRON_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 18 - The VBUS A-device Comparer enable"] #[inline(always)] pub fn vbusacen(&self) -> VBUSACEN_R { VBUSACEN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - The VBUS B-device Comparer enable"] #[inline(always)] pub fn vbusbcen(&self) -> VBUSBCEN_R { VBUSBCEN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - SOF output enable"] #[inline(always)] pub fn sofoen(&self) -> SOFOEN_R { SOFOEN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21 - VBUS ignored"] #[inline(always)] pub fn vbusig(&self) -> VBUSIG_R { VBUSIG_R::new(((self.bits >> 21) & 0x01) != 0) } } impl W { #[doc = "Bit 16 - Power on"] #[inline(always)] pub fn pwron(&mut self) -> PWRON_W { PWRON_W { w: self } } #[doc = "Bit 18 - The VBUS A-device Comparer enable"] #[inline(always)] pub fn vbusacen(&mut self) -> VBUSACEN_W { VBUSACEN_W { w: self } } #[doc = "Bit 19 - The VBUS B-device Comparer enable"] #[inline(always)] pub fn vbusbcen(&mut self) -> VBUSBCEN_W { VBUSBCEN_W { w: self } } #[doc = "Bit 20 - SOF output enable"] #[inline(always)] pub fn sofoen(&mut self) -> SOFOEN_W { SOFOEN_W { w: self } } #[doc = "Bit 21 - VBUS ignored"] #[inline(always)] pub fn vbusig(&mut self) -> VBUSIG_W { VBUSIG_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Global core configuration register (USBFS_GCCFG)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gccfg](index.html) module"] pub struct GCCFG_SPEC; impl crate::RegisterSpec for GCCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [gccfg::R](R) reader structure"] impl crate::Readable for GCCFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [gccfg::W](W) writer structure"] impl crate::Writable for GCCFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets GCCFG to value 0"] impl crate::Resettable for GCCFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "CID register accessor: an alias for `Reg`"] pub type CID = crate::Reg; #[doc = "core ID register"] pub mod cid { #[doc = "Register `CID` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CID` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CID` reader - Core ID"] pub struct CID_R(crate::FieldReader); impl CID_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { CID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CID` writer - Core ID"] pub struct CID_W<'a> { w: &'a mut W, } impl<'a> CID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = value; self.w } } impl R { #[doc = "Bits 0:31 - Core ID"] #[inline(always)] pub fn cid(&self) -> CID_R { CID_R::new(self.bits) } } impl W { #[doc = "Bits 0:31 - Core ID"] #[inline(always)] pub fn cid(&mut self) -> CID_W { CID_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "core ID register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cid](index.html) module"] pub struct CID_SPEC; impl crate::RegisterSpec for CID_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cid::R](R) reader structure"] impl crate::Readable for CID_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cid::W](W) writer structure"] impl crate::Writable for CID_SPEC { type Writer = W; } #[doc = "`reset()` method sets CID to value 0x1000"] impl crate::Resettable for CID_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x1000 } } } #[doc = "HPTFLEN register accessor: an alias for `Reg`"] pub type HPTFLEN = crate::Reg; #[doc = "Host periodic transmit FIFO length register (HPTFLEN)"] pub mod hptflen { #[doc = "Register `HPTFLEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HPTFLEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `HPTXFSAR` reader - Host periodic TxFIFO start address"] pub struct HPTXFSAR_R(crate::FieldReader); impl HPTXFSAR_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { HPTXFSAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HPTXFSAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HPTXFSAR` writer - Host periodic TxFIFO start address"] pub struct HPTXFSAR_W<'a> { w: &'a mut W, } impl<'a> HPTXFSAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } #[doc = "Field `HPTXFD` reader - Host periodic TxFIFO depth"] pub struct HPTXFD_R(crate::FieldReader); impl HPTXFD_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { HPTXFD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HPTXFD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `HPTXFD` writer - Host periodic TxFIFO depth"] pub struct HPTXFD_W<'a> { w: &'a mut W, } impl<'a> HPTXFD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16); self.w } } impl R { #[doc = "Bits 0:15 - Host periodic TxFIFO start address"] #[inline(always)] pub fn hptxfsar(&self) -> HPTXFSAR_R { HPTXFSAR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - Host periodic TxFIFO depth"] #[inline(always)] pub fn hptxfd(&self) -> HPTXFD_R { HPTXFD_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Host periodic TxFIFO start address"] #[inline(always)] pub fn hptxfsar(&mut self) -> HPTXFSAR_W { HPTXFSAR_W { w: self } } #[doc = "Bits 16:31 - Host periodic TxFIFO depth"] #[inline(always)] pub fn hptxfd(&mut self) -> HPTXFD_W { HPTXFD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Host periodic transmit FIFO length register (HPTFLEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hptflen](index.html) module"] pub struct HPTFLEN_SPEC; impl crate::RegisterSpec for HPTFLEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hptflen::R](R) reader structure"] impl crate::Readable for HPTFLEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hptflen::W](W) writer structure"] impl crate::Writable for HPTFLEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HPTFLEN to value 0x0200_0600"] impl crate::Resettable for HPTFLEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200_0600 } } } #[doc = "DIEP1TFLEN register accessor: an alias for `Reg`"] pub type DIEP1TFLEN = crate::Reg; #[doc = "device IN endpoint transmit FIFO size register (DIEP1TFLEN)"] pub mod diep1tflen { #[doc = "Register `DIEP1TFLEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP1TFLEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IEPTXRSAR` reader - IN endpoint FIFO transmit RAM start address"] pub struct IEPTXRSAR_R(crate::FieldReader); impl IEPTXRSAR_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEPTXRSAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTXRSAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPTXRSAR` writer - IN endpoint FIFO transmit RAM start address"] pub struct IEPTXRSAR_W<'a> { w: &'a mut W, } impl<'a> IEPTXRSAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } #[doc = "Field `IEPTXFD` reader - IN endpoint TxFIFO depth"] pub struct IEPTXFD_R(crate::FieldReader); impl IEPTXFD_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEPTXFD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTXFD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPTXFD` writer - IN endpoint TxFIFO depth"] pub struct IEPTXFD_W<'a> { w: &'a mut W, } impl<'a> IEPTXFD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16); self.w } } impl R { #[doc = "Bits 0:15 - IN endpoint FIFO transmit RAM start address"] #[inline(always)] pub fn ieptxrsar(&self) -> IEPTXRSAR_R { IEPTXRSAR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] pub fn ieptxfd(&self) -> IEPTXFD_R { IEPTXFD_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFO transmit RAM start address"] #[inline(always)] pub fn ieptxrsar(&mut self) -> IEPTXRSAR_W { IEPTXRSAR_W { w: self } } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] pub fn ieptxfd(&mut self) -> IEPTXFD_W { IEPTXFD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device IN endpoint transmit FIFO size register (DIEP1TFLEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep1tflen](index.html) module"] pub struct DIEP1TFLEN_SPEC; impl crate::RegisterSpec for DIEP1TFLEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep1tflen::R](R) reader structure"] impl crate::Readable for DIEP1TFLEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep1tflen::W](W) writer structure"] impl crate::Writable for DIEP1TFLEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP1TFLEN to value 0x0200_0400"] impl crate::Resettable for DIEP1TFLEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200_0400 } } } #[doc = "DIEP2TFLEN register accessor: an alias for `Reg`"] pub type DIEP2TFLEN = crate::Reg; #[doc = "device IN endpoint transmit FIFO size register (DIEP2TFLEN)"] pub mod diep2tflen { #[doc = "Register `DIEP2TFLEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP2TFLEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IEPTXRSAR` reader - IN endpoint FIFO transmit RAM start address"] pub struct IEPTXRSAR_R(crate::FieldReader); impl IEPTXRSAR_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEPTXRSAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTXRSAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPTXRSAR` writer - IN endpoint FIFO transmit RAM start address"] pub struct IEPTXRSAR_W<'a> { w: &'a mut W, } impl<'a> IEPTXRSAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } #[doc = "Field `IEPTXFD` reader - IN endpoint TxFIFO depth"] pub struct IEPTXFD_R(crate::FieldReader); impl IEPTXFD_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEPTXFD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTXFD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPTXFD` writer - IN endpoint TxFIFO depth"] pub struct IEPTXFD_W<'a> { w: &'a mut W, } impl<'a> IEPTXFD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16); self.w } } impl R { #[doc = "Bits 0:15 - IN endpoint FIFO transmit RAM start address"] #[inline(always)] pub fn ieptxrsar(&self) -> IEPTXRSAR_R { IEPTXRSAR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] pub fn ieptxfd(&self) -> IEPTXFD_R { IEPTXFD_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFO transmit RAM start address"] #[inline(always)] pub fn ieptxrsar(&mut self) -> IEPTXRSAR_W { IEPTXRSAR_W { w: self } } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] pub fn ieptxfd(&mut self) -> IEPTXFD_W { IEPTXFD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device IN endpoint transmit FIFO size register (DIEP2TFLEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep2tflen](index.html) module"] pub struct DIEP2TFLEN_SPEC; impl crate::RegisterSpec for DIEP2TFLEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep2tflen::R](R) reader structure"] impl crate::Readable for DIEP2TFLEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep2tflen::W](W) writer structure"] impl crate::Writable for DIEP2TFLEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP2TFLEN to value 0x0200_0400"] impl crate::Resettable for DIEP2TFLEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200_0400 } } } #[doc = "DIEP3TFLEN register accessor: an alias for `Reg`"] pub type DIEP3TFLEN = crate::Reg; #[doc = "device IN endpoint transmit FIFO size register (FS_DIEP3TXFLEN)"] pub mod diep3tflen { #[doc = "Register `DIEP3TFLEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP3TFLEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IEPTXRSAR` reader - IN endpoint FIFO4 transmit RAM start address"] pub struct IEPTXRSAR_R(crate::FieldReader); impl IEPTXRSAR_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEPTXRSAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTXRSAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPTXRSAR` writer - IN endpoint FIFO4 transmit RAM start address"] pub struct IEPTXRSAR_W<'a> { w: &'a mut W, } impl<'a> IEPTXRSAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } #[doc = "Field `IEPTXFD` reader - IN endpoint TxFIFO depth"] pub struct IEPTXFD_R(crate::FieldReader); impl IEPTXFD_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEPTXFD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTXFD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPTXFD` writer - IN endpoint TxFIFO depth"] pub struct IEPTXFD_W<'a> { w: &'a mut W, } impl<'a> IEPTXFD_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0xffff << 16)) | ((value as u32 & 0xffff) << 16); self.w } } impl R { #[doc = "Bits 0:15 - IN endpoint FIFO4 transmit RAM start address"] #[inline(always)] pub fn ieptxrsar(&self) -> IEPTXRSAR_R { IEPTXRSAR_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] pub fn ieptxfd(&self) -> IEPTXFD_R { IEPTXFD_R::new(((self.bits >> 16) & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - IN endpoint FIFO4 transmit RAM start address"] #[inline(always)] pub fn ieptxrsar(&mut self) -> IEPTXRSAR_W { IEPTXRSAR_W { w: self } } #[doc = "Bits 16:31 - IN endpoint TxFIFO depth"] #[inline(always)] pub fn ieptxfd(&mut self) -> IEPTXFD_W { IEPTXFD_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device IN endpoint transmit FIFO size register (FS_DIEP3TXFLEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep3tflen](index.html) module"] pub struct DIEP3TFLEN_SPEC; impl crate::RegisterSpec for DIEP3TFLEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep3tflen::R](R) reader structure"] impl crate::Readable for DIEP3TFLEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep3tflen::W](W) writer structure"] impl crate::Writable for DIEP3TFLEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP3TFLEN to value 0x0200_0400"] impl crate::Resettable for DIEP3TFLEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200_0400 } } } } #[doc = "USB on the go full speed host"] pub struct USBFS_HOST { _marker: PhantomData<*const ()>, } unsafe impl Send for USBFS_HOST {} impl USBFS_HOST { #[doc = r"Pointer to the register block"] pub const PTR: *const usbfs_host::RegisterBlock = 0x5000_0400 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const usbfs_host::RegisterBlock { Self::PTR } } impl Deref for USBFS_HOST { type Target = usbfs_host::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for USBFS_HOST { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("USBFS_HOST").finish() } } #[doc = "USB on the go full speed host"] pub mod usbfs_host { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - host configuration register (HCTL)"] pub hctl: crate::Reg, #[doc = "0x04 - Host frame interval register"] pub hft: crate::Reg, #[doc = "0x08 - OTG_FS host frame number/frame time remaining register (HFINFR)"] pub hfinfr: crate::Reg, _reserved3: [u8; 0x04], #[doc = "0x10 - Host periodic transmit FIFO/queue status register (HPTFQSTAT)"] pub hptfqstat: crate::Reg, #[doc = "0x14 - Host all channels interrupt register"] pub hachint: crate::Reg, #[doc = "0x18 - host all channels interrupt mask register"] pub hachinten: crate::Reg, _reserved6: [u8; 0x24], #[doc = "0x40 - Host port control and status register (USBFS_HPCS)"] pub hpcs: crate::Reg, _reserved7: [u8; 0xbc], #[doc = "0x100 - host channel-0 characteristics register (HCH0CTL)"] pub hch0ctl: crate::Reg, _reserved8: [u8; 0x04], #[doc = "0x108 - host channel-0 interrupt register (USBFS_HCHxINTF)"] pub hch0intf: crate::Reg, #[doc = "0x10c - host channel-0 interrupt enable register (HCH0INTEN)"] pub hch0inten: crate::Reg, #[doc = "0x110 - host channel-0 transfer length register"] pub hch0len: crate::Reg, _reserved11: [u8; 0x0c], #[doc = "0x120 - host channel-1 characteristics register (HCH1CTL)"] pub hch1ctl: crate::Reg, _reserved12: [u8; 0x04], #[doc = "0x128 - host channel-1 interrupt register (HCH1INTF)"] pub hch1intf: crate::Reg, #[doc = "0x12c - host channel-1 interrupt enable register (HCH1INTEN)"] pub hch1inten: crate::Reg, #[doc = "0x130 - host channel-1 transfer length register"] pub hch1len: crate::Reg, _reserved15: [u8; 0x0c], #[doc = "0x140 - host channel-2 characteristics register (HCH2CTL)"] pub hch2ctl: crate::Reg, _reserved16: [u8; 0x04], #[doc = "0x148 - host channel-2 interrupt register (HCH2INTF)"] pub hch2intf: crate::Reg, #[doc = "0x14c - host channel-2 interrupt enable register (HCH2INTEN)"] pub hch2inten: crate::Reg, #[doc = "0x150 - host channel-2 transfer length register"] pub hch2len: crate::Reg, _reserved19: [u8; 0x0c], #[doc = "0x160 - host channel-3 characteristics register (HCH3CTL)"] pub hch3ctl: crate::Reg, _reserved20: [u8; 0x04], #[doc = "0x168 - host channel-3 interrupt register (HCH3INTF)"] pub hch3intf: crate::Reg, #[doc = "0x16c - host channel-3 interrupt enable register (HCH3INTEN)"] pub hch3inten: crate::Reg, #[doc = "0x170 - host channel-3 transfer length register"] pub hch3len: crate::Reg, _reserved23: [u8; 0x0c], #[doc = "0x180 - host channel-4 characteristics register (HCH4CTL)"] pub hch4ctl: crate::Reg, _reserved24: [u8; 0x04], #[doc = "0x188 - host channel-4 interrupt register (HCH4INTF)"] pub hch4intf: crate::Reg, #[doc = "0x18c - host channel-4 interrupt enable register (HCH4INTEN)"] pub hch4inten: crate::Reg, #[doc = "0x190 - host channel-4 transfer length register"] pub hch4len: crate::Reg, _reserved27: [u8; 0x0c], #[doc = "0x1a0 - host channel-5 characteristics register (HCH5CTL)"] pub hch5ctl: crate::Reg, _reserved28: [u8; 0x04], #[doc = "0x1a8 - host channel-5 interrupt register (HCH5INTF)"] pub hch5intf: crate::Reg, #[doc = "0x1ac - host channel-5 interrupt enable register (HCH5INTEN)"] pub hch5inten: crate::Reg, #[doc = "0x1b0 - host channel-5 transfer length register"] pub hch5len: crate::Reg, _reserved31: [u8; 0x0c], #[doc = "0x1c0 - host channel-6 characteristics register (HCH6CTL)"] pub hch6ctl: crate::Reg, _reserved32: [u8; 0x04], #[doc = "0x1c8 - host channel-6 interrupt register (HCH6INTF)"] pub hch6intf: crate::Reg, #[doc = "0x1cc - host channel-6 interrupt enable register (HCH6INTEN)"] pub hch6inten: crate::Reg, #[doc = "0x1d0 - host channel-6 transfer length register"] pub hch6len: crate::Reg, _reserved35: [u8; 0x0c], #[doc = "0x1e0 - host channel-7 characteristics register (HCH7CTL)"] pub hch7ctl: crate::Reg, _reserved36: [u8; 0x04], #[doc = "0x1e8 - host channel-7 interrupt register (HCH7INTF)"] pub hch7intf: crate::Reg, #[doc = "0x1ec - host channel-7 interrupt enable register (HCH7INTEN)"] pub hch7inten: crate::Reg, #[doc = "0x1f0 - host channel-7 transfer length register"] pub hch7len: crate::Reg, } #[doc = "HCTL register accessor: an alias for `Reg`"] pub type HCTL = crate::Reg; #[doc = "host configuration register (HCTL)"] pub mod hctl { #[doc = "Register `HCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CLKSEL` reader - clock select for USB clock"] pub struct CLKSEL_R(crate::FieldReader); impl CLKSEL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CLKSEL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CLKSEL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CLKSEL` writer - clock select for USB clock"] pub struct CLKSEL_W<'a> { w: &'a mut W, } impl<'a> CLKSEL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } impl R { #[doc = "Bits 0:1 - clock select for USB clock"] #[inline(always)] pub fn clksel(&self) -> CLKSEL_R { CLKSEL_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bits 0:1 - clock select for USB clock"] #[inline(always)] pub fn clksel(&mut self) -> CLKSEL_W { CLKSEL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host configuration register (HCTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hctl](index.html) module"] pub struct HCTL_SPEC; impl crate::RegisterSpec for HCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hctl::R](R) reader structure"] impl crate::Readable for HCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hctl::W](W) writer structure"] impl crate::Writable for HCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCTL to value 0"] impl crate::Resettable for HCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HFT register accessor: an alias for `Reg`"] pub type HFT = crate::Reg; #[doc = "Host frame interval register"] pub mod hft { #[doc = "Register `HFT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HFT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `FRI` reader - Frame interval"] pub struct FRI_R(crate::FieldReader); impl FRI_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { FRI_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FRI_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FRI` writer - Frame interval"] pub struct FRI_W<'a> { w: &'a mut W, } impl<'a> FRI_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Frame interval"] #[inline(always)] pub fn fri(&self) -> FRI_R { FRI_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Frame interval"] #[inline(always)] pub fn fri(&mut self) -> FRI_W { FRI_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Host frame interval register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hft](index.html) module"] pub struct HFT_SPEC; impl crate::RegisterSpec for HFT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hft::R](R) reader structure"] impl crate::Readable for HFT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hft::W](W) writer structure"] impl crate::Writable for HFT_SPEC { type Writer = W; } #[doc = "`reset()` method sets HFT to value 0xbb80"] impl crate::Resettable for HFT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0xbb80 } } } #[doc = "HFINFR register accessor: an alias for `Reg`"] pub type HFINFR = crate::Reg; #[doc = "OTG_FS host frame number/frame time remaining register (HFINFR)"] pub mod hfinfr { #[doc = "Register `HFINFR` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `FRNUM` reader - Frame number"] pub struct FRNUM_R(crate::FieldReader); impl FRNUM_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { FRNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FRNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FRT` reader - Frame remaining time"] pub struct FRT_R(crate::FieldReader); impl FRT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { FRT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FRT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Frame number"] #[inline(always)] pub fn frnum(&self) -> FRNUM_R { FRNUM_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:31 - Frame remaining time"] #[inline(always)] pub fn frt(&self) -> FRT_R { FRT_R::new(((self.bits >> 16) & 0xffff) as u16) } } #[doc = "OTG_FS host frame number/frame time remaining register (HFINFR)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfinfr](index.html) module"] pub struct HFINFR_SPEC; impl crate::RegisterSpec for HFINFR_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hfinfr::R](R) reader structure"] impl crate::Readable for HFINFR_SPEC { type Reader = R; } #[doc = "`reset()` method sets HFINFR to value 0xbb80_0000"] impl crate::Resettable for HFINFR_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0xbb80_0000 } } } #[doc = "HPTFQSTAT register accessor: an alias for `Reg`"] pub type HPTFQSTAT = crate::Reg; #[doc = "Host periodic transmit FIFO/queue status register (HPTFQSTAT)"] pub mod hptfqstat { #[doc = "Register `HPTFQSTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `PTXFS` reader - Periodic transmit data FIFO space available"] pub struct PTXFS_R(crate::FieldReader); impl PTXFS_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PTXFS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PTXFS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PTXREQS` reader - Periodic transmit request queue space available"] pub struct PTXREQS_R(crate::FieldReader); impl PTXREQS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PTXREQS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PTXREQS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PTXREQT` reader - Top of the periodic transmit request queue"] pub struct PTXREQT_R(crate::FieldReader); impl PTXREQT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PTXREQT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PTXREQT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - Periodic transmit data FIFO space available"] #[inline(always)] pub fn ptxfs(&self) -> PTXFS_R { PTXFS_R::new((self.bits & 0xffff) as u16) } #[doc = "Bits 16:23 - Periodic transmit request queue space available"] #[inline(always)] pub fn ptxreqs(&self) -> PTXREQS_R { PTXREQS_R::new(((self.bits >> 16) & 0xff) as u8) } #[doc = "Bits 24:31 - Top of the periodic transmit request queue"] #[inline(always)] pub fn ptxreqt(&self) -> PTXREQT_R { PTXREQT_R::new(((self.bits >> 24) & 0xff) as u8) } } #[doc = "Host periodic transmit FIFO/queue status register (HPTFQSTAT)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hptfqstat](index.html) module"] pub struct HPTFQSTAT_SPEC; impl crate::RegisterSpec for HPTFQSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hptfqstat::R](R) reader structure"] impl crate::Readable for HPTFQSTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets HPTFQSTAT to value 0x0008_0200"] impl crate::Resettable for HPTFQSTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0008_0200 } } } #[doc = "HACHINT register accessor: an alias for `Reg`"] pub type HACHINT = crate::Reg; #[doc = "Host all channels interrupt register"] pub mod hachint { #[doc = "Register `HACHINT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `HACHINT` reader - Host all channel interrupts"] pub struct HACHINT_R(crate::FieldReader); impl HACHINT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { HACHINT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for HACHINT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:7 - Host all channel interrupts"] #[inline(always)] pub fn hachint(&self) -> HACHINT_R { HACHINT_R::new((self.bits & 0xff) as u8) } } #[doc = "Host all channels interrupt register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hachint](index.html) module"] pub struct HACHINT_SPEC; impl crate::RegisterSpec for HACHINT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hachint::R](R) reader structure"] impl crate::Readable for HACHINT_SPEC { type Reader = R; } #[doc = "`reset()` method sets HACHINT to value 0"] impl crate::Resettable for HACHINT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HACHINTEN register accessor: an alias for `Reg`"] pub type HACHINTEN = crate::Reg; #[doc = "host all channels interrupt mask register"] pub mod hachinten { #[doc = "Register `HACHINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HACHINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `CINTEN` reader - Channel interrupt enable"] pub struct CINTEN_R(crate::FieldReader); impl CINTEN_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CINTEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CINTEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CINTEN` writer - Channel interrupt enable"] pub struct CINTEN_W<'a> { w: &'a mut W, } impl<'a> CINTEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0xff) | (value as u32 & 0xff); self.w } } impl R { #[doc = "Bits 0:7 - Channel interrupt enable"] #[inline(always)] pub fn cinten(&self) -> CINTEN_R { CINTEN_R::new((self.bits & 0xff) as u8) } } impl W { #[doc = "Bits 0:7 - Channel interrupt enable"] #[inline(always)] pub fn cinten(&mut self) -> CINTEN_W { CINTEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host all channels interrupt mask register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hachinten](index.html) module"] pub struct HACHINTEN_SPEC; impl crate::RegisterSpec for HACHINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hachinten::R](R) reader structure"] impl crate::Readable for HACHINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hachinten::W](W) writer structure"] impl crate::Writable for HACHINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HACHINTEN to value 0"] impl crate::Resettable for HACHINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HPCS register accessor: an alias for `Reg`"] pub type HPCS = crate::Reg; #[doc = "Host port control and status register (USBFS_HPCS)"] pub mod hpcs { #[doc = "Register `HPCS` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HPCS` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PCST` reader - Port connect status"] pub struct PCST_R(crate::FieldReader); impl PCST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PCST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCD` reader - Port connect detected"] pub struct PCD_R(crate::FieldReader); impl PCD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PCD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCD` writer - Port connect detected"] pub struct PCD_W<'a> { w: &'a mut W, } impl<'a> PCD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `PE` reader - Port enable"] pub struct PE_R(crate::FieldReader); impl PE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PE` writer - Port enable"] pub struct PE_W<'a> { w: &'a mut W, } impl<'a> PE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `PEDC` reader - Port enable/disable change"] pub struct PEDC_R(crate::FieldReader); impl PEDC_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PEDC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PEDC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PEDC` writer - Port enable/disable change"] pub struct PEDC_W<'a> { w: &'a mut W, } impl<'a> PEDC_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `PREM` reader - Port resume"] pub struct PREM_R(crate::FieldReader); impl PREM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PREM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PREM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PREM` writer - Port resume"] pub struct PREM_W<'a> { w: &'a mut W, } impl<'a> PREM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `PSP` reader - Port suspend"] pub struct PSP_R(crate::FieldReader); impl PSP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PSP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSP` writer - Port suspend"] pub struct PSP_W<'a> { w: &'a mut W, } impl<'a> PSP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `PRST` reader - Port reset"] pub struct PRST_R(crate::FieldReader); impl PRST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PRST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PRST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PRST` writer - Port reset"] pub struct PRST_W<'a> { w: &'a mut W, } impl<'a> PRST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `PLST` reader - Port line status"] pub struct PLST_R(crate::FieldReader); impl PLST_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PLST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PLST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PP` reader - Port power"] pub struct PP_R(crate::FieldReader); impl PP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PP` writer - Port power"] pub struct PP_W<'a> { w: &'a mut W, } impl<'a> PP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); self.w } } #[doc = "Field `PS` reader - Port speed"] pub struct PS_R(crate::FieldReader); impl PS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 0 - Port connect status"] #[inline(always)] pub fn pcst(&self) -> PCST_R { PCST_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Port connect detected"] #[inline(always)] pub fn pcd(&self) -> PCD_R { PCD_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Port enable"] #[inline(always)] pub fn pe(&self) -> PE_R { PE_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Port enable/disable change"] #[inline(always)] pub fn pedc(&self) -> PEDC_R { PEDC_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 6 - Port resume"] #[inline(always)] pub fn prem(&self) -> PREM_R { PREM_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7 - Port suspend"] #[inline(always)] pub fn psp(&self) -> PSP_R { PSP_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Port reset"] #[inline(always)] pub fn prst(&self) -> PRST_R { PRST_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bits 10:11 - Port line status"] #[inline(always)] pub fn plst(&self) -> PLST_R { PLST_R::new(((self.bits >> 10) & 0x03) as u8) } #[doc = "Bit 12 - Port power"] #[inline(always)] pub fn pp(&self) -> PP_R { PP_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bits 17:18 - Port speed"] #[inline(always)] pub fn ps(&self) -> PS_R { PS_R::new(((self.bits >> 17) & 0x03) as u8) } } impl W { #[doc = "Bit 1 - Port connect detected"] #[inline(always)] pub fn pcd(&mut self) -> PCD_W { PCD_W { w: self } } #[doc = "Bit 2 - Port enable"] #[inline(always)] pub fn pe(&mut self) -> PE_W { PE_W { w: self } } #[doc = "Bit 3 - Port enable/disable change"] #[inline(always)] pub fn pedc(&mut self) -> PEDC_W { PEDC_W { w: self } } #[doc = "Bit 6 - Port resume"] #[inline(always)] pub fn prem(&mut self) -> PREM_W { PREM_W { w: self } } #[doc = "Bit 7 - Port suspend"] #[inline(always)] pub fn psp(&mut self) -> PSP_W { PSP_W { w: self } } #[doc = "Bit 8 - Port reset"] #[inline(always)] pub fn prst(&mut self) -> PRST_W { PRST_W { w: self } } #[doc = "Bit 12 - Port power"] #[inline(always)] pub fn pp(&mut self) -> PP_W { PP_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Host port control and status register (USBFS_HPCS)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hpcs](index.html) module"] pub struct HPCS_SPEC; impl crate::RegisterSpec for HPCS_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hpcs::R](R) reader structure"] impl crate::Readable for HPCS_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hpcs::W](W) writer structure"] impl crate::Writable for HPCS_SPEC { type Writer = W; } #[doc = "`reset()` method sets HPCS to value 0"] impl crate::Resettable for HPCS_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH0CTL register accessor: an alias for `Reg`"] pub type HCH0CTL = crate::Reg; #[doc = "host channel-0 characteristics register (HCH0CTL)"] pub mod hch0ctl { #[doc = "Register `HCH0CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH0CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MPL` reader - Maximum packet size"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - Maximum packet size"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } #[doc = "Field `EPNUM` reader - Endpoint number"] pub struct EPNUM_R(crate::FieldReader); impl EPNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPNUM` writer - Endpoint number"] pub struct EPNUM_W<'a> { w: &'a mut W, } impl<'a> EPNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 11)) | ((value as u32 & 0x0f) << 11); self.w } } #[doc = "Field `EPDIR` reader - Endpoint direction"] pub struct EPDIR_R(crate::FieldReader); impl EPDIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIR` writer - Endpoint direction"] pub struct EPDIR_W<'a> { w: &'a mut W, } impl<'a> EPDIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LSD` reader - Low-speed device"] pub struct LSD_R(crate::FieldReader); impl LSD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LSD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LSD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LSD` writer - Low-speed device"] pub struct LSD_W<'a> { w: &'a mut W, } impl<'a> LSD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `DAR` reader - Device address"] pub struct DAR_R(crate::FieldReader); impl DAR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAR` writer - Device address"] pub struct DAR_W<'a> { w: &'a mut W, } impl<'a> DAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 22)) | ((value as u32 & 0x7f) << 22); self.w } } #[doc = "Field `ODDFRM` reader - Odd frame"] pub struct ODDFRM_R(crate::FieldReader); impl ODDFRM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ODDFRM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ODDFRM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ODDFRM` writer - Odd frame"] pub struct ODDFRM_W<'a> { w: &'a mut W, } impl<'a> ODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CDIS` reader - Channel disable"] pub struct CDIS_R(crate::FieldReader); impl CDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CDIS` writer - Channel disable"] pub struct CDIS_W<'a> { w: &'a mut W, } impl<'a> CDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CEN` reader - Channel enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Channel enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&self) -> EPNUM_R { EPNUM_R::new(((self.bits >> 11) & 0x0f) as u8) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&self) -> EPDIR_R { EPDIR_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&self) -> LSD_R { LSD_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&self) -> DAR_R { DAR_R::new(((self.bits >> 22) & 0x7f) as u8) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&self) -> ODDFRM_R { ODDFRM_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&self) -> CDIS_R { CDIS_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&mut self) -> EPNUM_W { EPNUM_W { w: self } } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&mut self) -> EPDIR_W { EPDIR_W { w: self } } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&mut self) -> LSD_W { LSD_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&mut self) -> DAR_W { DAR_W { w: self } } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&mut self) -> ODDFRM_W { ODDFRM_W { w: self } } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&mut self) -> CDIS_W { CDIS_W { w: self } } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-0 characteristics register (HCH0CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch0ctl](index.html) module"] pub struct HCH0CTL_SPEC; impl crate::RegisterSpec for HCH0CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch0ctl::R](R) reader structure"] impl crate::Readable for HCH0CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch0ctl::W](W) writer structure"] impl crate::Writable for HCH0CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH0CTL to value 0"] impl crate::Resettable for HCH0CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH1CTL register accessor: an alias for `Reg`"] pub type HCH1CTL = crate::Reg; #[doc = "host channel-1 characteristics register (HCH1CTL)"] pub mod hch1ctl { #[doc = "Register `HCH1CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH1CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MPL` reader - Maximum packet size"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - Maximum packet size"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } #[doc = "Field `EPNUM` reader - Endpoint number"] pub struct EPNUM_R(crate::FieldReader); impl EPNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPNUM` writer - Endpoint number"] pub struct EPNUM_W<'a> { w: &'a mut W, } impl<'a> EPNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 11)) | ((value as u32 & 0x0f) << 11); self.w } } #[doc = "Field `EPDIR` reader - Endpoint direction"] pub struct EPDIR_R(crate::FieldReader); impl EPDIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIR` writer - Endpoint direction"] pub struct EPDIR_W<'a> { w: &'a mut W, } impl<'a> EPDIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LSD` reader - Low-speed device"] pub struct LSD_R(crate::FieldReader); impl LSD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LSD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LSD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LSD` writer - Low-speed device"] pub struct LSD_W<'a> { w: &'a mut W, } impl<'a> LSD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `DAR` reader - Device address"] pub struct DAR_R(crate::FieldReader); impl DAR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAR` writer - Device address"] pub struct DAR_W<'a> { w: &'a mut W, } impl<'a> DAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 22)) | ((value as u32 & 0x7f) << 22); self.w } } #[doc = "Field `ODDFRM` reader - Odd frame"] pub struct ODDFRM_R(crate::FieldReader); impl ODDFRM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ODDFRM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ODDFRM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ODDFRM` writer - Odd frame"] pub struct ODDFRM_W<'a> { w: &'a mut W, } impl<'a> ODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CDIS` reader - Channel disable"] pub struct CDIS_R(crate::FieldReader); impl CDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CDIS` writer - Channel disable"] pub struct CDIS_W<'a> { w: &'a mut W, } impl<'a> CDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CEN` reader - Channel enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Channel enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&self) -> EPNUM_R { EPNUM_R::new(((self.bits >> 11) & 0x0f) as u8) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&self) -> EPDIR_R { EPDIR_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&self) -> LSD_R { LSD_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&self) -> DAR_R { DAR_R::new(((self.bits >> 22) & 0x7f) as u8) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&self) -> ODDFRM_R { ODDFRM_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&self) -> CDIS_R { CDIS_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&mut self) -> EPNUM_W { EPNUM_W { w: self } } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&mut self) -> EPDIR_W { EPDIR_W { w: self } } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&mut self) -> LSD_W { LSD_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&mut self) -> DAR_W { DAR_W { w: self } } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&mut self) -> ODDFRM_W { ODDFRM_W { w: self } } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&mut self) -> CDIS_W { CDIS_W { w: self } } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-1 characteristics register (HCH1CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch1ctl](index.html) module"] pub struct HCH1CTL_SPEC; impl crate::RegisterSpec for HCH1CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch1ctl::R](R) reader structure"] impl crate::Readable for HCH1CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch1ctl::W](W) writer structure"] impl crate::Writable for HCH1CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH1CTL to value 0"] impl crate::Resettable for HCH1CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH2CTL register accessor: an alias for `Reg`"] pub type HCH2CTL = crate::Reg; #[doc = "host channel-2 characteristics register (HCH2CTL)"] pub mod hch2ctl { #[doc = "Register `HCH2CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH2CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MPL` reader - Maximum packet size"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - Maximum packet size"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } #[doc = "Field `EPNUM` reader - Endpoint number"] pub struct EPNUM_R(crate::FieldReader); impl EPNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPNUM` writer - Endpoint number"] pub struct EPNUM_W<'a> { w: &'a mut W, } impl<'a> EPNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 11)) | ((value as u32 & 0x0f) << 11); self.w } } #[doc = "Field `EPDIR` reader - Endpoint direction"] pub struct EPDIR_R(crate::FieldReader); impl EPDIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIR` writer - Endpoint direction"] pub struct EPDIR_W<'a> { w: &'a mut W, } impl<'a> EPDIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LSD` reader - Low-speed device"] pub struct LSD_R(crate::FieldReader); impl LSD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LSD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LSD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LSD` writer - Low-speed device"] pub struct LSD_W<'a> { w: &'a mut W, } impl<'a> LSD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `DAR` reader - Device address"] pub struct DAR_R(crate::FieldReader); impl DAR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAR` writer - Device address"] pub struct DAR_W<'a> { w: &'a mut W, } impl<'a> DAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 22)) | ((value as u32 & 0x7f) << 22); self.w } } #[doc = "Field `ODDFRM` reader - Odd frame"] pub struct ODDFRM_R(crate::FieldReader); impl ODDFRM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ODDFRM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ODDFRM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ODDFRM` writer - Odd frame"] pub struct ODDFRM_W<'a> { w: &'a mut W, } impl<'a> ODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CDIS` reader - Channel disable"] pub struct CDIS_R(crate::FieldReader); impl CDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CDIS` writer - Channel disable"] pub struct CDIS_W<'a> { w: &'a mut W, } impl<'a> CDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CEN` reader - Channel enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Channel enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&self) -> EPNUM_R { EPNUM_R::new(((self.bits >> 11) & 0x0f) as u8) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&self) -> EPDIR_R { EPDIR_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&self) -> LSD_R { LSD_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&self) -> DAR_R { DAR_R::new(((self.bits >> 22) & 0x7f) as u8) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&self) -> ODDFRM_R { ODDFRM_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&self) -> CDIS_R { CDIS_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&mut self) -> EPNUM_W { EPNUM_W { w: self } } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&mut self) -> EPDIR_W { EPDIR_W { w: self } } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&mut self) -> LSD_W { LSD_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&mut self) -> DAR_W { DAR_W { w: self } } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&mut self) -> ODDFRM_W { ODDFRM_W { w: self } } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&mut self) -> CDIS_W { CDIS_W { w: self } } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-2 characteristics register (HCH2CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch2ctl](index.html) module"] pub struct HCH2CTL_SPEC; impl crate::RegisterSpec for HCH2CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch2ctl::R](R) reader structure"] impl crate::Readable for HCH2CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch2ctl::W](W) writer structure"] impl crate::Writable for HCH2CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH2CTL to value 0"] impl crate::Resettable for HCH2CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH3CTL register accessor: an alias for `Reg`"] pub type HCH3CTL = crate::Reg; #[doc = "host channel-3 characteristics register (HCH3CTL)"] pub mod hch3ctl { #[doc = "Register `HCH3CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH3CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MPL` reader - Maximum packet size"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - Maximum packet size"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } #[doc = "Field `EPNUM` reader - Endpoint number"] pub struct EPNUM_R(crate::FieldReader); impl EPNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPNUM` writer - Endpoint number"] pub struct EPNUM_W<'a> { w: &'a mut W, } impl<'a> EPNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 11)) | ((value as u32 & 0x0f) << 11); self.w } } #[doc = "Field `EPDIR` reader - Endpoint direction"] pub struct EPDIR_R(crate::FieldReader); impl EPDIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIR` writer - Endpoint direction"] pub struct EPDIR_W<'a> { w: &'a mut W, } impl<'a> EPDIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LSD` reader - Low-speed device"] pub struct LSD_R(crate::FieldReader); impl LSD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LSD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LSD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LSD` writer - Low-speed device"] pub struct LSD_W<'a> { w: &'a mut W, } impl<'a> LSD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `DAR` reader - Device address"] pub struct DAR_R(crate::FieldReader); impl DAR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAR` writer - Device address"] pub struct DAR_W<'a> { w: &'a mut W, } impl<'a> DAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 22)) | ((value as u32 & 0x7f) << 22); self.w } } #[doc = "Field `ODDFRM` reader - Odd frame"] pub struct ODDFRM_R(crate::FieldReader); impl ODDFRM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ODDFRM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ODDFRM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ODDFRM` writer - Odd frame"] pub struct ODDFRM_W<'a> { w: &'a mut W, } impl<'a> ODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CDIS` reader - Channel disable"] pub struct CDIS_R(crate::FieldReader); impl CDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CDIS` writer - Channel disable"] pub struct CDIS_W<'a> { w: &'a mut W, } impl<'a> CDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CEN` reader - Channel enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Channel enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&self) -> EPNUM_R { EPNUM_R::new(((self.bits >> 11) & 0x0f) as u8) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&self) -> EPDIR_R { EPDIR_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&self) -> LSD_R { LSD_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&self) -> DAR_R { DAR_R::new(((self.bits >> 22) & 0x7f) as u8) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&self) -> ODDFRM_R { ODDFRM_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&self) -> CDIS_R { CDIS_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&mut self) -> EPNUM_W { EPNUM_W { w: self } } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&mut self) -> EPDIR_W { EPDIR_W { w: self } } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&mut self) -> LSD_W { LSD_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&mut self) -> DAR_W { DAR_W { w: self } } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&mut self) -> ODDFRM_W { ODDFRM_W { w: self } } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&mut self) -> CDIS_W { CDIS_W { w: self } } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-3 characteristics register (HCH3CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch3ctl](index.html) module"] pub struct HCH3CTL_SPEC; impl crate::RegisterSpec for HCH3CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch3ctl::R](R) reader structure"] impl crate::Readable for HCH3CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch3ctl::W](W) writer structure"] impl crate::Writable for HCH3CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH3CTL to value 0"] impl crate::Resettable for HCH3CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH4CTL register accessor: an alias for `Reg`"] pub type HCH4CTL = crate::Reg; #[doc = "host channel-4 characteristics register (HCH4CTL)"] pub mod hch4ctl { #[doc = "Register `HCH4CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH4CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MPL` reader - Maximum packet size"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - Maximum packet size"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } #[doc = "Field `EPNUM` reader - Endpoint number"] pub struct EPNUM_R(crate::FieldReader); impl EPNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPNUM` writer - Endpoint number"] pub struct EPNUM_W<'a> { w: &'a mut W, } impl<'a> EPNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 11)) | ((value as u32 & 0x0f) << 11); self.w } } #[doc = "Field `EPDIR` reader - Endpoint direction"] pub struct EPDIR_R(crate::FieldReader); impl EPDIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIR` writer - Endpoint direction"] pub struct EPDIR_W<'a> { w: &'a mut W, } impl<'a> EPDIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LSD` reader - Low-speed device"] pub struct LSD_R(crate::FieldReader); impl LSD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LSD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LSD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LSD` writer - Low-speed device"] pub struct LSD_W<'a> { w: &'a mut W, } impl<'a> LSD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `DAR` reader - Device address"] pub struct DAR_R(crate::FieldReader); impl DAR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAR` writer - Device address"] pub struct DAR_W<'a> { w: &'a mut W, } impl<'a> DAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 22)) | ((value as u32 & 0x7f) << 22); self.w } } #[doc = "Field `ODDFRM` reader - Odd frame"] pub struct ODDFRM_R(crate::FieldReader); impl ODDFRM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ODDFRM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ODDFRM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ODDFRM` writer - Odd frame"] pub struct ODDFRM_W<'a> { w: &'a mut W, } impl<'a> ODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CDIS` reader - Channel disable"] pub struct CDIS_R(crate::FieldReader); impl CDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CDIS` writer - Channel disable"] pub struct CDIS_W<'a> { w: &'a mut W, } impl<'a> CDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CEN` reader - Channel enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Channel enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&self) -> EPNUM_R { EPNUM_R::new(((self.bits >> 11) & 0x0f) as u8) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&self) -> EPDIR_R { EPDIR_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&self) -> LSD_R { LSD_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&self) -> DAR_R { DAR_R::new(((self.bits >> 22) & 0x7f) as u8) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&self) -> ODDFRM_R { ODDFRM_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&self) -> CDIS_R { CDIS_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&mut self) -> EPNUM_W { EPNUM_W { w: self } } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&mut self) -> EPDIR_W { EPDIR_W { w: self } } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&mut self) -> LSD_W { LSD_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&mut self) -> DAR_W { DAR_W { w: self } } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&mut self) -> ODDFRM_W { ODDFRM_W { w: self } } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&mut self) -> CDIS_W { CDIS_W { w: self } } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-4 characteristics register (HCH4CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch4ctl](index.html) module"] pub struct HCH4CTL_SPEC; impl crate::RegisterSpec for HCH4CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch4ctl::R](R) reader structure"] impl crate::Readable for HCH4CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch4ctl::W](W) writer structure"] impl crate::Writable for HCH4CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH4CTL to value 0"] impl crate::Resettable for HCH4CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH5CTL register accessor: an alias for `Reg`"] pub type HCH5CTL = crate::Reg; #[doc = "host channel-5 characteristics register (HCH5CTL)"] pub mod hch5ctl { #[doc = "Register `HCH5CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH5CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MPL` reader - Maximum packet size"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - Maximum packet size"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } #[doc = "Field `EPNUM` reader - Endpoint number"] pub struct EPNUM_R(crate::FieldReader); impl EPNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPNUM` writer - Endpoint number"] pub struct EPNUM_W<'a> { w: &'a mut W, } impl<'a> EPNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 11)) | ((value as u32 & 0x0f) << 11); self.w } } #[doc = "Field `EPDIR` reader - Endpoint direction"] pub struct EPDIR_R(crate::FieldReader); impl EPDIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIR` writer - Endpoint direction"] pub struct EPDIR_W<'a> { w: &'a mut W, } impl<'a> EPDIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LSD` reader - Low-speed device"] pub struct LSD_R(crate::FieldReader); impl LSD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LSD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LSD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LSD` writer - Low-speed device"] pub struct LSD_W<'a> { w: &'a mut W, } impl<'a> LSD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `DAR` reader - Device address"] pub struct DAR_R(crate::FieldReader); impl DAR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAR` writer - Device address"] pub struct DAR_W<'a> { w: &'a mut W, } impl<'a> DAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 22)) | ((value as u32 & 0x7f) << 22); self.w } } #[doc = "Field `ODDFRM` reader - Odd frame"] pub struct ODDFRM_R(crate::FieldReader); impl ODDFRM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ODDFRM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ODDFRM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ODDFRM` writer - Odd frame"] pub struct ODDFRM_W<'a> { w: &'a mut W, } impl<'a> ODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CDIS` reader - Channel disable"] pub struct CDIS_R(crate::FieldReader); impl CDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CDIS` writer - Channel disable"] pub struct CDIS_W<'a> { w: &'a mut W, } impl<'a> CDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CEN` reader - Channel enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Channel enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&self) -> EPNUM_R { EPNUM_R::new(((self.bits >> 11) & 0x0f) as u8) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&self) -> EPDIR_R { EPDIR_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&self) -> LSD_R { LSD_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&self) -> DAR_R { DAR_R::new(((self.bits >> 22) & 0x7f) as u8) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&self) -> ODDFRM_R { ODDFRM_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&self) -> CDIS_R { CDIS_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&mut self) -> EPNUM_W { EPNUM_W { w: self } } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&mut self) -> EPDIR_W { EPDIR_W { w: self } } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&mut self) -> LSD_W { LSD_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&mut self) -> DAR_W { DAR_W { w: self } } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&mut self) -> ODDFRM_W { ODDFRM_W { w: self } } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&mut self) -> CDIS_W { CDIS_W { w: self } } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-5 characteristics register (HCH5CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch5ctl](index.html) module"] pub struct HCH5CTL_SPEC; impl crate::RegisterSpec for HCH5CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch5ctl::R](R) reader structure"] impl crate::Readable for HCH5CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch5ctl::W](W) writer structure"] impl crate::Writable for HCH5CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH5CTL to value 0"] impl crate::Resettable for HCH5CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH6CTL register accessor: an alias for `Reg`"] pub type HCH6CTL = crate::Reg; #[doc = "host channel-6 characteristics register (HCH6CTL)"] pub mod hch6ctl { #[doc = "Register `HCH6CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH6CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MPL` reader - Maximum packet size"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - Maximum packet size"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } #[doc = "Field `EPNUM` reader - Endpoint number"] pub struct EPNUM_R(crate::FieldReader); impl EPNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPNUM` writer - Endpoint number"] pub struct EPNUM_W<'a> { w: &'a mut W, } impl<'a> EPNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 11)) | ((value as u32 & 0x0f) << 11); self.w } } #[doc = "Field `EPDIR` reader - Endpoint direction"] pub struct EPDIR_R(crate::FieldReader); impl EPDIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIR` writer - Endpoint direction"] pub struct EPDIR_W<'a> { w: &'a mut W, } impl<'a> EPDIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LSD` reader - Low-speed device"] pub struct LSD_R(crate::FieldReader); impl LSD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LSD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LSD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LSD` writer - Low-speed device"] pub struct LSD_W<'a> { w: &'a mut W, } impl<'a> LSD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `DAR` reader - Device address"] pub struct DAR_R(crate::FieldReader); impl DAR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAR` writer - Device address"] pub struct DAR_W<'a> { w: &'a mut W, } impl<'a> DAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 22)) | ((value as u32 & 0x7f) << 22); self.w } } #[doc = "Field `ODDFRM` reader - Odd frame"] pub struct ODDFRM_R(crate::FieldReader); impl ODDFRM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ODDFRM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ODDFRM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ODDFRM` writer - Odd frame"] pub struct ODDFRM_W<'a> { w: &'a mut W, } impl<'a> ODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CDIS` reader - Channel disable"] pub struct CDIS_R(crate::FieldReader); impl CDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CDIS` writer - Channel disable"] pub struct CDIS_W<'a> { w: &'a mut W, } impl<'a> CDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CEN` reader - Channel enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Channel enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&self) -> EPNUM_R { EPNUM_R::new(((self.bits >> 11) & 0x0f) as u8) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&self) -> EPDIR_R { EPDIR_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&self) -> LSD_R { LSD_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&self) -> DAR_R { DAR_R::new(((self.bits >> 22) & 0x7f) as u8) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&self) -> ODDFRM_R { ODDFRM_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&self) -> CDIS_R { CDIS_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&mut self) -> EPNUM_W { EPNUM_W { w: self } } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&mut self) -> EPDIR_W { EPDIR_W { w: self } } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&mut self) -> LSD_W { LSD_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&mut self) -> DAR_W { DAR_W { w: self } } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&mut self) -> ODDFRM_W { ODDFRM_W { w: self } } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&mut self) -> CDIS_W { CDIS_W { w: self } } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-6 characteristics register (HCH6CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch6ctl](index.html) module"] pub struct HCH6CTL_SPEC; impl crate::RegisterSpec for HCH6CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch6ctl::R](R) reader structure"] impl crate::Readable for HCH6CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch6ctl::W](W) writer structure"] impl crate::Writable for HCH6CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH6CTL to value 0"] impl crate::Resettable for HCH6CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH7CTL register accessor: an alias for `Reg`"] pub type HCH7CTL = crate::Reg; #[doc = "host channel-7 characteristics register (HCH7CTL)"] pub mod hch7ctl { #[doc = "Register `HCH7CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH7CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MPL` reader - Maximum packet size"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - Maximum packet size"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } #[doc = "Field `EPNUM` reader - Endpoint number"] pub struct EPNUM_R(crate::FieldReader); impl EPNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPNUM` writer - Endpoint number"] pub struct EPNUM_W<'a> { w: &'a mut W, } impl<'a> EPNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 11)) | ((value as u32 & 0x0f) << 11); self.w } } #[doc = "Field `EPDIR` reader - Endpoint direction"] pub struct EPDIR_R(crate::FieldReader); impl EPDIR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIR` writer - Endpoint direction"] pub struct EPDIR_W<'a> { w: &'a mut W, } impl<'a> EPDIR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `LSD` reader - Low-speed device"] pub struct LSD_R(crate::FieldReader); impl LSD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { LSD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for LSD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `LSD` writer - Low-speed device"] pub struct LSD_W<'a> { w: &'a mut W, } impl<'a> LSD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `DAR` reader - Device address"] pub struct DAR_R(crate::FieldReader); impl DAR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAR` writer - Device address"] pub struct DAR_W<'a> { w: &'a mut W, } impl<'a> DAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 22)) | ((value as u32 & 0x7f) << 22); self.w } } #[doc = "Field `ODDFRM` reader - Odd frame"] pub struct ODDFRM_R(crate::FieldReader); impl ODDFRM_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ODDFRM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ODDFRM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ODDFRM` writer - Odd frame"] pub struct ODDFRM_W<'a> { w: &'a mut W, } impl<'a> ODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `CDIS` reader - Channel disable"] pub struct CDIS_R(crate::FieldReader); impl CDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CDIS` writer - Channel disable"] pub struct CDIS_W<'a> { w: &'a mut W, } impl<'a> CDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `CEN` reader - Channel enable"] pub struct CEN_R(crate::FieldReader); impl CEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CEN` writer - Channel enable"] pub struct CEN_W<'a> { w: &'a mut W, } impl<'a> CEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&self) -> EPNUM_R { EPNUM_R::new(((self.bits >> 11) & 0x0f) as u8) } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&self) -> EPDIR_R { EPDIR_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&self) -> LSD_R { LSD_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&self) -> DAR_R { DAR_R::new(((self.bits >> 22) & 0x7f) as u8) } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&self) -> ODDFRM_R { ODDFRM_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&self) -> CDIS_R { CDIS_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&self) -> CEN_R { CEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:10 - Maximum packet size"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Bits 11:14 - Endpoint number"] #[inline(always)] pub fn epnum(&mut self) -> EPNUM_W { EPNUM_W { w: self } } #[doc = "Bit 15 - Endpoint direction"] #[inline(always)] pub fn epdir(&mut self) -> EPDIR_W { EPDIR_W { w: self } } #[doc = "Bit 17 - Low-speed device"] #[inline(always)] pub fn lsd(&mut self) -> LSD_W { LSD_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bits 22:28 - Device address"] #[inline(always)] pub fn dar(&mut self) -> DAR_W { DAR_W { w: self } } #[doc = "Bit 29 - Odd frame"] #[inline(always)] pub fn oddfrm(&mut self) -> ODDFRM_W { ODDFRM_W { w: self } } #[doc = "Bit 30 - Channel disable"] #[inline(always)] pub fn cdis(&mut self) -> CDIS_W { CDIS_W { w: self } } #[doc = "Bit 31 - Channel enable"] #[inline(always)] pub fn cen(&mut self) -> CEN_W { CEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-7 characteristics register (HCH7CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch7ctl](index.html) module"] pub struct HCH7CTL_SPEC; impl crate::RegisterSpec for HCH7CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch7ctl::R](R) reader structure"] impl crate::Readable for HCH7CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch7ctl::W](W) writer structure"] impl crate::Writable for HCH7CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH7CTL to value 0"] impl crate::Resettable for HCH7CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH0INTF register accessor: an alias for `Reg`"] pub type HCH0INTF = crate::Reg; #[doc = "host channel-0 interrupt register (USBFS_HCHxINTF)"] pub mod hch0intf { #[doc = "Register `HCH0INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH0INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CH` reader - Channel halted"] pub struct CH_R(crate::FieldReader); impl CH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH` writer - Channel halted"] pub struct CH_W<'a> { w: &'a mut W, } impl<'a> CH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALL` reader - STALL response received interrupt"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL response received interrupt"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAK` reader - NAK response received interrupt"] pub struct NAK_R(crate::FieldReader); impl NAK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAK` writer - NAK response received interrupt"] pub struct NAK_W<'a> { w: &'a mut W, } impl<'a> NAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub struct ACK_R(crate::FieldReader); impl ACK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] pub struct ACK_W<'a> { w: &'a mut W, } impl<'a> ACK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBER` reader - USB bus error"] pub struct USBER_R(crate::FieldReader); impl USBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBER` writer - USB bus error"] pub struct USBER_W<'a> { w: &'a mut W, } impl<'a> USBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBER` reader - Babble error"] pub struct BBER_R(crate::FieldReader); impl BBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBER` writer - Babble error"] pub struct BBER_W<'a> { w: &'a mut W, } impl<'a> BBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVR` reader - Request queue overrun"] pub struct REQOVR_R(crate::FieldReader); impl REQOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVR` writer - Request queue overrun"] pub struct REQOVR_W<'a> { w: &'a mut W, } impl<'a> REQOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTER` reader - Data toggle error"] pub struct DTER_R(crate::FieldReader); impl DTER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTER` writer - Data toggle error"] pub struct DTER_W<'a> { w: &'a mut W, } impl<'a> DTER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&self) -> CH_R { CH_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&self) -> NAK_R { NAK_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&self) -> ACK_R { ACK_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&self) -> USBER_R { USBER_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&self) -> BBER_R { BBER_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&self) -> REQOVR_R { REQOVR_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&self) -> DTER_R { DTER_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&mut self) -> CH_W { CH_W { w: self } } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&mut self) -> NAK_W { NAK_W { w: self } } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&mut self) -> ACK_W { ACK_W { w: self } } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&mut self) -> USBER_W { USBER_W { w: self } } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&mut self) -> BBER_W { BBER_W { w: self } } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&mut self) -> REQOVR_W { REQOVR_W { w: self } } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&mut self) -> DTER_W { DTER_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-0 interrupt register (USBFS_HCHxINTF)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch0intf](index.html) module"] pub struct HCH0INTF_SPEC; impl crate::RegisterSpec for HCH0INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch0intf::R](R) reader structure"] impl crate::Readable for HCH0INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch0intf::W](W) writer structure"] impl crate::Writable for HCH0INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH0INTF to value 0"] impl crate::Resettable for HCH0INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH1INTF register accessor: an alias for `Reg`"] pub type HCH1INTF = crate::Reg; #[doc = "host channel-1 interrupt register (HCH1INTF)"] pub mod hch1intf { #[doc = "Register `HCH1INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH1INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CH` reader - Channel halted"] pub struct CH_R(crate::FieldReader); impl CH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH` writer - Channel halted"] pub struct CH_W<'a> { w: &'a mut W, } impl<'a> CH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALL` reader - STALL response received interrupt"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL response received interrupt"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAK` reader - NAK response received interrupt"] pub struct NAK_R(crate::FieldReader); impl NAK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAK` writer - NAK response received interrupt"] pub struct NAK_W<'a> { w: &'a mut W, } impl<'a> NAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub struct ACK_R(crate::FieldReader); impl ACK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] pub struct ACK_W<'a> { w: &'a mut W, } impl<'a> ACK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBER` reader - USB bus error"] pub struct USBER_R(crate::FieldReader); impl USBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBER` writer - USB bus error"] pub struct USBER_W<'a> { w: &'a mut W, } impl<'a> USBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBER` reader - Babble error"] pub struct BBER_R(crate::FieldReader); impl BBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBER` writer - Babble error"] pub struct BBER_W<'a> { w: &'a mut W, } impl<'a> BBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVR` reader - Request queue overrun"] pub struct REQOVR_R(crate::FieldReader); impl REQOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVR` writer - Request queue overrun"] pub struct REQOVR_W<'a> { w: &'a mut W, } impl<'a> REQOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTER` reader - Data toggle error"] pub struct DTER_R(crate::FieldReader); impl DTER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTER` writer - Data toggle error"] pub struct DTER_W<'a> { w: &'a mut W, } impl<'a> DTER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&self) -> CH_R { CH_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&self) -> NAK_R { NAK_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&self) -> ACK_R { ACK_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&self) -> USBER_R { USBER_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&self) -> BBER_R { BBER_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&self) -> REQOVR_R { REQOVR_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&self) -> DTER_R { DTER_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&mut self) -> CH_W { CH_W { w: self } } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&mut self) -> NAK_W { NAK_W { w: self } } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&mut self) -> ACK_W { ACK_W { w: self } } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&mut self) -> USBER_W { USBER_W { w: self } } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&mut self) -> BBER_W { BBER_W { w: self } } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&mut self) -> REQOVR_W { REQOVR_W { w: self } } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&mut self) -> DTER_W { DTER_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-1 interrupt register (HCH1INTF)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch1intf](index.html) module"] pub struct HCH1INTF_SPEC; impl crate::RegisterSpec for HCH1INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch1intf::R](R) reader structure"] impl crate::Readable for HCH1INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch1intf::W](W) writer structure"] impl crate::Writable for HCH1INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH1INTF to value 0"] impl crate::Resettable for HCH1INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH2INTF register accessor: an alias for `Reg`"] pub type HCH2INTF = crate::Reg; #[doc = "host channel-2 interrupt register (HCH2INTF)"] pub mod hch2intf { #[doc = "Register `HCH2INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH2INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CH` reader - Channel halted"] pub struct CH_R(crate::FieldReader); impl CH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH` writer - Channel halted"] pub struct CH_W<'a> { w: &'a mut W, } impl<'a> CH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALL` reader - STALL response received interrupt"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL response received interrupt"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAK` reader - NAK response received interrupt"] pub struct NAK_R(crate::FieldReader); impl NAK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAK` writer - NAK response received interrupt"] pub struct NAK_W<'a> { w: &'a mut W, } impl<'a> NAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub struct ACK_R(crate::FieldReader); impl ACK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] pub struct ACK_W<'a> { w: &'a mut W, } impl<'a> ACK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBER` reader - USB bus error"] pub struct USBER_R(crate::FieldReader); impl USBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBER` writer - USB bus error"] pub struct USBER_W<'a> { w: &'a mut W, } impl<'a> USBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBER` reader - Babble error"] pub struct BBER_R(crate::FieldReader); impl BBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBER` writer - Babble error"] pub struct BBER_W<'a> { w: &'a mut W, } impl<'a> BBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVR` reader - Request queue overrun"] pub struct REQOVR_R(crate::FieldReader); impl REQOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVR` writer - Request queue overrun"] pub struct REQOVR_W<'a> { w: &'a mut W, } impl<'a> REQOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTER` reader - Data toggle error"] pub struct DTER_R(crate::FieldReader); impl DTER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTER` writer - Data toggle error"] pub struct DTER_W<'a> { w: &'a mut W, } impl<'a> DTER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&self) -> CH_R { CH_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&self) -> NAK_R { NAK_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&self) -> ACK_R { ACK_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&self) -> USBER_R { USBER_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&self) -> BBER_R { BBER_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&self) -> REQOVR_R { REQOVR_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&self) -> DTER_R { DTER_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&mut self) -> CH_W { CH_W { w: self } } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&mut self) -> NAK_W { NAK_W { w: self } } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&mut self) -> ACK_W { ACK_W { w: self } } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&mut self) -> USBER_W { USBER_W { w: self } } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&mut self) -> BBER_W { BBER_W { w: self } } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&mut self) -> REQOVR_W { REQOVR_W { w: self } } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&mut self) -> DTER_W { DTER_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-2 interrupt register (HCH2INTF)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch2intf](index.html) module"] pub struct HCH2INTF_SPEC; impl crate::RegisterSpec for HCH2INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch2intf::R](R) reader structure"] impl crate::Readable for HCH2INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch2intf::W](W) writer structure"] impl crate::Writable for HCH2INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH2INTF to value 0"] impl crate::Resettable for HCH2INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH3INTF register accessor: an alias for `Reg`"] pub type HCH3INTF = crate::Reg; #[doc = "host channel-3 interrupt register (HCH3INTF)"] pub mod hch3intf { #[doc = "Register `HCH3INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH3INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CH` reader - Channel halted"] pub struct CH_R(crate::FieldReader); impl CH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH` writer - Channel halted"] pub struct CH_W<'a> { w: &'a mut W, } impl<'a> CH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALL` reader - STALL response received interrupt"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL response received interrupt"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAK` reader - NAK response received interrupt"] pub struct NAK_R(crate::FieldReader); impl NAK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAK` writer - NAK response received interrupt"] pub struct NAK_W<'a> { w: &'a mut W, } impl<'a> NAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub struct ACK_R(crate::FieldReader); impl ACK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] pub struct ACK_W<'a> { w: &'a mut W, } impl<'a> ACK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBER` reader - USB bus error"] pub struct USBER_R(crate::FieldReader); impl USBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBER` writer - USB bus error"] pub struct USBER_W<'a> { w: &'a mut W, } impl<'a> USBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBER` reader - Babble error"] pub struct BBER_R(crate::FieldReader); impl BBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBER` writer - Babble error"] pub struct BBER_W<'a> { w: &'a mut W, } impl<'a> BBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVR` reader - Request queue overrun"] pub struct REQOVR_R(crate::FieldReader); impl REQOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVR` writer - Request queue overrun"] pub struct REQOVR_W<'a> { w: &'a mut W, } impl<'a> REQOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTER` reader - Data toggle error"] pub struct DTER_R(crate::FieldReader); impl DTER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTER` writer - Data toggle error"] pub struct DTER_W<'a> { w: &'a mut W, } impl<'a> DTER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&self) -> CH_R { CH_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&self) -> NAK_R { NAK_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&self) -> ACK_R { ACK_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&self) -> USBER_R { USBER_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&self) -> BBER_R { BBER_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&self) -> REQOVR_R { REQOVR_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&self) -> DTER_R { DTER_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&mut self) -> CH_W { CH_W { w: self } } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&mut self) -> NAK_W { NAK_W { w: self } } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&mut self) -> ACK_W { ACK_W { w: self } } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&mut self) -> USBER_W { USBER_W { w: self } } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&mut self) -> BBER_W { BBER_W { w: self } } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&mut self) -> REQOVR_W { REQOVR_W { w: self } } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&mut self) -> DTER_W { DTER_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-3 interrupt register (HCH3INTF)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch3intf](index.html) module"] pub struct HCH3INTF_SPEC; impl crate::RegisterSpec for HCH3INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch3intf::R](R) reader structure"] impl crate::Readable for HCH3INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch3intf::W](W) writer structure"] impl crate::Writable for HCH3INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH3INTF to value 0"] impl crate::Resettable for HCH3INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH4INTF register accessor: an alias for `Reg`"] pub type HCH4INTF = crate::Reg; #[doc = "host channel-4 interrupt register (HCH4INTF)"] pub mod hch4intf { #[doc = "Register `HCH4INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH4INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CH` reader - Channel halted"] pub struct CH_R(crate::FieldReader); impl CH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH` writer - Channel halted"] pub struct CH_W<'a> { w: &'a mut W, } impl<'a> CH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALL` reader - STALL response received interrupt"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL response received interrupt"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAK` reader - NAK response received interrupt"] pub struct NAK_R(crate::FieldReader); impl NAK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAK` writer - NAK response received interrupt"] pub struct NAK_W<'a> { w: &'a mut W, } impl<'a> NAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub struct ACK_R(crate::FieldReader); impl ACK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] pub struct ACK_W<'a> { w: &'a mut W, } impl<'a> ACK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBER` reader - USB bus error"] pub struct USBER_R(crate::FieldReader); impl USBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBER` writer - USB bus error"] pub struct USBER_W<'a> { w: &'a mut W, } impl<'a> USBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBER` reader - Babble error"] pub struct BBER_R(crate::FieldReader); impl BBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBER` writer - Babble error"] pub struct BBER_W<'a> { w: &'a mut W, } impl<'a> BBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVR` reader - Request queue overrun"] pub struct REQOVR_R(crate::FieldReader); impl REQOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVR` writer - Request queue overrun"] pub struct REQOVR_W<'a> { w: &'a mut W, } impl<'a> REQOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTER` reader - Data toggle error"] pub struct DTER_R(crate::FieldReader); impl DTER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTER` writer - Data toggle error"] pub struct DTER_W<'a> { w: &'a mut W, } impl<'a> DTER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&self) -> CH_R { CH_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&self) -> NAK_R { NAK_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&self) -> ACK_R { ACK_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&self) -> USBER_R { USBER_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&self) -> BBER_R { BBER_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&self) -> REQOVR_R { REQOVR_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&self) -> DTER_R { DTER_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&mut self) -> CH_W { CH_W { w: self } } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&mut self) -> NAK_W { NAK_W { w: self } } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&mut self) -> ACK_W { ACK_W { w: self } } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&mut self) -> USBER_W { USBER_W { w: self } } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&mut self) -> BBER_W { BBER_W { w: self } } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&mut self) -> REQOVR_W { REQOVR_W { w: self } } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&mut self) -> DTER_W { DTER_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-4 interrupt register (HCH4INTF)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch4intf](index.html) module"] pub struct HCH4INTF_SPEC; impl crate::RegisterSpec for HCH4INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch4intf::R](R) reader structure"] impl crate::Readable for HCH4INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch4intf::W](W) writer structure"] impl crate::Writable for HCH4INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH4INTF to value 0"] impl crate::Resettable for HCH4INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH5INTF register accessor: an alias for `Reg`"] pub type HCH5INTF = crate::Reg; #[doc = "host channel-5 interrupt register (HCH5INTF)"] pub mod hch5intf { #[doc = "Register `HCH5INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH5INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CH` reader - Channel halted"] pub struct CH_R(crate::FieldReader); impl CH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH` writer - Channel halted"] pub struct CH_W<'a> { w: &'a mut W, } impl<'a> CH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALL` reader - STALL response received interrupt"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL response received interrupt"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAK` reader - NAK response received interrupt"] pub struct NAK_R(crate::FieldReader); impl NAK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAK` writer - NAK response received interrupt"] pub struct NAK_W<'a> { w: &'a mut W, } impl<'a> NAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub struct ACK_R(crate::FieldReader); impl ACK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] pub struct ACK_W<'a> { w: &'a mut W, } impl<'a> ACK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBER` reader - USB bus error"] pub struct USBER_R(crate::FieldReader); impl USBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBER` writer - USB bus error"] pub struct USBER_W<'a> { w: &'a mut W, } impl<'a> USBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBER` reader - Babble error"] pub struct BBER_R(crate::FieldReader); impl BBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBER` writer - Babble error"] pub struct BBER_W<'a> { w: &'a mut W, } impl<'a> BBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVR` reader - Request queue overrun"] pub struct REQOVR_R(crate::FieldReader); impl REQOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVR` writer - Request queue overrun"] pub struct REQOVR_W<'a> { w: &'a mut W, } impl<'a> REQOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTER` reader - Data toggle error"] pub struct DTER_R(crate::FieldReader); impl DTER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTER` writer - Data toggle error"] pub struct DTER_W<'a> { w: &'a mut W, } impl<'a> DTER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&self) -> CH_R { CH_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&self) -> NAK_R { NAK_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&self) -> ACK_R { ACK_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&self) -> USBER_R { USBER_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&self) -> BBER_R { BBER_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&self) -> REQOVR_R { REQOVR_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&self) -> DTER_R { DTER_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&mut self) -> CH_W { CH_W { w: self } } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&mut self) -> NAK_W { NAK_W { w: self } } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&mut self) -> ACK_W { ACK_W { w: self } } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&mut self) -> USBER_W { USBER_W { w: self } } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&mut self) -> BBER_W { BBER_W { w: self } } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&mut self) -> REQOVR_W { REQOVR_W { w: self } } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&mut self) -> DTER_W { DTER_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-5 interrupt register (HCH5INTF)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch5intf](index.html) module"] pub struct HCH5INTF_SPEC; impl crate::RegisterSpec for HCH5INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch5intf::R](R) reader structure"] impl crate::Readable for HCH5INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch5intf::W](W) writer structure"] impl crate::Writable for HCH5INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH5INTF to value 0"] impl crate::Resettable for HCH5INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH6INTF register accessor: an alias for `Reg`"] pub type HCH6INTF = crate::Reg; #[doc = "host channel-6 interrupt register (HCH6INTF)"] pub mod hch6intf { #[doc = "Register `HCH6INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH6INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CH` reader - Channel halted"] pub struct CH_R(crate::FieldReader); impl CH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH` writer - Channel halted"] pub struct CH_W<'a> { w: &'a mut W, } impl<'a> CH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALL` reader - STALL response received interrupt"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL response received interrupt"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAK` reader - NAK response received interrupt"] pub struct NAK_R(crate::FieldReader); impl NAK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAK` writer - NAK response received interrupt"] pub struct NAK_W<'a> { w: &'a mut W, } impl<'a> NAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub struct ACK_R(crate::FieldReader); impl ACK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] pub struct ACK_W<'a> { w: &'a mut W, } impl<'a> ACK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBER` reader - USB bus error"] pub struct USBER_R(crate::FieldReader); impl USBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBER` writer - USB bus error"] pub struct USBER_W<'a> { w: &'a mut W, } impl<'a> USBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBER` reader - Babble error"] pub struct BBER_R(crate::FieldReader); impl BBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBER` writer - Babble error"] pub struct BBER_W<'a> { w: &'a mut W, } impl<'a> BBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVR` reader - Request queue overrun"] pub struct REQOVR_R(crate::FieldReader); impl REQOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVR` writer - Request queue overrun"] pub struct REQOVR_W<'a> { w: &'a mut W, } impl<'a> REQOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTER` reader - Data toggle error"] pub struct DTER_R(crate::FieldReader); impl DTER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTER` writer - Data toggle error"] pub struct DTER_W<'a> { w: &'a mut W, } impl<'a> DTER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&self) -> CH_R { CH_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&self) -> NAK_R { NAK_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&self) -> ACK_R { ACK_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&self) -> USBER_R { USBER_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&self) -> BBER_R { BBER_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&self) -> REQOVR_R { REQOVR_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&self) -> DTER_R { DTER_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&mut self) -> CH_W { CH_W { w: self } } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&mut self) -> NAK_W { NAK_W { w: self } } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&mut self) -> ACK_W { ACK_W { w: self } } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&mut self) -> USBER_W { USBER_W { w: self } } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&mut self) -> BBER_W { BBER_W { w: self } } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&mut self) -> REQOVR_W { REQOVR_W { w: self } } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&mut self) -> DTER_W { DTER_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-6 interrupt register (HCH6INTF)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch6intf](index.html) module"] pub struct HCH6INTF_SPEC; impl crate::RegisterSpec for HCH6INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch6intf::R](R) reader structure"] impl crate::Readable for HCH6INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch6intf::W](W) writer structure"] impl crate::Writable for HCH6INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH6INTF to value 0"] impl crate::Resettable for HCH6INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH7INTF register accessor: an alias for `Reg`"] pub type HCH7INTF = crate::Reg; #[doc = "host channel-7 interrupt register (HCH7INTF)"] pub mod hch7intf { #[doc = "Register `HCH7INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH7INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CH` reader - Channel halted"] pub struct CH_R(crate::FieldReader); impl CH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CH` writer - Channel halted"] pub struct CH_W<'a> { w: &'a mut W, } impl<'a> CH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALL` reader - STALL response received interrupt"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL response received interrupt"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAK` reader - NAK response received interrupt"] pub struct NAK_R(crate::FieldReader); impl NAK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAK` writer - NAK response received interrupt"] pub struct NAK_W<'a> { w: &'a mut W, } impl<'a> NAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACK` reader - ACK response received/transmitted interrupt"] pub struct ACK_R(crate::FieldReader); impl ACK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACK` writer - ACK response received/transmitted interrupt"] pub struct ACK_W<'a> { w: &'a mut W, } impl<'a> ACK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBER` reader - USB bus error"] pub struct USBER_R(crate::FieldReader); impl USBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBER` writer - USB bus error"] pub struct USBER_W<'a> { w: &'a mut W, } impl<'a> USBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBER` reader - Babble error"] pub struct BBER_R(crate::FieldReader); impl BBER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBER` writer - Babble error"] pub struct BBER_W<'a> { w: &'a mut W, } impl<'a> BBER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVR` reader - Request queue overrun"] pub struct REQOVR_R(crate::FieldReader); impl REQOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVR` writer - Request queue overrun"] pub struct REQOVR_W<'a> { w: &'a mut W, } impl<'a> REQOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTER` reader - Data toggle error"] pub struct DTER_R(crate::FieldReader); impl DTER_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTER_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTER_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTER` writer - Data toggle error"] pub struct DTER_W<'a> { w: &'a mut W, } impl<'a> DTER_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&self) -> CH_R { CH_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&self) -> NAK_R { NAK_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&self) -> ACK_R { ACK_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&self) -> USBER_R { USBER_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&self) -> BBER_R { BBER_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&self) -> REQOVR_R { REQOVR_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&self) -> DTER_R { DTER_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Bit 1 - Channel halted"] #[inline(always)] pub fn ch(&mut self) -> CH_W { CH_W { w: self } } #[doc = "Bit 3 - STALL response received interrupt"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 4 - NAK response received interrupt"] #[inline(always)] pub fn nak(&mut self) -> NAK_W { NAK_W { w: self } } #[doc = "Bit 5 - ACK response received/transmitted interrupt"] #[inline(always)] pub fn ack(&mut self) -> ACK_W { ACK_W { w: self } } #[doc = "Bit 7 - USB bus error"] #[inline(always)] pub fn usber(&mut self) -> USBER_W { USBER_W { w: self } } #[doc = "Bit 8 - Babble error"] #[inline(always)] pub fn bber(&mut self) -> BBER_W { BBER_W { w: self } } #[doc = "Bit 9 - Request queue overrun"] #[inline(always)] pub fn reqovr(&mut self) -> REQOVR_W { REQOVR_W { w: self } } #[doc = "Bit 10 - Data toggle error"] #[inline(always)] pub fn dter(&mut self) -> DTER_W { DTER_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-7 interrupt register (HCH7INTF)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch7intf](index.html) module"] pub struct HCH7INTF_SPEC; impl crate::RegisterSpec for HCH7INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch7intf::R](R) reader structure"] impl crate::Readable for HCH7INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch7intf::W](W) writer structure"] impl crate::Writable for HCH7INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH7INTF to value 0"] impl crate::Resettable for HCH7INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH0INTEN register accessor: an alias for `Reg`"] pub type HCH0INTEN = crate::Reg; #[doc = "host channel-0 interrupt enable register (HCH0INTEN)"] pub mod hch0inten { #[doc = "Register `HCH0INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH0INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TFIE` reader - Transfer completed interrupt enable"] pub struct TFIE_R(crate::FieldReader); impl TFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TFIE` writer - Transfer completed interrupt enable"] pub struct TFIE_W<'a> { w: &'a mut W, } impl<'a> TFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CHIE` reader - Channel halted interrupt enable"] pub struct CHIE_R(crate::FieldReader); impl CHIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHIE` writer - Channel halted interrupt enable"] pub struct CHIE_W<'a> { w: &'a mut W, } impl<'a> CHIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALLIE` reader - STALL interrupt enable"] pub struct STALLIE_R(crate::FieldReader); impl STALLIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALLIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALLIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALLIE` writer - STALL interrupt enable"] pub struct STALLIE_W<'a> { w: &'a mut W, } impl<'a> STALLIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAKIE` reader - NAK interrupt enable"] pub struct NAKIE_R(crate::FieldReader); impl NAKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAKIE` writer - NAK interrupt enable"] pub struct NAKIE_W<'a> { w: &'a mut W, } impl<'a> NAKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACKIE` reader - ACK interrupt enable"] pub struct ACKIE_R(crate::FieldReader); impl ACKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACKIE` writer - ACK interrupt enable"] pub struct ACKIE_W<'a> { w: &'a mut W, } impl<'a> ACKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBERIE` reader - USB bus error interrupt enable"] pub struct USBERIE_R(crate::FieldReader); impl USBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBERIE` writer - USB bus error interrupt enable"] pub struct USBERIE_W<'a> { w: &'a mut W, } impl<'a> USBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBERIE` reader - Babble error interrupt enable"] pub struct BBERIE_R(crate::FieldReader); impl BBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBERIE` writer - Babble error interrupt enable"] pub struct BBERIE_W<'a> { w: &'a mut W, } impl<'a> BBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVRIE` reader - request queue overrun interrupt enable"] pub struct REQOVRIE_R(crate::FieldReader); impl REQOVRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVRIE` writer - request queue overrun interrupt enable"] pub struct REQOVRIE_W<'a> { w: &'a mut W, } impl<'a> REQOVRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTERIE` reader - Data toggle error interrupt enable"] pub struct DTERIE_R(crate::FieldReader); impl DTERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTERIE` writer - Data toggle error interrupt enable"] pub struct DTERIE_W<'a> { w: &'a mut W, } impl<'a> DTERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&self) -> TFIE_R { TFIE_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&self) -> CHIE_R { CHIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&self) -> STALLIE_R { STALLIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&self) -> NAKIE_R { NAKIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&self) -> ACKIE_R { ACKIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&self) -> USBERIE_R { USBERIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&self) -> BBERIE_R { BBERIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&self) -> REQOVRIE_R { REQOVRIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&self) -> DTERIE_R { DTERIE_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&mut self) -> TFIE_W { TFIE_W { w: self } } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&mut self) -> CHIE_W { CHIE_W { w: self } } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&mut self) -> STALLIE_W { STALLIE_W { w: self } } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&mut self) -> NAKIE_W { NAKIE_W { w: self } } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&mut self) -> ACKIE_W { ACKIE_W { w: self } } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&mut self) -> USBERIE_W { USBERIE_W { w: self } } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&mut self) -> BBERIE_W { BBERIE_W { w: self } } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&mut self) -> REQOVRIE_W { REQOVRIE_W { w: self } } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&mut self) -> DTERIE_W { DTERIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-0 interrupt enable register (HCH0INTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch0inten](index.html) module"] pub struct HCH0INTEN_SPEC; impl crate::RegisterSpec for HCH0INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch0inten::R](R) reader structure"] impl crate::Readable for HCH0INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch0inten::W](W) writer structure"] impl crate::Writable for HCH0INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH0INTEN to value 0"] impl crate::Resettable for HCH0INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH1INTEN register accessor: an alias for `Reg`"] pub type HCH1INTEN = crate::Reg; #[doc = "host channel-1 interrupt enable register (HCH1INTEN)"] pub mod hch1inten { #[doc = "Register `HCH1INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH1INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TFIE` reader - Transfer completed interrupt enable"] pub struct TFIE_R(crate::FieldReader); impl TFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TFIE` writer - Transfer completed interrupt enable"] pub struct TFIE_W<'a> { w: &'a mut W, } impl<'a> TFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CHIE` reader - Channel halted interrupt enable"] pub struct CHIE_R(crate::FieldReader); impl CHIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHIE` writer - Channel halted interrupt enable"] pub struct CHIE_W<'a> { w: &'a mut W, } impl<'a> CHIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALLIE` reader - STALL interrupt enable"] pub struct STALLIE_R(crate::FieldReader); impl STALLIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALLIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALLIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALLIE` writer - STALL interrupt enable"] pub struct STALLIE_W<'a> { w: &'a mut W, } impl<'a> STALLIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAKIE` reader - NAK interrupt enable"] pub struct NAKIE_R(crate::FieldReader); impl NAKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAKIE` writer - NAK interrupt enable"] pub struct NAKIE_W<'a> { w: &'a mut W, } impl<'a> NAKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACKIE` reader - ACK interrupt enable"] pub struct ACKIE_R(crate::FieldReader); impl ACKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACKIE` writer - ACK interrupt enable"] pub struct ACKIE_W<'a> { w: &'a mut W, } impl<'a> ACKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBERIE` reader - USB bus error interrupt enable"] pub struct USBERIE_R(crate::FieldReader); impl USBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBERIE` writer - USB bus error interrupt enable"] pub struct USBERIE_W<'a> { w: &'a mut W, } impl<'a> USBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBERIE` reader - Babble error interrupt enable"] pub struct BBERIE_R(crate::FieldReader); impl BBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBERIE` writer - Babble error interrupt enable"] pub struct BBERIE_W<'a> { w: &'a mut W, } impl<'a> BBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVRIE` reader - request queue overrun interrupt enable"] pub struct REQOVRIE_R(crate::FieldReader); impl REQOVRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVRIE` writer - request queue overrun interrupt enable"] pub struct REQOVRIE_W<'a> { w: &'a mut W, } impl<'a> REQOVRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTERIE` reader - Data toggle error interrupt enable"] pub struct DTERIE_R(crate::FieldReader); impl DTERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTERIE` writer - Data toggle error interrupt enable"] pub struct DTERIE_W<'a> { w: &'a mut W, } impl<'a> DTERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&self) -> TFIE_R { TFIE_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&self) -> CHIE_R { CHIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&self) -> STALLIE_R { STALLIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&self) -> NAKIE_R { NAKIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&self) -> ACKIE_R { ACKIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&self) -> USBERIE_R { USBERIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&self) -> BBERIE_R { BBERIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&self) -> REQOVRIE_R { REQOVRIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&self) -> DTERIE_R { DTERIE_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&mut self) -> TFIE_W { TFIE_W { w: self } } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&mut self) -> CHIE_W { CHIE_W { w: self } } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&mut self) -> STALLIE_W { STALLIE_W { w: self } } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&mut self) -> NAKIE_W { NAKIE_W { w: self } } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&mut self) -> ACKIE_W { ACKIE_W { w: self } } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&mut self) -> USBERIE_W { USBERIE_W { w: self } } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&mut self) -> BBERIE_W { BBERIE_W { w: self } } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&mut self) -> REQOVRIE_W { REQOVRIE_W { w: self } } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&mut self) -> DTERIE_W { DTERIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-1 interrupt enable register (HCH1INTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch1inten](index.html) module"] pub struct HCH1INTEN_SPEC; impl crate::RegisterSpec for HCH1INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch1inten::R](R) reader structure"] impl crate::Readable for HCH1INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch1inten::W](W) writer structure"] impl crate::Writable for HCH1INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH1INTEN to value 0"] impl crate::Resettable for HCH1INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH2INTEN register accessor: an alias for `Reg`"] pub type HCH2INTEN = crate::Reg; #[doc = "host channel-2 interrupt enable register (HCH2INTEN)"] pub mod hch2inten { #[doc = "Register `HCH2INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH2INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TFIE` reader - Transfer completed interrupt enable"] pub struct TFIE_R(crate::FieldReader); impl TFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TFIE` writer - Transfer completed interrupt enable"] pub struct TFIE_W<'a> { w: &'a mut W, } impl<'a> TFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CHIE` reader - Channel halted interrupt enable"] pub struct CHIE_R(crate::FieldReader); impl CHIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHIE` writer - Channel halted interrupt enable"] pub struct CHIE_W<'a> { w: &'a mut W, } impl<'a> CHIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALLIE` reader - STALL interrupt enable"] pub struct STALLIE_R(crate::FieldReader); impl STALLIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALLIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALLIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALLIE` writer - STALL interrupt enable"] pub struct STALLIE_W<'a> { w: &'a mut W, } impl<'a> STALLIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAKIE` reader - NAK interrupt enable"] pub struct NAKIE_R(crate::FieldReader); impl NAKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAKIE` writer - NAK interrupt enable"] pub struct NAKIE_W<'a> { w: &'a mut W, } impl<'a> NAKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACKIE` reader - ACK interrupt enable"] pub struct ACKIE_R(crate::FieldReader); impl ACKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACKIE` writer - ACK interrupt enable"] pub struct ACKIE_W<'a> { w: &'a mut W, } impl<'a> ACKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBERIE` reader - USB bus error interrupt enable"] pub struct USBERIE_R(crate::FieldReader); impl USBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBERIE` writer - USB bus error interrupt enable"] pub struct USBERIE_W<'a> { w: &'a mut W, } impl<'a> USBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBERIE` reader - Babble error interrupt enable"] pub struct BBERIE_R(crate::FieldReader); impl BBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBERIE` writer - Babble error interrupt enable"] pub struct BBERIE_W<'a> { w: &'a mut W, } impl<'a> BBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVRIE` reader - request queue overrun interrupt enable"] pub struct REQOVRIE_R(crate::FieldReader); impl REQOVRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVRIE` writer - request queue overrun interrupt enable"] pub struct REQOVRIE_W<'a> { w: &'a mut W, } impl<'a> REQOVRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTERIE` reader - Data toggle error interrupt enable"] pub struct DTERIE_R(crate::FieldReader); impl DTERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTERIE` writer - Data toggle error interrupt enable"] pub struct DTERIE_W<'a> { w: &'a mut W, } impl<'a> DTERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&self) -> TFIE_R { TFIE_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&self) -> CHIE_R { CHIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&self) -> STALLIE_R { STALLIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&self) -> NAKIE_R { NAKIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&self) -> ACKIE_R { ACKIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&self) -> USBERIE_R { USBERIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&self) -> BBERIE_R { BBERIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&self) -> REQOVRIE_R { REQOVRIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&self) -> DTERIE_R { DTERIE_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&mut self) -> TFIE_W { TFIE_W { w: self } } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&mut self) -> CHIE_W { CHIE_W { w: self } } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&mut self) -> STALLIE_W { STALLIE_W { w: self } } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&mut self) -> NAKIE_W { NAKIE_W { w: self } } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&mut self) -> ACKIE_W { ACKIE_W { w: self } } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&mut self) -> USBERIE_W { USBERIE_W { w: self } } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&mut self) -> BBERIE_W { BBERIE_W { w: self } } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&mut self) -> REQOVRIE_W { REQOVRIE_W { w: self } } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&mut self) -> DTERIE_W { DTERIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-2 interrupt enable register (HCH2INTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch2inten](index.html) module"] pub struct HCH2INTEN_SPEC; impl crate::RegisterSpec for HCH2INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch2inten::R](R) reader structure"] impl crate::Readable for HCH2INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch2inten::W](W) writer structure"] impl crate::Writable for HCH2INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH2INTEN to value 0"] impl crate::Resettable for HCH2INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH3INTEN register accessor: an alias for `Reg`"] pub type HCH3INTEN = crate::Reg; #[doc = "host channel-3 interrupt enable register (HCH3INTEN)"] pub mod hch3inten { #[doc = "Register `HCH3INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH3INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TFIE` reader - Transfer completed interrupt enable"] pub struct TFIE_R(crate::FieldReader); impl TFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TFIE` writer - Transfer completed interrupt enable"] pub struct TFIE_W<'a> { w: &'a mut W, } impl<'a> TFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CHIE` reader - Channel halted interrupt enable"] pub struct CHIE_R(crate::FieldReader); impl CHIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHIE` writer - Channel halted interrupt enable"] pub struct CHIE_W<'a> { w: &'a mut W, } impl<'a> CHIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALLIE` reader - STALL interrupt enable"] pub struct STALLIE_R(crate::FieldReader); impl STALLIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALLIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALLIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALLIE` writer - STALL interrupt enable"] pub struct STALLIE_W<'a> { w: &'a mut W, } impl<'a> STALLIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAKIE` reader - NAK interrupt enable"] pub struct NAKIE_R(crate::FieldReader); impl NAKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAKIE` writer - NAK interrupt enable"] pub struct NAKIE_W<'a> { w: &'a mut W, } impl<'a> NAKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACKIE` reader - ACK interrupt enable"] pub struct ACKIE_R(crate::FieldReader); impl ACKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACKIE` writer - ACK interrupt enable"] pub struct ACKIE_W<'a> { w: &'a mut W, } impl<'a> ACKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBERIE` reader - USB bus error interrupt enable"] pub struct USBERIE_R(crate::FieldReader); impl USBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBERIE` writer - USB bus error interrupt enable"] pub struct USBERIE_W<'a> { w: &'a mut W, } impl<'a> USBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBERIE` reader - Babble error interrupt enable"] pub struct BBERIE_R(crate::FieldReader); impl BBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBERIE` writer - Babble error interrupt enable"] pub struct BBERIE_W<'a> { w: &'a mut W, } impl<'a> BBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVRIE` reader - request queue overrun interrupt enable"] pub struct REQOVRIE_R(crate::FieldReader); impl REQOVRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVRIE` writer - request queue overrun interrupt enable"] pub struct REQOVRIE_W<'a> { w: &'a mut W, } impl<'a> REQOVRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTERIE` reader - Data toggle error interrupt enable"] pub struct DTERIE_R(crate::FieldReader); impl DTERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTERIE` writer - Data toggle error interrupt enable"] pub struct DTERIE_W<'a> { w: &'a mut W, } impl<'a> DTERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&self) -> TFIE_R { TFIE_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&self) -> CHIE_R { CHIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&self) -> STALLIE_R { STALLIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&self) -> NAKIE_R { NAKIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&self) -> ACKIE_R { ACKIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&self) -> USBERIE_R { USBERIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&self) -> BBERIE_R { BBERIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&self) -> REQOVRIE_R { REQOVRIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&self) -> DTERIE_R { DTERIE_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&mut self) -> TFIE_W { TFIE_W { w: self } } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&mut self) -> CHIE_W { CHIE_W { w: self } } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&mut self) -> STALLIE_W { STALLIE_W { w: self } } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&mut self) -> NAKIE_W { NAKIE_W { w: self } } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&mut self) -> ACKIE_W { ACKIE_W { w: self } } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&mut self) -> USBERIE_W { USBERIE_W { w: self } } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&mut self) -> BBERIE_W { BBERIE_W { w: self } } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&mut self) -> REQOVRIE_W { REQOVRIE_W { w: self } } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&mut self) -> DTERIE_W { DTERIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-3 interrupt enable register (HCH3INTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch3inten](index.html) module"] pub struct HCH3INTEN_SPEC; impl crate::RegisterSpec for HCH3INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch3inten::R](R) reader structure"] impl crate::Readable for HCH3INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch3inten::W](W) writer structure"] impl crate::Writable for HCH3INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH3INTEN to value 0"] impl crate::Resettable for HCH3INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH4INTEN register accessor: an alias for `Reg`"] pub type HCH4INTEN = crate::Reg; #[doc = "host channel-4 interrupt enable register (HCH4INTEN)"] pub mod hch4inten { #[doc = "Register `HCH4INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH4INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TFIE` reader - Transfer completed interrupt enable"] pub struct TFIE_R(crate::FieldReader); impl TFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TFIE` writer - Transfer completed interrupt enable"] pub struct TFIE_W<'a> { w: &'a mut W, } impl<'a> TFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CHIE` reader - Channel halted interrupt enable"] pub struct CHIE_R(crate::FieldReader); impl CHIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHIE` writer - Channel halted interrupt enable"] pub struct CHIE_W<'a> { w: &'a mut W, } impl<'a> CHIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALLIE` reader - STALL interrupt enable"] pub struct STALLIE_R(crate::FieldReader); impl STALLIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALLIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALLIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALLIE` writer - STALL interrupt enable"] pub struct STALLIE_W<'a> { w: &'a mut W, } impl<'a> STALLIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAKIE` reader - NAK interrupt enable"] pub struct NAKIE_R(crate::FieldReader); impl NAKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAKIE` writer - NAK interrupt enable"] pub struct NAKIE_W<'a> { w: &'a mut W, } impl<'a> NAKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACKIE` reader - ACK interrupt enable"] pub struct ACKIE_R(crate::FieldReader); impl ACKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACKIE` writer - ACK interrupt enable"] pub struct ACKIE_W<'a> { w: &'a mut W, } impl<'a> ACKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBERIE` reader - USB bus error interrupt enable"] pub struct USBERIE_R(crate::FieldReader); impl USBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBERIE` writer - USB bus error interrupt enable"] pub struct USBERIE_W<'a> { w: &'a mut W, } impl<'a> USBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBERIE` reader - Babble error interrupt enable"] pub struct BBERIE_R(crate::FieldReader); impl BBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBERIE` writer - Babble error interrupt enable"] pub struct BBERIE_W<'a> { w: &'a mut W, } impl<'a> BBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVRIE` reader - request queue overrun interrupt enable"] pub struct REQOVRIE_R(crate::FieldReader); impl REQOVRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVRIE` writer - request queue overrun interrupt enable"] pub struct REQOVRIE_W<'a> { w: &'a mut W, } impl<'a> REQOVRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTERIE` reader - Data toggle error interrupt enable"] pub struct DTERIE_R(crate::FieldReader); impl DTERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTERIE` writer - Data toggle error interrupt enable"] pub struct DTERIE_W<'a> { w: &'a mut W, } impl<'a> DTERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&self) -> TFIE_R { TFIE_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&self) -> CHIE_R { CHIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&self) -> STALLIE_R { STALLIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&self) -> NAKIE_R { NAKIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&self) -> ACKIE_R { ACKIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&self) -> USBERIE_R { USBERIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&self) -> BBERIE_R { BBERIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&self) -> REQOVRIE_R { REQOVRIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&self) -> DTERIE_R { DTERIE_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&mut self) -> TFIE_W { TFIE_W { w: self } } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&mut self) -> CHIE_W { CHIE_W { w: self } } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&mut self) -> STALLIE_W { STALLIE_W { w: self } } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&mut self) -> NAKIE_W { NAKIE_W { w: self } } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&mut self) -> ACKIE_W { ACKIE_W { w: self } } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&mut self) -> USBERIE_W { USBERIE_W { w: self } } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&mut self) -> BBERIE_W { BBERIE_W { w: self } } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&mut self) -> REQOVRIE_W { REQOVRIE_W { w: self } } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&mut self) -> DTERIE_W { DTERIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-4 interrupt enable register (HCH4INTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch4inten](index.html) module"] pub struct HCH4INTEN_SPEC; impl crate::RegisterSpec for HCH4INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch4inten::R](R) reader structure"] impl crate::Readable for HCH4INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch4inten::W](W) writer structure"] impl crate::Writable for HCH4INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH4INTEN to value 0"] impl crate::Resettable for HCH4INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH5INTEN register accessor: an alias for `Reg`"] pub type HCH5INTEN = crate::Reg; #[doc = "host channel-5 interrupt enable register (HCH5INTEN)"] pub mod hch5inten { #[doc = "Register `HCH5INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH5INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TFIE` reader - Transfer completed interrupt enable"] pub struct TFIE_R(crate::FieldReader); impl TFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TFIE` writer - Transfer completed interrupt enable"] pub struct TFIE_W<'a> { w: &'a mut W, } impl<'a> TFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CHIE` reader - Channel halted interrupt enable"] pub struct CHIE_R(crate::FieldReader); impl CHIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHIE` writer - Channel halted interrupt enable"] pub struct CHIE_W<'a> { w: &'a mut W, } impl<'a> CHIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALLIE` reader - STALL interrupt enable"] pub struct STALLIE_R(crate::FieldReader); impl STALLIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALLIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALLIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALLIE` writer - STALL interrupt enable"] pub struct STALLIE_W<'a> { w: &'a mut W, } impl<'a> STALLIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAKIE` reader - NAK interrupt enable"] pub struct NAKIE_R(crate::FieldReader); impl NAKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAKIE` writer - NAK interrupt enable"] pub struct NAKIE_W<'a> { w: &'a mut W, } impl<'a> NAKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACKIE` reader - ACK interrupt enable"] pub struct ACKIE_R(crate::FieldReader); impl ACKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACKIE` writer - ACK interrupt enable"] pub struct ACKIE_W<'a> { w: &'a mut W, } impl<'a> ACKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBERIE` reader - USB bus error interrupt enable"] pub struct USBERIE_R(crate::FieldReader); impl USBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBERIE` writer - USB bus error interrupt enable"] pub struct USBERIE_W<'a> { w: &'a mut W, } impl<'a> USBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBERIE` reader - Babble error interrupt enable"] pub struct BBERIE_R(crate::FieldReader); impl BBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBERIE` writer - Babble error interrupt enable"] pub struct BBERIE_W<'a> { w: &'a mut W, } impl<'a> BBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVRIE` reader - request queue overrun interrupt enable"] pub struct REQOVRIE_R(crate::FieldReader); impl REQOVRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVRIE` writer - request queue overrun interrupt enable"] pub struct REQOVRIE_W<'a> { w: &'a mut W, } impl<'a> REQOVRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTERIE` reader - Data toggle error interrupt enable"] pub struct DTERIE_R(crate::FieldReader); impl DTERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTERIE` writer - Data toggle error interrupt enable"] pub struct DTERIE_W<'a> { w: &'a mut W, } impl<'a> DTERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&self) -> TFIE_R { TFIE_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&self) -> CHIE_R { CHIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&self) -> STALLIE_R { STALLIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&self) -> NAKIE_R { NAKIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&self) -> ACKIE_R { ACKIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&self) -> USBERIE_R { USBERIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&self) -> BBERIE_R { BBERIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&self) -> REQOVRIE_R { REQOVRIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&self) -> DTERIE_R { DTERIE_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&mut self) -> TFIE_W { TFIE_W { w: self } } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&mut self) -> CHIE_W { CHIE_W { w: self } } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&mut self) -> STALLIE_W { STALLIE_W { w: self } } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&mut self) -> NAKIE_W { NAKIE_W { w: self } } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&mut self) -> ACKIE_W { ACKIE_W { w: self } } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&mut self) -> USBERIE_W { USBERIE_W { w: self } } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&mut self) -> BBERIE_W { BBERIE_W { w: self } } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&mut self) -> REQOVRIE_W { REQOVRIE_W { w: self } } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&mut self) -> DTERIE_W { DTERIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-5 interrupt enable register (HCH5INTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch5inten](index.html) module"] pub struct HCH5INTEN_SPEC; impl crate::RegisterSpec for HCH5INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch5inten::R](R) reader structure"] impl crate::Readable for HCH5INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch5inten::W](W) writer structure"] impl crate::Writable for HCH5INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH5INTEN to value 0"] impl crate::Resettable for HCH5INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH6INTEN register accessor: an alias for `Reg`"] pub type HCH6INTEN = crate::Reg; #[doc = "host channel-6 interrupt enable register (HCH6INTEN)"] pub mod hch6inten { #[doc = "Register `HCH6INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH6INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TFIE` reader - Transfer completed interrupt enable"] pub struct TFIE_R(crate::FieldReader); impl TFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TFIE` writer - Transfer completed interrupt enable"] pub struct TFIE_W<'a> { w: &'a mut W, } impl<'a> TFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CHIE` reader - Channel halted interrupt enable"] pub struct CHIE_R(crate::FieldReader); impl CHIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHIE` writer - Channel halted interrupt enable"] pub struct CHIE_W<'a> { w: &'a mut W, } impl<'a> CHIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALLIE` reader - STALL interrupt enable"] pub struct STALLIE_R(crate::FieldReader); impl STALLIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALLIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALLIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALLIE` writer - STALL interrupt enable"] pub struct STALLIE_W<'a> { w: &'a mut W, } impl<'a> STALLIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAKIE` reader - NAK interrupt enable"] pub struct NAKIE_R(crate::FieldReader); impl NAKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAKIE` writer - NAK interrupt enable"] pub struct NAKIE_W<'a> { w: &'a mut W, } impl<'a> NAKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACKIE` reader - ACK interrupt enable"] pub struct ACKIE_R(crate::FieldReader); impl ACKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACKIE` writer - ACK interrupt enable"] pub struct ACKIE_W<'a> { w: &'a mut W, } impl<'a> ACKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBERIE` reader - USB bus error interrupt enable"] pub struct USBERIE_R(crate::FieldReader); impl USBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBERIE` writer - USB bus error interrupt enable"] pub struct USBERIE_W<'a> { w: &'a mut W, } impl<'a> USBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBERIE` reader - Babble error interrupt enable"] pub struct BBERIE_R(crate::FieldReader); impl BBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBERIE` writer - Babble error interrupt enable"] pub struct BBERIE_W<'a> { w: &'a mut W, } impl<'a> BBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVRIE` reader - request queue overrun interrupt enable"] pub struct REQOVRIE_R(crate::FieldReader); impl REQOVRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVRIE` writer - request queue overrun interrupt enable"] pub struct REQOVRIE_W<'a> { w: &'a mut W, } impl<'a> REQOVRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTERIE` reader - Data toggle error interrupt enable"] pub struct DTERIE_R(crate::FieldReader); impl DTERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTERIE` writer - Data toggle error interrupt enable"] pub struct DTERIE_W<'a> { w: &'a mut W, } impl<'a> DTERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&self) -> TFIE_R { TFIE_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&self) -> CHIE_R { CHIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&self) -> STALLIE_R { STALLIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&self) -> NAKIE_R { NAKIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&self) -> ACKIE_R { ACKIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&self) -> USBERIE_R { USBERIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&self) -> BBERIE_R { BBERIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&self) -> REQOVRIE_R { REQOVRIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&self) -> DTERIE_R { DTERIE_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&mut self) -> TFIE_W { TFIE_W { w: self } } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&mut self) -> CHIE_W { CHIE_W { w: self } } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&mut self) -> STALLIE_W { STALLIE_W { w: self } } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&mut self) -> NAKIE_W { NAKIE_W { w: self } } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&mut self) -> ACKIE_W { ACKIE_W { w: self } } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&mut self) -> USBERIE_W { USBERIE_W { w: self } } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&mut self) -> BBERIE_W { BBERIE_W { w: self } } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&mut self) -> REQOVRIE_W { REQOVRIE_W { w: self } } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&mut self) -> DTERIE_W { DTERIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-6 interrupt enable register (HCH6INTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch6inten](index.html) module"] pub struct HCH6INTEN_SPEC; impl crate::RegisterSpec for HCH6INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch6inten::R](R) reader structure"] impl crate::Readable for HCH6INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch6inten::W](W) writer structure"] impl crate::Writable for HCH6INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH6INTEN to value 0"] impl crate::Resettable for HCH6INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH7INTEN register accessor: an alias for `Reg`"] pub type HCH7INTEN = crate::Reg; #[doc = "host channel-7 interrupt enable register (HCH7INTEN)"] pub mod hch7inten { #[doc = "Register `HCH7INTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH7INTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TFIE` reader - Transfer completed interrupt enable"] pub struct TFIE_R(crate::FieldReader); impl TFIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TFIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TFIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TFIE` writer - Transfer completed interrupt enable"] pub struct TFIE_W<'a> { w: &'a mut W, } impl<'a> TFIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `CHIE` reader - Channel halted interrupt enable"] pub struct CHIE_R(crate::FieldReader); impl CHIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CHIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CHIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CHIE` writer - Channel halted interrupt enable"] pub struct CHIE_W<'a> { w: &'a mut W, } impl<'a> CHIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STALLIE` reader - STALL interrupt enable"] pub struct STALLIE_R(crate::FieldReader); impl STALLIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALLIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALLIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALLIE` writer - STALL interrupt enable"] pub struct STALLIE_W<'a> { w: &'a mut W, } impl<'a> STALLIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `NAKIE` reader - NAK interrupt enable"] pub struct NAKIE_R(crate::FieldReader); impl NAKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAKIE` writer - NAK interrupt enable"] pub struct NAKIE_W<'a> { w: &'a mut W, } impl<'a> NAKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `ACKIE` reader - ACK interrupt enable"] pub struct ACKIE_R(crate::FieldReader); impl ACKIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { ACKIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ACKIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ACKIE` writer - ACK interrupt enable"] pub struct ACKIE_W<'a> { w: &'a mut W, } impl<'a> ACKIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); self.w } } #[doc = "Field `USBERIE` reader - USB bus error interrupt enable"] pub struct USBERIE_R(crate::FieldReader); impl USBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { USBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for USBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `USBERIE` writer - USB bus error interrupt enable"] pub struct USBERIE_W<'a> { w: &'a mut W, } impl<'a> USBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `BBERIE` reader - Babble error interrupt enable"] pub struct BBERIE_R(crate::FieldReader); impl BBERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BBERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BBERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BBERIE` writer - Babble error interrupt enable"] pub struct BBERIE_W<'a> { w: &'a mut W, } impl<'a> BBERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `REQOVRIE` reader - request queue overrun interrupt enable"] pub struct REQOVRIE_R(crate::FieldReader); impl REQOVRIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { REQOVRIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for REQOVRIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `REQOVRIE` writer - request queue overrun interrupt enable"] pub struct REQOVRIE_W<'a> { w: &'a mut W, } impl<'a> REQOVRIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `DTERIE` reader - Data toggle error interrupt enable"] pub struct DTERIE_R(crate::FieldReader); impl DTERIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { DTERIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DTERIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DTERIE` writer - Data toggle error interrupt enable"] pub struct DTERIE_W<'a> { w: &'a mut W, } impl<'a> DTERIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } impl R { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&self) -> TFIE_R { TFIE_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&self) -> CHIE_R { CHIE_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&self) -> STALLIE_R { STALLIE_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&self) -> NAKIE_R { NAKIE_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&self) -> ACKIE_R { ACKIE_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&self) -> USBERIE_R { USBERIE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&self) -> BBERIE_R { BBERIE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&self) -> REQOVRIE_R { REQOVRIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&self) -> DTERIE_R { DTERIE_R::new(((self.bits >> 10) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer completed interrupt enable"] #[inline(always)] pub fn tfie(&mut self) -> TFIE_W { TFIE_W { w: self } } #[doc = "Bit 1 - Channel halted interrupt enable"] #[inline(always)] pub fn chie(&mut self) -> CHIE_W { CHIE_W { w: self } } #[doc = "Bit 3 - STALL interrupt enable"] #[inline(always)] pub fn stallie(&mut self) -> STALLIE_W { STALLIE_W { w: self } } #[doc = "Bit 4 - NAK interrupt enable"] #[inline(always)] pub fn nakie(&mut self) -> NAKIE_W { NAKIE_W { w: self } } #[doc = "Bit 5 - ACK interrupt enable"] #[inline(always)] pub fn ackie(&mut self) -> ACKIE_W { ACKIE_W { w: self } } #[doc = "Bit 7 - USB bus error interrupt enable"] #[inline(always)] pub fn usberie(&mut self) -> USBERIE_W { USBERIE_W { w: self } } #[doc = "Bit 8 - Babble error interrupt enable"] #[inline(always)] pub fn bberie(&mut self) -> BBERIE_W { BBERIE_W { w: self } } #[doc = "Bit 9 - request queue overrun interrupt enable"] #[inline(always)] pub fn reqovrie(&mut self) -> REQOVRIE_W { REQOVRIE_W { w: self } } #[doc = "Bit 10 - Data toggle error interrupt enable"] #[inline(always)] pub fn dterie(&mut self) -> DTERIE_W { DTERIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-7 interrupt enable register (HCH7INTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch7inten](index.html) module"] pub struct HCH7INTEN_SPEC; impl crate::RegisterSpec for HCH7INTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch7inten::R](R) reader structure"] impl crate::Readable for HCH7INTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch7inten::W](W) writer structure"] impl crate::Writable for HCH7INTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH7INTEN to value 0"] impl crate::Resettable for HCH7INTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH0LEN register accessor: an alias for `Reg`"] pub type HCH0LEN = crate::Reg; #[doc = "host channel-0 transfer length register"] pub mod hch0len { #[doc = "Register `HCH0LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH0LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` writer - Data PID"] pub struct DPID_W<'a> { w: &'a mut W, } impl<'a> DPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } impl R { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 29) & 0x03) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&mut self) -> DPID_W { DPID_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-0 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch0len](index.html) module"] pub struct HCH0LEN_SPEC; impl crate::RegisterSpec for HCH0LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch0len::R](R) reader structure"] impl crate::Readable for HCH0LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch0len::W](W) writer structure"] impl crate::Writable for HCH0LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH0LEN to value 0"] impl crate::Resettable for HCH0LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH1LEN register accessor: an alias for `Reg`"] pub type HCH1LEN = crate::Reg; #[doc = "host channel-1 transfer length register"] pub mod hch1len { #[doc = "Register `HCH1LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH1LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` writer - Data PID"] pub struct DPID_W<'a> { w: &'a mut W, } impl<'a> DPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } impl R { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 29) & 0x03) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&mut self) -> DPID_W { DPID_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-1 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch1len](index.html) module"] pub struct HCH1LEN_SPEC; impl crate::RegisterSpec for HCH1LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch1len::R](R) reader structure"] impl crate::Readable for HCH1LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch1len::W](W) writer structure"] impl crate::Writable for HCH1LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH1LEN to value 0"] impl crate::Resettable for HCH1LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH2LEN register accessor: an alias for `Reg`"] pub type HCH2LEN = crate::Reg; #[doc = "host channel-2 transfer length register"] pub mod hch2len { #[doc = "Register `HCH2LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH2LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` writer - Data PID"] pub struct DPID_W<'a> { w: &'a mut W, } impl<'a> DPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } impl R { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 29) & 0x03) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&mut self) -> DPID_W { DPID_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-2 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch2len](index.html) module"] pub struct HCH2LEN_SPEC; impl crate::RegisterSpec for HCH2LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch2len::R](R) reader structure"] impl crate::Readable for HCH2LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch2len::W](W) writer structure"] impl crate::Writable for HCH2LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH2LEN to value 0"] impl crate::Resettable for HCH2LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH3LEN register accessor: an alias for `Reg`"] pub type HCH3LEN = crate::Reg; #[doc = "host channel-3 transfer length register"] pub mod hch3len { #[doc = "Register `HCH3LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH3LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` writer - Data PID"] pub struct DPID_W<'a> { w: &'a mut W, } impl<'a> DPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } impl R { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 29) & 0x03) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&mut self) -> DPID_W { DPID_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-3 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch3len](index.html) module"] pub struct HCH3LEN_SPEC; impl crate::RegisterSpec for HCH3LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch3len::R](R) reader structure"] impl crate::Readable for HCH3LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch3len::W](W) writer structure"] impl crate::Writable for HCH3LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH3LEN to value 0"] impl crate::Resettable for HCH3LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH4LEN register accessor: an alias for `Reg`"] pub type HCH4LEN = crate::Reg; #[doc = "host channel-4 transfer length register"] pub mod hch4len { #[doc = "Register `HCH4LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH4LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` writer - Data PID"] pub struct DPID_W<'a> { w: &'a mut W, } impl<'a> DPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } impl R { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 29) & 0x03) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&mut self) -> DPID_W { DPID_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-4 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch4len](index.html) module"] pub struct HCH4LEN_SPEC; impl crate::RegisterSpec for HCH4LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch4len::R](R) reader structure"] impl crate::Readable for HCH4LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch4len::W](W) writer structure"] impl crate::Writable for HCH4LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH4LEN to value 0"] impl crate::Resettable for HCH4LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH5LEN register accessor: an alias for `Reg`"] pub type HCH5LEN = crate::Reg; #[doc = "host channel-5 transfer length register"] pub mod hch5len { #[doc = "Register `HCH5LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH5LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` writer - Data PID"] pub struct DPID_W<'a> { w: &'a mut W, } impl<'a> DPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } impl R { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 29) & 0x03) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&mut self) -> DPID_W { DPID_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-5 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch5len](index.html) module"] pub struct HCH5LEN_SPEC; impl crate::RegisterSpec for HCH5LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch5len::R](R) reader structure"] impl crate::Readable for HCH5LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch5len::W](W) writer structure"] impl crate::Writable for HCH5LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH5LEN to value 0"] impl crate::Resettable for HCH5LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH6LEN register accessor: an alias for `Reg`"] pub type HCH6LEN = crate::Reg; #[doc = "host channel-6 transfer length register"] pub mod hch6len { #[doc = "Register `HCH6LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH6LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` writer - Data PID"] pub struct DPID_W<'a> { w: &'a mut W, } impl<'a> DPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } impl R { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 29) & 0x03) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&mut self) -> DPID_W { DPID_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-6 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch6len](index.html) module"] pub struct HCH6LEN_SPEC; impl crate::RegisterSpec for HCH6LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch6len::R](R) reader structure"] impl crate::Readable for HCH6LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch6len::W](W) writer structure"] impl crate::Writable for HCH6LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH6LEN to value 0"] impl crate::Resettable for HCH6LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "HCH7LEN register accessor: an alias for `Reg`"] pub type HCH7LEN = crate::Reg; #[doc = "host channel-7 transfer length register"] pub mod hch7len { #[doc = "Register `HCH7LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `HCH7LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `DPID` reader - Data PID"] pub struct DPID_R(crate::FieldReader); impl DPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DPID` writer - Data PID"] pub struct DPID_W<'a> { w: &'a mut W, } impl<'a> DPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } impl R { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&self) -> DPID_R { DPID_R::new(((self.bits >> 29) & 0x03) as u8) } } impl W { #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 29:30 - Data PID"] #[inline(always)] pub fn dpid(&mut self) -> DPID_W { DPID_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "host channel-7 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hch7len](index.html) module"] pub struct HCH7LEN_SPEC; impl crate::RegisterSpec for HCH7LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [hch7len::R](R) reader structure"] impl crate::Readable for HCH7LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [hch7len::W](W) writer structure"] impl crate::Writable for HCH7LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets HCH7LEN to value 0"] impl crate::Resettable for HCH7LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "USB on the go full speed device"] pub struct USBFS_DEVICE { _marker: PhantomData<*const ()>, } unsafe impl Send for USBFS_DEVICE {} impl USBFS_DEVICE { #[doc = r"Pointer to the register block"] pub const PTR: *const usbfs_device::RegisterBlock = 0x5000_0800 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const usbfs_device::RegisterBlock { Self::PTR } } impl Deref for USBFS_DEVICE { type Target = usbfs_device::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for USBFS_DEVICE { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("USBFS_DEVICE").finish() } } #[doc = "USB on the go full speed device"] pub mod usbfs_device { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - device configuration register (DCFG)"] pub dcfg: crate::Reg, #[doc = "0x04 - device control register (DCTL)"] pub dctl: crate::Reg, #[doc = "0x08 - device status register (DSTAT)"] pub dstat: crate::Reg, _reserved3: [u8; 0x04], #[doc = "0x10 - device IN endpoint common interrupt mask register (DIEPINTEN)"] pub diepinten: crate::Reg, #[doc = "0x14 - device OUT endpoint common interrupt enable register (DOEPINTEN)"] pub doepinten: crate::Reg, #[doc = "0x18 - device all endpoints interrupt register (DAEPINT)"] pub daepint: crate::Reg, #[doc = "0x1c - Device all endpoints interrupt enable register (DAEPINTEN)"] pub daepinten: crate::Reg, _reserved7: [u8; 0x08], #[doc = "0x28 - device VBUS discharge time register"] pub dvbusdt: crate::Reg, #[doc = "0x2c - device VBUS pulsing time register"] pub dvbuspt: crate::Reg, _reserved9: [u8; 0x04], #[doc = "0x34 - device IN endpoint FIFO empty interrupt enable register"] pub diepfeinten: crate::Reg, _reserved10: [u8; 0xc8], #[doc = "0x100 - device IN endpoint 0 control register (DIEP0CTL)"] pub diep0ctl: crate::Reg, _reserved11: [u8; 0x04], #[doc = "0x108 - device endpoint-0 interrupt register"] pub diep0intf: crate::Reg, _reserved12: [u8; 0x04], #[doc = "0x110 - device IN endpoint-0 transfer length register"] pub diep0len: crate::Reg, _reserved13: [u8; 0x04], #[doc = "0x118 - device IN endpoint 0 transmit FIFO status register"] pub diep0tfstat: crate::Reg, _reserved14: [u8; 0x04], #[doc = "0x120 - device in endpoint-1 control register"] pub diep1ctl: crate::Reg, _reserved15: [u8; 0x04], #[doc = "0x128 - device endpoint-1 interrupt register"] pub diep1intf: crate::Reg, _reserved16: [u8; 0x04], #[doc = "0x130 - device IN endpoint-1 transfer length register"] pub diep1len: crate::Reg, _reserved17: [u8; 0x04], #[doc = "0x138 - device IN endpoint 1 transmit FIFO status register"] pub diep1tfstat: crate::Reg, _reserved18: [u8; 0x04], #[doc = "0x140 - device endpoint-2 control register"] pub diep2ctl: crate::Reg, _reserved19: [u8; 0x04], #[doc = "0x148 - device endpoint-2 interrupt register"] pub diep2intf: crate::Reg, _reserved20: [u8; 0x04], #[doc = "0x150 - device IN endpoint-2 transfer length register"] pub diep2len: crate::Reg, _reserved21: [u8; 0x04], #[doc = "0x158 - device IN endpoint 2 transmit FIFO status register"] pub diep2tfstat: crate::Reg, _reserved22: [u8; 0x04], #[doc = "0x160 - device endpoint-3 control register"] pub diep3ctl: crate::Reg, _reserved23: [u8; 0x04], #[doc = "0x168 - device endpoint-3 interrupt register"] pub diep3intf: crate::Reg, _reserved24: [u8; 0x04], #[doc = "0x170 - device IN endpoint-3 transfer length register"] pub diep3len: crate::Reg, _reserved25: [u8; 0x04], #[doc = "0x178 - device IN endpoint 3 transmit FIFO status register"] pub diep3tfstat: crate::Reg, _reserved26: [u8; 0x0184], #[doc = "0x300 - device endpoint-0 control register"] pub doep0ctl: crate::Reg, _reserved27: [u8; 0x04], #[doc = "0x308 - device out endpoint-0 interrupt flag register"] pub doep0intf: crate::Reg, _reserved28: [u8; 0x04], #[doc = "0x310 - device OUT endpoint-0 transfer length register"] pub doep0len: crate::Reg, _reserved29: [u8; 0x0c], #[doc = "0x320 - device endpoint-1 control register"] pub doep1ctl: crate::Reg, _reserved30: [u8; 0x04], #[doc = "0x328 - device out endpoint-1 interrupt flag register"] pub doep1intf: crate::Reg, _reserved31: [u8; 0x04], #[doc = "0x330 - device OUT endpoint-1 transfer length register"] pub doep1len: crate::Reg, _reserved32: [u8; 0x0c], #[doc = "0x340 - device endpoint-2 control register"] pub doep2ctl: crate::Reg, _reserved33: [u8; 0x04], #[doc = "0x348 - device out endpoint-2 interrupt flag register"] pub doep2intf: crate::Reg, _reserved34: [u8; 0x04], #[doc = "0x350 - device OUT endpoint-2 transfer length register"] pub doep2len: crate::Reg, _reserved35: [u8; 0x0c], #[doc = "0x360 - device endpoint-3 control register"] pub doep3ctl: crate::Reg, _reserved36: [u8; 0x04], #[doc = "0x368 - device out endpoint-3 interrupt flag register"] pub doep3intf: crate::Reg, _reserved37: [u8; 0x04], #[doc = "0x370 - device OUT endpoint-3 transfer length register"] pub doep3len: crate::Reg, } #[doc = "DCFG register accessor: an alias for `Reg`"] pub type DCFG = crate::Reg; #[doc = "device configuration register (DCFG)"] pub mod dcfg { #[doc = "Register `DCFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DCFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DS` reader - Device speed"] pub struct DS_R(crate::FieldReader); impl DS_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DS` writer - Device speed"] pub struct DS_W<'a> { w: &'a mut W, } impl<'a> DS_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } #[doc = "Field `NZLSOH` reader - Non-zero-length status OUT handshake"] pub struct NZLSOH_R(crate::FieldReader); impl NZLSOH_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NZLSOH_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NZLSOH_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NZLSOH` writer - Non-zero-length status OUT handshake"] pub struct NZLSOH_W<'a> { w: &'a mut W, } impl<'a> NZLSOH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); self.w } } #[doc = "Field `DAR` reader - Device address"] pub struct DAR_R(crate::FieldReader); impl DAR_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { DAR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DAR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DAR` writer - Device address"] pub struct DAR_W<'a> { w: &'a mut W, } impl<'a> DAR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x7f << 4)) | ((value as u32 & 0x7f) << 4); self.w } } #[doc = "Field `EOPFT` reader - end of periodic frame time"] pub struct EOPFT_R(crate::FieldReader); impl EOPFT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EOPFT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOPFT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOPFT` writer - end of periodic frame time"] pub struct EOPFT_W<'a> { w: &'a mut W, } impl<'a> EOPFT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 11)) | ((value as u32 & 0x03) << 11); self.w } } impl R { #[doc = "Bits 0:1 - Device speed"] #[inline(always)] pub fn ds(&self) -> DS_R { DS_R::new((self.bits & 0x03) as u8) } #[doc = "Bit 2 - Non-zero-length status OUT handshake"] #[inline(always)] pub fn nzlsoh(&self) -> NZLSOH_R { NZLSOH_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bits 4:10 - Device address"] #[inline(always)] pub fn dar(&self) -> DAR_R { DAR_R::new(((self.bits >> 4) & 0x7f) as u8) } #[doc = "Bits 11:12 - end of periodic frame time"] #[inline(always)] pub fn eopft(&self) -> EOPFT_R { EOPFT_R::new(((self.bits >> 11) & 0x03) as u8) } } impl W { #[doc = "Bits 0:1 - Device speed"] #[inline(always)] pub fn ds(&mut self) -> DS_W { DS_W { w: self } } #[doc = "Bit 2 - Non-zero-length status OUT handshake"] #[inline(always)] pub fn nzlsoh(&mut self) -> NZLSOH_W { NZLSOH_W { w: self } } #[doc = "Bits 4:10 - Device address"] #[inline(always)] pub fn dar(&mut self) -> DAR_W { DAR_W { w: self } } #[doc = "Bits 11:12 - end of periodic frame time"] #[inline(always)] pub fn eopft(&mut self) -> EOPFT_W { EOPFT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device configuration register (DCFG)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcfg](index.html) module"] pub struct DCFG_SPEC; impl crate::RegisterSpec for DCFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dcfg::R](R) reader structure"] impl crate::Readable for DCFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dcfg::W](W) writer structure"] impl crate::Writable for DCFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets DCFG to value 0"] impl crate::Resettable for DCFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DCTL register accessor: an alias for `Reg`"] pub type DCTL = crate::Reg; #[doc = "device control register (DCTL)"] pub mod dctl { #[doc = "Register `DCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `RWKUP` reader - Remote wakeup"] pub struct RWKUP_R(crate::FieldReader); impl RWKUP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { RWKUP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for RWKUP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `RWKUP` writer - Remote wakeup"] pub struct RWKUP_W<'a> { w: &'a mut W, } impl<'a> RWKUP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `SD` reader - Soft disconnect"] pub struct SD_R(crate::FieldReader); impl SD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SD` writer - Soft disconnect"] pub struct SD_W<'a> { w: &'a mut W, } impl<'a> SD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `GINS` reader - Global IN NAK status"] pub struct GINS_R(crate::FieldReader); impl GINS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GINS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GINS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `GONS` reader - Global OUT NAK status"] pub struct GONS_R(crate::FieldReader); impl GONS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { GONS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for GONS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SGINAK` writer - Set global IN NAK"] pub struct SGINAK_W<'a> { w: &'a mut W, } impl<'a> SGINAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CGINAK` writer - Clear global IN NAK"] pub struct CGINAK_W<'a> { w: &'a mut W, } impl<'a> CGINAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); self.w } } #[doc = "Field `SGONAK` writer - Set global OUT NAK"] pub struct SGONAK_W<'a> { w: &'a mut W, } impl<'a> SGONAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `CGONAK` writer - Clear global OUT NAK"] pub struct CGONAK_W<'a> { w: &'a mut W, } impl<'a> CGONAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); self.w } } #[doc = "Field `POIF` reader - Power-on initialization flag"] pub struct POIF_R(crate::FieldReader); impl POIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { POIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for POIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `POIF` writer - Power-on initialization flag"] pub struct POIF_W<'a> { w: &'a mut W, } impl<'a> POIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); self.w } } impl R { #[doc = "Bit 0 - Remote wakeup"] #[inline(always)] pub fn rwkup(&self) -> RWKUP_R { RWKUP_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Soft disconnect"] #[inline(always)] pub fn sd(&self) -> SD_R { SD_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Global IN NAK status"] #[inline(always)] pub fn gins(&self) -> GINS_R { GINS_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Global OUT NAK status"] #[inline(always)] pub fn gons(&self) -> GONS_R { GONS_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 11 - Power-on initialization flag"] #[inline(always)] pub fn poif(&self) -> POIF_R { POIF_R::new(((self.bits >> 11) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Remote wakeup"] #[inline(always)] pub fn rwkup(&mut self) -> RWKUP_W { RWKUP_W { w: self } } #[doc = "Bit 1 - Soft disconnect"] #[inline(always)] pub fn sd(&mut self) -> SD_W { SD_W { w: self } } #[doc = "Bit 7 - Set global IN NAK"] #[inline(always)] pub fn sginak(&mut self) -> SGINAK_W { SGINAK_W { w: self } } #[doc = "Bit 8 - Clear global IN NAK"] #[inline(always)] pub fn cginak(&mut self) -> CGINAK_W { CGINAK_W { w: self } } #[doc = "Bit 9 - Set global OUT NAK"] #[inline(always)] pub fn sgonak(&mut self) -> SGONAK_W { SGONAK_W { w: self } } #[doc = "Bit 10 - Clear global OUT NAK"] #[inline(always)] pub fn cgonak(&mut self) -> CGONAK_W { CGONAK_W { w: self } } #[doc = "Bit 11 - Power-on initialization flag"] #[inline(always)] pub fn poif(&mut self) -> POIF_W { POIF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device control register (DCTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dctl](index.html) module"] pub struct DCTL_SPEC; impl crate::RegisterSpec for DCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dctl::R](R) reader structure"] impl crate::Readable for DCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dctl::W](W) writer structure"] impl crate::Writable for DCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets DCTL to value 0"] impl crate::Resettable for DCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DSTAT register accessor: an alias for `Reg`"] pub type DSTAT = crate::Reg; #[doc = "device status register (DSTAT)"] pub mod dstat { #[doc = "Register `DSTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `SPST` reader - Suspend status"] pub struct SPST_R(crate::FieldReader); impl SPST_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SPST_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SPST_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `ES` reader - Enumerated speed"] pub struct ES_R(crate::FieldReader); impl ES_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { ES_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for ES_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `FNRSOF` reader - Frame number of the received SOF"] pub struct FNRSOF_R(crate::FieldReader); impl FNRSOF_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { FNRSOF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for FNRSOF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 0 - Suspend status"] #[inline(always)] pub fn spst(&self) -> SPST_R { SPST_R::new((self.bits & 0x01) != 0) } #[doc = "Bits 1:2 - Enumerated speed"] #[inline(always)] pub fn es(&self) -> ES_R { ES_R::new(((self.bits >> 1) & 0x03) as u8) } #[doc = "Bits 8:21 - Frame number of the received SOF"] #[inline(always)] pub fn fnrsof(&self) -> FNRSOF_R { FNRSOF_R::new(((self.bits >> 8) & 0x3fff) as u16) } } #[doc = "device status register (DSTAT)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dstat](index.html) module"] pub struct DSTAT_SPEC; impl crate::RegisterSpec for DSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dstat::R](R) reader structure"] impl crate::Readable for DSTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets DSTAT to value 0"] impl crate::Resettable for DSTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DIEPINTEN register accessor: an alias for `Reg`"] pub type DIEPINTEN = crate::Reg; #[doc = "device IN endpoint common interrupt mask register (DIEPINTEN)"] pub mod diepinten { #[doc = "Register `DIEPINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEPINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TFEN` reader - Transfer finished interrupt enable"] pub struct TFEN_R(crate::FieldReader); impl TFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TFEN` writer - Transfer finished interrupt enable"] pub struct TFEN_W<'a> { w: &'a mut W, } impl<'a> TFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `EPDISEN` reader - Endpoint disabled interrupt enable"] pub struct EPDISEN_R(crate::FieldReader); impl EPDISEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDISEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDISEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDISEN` writer - Endpoint disabled interrupt enable"] pub struct EPDISEN_W<'a> { w: &'a mut W, } impl<'a> EPDISEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `CITOEN` reader - Control IN timeout condition interrupt enable (Non-isochronous endpoints)"] pub struct CITOEN_R(crate::FieldReader); impl CITOEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CITOEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CITOEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CITOEN` writer - Control IN timeout condition interrupt enable (Non-isochronous endpoints)"] pub struct CITOEN_W<'a> { w: &'a mut W, } impl<'a> CITOEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EPTXFUDEN` reader - Endpoint Tx FIFO underrun interrupt enable bit"] pub struct EPTXFUDEN_R(crate::FieldReader); impl EPTXFUDEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPTXFUDEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTXFUDEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTXFUDEN` writer - Endpoint Tx FIFO underrun interrupt enable bit"] pub struct EPTXFUDEN_W<'a> { w: &'a mut W, } impl<'a> EPTXFUDEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `IEPNEEN` reader - IN endpoint NAK effective interrupt enable"] pub struct IEPNEEN_R(crate::FieldReader); impl IEPNEEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IEPNEEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPNEEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPNEEN` writer - IN endpoint NAK effective interrupt enable"] pub struct IEPNEEN_W<'a> { w: &'a mut W, } impl<'a> IEPNEEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } impl R { #[doc = "Bit 0 - Transfer finished interrupt enable"] #[inline(always)] pub fn tfen(&self) -> TFEN_R { TFEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Endpoint disabled interrupt enable"] #[inline(always)] pub fn epdisen(&self) -> EPDISEN_R { EPDISEN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - Control IN timeout condition interrupt enable (Non-isochronous endpoints)"] #[inline(always)] pub fn citoen(&self) -> CITOEN_R { CITOEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Endpoint Tx FIFO underrun interrupt enable bit"] #[inline(always)] pub fn eptxfuden(&self) -> EPTXFUDEN_R { EPTXFUDEN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 6 - IN endpoint NAK effective interrupt enable"] #[inline(always)] pub fn iepneen(&self) -> IEPNEEN_R { IEPNEEN_R::new(((self.bits >> 6) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer finished interrupt enable"] #[inline(always)] pub fn tfen(&mut self) -> TFEN_W { TFEN_W { w: self } } #[doc = "Bit 1 - Endpoint disabled interrupt enable"] #[inline(always)] pub fn epdisen(&mut self) -> EPDISEN_W { EPDISEN_W { w: self } } #[doc = "Bit 3 - Control IN timeout condition interrupt enable (Non-isochronous endpoints)"] #[inline(always)] pub fn citoen(&mut self) -> CITOEN_W { CITOEN_W { w: self } } #[doc = "Bit 4 - Endpoint Tx FIFO underrun interrupt enable bit"] #[inline(always)] pub fn eptxfuden(&mut self) -> EPTXFUDEN_W { EPTXFUDEN_W { w: self } } #[doc = "Bit 6 - IN endpoint NAK effective interrupt enable"] #[inline(always)] pub fn iepneen(&mut self) -> IEPNEEN_W { IEPNEEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device IN endpoint common interrupt mask register (DIEPINTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diepinten](index.html) module"] pub struct DIEPINTEN_SPEC; impl crate::RegisterSpec for DIEPINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diepinten::R](R) reader structure"] impl crate::Readable for DIEPINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diepinten::W](W) writer structure"] impl crate::Writable for DIEPINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEPINTEN to value 0"] impl crate::Resettable for DIEPINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEPINTEN register accessor: an alias for `Reg`"] pub type DOEPINTEN = crate::Reg; #[doc = "device OUT endpoint common interrupt enable register (DOEPINTEN)"] pub mod doepinten { #[doc = "Register `DOEPINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEPINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TFEN` reader - Transfer finished interrupt enable"] pub struct TFEN_R(crate::FieldReader); impl TFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TFEN` writer - Transfer finished interrupt enable"] pub struct TFEN_W<'a> { w: &'a mut W, } impl<'a> TFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `EPDISEN` reader - Endpoint disabled interrupt enable"] pub struct EPDISEN_R(crate::FieldReader); impl EPDISEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDISEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDISEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDISEN` writer - Endpoint disabled interrupt enable"] pub struct EPDISEN_W<'a> { w: &'a mut W, } impl<'a> EPDISEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `STPFEN` reader - SETUP phase finished interrupt enable"] pub struct STPFEN_R(crate::FieldReader); impl STPFEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STPFEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STPFEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STPFEN` writer - SETUP phase finished interrupt enable"] pub struct STPFEN_W<'a> { w: &'a mut W, } impl<'a> STPFEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EPRXFOVREN` reader - Endpoint Rx FIFO overrun interrupt enable"] pub struct EPRXFOVREN_R(crate::FieldReader); impl EPRXFOVREN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPRXFOVREN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPRXFOVREN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPRXFOVREN` writer - Endpoint Rx FIFO overrun interrupt enable"] pub struct EPRXFOVREN_W<'a> { w: &'a mut W, } impl<'a> EPRXFOVREN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `BTBSTPEN` reader - Back-to-back SETUP packets interrupt enable"] pub struct BTBSTPEN_R(crate::FieldReader); impl BTBSTPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BTBSTPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BTBSTPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BTBSTPEN` writer - Back-to-back SETUP packets interrupt enable"] pub struct BTBSTPEN_W<'a> { w: &'a mut W, } impl<'a> BTBSTPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } impl R { #[doc = "Bit 0 - Transfer finished interrupt enable"] #[inline(always)] pub fn tfen(&self) -> TFEN_R { TFEN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Endpoint disabled interrupt enable"] #[inline(always)] pub fn epdisen(&self) -> EPDISEN_R { EPDISEN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 3 - SETUP phase finished interrupt enable"] #[inline(always)] pub fn stpfen(&self) -> STPFEN_R { STPFEN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Endpoint Rx FIFO overrun interrupt enable"] #[inline(always)] pub fn eprxfovren(&self) -> EPRXFOVREN_R { EPRXFOVREN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 6 - Back-to-back SETUP packets interrupt enable"] #[inline(always)] pub fn btbstpen(&self) -> BTBSTPEN_R { BTBSTPEN_R::new(((self.bits >> 6) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Transfer finished interrupt enable"] #[inline(always)] pub fn tfen(&mut self) -> TFEN_W { TFEN_W { w: self } } #[doc = "Bit 1 - Endpoint disabled interrupt enable"] #[inline(always)] pub fn epdisen(&mut self) -> EPDISEN_W { EPDISEN_W { w: self } } #[doc = "Bit 3 - SETUP phase finished interrupt enable"] #[inline(always)] pub fn stpfen(&mut self) -> STPFEN_W { STPFEN_W { w: self } } #[doc = "Bit 4 - Endpoint Rx FIFO overrun interrupt enable"] #[inline(always)] pub fn eprxfovren(&mut self) -> EPRXFOVREN_W { EPRXFOVREN_W { w: self } } #[doc = "Bit 6 - Back-to-back SETUP packets interrupt enable"] #[inline(always)] pub fn btbstpen(&mut self) -> BTBSTPEN_W { BTBSTPEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device OUT endpoint common interrupt enable register (DOEPINTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doepinten](index.html) module"] pub struct DOEPINTEN_SPEC; impl crate::RegisterSpec for DOEPINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doepinten::R](R) reader structure"] impl crate::Readable for DOEPINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doepinten::W](W) writer structure"] impl crate::Writable for DOEPINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEPINTEN to value 0"] impl crate::Resettable for DOEPINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DAEPINT register accessor: an alias for `Reg`"] pub type DAEPINT = crate::Reg; #[doc = "device all endpoints interrupt register (DAEPINT)"] pub mod daepint { #[doc = "Register `DAEPINT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `IEPITB` reader - Device all IN endpoint interrupt bits"] pub struct IEPITB_R(crate::FieldReader); impl IEPITB_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { IEPITB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPITB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OEPITB` reader - Device all OUT endpoint interrupt bits"] pub struct OEPITB_R(crate::FieldReader); impl OEPITB_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OEPITB_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OEPITB_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:3 - Device all IN endpoint interrupt bits"] #[inline(always)] pub fn iepitb(&self) -> IEPITB_R { IEPITB_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:19 - Device all OUT endpoint interrupt bits"] #[inline(always)] pub fn oepitb(&self) -> OEPITB_R { OEPITB_R::new(((self.bits >> 16) & 0x0f) as u8) } } #[doc = "device all endpoints interrupt register (DAEPINT)\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [daepint](index.html) module"] pub struct DAEPINT_SPEC; impl crate::RegisterSpec for DAEPINT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [daepint::R](R) reader structure"] impl crate::Readable for DAEPINT_SPEC { type Reader = R; } #[doc = "`reset()` method sets DAEPINT to value 0"] impl crate::Resettable for DAEPINT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DAEPINTEN register accessor: an alias for `Reg`"] pub type DAEPINTEN = crate::Reg; #[doc = "Device all endpoints interrupt enable register (DAEPINTEN)"] pub mod daepinten { #[doc = "Register `DAEPINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DAEPINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IEPIE` reader - IN EP interrupt interrupt enable bits"] pub struct IEPIE_R(crate::FieldReader); impl IEPIE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { IEPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPIE` writer - IN EP interrupt interrupt enable bits"] pub struct IEPIE_W<'a> { w: &'a mut W, } impl<'a> IEPIE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } #[doc = "Field `OEPIE` reader - OUT endpoint interrupt enable bits"] pub struct OEPIE_R(crate::FieldReader); impl OEPIE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { OEPIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for OEPIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `OEPIE` writer - OUT endpoint interrupt enable bits"] pub struct OEPIE_W<'a> { w: &'a mut W, } impl<'a> OEPIE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 16)) | ((value as u32 & 0x0f) << 16); self.w } } impl R { #[doc = "Bits 0:3 - IN EP interrupt interrupt enable bits"] #[inline(always)] pub fn iepie(&self) -> IEPIE_R { IEPIE_R::new((self.bits & 0x0f) as u8) } #[doc = "Bits 16:19 - OUT endpoint interrupt enable bits"] #[inline(always)] pub fn oepie(&self) -> OEPIE_R { OEPIE_R::new(((self.bits >> 16) & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - IN EP interrupt interrupt enable bits"] #[inline(always)] pub fn iepie(&mut self) -> IEPIE_W { IEPIE_W { w: self } } #[doc = "Bits 16:19 - OUT endpoint interrupt enable bits"] #[inline(always)] pub fn oepie(&mut self) -> OEPIE_W { OEPIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Device all endpoints interrupt enable register (DAEPINTEN)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [daepinten](index.html) module"] pub struct DAEPINTEN_SPEC; impl crate::RegisterSpec for DAEPINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [daepinten::R](R) reader structure"] impl crate::Readable for DAEPINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [daepinten::W](W) writer structure"] impl crate::Writable for DAEPINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DAEPINTEN to value 0"] impl crate::Resettable for DAEPINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DVBUSDT register accessor: an alias for `Reg`"] pub type DVBUSDT = crate::Reg; #[doc = "device VBUS discharge time register"] pub mod dvbusdt { #[doc = "Register `DVBUSDT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DVBUSDT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DVBUSDT` reader - Device VBUS discharge time"] pub struct DVBUSDT_R(crate::FieldReader); impl DVBUSDT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { DVBUSDT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DVBUSDT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DVBUSDT` writer - Device VBUS discharge time"] pub struct DVBUSDT_W<'a> { w: &'a mut W, } impl<'a> DVBUSDT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); self.w } } impl R { #[doc = "Bits 0:15 - Device VBUS discharge time"] #[inline(always)] pub fn dvbusdt(&self) -> DVBUSDT_R { DVBUSDT_R::new((self.bits & 0xffff) as u16) } } impl W { #[doc = "Bits 0:15 - Device VBUS discharge time"] #[inline(always)] pub fn dvbusdt(&mut self) -> DVBUSDT_W { DVBUSDT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device VBUS discharge time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dvbusdt](index.html) module"] pub struct DVBUSDT_SPEC; impl crate::RegisterSpec for DVBUSDT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dvbusdt::R](R) reader structure"] impl crate::Readable for DVBUSDT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dvbusdt::W](W) writer structure"] impl crate::Writable for DVBUSDT_SPEC { type Writer = W; } #[doc = "`reset()` method sets DVBUSDT to value 0x17d7"] impl crate::Resettable for DVBUSDT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x17d7 } } } #[doc = "DVBUSPT register accessor: an alias for `Reg`"] pub type DVBUSPT = crate::Reg; #[doc = "device VBUS pulsing time register"] pub mod dvbuspt { #[doc = "Register `DVBUSPT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DVBUSPT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `DVBUSPT` reader - Device VBUS pulsing time"] pub struct DVBUSPT_R(crate::FieldReader); impl DVBUSPT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { DVBUSPT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for DVBUSPT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `DVBUSPT` writer - Device VBUS pulsing time"] pub struct DVBUSPT_W<'a> { w: &'a mut W, } impl<'a> DVBUSPT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x0fff) | (value as u32 & 0x0fff); self.w } } impl R { #[doc = "Bits 0:11 - Device VBUS pulsing time"] #[inline(always)] pub fn dvbuspt(&self) -> DVBUSPT_R { DVBUSPT_R::new((self.bits & 0x0fff) as u16) } } impl W { #[doc = "Bits 0:11 - Device VBUS pulsing time"] #[inline(always)] pub fn dvbuspt(&mut self) -> DVBUSPT_W { DVBUSPT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device VBUS pulsing time register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dvbuspt](index.html) module"] pub struct DVBUSPT_SPEC; impl crate::RegisterSpec for DVBUSPT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [dvbuspt::R](R) reader structure"] impl crate::Readable for DVBUSPT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [dvbuspt::W](W) writer structure"] impl crate::Writable for DVBUSPT_SPEC { type Writer = W; } #[doc = "`reset()` method sets DVBUSPT to value 0x05b8"] impl crate::Resettable for DVBUSPT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x05b8 } } } #[doc = "DIEPFEINTEN register accessor: an alias for `Reg`"] pub type DIEPFEINTEN = crate::Reg; #[doc = "device IN endpoint FIFO empty interrupt enable register"] pub mod diepfeinten { #[doc = "Register `DIEPFEINTEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEPFEINTEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `IEPTXFEIE` reader - IN EP Tx FIFO empty interrupt enable bits"] pub struct IEPTXFEIE_R(crate::FieldReader); impl IEPTXFEIE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { IEPTXFEIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTXFEIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPTXFEIE` writer - IN EP Tx FIFO empty interrupt enable bits"] pub struct IEPTXFEIE_W<'a> { w: &'a mut W, } impl<'a> IEPTXFEIE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); self.w } } impl R { #[doc = "Bits 0:3 - IN EP Tx FIFO empty interrupt enable bits"] #[inline(always)] pub fn ieptxfeie(&self) -> IEPTXFEIE_R { IEPTXFEIE_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - IN EP Tx FIFO empty interrupt enable bits"] #[inline(always)] pub fn ieptxfeie(&mut self) -> IEPTXFEIE_W { IEPTXFEIE_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device IN endpoint FIFO empty interrupt enable register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diepfeinten](index.html) module"] pub struct DIEPFEINTEN_SPEC; impl crate::RegisterSpec for DIEPFEINTEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diepfeinten::R](R) reader structure"] impl crate::Readable for DIEPFEINTEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diepfeinten::W](W) writer structure"] impl crate::Writable for DIEPFEINTEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEPFEINTEN to value 0"] impl crate::Resettable for DIEPFEINTEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DIEP0CTL register accessor: an alias for `Reg`"] pub type DIEP0CTL = crate::Reg; #[doc = "device IN endpoint 0 control register (DIEP0CTL)"] pub mod diep0ctl { #[doc = "Register `DIEP0CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP0CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MPL` reader - Maximum packet length"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - Maximum packet length"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); self.w } } #[doc = "Field `EPACT` reader - endpoint active"] pub struct EPACT_R(crate::FieldReader); impl EPACT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPACT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPACT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAKS` reader - NAK status"] pub struct NAKS_R(crate::FieldReader); impl NAKS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` reader - STALL handshake"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL handshake"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `TXFNUM` reader - TxFIFO number"] pub struct TXFNUM_R(crate::FieldReader); impl TXFNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TXFNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TXFNUM` writer - TxFIFO number"] pub struct TXFNUM_W<'a> { w: &'a mut W, } impl<'a> TXFNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 22)) | ((value as u32 & 0x0f) << 22); self.w } } #[doc = "Field `CNAK` writer - Clear NAK"] pub struct CNAK_W<'a> { w: &'a mut W, } impl<'a> CNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `SNAK` writer - Set NAK"] pub struct SNAK_W<'a> { w: &'a mut W, } impl<'a> SNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `EPD` reader - Endpoint disable"] pub struct EPD_R(crate::FieldReader); impl EPD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPD` writer - Endpoint disable"] pub struct EPD_W<'a> { w: &'a mut W, } impl<'a> EPD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `EPEN` reader - Endpoint enable"] pub struct EPEN_R(crate::FieldReader); impl EPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPEN` writer - Endpoint enable"] pub struct EPEN_W<'a> { w: &'a mut W, } impl<'a> EPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } impl R { #[doc = "Bits 0:1 - Maximum packet length"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x03) as u8) } #[doc = "Bit 15 - endpoint active"] #[inline(always)] pub fn epact(&self) -> EPACT_R { EPACT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 17 - NAK status"] #[inline(always)] pub fn naks(&self) -> NAKS_R { NAKS_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bits 22:25 - TxFIFO number"] #[inline(always)] pub fn txfnum(&self) -> TXFNUM_R { TXFNUM_R::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&self) -> EPD_R { EPD_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&self) -> EPEN_R { EPEN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { #[doc = "Bits 0:1 - Maximum packet length"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bits 22:25 - TxFIFO number"] #[inline(always)] pub fn txfnum(&mut self) -> TXFNUM_W { TXFNUM_W { w: self } } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] pub fn cnak(&mut self) -> CNAK_W { CNAK_W { w: self } } #[doc = "Bit 27 - Set NAK"] #[inline(always)] pub fn snak(&mut self) -> SNAK_W { SNAK_W { w: self } } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&mut self) -> EPD_W { EPD_W { w: self } } #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&mut self) -> EPEN_W { EPEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device IN endpoint 0 control register (DIEP0CTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep0ctl](index.html) module"] pub struct DIEP0CTL_SPEC; impl crate::RegisterSpec for DIEP0CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep0ctl::R](R) reader structure"] impl crate::Readable for DIEP0CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep0ctl::W](W) writer structure"] impl crate::Writable for DIEP0CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP0CTL to value 0x8000"] impl crate::Resettable for DIEP0CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x8000 } } } #[doc = "DIEP1CTL register accessor: an alias for `Reg`"] pub type DIEP1CTL = crate::Reg; #[doc = "device in endpoint-1 control register"] pub mod diep1ctl { #[doc = "Register `DIEP1CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP1CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EPEN` reader - Endpoint enable"] pub struct EPEN_R(crate::FieldReader); impl EPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPEN` writer - Endpoint enable"] pub struct EPEN_W<'a> { w: &'a mut W, } impl<'a> EPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `EPD` reader - Endpoint disable"] pub struct EPD_R(crate::FieldReader); impl EPD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPD` writer - Endpoint disable"] pub struct EPD_W<'a> { w: &'a mut W, } impl<'a> EPD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `SD1PID_SODDFRM` writer - Set DATA1 PID/Set odd frame"] pub struct SD1PID_SODDFRM_W<'a> { w: &'a mut W, } impl<'a> SD1PID_SODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `SD0PID_SEVENFRM` writer - SD0PID/SEVNFRM"] pub struct SD0PID_SEVENFRM_W<'a> { w: &'a mut W, } impl<'a> SD0PID_SEVENFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `SNAK` writer - Set NAK"] pub struct SNAK_W<'a> { w: &'a mut W, } impl<'a> SNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CNAK` writer - Clear NAK"] pub struct CNAK_W<'a> { w: &'a mut W, } impl<'a> CNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `TXFNUM` reader - Tx FIFO number"] pub struct TXFNUM_R(crate::FieldReader); impl TXFNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TXFNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TXFNUM` writer - Tx FIFO number"] pub struct TXFNUM_W<'a> { w: &'a mut W, } impl<'a> TXFNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 22)) | ((value as u32 & 0x0f) << 22); self.w } } #[doc = "Field `STALL` reader - STALL handshake"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL handshake"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `NAKS` reader - NAK status"] pub struct NAKS_R(crate::FieldReader); impl NAKS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOFRM_DPID` reader - EOFRM/DPID"] pub struct EOFRM_DPID_R(crate::FieldReader); impl EOFRM_DPID_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOFRM_DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOFRM_DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` reader - Endpoint active"] pub struct EPACT_R(crate::FieldReader); impl EPACT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPACT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPACT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` writer - Endpoint active"] pub struct EPACT_W<'a> { w: &'a mut W, } impl<'a> EPACT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `MPL` reader - maximum packet length"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - maximum packet length"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } impl R { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&self) -> EPEN_R { EPEN_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&self) -> EPD_R { EPD_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bits 22:25 - Tx FIFO number"] #[inline(always)] pub fn txfnum(&self) -> TXFNUM_R { TXFNUM_R::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bit 17 - NAK status"] #[inline(always)] pub fn naks(&self) -> NAKS_R { NAKS_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - EOFRM/DPID"] #[inline(always)] pub fn eofrm_dpid(&self) -> EOFRM_DPID_R { EOFRM_DPID_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&self) -> EPACT_R { EPACT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } } impl W { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&mut self) -> EPEN_W { EPEN_W { w: self } } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&mut self) -> EPD_W { EPD_W { w: self } } #[doc = "Bit 29 - Set DATA1 PID/Set odd frame"] #[inline(always)] pub fn sd1pid_soddfrm(&mut self) -> SD1PID_SODDFRM_W { SD1PID_SODDFRM_W { w: self } } #[doc = "Bit 28 - SD0PID/SEVNFRM"] #[inline(always)] pub fn sd0pid_sevenfrm(&mut self) -> SD0PID_SEVENFRM_W { SD0PID_SEVENFRM_W { w: self } } #[doc = "Bit 27 - Set NAK"] #[inline(always)] pub fn snak(&mut self) -> SNAK_W { SNAK_W { w: self } } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] pub fn cnak(&mut self) -> CNAK_W { CNAK_W { w: self } } #[doc = "Bits 22:25 - Tx FIFO number"] #[inline(always)] pub fn txfnum(&mut self) -> TXFNUM_W { TXFNUM_W { w: self } } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&mut self) -> EPACT_W { EPACT_W { w: self } } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device in endpoint-1 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep1ctl](index.html) module"] pub struct DIEP1CTL_SPEC; impl crate::RegisterSpec for DIEP1CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep1ctl::R](R) reader structure"] impl crate::Readable for DIEP1CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep1ctl::W](W) writer structure"] impl crate::Writable for DIEP1CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP1CTL to value 0"] impl crate::Resettable for DIEP1CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DIEP2CTL register accessor: an alias for `Reg`"] pub type DIEP2CTL = crate::Reg; #[doc = "device endpoint-2 control register"] pub mod diep2ctl { #[doc = "Register `DIEP2CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP2CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EPEN` reader - Endpoint enable"] pub struct EPEN_R(crate::FieldReader); impl EPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPEN` writer - Endpoint enable"] pub struct EPEN_W<'a> { w: &'a mut W, } impl<'a> EPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `EPD` reader - Endpoint disable"] pub struct EPD_R(crate::FieldReader); impl EPD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPD` writer - Endpoint disable"] pub struct EPD_W<'a> { w: &'a mut W, } impl<'a> EPD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `SD1PID_SODDFRM` writer - Set DATA1 PID/Set odd frame"] pub struct SD1PID_SODDFRM_W<'a> { w: &'a mut W, } impl<'a> SD1PID_SODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `SD0PID_SEVENFRM` writer - SD0PID/SEVNFRM"] pub struct SD0PID_SEVENFRM_W<'a> { w: &'a mut W, } impl<'a> SD0PID_SEVENFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `SNAK` writer - Set NAK"] pub struct SNAK_W<'a> { w: &'a mut W, } impl<'a> SNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CNAK` writer - Clear NAK"] pub struct CNAK_W<'a> { w: &'a mut W, } impl<'a> CNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `TXFNUM` reader - Tx FIFO number"] pub struct TXFNUM_R(crate::FieldReader); impl TXFNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TXFNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TXFNUM` writer - Tx FIFO number"] pub struct TXFNUM_W<'a> { w: &'a mut W, } impl<'a> TXFNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 22)) | ((value as u32 & 0x0f) << 22); self.w } } #[doc = "Field `STALL` reader - STALL handshake"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL handshake"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `NAKS` reader - NAK status"] pub struct NAKS_R(crate::FieldReader); impl NAKS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOFRM_DPID` reader - EOFRM/DPID"] pub struct EOFRM_DPID_R(crate::FieldReader); impl EOFRM_DPID_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOFRM_DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOFRM_DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` reader - Endpoint active"] pub struct EPACT_R(crate::FieldReader); impl EPACT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPACT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPACT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` writer - Endpoint active"] pub struct EPACT_W<'a> { w: &'a mut W, } impl<'a> EPACT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `MPL` reader - maximum packet length"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - maximum packet length"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } impl R { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&self) -> EPEN_R { EPEN_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&self) -> EPD_R { EPD_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bits 22:25 - Tx FIFO number"] #[inline(always)] pub fn txfnum(&self) -> TXFNUM_R { TXFNUM_R::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bit 17 - NAK status"] #[inline(always)] pub fn naks(&self) -> NAKS_R { NAKS_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - EOFRM/DPID"] #[inline(always)] pub fn eofrm_dpid(&self) -> EOFRM_DPID_R { EOFRM_DPID_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&self) -> EPACT_R { EPACT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } } impl W { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&mut self) -> EPEN_W { EPEN_W { w: self } } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&mut self) -> EPD_W { EPD_W { w: self } } #[doc = "Bit 29 - Set DATA1 PID/Set odd frame"] #[inline(always)] pub fn sd1pid_soddfrm(&mut self) -> SD1PID_SODDFRM_W { SD1PID_SODDFRM_W { w: self } } #[doc = "Bit 28 - SD0PID/SEVNFRM"] #[inline(always)] pub fn sd0pid_sevenfrm(&mut self) -> SD0PID_SEVENFRM_W { SD0PID_SEVENFRM_W { w: self } } #[doc = "Bit 27 - Set NAK"] #[inline(always)] pub fn snak(&mut self) -> SNAK_W { SNAK_W { w: self } } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] pub fn cnak(&mut self) -> CNAK_W { CNAK_W { w: self } } #[doc = "Bits 22:25 - Tx FIFO number"] #[inline(always)] pub fn txfnum(&mut self) -> TXFNUM_W { TXFNUM_W { w: self } } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&mut self) -> EPACT_W { EPACT_W { w: self } } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device endpoint-2 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep2ctl](index.html) module"] pub struct DIEP2CTL_SPEC; impl crate::RegisterSpec for DIEP2CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep2ctl::R](R) reader structure"] impl crate::Readable for DIEP2CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep2ctl::W](W) writer structure"] impl crate::Writable for DIEP2CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP2CTL to value 0"] impl crate::Resettable for DIEP2CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DIEP3CTL register accessor: an alias for `Reg`"] pub type DIEP3CTL = crate::Reg; #[doc = "device endpoint-3 control register"] pub mod diep3ctl { #[doc = "Register `DIEP3CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP3CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EPEN` reader - Endpoint enable"] pub struct EPEN_R(crate::FieldReader); impl EPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPEN` writer - Endpoint enable"] pub struct EPEN_W<'a> { w: &'a mut W, } impl<'a> EPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `EPD` reader - Endpoint disable"] pub struct EPD_R(crate::FieldReader); impl EPD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPD` writer - Endpoint disable"] pub struct EPD_W<'a> { w: &'a mut W, } impl<'a> EPD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `SD1PID_SODDFRM` writer - Set DATA1 PID/Set odd frame"] pub struct SD1PID_SODDFRM_W<'a> { w: &'a mut W, } impl<'a> SD1PID_SODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `SD0PID_SEVENFRM` writer - SD0PID/SEVNFRM"] pub struct SD0PID_SEVENFRM_W<'a> { w: &'a mut W, } impl<'a> SD0PID_SEVENFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `SNAK` writer - Set NAK"] pub struct SNAK_W<'a> { w: &'a mut W, } impl<'a> SNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CNAK` writer - Clear NAK"] pub struct CNAK_W<'a> { w: &'a mut W, } impl<'a> CNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `TXFNUM` reader - Tx FIFO number"] pub struct TXFNUM_R(crate::FieldReader); impl TXFNUM_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TXFNUM_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFNUM_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TXFNUM` writer - Tx FIFO number"] pub struct TXFNUM_W<'a> { w: &'a mut W, } impl<'a> TXFNUM_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x0f << 22)) | ((value as u32 & 0x0f) << 22); self.w } } #[doc = "Field `STALL` reader - STALL handshake"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL handshake"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `NAKS` reader - NAK status"] pub struct NAKS_R(crate::FieldReader); impl NAKS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOFRM_DPID` reader - EOFRM/DPID"] pub struct EOFRM_DPID_R(crate::FieldReader); impl EOFRM_DPID_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOFRM_DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOFRM_DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` reader - Endpoint active"] pub struct EPACT_R(crate::FieldReader); impl EPACT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPACT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPACT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` writer - Endpoint active"] pub struct EPACT_W<'a> { w: &'a mut W, } impl<'a> EPACT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `MPL` reader - maximum packet length"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - maximum packet length"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } impl R { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&self) -> EPEN_R { EPEN_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&self) -> EPD_R { EPD_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bits 22:25 - Tx FIFO number"] #[inline(always)] pub fn txfnum(&self) -> TXFNUM_R { TXFNUM_R::new(((self.bits >> 22) & 0x0f) as u8) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bit 17 - NAK status"] #[inline(always)] pub fn naks(&self) -> NAKS_R { NAKS_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - EOFRM/DPID"] #[inline(always)] pub fn eofrm_dpid(&self) -> EOFRM_DPID_R { EOFRM_DPID_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&self) -> EPACT_R { EPACT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } } impl W { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&mut self) -> EPEN_W { EPEN_W { w: self } } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&mut self) -> EPD_W { EPD_W { w: self } } #[doc = "Bit 29 - Set DATA1 PID/Set odd frame"] #[inline(always)] pub fn sd1pid_soddfrm(&mut self) -> SD1PID_SODDFRM_W { SD1PID_SODDFRM_W { w: self } } #[doc = "Bit 28 - SD0PID/SEVNFRM"] #[inline(always)] pub fn sd0pid_sevenfrm(&mut self) -> SD0PID_SEVENFRM_W { SD0PID_SEVENFRM_W { w: self } } #[doc = "Bit 27 - Set NAK"] #[inline(always)] pub fn snak(&mut self) -> SNAK_W { SNAK_W { w: self } } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] pub fn cnak(&mut self) -> CNAK_W { CNAK_W { w: self } } #[doc = "Bits 22:25 - Tx FIFO number"] #[inline(always)] pub fn txfnum(&mut self) -> TXFNUM_W { TXFNUM_W { w: self } } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&mut self) -> EPACT_W { EPACT_W { w: self } } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device endpoint-3 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep3ctl](index.html) module"] pub struct DIEP3CTL_SPEC; impl crate::RegisterSpec for DIEP3CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep3ctl::R](R) reader structure"] impl crate::Readable for DIEP3CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep3ctl::W](W) writer structure"] impl crate::Writable for DIEP3CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP3CTL to value 0"] impl crate::Resettable for DIEP3CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEP0CTL register accessor: an alias for `Reg`"] pub type DOEP0CTL = crate::Reg; #[doc = "device endpoint-0 control register"] pub mod doep0ctl { #[doc = "Register `DOEP0CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP0CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EPEN` writer - Endpoint enable"] pub struct EPEN_W<'a> { w: &'a mut W, } impl<'a> EPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `EPD` reader - Endpoint disable"] pub struct EPD_R(crate::FieldReader); impl EPD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SNAK` writer - Set NAK"] pub struct SNAK_W<'a> { w: &'a mut W, } impl<'a> SNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CNAK` writer - Clear NAK"] pub struct CNAK_W<'a> { w: &'a mut W, } impl<'a> CNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `STALL` reader - STALL handshake"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL handshake"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `SNOOP` reader - Snoop mode"] pub struct SNOOP_R(crate::FieldReader); impl SNOOP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SNOOP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SNOOP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SNOOP` writer - Snoop mode"] pub struct SNOOP_W<'a> { w: &'a mut W, } impl<'a> SNOOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `NAKS` reader - NAK status"] pub struct NAKS_R(crate::FieldReader); impl NAKS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` reader - Endpoint active"] pub struct EPACT_R(crate::FieldReader); impl EPACT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPACT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPACT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` reader - Maximum packet length"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&self) -> EPD_R { EPD_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - Snoop mode"] #[inline(always)] pub fn snoop(&self) -> SNOOP_R { SNOOP_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bit 17 - NAK status"] #[inline(always)] pub fn naks(&self) -> NAKS_R { NAKS_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&self) -> EPACT_R { EPACT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 0:1 - Maximum packet length"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x03) as u8) } } impl W { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&mut self) -> EPEN_W { EPEN_W { w: self } } #[doc = "Bit 27 - Set NAK"] #[inline(always)] pub fn snak(&mut self) -> SNAK_W { SNAK_W { w: self } } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] pub fn cnak(&mut self) -> CNAK_W { CNAK_W { w: self } } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 20 - Snoop mode"] #[inline(always)] pub fn snoop(&mut self) -> SNOOP_W { SNOOP_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device endpoint-0 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep0ctl](index.html) module"] pub struct DOEP0CTL_SPEC; impl crate::RegisterSpec for DOEP0CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep0ctl::R](R) reader structure"] impl crate::Readable for DOEP0CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep0ctl::W](W) writer structure"] impl crate::Writable for DOEP0CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP0CTL to value 0x8000"] impl crate::Resettable for DOEP0CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x8000 } } } #[doc = "DOEP1CTL register accessor: an alias for `Reg`"] pub type DOEP1CTL = crate::Reg; #[doc = "device endpoint-1 control register"] pub mod doep1ctl { #[doc = "Register `DOEP1CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP1CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EPEN` reader - Endpoint enable"] pub struct EPEN_R(crate::FieldReader); impl EPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPEN` writer - Endpoint enable"] pub struct EPEN_W<'a> { w: &'a mut W, } impl<'a> EPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `EPD` reader - Endpoint disable"] pub struct EPD_R(crate::FieldReader); impl EPD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPD` writer - Endpoint disable"] pub struct EPD_W<'a> { w: &'a mut W, } impl<'a> EPD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `SD1PID_SODDFRM` writer - SD1PID/SODDFRM"] pub struct SD1PID_SODDFRM_W<'a> { w: &'a mut W, } impl<'a> SD1PID_SODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `SD0PID_SEVENFRM` writer - SD0PID/SEVENFRM"] pub struct SD0PID_SEVENFRM_W<'a> { w: &'a mut W, } impl<'a> SD0PID_SEVENFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `SNAK` writer - Set NAK"] pub struct SNAK_W<'a> { w: &'a mut W, } impl<'a> SNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CNAK` writer - Clear NAK"] pub struct CNAK_W<'a> { w: &'a mut W, } impl<'a> CNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `STALL` reader - STALL handshake"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL handshake"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `SNOOP` reader - Snoop mode"] pub struct SNOOP_R(crate::FieldReader); impl SNOOP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SNOOP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SNOOP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SNOOP` writer - Snoop mode"] pub struct SNOOP_W<'a> { w: &'a mut W, } impl<'a> SNOOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `NAKS` reader - NAK status"] pub struct NAKS_R(crate::FieldReader); impl NAKS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOFRM_DPID` reader - EOFRM/DPID"] pub struct EOFRM_DPID_R(crate::FieldReader); impl EOFRM_DPID_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOFRM_DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOFRM_DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` reader - Endpoint active"] pub struct EPACT_R(crate::FieldReader); impl EPACT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPACT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPACT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` writer - Endpoint active"] pub struct EPACT_W<'a> { w: &'a mut W, } impl<'a> EPACT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `MPL` reader - maximum packet length"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - maximum packet length"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } impl R { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&self) -> EPEN_R { EPEN_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&self) -> EPD_R { EPD_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - Snoop mode"] #[inline(always)] pub fn snoop(&self) -> SNOOP_R { SNOOP_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bit 17 - NAK status"] #[inline(always)] pub fn naks(&self) -> NAKS_R { NAKS_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - EOFRM/DPID"] #[inline(always)] pub fn eofrm_dpid(&self) -> EOFRM_DPID_R { EOFRM_DPID_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&self) -> EPACT_R { EPACT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } } impl W { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&mut self) -> EPEN_W { EPEN_W { w: self } } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&mut self) -> EPD_W { EPD_W { w: self } } #[doc = "Bit 29 - SD1PID/SODDFRM"] #[inline(always)] pub fn sd1pid_soddfrm(&mut self) -> SD1PID_SODDFRM_W { SD1PID_SODDFRM_W { w: self } } #[doc = "Bit 28 - SD0PID/SEVENFRM"] #[inline(always)] pub fn sd0pid_sevenfrm(&mut self) -> SD0PID_SEVENFRM_W { SD0PID_SEVENFRM_W { w: self } } #[doc = "Bit 27 - Set NAK"] #[inline(always)] pub fn snak(&mut self) -> SNAK_W { SNAK_W { w: self } } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] pub fn cnak(&mut self) -> CNAK_W { CNAK_W { w: self } } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 20 - Snoop mode"] #[inline(always)] pub fn snoop(&mut self) -> SNOOP_W { SNOOP_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&mut self) -> EPACT_W { EPACT_W { w: self } } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device endpoint-1 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep1ctl](index.html) module"] pub struct DOEP1CTL_SPEC; impl crate::RegisterSpec for DOEP1CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep1ctl::R](R) reader structure"] impl crate::Readable for DOEP1CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep1ctl::W](W) writer structure"] impl crate::Writable for DOEP1CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP1CTL to value 0"] impl crate::Resettable for DOEP1CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEP2CTL register accessor: an alias for `Reg`"] pub type DOEP2CTL = crate::Reg; #[doc = "device endpoint-2 control register"] pub mod doep2ctl { #[doc = "Register `DOEP2CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP2CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EPEN` reader - Endpoint enable"] pub struct EPEN_R(crate::FieldReader); impl EPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPEN` writer - Endpoint enable"] pub struct EPEN_W<'a> { w: &'a mut W, } impl<'a> EPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `EPD` reader - Endpoint disable"] pub struct EPD_R(crate::FieldReader); impl EPD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPD` writer - Endpoint disable"] pub struct EPD_W<'a> { w: &'a mut W, } impl<'a> EPD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `SD1PID_SODDFRM` writer - SD1PID/SODDFRM"] pub struct SD1PID_SODDFRM_W<'a> { w: &'a mut W, } impl<'a> SD1PID_SODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `SD0PID_SEVENFRM` writer - SD0PID/SEVENFRM"] pub struct SD0PID_SEVENFRM_W<'a> { w: &'a mut W, } impl<'a> SD0PID_SEVENFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `SNAK` writer - Set NAK"] pub struct SNAK_W<'a> { w: &'a mut W, } impl<'a> SNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CNAK` writer - Clear NAK"] pub struct CNAK_W<'a> { w: &'a mut W, } impl<'a> CNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `STALL` reader - STALL handshake"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL handshake"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `SNOOP` reader - Snoop mode"] pub struct SNOOP_R(crate::FieldReader); impl SNOOP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SNOOP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SNOOP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SNOOP` writer - Snoop mode"] pub struct SNOOP_W<'a> { w: &'a mut W, } impl<'a> SNOOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `NAKS` reader - NAK status"] pub struct NAKS_R(crate::FieldReader); impl NAKS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOFRM_DPID` reader - EOFRM/DPID"] pub struct EOFRM_DPID_R(crate::FieldReader); impl EOFRM_DPID_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOFRM_DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOFRM_DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` reader - Endpoint active"] pub struct EPACT_R(crate::FieldReader); impl EPACT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPACT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPACT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` writer - Endpoint active"] pub struct EPACT_W<'a> { w: &'a mut W, } impl<'a> EPACT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `MPL` reader - maximum packet length"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - maximum packet length"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } impl R { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&self) -> EPEN_R { EPEN_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&self) -> EPD_R { EPD_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - Snoop mode"] #[inline(always)] pub fn snoop(&self) -> SNOOP_R { SNOOP_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bit 17 - NAK status"] #[inline(always)] pub fn naks(&self) -> NAKS_R { NAKS_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - EOFRM/DPID"] #[inline(always)] pub fn eofrm_dpid(&self) -> EOFRM_DPID_R { EOFRM_DPID_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&self) -> EPACT_R { EPACT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } } impl W { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&mut self) -> EPEN_W { EPEN_W { w: self } } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&mut self) -> EPD_W { EPD_W { w: self } } #[doc = "Bit 29 - SD1PID/SODDFRM"] #[inline(always)] pub fn sd1pid_soddfrm(&mut self) -> SD1PID_SODDFRM_W { SD1PID_SODDFRM_W { w: self } } #[doc = "Bit 28 - SD0PID/SEVENFRM"] #[inline(always)] pub fn sd0pid_sevenfrm(&mut self) -> SD0PID_SEVENFRM_W { SD0PID_SEVENFRM_W { w: self } } #[doc = "Bit 27 - Set NAK"] #[inline(always)] pub fn snak(&mut self) -> SNAK_W { SNAK_W { w: self } } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] pub fn cnak(&mut self) -> CNAK_W { CNAK_W { w: self } } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 20 - Snoop mode"] #[inline(always)] pub fn snoop(&mut self) -> SNOOP_W { SNOOP_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&mut self) -> EPACT_W { EPACT_W { w: self } } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device endpoint-2 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep2ctl](index.html) module"] pub struct DOEP2CTL_SPEC; impl crate::RegisterSpec for DOEP2CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep2ctl::R](R) reader structure"] impl crate::Readable for DOEP2CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep2ctl::W](W) writer structure"] impl crate::Writable for DOEP2CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP2CTL to value 0"] impl crate::Resettable for DOEP2CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEP3CTL register accessor: an alias for `Reg`"] pub type DOEP3CTL = crate::Reg; #[doc = "device endpoint-3 control register"] pub mod doep3ctl { #[doc = "Register `DOEP3CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP3CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EPEN` reader - Endpoint enable"] pub struct EPEN_R(crate::FieldReader); impl EPEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPEN` writer - Endpoint enable"] pub struct EPEN_W<'a> { w: &'a mut W, } impl<'a> EPEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 31)) | ((value as u32 & 0x01) << 31); self.w } } #[doc = "Field `EPD` reader - Endpoint disable"] pub struct EPD_R(crate::FieldReader); impl EPD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPD` writer - Endpoint disable"] pub struct EPD_W<'a> { w: &'a mut W, } impl<'a> EPD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); self.w } } #[doc = "Field `SD1PID_SODDFRM` writer - SD1PID/SODDFRM"] pub struct SD1PID_SODDFRM_W<'a> { w: &'a mut W, } impl<'a> SD1PID_SODDFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); self.w } } #[doc = "Field `SD0PID_SEVENFRM` writer - SD0PID/SEVENFRM"] pub struct SD0PID_SEVENFRM_W<'a> { w: &'a mut W, } impl<'a> SD0PID_SEVENFRM_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 28)) | ((value as u32 & 0x01) << 28); self.w } } #[doc = "Field `SNAK` writer - Set NAK"] pub struct SNAK_W<'a> { w: &'a mut W, } impl<'a> SNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 27)) | ((value as u32 & 0x01) << 27); self.w } } #[doc = "Field `CNAK` writer - Clear NAK"] pub struct CNAK_W<'a> { w: &'a mut W, } impl<'a> CNAK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 26)) | ((value as u32 & 0x01) << 26); self.w } } #[doc = "Field `STALL` reader - STALL handshake"] pub struct STALL_R(crate::FieldReader); impl STALL_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STALL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STALL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STALL` writer - STALL handshake"] pub struct STALL_W<'a> { w: &'a mut W, } impl<'a> STALL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 21)) | ((value as u32 & 0x01) << 21); self.w } } #[doc = "Field `SNOOP` reader - Snoop mode"] pub struct SNOOP_R(crate::FieldReader); impl SNOOP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SNOOP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SNOOP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SNOOP` writer - Snoop mode"] pub struct SNOOP_W<'a> { w: &'a mut W, } impl<'a> SNOOP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 20)) | ((value as u32 & 0x01) << 20); self.w } } #[doc = "Field `EPTYPE` reader - Endpoint type"] pub struct EPTYPE_R(crate::FieldReader); impl EPTYPE_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { EPTYPE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTYPE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTYPE` writer - Endpoint type"] pub struct EPTYPE_W<'a> { w: &'a mut W, } impl<'a> EPTYPE_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 18)) | ((value as u32 & 0x03) << 18); self.w } } #[doc = "Field `NAKS` reader - NAK status"] pub struct NAKS_R(crate::FieldReader); impl NAKS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { NAKS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for NAKS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EOFRM_DPID` reader - EOFRM/DPID"] pub struct EOFRM_DPID_R(crate::FieldReader); impl EOFRM_DPID_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EOFRM_DPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EOFRM_DPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` reader - Endpoint active"] pub struct EPACT_R(crate::FieldReader); impl EPACT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPACT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPACT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPACT` writer - Endpoint active"] pub struct EPACT_W<'a> { w: &'a mut W, } impl<'a> EPACT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 15)) | ((value as u32 & 0x01) << 15); self.w } } #[doc = "Field `MPL` reader - maximum packet length"] pub struct MPL_R(crate::FieldReader); impl MPL_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { MPL_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MPL_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MPL` writer - maximum packet length"] pub struct MPL_W<'a> { w: &'a mut W, } impl<'a> MPL_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !0x07ff) | (value as u32 & 0x07ff); self.w } } impl R { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&self) -> EPEN_R { EPEN_R::new(((self.bits >> 31) & 0x01) != 0) } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&self) -> EPD_R { EPD_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&self) -> STALL_R { STALL_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 20 - Snoop mode"] #[inline(always)] pub fn snoop(&self) -> SNOOP_R { SNOOP_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&self) -> EPTYPE_R { EPTYPE_R::new(((self.bits >> 18) & 0x03) as u8) } #[doc = "Bit 17 - NAK status"] #[inline(always)] pub fn naks(&self) -> NAKS_R { NAKS_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 16 - EOFRM/DPID"] #[inline(always)] pub fn eofrm_dpid(&self) -> EOFRM_DPID_R { EOFRM_DPID_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&self) -> EPACT_R { EPACT_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&self) -> MPL_R { MPL_R::new((self.bits & 0x07ff) as u16) } } impl W { #[doc = "Bit 31 - Endpoint enable"] #[inline(always)] pub fn epen(&mut self) -> EPEN_W { EPEN_W { w: self } } #[doc = "Bit 30 - Endpoint disable"] #[inline(always)] pub fn epd(&mut self) -> EPD_W { EPD_W { w: self } } #[doc = "Bit 29 - SD1PID/SODDFRM"] #[inline(always)] pub fn sd1pid_soddfrm(&mut self) -> SD1PID_SODDFRM_W { SD1PID_SODDFRM_W { w: self } } #[doc = "Bit 28 - SD0PID/SEVENFRM"] #[inline(always)] pub fn sd0pid_sevenfrm(&mut self) -> SD0PID_SEVENFRM_W { SD0PID_SEVENFRM_W { w: self } } #[doc = "Bit 27 - Set NAK"] #[inline(always)] pub fn snak(&mut self) -> SNAK_W { SNAK_W { w: self } } #[doc = "Bit 26 - Clear NAK"] #[inline(always)] pub fn cnak(&mut self) -> CNAK_W { CNAK_W { w: self } } #[doc = "Bit 21 - STALL handshake"] #[inline(always)] pub fn stall(&mut self) -> STALL_W { STALL_W { w: self } } #[doc = "Bit 20 - Snoop mode"] #[inline(always)] pub fn snoop(&mut self) -> SNOOP_W { SNOOP_W { w: self } } #[doc = "Bits 18:19 - Endpoint type"] #[inline(always)] pub fn eptype(&mut self) -> EPTYPE_W { EPTYPE_W { w: self } } #[doc = "Bit 15 - Endpoint active"] #[inline(always)] pub fn epact(&mut self) -> EPACT_W { EPACT_W { w: self } } #[doc = "Bits 0:10 - maximum packet length"] #[inline(always)] pub fn mpl(&mut self) -> MPL_W { MPL_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device endpoint-3 control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep3ctl](index.html) module"] pub struct DOEP3CTL_SPEC; impl crate::RegisterSpec for DOEP3CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep3ctl::R](R) reader structure"] impl crate::Readable for DOEP3CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep3ctl::W](W) writer structure"] impl crate::Writable for DOEP3CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP3CTL to value 0"] impl crate::Resettable for DOEP3CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DIEP0INTF register accessor: an alias for `Reg`"] pub type DIEP0INTF = crate::Reg; #[doc = "device endpoint-0 interrupt register"] pub mod diep0intf { #[doc = "Register `DIEP0INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP0INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TXFE` reader - Transmit FIFO empty"] pub struct TXFE_R(crate::FieldReader); impl TXFE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TXFE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPNE` reader - IN endpoint NAK effective"] pub struct IEPNE_R(crate::FieldReader); impl IEPNE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IEPNE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPNE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPNE` writer - IN endpoint NAK effective"] pub struct IEPNE_W<'a> { w: &'a mut W, } impl<'a> IEPNE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `EPTXFUD` reader - Endpoint Tx FIFO underrun"] pub struct EPTXFUD_R(crate::FieldReader); impl EPTXFUD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPTXFUD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTXFUD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTXFUD` writer - Endpoint Tx FIFO underrun"] pub struct EPTXFUD_W<'a> { w: &'a mut W, } impl<'a> EPTXFUD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CITO` reader - Control in timeout interrupt"] pub struct CITO_R(crate::FieldReader); impl CITO_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CITO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CITO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CITO` writer - Control in timeout interrupt"] pub struct CITO_W<'a> { w: &'a mut W, } impl<'a> CITO_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EPDIS` reader - Endpoint finished"] pub struct EPDIS_R(crate::FieldReader); impl EPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIS` writer - Endpoint finished"] pub struct EPDIS_W<'a> { w: &'a mut W, } impl<'a> EPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 7 - Transmit FIFO empty"] #[inline(always)] pub fn txfe(&self) -> TXFE_R { TXFE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] pub fn iepne(&self) -> IEPNE_R { IEPNE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Endpoint Tx FIFO underrun"] #[inline(always)] pub fn eptxfud(&self) -> EPTXFUD_R { EPTXFUD_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Control in timeout interrupt"] #[inline(always)] pub fn cito(&self) -> CITO_R { CITO_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - Endpoint finished"] #[inline(always)] pub fn epdis(&self) -> EPDIS_R { EPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] pub fn iepne(&mut self) -> IEPNE_W { IEPNE_W { w: self } } #[doc = "Bit 4 - Endpoint Tx FIFO underrun"] #[inline(always)] pub fn eptxfud(&mut self) -> EPTXFUD_W { EPTXFUD_W { w: self } } #[doc = "Bit 3 - Control in timeout interrupt"] #[inline(always)] pub fn cito(&mut self) -> CITO_W { CITO_W { w: self } } #[doc = "Bit 1 - Endpoint finished"] #[inline(always)] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W { w: self } } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device endpoint-0 interrupt register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep0intf](index.html) module"] pub struct DIEP0INTF_SPEC; impl crate::RegisterSpec for DIEP0INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep0intf::R](R) reader structure"] impl crate::Readable for DIEP0INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep0intf::W](W) writer structure"] impl crate::Writable for DIEP0INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP0INTF to value 0x80"] impl crate::Resettable for DIEP0INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x80 } } } #[doc = "DIEP1INTF register accessor: an alias for `Reg`"] pub type DIEP1INTF = crate::Reg; #[doc = "device endpoint-1 interrupt register"] pub mod diep1intf { #[doc = "Register `DIEP1INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP1INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TXFE` reader - Transmit FIFO empty"] pub struct TXFE_R(crate::FieldReader); impl TXFE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TXFE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPNE` reader - IN endpoint NAK effective"] pub struct IEPNE_R(crate::FieldReader); impl IEPNE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IEPNE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPNE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPNE` writer - IN endpoint NAK effective"] pub struct IEPNE_W<'a> { w: &'a mut W, } impl<'a> IEPNE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `EPTXFUD` reader - Endpoint Tx FIFO underrun"] pub struct EPTXFUD_R(crate::FieldReader); impl EPTXFUD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPTXFUD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTXFUD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTXFUD` writer - Endpoint Tx FIFO underrun"] pub struct EPTXFUD_W<'a> { w: &'a mut W, } impl<'a> EPTXFUD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CITO` reader - Control in timeout interrupt"] pub struct CITO_R(crate::FieldReader); impl CITO_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CITO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CITO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CITO` writer - Control in timeout interrupt"] pub struct CITO_W<'a> { w: &'a mut W, } impl<'a> CITO_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EPDIS` reader - Endpoint finished"] pub struct EPDIS_R(crate::FieldReader); impl EPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIS` writer - Endpoint finished"] pub struct EPDIS_W<'a> { w: &'a mut W, } impl<'a> EPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 7 - Transmit FIFO empty"] #[inline(always)] pub fn txfe(&self) -> TXFE_R { TXFE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] pub fn iepne(&self) -> IEPNE_R { IEPNE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Endpoint Tx FIFO underrun"] #[inline(always)] pub fn eptxfud(&self) -> EPTXFUD_R { EPTXFUD_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Control in timeout interrupt"] #[inline(always)] pub fn cito(&self) -> CITO_R { CITO_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - Endpoint finished"] #[inline(always)] pub fn epdis(&self) -> EPDIS_R { EPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] pub fn iepne(&mut self) -> IEPNE_W { IEPNE_W { w: self } } #[doc = "Bit 4 - Endpoint Tx FIFO underrun"] #[inline(always)] pub fn eptxfud(&mut self) -> EPTXFUD_W { EPTXFUD_W { w: self } } #[doc = "Bit 3 - Control in timeout interrupt"] #[inline(always)] pub fn cito(&mut self) -> CITO_W { CITO_W { w: self } } #[doc = "Bit 1 - Endpoint finished"] #[inline(always)] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W { w: self } } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device endpoint-1 interrupt register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep1intf](index.html) module"] pub struct DIEP1INTF_SPEC; impl crate::RegisterSpec for DIEP1INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep1intf::R](R) reader structure"] impl crate::Readable for DIEP1INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep1intf::W](W) writer structure"] impl crate::Writable for DIEP1INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP1INTF to value 0x80"] impl crate::Resettable for DIEP1INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x80 } } } #[doc = "DIEP2INTF register accessor: an alias for `Reg`"] pub type DIEP2INTF = crate::Reg; #[doc = "device endpoint-2 interrupt register"] pub mod diep2intf { #[doc = "Register `DIEP2INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP2INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TXFE` reader - Transmit FIFO empty"] pub struct TXFE_R(crate::FieldReader); impl TXFE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TXFE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPNE` reader - IN endpoint NAK effective"] pub struct IEPNE_R(crate::FieldReader); impl IEPNE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IEPNE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPNE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPNE` writer - IN endpoint NAK effective"] pub struct IEPNE_W<'a> { w: &'a mut W, } impl<'a> IEPNE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `EPTXFUD` reader - Endpoint Tx FIFO underrun"] pub struct EPTXFUD_R(crate::FieldReader); impl EPTXFUD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPTXFUD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTXFUD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTXFUD` writer - Endpoint Tx FIFO underrun"] pub struct EPTXFUD_W<'a> { w: &'a mut W, } impl<'a> EPTXFUD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CITO` reader - Control in timeout interrupt"] pub struct CITO_R(crate::FieldReader); impl CITO_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CITO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CITO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CITO` writer - Control in timeout interrupt"] pub struct CITO_W<'a> { w: &'a mut W, } impl<'a> CITO_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EPDIS` reader - Endpoint finished"] pub struct EPDIS_R(crate::FieldReader); impl EPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIS` writer - Endpoint finished"] pub struct EPDIS_W<'a> { w: &'a mut W, } impl<'a> EPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 7 - Transmit FIFO empty"] #[inline(always)] pub fn txfe(&self) -> TXFE_R { TXFE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] pub fn iepne(&self) -> IEPNE_R { IEPNE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Endpoint Tx FIFO underrun"] #[inline(always)] pub fn eptxfud(&self) -> EPTXFUD_R { EPTXFUD_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Control in timeout interrupt"] #[inline(always)] pub fn cito(&self) -> CITO_R { CITO_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - Endpoint finished"] #[inline(always)] pub fn epdis(&self) -> EPDIS_R { EPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] pub fn iepne(&mut self) -> IEPNE_W { IEPNE_W { w: self } } #[doc = "Bit 4 - Endpoint Tx FIFO underrun"] #[inline(always)] pub fn eptxfud(&mut self) -> EPTXFUD_W { EPTXFUD_W { w: self } } #[doc = "Bit 3 - Control in timeout interrupt"] #[inline(always)] pub fn cito(&mut self) -> CITO_W { CITO_W { w: self } } #[doc = "Bit 1 - Endpoint finished"] #[inline(always)] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W { w: self } } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device endpoint-2 interrupt register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep2intf](index.html) module"] pub struct DIEP2INTF_SPEC; impl crate::RegisterSpec for DIEP2INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep2intf::R](R) reader structure"] impl crate::Readable for DIEP2INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep2intf::W](W) writer structure"] impl crate::Writable for DIEP2INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP2INTF to value 0x80"] impl crate::Resettable for DIEP2INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x80 } } } #[doc = "DIEP3INTF register accessor: an alias for `Reg`"] pub type DIEP3INTF = crate::Reg; #[doc = "device endpoint-3 interrupt register"] pub mod diep3intf { #[doc = "Register `DIEP3INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP3INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `TXFE` reader - Transmit FIFO empty"] pub struct TXFE_R(crate::FieldReader); impl TXFE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TXFE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TXFE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPNE` reader - IN endpoint NAK effective"] pub struct IEPNE_R(crate::FieldReader); impl IEPNE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { IEPNE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPNE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `IEPNE` writer - IN endpoint NAK effective"] pub struct IEPNE_W<'a> { w: &'a mut W, } impl<'a> IEPNE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `EPTXFUD` reader - Endpoint Tx FIFO underrun"] pub struct EPTXFUD_R(crate::FieldReader); impl EPTXFUD_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPTXFUD_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPTXFUD_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPTXFUD` writer - Endpoint Tx FIFO underrun"] pub struct EPTXFUD_W<'a> { w: &'a mut W, } impl<'a> EPTXFUD_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `CITO` reader - Control in timeout interrupt"] pub struct CITO_R(crate::FieldReader); impl CITO_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { CITO_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CITO_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CITO` writer - Control in timeout interrupt"] pub struct CITO_W<'a> { w: &'a mut W, } impl<'a> CITO_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EPDIS` reader - Endpoint finished"] pub struct EPDIS_R(crate::FieldReader); impl EPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIS` writer - Endpoint finished"] pub struct EPDIS_W<'a> { w: &'a mut W, } impl<'a> EPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 7 - Transmit FIFO empty"] #[inline(always)] pub fn txfe(&self) -> TXFE_R { TXFE_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] pub fn iepne(&self) -> IEPNE_R { IEPNE_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Endpoint Tx FIFO underrun"] #[inline(always)] pub fn eptxfud(&self) -> EPTXFUD_R { EPTXFUD_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Control in timeout interrupt"] #[inline(always)] pub fn cito(&self) -> CITO_R { CITO_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - Endpoint finished"] #[inline(always)] pub fn epdis(&self) -> EPDIS_R { EPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 6 - IN endpoint NAK effective"] #[inline(always)] pub fn iepne(&mut self) -> IEPNE_W { IEPNE_W { w: self } } #[doc = "Bit 4 - Endpoint Tx FIFO underrun"] #[inline(always)] pub fn eptxfud(&mut self) -> EPTXFUD_W { EPTXFUD_W { w: self } } #[doc = "Bit 3 - Control in timeout interrupt"] #[inline(always)] pub fn cito(&mut self) -> CITO_W { CITO_W { w: self } } #[doc = "Bit 1 - Endpoint finished"] #[inline(always)] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W { w: self } } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device endpoint-3 interrupt register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep3intf](index.html) module"] pub struct DIEP3INTF_SPEC; impl crate::RegisterSpec for DIEP3INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep3intf::R](R) reader structure"] impl crate::Readable for DIEP3INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep3intf::W](W) writer structure"] impl crate::Writable for DIEP3INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP3INTF to value 0x80"] impl crate::Resettable for DIEP3INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x80 } } } #[doc = "DOEP0INTF register accessor: an alias for `Reg`"] pub type DOEP0INTF = crate::Reg; #[doc = "device out endpoint-0 interrupt flag register"] pub mod doep0intf { #[doc = "Register `DOEP0INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP0INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BTBSTP` reader - Back-to-back SETUP packets"] pub struct BTBSTP_R(crate::FieldReader); impl BTBSTP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BTBSTP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BTBSTP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BTBSTP` writer - Back-to-back SETUP packets"] pub struct BTBSTP_W<'a> { w: &'a mut W, } impl<'a> BTBSTP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `EPRXFOVR` reader - Endpoint Rx FIFO overrun"] pub struct EPRXFOVR_R(crate::FieldReader); impl EPRXFOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPRXFOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPRXFOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPRXFOVR` writer - Endpoint Rx FIFO overrun"] pub struct EPRXFOVR_W<'a> { w: &'a mut W, } impl<'a> EPRXFOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `STPF` reader - Setup phase finished"] pub struct STPF_R(crate::FieldReader); impl STPF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STPF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STPF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STPF` writer - Setup phase finished"] pub struct STPF_W<'a> { w: &'a mut W, } impl<'a> STPF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EPDIS` reader - Endpoint disabled"] pub struct EPDIS_R(crate::FieldReader); impl EPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIS` writer - Endpoint disabled"] pub struct EPDIS_W<'a> { w: &'a mut W, } impl<'a> EPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 6 - Back-to-back SETUP packets"] #[inline(always)] pub fn btbstp(&self) -> BTBSTP_R { BTBSTP_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Endpoint Rx FIFO overrun"] #[inline(always)] pub fn eprxfovr(&self) -> EPRXFOVR_R { EPRXFOVR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Setup phase finished"] #[inline(always)] pub fn stpf(&self) -> STPF_R { STPF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - Endpoint disabled"] #[inline(always)] pub fn epdis(&self) -> EPDIS_R { EPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 6 - Back-to-back SETUP packets"] #[inline(always)] pub fn btbstp(&mut self) -> BTBSTP_W { BTBSTP_W { w: self } } #[doc = "Bit 4 - Endpoint Rx FIFO overrun"] #[inline(always)] pub fn eprxfovr(&mut self) -> EPRXFOVR_W { EPRXFOVR_W { w: self } } #[doc = "Bit 3 - Setup phase finished"] #[inline(always)] pub fn stpf(&mut self) -> STPF_W { STPF_W { w: self } } #[doc = "Bit 1 - Endpoint disabled"] #[inline(always)] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W { w: self } } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device out endpoint-0 interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep0intf](index.html) module"] pub struct DOEP0INTF_SPEC; impl crate::RegisterSpec for DOEP0INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep0intf::R](R) reader structure"] impl crate::Readable for DOEP0INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep0intf::W](W) writer structure"] impl crate::Writable for DOEP0INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP0INTF to value 0"] impl crate::Resettable for DOEP0INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEP1INTF register accessor: an alias for `Reg`"] pub type DOEP1INTF = crate::Reg; #[doc = "device out endpoint-1 interrupt flag register"] pub mod doep1intf { #[doc = "Register `DOEP1INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP1INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BTBSTP` reader - Back-to-back SETUP packets"] pub struct BTBSTP_R(crate::FieldReader); impl BTBSTP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BTBSTP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BTBSTP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BTBSTP` writer - Back-to-back SETUP packets"] pub struct BTBSTP_W<'a> { w: &'a mut W, } impl<'a> BTBSTP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `EPRXFOVR` reader - Endpoint Rx FIFO overrun"] pub struct EPRXFOVR_R(crate::FieldReader); impl EPRXFOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPRXFOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPRXFOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPRXFOVR` writer - Endpoint Rx FIFO overrun"] pub struct EPRXFOVR_W<'a> { w: &'a mut W, } impl<'a> EPRXFOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `STPF` reader - Setup phase finished"] pub struct STPF_R(crate::FieldReader); impl STPF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STPF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STPF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STPF` writer - Setup phase finished"] pub struct STPF_W<'a> { w: &'a mut W, } impl<'a> STPF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EPDIS` reader - Endpoint disabled"] pub struct EPDIS_R(crate::FieldReader); impl EPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIS` writer - Endpoint disabled"] pub struct EPDIS_W<'a> { w: &'a mut W, } impl<'a> EPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 6 - Back-to-back SETUP packets"] #[inline(always)] pub fn btbstp(&self) -> BTBSTP_R { BTBSTP_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Endpoint Rx FIFO overrun"] #[inline(always)] pub fn eprxfovr(&self) -> EPRXFOVR_R { EPRXFOVR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Setup phase finished"] #[inline(always)] pub fn stpf(&self) -> STPF_R { STPF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - Endpoint disabled"] #[inline(always)] pub fn epdis(&self) -> EPDIS_R { EPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 6 - Back-to-back SETUP packets"] #[inline(always)] pub fn btbstp(&mut self) -> BTBSTP_W { BTBSTP_W { w: self } } #[doc = "Bit 4 - Endpoint Rx FIFO overrun"] #[inline(always)] pub fn eprxfovr(&mut self) -> EPRXFOVR_W { EPRXFOVR_W { w: self } } #[doc = "Bit 3 - Setup phase finished"] #[inline(always)] pub fn stpf(&mut self) -> STPF_W { STPF_W { w: self } } #[doc = "Bit 1 - Endpoint disabled"] #[inline(always)] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W { w: self } } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device out endpoint-1 interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep1intf](index.html) module"] pub struct DOEP1INTF_SPEC; impl crate::RegisterSpec for DOEP1INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep1intf::R](R) reader structure"] impl crate::Readable for DOEP1INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep1intf::W](W) writer structure"] impl crate::Writable for DOEP1INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP1INTF to value 0"] impl crate::Resettable for DOEP1INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEP2INTF register accessor: an alias for `Reg`"] pub type DOEP2INTF = crate::Reg; #[doc = "device out endpoint-2 interrupt flag register"] pub mod doep2intf { #[doc = "Register `DOEP2INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP2INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BTBSTP` reader - Back-to-back SETUP packets"] pub struct BTBSTP_R(crate::FieldReader); impl BTBSTP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BTBSTP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BTBSTP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BTBSTP` writer - Back-to-back SETUP packets"] pub struct BTBSTP_W<'a> { w: &'a mut W, } impl<'a> BTBSTP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `EPRXFOVR` reader - Endpoint Rx FIFO overrun"] pub struct EPRXFOVR_R(crate::FieldReader); impl EPRXFOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPRXFOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPRXFOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPRXFOVR` writer - Endpoint Rx FIFO overrun"] pub struct EPRXFOVR_W<'a> { w: &'a mut W, } impl<'a> EPRXFOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `STPF` reader - Setup phase finished"] pub struct STPF_R(crate::FieldReader); impl STPF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STPF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STPF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STPF` writer - Setup phase finished"] pub struct STPF_W<'a> { w: &'a mut W, } impl<'a> STPF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EPDIS` reader - Endpoint disabled"] pub struct EPDIS_R(crate::FieldReader); impl EPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIS` writer - Endpoint disabled"] pub struct EPDIS_W<'a> { w: &'a mut W, } impl<'a> EPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 6 - Back-to-back SETUP packets"] #[inline(always)] pub fn btbstp(&self) -> BTBSTP_R { BTBSTP_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Endpoint Rx FIFO overrun"] #[inline(always)] pub fn eprxfovr(&self) -> EPRXFOVR_R { EPRXFOVR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Setup phase finished"] #[inline(always)] pub fn stpf(&self) -> STPF_R { STPF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - Endpoint disabled"] #[inline(always)] pub fn epdis(&self) -> EPDIS_R { EPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 6 - Back-to-back SETUP packets"] #[inline(always)] pub fn btbstp(&mut self) -> BTBSTP_W { BTBSTP_W { w: self } } #[doc = "Bit 4 - Endpoint Rx FIFO overrun"] #[inline(always)] pub fn eprxfovr(&mut self) -> EPRXFOVR_W { EPRXFOVR_W { w: self } } #[doc = "Bit 3 - Setup phase finished"] #[inline(always)] pub fn stpf(&mut self) -> STPF_W { STPF_W { w: self } } #[doc = "Bit 1 - Endpoint disabled"] #[inline(always)] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W { w: self } } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device out endpoint-2 interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep2intf](index.html) module"] pub struct DOEP2INTF_SPEC; impl crate::RegisterSpec for DOEP2INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep2intf::R](R) reader structure"] impl crate::Readable for DOEP2INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep2intf::W](W) writer structure"] impl crate::Writable for DOEP2INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP2INTF to value 0"] impl crate::Resettable for DOEP2INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEP3INTF register accessor: an alias for `Reg`"] pub type DOEP3INTF = crate::Reg; #[doc = "device out endpoint-3 interrupt flag register"] pub mod doep3intf { #[doc = "Register `DOEP3INTF` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP3INTF` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `BTBSTP` reader - Back-to-back SETUP packets"] pub struct BTBSTP_R(crate::FieldReader); impl BTBSTP_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { BTBSTP_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for BTBSTP_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `BTBSTP` writer - Back-to-back SETUP packets"] pub struct BTBSTP_W<'a> { w: &'a mut W, } impl<'a> BTBSTP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 6)) | ((value as u32 & 0x01) << 6); self.w } } #[doc = "Field `EPRXFOVR` reader - Endpoint Rx FIFO overrun"] pub struct EPRXFOVR_R(crate::FieldReader); impl EPRXFOVR_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPRXFOVR_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPRXFOVR_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPRXFOVR` writer - Endpoint Rx FIFO overrun"] pub struct EPRXFOVR_W<'a> { w: &'a mut W, } impl<'a> EPRXFOVR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 4)) | ((value as u32 & 0x01) << 4); self.w } } #[doc = "Field `STPF` reader - Setup phase finished"] pub struct STPF_R(crate::FieldReader); impl STPF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { STPF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STPF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STPF` writer - Setup phase finished"] pub struct STPF_W<'a> { w: &'a mut W, } impl<'a> STPF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); self.w } } #[doc = "Field `EPDIS` reader - Endpoint disabled"] pub struct EPDIS_R(crate::FieldReader); impl EPDIS_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EPDIS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EPDIS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EPDIS` writer - Endpoint disabled"] pub struct EPDIS_W<'a> { w: &'a mut W, } impl<'a> EPDIS_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } #[doc = "Field `TF` reader - Transfer finished"] pub struct TF_R(crate::FieldReader); impl TF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { TF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TF` writer - Transfer finished"] pub struct TF_W<'a> { w: &'a mut W, } impl<'a> TF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 6 - Back-to-back SETUP packets"] #[inline(always)] pub fn btbstp(&self) -> BTBSTP_R { BTBSTP_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 4 - Endpoint Rx FIFO overrun"] #[inline(always)] pub fn eprxfovr(&self) -> EPRXFOVR_R { EPRXFOVR_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 3 - Setup phase finished"] #[inline(always)] pub fn stpf(&self) -> STPF_R { STPF_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 1 - Endpoint disabled"] #[inline(always)] pub fn epdis(&self) -> EPDIS_R { EPDIS_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&self) -> TF_R { TF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 6 - Back-to-back SETUP packets"] #[inline(always)] pub fn btbstp(&mut self) -> BTBSTP_W { BTBSTP_W { w: self } } #[doc = "Bit 4 - Endpoint Rx FIFO overrun"] #[inline(always)] pub fn eprxfovr(&mut self) -> EPRXFOVR_W { EPRXFOVR_W { w: self } } #[doc = "Bit 3 - Setup phase finished"] #[inline(always)] pub fn stpf(&mut self) -> STPF_W { STPF_W { w: self } } #[doc = "Bit 1 - Endpoint disabled"] #[inline(always)] pub fn epdis(&mut self) -> EPDIS_W { EPDIS_W { w: self } } #[doc = "Bit 0 - Transfer finished"] #[inline(always)] pub fn tf(&mut self) -> TF_W { TF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device out endpoint-3 interrupt flag register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep3intf](index.html) module"] pub struct DOEP3INTF_SPEC; impl crate::RegisterSpec for DOEP3INTF_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep3intf::R](R) reader structure"] impl crate::Readable for DOEP3INTF_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep3intf::W](W) writer structure"] impl crate::Writable for DOEP3INTF_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP3INTF to value 0"] impl crate::Resettable for DOEP3INTF_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DIEP0LEN register accessor: an alias for `Reg`"] pub type DIEP0LEN = crate::Reg; #[doc = "device IN endpoint-0 transfer length register"] pub mod diep0len { #[doc = "Register `DIEP0LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP0LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 19)) | ((value as u32 & 0x03) << 19); self.w } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x7f) | (value as u32 & 0x7f); self.w } } impl R { #[doc = "Bits 19:20 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03) as u8) } #[doc = "Bits 0:6 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x7f) as u8) } } impl W { #[doc = "Bits 19:20 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 0:6 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device IN endpoint-0 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep0len](index.html) module"] pub struct DIEP0LEN_SPEC; impl crate::RegisterSpec for DIEP0LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep0len::R](R) reader structure"] impl crate::Readable for DIEP0LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep0len::W](W) writer structure"] impl crate::Writable for DIEP0LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP0LEN to value 0"] impl crate::Resettable for DIEP0LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEP0LEN register accessor: an alias for `Reg`"] pub type DOEP0LEN = crate::Reg; #[doc = "device OUT endpoint-0 transfer length register"] pub mod doep0len { #[doc = "Register `DOEP0LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP0LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `STPCNT` reader - SETUP packet count"] pub struct STPCNT_R(crate::FieldReader); impl STPCNT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { STPCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STPCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STPCNT` writer - SETUP packet count"] pub struct STPCNT_W<'a> { w: &'a mut W, } impl<'a> STPCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 19)) | ((value as u32 & 0x01) << 19); self.w } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x7f) | (value as u32 & 0x7f); self.w } } impl R { #[doc = "Bits 29:30 - SETUP packet count"] #[inline(always)] pub fn stpcnt(&self) -> STPCNT_R { STPCNT_R::new(((self.bits >> 29) & 0x03) as u8) } #[doc = "Bit 19 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bits 0:6 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x7f) as u8) } } impl W { #[doc = "Bits 29:30 - SETUP packet count"] #[inline(always)] pub fn stpcnt(&mut self) -> STPCNT_W { STPCNT_W { w: self } } #[doc = "Bit 19 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 0:6 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device OUT endpoint-0 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep0len](index.html) module"] pub struct DOEP0LEN_SPEC; impl crate::RegisterSpec for DOEP0LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep0len::R](R) reader structure"] impl crate::Readable for DOEP0LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep0len::W](W) writer structure"] impl crate::Writable for DOEP0LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP0LEN to value 0"] impl crate::Resettable for DOEP0LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DIEP1LEN register accessor: an alias for `Reg`"] pub type DIEP1LEN = crate::Reg; #[doc = "device IN endpoint-1 transfer length register"] pub mod diep1len { #[doc = "Register `DIEP1LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP1LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MCPF` reader - Multi packet count per frame"] pub struct MCPF_R(crate::FieldReader); impl MCPF_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MCPF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MCPF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MCPF` writer - Multi packet count per frame"] pub struct MCPF_W<'a> { w: &'a mut W, } impl<'a> MCPF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } impl R { #[doc = "Bits 29:30 - Multi packet count per frame"] #[inline(always)] pub fn mcpf(&self) -> MCPF_R { MCPF_R::new(((self.bits >> 29) & 0x03) as u8) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } } impl W { #[doc = "Bits 29:30 - Multi packet count per frame"] #[inline(always)] pub fn mcpf(&mut self) -> MCPF_W { MCPF_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device IN endpoint-1 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep1len](index.html) module"] pub struct DIEP1LEN_SPEC; impl crate::RegisterSpec for DIEP1LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep1len::R](R) reader structure"] impl crate::Readable for DIEP1LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep1len::W](W) writer structure"] impl crate::Writable for DIEP1LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP1LEN to value 0"] impl crate::Resettable for DIEP1LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DIEP2LEN register accessor: an alias for `Reg`"] pub type DIEP2LEN = crate::Reg; #[doc = "device IN endpoint-2 transfer length register"] pub mod diep2len { #[doc = "Register `DIEP2LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP2LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MCPF` reader - Multi packet count per frame"] pub struct MCPF_R(crate::FieldReader); impl MCPF_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MCPF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MCPF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MCPF` writer - Multi packet count per frame"] pub struct MCPF_W<'a> { w: &'a mut W, } impl<'a> MCPF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } impl R { #[doc = "Bits 29:30 - Multi packet count per frame"] #[inline(always)] pub fn mcpf(&self) -> MCPF_R { MCPF_R::new(((self.bits >> 29) & 0x03) as u8) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } } impl W { #[doc = "Bits 29:30 - Multi packet count per frame"] #[inline(always)] pub fn mcpf(&mut self) -> MCPF_W { MCPF_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device IN endpoint-2 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep2len](index.html) module"] pub struct DIEP2LEN_SPEC; impl crate::RegisterSpec for DIEP2LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep2len::R](R) reader structure"] impl crate::Readable for DIEP2LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep2len::W](W) writer structure"] impl crate::Writable for DIEP2LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP2LEN to value 0"] impl crate::Resettable for DIEP2LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DIEP3LEN register accessor: an alias for `Reg`"] pub type DIEP3LEN = crate::Reg; #[doc = "device IN endpoint-3 transfer length register"] pub mod diep3len { #[doc = "Register `DIEP3LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DIEP3LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `MCPF` reader - Multi packet count per frame"] pub struct MCPF_R(crate::FieldReader); impl MCPF_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { MCPF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for MCPF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `MCPF` writer - Multi packet count per frame"] pub struct MCPF_W<'a> { w: &'a mut W, } impl<'a> MCPF_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } impl R { #[doc = "Bits 29:30 - Multi packet count per frame"] #[inline(always)] pub fn mcpf(&self) -> MCPF_R { MCPF_R::new(((self.bits >> 29) & 0x03) as u8) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } } impl W { #[doc = "Bits 29:30 - Multi packet count per frame"] #[inline(always)] pub fn mcpf(&mut self) -> MCPF_W { MCPF_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device IN endpoint-3 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep3len](index.html) module"] pub struct DIEP3LEN_SPEC; impl crate::RegisterSpec for DIEP3LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep3len::R](R) reader structure"] impl crate::Readable for DIEP3LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [diep3len::W](W) writer structure"] impl crate::Writable for DIEP3LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DIEP3LEN to value 0"] impl crate::Resettable for DIEP3LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEP1LEN register accessor: an alias for `Reg`"] pub type DOEP1LEN = crate::Reg; #[doc = "device OUT endpoint-1 transfer length register"] pub mod doep1len { #[doc = "Register `DOEP1LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP1LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `STPCNT_RXDPID` reader - SETUP packet count/Received data PID"] pub struct STPCNT_RXDPID_R(crate::FieldReader); impl STPCNT_RXDPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { STPCNT_RXDPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STPCNT_RXDPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STPCNT_RXDPID` writer - SETUP packet count/Received data PID"] pub struct STPCNT_RXDPID_W<'a> { w: &'a mut W, } impl<'a> STPCNT_RXDPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } impl R { #[doc = "Bits 29:30 - SETUP packet count/Received data PID"] #[inline(always)] pub fn stpcnt_rxdpid(&self) -> STPCNT_RXDPID_R { STPCNT_RXDPID_R::new(((self.bits >> 29) & 0x03) as u8) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } } impl W { #[doc = "Bits 29:30 - SETUP packet count/Received data PID"] #[inline(always)] pub fn stpcnt_rxdpid(&mut self) -> STPCNT_RXDPID_W { STPCNT_RXDPID_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device OUT endpoint-1 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep1len](index.html) module"] pub struct DOEP1LEN_SPEC; impl crate::RegisterSpec for DOEP1LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep1len::R](R) reader structure"] impl crate::Readable for DOEP1LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep1len::W](W) writer structure"] impl crate::Writable for DOEP1LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP1LEN to value 0"] impl crate::Resettable for DOEP1LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEP2LEN register accessor: an alias for `Reg`"] pub type DOEP2LEN = crate::Reg; #[doc = "device OUT endpoint-2 transfer length register"] pub mod doep2len { #[doc = "Register `DOEP2LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP2LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `STPCNT_RXDPID` reader - SETUP packet count/Received data PID"] pub struct STPCNT_RXDPID_R(crate::FieldReader); impl STPCNT_RXDPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { STPCNT_RXDPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STPCNT_RXDPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STPCNT_RXDPID` writer - SETUP packet count/Received data PID"] pub struct STPCNT_RXDPID_W<'a> { w: &'a mut W, } impl<'a> STPCNT_RXDPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } impl R { #[doc = "Bits 29:30 - SETUP packet count/Received data PID"] #[inline(always)] pub fn stpcnt_rxdpid(&self) -> STPCNT_RXDPID_R { STPCNT_RXDPID_R::new(((self.bits >> 29) & 0x03) as u8) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } } impl W { #[doc = "Bits 29:30 - SETUP packet count/Received data PID"] #[inline(always)] pub fn stpcnt_rxdpid(&mut self) -> STPCNT_RXDPID_W { STPCNT_RXDPID_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device OUT endpoint-2 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep2len](index.html) module"] pub struct DOEP2LEN_SPEC; impl crate::RegisterSpec for DOEP2LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep2len::R](R) reader structure"] impl crate::Readable for DOEP2LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep2len::W](W) writer structure"] impl crate::Writable for DOEP2LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP2LEN to value 0"] impl crate::Resettable for DOEP2LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DOEP3LEN register accessor: an alias for `Reg`"] pub type DOEP3LEN = crate::Reg; #[doc = "device OUT endpoint-3 transfer length register"] pub mod doep3len { #[doc = "Register `DOEP3LEN` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `DOEP3LEN` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `STPCNT_RXDPID` reader - SETUP packet count/Received data PID"] pub struct STPCNT_RXDPID_R(crate::FieldReader); impl STPCNT_RXDPID_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { STPCNT_RXDPID_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for STPCNT_RXDPID_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `STPCNT_RXDPID` writer - SETUP packet count/Received data PID"] pub struct STPCNT_RXDPID_W<'a> { w: &'a mut W, } impl<'a> STPCNT_RXDPID_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 29)) | ((value as u32 & 0x03) << 29); self.w } } #[doc = "Field `PCNT` reader - Packet count"] pub struct PCNT_R(crate::FieldReader); impl PCNT_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { PCNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PCNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PCNT` writer - Packet count"] pub struct PCNT_W<'a> { w: &'a mut W, } impl<'a> PCNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u16) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03ff << 19)) | ((value as u32 & 0x03ff) << 19); self.w } } #[doc = "Field `TLEN` reader - Transfer length"] pub struct TLEN_R(crate::FieldReader); impl TLEN_R { #[inline(always)] pub(crate) fn new(bits: u32) -> Self { TLEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for TLEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `TLEN` writer - Transfer length"] pub struct TLEN_W<'a> { w: &'a mut W, } impl<'a> TLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u32) -> &'a mut W { self.w.bits = (self.w.bits & !0x0007_ffff) | (value as u32 & 0x0007_ffff); self.w } } impl R { #[doc = "Bits 29:30 - SETUP packet count/Received data PID"] #[inline(always)] pub fn stpcnt_rxdpid(&self) -> STPCNT_RXDPID_R { STPCNT_RXDPID_R::new(((self.bits >> 29) & 0x03) as u8) } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&self) -> PCNT_R { PCNT_R::new(((self.bits >> 19) & 0x03ff) as u16) } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&self) -> TLEN_R { TLEN_R::new((self.bits & 0x0007_ffff) as u32) } } impl W { #[doc = "Bits 29:30 - SETUP packet count/Received data PID"] #[inline(always)] pub fn stpcnt_rxdpid(&mut self) -> STPCNT_RXDPID_W { STPCNT_RXDPID_W { w: self } } #[doc = "Bits 19:28 - Packet count"] #[inline(always)] pub fn pcnt(&mut self) -> PCNT_W { PCNT_W { w: self } } #[doc = "Bits 0:18 - Transfer length"] #[inline(always)] pub fn tlen(&mut self) -> TLEN_W { TLEN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "device OUT endpoint-3 transfer length register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [doep3len](index.html) module"] pub struct DOEP3LEN_SPEC; impl crate::RegisterSpec for DOEP3LEN_SPEC { type Ux = u32; } #[doc = "`read()` method returns [doep3len::R](R) reader structure"] impl crate::Readable for DOEP3LEN_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [doep3len::W](W) writer structure"] impl crate::Writable for DOEP3LEN_SPEC { type Writer = W; } #[doc = "`reset()` method sets DOEP3LEN to value 0"] impl crate::Resettable for DOEP3LEN_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } #[doc = "DIEP0TFSTAT register accessor: an alias for `Reg`"] pub type DIEP0TFSTAT = crate::Reg; #[doc = "device IN endpoint 0 transmit FIFO status register"] pub mod diep0tfstat { #[doc = "Register `DIEP0TFSTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `IEPTFS` reader - IN endpoint TxFIFO space remaining"] pub struct IEPTFS_R(crate::FieldReader); impl IEPTFS_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEPTFS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTFS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - IN endpoint TxFIFO space remaining"] #[inline(always)] pub fn ieptfs(&self) -> IEPTFS_R { IEPTFS_R::new((self.bits & 0xffff) as u16) } } #[doc = "device IN endpoint 0 transmit FIFO status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep0tfstat](index.html) module"] pub struct DIEP0TFSTAT_SPEC; impl crate::RegisterSpec for DIEP0TFSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep0tfstat::R](R) reader structure"] impl crate::Readable for DIEP0TFSTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets DIEP0TFSTAT to value 0x0200"] impl crate::Resettable for DIEP0TFSTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200 } } } #[doc = "DIEP1TFSTAT register accessor: an alias for `Reg`"] pub type DIEP1TFSTAT = crate::Reg; #[doc = "device IN endpoint 1 transmit FIFO status register"] pub mod diep1tfstat { #[doc = "Register `DIEP1TFSTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `IEPTFS` reader - IN endpoint TxFIFO space remaining"] pub struct IEPTFS_R(crate::FieldReader); impl IEPTFS_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEPTFS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTFS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - IN endpoint TxFIFO space remaining"] #[inline(always)] pub fn ieptfs(&self) -> IEPTFS_R { IEPTFS_R::new((self.bits & 0xffff) as u16) } } #[doc = "device IN endpoint 1 transmit FIFO status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep1tfstat](index.html) module"] pub struct DIEP1TFSTAT_SPEC; impl crate::RegisterSpec for DIEP1TFSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep1tfstat::R](R) reader structure"] impl crate::Readable for DIEP1TFSTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets DIEP1TFSTAT to value 0x0200"] impl crate::Resettable for DIEP1TFSTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200 } } } #[doc = "DIEP2TFSTAT register accessor: an alias for `Reg`"] pub type DIEP2TFSTAT = crate::Reg; #[doc = "device IN endpoint 2 transmit FIFO status register"] pub mod diep2tfstat { #[doc = "Register `DIEP2TFSTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `IEPTFS` reader - IN endpoint TxFIFO space remaining"] pub struct IEPTFS_R(crate::FieldReader); impl IEPTFS_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEPTFS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTFS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - IN endpoint TxFIFO space remaining"] #[inline(always)] pub fn ieptfs(&self) -> IEPTFS_R { IEPTFS_R::new((self.bits & 0xffff) as u16) } } #[doc = "device IN endpoint 2 transmit FIFO status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep2tfstat](index.html) module"] pub struct DIEP2TFSTAT_SPEC; impl crate::RegisterSpec for DIEP2TFSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep2tfstat::R](R) reader structure"] impl crate::Readable for DIEP2TFSTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets DIEP2TFSTAT to value 0x0200"] impl crate::Resettable for DIEP2TFSTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200 } } } #[doc = "DIEP3TFSTAT register accessor: an alias for `Reg`"] pub type DIEP3TFSTAT = crate::Reg; #[doc = "device IN endpoint 3 transmit FIFO status register"] pub mod diep3tfstat { #[doc = "Register `DIEP3TFSTAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Field `IEPTFS` reader - IN endpoint TxFIFO space remaining"] pub struct IEPTFS_R(crate::FieldReader); impl IEPTFS_R { #[inline(always)] pub(crate) fn new(bits: u16) -> Self { IEPTFS_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for IEPTFS_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl R { #[doc = "Bits 0:15 - IN endpoint TxFIFO space remaining"] #[inline(always)] pub fn ieptfs(&self) -> IEPTFS_R { IEPTFS_R::new((self.bits & 0xffff) as u16) } } #[doc = "device IN endpoint 3 transmit FIFO status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [diep3tfstat](index.html) module"] pub struct DIEP3TFSTAT_SPEC; impl crate::RegisterSpec for DIEP3TFSTAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [diep3tfstat::R](R) reader structure"] impl crate::Readable for DIEP3TFSTAT_SPEC { type Reader = R; } #[doc = "`reset()` method sets DIEP3TFSTAT to value 0x0200"] impl crate::Resettable for DIEP3TFSTAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x0200 } } } } #[doc = "USB on the go full speed"] pub struct USBFS_PWRCLK { _marker: PhantomData<*const ()>, } unsafe impl Send for USBFS_PWRCLK {} impl USBFS_PWRCLK { #[doc = r"Pointer to the register block"] pub const PTR: *const usbfs_pwrclk::RegisterBlock = 0x5000_0e00 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const usbfs_pwrclk::RegisterBlock { Self::PTR } } impl Deref for USBFS_PWRCLK { type Target = usbfs_pwrclk::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for USBFS_PWRCLK { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("USBFS_PWRCLK").finish() } } #[doc = "USB on the go full speed"] pub mod usbfs_pwrclk { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - power and clock gating control register (PWRCLKCTL)"] pub pwrclkctl: crate::Reg, } #[doc = "PWRCLKCTL register accessor: an alias for `Reg`"] pub type PWRCLKCTL = crate::Reg; #[doc = "power and clock gating control register (PWRCLKCTL)"] pub mod pwrclkctl { #[doc = "Register `PWRCLKCTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `PWRCLKCTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `SUCLK` reader - Stop the USB clock"] pub struct SUCLK_R(crate::FieldReader); impl SUCLK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SUCLK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SUCLK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SUCLK` writer - Stop the USB clock"] pub struct SUCLK_W<'a> { w: &'a mut W, } impl<'a> SUCLK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } #[doc = "Field `SHCLK` reader - Stop HCLK"] pub struct SHCLK_R(crate::FieldReader); impl SHCLK_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { SHCLK_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for SHCLK_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `SHCLK` writer - Stop HCLK"] pub struct SHCLK_W<'a> { w: &'a mut W, } impl<'a> SHCLK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); self.w } } impl R { #[doc = "Bit 0 - Stop the USB clock"] #[inline(always)] pub fn suclk(&self) -> SUCLK_R { SUCLK_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Stop HCLK"] #[inline(always)] pub fn shclk(&self) -> SHCLK_R { SHCLK_R::new(((self.bits >> 1) & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Stop the USB clock"] #[inline(always)] pub fn suclk(&mut self) -> SUCLK_W { SUCLK_W { w: self } } #[doc = "Bit 1 - Stop HCLK"] #[inline(always)] pub fn shclk(&mut self) -> SHCLK_W { SHCLK_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "power and clock gating control register (PWRCLKCTL)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwrclkctl](index.html) module"] pub struct PWRCLKCTL_SPEC; impl crate::RegisterSpec for PWRCLKCTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [pwrclkctl::R](R) reader structure"] impl crate::Readable for PWRCLKCTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [pwrclkctl::W](W) writer structure"] impl crate::Writable for PWRCLKCTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets PWRCLKCTL to value 0"] impl crate::Resettable for PWRCLKCTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[doc = "Window watchdog timer"] pub struct WWDGT { _marker: PhantomData<*const ()>, } unsafe impl Send for WWDGT {} impl WWDGT { #[doc = r"Pointer to the register block"] pub const PTR: *const wwdgt::RegisterBlock = 0x4000_2c00 as *const _; #[doc = r"Return the pointer to the register block"] #[inline(always)] pub const fn ptr() -> *const wwdgt::RegisterBlock { Self::PTR } } impl Deref for WWDGT { type Target = wwdgt::RegisterBlock; #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*Self::PTR } } } impl core::fmt::Debug for WWDGT { fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { f.debug_struct("WWDGT").finish() } } #[doc = "Window watchdog timer"] pub mod wwdgt { #[doc = r"Register block"] #[repr(C)] pub struct RegisterBlock { #[doc = "0x00 - Control register"] pub ctl: crate::Reg, #[doc = "0x04 - Configuration register"] pub cfg: crate::Reg, #[doc = "0x08 - Status register"] pub stat: crate::Reg, } #[doc = "CTL register accessor: an alias for `Reg`"] pub type CTL = crate::Reg; #[doc = "Control register"] pub mod ctl { #[doc = "Register `CTL` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CTL` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `WDGTEN` reader - Activation bit"] pub struct WDGTEN_R(crate::FieldReader); impl WDGTEN_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { WDGTEN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WDGTEN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WDGTEN` writer - Activation bit"] pub struct WDGTEN_W<'a> { w: &'a mut W, } impl<'a> WDGTEN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 7)) | ((value as u32 & 0x01) << 7); self.w } } #[doc = "Field `CNT` reader - The value of the watchdog timer counter"] pub struct CNT_R(crate::FieldReader); impl CNT_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { CNT_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for CNT_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `CNT` writer - The value of the watchdog timer counter"] pub struct CNT_W<'a> { w: &'a mut W, } impl<'a> CNT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x7f) | (value as u32 & 0x7f); self.w } } impl R { #[doc = "Bit 7 - Activation bit"] #[inline(always)] pub fn wdgten(&self) -> WDGTEN_R { WDGTEN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bits 0:6 - The value of the watchdog timer counter"] #[inline(always)] pub fn cnt(&self) -> CNT_R { CNT_R::new((self.bits & 0x7f) as u8) } } impl W { #[doc = "Bit 7 - Activation bit"] #[inline(always)] pub fn wdgten(&mut self) -> WDGTEN_W { WDGTEN_W { w: self } } #[doc = "Bits 0:6 - The value of the watchdog timer counter"] #[inline(always)] pub fn cnt(&mut self) -> CNT_W { CNT_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](index.html) module"] pub struct CTL_SPEC; impl crate::RegisterSpec for CTL_SPEC { type Ux = u32; } #[doc = "`read()` method returns [ctl::R](R) reader structure"] impl crate::Readable for CTL_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [ctl::W](W) writer structure"] impl crate::Writable for CTL_SPEC { type Writer = W; } #[doc = "`reset()` method sets CTL to value 0x7f"] impl crate::Resettable for CTL_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x7f } } } #[doc = "CFG register accessor: an alias for `Reg`"] pub type CFG = crate::Reg; #[doc = "Configuration register"] pub mod cfg { #[doc = "Register `CFG` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `CFG` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EWIE` reader - Early wakeup interrupt"] pub struct EWIE_R(crate::FieldReader); impl EWIE_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EWIE_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EWIE_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EWIE` writer - Early wakeup interrupt"] pub struct EWIE_W<'a> { w: &'a mut W, } impl<'a> EWIE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !(0x01 << 9)) | ((value as u32 & 0x01) << 9); self.w } } #[doc = "Field `PSC` reader - Prescaler"] pub struct PSC_R(crate::FieldReader); impl PSC_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { PSC_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for PSC_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `PSC` writer - Prescaler"] pub struct PSC_W<'a> { w: &'a mut W, } impl<'a> PSC_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x03 << 7)) | ((value as u32 & 0x03) << 7); self.w } } #[doc = "Field `WIN` reader - 7-bit window value"] pub struct WIN_R(crate::FieldReader); impl WIN_R { #[inline(always)] pub(crate) fn new(bits: u8) -> Self { WIN_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for WIN_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `WIN` writer - 7-bit window value"] pub struct WIN_W<'a> { w: &'a mut W, } impl<'a> WIN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !0x7f) | (value as u32 & 0x7f); self.w } } impl R { #[doc = "Bit 9 - Early wakeup interrupt"] #[inline(always)] pub fn ewie(&self) -> EWIE_R { EWIE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bits 7:8 - Prescaler"] #[inline(always)] pub fn psc(&self) -> PSC_R { PSC_R::new(((self.bits >> 7) & 0x03) as u8) } #[doc = "Bits 0:6 - 7-bit window value"] #[inline(always)] pub fn win(&self) -> WIN_R { WIN_R::new((self.bits & 0x7f) as u8) } } impl W { #[doc = "Bit 9 - Early wakeup interrupt"] #[inline(always)] pub fn ewie(&mut self) -> EWIE_W { EWIE_W { w: self } } #[doc = "Bits 7:8 - Prescaler"] #[inline(always)] pub fn psc(&mut self) -> PSC_W { PSC_W { w: self } } #[doc = "Bits 0:6 - 7-bit window value"] #[inline(always)] pub fn win(&mut self) -> WIN_W { WIN_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Configuration register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] pub struct CFG_SPEC; impl crate::RegisterSpec for CFG_SPEC { type Ux = u32; } #[doc = "`read()` method returns [cfg::R](R) reader structure"] impl crate::Readable for CFG_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"] impl crate::Writable for CFG_SPEC { type Writer = W; } #[doc = "`reset()` method sets CFG to value 0x7f"] impl crate::Resettable for CFG_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0x7f } } } #[doc = "STAT register accessor: an alias for `Reg`"] pub type STAT = crate::Reg; #[doc = "Status register"] pub mod stat { #[doc = "Register `STAT` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `STAT` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `EWIF` reader - Early wakeup interrupt flag"] pub struct EWIF_R(crate::FieldReader); impl EWIF_R { #[inline(always)] pub(crate) fn new(bits: bool) -> Self { EWIF_R(crate::FieldReader::new(bits)) } } impl core::ops::Deref for EWIF_R { type Target = crate::FieldReader; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } #[doc = "Field `EWIF` writer - Early wakeup interrupt flag"] pub struct EWIF_W<'a> { w: &'a mut W, } impl<'a> EWIF_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { self.bit(true) } #[doc = r"Clears the field bit"] #[inline(always)] pub fn clear_bit(self) -> &'a mut W { self.bit(false) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); self.w } } impl R { #[doc = "Bit 0 - Early wakeup interrupt flag"] #[inline(always)] pub fn ewif(&self) -> EWIF_R { EWIF_R::new((self.bits & 0x01) != 0) } } impl W { #[doc = "Bit 0 - Early wakeup interrupt flag"] #[inline(always)] pub fn ewif(&mut self) -> EWIF_W { EWIF_W { w: self } } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](index.html) module"] pub struct STAT_SPEC; impl crate::RegisterSpec for STAT_SPEC { type Ux = u32; } #[doc = "`read()` method returns [stat::R](R) reader structure"] impl crate::Readable for STAT_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [stat::W](W) writer structure"] impl crate::Writable for STAT_SPEC { type Writer = W; } #[doc = "`reset()` method sets STAT to value 0"] impl crate::Resettable for STAT_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } } } } #[no_mangle] static mut DEVICE_PERIPHERALS: bool = false; #[doc = r"All the peripherals"] #[allow(non_snake_case)] pub struct Peripherals { #[doc = "ADC"] pub ADC: ADC, #[doc = "CEC"] pub CEC: CEC, #[doc = "CMP"] pub CMP: CMP, #[doc = "CRC"] pub CRC: CRC, #[doc = "CTC"] pub CTC: CTC, #[doc = "DAC"] pub DAC: DAC, #[doc = "DBG"] pub DBG: DBG, #[doc = "DMA"] pub DMA: DMA, #[doc = "EXTI"] pub EXTI: EXTI, #[doc = "FMC"] pub FMC: FMC, #[doc = "FWDGT"] pub FWDGT: FWDGT, #[doc = "GPIOA"] pub GPIOA: GPIOA, #[doc = "GPIOB"] pub GPIOB: GPIOB, #[doc = "GPIOC"] pub GPIOC: GPIOC, #[doc = "GPIOD"] pub GPIOD: GPIOD, #[doc = "GPIOF"] pub GPIOF: GPIOF, #[doc = "I2C0"] pub I2C0: I2C0, #[doc = "I2C1"] pub I2C1: I2C1, #[doc = "PMU"] pub PMU: PMU, #[doc = "RCU"] pub RCU: RCU, #[doc = "RTC"] pub RTC: RTC, #[doc = "SPI0"] pub SPI0: SPI0, #[doc = "SPI1"] pub SPI1: SPI1, #[doc = "SYSCFG"] pub SYSCFG: SYSCFG, #[doc = "TIMER0"] pub TIMER0: TIMER0, #[doc = "TIMER1"] pub TIMER1: TIMER1, #[doc = "TIMER2"] pub TIMER2: TIMER2, #[doc = "TIMER5"] pub TIMER5: TIMER5, #[doc = "TIMER13"] pub TIMER13: TIMER13, #[doc = "TIMER14"] pub TIMER14: TIMER14, #[doc = "TIMER15"] pub TIMER15: TIMER15, #[doc = "TIMER16"] pub TIMER16: TIMER16, #[doc = "TSI"] pub TSI: TSI, #[doc = "USART0"] pub USART0: USART0, #[doc = "USART1"] pub USART1: USART1, #[doc = "USBFS_GLOBAL"] pub USBFS_GLOBAL: USBFS_GLOBAL, #[doc = "USBFS_HOST"] pub USBFS_HOST: USBFS_HOST, #[doc = "USBFS_DEVICE"] pub USBFS_DEVICE: USBFS_DEVICE, #[doc = "USBFS_PWRCLK"] pub USBFS_PWRCLK: USBFS_PWRCLK, #[doc = "WWDGT"] pub WWDGT: WWDGT, } impl Peripherals { #[doc = r"Returns all the peripherals *once*"] #[inline] pub fn take() -> Option { cortex_m::interrupt::free(|_| { if unsafe { DEVICE_PERIPHERALS } { None } else { Some(unsafe { Peripherals::steal() }) } }) } #[doc = r"Unchecked version of `Peripherals::take`"] #[inline] pub unsafe fn steal() -> Self { DEVICE_PERIPHERALS = true; Peripherals { ADC: ADC { _marker: PhantomData, }, CEC: CEC { _marker: PhantomData, }, CMP: CMP { _marker: PhantomData, }, CRC: CRC { _marker: PhantomData, }, CTC: CTC { _marker: PhantomData, }, DAC: DAC { _marker: PhantomData, }, DBG: DBG { _marker: PhantomData, }, DMA: DMA { _marker: PhantomData, }, EXTI: EXTI { _marker: PhantomData, }, FMC: FMC { _marker: PhantomData, }, FWDGT: FWDGT { _marker: PhantomData, }, GPIOA: GPIOA { _marker: PhantomData, }, GPIOB: GPIOB { _marker: PhantomData, }, GPIOC: GPIOC { _marker: PhantomData, }, GPIOD: GPIOD { _marker: PhantomData, }, GPIOF: GPIOF { _marker: PhantomData, }, I2C0: I2C0 { _marker: PhantomData, }, I2C1: I2C1 { _marker: PhantomData, }, PMU: PMU { _marker: PhantomData, }, RCU: RCU { _marker: PhantomData, }, RTC: RTC { _marker: PhantomData, }, SPI0: SPI0 { _marker: PhantomData, }, SPI1: SPI1 { _marker: PhantomData, }, SYSCFG: SYSCFG { _marker: PhantomData, }, TIMER0: TIMER0 { _marker: PhantomData, }, TIMER1: TIMER1 { _marker: PhantomData, }, TIMER2: TIMER2 { _marker: PhantomData, }, TIMER5: TIMER5 { _marker: PhantomData, }, TIMER13: TIMER13 { _marker: PhantomData, }, TIMER14: TIMER14 { _marker: PhantomData, }, TIMER15: TIMER15 { _marker: PhantomData, }, TIMER16: TIMER16 { _marker: PhantomData, }, TSI: TSI { _marker: PhantomData, }, USART0: USART0 { _marker: PhantomData, }, USART1: USART1 { _marker: PhantomData, }, USBFS_GLOBAL: USBFS_GLOBAL { _marker: PhantomData, }, USBFS_HOST: USBFS_HOST { _marker: PhantomData, }, USBFS_DEVICE: USBFS_DEVICE { _marker: PhantomData, }, USBFS_PWRCLK: USBFS_PWRCLK { _marker: PhantomData, }, WWDGT: WWDGT { _marker: PhantomData, }, } } }