#[cfg(feature = "iomem")]
mod tests {
    use himpp::iomem::{Memory, MemoryKind};

    #[cfg(feature = "hi3559av100")]
    #[test]
    fn read_sysid() {
        // Map system control registers
        let m = Memory::new(MemoryKind::Generic, 0x0_1202_0000, 0x1000, 0x1000);
        assert!(m.phy_addr() == 0x0_1202_0000);
        assert!(m.vir_addr() != 0);
        // Test SYSIDx registers
        assert_eq!(m.read_u32(0xEE0), 0x0100_0000);
        assert_eq!(m.read_u32(0xEE4), 0x0000_00A1);
        assert_eq!(m.read_u32(0xEE8), 0x0000_0059);
        assert_eq!(m.read_u32(0xEEC), 0x0000_0035);
    }

    #[cfg(feature = "hi3559av100")]
    #[test]
    fn read_write_watchdog1() {
        // Map watchdog1 registers
        let mut m = Memory::new(MemoryKind::Generic, 0x0_1208_0000, 0x1000, 0x1000);
        assert!(m.phy_addr() == 0x0_1208_0000);
        assert!(m.vir_addr() != 0);
        // Read an write load register for test
        assert_eq!(m.read_u32(0x000), 0xFFFF_FFFF);
        m.write_u32(0x000, 0xAA55_0000);
        assert_eq!(m.read_u32(0x000), 0xAA55_0000);
        assert_eq!(m.read_u32(0x004), 0xAA55_0000);
        m.write_u32(0x000, 0xFFFF_FFFF);
        assert_eq!(m.read_u32(0x000), 0xFFFF_FFFF);
        assert_eq!(m.read_u32(0x004), 0xFFFF_FFFF);
    }
}