/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM namespace llvm_ks { namespace ARM { enum { PHI = 0, INLINEASM = 1, CFI_INSTRUCTION = 2, EH_LABEL = 3, GC_LABEL = 4, KILL = 5, EXTRACT_SUBREG = 6, INSERT_SUBREG = 7, IMPLICIT_DEF = 8, SUBREG_TO_REG = 9, COPY_TO_REGCLASS = 10, DBG_VALUE = 11, REG_SEQUENCE = 12, COPY = 13, BUNDLE = 14, LIFETIME_START = 15, LIFETIME_END = 16, STACKMAP = 17, PATCHPOINT = 18, LOAD_STACK_GUARD = 19, STATEPOINT = 20, LOCAL_ESCAPE = 21, FAULTING_LOAD_OP = 22, G_ADD = 23, ABS = 24, ADCri = 25, ADCrr = 26, ADCrsi = 27, ADCrsr = 28, ADDSri = 29, ADDSrr = 30, ADDSrsi = 31, ADDSrsr = 32, ADDri = 33, ADDrr = 34, ADDrsi = 35, ADDrsr = 36, ADJCALLSTACKDOWN = 37, ADJCALLSTACKUP = 38, ADR = 39, AESD = 40, AESE = 41, AESIMC = 42, AESMC = 43, ANDri = 44, ANDrr = 45, ANDrsi = 46, ANDrsr = 47, ASRi = 48, ASRr = 49, B = 50, BCCZi64 = 51, BCCi64 = 52, BFC = 53, BFI = 54, BICri = 55, BICrr = 56, BICrsi = 57, BICrsr = 58, BKPT = 59, BL = 60, BLX = 61, BLX_pred = 62, BLXi = 63, BL_pred = 64, BMOVPCB_CALL = 65, BMOVPCRX_CALL = 66, BR_JTadd = 67, BR_JTm = 68, BR_JTr = 69, BX = 70, BXJ = 71, BX_CALL = 72, BX_RET = 73, BX_pred = 74, Bcc = 75, CDP = 76, CDP2 = 77, CLREX = 78, CLZ = 79, CMNri = 80, CMNzrr = 81, CMNzrsi = 82, CMNzrsr = 83, CMPri = 84, CMPrr = 85, CMPrsi = 86, CMPrsr = 87, CONSTPOOL_ENTRY = 88, COPY_STRUCT_BYVAL_I32 = 89, CPS1p = 90, CPS2p = 91, CPS3p = 92, CRC32B = 93, CRC32CB = 94, CRC32CH = 95, CRC32CW = 96, CRC32H = 97, CRC32W = 98, DBG = 99, DMB = 100, DSB = 101, EORri = 102, EORrr = 103, EORrsi = 104, EORrsr = 105, ERET = 106, FCONSTD = 107, FCONSTH = 108, FCONSTS = 109, FLDMXDB_UPD = 110, FLDMXIA = 111, FLDMXIA_UPD = 112, FMSTAT = 113, FSTMXDB_UPD = 114, FSTMXIA = 115, FSTMXIA_UPD = 116, HINT = 117, HLT = 118, HVC = 119, ISB = 120, ITasm = 121, Int_eh_sjlj_dispatchsetup = 122, Int_eh_sjlj_longjmp = 123, Int_eh_sjlj_setjmp = 124, Int_eh_sjlj_setjmp_nofp = 125, Int_eh_sjlj_setup_dispatch = 126, JUMPTABLE_ADDRS = 127, JUMPTABLE_INSTS = 128, JUMPTABLE_TBB = 129, JUMPTABLE_TBH = 130, LDA = 131, LDAB = 132, LDAEX = 133, LDAEXB = 134, LDAEXD = 135, LDAEXH = 136, LDAH = 137, LDC2L_OFFSET = 138, LDC2L_OPTION = 139, LDC2L_POST = 140, LDC2L_PRE = 141, LDC2_OFFSET = 142, LDC2_OPTION = 143, LDC2_POST = 144, LDC2_PRE = 145, LDCL_OFFSET = 146, LDCL_OPTION = 147, LDCL_POST = 148, LDCL_PRE = 149, LDC_OFFSET = 150, LDC_OPTION = 151, LDC_POST = 152, LDC_PRE = 153, LDMDA = 154, LDMDA_UPD = 155, LDMDB = 156, LDMDB_UPD = 157, LDMIA = 158, LDMIA_RET = 159, LDMIA_UPD = 160, LDMIB = 161, LDMIB_UPD = 162, LDRBT_POST = 163, LDRBT_POST_IMM = 164, LDRBT_POST_REG = 165, LDRB_POST_IMM = 166, LDRB_POST_REG = 167, LDRB_PRE_IMM = 168, LDRB_PRE_REG = 169, LDRBi12 = 170, LDRBrs = 171, LDRD = 172, LDRD_POST = 173, LDRD_PRE = 174, LDREX = 175, LDREXB = 176, LDREXD = 177, LDREXH = 178, LDRH = 179, LDRHTi = 180, LDRHTr = 181, LDRH_POST = 182, LDRH_PRE = 183, LDRLIT_ga_abs = 184, LDRLIT_ga_pcrel = 185, LDRLIT_ga_pcrel_ldr = 186, LDRSB = 187, LDRSBTi = 188, LDRSBTr = 189, LDRSB_POST = 190, LDRSB_PRE = 191, LDRSH = 192, LDRSHTi = 193, LDRSHTr = 194, LDRSH_POST = 195, LDRSH_PRE = 196, LDRT_POST = 197, LDRT_POST_IMM = 198, LDRT_POST_REG = 199, LDR_POST_IMM = 200, LDR_POST_REG = 201, LDR_PRE_IMM = 202, LDR_PRE_REG = 203, LDRcp = 204, LDRi12 = 205, LDRrs = 206, LEApcrel = 207, LEApcrelJT = 208, LSLi = 209, LSLr = 210, LSRi = 211, LSRr = 212, MCR = 213, MCR2 = 214, MCRR = 215, MCRR2 = 216, MEMCPY = 217, MLA = 218, MLAv5 = 219, MLS = 220, MOVCCi = 221, MOVCCi16 = 222, MOVCCi32imm = 223, MOVCCr = 224, MOVCCsi = 225, MOVCCsr = 226, MOVPCLR = 227, MOVPCRX = 228, MOVTi16 = 229, MOVTi16_ga_pcrel = 230, MOV_ga_pcrel = 231, MOV_ga_pcrel_ldr = 232, MOVi = 233, MOVi16 = 234, MOVi16_ga_pcrel = 235, MOVi32imm = 236, MOVr = 237, MOVr_TC = 238, MOVsi = 239, MOVsr = 240, MOVsra_flag = 241, MOVsrl_flag = 242, MRC = 243, MRC2 = 244, MRRC = 245, MRRC2 = 246, MRS = 247, MRSbanked = 248, MRSsys = 249, MSR = 250, MSRbanked = 251, MSRi = 252, MUL = 253, MULv5 = 254, MVNCCi = 255, MVNi = 256, MVNr = 257, MVNsi = 258, MVNsr = 259, ORRri = 260, ORRrr = 261, ORRrsi = 262, ORRrsr = 263, PICADD = 264, PICLDR = 265, PICLDRB = 266, PICLDRH = 267, PICLDRSB = 268, PICLDRSH = 269, PICSTR = 270, PICSTRB = 271, PICSTRH = 272, PKHBT = 273, PKHTB = 274, PLDWi12 = 275, PLDWrs = 276, PLDi12 = 277, PLDrs = 278, PLIi12 = 279, PLIrs = 280, QADD = 281, QADD16 = 282, QADD8 = 283, QASX = 284, QDADD = 285, QDSUB = 286, QSAX = 287, QSUB = 288, QSUB16 = 289, QSUB8 = 290, RBIT = 291, REV = 292, REV16 = 293, REVSH = 294, RFEDA = 295, RFEDA_UPD = 296, RFEDB = 297, RFEDB_UPD = 298, RFEIA = 299, RFEIA_UPD = 300, RFEIB = 301, RFEIB_UPD = 302, RORi = 303, RORr = 304, RRX = 305, RRXi = 306, RSBSri = 307, RSBSrsi = 308, RSBSrsr = 309, RSBri = 310, RSBrr = 311, RSBrsi = 312, RSBrsr = 313, RSCri = 314, RSCrr = 315, RSCrsi = 316, RSCrsr = 317, SADD16 = 318, SADD8 = 319, SASX = 320, SBCri = 321, SBCrr = 322, SBCrsi = 323, SBCrsr = 324, SBFX = 325, SDIV = 326, SEL = 327, SETEND = 328, SETPAN = 329, SHA1C = 330, SHA1H = 331, SHA1M = 332, SHA1P = 333, SHA1SU0 = 334, SHA1SU1 = 335, SHA256H = 336, SHA256H2 = 337, SHA256SU0 = 338, SHA256SU1 = 339, SHADD16 = 340, SHADD8 = 341, SHASX = 342, SHSAX = 343, SHSUB16 = 344, SHSUB8 = 345, SMC = 346, SMLABB = 347, SMLABT = 348, SMLAD = 349, SMLADX = 350, SMLAL = 351, SMLALBB = 352, SMLALBT = 353, SMLALD = 354, SMLALDX = 355, SMLALTB = 356, SMLALTT = 357, SMLALv5 = 358, SMLATB = 359, SMLATT = 360, SMLAWB = 361, SMLAWT = 362, SMLSD = 363, SMLSDX = 364, SMLSLD = 365, SMLSLDX = 366, SMMLA = 367, SMMLAR = 368, SMMLS = 369, SMMLSR = 370, SMMUL = 371, SMMULR = 372, SMUAD = 373, SMUADX = 374, SMULBB = 375, SMULBT = 376, SMULL = 377, SMULLv5 = 378, SMULTB = 379, SMULTT = 380, SMULWB = 381, SMULWT = 382, SMUSD = 383, SMUSDX = 384, SPACE = 385, SRSDA = 386, SRSDA_UPD = 387, SRSDB = 388, SRSDB_UPD = 389, SRSIA = 390, SRSIA_UPD = 391, SRSIB = 392, SRSIB_UPD = 393, SSAT = 394, SSAT16 = 395, SSAX = 396, SSUB16 = 397, SSUB8 = 398, STC2L_OFFSET = 399, STC2L_OPTION = 400, STC2L_POST = 401, STC2L_PRE = 402, STC2_OFFSET = 403, STC2_OPTION = 404, STC2_POST = 405, STC2_PRE = 406, STCL_OFFSET = 407, STCL_OPTION = 408, STCL_POST = 409, STCL_PRE = 410, STC_OFFSET = 411, STC_OPTION = 412, STC_POST = 413, STC_PRE = 414, STL = 415, STLB = 416, STLEX = 417, STLEXB = 418, STLEXD = 419, STLEXH = 420, STLH = 421, STMDA = 422, STMDA_UPD = 423, STMDB = 424, STMDB_UPD = 425, STMIA = 426, STMIA_UPD = 427, STMIB = 428, STMIB_UPD = 429, STRBT_POST = 430, STRBT_POST_IMM = 431, STRBT_POST_REG = 432, STRB_POST_IMM = 433, STRB_POST_REG = 434, STRB_PRE_IMM = 435, STRB_PRE_REG = 436, STRBi12 = 437, STRBi_preidx = 438, STRBr_preidx = 439, STRBrs = 440, STRD = 441, STRD_POST = 442, STRD_PRE = 443, STREX = 444, STREXB = 445, STREXD = 446, STREXH = 447, STRH = 448, STRHTi = 449, STRHTr = 450, STRH_POST = 451, STRH_PRE = 452, STRH_preidx = 453, STRT_POST = 454, STRT_POST_IMM = 455, STRT_POST_REG = 456, STR_POST_IMM = 457, STR_POST_REG = 458, STR_PRE_IMM = 459, STR_PRE_REG = 460, STRi12 = 461, STRi_preidx = 462, STRr_preidx = 463, STRrs = 464, SUBS_PC_LR = 465, SUBSri = 466, SUBSrr = 467, SUBSrsi = 468, SUBSrsr = 469, SUBri = 470, SUBrr = 471, SUBrsi = 472, SUBrsr = 473, SVC = 474, SWP = 475, SWPB = 476, SXTAB = 477, SXTAB16 = 478, SXTAH = 479, SXTB = 480, SXTB16 = 481, SXTH = 482, TAILJMPd = 483, TAILJMPr = 484, TCRETURNdi = 485, TCRETURNri = 486, TEQri = 487, TEQrr = 488, TEQrsi = 489, TEQrsr = 490, TPsoft = 491, TRAP = 492, TRAPNaCl = 493, TSTri = 494, TSTrr = 495, TSTrsi = 496, TSTrsr = 497, UADD16 = 498, UADD8 = 499, UASX = 500, UBFX = 501, UDF = 502, UDIV = 503, UHADD16 = 504, UHADD8 = 505, UHASX = 506, UHSAX = 507, UHSUB16 = 508, UHSUB8 = 509, UMAAL = 510, UMLAL = 511, UMLALv5 = 512, UMULL = 513, UMULLv5 = 514, UQADD16 = 515, UQADD8 = 516, UQASX = 517, UQSAX = 518, UQSUB16 = 519, UQSUB8 = 520, USAD8 = 521, USADA8 = 522, USAT = 523, USAT16 = 524, USAX = 525, USUB16 = 526, USUB8 = 527, UXTAB = 528, UXTAB16 = 529, UXTAH = 530, UXTB = 531, UXTB16 = 532, UXTH = 533, VABALsv2i64 = 534, VABALsv4i32 = 535, VABALsv8i16 = 536, VABALuv2i64 = 537, VABALuv4i32 = 538, VABALuv8i16 = 539, VABAsv16i8 = 540, VABAsv2i32 = 541, VABAsv4i16 = 542, VABAsv4i32 = 543, VABAsv8i16 = 544, VABAsv8i8 = 545, VABAuv16i8 = 546, VABAuv2i32 = 547, VABAuv4i16 = 548, VABAuv4i32 = 549, VABAuv8i16 = 550, VABAuv8i8 = 551, VABDLsv2i64 = 552, VABDLsv4i32 = 553, VABDLsv8i16 = 554, VABDLuv2i64 = 555, VABDLuv4i32 = 556, VABDLuv8i16 = 557, VABDfd = 558, VABDfq = 559, VABDhd = 560, VABDhq = 561, VABDsv16i8 = 562, VABDsv2i32 = 563, VABDsv4i16 = 564, VABDsv4i32 = 565, VABDsv8i16 = 566, VABDsv8i8 = 567, VABDuv16i8 = 568, VABDuv2i32 = 569, VABDuv4i16 = 570, VABDuv4i32 = 571, VABDuv8i16 = 572, VABDuv8i8 = 573, VABSD = 574, VABSH = 575, VABSS = 576, VABSfd = 577, VABSfq = 578, VABShd = 579, VABShq = 580, VABSv16i8 = 581, VABSv2i32 = 582, VABSv4i16 = 583, VABSv4i32 = 584, VABSv8i16 = 585, VABSv8i8 = 586, VACGEfd = 587, VACGEfq = 588, VACGEhd = 589, VACGEhq = 590, VACGTfd = 591, VACGTfq = 592, VACGThd = 593, VACGThq = 594, VADDD = 595, VADDH = 596, VADDHNv2i32 = 597, VADDHNv4i16 = 598, VADDHNv8i8 = 599, VADDLsv2i64 = 600, VADDLsv4i32 = 601, VADDLsv8i16 = 602, VADDLuv2i64 = 603, VADDLuv4i32 = 604, VADDLuv8i16 = 605, VADDS = 606, VADDWsv2i64 = 607, VADDWsv4i32 = 608, VADDWsv8i16 = 609, VADDWuv2i64 = 610, VADDWuv4i32 = 611, VADDWuv8i16 = 612, VADDfd = 613, VADDfq = 614, VADDhd = 615, VADDhq = 616, VADDv16i8 = 617, VADDv1i64 = 618, VADDv2i32 = 619, VADDv2i64 = 620, VADDv4i16 = 621, VADDv4i32 = 622, VADDv8i16 = 623, VADDv8i8 = 624, VANDd = 625, VANDq = 626, VBICd = 627, VBICiv2i32 = 628, VBICiv4i16 = 629, VBICiv4i32 = 630, VBICiv8i16 = 631, VBICq = 632, VBIFd = 633, VBIFq = 634, VBITd = 635, VBITq = 636, VBSLd = 637, VBSLq = 638, VCEQfd = 639, VCEQfq = 640, VCEQhd = 641, VCEQhq = 642, VCEQv16i8 = 643, VCEQv2i32 = 644, VCEQv4i16 = 645, VCEQv4i32 = 646, VCEQv8i16 = 647, VCEQv8i8 = 648, VCEQzv16i8 = 649, VCEQzv2f32 = 650, VCEQzv2i32 = 651, VCEQzv4f16 = 652, VCEQzv4f32 = 653, VCEQzv4i16 = 654, VCEQzv4i32 = 655, VCEQzv8f16 = 656, VCEQzv8i16 = 657, VCEQzv8i8 = 658, VCGEfd = 659, VCGEfq = 660, VCGEhd = 661, VCGEhq = 662, VCGEsv16i8 = 663, VCGEsv2i32 = 664, VCGEsv4i16 = 665, VCGEsv4i32 = 666, VCGEsv8i16 = 667, VCGEsv8i8 = 668, VCGEuv16i8 = 669, VCGEuv2i32 = 670, VCGEuv4i16 = 671, VCGEuv4i32 = 672, VCGEuv8i16 = 673, VCGEuv8i8 = 674, VCGEzv16i8 = 675, VCGEzv2f32 = 676, VCGEzv2i32 = 677, VCGEzv4f16 = 678, VCGEzv4f32 = 679, VCGEzv4i16 = 680, VCGEzv4i32 = 681, VCGEzv8f16 = 682, VCGEzv8i16 = 683, VCGEzv8i8 = 684, VCGTfd = 685, VCGTfq = 686, VCGThd = 687, VCGThq = 688, VCGTsv16i8 = 689, VCGTsv2i32 = 690, VCGTsv4i16 = 691, VCGTsv4i32 = 692, VCGTsv8i16 = 693, VCGTsv8i8 = 694, VCGTuv16i8 = 695, VCGTuv2i32 = 696, VCGTuv4i16 = 697, VCGTuv4i32 = 698, VCGTuv8i16 = 699, VCGTuv8i8 = 700, VCGTzv16i8 = 701, VCGTzv2f32 = 702, VCGTzv2i32 = 703, VCGTzv4f16 = 704, VCGTzv4f32 = 705, VCGTzv4i16 = 706, VCGTzv4i32 = 707, VCGTzv8f16 = 708, VCGTzv8i16 = 709, VCGTzv8i8 = 710, VCLEzv16i8 = 711, VCLEzv2f32 = 712, VCLEzv2i32 = 713, VCLEzv4f16 = 714, VCLEzv4f32 = 715, VCLEzv4i16 = 716, VCLEzv4i32 = 717, VCLEzv8f16 = 718, VCLEzv8i16 = 719, VCLEzv8i8 = 720, VCLSv16i8 = 721, VCLSv2i32 = 722, VCLSv4i16 = 723, VCLSv4i32 = 724, VCLSv8i16 = 725, VCLSv8i8 = 726, VCLTzv16i8 = 727, VCLTzv2f32 = 728, VCLTzv2i32 = 729, VCLTzv4f16 = 730, VCLTzv4f32 = 731, VCLTzv4i16 = 732, VCLTzv4i32 = 733, VCLTzv8f16 = 734, VCLTzv8i16 = 735, VCLTzv8i8 = 736, VCLZv16i8 = 737, VCLZv2i32 = 738, VCLZv4i16 = 739, VCLZv4i32 = 740, VCLZv8i16 = 741, VCLZv8i8 = 742, VCMPD = 743, VCMPED = 744, VCMPEH = 745, VCMPES = 746, VCMPEZD = 747, VCMPEZH = 748, VCMPEZS = 749, VCMPH = 750, VCMPS = 751, VCMPZD = 752, VCMPZH = 753, VCMPZS = 754, VCNTd = 755, VCNTq = 756, VCVTANSDf = 757, VCVTANSDh = 758, VCVTANSQf = 759, VCVTANSQh = 760, VCVTANUDf = 761, VCVTANUDh = 762, VCVTANUQf = 763, VCVTANUQh = 764, VCVTASD = 765, VCVTASH = 766, VCVTASS = 767, VCVTAUD = 768, VCVTAUH = 769, VCVTAUS = 770, VCVTBDH = 771, VCVTBHD = 772, VCVTBHS = 773, VCVTBSH = 774, VCVTDS = 775, VCVTMNSDf = 776, VCVTMNSDh = 777, VCVTMNSQf = 778, VCVTMNSQh = 779, VCVTMNUDf = 780, VCVTMNUDh = 781, VCVTMNUQf = 782, VCVTMNUQh = 783, VCVTMSD = 784, VCVTMSH = 785, VCVTMSS = 786, VCVTMUD = 787, VCVTMUH = 788, VCVTMUS = 789, VCVTNNSDf = 790, VCVTNNSDh = 791, VCVTNNSQf = 792, VCVTNNSQh = 793, VCVTNNUDf = 794, VCVTNNUDh = 795, VCVTNNUQf = 796, VCVTNNUQh = 797, VCVTNSD = 798, VCVTNSH = 799, VCVTNSS = 800, VCVTNUD = 801, VCVTNUH = 802, VCVTNUS = 803, VCVTPNSDf = 804, VCVTPNSDh = 805, VCVTPNSQf = 806, VCVTPNSQh = 807, VCVTPNUDf = 808, VCVTPNUDh = 809, VCVTPNUQf = 810, VCVTPNUQh = 811, VCVTPSD = 812, VCVTPSH = 813, VCVTPSS = 814, VCVTPUD = 815, VCVTPUH = 816, VCVTPUS = 817, VCVTSD = 818, VCVTTDH = 819, VCVTTHD = 820, VCVTTHS = 821, VCVTTSH = 822, VCVTf2h = 823, VCVTf2sd = 824, VCVTf2sq = 825, VCVTf2ud = 826, VCVTf2uq = 827, VCVTf2xsd = 828, VCVTf2xsq = 829, VCVTf2xud = 830, VCVTf2xuq = 831, VCVTh2f = 832, VCVTh2sd = 833, VCVTh2sq = 834, VCVTh2ud = 835, VCVTh2uq = 836, VCVTh2xsd = 837, VCVTh2xsq = 838, VCVTh2xud = 839, VCVTh2xuq = 840, VCVTs2fd = 841, VCVTs2fq = 842, VCVTs2hd = 843, VCVTs2hq = 844, VCVTu2fd = 845, VCVTu2fq = 846, VCVTu2hd = 847, VCVTu2hq = 848, VCVTxs2fd = 849, VCVTxs2fq = 850, VCVTxs2hd = 851, VCVTxs2hq = 852, VCVTxu2fd = 853, VCVTxu2fq = 854, VCVTxu2hd = 855, VCVTxu2hq = 856, VDIVD = 857, VDIVH = 858, VDIVS = 859, VDUP16d = 860, VDUP16q = 861, VDUP32d = 862, VDUP32q = 863, VDUP8d = 864, VDUP8q = 865, VDUPLN16d = 866, VDUPLN16q = 867, VDUPLN32d = 868, VDUPLN32q = 869, VDUPLN8d = 870, VDUPLN8q = 871, VEORd = 872, VEORq = 873, VEXTd16 = 874, VEXTd32 = 875, VEXTd8 = 876, VEXTq16 = 877, VEXTq32 = 878, VEXTq64 = 879, VEXTq8 = 880, VFMAD = 881, VFMAH = 882, VFMAS = 883, VFMAfd = 884, VFMAfq = 885, VFMAhd = 886, VFMAhq = 887, VFMSD = 888, VFMSH = 889, VFMSS = 890, VFMSfd = 891, VFMSfq = 892, VFMShd = 893, VFMShq = 894, VFNMAD = 895, VFNMAH = 896, VFNMAS = 897, VFNMSD = 898, VFNMSH = 899, VFNMSS = 900, VGETLNi32 = 901, VGETLNs16 = 902, VGETLNs8 = 903, VGETLNu16 = 904, VGETLNu8 = 905, VHADDsv16i8 = 906, VHADDsv2i32 = 907, VHADDsv4i16 = 908, VHADDsv4i32 = 909, VHADDsv8i16 = 910, VHADDsv8i8 = 911, VHADDuv16i8 = 912, VHADDuv2i32 = 913, VHADDuv4i16 = 914, VHADDuv4i32 = 915, VHADDuv8i16 = 916, VHADDuv8i8 = 917, VHSUBsv16i8 = 918, VHSUBsv2i32 = 919, VHSUBsv4i16 = 920, VHSUBsv4i32 = 921, VHSUBsv8i16 = 922, VHSUBsv8i8 = 923, VHSUBuv16i8 = 924, VHSUBuv2i32 = 925, VHSUBuv4i16 = 926, VHSUBuv4i32 = 927, VHSUBuv8i16 = 928, VHSUBuv8i8 = 929, VINSH = 930, VLD1DUPd16 = 931, VLD1DUPd16wb_fixed = 932, VLD1DUPd16wb_register = 933, VLD1DUPd32 = 934, VLD1DUPd32wb_fixed = 935, VLD1DUPd32wb_register = 936, VLD1DUPd8 = 937, VLD1DUPd8wb_fixed = 938, VLD1DUPd8wb_register = 939, VLD1DUPq16 = 940, VLD1DUPq16wb_fixed = 941, VLD1DUPq16wb_register = 942, VLD1DUPq32 = 943, VLD1DUPq32wb_fixed = 944, VLD1DUPq32wb_register = 945, VLD1DUPq8 = 946, VLD1DUPq8wb_fixed = 947, VLD1DUPq8wb_register = 948, VLD1LNd16 = 949, VLD1LNd16_UPD = 950, VLD1LNd32 = 951, VLD1LNd32_UPD = 952, VLD1LNd8 = 953, VLD1LNd8_UPD = 954, VLD1LNdAsm_16 = 955, VLD1LNdAsm_32 = 956, VLD1LNdAsm_8 = 957, VLD1LNdWB_fixed_Asm_16 = 958, VLD1LNdWB_fixed_Asm_32 = 959, VLD1LNdWB_fixed_Asm_8 = 960, VLD1LNdWB_register_Asm_16 = 961, VLD1LNdWB_register_Asm_32 = 962, VLD1LNdWB_register_Asm_8 = 963, VLD1LNq16Pseudo = 964, VLD1LNq16Pseudo_UPD = 965, VLD1LNq32Pseudo = 966, VLD1LNq32Pseudo_UPD = 967, VLD1LNq8Pseudo = 968, VLD1LNq8Pseudo_UPD = 969, VLD1d16 = 970, VLD1d16Q = 971, VLD1d16Qwb_fixed = 972, VLD1d16Qwb_register = 973, VLD1d16T = 974, VLD1d16Twb_fixed = 975, VLD1d16Twb_register = 976, VLD1d16wb_fixed = 977, VLD1d16wb_register = 978, VLD1d32 = 979, VLD1d32Q = 980, VLD1d32Qwb_fixed = 981, VLD1d32Qwb_register = 982, VLD1d32T = 983, VLD1d32Twb_fixed = 984, VLD1d32Twb_register = 985, VLD1d32wb_fixed = 986, VLD1d32wb_register = 987, VLD1d64 = 988, VLD1d64Q = 989, VLD1d64QPseudo = 990, VLD1d64QPseudoWB_fixed = 991, VLD1d64QPseudoWB_register = 992, VLD1d64Qwb_fixed = 993, VLD1d64Qwb_register = 994, VLD1d64T = 995, VLD1d64TPseudo = 996, VLD1d64TPseudoWB_fixed = 997, VLD1d64TPseudoWB_register = 998, VLD1d64Twb_fixed = 999, VLD1d64Twb_register = 1000, VLD1d64wb_fixed = 1001, VLD1d64wb_register = 1002, VLD1d8 = 1003, VLD1d8Q = 1004, VLD1d8Qwb_fixed = 1005, VLD1d8Qwb_register = 1006, VLD1d8T = 1007, VLD1d8Twb_fixed = 1008, VLD1d8Twb_register = 1009, VLD1d8wb_fixed = 1010, VLD1d8wb_register = 1011, VLD1q16 = 1012, VLD1q16wb_fixed = 1013, VLD1q16wb_register = 1014, VLD1q32 = 1015, VLD1q32wb_fixed = 1016, VLD1q32wb_register = 1017, VLD1q64 = 1018, VLD1q64wb_fixed = 1019, VLD1q64wb_register = 1020, VLD1q8 = 1021, VLD1q8wb_fixed = 1022, VLD1q8wb_register = 1023, VLD2DUPd16 = 1024, VLD2DUPd16wb_fixed = 1025, VLD2DUPd16wb_register = 1026, VLD2DUPd16x2 = 1027, VLD2DUPd16x2wb_fixed = 1028, VLD2DUPd16x2wb_register = 1029, VLD2DUPd32 = 1030, VLD2DUPd32wb_fixed = 1031, VLD2DUPd32wb_register = 1032, VLD2DUPd32x2 = 1033, VLD2DUPd32x2wb_fixed = 1034, VLD2DUPd32x2wb_register = 1035, VLD2DUPd8 = 1036, VLD2DUPd8wb_fixed = 1037, VLD2DUPd8wb_register = 1038, VLD2DUPd8x2 = 1039, VLD2DUPd8x2wb_fixed = 1040, VLD2DUPd8x2wb_register = 1041, VLD2LNd16 = 1042, VLD2LNd16Pseudo = 1043, VLD2LNd16Pseudo_UPD = 1044, VLD2LNd16_UPD = 1045, VLD2LNd32 = 1046, VLD2LNd32Pseudo = 1047, VLD2LNd32Pseudo_UPD = 1048, VLD2LNd32_UPD = 1049, VLD2LNd8 = 1050, VLD2LNd8Pseudo = 1051, VLD2LNd8Pseudo_UPD = 1052, VLD2LNd8_UPD = 1053, VLD2LNdAsm_16 = 1054, VLD2LNdAsm_32 = 1055, VLD2LNdAsm_8 = 1056, VLD2LNdWB_fixed_Asm_16 = 1057, VLD2LNdWB_fixed_Asm_32 = 1058, VLD2LNdWB_fixed_Asm_8 = 1059, VLD2LNdWB_register_Asm_16 = 1060, VLD2LNdWB_register_Asm_32 = 1061, VLD2LNdWB_register_Asm_8 = 1062, VLD2LNq16 = 1063, VLD2LNq16Pseudo = 1064, VLD2LNq16Pseudo_UPD = 1065, VLD2LNq16_UPD = 1066, VLD2LNq32 = 1067, VLD2LNq32Pseudo = 1068, VLD2LNq32Pseudo_UPD = 1069, VLD2LNq32_UPD = 1070, VLD2LNqAsm_16 = 1071, VLD2LNqAsm_32 = 1072, VLD2LNqWB_fixed_Asm_16 = 1073, VLD2LNqWB_fixed_Asm_32 = 1074, VLD2LNqWB_register_Asm_16 = 1075, VLD2LNqWB_register_Asm_32 = 1076, VLD2b16 = 1077, VLD2b16wb_fixed = 1078, VLD2b16wb_register = 1079, VLD2b32 = 1080, VLD2b32wb_fixed = 1081, VLD2b32wb_register = 1082, VLD2b8 = 1083, VLD2b8wb_fixed = 1084, VLD2b8wb_register = 1085, VLD2d16 = 1086, VLD2d16wb_fixed = 1087, VLD2d16wb_register = 1088, VLD2d32 = 1089, VLD2d32wb_fixed = 1090, VLD2d32wb_register = 1091, VLD2d8 = 1092, VLD2d8wb_fixed = 1093, VLD2d8wb_register = 1094, VLD2q16 = 1095, VLD2q16Pseudo = 1096, VLD2q16PseudoWB_fixed = 1097, VLD2q16PseudoWB_register = 1098, VLD2q16wb_fixed = 1099, VLD2q16wb_register = 1100, VLD2q32 = 1101, VLD2q32Pseudo = 1102, VLD2q32PseudoWB_fixed = 1103, VLD2q32PseudoWB_register = 1104, VLD2q32wb_fixed = 1105, VLD2q32wb_register = 1106, VLD2q8 = 1107, VLD2q8Pseudo = 1108, VLD2q8PseudoWB_fixed = 1109, VLD2q8PseudoWB_register = 1110, VLD2q8wb_fixed = 1111, VLD2q8wb_register = 1112, VLD3DUPd16 = 1113, VLD3DUPd16Pseudo = 1114, VLD3DUPd16Pseudo_UPD = 1115, VLD3DUPd16_UPD = 1116, VLD3DUPd32 = 1117, VLD3DUPd32Pseudo = 1118, VLD3DUPd32Pseudo_UPD = 1119, VLD3DUPd32_UPD = 1120, VLD3DUPd8 = 1121, VLD3DUPd8Pseudo = 1122, VLD3DUPd8Pseudo_UPD = 1123, VLD3DUPd8_UPD = 1124, VLD3DUPdAsm_16 = 1125, VLD3DUPdAsm_32 = 1126, VLD3DUPdAsm_8 = 1127, VLD3DUPdWB_fixed_Asm_16 = 1128, VLD3DUPdWB_fixed_Asm_32 = 1129, VLD3DUPdWB_fixed_Asm_8 = 1130, VLD3DUPdWB_register_Asm_16 = 1131, VLD3DUPdWB_register_Asm_32 = 1132, VLD3DUPdWB_register_Asm_8 = 1133, VLD3DUPq16 = 1134, VLD3DUPq16_UPD = 1135, VLD3DUPq32 = 1136, VLD3DUPq32_UPD = 1137, VLD3DUPq8 = 1138, VLD3DUPq8_UPD = 1139, VLD3DUPqAsm_16 = 1140, VLD3DUPqAsm_32 = 1141, VLD3DUPqAsm_8 = 1142, VLD3DUPqWB_fixed_Asm_16 = 1143, VLD3DUPqWB_fixed_Asm_32 = 1144, VLD3DUPqWB_fixed_Asm_8 = 1145, VLD3DUPqWB_register_Asm_16 = 1146, VLD3DUPqWB_register_Asm_32 = 1147, VLD3DUPqWB_register_Asm_8 = 1148, VLD3LNd16 = 1149, VLD3LNd16Pseudo = 1150, VLD3LNd16Pseudo_UPD = 1151, VLD3LNd16_UPD = 1152, VLD3LNd32 = 1153, VLD3LNd32Pseudo = 1154, VLD3LNd32Pseudo_UPD = 1155, VLD3LNd32_UPD = 1156, VLD3LNd8 = 1157, VLD3LNd8Pseudo = 1158, VLD3LNd8Pseudo_UPD = 1159, VLD3LNd8_UPD = 1160, VLD3LNdAsm_16 = 1161, VLD3LNdAsm_32 = 1162, VLD3LNdAsm_8 = 1163, VLD3LNdWB_fixed_Asm_16 = 1164, VLD3LNdWB_fixed_Asm_32 = 1165, VLD3LNdWB_fixed_Asm_8 = 1166, VLD3LNdWB_register_Asm_16 = 1167, VLD3LNdWB_register_Asm_32 = 1168, VLD3LNdWB_register_Asm_8 = 1169, VLD3LNq16 = 1170, VLD3LNq16Pseudo = 1171, VLD3LNq16Pseudo_UPD = 1172, VLD3LNq16_UPD = 1173, VLD3LNq32 = 1174, VLD3LNq32Pseudo = 1175, VLD3LNq32Pseudo_UPD = 1176, VLD3LNq32_UPD = 1177, VLD3LNqAsm_16 = 1178, VLD3LNqAsm_32 = 1179, VLD3LNqWB_fixed_Asm_16 = 1180, VLD3LNqWB_fixed_Asm_32 = 1181, VLD3LNqWB_register_Asm_16 = 1182, VLD3LNqWB_register_Asm_32 = 1183, VLD3d16 = 1184, VLD3d16Pseudo = 1185, VLD3d16Pseudo_UPD = 1186, VLD3d16_UPD = 1187, VLD3d32 = 1188, VLD3d32Pseudo = 1189, VLD3d32Pseudo_UPD = 1190, VLD3d32_UPD = 1191, VLD3d8 = 1192, VLD3d8Pseudo = 1193, VLD3d8Pseudo_UPD = 1194, VLD3d8_UPD = 1195, VLD3dAsm_16 = 1196, VLD3dAsm_32 = 1197, VLD3dAsm_8 = 1198, VLD3dWB_fixed_Asm_16 = 1199, VLD3dWB_fixed_Asm_32 = 1200, VLD3dWB_fixed_Asm_8 = 1201, VLD3dWB_register_Asm_16 = 1202, VLD3dWB_register_Asm_32 = 1203, VLD3dWB_register_Asm_8 = 1204, VLD3q16 = 1205, VLD3q16Pseudo_UPD = 1206, VLD3q16_UPD = 1207, VLD3q16oddPseudo = 1208, VLD3q16oddPseudo_UPD = 1209, VLD3q32 = 1210, VLD3q32Pseudo_UPD = 1211, VLD3q32_UPD = 1212, VLD3q32oddPseudo = 1213, VLD3q32oddPseudo_UPD = 1214, VLD3q8 = 1215, VLD3q8Pseudo_UPD = 1216, VLD3q8_UPD = 1217, VLD3q8oddPseudo = 1218, VLD3q8oddPseudo_UPD = 1219, VLD3qAsm_16 = 1220, VLD3qAsm_32 = 1221, VLD3qAsm_8 = 1222, VLD3qWB_fixed_Asm_16 = 1223, VLD3qWB_fixed_Asm_32 = 1224, VLD3qWB_fixed_Asm_8 = 1225, VLD3qWB_register_Asm_16 = 1226, VLD3qWB_register_Asm_32 = 1227, VLD3qWB_register_Asm_8 = 1228, VLD4DUPd16 = 1229, VLD4DUPd16Pseudo = 1230, VLD4DUPd16Pseudo_UPD = 1231, VLD4DUPd16_UPD = 1232, VLD4DUPd32 = 1233, VLD4DUPd32Pseudo = 1234, VLD4DUPd32Pseudo_UPD = 1235, VLD4DUPd32_UPD = 1236, VLD4DUPd8 = 1237, VLD4DUPd8Pseudo = 1238, VLD4DUPd8Pseudo_UPD = 1239, VLD4DUPd8_UPD = 1240, VLD4DUPdAsm_16 = 1241, VLD4DUPdAsm_32 = 1242, VLD4DUPdAsm_8 = 1243, VLD4DUPdWB_fixed_Asm_16 = 1244, VLD4DUPdWB_fixed_Asm_32 = 1245, VLD4DUPdWB_fixed_Asm_8 = 1246, VLD4DUPdWB_register_Asm_16 = 1247, VLD4DUPdWB_register_Asm_32 = 1248, VLD4DUPdWB_register_Asm_8 = 1249, VLD4DUPq16 = 1250, VLD4DUPq16_UPD = 1251, VLD4DUPq32 = 1252, VLD4DUPq32_UPD = 1253, VLD4DUPq8 = 1254, VLD4DUPq8_UPD = 1255, VLD4DUPqAsm_16 = 1256, VLD4DUPqAsm_32 = 1257, VLD4DUPqAsm_8 = 1258, VLD4DUPqWB_fixed_Asm_16 = 1259, VLD4DUPqWB_fixed_Asm_32 = 1260, VLD4DUPqWB_fixed_Asm_8 = 1261, VLD4DUPqWB_register_Asm_16 = 1262, VLD4DUPqWB_register_Asm_32 = 1263, VLD4DUPqWB_register_Asm_8 = 1264, VLD4LNd16 = 1265, VLD4LNd16Pseudo = 1266, VLD4LNd16Pseudo_UPD = 1267, VLD4LNd16_UPD = 1268, VLD4LNd32 = 1269, VLD4LNd32Pseudo = 1270, VLD4LNd32Pseudo_UPD = 1271, VLD4LNd32_UPD = 1272, VLD4LNd8 = 1273, VLD4LNd8Pseudo = 1274, VLD4LNd8Pseudo_UPD = 1275, VLD4LNd8_UPD = 1276, VLD4LNdAsm_16 = 1277, VLD4LNdAsm_32 = 1278, VLD4LNdAsm_8 = 1279, VLD4LNdWB_fixed_Asm_16 = 1280, VLD4LNdWB_fixed_Asm_32 = 1281, VLD4LNdWB_fixed_Asm_8 = 1282, VLD4LNdWB_register_Asm_16 = 1283, VLD4LNdWB_register_Asm_32 = 1284, VLD4LNdWB_register_Asm_8 = 1285, VLD4LNq16 = 1286, VLD4LNq16Pseudo = 1287, VLD4LNq16Pseudo_UPD = 1288, VLD4LNq16_UPD = 1289, VLD4LNq32 = 1290, VLD4LNq32Pseudo = 1291, VLD4LNq32Pseudo_UPD = 1292, VLD4LNq32_UPD = 1293, VLD4LNqAsm_16 = 1294, VLD4LNqAsm_32 = 1295, VLD4LNqWB_fixed_Asm_16 = 1296, VLD4LNqWB_fixed_Asm_32 = 1297, VLD4LNqWB_register_Asm_16 = 1298, VLD4LNqWB_register_Asm_32 = 1299, VLD4d16 = 1300, VLD4d16Pseudo = 1301, VLD4d16Pseudo_UPD = 1302, VLD4d16_UPD = 1303, VLD4d32 = 1304, VLD4d32Pseudo = 1305, VLD4d32Pseudo_UPD = 1306, VLD4d32_UPD = 1307, VLD4d8 = 1308, VLD4d8Pseudo = 1309, VLD4d8Pseudo_UPD = 1310, VLD4d8_UPD = 1311, VLD4dAsm_16 = 1312, VLD4dAsm_32 = 1313, VLD4dAsm_8 = 1314, VLD4dWB_fixed_Asm_16 = 1315, VLD4dWB_fixed_Asm_32 = 1316, VLD4dWB_fixed_Asm_8 = 1317, VLD4dWB_register_Asm_16 = 1318, VLD4dWB_register_Asm_32 = 1319, VLD4dWB_register_Asm_8 = 1320, VLD4q16 = 1321, VLD4q16Pseudo_UPD = 1322, VLD4q16_UPD = 1323, VLD4q16oddPseudo = 1324, VLD4q16oddPseudo_UPD = 1325, VLD4q32 = 1326, VLD4q32Pseudo_UPD = 1327, VLD4q32_UPD = 1328, VLD4q32oddPseudo = 1329, VLD4q32oddPseudo_UPD = 1330, VLD4q8 = 1331, VLD4q8Pseudo_UPD = 1332, VLD4q8_UPD = 1333, VLD4q8oddPseudo = 1334, VLD4q8oddPseudo_UPD = 1335, VLD4qAsm_16 = 1336, VLD4qAsm_32 = 1337, VLD4qAsm_8 = 1338, VLD4qWB_fixed_Asm_16 = 1339, VLD4qWB_fixed_Asm_32 = 1340, VLD4qWB_fixed_Asm_8 = 1341, VLD4qWB_register_Asm_16 = 1342, VLD4qWB_register_Asm_32 = 1343, VLD4qWB_register_Asm_8 = 1344, VLDMDDB_UPD = 1345, VLDMDIA = 1346, VLDMDIA_UPD = 1347, VLDMQIA = 1348, VLDMSDB_UPD = 1349, VLDMSIA = 1350, VLDMSIA_UPD = 1351, VLDRD = 1352, VLDRH = 1353, VLDRS = 1354, VLLDM = 1355, VLSTM = 1356, VMAXNMD = 1357, VMAXNMH = 1358, VMAXNMNDf = 1359, VMAXNMNDh = 1360, VMAXNMNQf = 1361, VMAXNMNQh = 1362, VMAXNMS = 1363, VMAXfd = 1364, VMAXfq = 1365, VMAXhd = 1366, VMAXhq = 1367, VMAXsv16i8 = 1368, VMAXsv2i32 = 1369, VMAXsv4i16 = 1370, VMAXsv4i32 = 1371, VMAXsv8i16 = 1372, VMAXsv8i8 = 1373, VMAXuv16i8 = 1374, VMAXuv2i32 = 1375, VMAXuv4i16 = 1376, VMAXuv4i32 = 1377, VMAXuv8i16 = 1378, VMAXuv8i8 = 1379, VMINNMD = 1380, VMINNMH = 1381, VMINNMNDf = 1382, VMINNMNDh = 1383, VMINNMNQf = 1384, VMINNMNQh = 1385, VMINNMS = 1386, VMINfd = 1387, VMINfq = 1388, VMINhd = 1389, VMINhq = 1390, VMINsv16i8 = 1391, VMINsv2i32 = 1392, VMINsv4i16 = 1393, VMINsv4i32 = 1394, VMINsv8i16 = 1395, VMINsv8i8 = 1396, VMINuv16i8 = 1397, VMINuv2i32 = 1398, VMINuv4i16 = 1399, VMINuv4i32 = 1400, VMINuv8i16 = 1401, VMINuv8i8 = 1402, VMLAD = 1403, VMLAH = 1404, VMLALslsv2i32 = 1405, VMLALslsv4i16 = 1406, VMLALsluv2i32 = 1407, VMLALsluv4i16 = 1408, VMLALsv2i64 = 1409, VMLALsv4i32 = 1410, VMLALsv8i16 = 1411, VMLALuv2i64 = 1412, VMLALuv4i32 = 1413, VMLALuv8i16 = 1414, VMLAS = 1415, VMLAfd = 1416, VMLAfq = 1417, VMLAhd = 1418, VMLAhq = 1419, VMLAslfd = 1420, VMLAslfq = 1421, VMLAslhd = 1422, VMLAslhq = 1423, VMLAslv2i32 = 1424, VMLAslv4i16 = 1425, VMLAslv4i32 = 1426, VMLAslv8i16 = 1427, VMLAv16i8 = 1428, VMLAv2i32 = 1429, VMLAv4i16 = 1430, VMLAv4i32 = 1431, VMLAv8i16 = 1432, VMLAv8i8 = 1433, VMLSD = 1434, VMLSH = 1435, VMLSLslsv2i32 = 1436, VMLSLslsv4i16 = 1437, VMLSLsluv2i32 = 1438, VMLSLsluv4i16 = 1439, VMLSLsv2i64 = 1440, VMLSLsv4i32 = 1441, VMLSLsv8i16 = 1442, VMLSLuv2i64 = 1443, VMLSLuv4i32 = 1444, VMLSLuv8i16 = 1445, VMLSS = 1446, VMLSfd = 1447, VMLSfq = 1448, VMLShd = 1449, VMLShq = 1450, VMLSslfd = 1451, VMLSslfq = 1452, VMLSslhd = 1453, VMLSslhq = 1454, VMLSslv2i32 = 1455, VMLSslv4i16 = 1456, VMLSslv4i32 = 1457, VMLSslv8i16 = 1458, VMLSv16i8 = 1459, VMLSv2i32 = 1460, VMLSv4i16 = 1461, VMLSv4i32 = 1462, VMLSv8i16 = 1463, VMLSv8i8 = 1464, VMOVD = 1465, VMOVD0 = 1466, VMOVDRR = 1467, VMOVDcc = 1468, VMOVH = 1469, VMOVHR = 1470, VMOVLsv2i64 = 1471, VMOVLsv4i32 = 1472, VMOVLsv8i16 = 1473, VMOVLuv2i64 = 1474, VMOVLuv4i32 = 1475, VMOVLuv8i16 = 1476, VMOVNv2i32 = 1477, VMOVNv4i16 = 1478, VMOVNv8i8 = 1479, VMOVQ0 = 1480, VMOVRH = 1481, VMOVRRD = 1482, VMOVRRS = 1483, VMOVRS = 1484, VMOVS = 1485, VMOVSR = 1486, VMOVSRR = 1487, VMOVScc = 1488, VMOVv16i8 = 1489, VMOVv1i64 = 1490, VMOVv2f32 = 1491, VMOVv2i32 = 1492, VMOVv2i64 = 1493, VMOVv4f32 = 1494, VMOVv4i16 = 1495, VMOVv4i32 = 1496, VMOVv8i16 = 1497, VMOVv8i8 = 1498, VMRS = 1499, VMRS_FPEXC = 1500, VMRS_FPINST = 1501, VMRS_FPINST2 = 1502, VMRS_FPSID = 1503, VMRS_MVFR0 = 1504, VMRS_MVFR1 = 1505, VMRS_MVFR2 = 1506, VMSR = 1507, VMSR_FPEXC = 1508, VMSR_FPINST = 1509, VMSR_FPINST2 = 1510, VMSR_FPSID = 1511, VMULD = 1512, VMULH = 1513, VMULLp64 = 1514, VMULLp8 = 1515, VMULLslsv2i32 = 1516, VMULLslsv4i16 = 1517, VMULLsluv2i32 = 1518, VMULLsluv4i16 = 1519, VMULLsv2i64 = 1520, VMULLsv4i32 = 1521, VMULLsv8i16 = 1522, VMULLuv2i64 = 1523, VMULLuv4i32 = 1524, VMULLuv8i16 = 1525, VMULS = 1526, VMULfd = 1527, VMULfq = 1528, VMULhd = 1529, VMULhq = 1530, VMULpd = 1531, VMULpq = 1532, VMULslfd = 1533, VMULslfq = 1534, VMULslhd = 1535, VMULslhq = 1536, VMULslv2i32 = 1537, VMULslv4i16 = 1538, VMULslv4i32 = 1539, VMULslv8i16 = 1540, VMULv16i8 = 1541, VMULv2i32 = 1542, VMULv4i16 = 1543, VMULv4i32 = 1544, VMULv8i16 = 1545, VMULv8i8 = 1546, VMVNd = 1547, VMVNq = 1548, VMVNv2i32 = 1549, VMVNv4i16 = 1550, VMVNv4i32 = 1551, VMVNv8i16 = 1552, VNEGD = 1553, VNEGH = 1554, VNEGS = 1555, VNEGf32q = 1556, VNEGfd = 1557, VNEGhd = 1558, VNEGhq = 1559, VNEGs16d = 1560, VNEGs16q = 1561, VNEGs32d = 1562, VNEGs32q = 1563, VNEGs8d = 1564, VNEGs8q = 1565, VNMLAD = 1566, VNMLAH = 1567, VNMLAS = 1568, VNMLSD = 1569, VNMLSH = 1570, VNMLSS = 1571, VNMULD = 1572, VNMULH = 1573, VNMULS = 1574, VORNd = 1575, VORNq = 1576, VORRd = 1577, VORRiv2i32 = 1578, VORRiv4i16 = 1579, VORRiv4i32 = 1580, VORRiv8i16 = 1581, VORRq = 1582, VPADALsv16i8 = 1583, VPADALsv2i32 = 1584, VPADALsv4i16 = 1585, VPADALsv4i32 = 1586, VPADALsv8i16 = 1587, VPADALsv8i8 = 1588, VPADALuv16i8 = 1589, VPADALuv2i32 = 1590, VPADALuv4i16 = 1591, VPADALuv4i32 = 1592, VPADALuv8i16 = 1593, VPADALuv8i8 = 1594, VPADDLsv16i8 = 1595, VPADDLsv2i32 = 1596, VPADDLsv4i16 = 1597, VPADDLsv4i32 = 1598, VPADDLsv8i16 = 1599, VPADDLsv8i8 = 1600, VPADDLuv16i8 = 1601, VPADDLuv2i32 = 1602, VPADDLuv4i16 = 1603, VPADDLuv4i32 = 1604, VPADDLuv8i16 = 1605, VPADDLuv8i8 = 1606, VPADDf = 1607, VPADDh = 1608, VPADDi16 = 1609, VPADDi32 = 1610, VPADDi8 = 1611, VPMAXf = 1612, VPMAXh = 1613, VPMAXs16 = 1614, VPMAXs32 = 1615, VPMAXs8 = 1616, VPMAXu16 = 1617, VPMAXu32 = 1618, VPMAXu8 = 1619, VPMINf = 1620, VPMINh = 1621, VPMINs16 = 1622, VPMINs32 = 1623, VPMINs8 = 1624, VPMINu16 = 1625, VPMINu32 = 1626, VPMINu8 = 1627, VQABSv16i8 = 1628, VQABSv2i32 = 1629, VQABSv4i16 = 1630, VQABSv4i32 = 1631, VQABSv8i16 = 1632, VQABSv8i8 = 1633, VQADDsv16i8 = 1634, VQADDsv1i64 = 1635, VQADDsv2i32 = 1636, VQADDsv2i64 = 1637, VQADDsv4i16 = 1638, VQADDsv4i32 = 1639, VQADDsv8i16 = 1640, VQADDsv8i8 = 1641, VQADDuv16i8 = 1642, VQADDuv1i64 = 1643, VQADDuv2i32 = 1644, VQADDuv2i64 = 1645, VQADDuv4i16 = 1646, VQADDuv4i32 = 1647, VQADDuv8i16 = 1648, VQADDuv8i8 = 1649, VQDMLALslv2i32 = 1650, VQDMLALslv4i16 = 1651, VQDMLALv2i64 = 1652, VQDMLALv4i32 = 1653, VQDMLSLslv2i32 = 1654, VQDMLSLslv4i16 = 1655, VQDMLSLv2i64 = 1656, VQDMLSLv4i32 = 1657, VQDMULHslv2i32 = 1658, VQDMULHslv4i16 = 1659, VQDMULHslv4i32 = 1660, VQDMULHslv8i16 = 1661, VQDMULHv2i32 = 1662, VQDMULHv4i16 = 1663, VQDMULHv4i32 = 1664, VQDMULHv8i16 = 1665, VQDMULLslv2i32 = 1666, VQDMULLslv4i16 = 1667, VQDMULLv2i64 = 1668, VQDMULLv4i32 = 1669, VQMOVNsuv2i32 = 1670, VQMOVNsuv4i16 = 1671, VQMOVNsuv8i8 = 1672, VQMOVNsv2i32 = 1673, VQMOVNsv4i16 = 1674, VQMOVNsv8i8 = 1675, VQMOVNuv2i32 = 1676, VQMOVNuv4i16 = 1677, VQMOVNuv8i8 = 1678, VQNEGv16i8 = 1679, VQNEGv2i32 = 1680, VQNEGv4i16 = 1681, VQNEGv4i32 = 1682, VQNEGv8i16 = 1683, VQNEGv8i8 = 1684, VQRDMLAHslv2i32 = 1685, VQRDMLAHslv4i16 = 1686, VQRDMLAHslv4i32 = 1687, VQRDMLAHslv8i16 = 1688, VQRDMLAHv2i32 = 1689, VQRDMLAHv4i16 = 1690, VQRDMLAHv4i32 = 1691, VQRDMLAHv8i16 = 1692, VQRDMLSHslv2i32 = 1693, VQRDMLSHslv4i16 = 1694, VQRDMLSHslv4i32 = 1695, VQRDMLSHslv8i16 = 1696, VQRDMLSHv2i32 = 1697, VQRDMLSHv4i16 = 1698, VQRDMLSHv4i32 = 1699, VQRDMLSHv8i16 = 1700, VQRDMULHslv2i32 = 1701, VQRDMULHslv4i16 = 1702, VQRDMULHslv4i32 = 1703, VQRDMULHslv8i16 = 1704, VQRDMULHv2i32 = 1705, VQRDMULHv4i16 = 1706, VQRDMULHv4i32 = 1707, VQRDMULHv8i16 = 1708, VQRSHLsv16i8 = 1709, VQRSHLsv1i64 = 1710, VQRSHLsv2i32 = 1711, VQRSHLsv2i64 = 1712, VQRSHLsv4i16 = 1713, VQRSHLsv4i32 = 1714, VQRSHLsv8i16 = 1715, VQRSHLsv8i8 = 1716, VQRSHLuv16i8 = 1717, VQRSHLuv1i64 = 1718, VQRSHLuv2i32 = 1719, VQRSHLuv2i64 = 1720, VQRSHLuv4i16 = 1721, VQRSHLuv4i32 = 1722, VQRSHLuv8i16 = 1723, VQRSHLuv8i8 = 1724, VQRSHRNsv2i32 = 1725, VQRSHRNsv4i16 = 1726, VQRSHRNsv8i8 = 1727, VQRSHRNuv2i32 = 1728, VQRSHRNuv4i16 = 1729, VQRSHRNuv8i8 = 1730, VQRSHRUNv2i32 = 1731, VQRSHRUNv4i16 = 1732, VQRSHRUNv8i8 = 1733, VQSHLsiv16i8 = 1734, VQSHLsiv1i64 = 1735, VQSHLsiv2i32 = 1736, VQSHLsiv2i64 = 1737, VQSHLsiv4i16 = 1738, VQSHLsiv4i32 = 1739, VQSHLsiv8i16 = 1740, VQSHLsiv8i8 = 1741, VQSHLsuv16i8 = 1742, VQSHLsuv1i64 = 1743, VQSHLsuv2i32 = 1744, VQSHLsuv2i64 = 1745, VQSHLsuv4i16 = 1746, VQSHLsuv4i32 = 1747, VQSHLsuv8i16 = 1748, VQSHLsuv8i8 = 1749, VQSHLsv16i8 = 1750, VQSHLsv1i64 = 1751, VQSHLsv2i32 = 1752, VQSHLsv2i64 = 1753, VQSHLsv4i16 = 1754, VQSHLsv4i32 = 1755, VQSHLsv8i16 = 1756, VQSHLsv8i8 = 1757, VQSHLuiv16i8 = 1758, VQSHLuiv1i64 = 1759, VQSHLuiv2i32 = 1760, VQSHLuiv2i64 = 1761, VQSHLuiv4i16 = 1762, VQSHLuiv4i32 = 1763, VQSHLuiv8i16 = 1764, VQSHLuiv8i8 = 1765, VQSHLuv16i8 = 1766, VQSHLuv1i64 = 1767, VQSHLuv2i32 = 1768, VQSHLuv2i64 = 1769, VQSHLuv4i16 = 1770, VQSHLuv4i32 = 1771, VQSHLuv8i16 = 1772, VQSHLuv8i8 = 1773, VQSHRNsv2i32 = 1774, VQSHRNsv4i16 = 1775, VQSHRNsv8i8 = 1776, VQSHRNuv2i32 = 1777, VQSHRNuv4i16 = 1778, VQSHRNuv8i8 = 1779, VQSHRUNv2i32 = 1780, VQSHRUNv4i16 = 1781, VQSHRUNv8i8 = 1782, VQSUBsv16i8 = 1783, VQSUBsv1i64 = 1784, VQSUBsv2i32 = 1785, VQSUBsv2i64 = 1786, VQSUBsv4i16 = 1787, VQSUBsv4i32 = 1788, VQSUBsv8i16 = 1789, VQSUBsv8i8 = 1790, VQSUBuv16i8 = 1791, VQSUBuv1i64 = 1792, VQSUBuv2i32 = 1793, VQSUBuv2i64 = 1794, VQSUBuv4i16 = 1795, VQSUBuv4i32 = 1796, VQSUBuv8i16 = 1797, VQSUBuv8i8 = 1798, VRADDHNv2i32 = 1799, VRADDHNv4i16 = 1800, VRADDHNv8i8 = 1801, VRECPEd = 1802, VRECPEfd = 1803, VRECPEfq = 1804, VRECPEhd = 1805, VRECPEhq = 1806, VRECPEq = 1807, VRECPSfd = 1808, VRECPSfq = 1809, VRECPShd = 1810, VRECPShq = 1811, VREV16d8 = 1812, VREV16q8 = 1813, VREV32d16 = 1814, VREV32d8 = 1815, VREV32q16 = 1816, VREV32q8 = 1817, VREV64d16 = 1818, VREV64d32 = 1819, VREV64d8 = 1820, VREV64q16 = 1821, VREV64q32 = 1822, VREV64q8 = 1823, VRHADDsv16i8 = 1824, VRHADDsv2i32 = 1825, VRHADDsv4i16 = 1826, VRHADDsv4i32 = 1827, VRHADDsv8i16 = 1828, VRHADDsv8i8 = 1829, VRHADDuv16i8 = 1830, VRHADDuv2i32 = 1831, VRHADDuv4i16 = 1832, VRHADDuv4i32 = 1833, VRHADDuv8i16 = 1834, VRHADDuv8i8 = 1835, VRINTAD = 1836, VRINTAH = 1837, VRINTANDf = 1838, VRINTANDh = 1839, VRINTANQf = 1840, VRINTANQh = 1841, VRINTAS = 1842, VRINTMD = 1843, VRINTMH = 1844, VRINTMNDf = 1845, VRINTMNDh = 1846, VRINTMNQf = 1847, VRINTMNQh = 1848, VRINTMS = 1849, VRINTND = 1850, VRINTNH = 1851, VRINTNNDf = 1852, VRINTNNDh = 1853, VRINTNNQf = 1854, VRINTNNQh = 1855, VRINTNS = 1856, VRINTPD = 1857, VRINTPH = 1858, VRINTPNDf = 1859, VRINTPNDh = 1860, VRINTPNQf = 1861, VRINTPNQh = 1862, VRINTPS = 1863, VRINTRD = 1864, VRINTRH = 1865, VRINTRS = 1866, VRINTXD = 1867, VRINTXH = 1868, VRINTXNDf = 1869, VRINTXNDh = 1870, VRINTXNQf = 1871, VRINTXNQh = 1872, VRINTXS = 1873, VRINTZD = 1874, VRINTZH = 1875, VRINTZNDf = 1876, VRINTZNDh = 1877, VRINTZNQf = 1878, VRINTZNQh = 1879, VRINTZS = 1880, VRSHLsv16i8 = 1881, VRSHLsv1i64 = 1882, VRSHLsv2i32 = 1883, VRSHLsv2i64 = 1884, VRSHLsv4i16 = 1885, VRSHLsv4i32 = 1886, VRSHLsv8i16 = 1887, VRSHLsv8i8 = 1888, VRSHLuv16i8 = 1889, VRSHLuv1i64 = 1890, VRSHLuv2i32 = 1891, VRSHLuv2i64 = 1892, VRSHLuv4i16 = 1893, VRSHLuv4i32 = 1894, VRSHLuv8i16 = 1895, VRSHLuv8i8 = 1896, VRSHRNv2i32 = 1897, VRSHRNv4i16 = 1898, VRSHRNv8i8 = 1899, VRSHRsv16i8 = 1900, VRSHRsv1i64 = 1901, VRSHRsv2i32 = 1902, VRSHRsv2i64 = 1903, VRSHRsv4i16 = 1904, VRSHRsv4i32 = 1905, VRSHRsv8i16 = 1906, VRSHRsv8i8 = 1907, VRSHRuv16i8 = 1908, VRSHRuv1i64 = 1909, VRSHRuv2i32 = 1910, VRSHRuv2i64 = 1911, VRSHRuv4i16 = 1912, VRSHRuv4i32 = 1913, VRSHRuv8i16 = 1914, VRSHRuv8i8 = 1915, VRSQRTEd = 1916, VRSQRTEfd = 1917, VRSQRTEfq = 1918, VRSQRTEhd = 1919, VRSQRTEhq = 1920, VRSQRTEq = 1921, VRSQRTSfd = 1922, VRSQRTSfq = 1923, VRSQRTShd = 1924, VRSQRTShq = 1925, VRSRAsv16i8 = 1926, VRSRAsv1i64 = 1927, VRSRAsv2i32 = 1928, VRSRAsv2i64 = 1929, VRSRAsv4i16 = 1930, VRSRAsv4i32 = 1931, VRSRAsv8i16 = 1932, VRSRAsv8i8 = 1933, VRSRAuv16i8 = 1934, VRSRAuv1i64 = 1935, VRSRAuv2i32 = 1936, VRSRAuv2i64 = 1937, VRSRAuv4i16 = 1938, VRSRAuv4i32 = 1939, VRSRAuv8i16 = 1940, VRSRAuv8i8 = 1941, VRSUBHNv2i32 = 1942, VRSUBHNv4i16 = 1943, VRSUBHNv8i8 = 1944, VSELEQD = 1945, VSELEQH = 1946, VSELEQS = 1947, VSELGED = 1948, VSELGEH = 1949, VSELGES = 1950, VSELGTD = 1951, VSELGTH = 1952, VSELGTS = 1953, VSELVSD = 1954, VSELVSH = 1955, VSELVSS = 1956, VSETLNi16 = 1957, VSETLNi32 = 1958, VSETLNi8 = 1959, VSHLLi16 = 1960, VSHLLi32 = 1961, VSHLLi8 = 1962, VSHLLsv2i64 = 1963, VSHLLsv4i32 = 1964, VSHLLsv8i16 = 1965, VSHLLuv2i64 = 1966, VSHLLuv4i32 = 1967, VSHLLuv8i16 = 1968, VSHLiv16i8 = 1969, VSHLiv1i64 = 1970, VSHLiv2i32 = 1971, VSHLiv2i64 = 1972, VSHLiv4i16 = 1973, VSHLiv4i32 = 1974, VSHLiv8i16 = 1975, VSHLiv8i8 = 1976, VSHLsv16i8 = 1977, VSHLsv1i64 = 1978, VSHLsv2i32 = 1979, VSHLsv2i64 = 1980, VSHLsv4i16 = 1981, VSHLsv4i32 = 1982, VSHLsv8i16 = 1983, VSHLsv8i8 = 1984, VSHLuv16i8 = 1985, VSHLuv1i64 = 1986, VSHLuv2i32 = 1987, VSHLuv2i64 = 1988, VSHLuv4i16 = 1989, VSHLuv4i32 = 1990, VSHLuv8i16 = 1991, VSHLuv8i8 = 1992, VSHRNv2i32 = 1993, VSHRNv4i16 = 1994, VSHRNv8i8 = 1995, VSHRsv16i8 = 1996, VSHRsv1i64 = 1997, VSHRsv2i32 = 1998, VSHRsv2i64 = 1999, VSHRsv4i16 = 2000, VSHRsv4i32 = 2001, VSHRsv8i16 = 2002, VSHRsv8i8 = 2003, VSHRuv16i8 = 2004, VSHRuv1i64 = 2005, VSHRuv2i32 = 2006, VSHRuv2i64 = 2007, VSHRuv4i16 = 2008, VSHRuv4i32 = 2009, VSHRuv8i16 = 2010, VSHRuv8i8 = 2011, VSHTOD = 2012, VSHTOH = 2013, VSHTOS = 2014, VSITOD = 2015, VSITOH = 2016, VSITOS = 2017, VSLIv16i8 = 2018, VSLIv1i64 = 2019, VSLIv2i32 = 2020, VSLIv2i64 = 2021, VSLIv4i16 = 2022, VSLIv4i32 = 2023, VSLIv8i16 = 2024, VSLIv8i8 = 2025, VSLTOD = 2026, VSLTOH = 2027, VSLTOS = 2028, VSQRTD = 2029, VSQRTH = 2030, VSQRTS = 2031, VSRAsv16i8 = 2032, VSRAsv1i64 = 2033, VSRAsv2i32 = 2034, VSRAsv2i64 = 2035, VSRAsv4i16 = 2036, VSRAsv4i32 = 2037, VSRAsv8i16 = 2038, VSRAsv8i8 = 2039, VSRAuv16i8 = 2040, VSRAuv1i64 = 2041, VSRAuv2i32 = 2042, VSRAuv2i64 = 2043, VSRAuv4i16 = 2044, VSRAuv4i32 = 2045, VSRAuv8i16 = 2046, VSRAuv8i8 = 2047, VSRIv16i8 = 2048, VSRIv1i64 = 2049, VSRIv2i32 = 2050, VSRIv2i64 = 2051, VSRIv4i16 = 2052, VSRIv4i32 = 2053, VSRIv8i16 = 2054, VSRIv8i8 = 2055, VST1LNd16 = 2056, VST1LNd16_UPD = 2057, VST1LNd32 = 2058, VST1LNd32_UPD = 2059, VST1LNd8 = 2060, VST1LNd8_UPD = 2061, VST1LNdAsm_16 = 2062, VST1LNdAsm_32 = 2063, VST1LNdAsm_8 = 2064, VST1LNdWB_fixed_Asm_16 = 2065, VST1LNdWB_fixed_Asm_32 = 2066, VST1LNdWB_fixed_Asm_8 = 2067, VST1LNdWB_register_Asm_16 = 2068, VST1LNdWB_register_Asm_32 = 2069, VST1LNdWB_register_Asm_8 = 2070, VST1LNq16Pseudo = 2071, VST1LNq16Pseudo_UPD = 2072, VST1LNq32Pseudo = 2073, VST1LNq32Pseudo_UPD = 2074, VST1LNq8Pseudo = 2075, VST1LNq8Pseudo_UPD = 2076, VST1d16 = 2077, VST1d16Q = 2078, VST1d16Qwb_fixed = 2079, VST1d16Qwb_register = 2080, VST1d16T = 2081, VST1d16Twb_fixed = 2082, VST1d16Twb_register = 2083, VST1d16wb_fixed = 2084, VST1d16wb_register = 2085, VST1d32 = 2086, VST1d32Q = 2087, VST1d32Qwb_fixed = 2088, VST1d32Qwb_register = 2089, VST1d32T = 2090, VST1d32Twb_fixed = 2091, VST1d32Twb_register = 2092, VST1d32wb_fixed = 2093, VST1d32wb_register = 2094, VST1d64 = 2095, VST1d64Q = 2096, VST1d64QPseudo = 2097, VST1d64QPseudoWB_fixed = 2098, VST1d64QPseudoWB_register = 2099, VST1d64Qwb_fixed = 2100, VST1d64Qwb_register = 2101, VST1d64T = 2102, VST1d64TPseudo = 2103, VST1d64TPseudoWB_fixed = 2104, VST1d64TPseudoWB_register = 2105, VST1d64Twb_fixed = 2106, VST1d64Twb_register = 2107, VST1d64wb_fixed = 2108, VST1d64wb_register = 2109, VST1d8 = 2110, VST1d8Q = 2111, VST1d8Qwb_fixed = 2112, VST1d8Qwb_register = 2113, VST1d8T = 2114, VST1d8Twb_fixed = 2115, VST1d8Twb_register = 2116, VST1d8wb_fixed = 2117, VST1d8wb_register = 2118, VST1q16 = 2119, VST1q16wb_fixed = 2120, VST1q16wb_register = 2121, VST1q32 = 2122, VST1q32wb_fixed = 2123, VST1q32wb_register = 2124, VST1q64 = 2125, VST1q64wb_fixed = 2126, VST1q64wb_register = 2127, VST1q8 = 2128, VST1q8wb_fixed = 2129, VST1q8wb_register = 2130, VST2LNd16 = 2131, VST2LNd16Pseudo = 2132, VST2LNd16Pseudo_UPD = 2133, VST2LNd16_UPD = 2134, VST2LNd32 = 2135, VST2LNd32Pseudo = 2136, VST2LNd32Pseudo_UPD = 2137, VST2LNd32_UPD = 2138, VST2LNd8 = 2139, VST2LNd8Pseudo = 2140, VST2LNd8Pseudo_UPD = 2141, VST2LNd8_UPD = 2142, VST2LNdAsm_16 = 2143, VST2LNdAsm_32 = 2144, VST2LNdAsm_8 = 2145, VST2LNdWB_fixed_Asm_16 = 2146, VST2LNdWB_fixed_Asm_32 = 2147, VST2LNdWB_fixed_Asm_8 = 2148, VST2LNdWB_register_Asm_16 = 2149, VST2LNdWB_register_Asm_32 = 2150, VST2LNdWB_register_Asm_8 = 2151, VST2LNq16 = 2152, VST2LNq16Pseudo = 2153, VST2LNq16Pseudo_UPD = 2154, VST2LNq16_UPD = 2155, VST2LNq32 = 2156, VST2LNq32Pseudo = 2157, VST2LNq32Pseudo_UPD = 2158, VST2LNq32_UPD = 2159, VST2LNqAsm_16 = 2160, VST2LNqAsm_32 = 2161, VST2LNqWB_fixed_Asm_16 = 2162, VST2LNqWB_fixed_Asm_32 = 2163, VST2LNqWB_register_Asm_16 = 2164, VST2LNqWB_register_Asm_32 = 2165, VST2b16 = 2166, VST2b16wb_fixed = 2167, VST2b16wb_register = 2168, VST2b32 = 2169, VST2b32wb_fixed = 2170, VST2b32wb_register = 2171, VST2b8 = 2172, VST2b8wb_fixed = 2173, VST2b8wb_register = 2174, VST2d16 = 2175, VST2d16wb_fixed = 2176, VST2d16wb_register = 2177, VST2d32 = 2178, VST2d32wb_fixed = 2179, VST2d32wb_register = 2180, VST2d8 = 2181, VST2d8wb_fixed = 2182, VST2d8wb_register = 2183, VST2q16 = 2184, VST2q16Pseudo = 2185, VST2q16PseudoWB_fixed = 2186, VST2q16PseudoWB_register = 2187, VST2q16wb_fixed = 2188, VST2q16wb_register = 2189, VST2q32 = 2190, VST2q32Pseudo = 2191, VST2q32PseudoWB_fixed = 2192, VST2q32PseudoWB_register = 2193, VST2q32wb_fixed = 2194, VST2q32wb_register = 2195, VST2q8 = 2196, VST2q8Pseudo = 2197, VST2q8PseudoWB_fixed = 2198, VST2q8PseudoWB_register = 2199, VST2q8wb_fixed = 2200, VST2q8wb_register = 2201, VST3LNd16 = 2202, VST3LNd16Pseudo = 2203, VST3LNd16Pseudo_UPD = 2204, VST3LNd16_UPD = 2205, VST3LNd32 = 2206, VST3LNd32Pseudo = 2207, VST3LNd32Pseudo_UPD = 2208, VST3LNd32_UPD = 2209, VST3LNd8 = 2210, VST3LNd8Pseudo = 2211, VST3LNd8Pseudo_UPD = 2212, VST3LNd8_UPD = 2213, VST3LNdAsm_16 = 2214, VST3LNdAsm_32 = 2215, VST3LNdAsm_8 = 2216, VST3LNdWB_fixed_Asm_16 = 2217, VST3LNdWB_fixed_Asm_32 = 2218, VST3LNdWB_fixed_Asm_8 = 2219, VST3LNdWB_register_Asm_16 = 2220, VST3LNdWB_register_Asm_32 = 2221, VST3LNdWB_register_Asm_8 = 2222, VST3LNq16 = 2223, VST3LNq16Pseudo = 2224, VST3LNq16Pseudo_UPD = 2225, VST3LNq16_UPD = 2226, VST3LNq32 = 2227, VST3LNq32Pseudo = 2228, VST3LNq32Pseudo_UPD = 2229, VST3LNq32_UPD = 2230, VST3LNqAsm_16 = 2231, VST3LNqAsm_32 = 2232, VST3LNqWB_fixed_Asm_16 = 2233, VST3LNqWB_fixed_Asm_32 = 2234, VST3LNqWB_register_Asm_16 = 2235, VST3LNqWB_register_Asm_32 = 2236, VST3d16 = 2237, VST3d16Pseudo = 2238, VST3d16Pseudo_UPD = 2239, VST3d16_UPD = 2240, VST3d32 = 2241, VST3d32Pseudo = 2242, VST3d32Pseudo_UPD = 2243, VST3d32_UPD = 2244, VST3d8 = 2245, VST3d8Pseudo = 2246, VST3d8Pseudo_UPD = 2247, VST3d8_UPD = 2248, VST3dAsm_16 = 2249, VST3dAsm_32 = 2250, VST3dAsm_8 = 2251, VST3dWB_fixed_Asm_16 = 2252, VST3dWB_fixed_Asm_32 = 2253, VST3dWB_fixed_Asm_8 = 2254, VST3dWB_register_Asm_16 = 2255, VST3dWB_register_Asm_32 = 2256, VST3dWB_register_Asm_8 = 2257, VST3q16 = 2258, VST3q16Pseudo_UPD = 2259, VST3q16_UPD = 2260, VST3q16oddPseudo = 2261, VST3q16oddPseudo_UPD = 2262, VST3q32 = 2263, VST3q32Pseudo_UPD = 2264, VST3q32_UPD = 2265, VST3q32oddPseudo = 2266, VST3q32oddPseudo_UPD = 2267, VST3q8 = 2268, VST3q8Pseudo_UPD = 2269, VST3q8_UPD = 2270, VST3q8oddPseudo = 2271, VST3q8oddPseudo_UPD = 2272, VST3qAsm_16 = 2273, VST3qAsm_32 = 2274, VST3qAsm_8 = 2275, VST3qWB_fixed_Asm_16 = 2276, VST3qWB_fixed_Asm_32 = 2277, VST3qWB_fixed_Asm_8 = 2278, VST3qWB_register_Asm_16 = 2279, VST3qWB_register_Asm_32 = 2280, VST3qWB_register_Asm_8 = 2281, VST4LNd16 = 2282, VST4LNd16Pseudo = 2283, VST4LNd16Pseudo_UPD = 2284, VST4LNd16_UPD = 2285, VST4LNd32 = 2286, VST4LNd32Pseudo = 2287, VST4LNd32Pseudo_UPD = 2288, VST4LNd32_UPD = 2289, VST4LNd8 = 2290, VST4LNd8Pseudo = 2291, VST4LNd8Pseudo_UPD = 2292, VST4LNd8_UPD = 2293, VST4LNdAsm_16 = 2294, VST4LNdAsm_32 = 2295, VST4LNdAsm_8 = 2296, VST4LNdWB_fixed_Asm_16 = 2297, VST4LNdWB_fixed_Asm_32 = 2298, VST4LNdWB_fixed_Asm_8 = 2299, VST4LNdWB_register_Asm_16 = 2300, VST4LNdWB_register_Asm_32 = 2301, VST4LNdWB_register_Asm_8 = 2302, VST4LNq16 = 2303, VST4LNq16Pseudo = 2304, VST4LNq16Pseudo_UPD = 2305, VST4LNq16_UPD = 2306, VST4LNq32 = 2307, VST4LNq32Pseudo = 2308, VST4LNq32Pseudo_UPD = 2309, VST4LNq32_UPD = 2310, VST4LNqAsm_16 = 2311, VST4LNqAsm_32 = 2312, VST4LNqWB_fixed_Asm_16 = 2313, VST4LNqWB_fixed_Asm_32 = 2314, VST4LNqWB_register_Asm_16 = 2315, VST4LNqWB_register_Asm_32 = 2316, VST4d16 = 2317, VST4d16Pseudo = 2318, VST4d16Pseudo_UPD = 2319, VST4d16_UPD = 2320, VST4d32 = 2321, VST4d32Pseudo = 2322, VST4d32Pseudo_UPD = 2323, VST4d32_UPD = 2324, VST4d8 = 2325, VST4d8Pseudo = 2326, VST4d8Pseudo_UPD = 2327, VST4d8_UPD = 2328, VST4dAsm_16 = 2329, VST4dAsm_32 = 2330, VST4dAsm_8 = 2331, VST4dWB_fixed_Asm_16 = 2332, VST4dWB_fixed_Asm_32 = 2333, VST4dWB_fixed_Asm_8 = 2334, VST4dWB_register_Asm_16 = 2335, VST4dWB_register_Asm_32 = 2336, VST4dWB_register_Asm_8 = 2337, VST4q16 = 2338, VST4q16Pseudo_UPD = 2339, VST4q16_UPD = 2340, VST4q16oddPseudo = 2341, VST4q16oddPseudo_UPD = 2342, VST4q32 = 2343, VST4q32Pseudo_UPD = 2344, VST4q32_UPD = 2345, VST4q32oddPseudo = 2346, VST4q32oddPseudo_UPD = 2347, VST4q8 = 2348, VST4q8Pseudo_UPD = 2349, VST4q8_UPD = 2350, VST4q8oddPseudo = 2351, VST4q8oddPseudo_UPD = 2352, VST4qAsm_16 = 2353, VST4qAsm_32 = 2354, VST4qAsm_8 = 2355, VST4qWB_fixed_Asm_16 = 2356, VST4qWB_fixed_Asm_32 = 2357, VST4qWB_fixed_Asm_8 = 2358, VST4qWB_register_Asm_16 = 2359, VST4qWB_register_Asm_32 = 2360, VST4qWB_register_Asm_8 = 2361, VSTMDDB_UPD = 2362, VSTMDIA = 2363, VSTMDIA_UPD = 2364, VSTMQIA = 2365, VSTMSDB_UPD = 2366, VSTMSIA = 2367, VSTMSIA_UPD = 2368, VSTRD = 2369, VSTRH = 2370, VSTRS = 2371, VSUBD = 2372, VSUBH = 2373, VSUBHNv2i32 = 2374, VSUBHNv4i16 = 2375, VSUBHNv8i8 = 2376, VSUBLsv2i64 = 2377, VSUBLsv4i32 = 2378, VSUBLsv8i16 = 2379, VSUBLuv2i64 = 2380, VSUBLuv4i32 = 2381, VSUBLuv8i16 = 2382, VSUBS = 2383, VSUBWsv2i64 = 2384, VSUBWsv4i32 = 2385, VSUBWsv8i16 = 2386, VSUBWuv2i64 = 2387, VSUBWuv4i32 = 2388, VSUBWuv8i16 = 2389, VSUBfd = 2390, VSUBfq = 2391, VSUBhd = 2392, VSUBhq = 2393, VSUBv16i8 = 2394, VSUBv1i64 = 2395, VSUBv2i32 = 2396, VSUBv2i64 = 2397, VSUBv4i16 = 2398, VSUBv4i32 = 2399, VSUBv8i16 = 2400, VSUBv8i8 = 2401, VSWPd = 2402, VSWPq = 2403, VTBL1 = 2404, VTBL2 = 2405, VTBL3 = 2406, VTBL3Pseudo = 2407, VTBL4 = 2408, VTBL4Pseudo = 2409, VTBX1 = 2410, VTBX2 = 2411, VTBX3 = 2412, VTBX3Pseudo = 2413, VTBX4 = 2414, VTBX4Pseudo = 2415, VTOSHD = 2416, VTOSHH = 2417, VTOSHS = 2418, VTOSIRD = 2419, VTOSIRH = 2420, VTOSIRS = 2421, VTOSIZD = 2422, VTOSIZH = 2423, VTOSIZS = 2424, VTOSLD = 2425, VTOSLH = 2426, VTOSLS = 2427, VTOUHD = 2428, VTOUHH = 2429, VTOUHS = 2430, VTOUIRD = 2431, VTOUIRH = 2432, VTOUIRS = 2433, VTOUIZD = 2434, VTOUIZH = 2435, VTOUIZS = 2436, VTOULD = 2437, VTOULH = 2438, VTOULS = 2439, VTRNd16 = 2440, VTRNd32 = 2441, VTRNd8 = 2442, VTRNq16 = 2443, VTRNq32 = 2444, VTRNq8 = 2445, VTSTv16i8 = 2446, VTSTv2i32 = 2447, VTSTv4i16 = 2448, VTSTv4i32 = 2449, VTSTv8i16 = 2450, VTSTv8i8 = 2451, VUHTOD = 2452, VUHTOH = 2453, VUHTOS = 2454, VUITOD = 2455, VUITOH = 2456, VUITOS = 2457, VULTOD = 2458, VULTOH = 2459, VULTOS = 2460, VUZPd16 = 2461, VUZPd8 = 2462, VUZPq16 = 2463, VUZPq32 = 2464, VUZPq8 = 2465, VZIPd16 = 2466, VZIPd8 = 2467, VZIPq16 = 2468, VZIPq32 = 2469, VZIPq8 = 2470, WIN__CHKSTK = 2471, WIN__DBZCHK = 2472, sysLDMDA = 2473, sysLDMDA_UPD = 2474, sysLDMDB = 2475, sysLDMDB_UPD = 2476, sysLDMIA = 2477, sysLDMIA_UPD = 2478, sysLDMIB = 2479, sysLDMIB_UPD = 2480, sysSTMDA = 2481, sysSTMDA_UPD = 2482, sysSTMDB = 2483, sysSTMDB_UPD = 2484, sysSTMIA = 2485, sysSTMIA_UPD = 2486, sysSTMIB = 2487, sysSTMIB_UPD = 2488, t2ABS = 2489, t2ADCri = 2490, t2ADCrr = 2491, t2ADCrs = 2492, t2ADDSri = 2493, t2ADDSrr = 2494, t2ADDSrs = 2495, t2ADDri = 2496, t2ADDri12 = 2497, t2ADDrr = 2498, t2ADDrs = 2499, t2ADR = 2500, t2ANDri = 2501, t2ANDrr = 2502, t2ANDrs = 2503, t2ASRri = 2504, t2ASRrr = 2505, t2B = 2506, t2BFC = 2507, t2BFI = 2508, t2BICri = 2509, t2BICrr = 2510, t2BICrs = 2511, t2BR_JT = 2512, t2BXJ = 2513, t2Bcc = 2514, t2CDP = 2515, t2CDP2 = 2516, t2CLREX = 2517, t2CLZ = 2518, t2CMNri = 2519, t2CMNzrr = 2520, t2CMNzrs = 2521, t2CMPri = 2522, t2CMPrr = 2523, t2CMPrs = 2524, t2CPS1p = 2525, t2CPS2p = 2526, t2CPS3p = 2527, t2CRC32B = 2528, t2CRC32CB = 2529, t2CRC32CH = 2530, t2CRC32CW = 2531, t2CRC32H = 2532, t2CRC32W = 2533, t2DBG = 2534, t2DCPS1 = 2535, t2DCPS2 = 2536, t2DCPS3 = 2537, t2DMB = 2538, t2DSB = 2539, t2EORri = 2540, t2EORrr = 2541, t2EORrs = 2542, t2HINT = 2543, t2HVC = 2544, t2ISB = 2545, t2IT = 2546, t2Int_eh_sjlj_setjmp = 2547, t2Int_eh_sjlj_setjmp_nofp = 2548, t2LDA = 2549, t2LDAB = 2550, t2LDAEX = 2551, t2LDAEXB = 2552, t2LDAEXD = 2553, t2LDAEXH = 2554, t2LDAH = 2555, t2LDC2L_OFFSET = 2556, t2LDC2L_OPTION = 2557, t2LDC2L_POST = 2558, t2LDC2L_PRE = 2559, t2LDC2_OFFSET = 2560, t2LDC2_OPTION = 2561, t2LDC2_POST = 2562, t2LDC2_PRE = 2563, t2LDCL_OFFSET = 2564, t2LDCL_OPTION = 2565, t2LDCL_POST = 2566, t2LDCL_PRE = 2567, t2LDC_OFFSET = 2568, t2LDC_OPTION = 2569, t2LDC_POST = 2570, t2LDC_PRE = 2571, t2LDMDB = 2572, t2LDMDB_UPD = 2573, t2LDMIA = 2574, t2LDMIA_RET = 2575, t2LDMIA_UPD = 2576, t2LDRBT = 2577, t2LDRB_POST = 2578, t2LDRB_PRE = 2579, t2LDRBi12 = 2580, t2LDRBi8 = 2581, t2LDRBpci = 2582, t2LDRBpcrel = 2583, t2LDRBs = 2584, t2LDRD_POST = 2585, t2LDRD_PRE = 2586, t2LDRDi8 = 2587, t2LDREX = 2588, t2LDREXB = 2589, t2LDREXD = 2590, t2LDREXH = 2591, t2LDRHT = 2592, t2LDRH_POST = 2593, t2LDRH_PRE = 2594, t2LDRHi12 = 2595, t2LDRHi8 = 2596, t2LDRHpci = 2597, t2LDRHpcrel = 2598, t2LDRHs = 2599, t2LDRSBT = 2600, t2LDRSB_POST = 2601, t2LDRSB_PRE = 2602, t2LDRSBi12 = 2603, t2LDRSBi8 = 2604, t2LDRSBpci = 2605, t2LDRSBpcrel = 2606, t2LDRSBs = 2607, t2LDRSHT = 2608, t2LDRSH_POST = 2609, t2LDRSH_PRE = 2610, t2LDRSHi12 = 2611, t2LDRSHi8 = 2612, t2LDRSHpci = 2613, t2LDRSHpcrel = 2614, t2LDRSHs = 2615, t2LDRT = 2616, t2LDR_POST = 2617, t2LDR_PRE = 2618, t2LDRi12 = 2619, t2LDRi8 = 2620, t2LDRpci = 2621, t2LDRpci_pic = 2622, t2LDRpcrel = 2623, t2LDRs = 2624, t2LEApcrel = 2625, t2LEApcrelJT = 2626, t2LSLri = 2627, t2LSLrr = 2628, t2LSRri = 2629, t2LSRrr = 2630, t2MCR = 2631, t2MCR2 = 2632, t2MCRR = 2633, t2MCRR2 = 2634, t2MLA = 2635, t2MLS = 2636, t2MOVCCasr = 2637, t2MOVCCi = 2638, t2MOVCCi16 = 2639, t2MOVCCi32imm = 2640, t2MOVCClsl = 2641, t2MOVCClsr = 2642, t2MOVCCr = 2643, t2MOVCCror = 2644, t2MOVSsi = 2645, t2MOVSsr = 2646, t2MOVTi16 = 2647, t2MOVTi16_ga_pcrel = 2648, t2MOV_ga_pcrel = 2649, t2MOVi = 2650, t2MOVi16 = 2651, t2MOVi16_ga_pcrel = 2652, t2MOVi32imm = 2653, t2MOVr = 2654, t2MOVsi = 2655, t2MOVsr = 2656, t2MOVsra_flag = 2657, t2MOVsrl_flag = 2658, t2MRC = 2659, t2MRC2 = 2660, t2MRRC = 2661, t2MRRC2 = 2662, t2MRS_AR = 2663, t2MRS_M = 2664, t2MRSbanked = 2665, t2MRSsys_AR = 2666, t2MSR_AR = 2667, t2MSR_M = 2668, t2MSRbanked = 2669, t2MUL = 2670, t2MVNCCi = 2671, t2MVNi = 2672, t2MVNr = 2673, t2MVNs = 2674, t2ORNri = 2675, t2ORNrr = 2676, t2ORNrs = 2677, t2ORRri = 2678, t2ORRrr = 2679, t2ORRrs = 2680, t2PKHBT = 2681, t2PKHTB = 2682, t2PLDWi12 = 2683, t2PLDWi8 = 2684, t2PLDWs = 2685, t2PLDi12 = 2686, t2PLDi8 = 2687, t2PLDpci = 2688, t2PLDs = 2689, t2PLIi12 = 2690, t2PLIi8 = 2691, t2PLIpci = 2692, t2PLIs = 2693, t2QADD = 2694, t2QADD16 = 2695, t2QADD8 = 2696, t2QASX = 2697, t2QDADD = 2698, t2QDSUB = 2699, t2QSAX = 2700, t2QSUB = 2701, t2QSUB16 = 2702, t2QSUB8 = 2703, t2RBIT = 2704, t2REV = 2705, t2REV16 = 2706, t2REVSH = 2707, t2RFEDB = 2708, t2RFEDBW = 2709, t2RFEIA = 2710, t2RFEIAW = 2711, t2RORri = 2712, t2RORrr = 2713, t2RRX = 2714, t2RSBSri = 2715, t2RSBSrs = 2716, t2RSBri = 2717, t2RSBrr = 2718, t2RSBrs = 2719, t2SADD16 = 2720, t2SADD8 = 2721, t2SASX = 2722, t2SBCri = 2723, t2SBCrr = 2724, t2SBCrs = 2725, t2SBFX = 2726, t2SDIV = 2727, t2SEL = 2728, t2SETPAN = 2729, t2SG = 2730, t2SHADD16 = 2731, t2SHADD8 = 2732, t2SHASX = 2733, t2SHSAX = 2734, t2SHSUB16 = 2735, t2SHSUB8 = 2736, t2SMC = 2737, t2SMLABB = 2738, t2SMLABT = 2739, t2SMLAD = 2740, t2SMLADX = 2741, t2SMLAL = 2742, t2SMLALBB = 2743, t2SMLALBT = 2744, t2SMLALD = 2745, t2SMLALDX = 2746, t2SMLALTB = 2747, t2SMLALTT = 2748, t2SMLATB = 2749, t2SMLATT = 2750, t2SMLAWB = 2751, t2SMLAWT = 2752, t2SMLSD = 2753, t2SMLSDX = 2754, t2SMLSLD = 2755, t2SMLSLDX = 2756, t2SMMLA = 2757, t2SMMLAR = 2758, t2SMMLS = 2759, t2SMMLSR = 2760, t2SMMUL = 2761, t2SMMULR = 2762, t2SMUAD = 2763, t2SMUADX = 2764, t2SMULBB = 2765, t2SMULBT = 2766, t2SMULL = 2767, t2SMULTB = 2768, t2SMULTT = 2769, t2SMULWB = 2770, t2SMULWT = 2771, t2SMUSD = 2772, t2SMUSDX = 2773, t2SRSDB = 2774, t2SRSDB_UPD = 2775, t2SRSIA = 2776, t2SRSIA_UPD = 2777, t2SSAT = 2778, t2SSAT16 = 2779, t2SSAX = 2780, t2SSUB16 = 2781, t2SSUB8 = 2782, t2STC2L_OFFSET = 2783, t2STC2L_OPTION = 2784, t2STC2L_POST = 2785, t2STC2L_PRE = 2786, t2STC2_OFFSET = 2787, t2STC2_OPTION = 2788, t2STC2_POST = 2789, t2STC2_PRE = 2790, t2STCL_OFFSET = 2791, t2STCL_OPTION = 2792, t2STCL_POST = 2793, t2STCL_PRE = 2794, t2STC_OFFSET = 2795, t2STC_OPTION = 2796, t2STC_POST = 2797, t2STC_PRE = 2798, t2STL = 2799, t2STLB = 2800, t2STLEX = 2801, t2STLEXB = 2802, t2STLEXD = 2803, t2STLEXH = 2804, t2STLH = 2805, t2STMDB = 2806, t2STMDB_UPD = 2807, t2STMIA = 2808, t2STMIA_UPD = 2809, t2STRBT = 2810, t2STRB_POST = 2811, t2STRB_PRE = 2812, t2STRB_preidx = 2813, t2STRBi12 = 2814, t2STRBi8 = 2815, t2STRBs = 2816, t2STRD_POST = 2817, t2STRD_PRE = 2818, t2STRDi8 = 2819, t2STREX = 2820, t2STREXB = 2821, t2STREXD = 2822, t2STREXH = 2823, t2STRHT = 2824, t2STRH_POST = 2825, t2STRH_PRE = 2826, t2STRH_preidx = 2827, t2STRHi12 = 2828, t2STRHi8 = 2829, t2STRHs = 2830, t2STRT = 2831, t2STR_POST = 2832, t2STR_PRE = 2833, t2STR_preidx = 2834, t2STRi12 = 2835, t2STRi8 = 2836, t2STRs = 2837, t2SUBS_PC_LR = 2838, t2SUBSri = 2839, t2SUBSrr = 2840, t2SUBSrs = 2841, t2SUBri = 2842, t2SUBri12 = 2843, t2SUBrr = 2844, t2SUBrs = 2845, t2SXTAB = 2846, t2SXTAB16 = 2847, t2SXTAH = 2848, t2SXTB = 2849, t2SXTB16 = 2850, t2SXTH = 2851, t2TBB = 2852, t2TBB_JT = 2853, t2TBH = 2854, t2TBH_JT = 2855, t2TEQri = 2856, t2TEQrr = 2857, t2TEQrs = 2858, t2TSTri = 2859, t2TSTrr = 2860, t2TSTrs = 2861, t2TT = 2862, t2TTA = 2863, t2TTAT = 2864, t2TTT = 2865, t2UADD16 = 2866, t2UADD8 = 2867, t2UASX = 2868, t2UBFX = 2869, t2UDF = 2870, t2UDIV = 2871, t2UHADD16 = 2872, t2UHADD8 = 2873, t2UHASX = 2874, t2UHSAX = 2875, t2UHSUB16 = 2876, t2UHSUB8 = 2877, t2UMAAL = 2878, t2UMLAL = 2879, t2UMULL = 2880, t2UQADD16 = 2881, t2UQADD8 = 2882, t2UQASX = 2883, t2UQSAX = 2884, t2UQSUB16 = 2885, t2UQSUB8 = 2886, t2USAD8 = 2887, t2USADA8 = 2888, t2USAT = 2889, t2USAT16 = 2890, t2USAX = 2891, t2USUB16 = 2892, t2USUB8 = 2893, t2UXTAB = 2894, t2UXTAB16 = 2895, t2UXTAH = 2896, t2UXTB = 2897, t2UXTB16 = 2898, t2UXTH = 2899, tADC = 2900, tADDframe = 2901, tADDhirr = 2902, tADDi3 = 2903, tADDi8 = 2904, tADDrSP = 2905, tADDrSPi = 2906, tADDrr = 2907, tADDspi = 2908, tADDspr = 2909, tADJCALLSTACKDOWN = 2910, tADJCALLSTACKUP = 2911, tADR = 2912, tAND = 2913, tASRri = 2914, tASRrr = 2915, tB = 2916, tBIC = 2917, tBKPT = 2918, tBL = 2919, tBLXNSr = 2920, tBLXi = 2921, tBLXr = 2922, tBRIND = 2923, tBR_JTr = 2924, tBX = 2925, tBXNS = 2926, tBX_CALL = 2927, tBX_RET = 2928, tBX_RET_vararg = 2929, tBcc = 2930, tBfar = 2931, tCBNZ = 2932, tCBZ = 2933, tCMNz = 2934, tCMPhir = 2935, tCMPi8 = 2936, tCMPr = 2937, tCPS = 2938, tEOR = 2939, tHINT = 2940, tHLT = 2941, tInt_eh_sjlj_longjmp = 2942, tInt_eh_sjlj_setjmp = 2943, tLDMIA = 2944, tLDMIA_UPD = 2945, tLDRBi = 2946, tLDRBr = 2947, tLDRHi = 2948, tLDRHr = 2949, tLDRLIT_ga_abs = 2950, tLDRLIT_ga_pcrel = 2951, tLDRSB = 2952, tLDRSH = 2953, tLDRi = 2954, tLDRpci = 2955, tLDRpci_pic = 2956, tLDRr = 2957, tLDRspi = 2958, tLEApcrel = 2959, tLEApcrelJT = 2960, tLSLri = 2961, tLSLrr = 2962, tLSRri = 2963, tLSRrr = 2964, tMOVCCr_pseudo = 2965, tMOVSr = 2966, tMOVi8 = 2967, tMOVr = 2968, tMUL = 2969, tMVN = 2970, tORR = 2971, tPICADD = 2972, tPOP = 2973, tPOP_RET = 2974, tPUSH = 2975, tREV = 2976, tREV16 = 2977, tREVSH = 2978, tROR = 2979, tRSB = 2980, tSBC = 2981, tSETEND = 2982, tSTMIA_UPD = 2983, tSTRBi = 2984, tSTRBr = 2985, tSTRHi = 2986, tSTRHr = 2987, tSTRi = 2988, tSTRr = 2989, tSTRspi = 2990, tSUBi3 = 2991, tSUBi8 = 2992, tSUBrr = 2993, tSUBspi = 2994, tSVC = 2995, tSXTB = 2996, tSXTH = 2997, tTAILJMPd = 2998, tTAILJMPdND = 2999, tTAILJMPr = 3000, tTPsoft = 3001, tTRAP = 3002, tTST = 3003, tUDF = 3004, tUXTB = 3005, tUXTH = 3006, INSTRUCTION_LIST_END = 3007 }; namespace Sched { enum { NoInstrModel = 0, IIC_iALUi_WriteALU_ReadALU = 1, IIC_iALUr_WriteALU_ReadALU_ReadALU = 2, IIC_iALUsr_WriteALUsi_ReadALU = 3, IIC_iALUsr_WriteALUsr_ReadALUsr = 4, IIC_iALUsr_WriteALUSsr_ReadALUsr = 5, IIC_iBITi_WriteALU_ReadALU = 6, IIC_iBITr_WriteALU_ReadALU_ReadALU = 7, IIC_iBITsr_WriteALUsi_ReadALU = 8, IIC_iBITsr_WriteALUsr_ReadALUsr = 9, IIC_Br_WriteBr = 10, IIC_iUNAsi = 11, IIC_Br_WriteBrL = 12, WriteBrL = 13, IIC_Br_WriteBrTbl = 14, WriteBr = 15, IIC_iUNAr_WriteALU = 16, IIC_iCMPi_WriteCMP_ReadALU = 17, IIC_iCMPr_WriteCMP_ReadALU_ReadALU = 18, IIC_iCMPsr_WriteCMPsi_ReadALU = 19, IIC_iCMPsr_WriteCMPsr_ReadALU = 20, IIC_fpUNA64 = 21, IIC_fpUNA16 = 22, IIC_fpUNA32 = 23, IIC_fpSTAT = 24, IIC_iLoad_m = 25, IIC_iLoad_mu = 26, IIC_iLoad_mBr = 27, IIC_iLoad_bh_ru = 28, IIC_iLoad_bh_iu = 29, IIC_iLoad_bh_r = 30, IIC_iLoad_bh_si = 31, IIC_iLoad_d_r = 32, IIC_iLoad_d_ru = 33, IIC_iLoad_i = 34, IIC_iLoadiALU = 35, IIC_iLoad_ru = 36, IIC_iLoad_iu = 37, IIC_iLoad_r = 38, IIC_iLoad_si = 39, IIC_iMAC32 = 40, IIC_iCMOVi_WriteALU = 41, IIC_iMOVi_WriteALU = 42, IIC_iCMOVix2 = 43, IIC_iCMOVr_WriteALU = 44, IIC_iCMOVsr_WriteALU = 45, IIC_iMOVix2addpc = 46, IIC_iMOVix2ld = 47, IIC_iMOVix2 = 48, IIC_iMOVr_WriteALU = 49, IIC_iMOVsr_WriteALU = 50, IIC_iMOVsi_WriteALU = 51, IIC_iMUL32 = 52, IIC_iMVNi_WriteALU = 53, IIC_iMVNr_WriteALU = 54, IIC_iMVNsr_WriteALU = 55, IIC_iALUr_WriteALU_ReadALU = 56, IIC_iStore_r = 57, IIC_iStore_bh_r = 58, IIC_iALUsi_WriteALUsi_ReadALU = 59, IIC_iBITsi_WriteALUsi_ReadALU = 60, IIC_Preload_WritePreLd = 61, IIC_iDIV = 62, IIC_iMAC16 = 63, IIC_iMAC64 = 64, IIC_iMUL16 = 65, IIC_iMUL64 = 66, IIC_iStore_m = 67, IIC_iStore_mu = 68, IIC_iStore_bh_ru = 69, IIC_iStore_bh_iu = 70, IIC_iStore_ru = 71, IIC_iStore_bh_si = 72, IIC_iStore_d_r = 73, IIC_iStore_d_ru = 74, IIC_iStore_iu = 75, IIC_iStore_si = 76, IIC_Br = 77, IIC_iEXTAr_WriteALUsr = 78, IIC_iEXTr_WriteALUsi = 79, IIC_iTSTi_WriteCMP_ReadALU = 80, IIC_iTSTr_WriteCMP_ReadALU_ReadALU = 81, IIC_iTSTsr_WriteCMPsi_ReadALU = 82, IIC_iTSTsr_WriteCMPsr_ReadALU = 83, WriteALU_ReadALU_ReadALU = 84, IIC_VABAD = 85, IIC_VABAQ = 86, IIC_VSUBi4Q = 87, IIC_VBIND = 88, IIC_VBINQ = 89, IIC_VSUBi4D = 90, IIC_VUNAD = 91, IIC_VUNAQ = 92, IIC_VUNAiQ = 93, IIC_VUNAiD = 94, IIC_fpALU64 = 95, IIC_fpALU16 = 96, IIC_VBINi4D = 97, IIC_VSHLiD = 98, IIC_fpALU32 = 99, IIC_VSUBiD = 100, IIC_VBINiQ = 101, IIC_VBINiD = 102, IIC_VMOVImm = 103, IIC_VCNTiD = 104, IIC_VCNTiQ = 105, IIC_fpCMP64 = 106, IIC_fpCMP16 = 107, IIC_fpCMP32 = 108, IIC_fpCVTSH = 109, IIC_fpCVTHS = 110, IIC_fpCVTDS = 111, IIC_fpCVTSD = 112, IIC_fpDIV64 = 113, IIC_fpDIV16 = 114, IIC_fpDIV32 = 115, IIC_VMOVIS = 116, IIC_VMOVD = 117, IIC_VMOVQ = 118, IIC_VEXTD = 119, IIC_VEXTQ = 120, IIC_fpFMAC64 = 121, IIC_fpFMAC16 = 122, IIC_fpFMAC32 = 123, IIC_VFMACD = 124, IIC_VFMACQ = 125, IIC_VMOVSI = 126, IIC_VBINi4Q = 127, IIC_VLD1dup = 128, IIC_VLD1dupu = 129, IIC_VLD1ln = 130, IIC_VLD1lnu = 131, IIC_VLD1 = 132, IIC_VLD1x4 = 133, IIC_VLD1x2u = 134, IIC_VLD1x3 = 135, IIC_VLD1u = 136, IIC_VLD1x2 = 137, IIC_VLD2dup = 138, IIC_VLD2dupu = 139, IIC_VLD2ln = 140, IIC_VLD2lnu = 141, IIC_VLD2 = 142, IIC_VLD2u = 143, IIC_VLD2x2 = 144, IIC_VLD2x2u = 145, IIC_VLD3dup = 146, IIC_VLD3dupu = 147, IIC_VLD3ln = 148, IIC_VLD3lnu = 149, IIC_VLD3 = 150, IIC_VLD3u = 151, IIC_VLD4dup = 152, IIC_VLD4dupu = 153, IIC_VLD4ln = 154, IIC_VLD4lnu = 155, IIC_VLD4 = 156, IIC_VLD4u = 157, IIC_fpLoad_mu = 158, IIC_fpLoad_m = 159, IIC_fpLoad64 = 160, IIC_fpLoad16 = 161, IIC_fpLoad32 = 162, IIC_fpStore_m = 163, IIC_fpMAC64 = 164, IIC_fpMAC16 = 165, IIC_VMACi32D = 166, IIC_VMACi16D = 167, IIC_fpMAC32 = 168, IIC_VMACD = 169, IIC_VMACQ = 170, IIC_VMACi32Q = 171, IIC_VMACi16Q = 172, IIC_fpMOVID = 173, IIC_fpMOVIS = 174, IIC_VQUNAiD = 175, IIC_VMOVN = 176, IIC_fpMOVSI = 177, IIC_fpMOVDI = 178, IIC_fpMUL64 = 179, IIC_fpMUL16 = 180, IIC_VMULi16D = 181, IIC_VMULi32D = 182, IIC_fpMUL32 = 183, IIC_VFMULD = 184, IIC_VFMULQ = 185, IIC_VMULi16Q = 186, IIC_VMULi32Q = 187, IIC_VSHLiQ = 188, IIC_VPALiQ = 189, IIC_VPALiD = 190, IIC_VPBIND = 191, IIC_VQUNAiQ = 192, IIC_VSHLi4Q = 193, IIC_VSHLi4D = 194, IIC_VRECSD = 195, IIC_VRECSQ = 196, IIC_VMOVISL = 197, IIC_fpCVTID_WriteCvtFP = 198, IIC_fpCVTIH_WriteCvtFP = 199, IIC_fpCVTIS_WriteCvtFP = 200, IIC_fpCVTID = 201, IIC_fpCVTIH = 202, IIC_fpCVTIS = 203, IIC_fpSQRT64 = 204, IIC_fpSQRT16 = 205, IIC_fpSQRT32 = 206, IIC_VST1ln = 207, IIC_VST1lnu = 208, IIC_VST1 = 209, IIC_VST1x4 = 210, IIC_VLD1x4u = 211, IIC_VST1x3 = 212, IIC_VLD1x3u = 213, IIC_VST1x4u = 214, IIC_VST1x3u = 215, IIC_VST1x2 = 216, IIC_VST2ln = 217, IIC_VST2lnu = 218, IIC_VST2 = 219, IIC_VST2x2 = 220, IIC_VST2x2u = 221, IIC_VST3ln = 222, IIC_VST3lnu = 223, IIC_VST3 = 224, IIC_VST3u = 225, IIC_VST4ln = 226, IIC_VST4lnu = 227, IIC_VST4 = 228, IIC_VST4u = 229, IIC_fpStore_mu = 230, IIC_fpStore64 = 231, IIC_fpStore16 = 232, IIC_fpStore32 = 233, IIC_VSUBiQ = 234, IIC_VTB1 = 235, IIC_VTB2 = 236, IIC_VTB3 = 237, IIC_VTB4 = 238, IIC_VTBX1 = 239, IIC_VTBX2 = 240, IIC_VTBX3 = 241, IIC_VTBX4 = 242, IIC_fpCVTDI_WriteCvtFP = 243, IIC_fpCVTHI_WriteCvtFP = 244, IIC_fpCVTSI_WriteCvtFP = 245, IIC_fpCVTDI = 246, IIC_fpCVTHI = 247, IIC_fpCVTSI = 248, IIC_VPERMD = 249, IIC_VPERMQ = 250, IIC_VPERMQ3 = 251, IIC_iALUsi_WriteALUsi_ReadALUsr = 252, IIC_iBITi = 253, IIC_iCMPsi_WriteCMPsi_ReadALU_ReadALU = 254, IIC_iCMPi_WriteCMP = 255, IIC_iCMPr_WriteCMP = 256, IIC_iCMPsi_WriteCMPsi = 257, IIC_iALUx = 258, IIC_iLoad_bh_i = 259, IIC_iLoad_d_i = 260, IIC_iCMOVsi_WriteALU = 261, IIC_iMOVi = 262, IIC_iMVNsi_WriteALU = 263, IIC_iALUsir_WriteALUsi_ReadALU = 264, IIC_iStore_bh_i = 265, IIC_iStore_i = 266, IIC_iEXTAsr = 267, IIC_iEXTr = 268, IIC_iTSTi_WriteCMP = 269, IIC_iTSTr_WriteCMP = 270, IIC_iTSTsi_WriteCMPsi = 271, IIC_iALUr_WriteALU = 272, IIC_iALUi_WriteALU = 273, IIC_iBITr_WriteALU = 274, IIC_iPop = 275, IIC_iPop_Br_WriteBrL = 276, IIC_iTSTr_WriteALU = 277, ANDri_BICri_EORri_ORRri = 278, ANDrr_BICrr_EORrr_ORRrr = 279, ANDrsi_BICrsi_EORrsi_ORRrsi = 280, ANDrsr_BICrsr_EORrsr_ORRrsr = 281, MOVCCsi_MOVCCsr = 282, MOVsi_MOVsr = 283, MOVsra_flag_MOVsrl_flag = 284, MVNsr = 285, MVNr = 286, MOVCCi32imm = 287, MOVi32imm = 288, MOV_ga_pcrel = 289, MOV_ga_pcrel_ldr = 290, SEL = 291, BFC_BFI_SBFX_UBFX = 292, MLA_MLAv5_MLS_SMMLA_SMMLAR_SMMLS_SMMLSR = 293, MUL_MULv5_SMMUL_SMMULR = 294, SMLAL_SMLALBB_SMLALBT_SMLALTB_SMLALTT_SMLALv5_UMAAL_UMLAL_UMLALv5 = 295, SMULL_SMULLv5_UMULL_UMULLv5 = 296, SMLAD_SMLADX_SMLALD_SMLALDX_SMLSD_SMLSDX_SMLSLD_SMLSLDX_SMUAD_SMUADX_SMUSD_SMUSDX = 297, SMULBB_SMULBT_SMULTB_SMULTT_SMULWB_SMULWT = 298, SMLABB_SMLABT_SMLATB_SMLATT_SMLAWB_SMLAWT = 299, LDRi12_PICLDR = 300, LDRrs = 301, LDRBi12_LDRH_LDRSB_LDRSH_PICLDRB_PICLDRH_PICLDRSB_PICLDRSH = 302, LDRHTi_LDRHTr_LDRH_POST_LDRH_PRE_LDRSBTi_LDRSBTr_LDRSB_POST_LDRSB_PRE_LDRSHTi_LDRSHTr_LDRSH_POST_LDRSH_PRE = 303, SXTB_SXTB16_SXTH_UXTB_UXTB16_UXTH = 304, t2SXTB_t2SXTB16_t2SXTH_t2UXTB_t2UXTB16_t2UXTH = 305, t2MOVCCi32imm = 306, t2MOVi32imm = 307, t2MOV_ga_pcrel = 308, t2MOVi16_ga_pcrel = 309, t2SEL = 310, t2BFC_t2SBFX_t2UBFX = 311, t2BFI = 312, QADD_QADD16_QADD8_QASX_QDADD_QDSUB_QSAX_QSUB_QSUB16_QSUB8_UQADD16_UQADD8_UQASX_UQSAX_UQSUB16_UQSUB8 = 313, SSAT_SSAT16_USAT_USAT16_t2QADD_t2QADD16_t2QADD8_t2QASX_t2QDADD_t2QDSUB_t2QSAX_t2QSUB_t2QSUB16_t2QSUB8_t2SSAT_t2SSAT16_t2UQADD16_t2UQADD8_t2UQASX_t2UQSAX_t2UQSUB16_t2UQSUB8_t2USAT_t2USAT16 = 314, SADD16_SADD8_SASX_SSAX_SSUB16_SSUB8_UADD16_UADD8_UASX_USAX_USUB16_USUB8 = 315, t2SADD16_t2SADD8_t2SASX_t2SSAX_t2SSUB16_t2SSUB8_t2UADD16_t2UADD8_t2UASX_t2USAX_t2USUB16_t2USUB8 = 316, SHADD16_SHADD8_SHASX_SHSAX_SHSUB16_SHSUB8_UHADD16_UHADD8_UHASX_UHSAX_UHSUB16_UHSUB8 = 317, SXTAB_SXTAB16_SXTAH_UXTAB_UXTAB16_UXTAH = 318, t2SHADD16_t2SHADD8_t2SHASX_t2SHSAX_t2SHSUB16_t2SHSUB8_t2UHADD16_t2UHADD8_t2UHASX_t2UHSAX_t2UHSUB16_t2UHSUB8 = 319, t2SXTAB_t2SXTAB16_t2SXTAH_t2UXTAB_t2UXTAB16_t2UXTAH = 320, USAD8 = 321, USADA8 = 322, SMUSD_SMUSDX = 323, t2MUL_t2SMMUL_t2SMMULR = 324, t2SMULBB_t2SMULBT_t2SMULTB_t2SMULTT_t2SMULWB_t2SMULWT = 325, t2SMUSD_t2SMUSDX = 326, t2MLA_t2MLS_t2SMMLA_t2SMMLAR_t2SMMLS_t2SMMLSR = 327, SMUAD_SMUADX = 328, t2SMUAD_t2SMUADX = 329, SMLSD_SMLSDX = 330, t2SMLABB_t2SMLABT_t2SMLATB_t2SMLATT_t2SMLAWB_t2SMLAWT = 331, t2SMLSD_t2SMLSDX = 332, SMLAD_SMLADX = 333, t2SMLAD_t2SMLADX = 334, SMULL_UMULL = 335, t2SMULL_t2UMULL = 336, t2SMLAL_t2SMLALBB_t2SMLALBT_t2SMLALD_t2SMLALDX_t2SMLALTB_t2SMLALTT_t2SMLSLD_t2SMLSLDX_t2UMAAL_t2UMLAL = 337, SDIV_UDIV_t2SDIV_t2UDIV = 338, LDRBi12 = 339, LDRBrs_t2LDRBs_t2LDRHs = 340, LDREX_LDREXB_LDREXD_LDREXH_tLDRpci_pic = 341, LDRi12 = 342, t2LDRBi12_t2LDRBi8_t2LDRBpci_t2LDRHi12_t2LDRHi8_t2LDRHpci_tLDRBi_tLDRHi = 343, t2LDRi12_t2LDRi8_t2LDRpci_tLDRi_tLDRpci_tLDRspi = 344, t2LDRpci_pic = 345, t2LDRs = 346, tLDRBr_tLDRHr = 347, tLDRr = 348, LDRH_PICLDRB_PICLDRH = 349, LDRcp = 350, t2LDRSBi12_t2LDRSBi8_t2LDRSBpci_t2LDRSHi12_t2LDRSHi8_t2LDRSHpci = 351, t2LDRSBpcrel_t2LDRSHpcrel = 352, t2LDRSBs_t2LDRSHs = 353, tLDRSB_tLDRSH = 354, LDRBT_POST_IMM_LDRBT_POST_REG_LDRB_POST_REG_LDRB_PRE_REG = 355, LDRB_POST_IMM_LDRB_PRE_IMM_t2LDRB_POST_t2LDRB_PRE_t2LDRH_POST_t2LDRH_PRE = 356, LDRHTi_LDRHTr_LDRH_POST_LDRH_PRE = 357, LDRT_POST_IMM_LDRT_POST_REG_LDR_POST_REG_LDR_PRE_REG = 358, LDR_POST_IMM_LDR_PRE_IMM_t2LDR_POST_t2LDR_PRE = 359, t2LDRBT_t2LDRHT = 360, t2LDRT = 361, t2LDRSBT_t2LDRSHT = 362, t2LDRSB_POST_t2LDRSB_PRE_t2LDRSH_POST_t2LDRSH_PRE = 363, LDRD = 364, t2LDRDi8 = 365, LDRD_POST_LDRD_PRE_t2LDRD_POST_t2LDRD_PRE = 366, LDMDA_LDMDB_LDMIA_LDMIB_sysLDMDA_sysLDMDB_sysLDMIA_sysLDMIB_t2LDMDB_t2LDMIA_tLDMIA = 367, LDMDA_UPD_LDMDB_UPD_LDMIA_UPD_LDMIB_UPD_sysLDMDA_UPD_sysLDMDB_UPD_sysLDMIA_UPD_sysLDMIB_UPD_t2LDMDB_UPD_t2LDMIA_UPD_tLDMIA_UPD = 368, LDMIA_RET_t2LDMIA_RET = 369, tPOP = 370, tPOP_RET = 371, PICSTR_STRi12_tSTRr = 372, PICSTRB_PICSTRH_STRBi12_STRH_tSTRBr_tSTRHr = 373, STRBrs_t2STRBs_t2STRHs = 374, STREX_STREXB_STREXD_STREXH = 375, STRrs_t2STRs = 376, t2STRBi12_t2STRBi8_t2STRHi12_t2STRHi8_tSTRBi_tSTRHi = 377, t2STRi12_t2STRi8_tSTRi_tSTRspi = 378, STRBT_POST_STRT_POST = 379, STRBT_POST_IMM_STRBT_POST_REG_STRB_POST_REG_STRB_PRE_REG_STRHTi_STRHTr_STRH_POST_STRH_PRE = 380, STRB_POST_IMM_STRB_PRE_IMM_t2STRB_POST_t2STRB_PRE_t2STRH_POST = 381, STRBi_preidx_STRBr_preidx_STRH_preidx_STRT_POST_IMM_STRT_POST_REG_STR_POST_REG_STR_PRE_REG_STRi_preidx_STRr_preidx_t2STRB_preidx_t2STRH_preidx_t2STR_preidx = 382, STR_POST_IMM_STR_PRE_IMM_t2STRH_PRE_t2STR_POST_t2STR_PRE = 383, t2STRBT_t2STRHT = 384, t2STRT = 385, STRD_t2STRDi8 = 386, STRD_POST_STRD_PRE_t2STRD_POST_t2STRD_PRE = 387, STMDA_STMDB_STMIA_STMIB_sysSTMDA_sysSTMDB_sysSTMIA_sysSTMIB_t2STMDB_t2STMIA = 388, STMDA_UPD_STMDB_UPD_STMIA_UPD_STMIB_UPD_sysSTMDA_UPD_sysSTMDB_UPD_sysSTMIA_UPD_sysSTMIB_UPD_t2STMDB_UPD_t2STMIA_UPD_tSTMIA_UPD = 389, tPUSH = 390, LDRLIT_ga_abs_tLDRLIT_ga_abs = 391, LDRLIT_ga_pcrel_tLDRLIT_ga_pcrel = 392, LDRLIT_ga_pcrel_ldr = 393, ITasm = 394, t2IT = 395, VADDLsv2i64_VADDLsv4i32_VADDLsv8i16_VADDLuv2i64_VADDLuv4i32_VADDLuv8i16_VNEGs16d_VNEGs32d_VNEGs8d_VPADDLsv16i8_VPADDLsv2i32_VPADDLsv4i16_VPADDLsv4i32_VPADDLsv8i16_VPADDLsv8i8_VPADDLuv16i8_VPADDLuv2i32_VPADDLuv4i16_VPADDLuv4i32_VPADDLuv8i16_VPADDLuv8i8_VPADDi16_VPADDi32_VPADDi8_VSHLLi16_VSHLLi32_VSHLLi8_VSHLLsv2i64_VSHLLsv4i32_VSHLLsv8i16_VSHLLuv2i64_VSHLLuv4i32_VSHLLuv8i16_VSHLiv16i8_VSHLiv1i64_VSHLiv2i32_VSHLiv2i64_VSHLiv4i16_VSHLiv4i32_VSHLiv8i16_VSHLiv8i8_VSHLsv1i64_VSHLsv2i32_VSHLsv4i16_VSHLsv8i8_VSHLuv1i64_VSHLuv2i32_VSHLuv4i16_VSHLuv8i8_VSHRsv16i8_VSHRsv1i64_VSHRsv2i32_VSHRsv2i64_VSHRsv4i16_VSHRsv4i32_VSHRsv8i16_VSHRsv8i8_VSHRuv16i8_VSHRuv1i64_VSHRuv2i32_VSHRuv2i64_VSHRuv4i16_VSHRuv4i32_VSHRuv8i16_VSHRuv8i8_VSLIv1i64_VSLIv2i32_VSLIv4i16_VSLIv8i8_VSRIv1i64_VSRIv2i32_VSRIv4i16_VSRIv8i8_VSUBLsv2i64_VSUBLsv4i32_VSUBLsv8i16_VSUBLuv2i64_VSUBLuv4i32_VSUBLuv8i16 = 396, VADDWsv2i64_VADDWsv4i32_VADDWsv8i16_VADDWuv2i64_VADDWuv4i32_VADDWuv8i16_VSUBWsv2i64_VSUBWsv4i32_VSUBWsv8i16_VSUBWuv2i64_VSUBWuv4i32_VSUBWuv8i16_VSUBv1i64_VSUBv2i32_VSUBv4i16_VSUBv8i8 = 397, VADDv16i8_VADDv2i64_VADDv4i32_VADDv8i16_VANDq_VBICq_VBIFq_VBITq_VEORq_VORNq_VORRq = 398, VADDv1i64_VADDv2i32_VADDv4i16_VADDv8i8_VANDd_VBICd_VBIFd_VBITd_VEORd_VORNd_VORRd = 399, VBICiv2i32_VBICiv4i16_VBICiv4i32_VBICiv8i16_VORRiv2i32_VORRiv4i16_VORRiv4i32_VORRiv8i16 = 400, VBSLd_VCLSv2i32_VCLSv4i16_VCLSv8i8_VCLZv2i32_VCLZv4i16_VCLZv8i8_VCNTd = 401, VBSLq_VCLSv16i8_VCLSv4i32_VCLSv8i16_VCLZv16i8_VCLZv4i32_VCLZv8i16_VCNTq = 402, VHADDsv16i8_VHADDsv4i32_VHADDsv8i16_VHADDuv16i8_VHADDuv4i32_VHADDuv8i16_VRHADDsv16i8_VRHADDsv4i32_VRHADDsv8i16_VRHADDuv16i8_VRHADDuv4i32_VRHADDuv8i16_VTSTv16i8_VTSTv4i32_VTSTv8i16 = 403, VHADDsv2i32_VHADDsv4i16_VHADDsv8i8_VHADDuv2i32_VHADDuv4i16_VHADDuv8i8_VRHADDsv2i32_VRHADDsv4i16_VRHADDsv8i8_VRHADDuv2i32_VRHADDuv4i16_VRHADDuv8i8_VTSTv2i32_VTSTv4i16_VTSTv8i8 = 404, VHSUBsv16i8_VHSUBsv4i32_VHSUBsv8i16_VHSUBuv16i8_VHSUBuv4i32_VHSUBuv8i16 = 405, VHSUBsv2i32_VHSUBsv4i16_VHSUBsv8i8_VHSUBuv2i32_VHSUBuv4i16_VHSUBuv8i8 = 406, VNEGf32q = 407, VNEGfd = 408, VNEGs16q_VNEGs32q_VNEGs8q_VSHLsv16i8_VSHLsv2i64_VSHLsv4i32_VSHLsv8i16_VSHLuv16i8_VSHLuv2i64_VSHLuv4i32_VSHLuv8i16_VSLIv16i8_VSLIv2i64_VSLIv4i32_VSLIv8i16_VSRIv16i8_VSRIv2i64_VSRIv4i32_VSRIv8i16 = 409, VQSHLsiv16i8_VQSHLsiv1i64_VQSHLsiv2i32_VQSHLsiv2i64_VQSHLsiv4i16_VQSHLsiv4i32_VQSHLsiv8i16_VQSHLsiv8i8_VQSHLsuv16i8_VQSHLsuv1i64_VQSHLsuv2i32_VQSHLsuv2i64_VQSHLsuv4i16_VQSHLsuv4i32_VQSHLsuv8i16_VQSHLsuv8i8_VQSHLsv1i64_VQSHLsv2i32_VQSHLsv4i16_VQSHLsv8i8_VQSHLuiv16i8_VQSHLuiv1i64_VQSHLuiv2i32_VQSHLuiv2i64_VQSHLuiv4i16_VQSHLuiv4i32_VQSHLuiv8i16_VQSHLuiv8i8_VQSHLuv1i64_VQSHLuv2i32_VQSHLuv4i16_VQSHLuv8i8 = 410, VQSHLsv16i8_VQSHLsv2i64_VQSHLsv4i32_VQSHLsv8i16_VQSHLuv16i8_VQSHLuv2i64_VQSHLuv4i32_VQSHLuv8i16 = 411, VSUBv16i8_VSUBv2i64_VSUBv4i32_VSUBv8i16 = 412, VEXTd16_VEXTd32_VEXTd8 = 413, VEXTq16_VEXTq32_VEXTq64_VEXTq8 = 414, VREV16d8_VREV32d16_VREV32d8_VREV64d16_VREV64d32_VREV64d8 = 415, VREV16q8_VREV32q16_VREV32q8_VREV64q16_VREV64q32_VREV64q8 = 416, VABALsv2i64_VABALsv4i32_VABALsv8i16_VABALuv2i64_VABALuv4i32_VABALuv8i16_VABAsv2i32_VABAsv4i16_VABAsv8i8_VABAuv2i32_VABAuv4i16_VABAuv8i8 = 417, VABAsv16i8_VABAsv4i32_VABAsv8i16_VABAuv16i8_VABAuv4i32_VABAuv8i16 = 418, VABSfd = 419, VABSfq = 420, VABSv16i8_VABSv4i32_VABSv8i16 = 421, VABSv2i32_VABSv4i16_VABSv8i8 = 422, VACGEfd_VACGEhd_VACGTfd_VACGThd_VCEQfd_VCEQhd_VCGEfd_VCGEhd_VCGTfd_VCGThd = 423, VACGEfq_VACGEhq_VACGTfq_VACGThq_VCEQfq_VCEQhq_VCGEfq_VCGEhq_VCGTfq_VCGThq = 424, VCEQv16i8_VCEQv4i32_VCEQv8i16_VCGEsv16i8_VCGEsv4i32_VCGEsv8i16_VCGEuv16i8_VCGEuv4i32_VCGEuv8i16_VCGTsv16i8_VCGTsv4i32_VCGTsv8i16_VCGTuv16i8_VCGTuv4i32_VCGTuv8i16_VQSUBsv16i8_VQSUBsv2i64_VQSUBsv4i32_VQSUBsv8i16_VQSUBuv16i8_VQSUBuv2i64_VQSUBuv4i32_VQSUBuv8i16 = 425, VCEQv2i32_VCEQv4i16_VCEQv8i8_VCGEsv2i32_VCGEsv4i16_VCGEsv8i8_VCGEuv2i32_VCGEuv4i16_VCGEuv8i8_VCGTsv2i32_VCGTsv4i16_VCGTsv8i8_VCGTuv2i32_VCGTuv4i16_VCGTuv8i8_VQSUBsv1i64_VQSUBsv2i32_VQSUBsv4i16_VQSUBsv8i8_VQSUBuv1i64_VQSUBuv2i32_VQSUBuv4i16_VQSUBuv8i8 = 426, VCEQzv16i8_VCEQzv2f32_VCEQzv2i32_VCEQzv4f16_VCEQzv4f32_VCEQzv4i16_VCEQzv4i32_VCEQzv8f16_VCEQzv8i16_VCEQzv8i8_VCGEzv16i8_VCGEzv2f32_VCGEzv2i32_VCGEzv4f16_VCGEzv4f32_VCGEzv4i16_VCGEzv4i32_VCGEzv8f16_VCGEzv8i16_VCGEzv8i8_VCGTzv16i8_VCGTzv2f32_VCGTzv2i32_VCGTzv4f16_VCGTzv4f32_VCGTzv4i16_VCGTzv4i32_VCGTzv8f16_VCGTzv8i16_VCGTzv8i8_VCLEzv16i8_VCLEzv2f32_VCLEzv2i32_VCLEzv4f16_VCLEzv4f32_VCLEzv4i16_VCLEzv4i32_VCLEzv8f16_VCLEzv8i16_VCLEzv8i8_VCLTzv16i8_VCLTzv2f32_VCLTzv2i32_VCLTzv4f16_VCLTzv4f32_VCLTzv4i16_VCLTzv4i32_VCLTzv8f16_VCLTzv8i16_VCLTzv8i8 = 427, VPADALsv16i8_VPADALsv4i32_VPADALsv8i16_VPADALuv16i8_VPADALuv4i32_VPADALuv8i16 = 428, VPADALsv2i32_VPADALsv4i16_VPADALsv8i8_VPADALuv2i32_VPADALuv4i16_VPADALuv8i8_VRSRAsv16i8_VRSRAsv1i64_VRSRAsv2i32_VRSRAsv2i64_VRSRAsv4i16_VRSRAsv4i32_VRSRAsv8i16_VRSRAsv8i8_VRSRAuv16i8_VRSRAuv1i64_VRSRAuv2i32_VRSRAuv2i64_VRSRAuv4i16_VRSRAuv4i32_VRSRAuv8i16_VRSRAuv8i8_VSRAsv16i8_VSRAsv1i64_VSRAsv2i32_VSRAsv2i64_VSRAsv4i16_VSRAsv4i32_VSRAsv8i16_VSRAsv8i8_VSRAuv16i8_VSRAuv1i64_VSRAuv2i32_VSRAuv2i64_VSRAuv4i16_VSRAuv4i32_VSRAuv8i16_VSRAuv8i8 = 429, VQABSv16i8_VQABSv4i32_VQABSv8i16_VQNEGv16i8_VQNEGv4i32_VQNEGv8i16 = 430, VQABSv2i32_VQABSv4i16_VQABSv8i8_VQNEGv2i32_VQNEGv4i16_VQNEGv8i8 = 431, VQADDsv16i8_VQADDsv2i64_VQADDsv4i32_VQADDsv8i16_VQADDuv16i8_VQADDuv2i64_VQADDuv4i32_VQADDuv8i16 = 432, VQADDsv1i64_VQADDsv2i32_VQADDsv4i16_VQADDsv8i8_VQADDuv1i64_VQADDuv2i32_VQADDuv4i16_VQADDuv8i8 = 433, VQRSHLsv16i8_VQRSHLsv2i64_VQRSHLsv4i32_VQRSHLsv8i16_VQRSHLuv16i8_VQRSHLuv2i64_VQRSHLuv4i32_VQRSHLuv8i16_VRSHLsv16i8_VRSHLsv2i64_VRSHLsv4i32_VRSHLsv8i16_VRSHLuv16i8_VRSHLuv2i64_VRSHLuv4i32_VRSHLuv8i16 = 434, VQRSHLsv1i64_VQRSHLsv2i32_VQRSHLsv4i16_VQRSHLsv8i8_VQRSHLuv1i64_VQRSHLuv2i32_VQRSHLuv4i16_VQRSHLuv8i8_VRSHLsv1i64_VRSHLsv2i32_VRSHLsv4i16_VRSHLsv8i8_VRSHLuv1i64_VRSHLuv2i32_VRSHLuv4i16_VRSHLuv8i8_VRSHRsv16i8_VRSHRsv1i64_VRSHRsv2i32_VRSHRsv2i64_VRSHRsv4i16_VRSHRsv4i32_VRSHRsv8i16_VRSHRsv8i8_VRSHRuv16i8_VRSHRuv1i64_VRSHRuv2i32_VRSHRuv2i64_VRSHRuv4i16_VRSHRuv4i32_VRSHRuv8i16_VRSHRuv8i8 = 435, VRECPEd_VRECPEfd_VRECPEhd_VRSQRTEd_VRSQRTEfd_VRSQRTEhd = 436, VRECPEfq_VRECPEhq_VRECPEq_VRSQRTEfq_VRSQRTEhq_VRSQRTEq = 437, VADDHNv2i32_VADDHNv4i16_VADDHNv8i8_VSUBHNv2i32_VSUBHNv4i16_VSUBHNv8i8 = 438, VSHRNv2i32_VSHRNv4i16_VSHRNv8i8 = 439, VQRSHRNsv2i32_VQRSHRNsv4i16_VQRSHRNsv8i8_VQRSHRNuv2i32_VQRSHRNuv4i16_VQRSHRNuv8i8_VQRSHRUNv2i32_VQRSHRUNv4i16_VQRSHRUNv8i8_VQSHRNsv2i32_VQSHRNsv4i16_VQSHRNsv8i8_VQSHRNuv2i32_VQSHRNuv4i16_VQSHRNuv8i8_VQSHRUNv2i32_VQSHRUNv4i16_VQSHRUNv8i8_VRSHRNv2i32_VRSHRNv4i16_VRSHRNv8i8 = 440, VRADDHNv2i32_VRADDHNv4i16_VRADDHNv8i8_VRSUBHNv2i32_VRSUBHNv4i16_VRSUBHNv8i8 = 441, VTBL1 = 442, VTBX1 = 443, VTBL2 = 444, VTBX2 = 445, VTBL3_VTBL3Pseudo = 446, VTBX3_VTBX3Pseudo = 447, VTBL4_VTBL4Pseudo = 448, VTBX4_VTBX4Pseudo = 449, VSWPd_VSWPq = 450, VTRNd16_VTRNd32_VTRNd8_VUZPd16_VUZPd8_VZIPd16_VZIPd8 = 451, VTRNq16_VTRNq32_VTRNq8 = 452, VUZPq16_VUZPq32_VUZPq8_VZIPq16_VZIPq32_VZIPq8 = 453, VABSD_VNEGD = 454, VABSS_VNEGS = 455, VCMPD_VCMPED_VCMPEZD_VCMPZD = 456, VCMPES_VCMPEZS_VCMPS_VCMPZS = 457, VABDLsv2i64_VABDLsv4i32_VABDLsv8i16_VABDLuv2i64_VABDLuv4i32_VABDLuv8i16_VABDsv16i8_VABDsv4i32_VABDsv8i16_VABDuv16i8_VABDuv4i32_VABDuv8i16_VMAXsv16i8_VMAXsv4i32_VMAXsv8i16_VMAXuv16i8_VMAXuv4i32_VMAXuv8i16_VMINsv16i8_VMINsv4i32_VMINsv8i16_VMINuv16i8_VMINuv4i32_VMINuv8i16 = 458, VABDfd_VABDhd_VADDfd_VMAXfd_VMAXhd_VMINfd_VMINhd_VSUBfd = 459, VABDfq_VABDhq_VADDfq_VMAXfq_VMAXhq_VMINfq_VMINhq_VSUBfq = 460, VABDsv2i32_VABDsv4i16_VABDsv8i8_VABDuv2i32_VABDuv4i16_VABDuv8i8_VMAXsv2i32_VMAXsv4i16_VMAXsv8i8_VMAXuv2i32_VMAXuv4i16_VMAXuv8i8_VMINsv2i32_VMINsv4i16_VMINsv8i8_VMINuv2i32_VMINuv4i16_VMINuv8i8_VPMAXs16_VPMAXs32_VPMAXs8_VPMAXu16_VPMAXu32_VPMAXu8_VPMINs16_VPMINs32_VPMINs8_VPMINu16_VPMINu32_VPMINu8 = 461, VADDS_VSUBS = 462, VMAXNMD_VMAXNMH_VMAXNMNDf_VMAXNMNDh_VMAXNMNQf_VMAXNMNQh_VMAXNMS_VMINNMD_VMINNMH_VMINNMNDf_VMINNMNDh_VMINNMNQf_VMINNMNQh_VMINNMS = 463, VPADDf_VPMAXf_VPMAXh_VPMINf_VPMINh = 464, VADDD_VSUBD = 465, VRECPSfd_VRECPShd_VRSQRTSfd_VRSQRTShd = 466, VRECPSfq_VRECPShq_VRSQRTSfq_VRSQRTShq = 467, VMULLp64 = 468, VMULLp8_VMULLslsv2i32_VMULLslsv4i16_VMULLsluv2i32_VMULLsluv4i16_VMULLsv4i32_VMULLsv8i16_VMULLuv4i32_VMULLuv8i16_VMULpd_VMULslhd_VMULslv4i16_VMULv4i16_VMULv8i8_VQDMULHslv4i16_VQDMULHv4i16_VQDMULLslv2i32_VQDMULLslv4i16_VQDMULLv4i32_VQRDMULHslv4i16_VQRDMULHv4i16 = 469, VMULLsv2i64_VMULLuv2i64_VMULslv2i32_VMULv2i32_VQDMULHslv2i32_VQDMULHv2i32_VQDMULLv2i64_VQRDMULHslv2i32_VQRDMULHv2i32 = 470, VMULS_VNMULS = 471, VMULfd = 472, VMULfq = 473, VMULpq_VMULslhq_VMULslv8i16_VMULv16i8_VMULv8i16_VQDMULHslv8i16_VQDMULHv8i16_VQRDMULHslv8i16_VQRDMULHv8i16 = 474, VMULslfd = 475, VMULslfq = 476, VMULslv4i32_VMULv4i32_VQDMULHslv4i32_VQDMULHv4i32_VQRDMULHslv4i32_VQRDMULHv4i32 = 477, VMULD_VNMULD = 478, VFMAD_VFMSD_VFNMAD_VFNMSD = 479, VFMAS_VFMSS_VFNMAS_VFNMSS = 480, VFNMAH_VFNMSH = 481, VMLAD_VMLSD_VNMLAD_VNMLSD = 482, VMLAH_VMLSH_VNMLAH_VNMLSH = 483, VMLALslsv2i32_VMLALsluv2i32_VMLALsv2i64_VMLALuv2i64_VMLAslv2i32_VMLAv2i32_VMLSLslsv2i32_VMLSLsluv2i32_VMLSLsv2i64_VMLSLuv2i64_VMLSslv2i32_VMLSv2i32_VQDMLALslv2i32_VQDMLALv2i64_VQDMLSLslv2i32_VQDMLSLv2i64 = 484, VMLALslsv4i16_VMLALsluv4i16_VMLALsv4i32_VMLALsv8i16_VMLALuv4i32_VMLALuv8i16_VMLAslv4i16_VMLAv4i16_VMLAv8i8_VMLSLslsv4i16_VMLSLsluv4i16_VMLSLsv4i32_VMLSLsv8i16_VMLSLuv4i32_VMLSLuv8i16_VMLSslv4i16_VMLSv4i16_VMLSv8i8_VQDMLALslv4i16_VQDMLALv4i32_VQDMLSLslv4i16_VQDMLSLv4i32 = 485, VMLAS_VMLSS_VNMLAS_VNMLSS = 486, VMLAfd_VMLAhd_VMLAslfd_VMLAslhd_VMLSfd_VMLShd_VMLSslfd_VMLSslhd = 487, VMLAfq_VMLAhq_VMLAslfq_VMLAslhq_VMLSfq_VMLShq_VMLSslfq_VMLSslhq = 488, VMLAslv4i32_VMLAv4i32_VMLSslv4i32_VMLSv4i32 = 489, VMLAslv8i16_VMLAv16i8_VMLAv8i16_VMLSslv8i16_VMLSv16i8_VMLSv8i16 = 490, VFMAfd_VFMSfd = 491, VFMAfq_VFMSfq = 492, VCVTANSDf_VCVTANSDh_VCVTANSQf_VCVTANSQh_VCVTANUDf_VCVTANUDh_VCVTANUQf_VCVTANUQh_VCVTASD_VCVTASH_VCVTASS_VCVTAUD_VCVTAUH_VCVTAUS_VCVTBDH_VCVTBHD_VCVTMNSDf_VCVTMNSDh_VCVTMNSQf_VCVTMNSQh_VCVTMNUDf_VCVTMNUDh_VCVTMNUQf_VCVTMNUQh_VCVTMSD_VCVTMSH_VCVTMSS_VCVTMUD_VCVTMUH_VCVTMUS_VCVTNNSDf_VCVTNNSDh_VCVTNNSQf_VCVTNNSQh_VCVTNNUDf_VCVTNNUDh_VCVTNNUQf_VCVTNNUQh_VCVTNSD_VCVTNSH_VCVTNSS_VCVTNUD_VCVTNUH_VCVTNUS_VCVTPNSDf_VCVTPNSDh_VCVTPNSQf_VCVTPNSQh_VCVTPNUDf_VCVTPNUDh_VCVTPNUQf_VCVTPNUQh_VCVTPSD_VCVTPSH_VCVTPSS_VCVTPUD_VCVTPUH_VCVTPUS_VCVTTDH_VCVTTHD = 493, VCVTBHS_VCVTTHS = 494, VCVTBSH_VCVTTSH = 495, VCVTDS = 496, VCVTSD = 497, VCVTf2h_VCVTf2sq_VCVTf2uq_VCVTf2xsq_VCVTf2xuq_VCVTh2f_VCVTh2sq_VCVTh2uq_VCVTh2xsq_VCVTh2xuq_VCVTs2fq_VCVTs2hq_VCVTu2fq_VCVTu2hq_VCVTxs2fq_VCVTxs2hq_VCVTxu2fq_VCVTxu2hq = 498, VCVTf2sd_VCVTf2ud_VCVTf2xsd_VCVTf2xud_VCVTh2sd_VCVTh2ud_VCVTh2xsd_VCVTh2xud_VCVTs2fd_VCVTs2hd_VCVTu2fd_VCVTu2hd_VCVTxs2fd_VCVTxs2hd_VCVTxu2fd_VCVTxu2hd = 499, VSITOD_VUITOD = 500, VSITOH_VUITOH = 501, VSITOS_VUITOS = 502, VTOSHD_VTOSLD_VTOUHD_VTOULD = 503, VTOSHH_VTOSLH_VTOUHH_VTOULH = 504, VTOSHS_VTOSLS_VTOUHS_VTOULS = 505, VTOSIRD_VTOSIZD_VTOUIRD_VTOUIZD = 506, VTOSIRH_VTOSIZH_VTOUIRH_VTOUIZH = 507, VTOSIRS_VTOSIZS_VTOUIRS_VTOUIZS = 508, FCONSTD_VMOVD_VMOVDcc = 509, FCONSTS_VMOVS_VMOVScc = 510, VMOVv16i8_VMOVv1i64_VMOVv2f32_VMOVv2i32_VMOVv2i64_VMOVv4f32_VMOVv4i16_VMOVv4i32_VMOVv8i16_VMOVv8i8_VMVNv2i32_VMVNv4i16_VMVNv4i32_VMVNv8i16 = 511, VMVNd_VMVNq = 512, VMOVLsv2i64_VMOVLsv4i32_VMOVLsv8i16_VMOVLuv2i64_VMOVLuv4i32_VMOVLuv8i16 = 513, VMOVNv2i32_VMOVNv4i16_VMOVNv8i8 = 514, VQMOVNsuv2i32_VQMOVNsuv4i16_VQMOVNsuv8i8_VQMOVNsv2i32_VQMOVNsv4i16_VQMOVNsv8i8_VQMOVNuv2i32_VQMOVNuv4i16_VQMOVNuv8i8 = 515, VDUPLN16d_VDUPLN32d_VDUPLN8d = 516, VDUPLN16q_VDUPLN32q_VDUPLN8q = 517, VDUP16d_VDUP16q_VDUP32d_VDUP32q_VDUP8d_VDUP8q = 518, VMOVRS = 519, VMOVSR = 520, VSETLNi16_VSETLNi32_VSETLNi8 = 521, VMOVRRD_VMOVRRS = 522, VMOVDRR = 523, VMOVSRR = 524, VGETLNi32_VGETLNu16_VGETLNu8 = 525, VGETLNs16_VGETLNs8 = 526, VMRS_VMRS_FPEXC_VMRS_FPINST_VMRS_FPINST2_VMRS_FPSID_VMRS_MVFR0_VMRS_MVFR1_VMRS_MVFR2 = 527, VMSR_VMSR_FPEXC_VMSR_FPINST_VMSR_FPINST2_VMSR_FPSID = 528, FMSTAT = 529, VLDRD = 530, VLDRS = 531, VSTRD = 532, VSTRS = 533, VLDMQIA = 534, VSTMQIA = 535, VLDMDIA_VLDMSIA = 536, VLDMDDB_UPD_VLDMDIA_UPD_VLDMSDB_UPD_VLDMSIA_UPD = 537, VSTMDIA_VSTMSIA = 538, VSTMDDB_UPD_VSTMDIA_UPD_VSTMSDB_UPD_VSTMSIA_UPD = 539, VLD1d16_VLD1d32_VLD1d64_VLD1d8 = 540, VLD1q16_VLD1q32_VLD1q64_VLD1q8 = 541, VLD1d16wb_fixed_VLD1d16wb_register_VLD1d32wb_fixed_VLD1d32wb_register_VLD1d64wb_fixed_VLD1d64wb_register_VLD1d8wb_fixed_VLD1d8wb_register = 542, VLD1q16wb_fixed_VLD1q16wb_register_VLD1q32wb_fixed_VLD1q32wb_register_VLD1q64wb_fixed_VLD1q64wb_register_VLD1q8wb_fixed_VLD1q8wb_register = 543, VLD1d16T_VLD1d32T_VLD1d64T_VLD1d64TPseudo_VLD1d64TPseudoWB_fixed_VLD1d64TPseudoWB_register_VLD1d8T = 544, VLD1d16Twb_fixed_VLD1d16Twb_register_VLD1d32Twb_fixed_VLD1d32Twb_register_VLD1d64Twb_fixed_VLD1d64Twb_register_VLD1d8Twb_fixed_VLD1d8Twb_register = 545, VLD1d16Q_VLD1d32Q_VLD1d64Q_VLD1d64QPseudo_VLD1d64QPseudoWB_fixed_VLD1d64QPseudoWB_register_VLD1d8Q = 546, VLD1d16Qwb_fixed_VLD1d16Qwb_register_VLD1d32Qwb_fixed_VLD1d32Qwb_register_VLD1d64Qwb_fixed_VLD1d64Qwb_register_VLD1d8Qwb_fixed_VLD1d8Qwb_register = 547, VLD2b16_VLD2b32_VLD2b8_VLD2d16_VLD2d32_VLD2d8 = 548, VLD2q16_VLD2q16Pseudo_VLD2q32_VLD2q32Pseudo_VLD2q8_VLD2q8Pseudo = 549, VLD2b16wb_fixed_VLD2b16wb_register_VLD2b32wb_fixed_VLD2b32wb_register_VLD2b8wb_fixed_VLD2b8wb_register_VLD2d16wb_fixed_VLD2d16wb_register_VLD2d32wb_fixed_VLD2d32wb_register_VLD2d8wb_fixed_VLD2d8wb_register = 550, VLD2q16PseudoWB_fixed_VLD2q16PseudoWB_register_VLD2q16wb_fixed_VLD2q16wb_register_VLD2q32PseudoWB_fixed_VLD2q32PseudoWB_register_VLD2q32wb_fixed_VLD2q32wb_register_VLD2q8PseudoWB_fixed_VLD2q8PseudoWB_register_VLD2q8wb_fixed_VLD2q8wb_register = 551, VLD3d16_VLD3d32_VLD3d8_VLD3q16_VLD3q32_VLD3q8 = 552, VLD3d16Pseudo_VLD3d32Pseudo_VLD3d8Pseudo_VLD3q16oddPseudo_VLD3q32oddPseudo_VLD3q8oddPseudo = 553, VLD3d16_UPD_VLD3d32_UPD_VLD3d8_UPD_VLD3q16_UPD_VLD3q32_UPD_VLD3q8_UPD = 554, VLD3d16Pseudo_UPD_VLD3d32Pseudo_UPD_VLD3d8Pseudo_UPD_VLD3q16Pseudo_UPD_VLD3q16oddPseudo_UPD_VLD3q32Pseudo_UPD_VLD3q32oddPseudo_UPD_VLD3q8Pseudo_UPD_VLD3q8oddPseudo_UPD = 555, VLD4d16_VLD4d32_VLD4d8_VLD4q16_VLD4q32_VLD4q8 = 556, VLD4d16Pseudo_VLD4d32Pseudo_VLD4d8Pseudo_VLD4q16oddPseudo_VLD4q32oddPseudo_VLD4q8oddPseudo = 557, VLD4d16_UPD_VLD4d32_UPD_VLD4d8_UPD_VLD4q16_UPD_VLD4q32_UPD_VLD4q8_UPD = 558, VLD4d16Pseudo_UPD_VLD4d32Pseudo_UPD_VLD4d8Pseudo_UPD_VLD4q16Pseudo_UPD_VLD4q16oddPseudo_UPD_VLD4q32Pseudo_UPD_VLD4q32oddPseudo_UPD_VLD4q8Pseudo_UPD_VLD4q8oddPseudo_UPD = 559, VLD1DUPd16_VLD1DUPd32_VLD1DUPd8_VLD1DUPq16_VLD1DUPq32_VLD1DUPq8 = 560, VLD1LNd16_VLD1LNd32_VLD1LNd8_VLD1LNq16Pseudo_VLD1LNq32Pseudo_VLD1LNq8Pseudo = 561, VLD1DUPd16wb_fixed_VLD1DUPd16wb_register_VLD1DUPd32wb_fixed_VLD1DUPd32wb_register_VLD1DUPd8wb_fixed_VLD1DUPd8wb_register_VLD1DUPq16wb_fixed_VLD1DUPq16wb_register_VLD1DUPq32wb_fixed_VLD1DUPq32wb_register_VLD1DUPq8wb_fixed_VLD1DUPq8wb_register = 562, VLD1LNd16_UPD_VLD1LNd32_UPD_VLD1LNd8_UPD_VLD1LNq16Pseudo_UPD_VLD1LNq32Pseudo_UPD_VLD1LNq8Pseudo_UPD = 563, VLD2DUPd16_VLD2DUPd16x2_VLD2DUPd32_VLD2DUPd32x2_VLD2DUPd8_VLD2DUPd8x2 = 564, VLD2LNd16_VLD2LNd16Pseudo_VLD2LNd32_VLD2LNd32Pseudo_VLD2LNd8_VLD2LNd8Pseudo_VLD2LNq16_VLD2LNq16Pseudo_VLD2LNq32_VLD2LNq32Pseudo = 565, VLD2LNd16_UPD_VLD2LNd32_UPD_VLD2LNd8_UPD_VLD2LNq16_UPD_VLD2LNq32_UPD = 566, VLD2DUPd16wb_fixed_VLD2DUPd16wb_register_VLD2DUPd16x2wb_fixed_VLD2DUPd16x2wb_register_VLD2DUPd32wb_fixed_VLD2DUPd32wb_register_VLD2DUPd32x2wb_fixed_VLD2DUPd32x2wb_register_VLD2DUPd8wb_fixed_VLD2DUPd8wb_register_VLD2DUPd8x2wb_fixed_VLD2DUPd8x2wb_register = 567, VLD2LNd16Pseudo_UPD_VLD2LNd32Pseudo_UPD_VLD2LNd8Pseudo_UPD_VLD2LNq16Pseudo_UPD_VLD2LNq32Pseudo_UPD = 568, VLD3DUPd16_VLD3DUPd16Pseudo_VLD3DUPd32_VLD3DUPd32Pseudo_VLD3DUPd8_VLD3DUPd8Pseudo_VLD3DUPq16_VLD3DUPq32_VLD3DUPq8 = 569, VLD3LNd16_VLD3LNd16Pseudo_VLD3LNd32_VLD3LNd32Pseudo_VLD3LNd8_VLD3LNd8Pseudo_VLD3LNq16_VLD3LNq16Pseudo_VLD3LNq32_VLD3LNq32Pseudo = 570, VLD3DUPd16_UPD_VLD3DUPd32_UPD_VLD3DUPd8_UPD_VLD3DUPq16_UPD_VLD3DUPq32_UPD_VLD3DUPq8_UPD = 571, VLD3LNd16_UPD_VLD3LNd32_UPD_VLD3LNd8_UPD_VLD3LNq16_UPD_VLD3LNq32_UPD = 572, VLD3DUPd16Pseudo_UPD_VLD3DUPd32Pseudo_UPD_VLD3DUPd8Pseudo_UPD = 573, VLD3LNd16Pseudo_UPD_VLD3LNd32Pseudo_UPD_VLD3LNd8Pseudo_UPD_VLD3LNq16Pseudo_UPD_VLD3LNq32Pseudo_UPD = 574, VLD4DUPd16_VLD4DUPd16Pseudo_VLD4DUPd32_VLD4DUPd32Pseudo_VLD4DUPd8_VLD4DUPd8Pseudo_VLD4DUPq16_VLD4DUPq32_VLD4DUPq8 = 575, VLD4LNd16_VLD4LNd16Pseudo_VLD4LNd32_VLD4LNd32Pseudo_VLD4LNd8_VLD4LNd8Pseudo_VLD4LNq16_VLD4LNq16Pseudo_VLD4LNq32_VLD4LNq32Pseudo = 576, VLD4DUPd16_UPD_VLD4DUPd32_UPD_VLD4DUPd8_UPD_VLD4DUPq16_UPD_VLD4DUPq32_UPD_VLD4DUPq8_UPD = 577, VLD4LNd16_UPD_VLD4LNd32_UPD_VLD4LNd8_UPD_VLD4LNq16_UPD_VLD4LNq32_UPD = 578, VLD4DUPd16Pseudo_UPD_VLD4DUPd32Pseudo_UPD_VLD4DUPd8Pseudo_UPD = 579, VLD4LNd16Pseudo_UPD_VLD4LNd32Pseudo_UPD_VLD4LNd8Pseudo_UPD_VLD4LNq16Pseudo_UPD_VLD4LNq32Pseudo_UPD = 580, VST1d16_VST1d32_VST1d64_VST1d8 = 581, VST1q16_VST1q32_VST1q64_VST1q8 = 582, VST1d16wb_fixed_VST1d16wb_register_VST1d32wb_fixed_VST1d32wb_register_VST1d64wb_fixed_VST1d64wb_register_VST1d8wb_fixed_VST1d8wb_register = 583, VST1q16wb_fixed_VST1q16wb_register_VST1q32wb_fixed_VST1q32wb_register_VST1q64wb_fixed_VST1q64wb_register_VST1q8wb_fixed_VST1q8wb_register = 584, VST1d16T_VST1d32T_VST1d64T_VST1d64TPseudo_VST1d8T = 585, VST1d16Twb_fixed_VST1d16Twb_register_VST1d32Twb_fixed_VST1d32Twb_register_VST1d64Twb_fixed_VST1d64Twb_register_VST1d8Twb_fixed_VST1d8Twb_register = 586, VST1d64TPseudoWB_fixed_VST1d64TPseudoWB_register = 587, VST1d16Q_VST1d32Q_VST1d64Q_VST1d64QPseudo_VST1d8Q = 588, VST1d16Qwb_fixed_VST1d16Qwb_register_VST1d32Qwb_fixed_VST1d32Qwb_register_VST1d64Qwb_fixed_VST1d64Qwb_register_VST1d8Qwb_fixed_VST1d8Qwb_register = 589, VST1d64QPseudoWB_fixed_VST1d64QPseudoWB_register = 590, VST2b16_VST2b32_VST2b8_VST2d16_VST2d32_VST2d8 = 591, VST2b16wb_fixed_VST2b16wb_register_VST2b32wb_fixed_VST2b32wb_register_VST2b8wb_fixed_VST2b8wb_register_VST2d16wb_fixed_VST2d16wb_register_VST2d32wb_fixed_VST2d32wb_register_VST2d8wb_fixed_VST2d8wb_register = 592, VST2q16_VST2q16Pseudo_VST2q32_VST2q32Pseudo_VST2q8_VST2q8Pseudo = 593, VST2q16PseudoWB_fixed_VST2q16PseudoWB_register_VST2q32PseudoWB_fixed_VST2q32PseudoWB_register_VST2q8PseudoWB_fixed_VST2q8PseudoWB_register = 594, VST2q16wb_fixed_VST2q16wb_register_VST2q32wb_fixed_VST2q32wb_register_VST2q8wb_fixed_VST2q8wb_register = 595, VST3d16_VST3d16Pseudo_VST3d32_VST3d32Pseudo_VST3d8_VST3d8Pseudo_VST3q16_VST3q16oddPseudo_VST3q32_VST3q32oddPseudo_VST3q8_VST3q8oddPseudo = 596, VST3d16Pseudo_UPD_VST3d16_UPD_VST3d32Pseudo_UPD_VST3d32_UPD_VST3d8Pseudo_UPD_VST3d8_UPD_VST3q16Pseudo_UPD_VST3q16_UPD_VST3q16oddPseudo_UPD_VST3q32Pseudo_UPD_VST3q32_UPD_VST3q32oddPseudo_UPD_VST3q8Pseudo_UPD_VST3q8_UPD_VST3q8oddPseudo_UPD = 597, VST4d16_VST4d16Pseudo_VST4d32_VST4d32Pseudo_VST4d8_VST4d8Pseudo_VST4q16_VST4q16oddPseudo_VST4q32_VST4q32oddPseudo_VST4q8_VST4q8oddPseudo = 598, VST4d16Pseudo_UPD_VST4d16_UPD_VST4d32Pseudo_UPD_VST4d32_UPD_VST4d8Pseudo_UPD_VST4d8_UPD_VST4q16Pseudo_UPD_VST4q16_UPD_VST4q16oddPseudo_UPD_VST4q32Pseudo_UPD_VST4q32_UPD_VST4q32oddPseudo_UPD_VST4q8Pseudo_UPD_VST4q8_UPD_VST4q8oddPseudo_UPD = 599, VST1LNd16_VST1LNd32_VST1LNd8_VST1LNq16Pseudo_VST1LNq32Pseudo_VST1LNq8Pseudo = 600, VST1LNd16_UPD_VST1LNd32_UPD_VST1LNd8_UPD_VST1LNq16Pseudo_UPD_VST1LNq32Pseudo_UPD_VST1LNq8Pseudo_UPD = 601, VST2LNd16_VST2LNd16Pseudo_VST2LNd32_VST2LNd32Pseudo_VST2LNd8_VST2LNd8Pseudo_VST2LNq16_VST2LNq16Pseudo_VST2LNq32_VST2LNq32Pseudo = 602, VST2LNd16Pseudo_UPD_VST2LNd16_UPD_VST2LNd32Pseudo_UPD_VST2LNd32_UPD_VST2LNd8Pseudo_UPD_VST2LNd8_UPD_VST2LNq16Pseudo_UPD_VST2LNq16_UPD_VST2LNq32Pseudo_UPD_VST2LNq32_UPD = 603, VST3LNd16_VST3LNd16Pseudo_VST3LNd32_VST3LNd32Pseudo_VST3LNd8_VST3LNd8Pseudo_VST3LNq16_VST3LNq16Pseudo_VST3LNq32_VST3LNq32Pseudo = 604, VST3LNd16Pseudo_UPD_VST3LNd16_UPD_VST3LNd32Pseudo_UPD_VST3LNd32_UPD_VST3LNd8Pseudo_UPD_VST3LNd8_UPD_VST3LNq16Pseudo_UPD_VST3LNq16_UPD_VST3LNq32Pseudo_UPD_VST3LNq32_UPD = 605, VST4LNd16_VST4LNd16Pseudo_VST4LNd32_VST4LNd32Pseudo_VST4LNd8_VST4LNd8Pseudo_VST4LNq16_VST4LNq16Pseudo_VST4LNq32_VST4LNq32Pseudo = 606, VST4LNd16Pseudo_UPD_VST4LNd16_UPD_VST4LNd32Pseudo_UPD_VST4LNd32_UPD_VST4LNd8Pseudo_UPD_VST4LNd8_UPD_VST4LNq16Pseudo_UPD_VST4LNq16_UPD_VST4LNq32Pseudo_UPD_VST4LNq32_UPD = 607, VDIVS = 608, VSQRTS = 609, VDIVD = 610, VSQRTD = 611, ABS = 612, SCHED_LIST_END = 613 }; } // end Sched namespace } // end ARM namespace } // end llvm namespace #endif // GET_INSTRINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Target Instruction Descriptors *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_INSTRINFO_MC_DESC #undef GET_INSTRINFO_MC_DESC namespace llvm_ks { static const MCPhysReg ImplicitList1[] = { ARM::CPSR, 0 }; static const MCPhysReg ImplicitList2[] = { ARM::SP, 0 }; static const MCPhysReg ImplicitList3[] = { ARM::LR, 0 }; static const MCPhysReg ImplicitList4[] = { ARM::PC, 0 }; static const MCPhysReg ImplicitList5[] = { ARM::FPSCR_NZCV, 0 }; static const MCPhysReg ImplicitList6[] = { ARM::R7, ARM::LR, ARM::SP, 0 }; static const MCPhysReg ImplicitList7[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, 0 }; static const MCPhysReg ImplicitList8[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, 0 }; static const MCPhysReg ImplicitList9[] = { ARM::R0, ARM::R12, ARM::LR, ARM::CPSR, 0 }; static const MCPhysReg ImplicitList10[] = { ARM::FPSCR, 0 }; static const MCPhysReg ImplicitList11[] = { ARM::R4, 0 }; static const MCPhysReg ImplicitList12[] = { ARM::R4, ARM::SP, 0 }; static const MCPhysReg ImplicitList13[] = { ARM::ITSTATE, 0 }; static const MCPhysReg ImplicitList14[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R8, ARM::R9, ARM::R10, ARM::R11, ARM::R12, ARM::LR, ARM::CPSR, ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3, ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11, ARM::Q12, ARM::Q13, ARM::Q14, ARM::Q15, 0 }; static const MCPhysReg ImplicitList15[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R4, ARM::R5, ARM::R6, ARM::R7, ARM::R12, ARM::CPSR, 0 }; static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<InitMCInstrInfo(ARMInsts, NULL, NULL, 3007); } } // end llvm namespace #endif // GET_INSTRINFO_MC_DESC #ifdef GET_INSTRINFO_HEADER #undef GET_INSTRINFO_HEADER namespace llvm_ks { struct ARMGenInstrInfo : public TargetInstrInfo { explicit ARMGenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1); ~ARMGenInstrInfo() override {} }; } // end llvm namespace #endif // GET_INSTRINFO_HEADER #ifdef GET_INSTRINFO_OPERAND_ENUM #undef GET_INSTRINFO_OPERAND_ENUM namespace llvm_ks { namespace ARM { namespace OpName { enum { OPERAND_LAST }; } // end namespace OpName } // end namespace ARM } // end namespace llvm_ks #endif //GET_INSTRINFO_OPERAND_ENUM #ifdef GET_INSTRINFO_NAMED_OPS #undef GET_INSTRINFO_NAMED_OPS namespace llvm_ks { namespace ARM { LLVM_READONLY int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { return -1; } } // end namespace ARM } // end namespace llvm_ks #endif //GET_INSTRINFO_NAMED_OPS #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM #undef GET_INSTRINFO_OPERAND_TYPES_ENUM namespace llvm_ks { namespace ARM { namespace OpTypes { enum OperandType { VecListFourDByteIndexed = 0, VecListFourDHWordIndexed = 1, VecListFourDWordIndexed = 2, VecListFourQHWordIndexed = 3, VecListFourQWordIndexed = 4, VecListOneDByteIndexed = 5, VecListOneDHWordIndexed = 6, VecListOneDWordIndexed = 7, VecListThreeDByteIndexed = 8, VecListThreeDHWordIndexed = 9, VecListThreeDWordIndexed = 10, VecListThreeQHWordIndexed = 11, VecListThreeQWordIndexed = 12, VecListTwoDByteIndexed = 13, VecListTwoDHWordIndexed = 14, VecListTwoDWordIndexed = 15, VecListTwoQHWordIndexed = 16, VecListTwoQWordIndexed = 17, VectorIndex16 = 18, VectorIndex32 = 19, VectorIndex8 = 20, addr_offset_none = 21, addrmode2 = 22, addrmode3 = 23, addrmode3_pre = 24, addrmode5 = 25, addrmode5_pre = 26, addrmode5fp16 = 27, addrmode6 = 28, addrmode6align16 = 29, addrmode6align32 = 30, addrmode6align64 = 31, addrmode6align64or128 = 32, addrmode6align64or128or256 = 33, addrmode6alignNone = 34, addrmode6dup = 35, addrmode6dupalign16 = 36, addrmode6dupalign32 = 37, addrmode6dupalign64 = 38, addrmode6dupalign64or128 = 39, addrmode6dupalignNone = 40, addrmode6oneL32 = 41, addrmode_imm12 = 42, addrmode_imm12_pre = 43, addrmode_tbb = 44, addrmode_tbh = 45, addrmodepc = 46, adrlabel = 47, am2offset_imm = 48, am2offset_reg = 49, am3offset = 50, am6offset = 51, banked_reg = 52, bf_inv_mask_imm = 53, bl_target = 54, bltarget = 55, blx_target = 56, br_target = 57, brtarget = 58, c_imm = 59, cc_out = 60, cmovpred = 61, coproc_option_imm = 62, cpinst_operand = 63, dpr_reglist = 64, f32imm = 65, f64imm = 66, fbits16 = 67, fbits32 = 68, i16imm = 69, i1imm = 70, i32imm = 71, i64imm = 72, i8imm = 73, iflags_op = 74, imm0_1 = 75, imm0_15 = 76, imm0_239 = 77, imm0_255 = 78, imm0_3 = 79, imm0_31 = 80, imm0_32 = 81, imm0_4095 = 82, imm0_4095_neg = 83, imm0_63 = 84, imm0_65535 = 85, imm0_65535_expr = 86, imm0_65535_neg = 87, imm0_7 = 88, imm16 = 89, imm1_15 = 90, imm1_16 = 91, imm1_31 = 92, imm1_32 = 93, imm1_7 = 94, imm24b = 95, imm256_65535_expr = 96, imm32 = 97, imm8 = 98, imm_sr = 99, imod_op = 100, instsyncb_opt = 101, it_mask = 102, it_pred = 103, ldst_so_reg = 104, ldstm_mode = 105, memb_opt = 106, mod_imm = 107, mod_imm_neg = 108, mod_imm_not = 109, msr_mask = 110, nImmSplatI16 = 111, nImmSplatI32 = 112, nImmSplatI64 = 113, nImmSplatI8 = 114, nImmSplatNotI16 = 115, nImmSplatNotI32 = 116, nImmVMOVF32 = 117, nImmVMOVI16ByteReplicate = 118, nImmVMOVI32 = 119, nImmVMOVI32ByteReplicate = 120, nImmVMOVI32Neg = 121, nImmVMVNI16ByteReplicate = 122, nImmVMVNI32ByteReplicate = 123, nModImm = 124, neon_vcvt_imm32 = 125, nohash_imm = 126, p_imm = 127, pclabel = 128, pkh_asr_amt = 129, pkh_lsl_amt = 130, postidx_imm8 = 131, postidx_imm8s4 = 132, postidx_reg = 133, pred = 134, reglist = 135, rot_imm = 136, s_cc_out = 137, setend_op = 138, shift_imm = 139, shift_so_reg_imm = 140, shift_so_reg_reg = 141, shr_imm16 = 142, shr_imm32 = 143, shr_imm64 = 144, shr_imm8 = 145, so_reg_imm = 146, so_reg_reg = 147, spr_reglist = 148, t2_shift_imm = 149, t2_so_imm = 150, t2_so_imm_neg = 151, t2_so_imm_not = 152, t2_so_imm_notSext = 153, t2_so_reg = 154, t2addrmode_imm0_1020s4 = 155, t2addrmode_imm12 = 156, t2addrmode_imm8 = 157, t2addrmode_imm8_pre = 158, t2addrmode_imm8s4 = 159, t2addrmode_imm8s4_pre = 160, t2addrmode_negimm8 = 161, t2addrmode_posimm8 = 162, t2addrmode_so_reg = 163, t2adrlabel = 164, t2am_imm8_offset = 165, t2am_imm8s4_offset = 166, t2ldr_pcrel_imm12 = 167, t2ldrlabel = 168, t_addrmode_is1 = 169, t_addrmode_is2 = 170, t_addrmode_is4 = 171, t_addrmode_pc = 172, t_addrmode_rr = 173, t_addrmode_rrs1 = 174, t_addrmode_rrs2 = 175, t_addrmode_rrs4 = 176, t_addrmode_sp = 177, t_adrlabel = 178, t_bcctarget = 179, t_bltarget = 180, t_blxtarget = 181, t_brtarget = 182, t_cbtarget = 183, t_imm0_1020s4 = 184, t_imm0_508s4 = 185, t_imm0_508s4_neg = 186, uncondbrtarget = 187, vfp_f16imm = 188, vfp_f32imm = 189, vfp_f64imm = 190, OPERAND_TYPE_LIST_END }; } // end namespace OpTypes } // end namespace ARM } // end namespace llvm_ks #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM