; BTOR description generated by Yosys 0.20+42 (git sha1 1c36f4cc2, clang 10.0.0-4ubuntu1 -fPIC -Os) for module axis_fifo_wrapper.
1 sort bitvec 1
2 input 1 async_rst ; axis_fifo_wrapper.v:5.35-5.44
3 input 1 clk ; axis_fifo_wrapper.v:6.35-6.38
4 sort bitvec 8
5 input 4 input_axis_tdata ; axis_fifo_wrapper.v:11.35-11.51
6 input 1 input_axis_tlast ; axis_fifo_wrapper.v:14.35-14.51
7 input 1 input_axis_tuser ; axis_fifo_wrapper.v:15.35-15.51
8 input 1 input_axis_tvalid ; axis_fifo_wrapper.v:12.35-12.52
9 input 1 output_axis_tready ; axis_fifo_wrapper.v:22.35-22.53
10 const 1 0
11 state 1 axis_reg_inst.genblk1.s_axis_tready_reg
12 init 1 11 10
13 output 11 input_axis_tready ; axis_fifo_wrapper.v:13.35-13.52
14 sort bitvec 10
15 const 14 0000000000
16 state 14 UUT.data_out_reg
17 init 14 16 15
18 slice 4 16 7 0
19 output 18 output_axis_tdata ; axis_fifo_wrapper.v:20.35-20.52
20 slice 1 16 9 9
21 output 20 output_axis_tlast ; axis_fifo_wrapper.v:23.35-23.52
22 slice 1 16 8 8
23 output 22 output_axis_tuser ; axis_fifo_wrapper.v:24.35-24.52
24 state 1 UUT.output_axis_tvalid_reg
25 init 1 24 10
26 output 24 output_axis_tvalid ; axis_fifo_wrapper.v:21.35-21.53
27 state 1 axis_reg_inst.genblk1.m_axis_tvalid_reg
28 init 1 27 10
29 sort bitvec 6
30 const 29 000000
31 state 29 UUT.wr_ptr_gray
32 init 29 31 30
33 slice 1 31 5 5
34 state 29 UUT.rd_ptr_gray_sync2
35 init 29 34 30
36 slice 1 34 5 5
37 neq 1 33 36 $flatten\UUT.$ne$axis_async_fifo.v:94$86 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:94.15-94.71
38 slice 1 31 4 4
39 slice 1 34 4 4
40 neq 1 38 39 $flatten\UUT.$ne$axis_async_fifo.v:95$87 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:95.15-95.75
41 and 1 37 40 $flatten\UUT.$logic_and$axis_async_fifo.v:94$88 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:94.14-95.76
42 sort bitvec 4
43 slice 42 31 3 0
44 slice 42 34 3 0
45 eq 1 43 44 $flatten\UUT.$eq$axis_async_fifo.v:96$89 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:96.15-96.79
46 and 1 41 45 $flatten\UUT.$logic_and$axis_async_fifo.v:94$90 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:94.14-96.80
47 not 1 46 $flatten\UUT.$not$axis_async_fifo.v:105$98 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:105.28-105.33
48 and 1 27 47 $flatten\UUT.$and$axis_async_fifo.v:100$93 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:100.14-100.39
49 uext 1 48 0 UUT.write ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:100.6-100.11
50 state 29 UUT.wr_ptr_gray_sync2
51 init 29 50 30
52 state 29 UUT.wr_ptr_gray_sync1
53 init 29 52 30
54 state 29 UUT.wr_ptr
55 init 29 54 30
56 not 1 24 $flatten\UUT.$not$axis_async_fifo.v:185$125 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:185.39-185.62
57 or 1 9 56 $flatten\UUT.$or$axis_async_fifo.v:185$126 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:185.18-185.62
58 state 29 UUT.rd_ptr_gray
59 init 29 58 30
60 eq 1 58 50 $flatten\UUT.$eq$axis_async_fifo.v:98$91 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:98.14-98.46
61 not 1 60 $flatten\UUT.$not$axis_async_fifo.v:186$127 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:186.35-186.41
62 and 1 57 61 $flatten\UUT.$and$axis_async_fifo.v:101$97 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:101.13-101.68
63 uext 1 62 0 UUT.read ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:101.6-101.10
64 state 29 UUT.rd_ptr_gray_sync1
65 init 29 64 30
66 state 29 UUT.rd_ptr
67 init 29 66 30
68 const 1 1
69 state 1 UUT.output_rst_sync3
70 init 1 69 68
71 state 1 UUT.output_rst_sync2
72 init 1 71 68
73 state 1 UUT.output_rst_sync1
74 init 1 73 68
75 uext 1 3 0 UUT.output_clk ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:56.35-56.45
76 uext 1 24 0 UUT.output_axis_tvalid ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:58.35-58.53
77 uext 1 22 0 UUT.output_axis_tuser ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:61.35-61.52
78 uext 1 9 0 UUT.output_axis_tready ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:59.35-59.53
79 uext 1 20 0 UUT.output_axis_tlast ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:60.35-60.52
80 uext 4 18 0 UUT.output_axis_tdata ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:57.35-57.52
81 state 1 UUT.input_rst_sync3
82 init 1 81 68
83 state 1 UUT.input_rst_sync2
84 init 1 83 68
85 state 1 UUT.input_rst_sync1
86 init 1 85 68
87 uext 1 3 0 UUT.input_clk ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:46.35-46.44
88 uext 1 27 0 UUT.input_axis_tvalid ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:48.35-48.52
89 state 1 axis_reg_inst.genblk1.m_axis_tuser_reg
90 init 1 89 10
91 uext 1 89 0 UUT.input_axis_tuser ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:51.35-51.51
92 not 1 81 $flatten\UUT.$not$axis_async_fifo.v:105$99 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:105.37-105.53
93 and 1 47 92 $flatten\UUT.$and$axis_async_fifo.v:105$100 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:105.28-105.53
94 uext 1 93 0 UUT.input_axis_tready ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:49.35-49.52
95 state 1 axis_reg_inst.genblk1.m_axis_tlast_reg
96 init 1 95 10
97 uext 1 95 0 UUT.input_axis_tlast ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:50.35-50.51
98 const 4 00000000
99 state 4 axis_reg_inst.genblk1.m_axis_tdata_reg
100 init 4 99 98
101 uext 4 99 0 UUT.input_axis_tdata ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:47.35-47.51
102 uext 1 46 0 UUT.full ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:94.6-94.10
103 uext 1 60 0 UUT.empty ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:98.6-98.11
104 sort bitvec 9
105 concat 104 89 99
106 concat 14 95 105
107 uext 14 106 0 UUT.data_in ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:90.25-90.32
108 uext 1 2 0 UUT.async_rst ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:41.35-41.44
109 uext 1 8 0 axis_reg_inst.s_axis_tvalid ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:67.35-67.48
110 uext 1 7 0 axis_reg_inst.s_axis_tuser ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:72.35-72.47
111 uext 1 11 0 axis_reg_inst.s_axis_tready ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:68.35-68.48
112 uext 1 6 0 axis_reg_inst.s_axis_tlast ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:69.35-69.47
113 input 1
114 uext 1 113 0 axis_reg_inst.s_axis_tkeep ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:66.35-66.47
115 input 4
116 uext 4 115 0 axis_reg_inst.s_axis_tid ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:70.35-70.45
117 input 4
118 uext 4 117 0 axis_reg_inst.s_axis_tdest ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:71.35-71.47
119 uext 4 5 0 axis_reg_inst.s_axis_tdata ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:65.35-65.47
120 uext 1 2 0 axis_reg_inst.rst ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:60.35-60.38
121 uext 1 27 0 axis_reg_inst.m_axis_tvalid ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:79.35-79.48
122 uext 1 89 0 axis_reg_inst.m_axis_tuser ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:84.35-84.47
123 uext 1 93 0 axis_reg_inst.m_axis_tready ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:80.35-80.48
124 uext 1 95 0 axis_reg_inst.m_axis_tlast ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:81.35-81.47
125 uext 1 68 0 axis_reg_inst.m_axis_tkeep ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:78.35-78.47
126 uext 4 98 0 axis_reg_inst.m_axis_tid ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:82.35-82.45
127 uext 4 98 0 axis_reg_inst.m_axis_tdest ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:83.35-83.47
128 uext 4 99 0 axis_reg_inst.m_axis_tdata ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:77.35-77.47
129 state 1 axis_reg_inst.genblk1.temp_m_axis_tvalid_reg
130 init 1 129 10
131 input 1
132 ite 1 93 10 131 $flatten\axis_reg_inst.$procmux$227 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:151.18-156.12|axis_register.v:151.22-151.35
133 input 1
134 not 1 27 $flatten\axis_reg_inst.$logic_not$axis_register.v:142$151 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:142.34-142.52
135 or 1 93 134 $flatten\axis_reg_inst.$logic_or$axis_register.v:142$152 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:142.17-142.52
136 ite 1 135 133 8 $flatten\axis_reg_inst.$procmux$258 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:142.13-150.16|axis_register.v:142.17-142.52
137 ite 1 11 136 132 $flatten\axis_reg_inst.$procmux$269 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:140.9-156.12|axis_register.v:140.13-140.30
138 uext 1 137 0 axis_reg_inst.genblk1.temp_m_axis_tvalid_next ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:107.26-107.49
139 state 1 axis_reg_inst.genblk1.temp_m_axis_tuser_reg
140 init 1 139 10
141 state 1 axis_reg_inst.genblk1.temp_m_axis_tlast_reg
142 init 1 141 10
143 state 4 axis_reg_inst.genblk1.temp_m_axis_tdata_reg
144 init 4 143 98
145 ite 1 93 68 10 $flatten\axis_reg_inst.$procmux$221 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:151.18-156.12|axis_register.v:151.22-151.35
146 ite 1 11 10 145 $flatten\axis_reg_inst.$procmux$275 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:140.9-156.12|axis_register.v:140.13-140.30
147 uext 1 146 0 axis_reg_inst.genblk1.store_axis_temp_to_output ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:116.9-116.34
148 ite 1 135 10 68 $flatten\axis_reg_inst.$procmux$252 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:142.13-150.16|axis_register.v:142.17-142.52
149 ite 1 11 148 10 $flatten\axis_reg_inst.$procmux$263 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:140.9-156.12|axis_register.v:140.13-140.30
150 uext 1 149 0 axis_reg_inst.genblk1.store_axis_input_to_temp ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:115.9-115.33
151 ite 1 135 68 10 $flatten\axis_reg_inst.$procmux$240 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:142.13-150.16|axis_register.v:142.17-142.52
152 ite 1 11 151 10 $flatten\axis_reg_inst.$procmux$266 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:140.9-156.12|axis_register.v:140.13-140.30
153 uext 1 152 0 axis_reg_inst.genblk1.store_axis_input_to_output ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:114.9-114.35
154 not 1 129 $flatten\axis_reg_inst.$logic_not$axis_register.v:129$144 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:129.50-129.73
155 not 1 8 $flatten\axis_reg_inst.$logic_not$axis_register.v:129$146 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:129.100-129.114
156 or 1 134 155 $flatten\axis_reg_inst.$logic_or$axis_register.v:129$147 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:129.78-129.114
157 and 1 154 156 $flatten\axis_reg_inst.$logic_and$axis_register.v:129$148 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:129.50-129.115
158 or 1 93 157 $flatten\axis_reg_inst.$logic_or$axis_register.v:129$149 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:129.32-129.116
159 uext 1 158 0 axis_reg_inst.genblk1.s_axis_tready_early ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:129.10-129.29
160 input 1
161 ite 1 93 129 160 $flatten\axis_reg_inst.$procmux$233 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:151.18-156.12|axis_register.v:151.22-151.35
162 input 1
163 ite 1 135 8 162 $flatten\axis_reg_inst.$procmux$246 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:142.13-150.16|axis_register.v:142.17-142.52
164 ite 1 11 163 161 $flatten\axis_reg_inst.$procmux$272 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:140.9-156.12|axis_register.v:140.13-140.30
165 uext 1 164 0 axis_reg_inst.genblk1.m_axis_tvalid_next ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:98.26-98.44
166 uext 1 3 0 axis_reg_inst.clk ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:59.35-59.38
167 uext 4 99 0 reg_axis_tdata ; axis_fifo_wrapper.v:27.24-27.38
168 uext 1 95 0 reg_axis_tlast ; axis_fifo_wrapper.v:30.24-30.38
169 uext 1 93 0 reg_axis_tready ; axis_fifo_wrapper.v:29.24-29.39
170 uext 1 89 0 reg_axis_tuser ; axis_fifo_wrapper.v:31.24-31.38
171 uext 1 27 0 reg_axis_tvalid ; axis_fifo_wrapper.v:28.24-28.39
172 ite 1 2 10 158 $auto$ff.cc:524:unmap_srst$541
173 next 1 11 172 $flatten\axis_reg_inst.$auto$ff.cc:266:slice$435 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:159.5-195.8
174 sort bitvec 5
175 sort array 174 14
176 state 175 UUT.mem
177 slice 174 66 4 0
178 read 14 176 177
179 not 1 69 $flatten\UUT.$auto$opt_dff.cc:210:make_patterns_logic$469
180 sort bitvec 2
181 concat 180 179 62
182 redand 1 181 $flatten\UUT.$auto$opt_dff.cc:220:make_patterns_logic$472
183 ite 14 182 178 16 $auto$ff.cc:504:unmap_ce$499
184 next 14 16 183 $flatten\UUT.$auto$ff.cc:266:slice$468 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:158.1-168.4
185 ite 1 57 61 24 $auto$ff.cc:504:unmap_ce$513
186 ite 1 69 10 185 $auto$ff.cc:524:unmap_srst$515
187 next 1 24 186 $flatten\UUT.$auto$ff.cc:266:slice$460 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:182.1-190.4
188 concat 180 11 93
189 redor 1 188 $flatten\axis_reg_inst.$auto$opt_dff.cc:195:make_patterns_logic$479
190 concat 180 135 11
191 const 180 01
192 neq 1 190 191 $flatten\axis_reg_inst.$auto$opt_dff.cc:195:make_patterns_logic$481
193 concat 180 192 189
194 redand 1 193 $flatten\axis_reg_inst.$auto$opt_dff.cc:220:make_patterns_logic$483
195 ite 1 194 164 27 $auto$ff.cc:504:unmap_ce$533
196 ite 1 2 10 195 $auto$ff.cc:524:unmap_srst$535
197 next 1 27 196 $flatten\axis_reg_inst.$auto$ff.cc:266:slice$477 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:159.5-195.8
198 sort bitvec 32
199 uext 198 54 26
200 const 198 00000000000000000000000000000001
201 add 198 199 200 $flatten\UUT.$add$axis_async_fifo.v:140$114 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:140.23-140.33
202 slice 29 201 5 0
203 slice 174 201 5 1
204 concat 29 10 203
205 xor 29 202 204 $flatten\UUT.$xor$axis_async_fifo.v:142$116 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:142.24-142.56
206 ite 29 48 205 31 $auto$ff.cc:504:unmap_ce$517
207 ite 29 81 30 206 $auto$ff.cc:524:unmap_srst$519
208 next 29 31 207 $flatten\UUT.$auto$ff.cc:266:slice$457 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:134.1-144.4
209 ite 29 81 30 64 $auto$ff.cc:524:unmap_srst$495
210 next 29 34 209 $flatten\UUT.$auto$ff.cc:266:slice$474 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:147.1-155.4
211 ite 29 69 30 52 $auto$ff.cc:524:unmap_srst$509
212 next 29 50 211 $flatten\UUT.$auto$ff.cc:266:slice$462 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:171.1-179.4
213 ite 29 69 30 31 $auto$ff.cc:524:unmap_srst$511
214 next 29 52 213 $flatten\UUT.$auto$ff.cc:266:slice$461 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:171.1-179.4
215 ite 29 48 202 54 $auto$ff.cc:504:unmap_ce$491
216 ite 29 81 30 215 $auto$ff.cc:524:unmap_srst$493
217 next 29 54 216 $flatten\UUT.$auto$ff.cc:266:slice$476 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:134.1-144.4
218 uext 198 66 26
219 add 198 218 200 $flatten\UUT.$add$axis_async_fifo.v:164$120 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:164.23-164.33
220 slice 29 219 5 0
221 slice 174 219 5 1
222 concat 29 10 221
223 xor 29 220 222 $flatten\UUT.$xor$axis_async_fifo.v:166$122 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:166.24-166.56
224 ite 29 62 223 58 $auto$ff.cc:504:unmap_ce$501
225 ite 29 69 30 224 $auto$ff.cc:524:unmap_srst$503
226 next 29 58 225 $flatten\UUT.$auto$ff.cc:266:slice$467 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:158.1-168.4
227 ite 29 81 30 58 $auto$ff.cc:524:unmap_srst$497
228 next 29 64 227 $flatten\UUT.$auto$ff.cc:266:slice$473 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:147.1-155.4
229 ite 29 62 220 66 $auto$ff.cc:504:unmap_ce$505
230 ite 29 69 30 229 $auto$ff.cc:524:unmap_srst$507
231 next 29 66 230 $flatten\UUT.$auto$ff.cc:266:slice$464 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:158.1-168.4
232 ite 1 2 68 71 $auto$ff.cc:524:unmap_srst$527
233 next 1 69 232 $flatten\UUT.$auto$ff.cc:266:slice$452 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:121.1-131.4
234 ite 1 2 68 73 $auto$ff.cc:524:unmap_srst$525
235 next 1 71 234 $flatten\UUT.$auto$ff.cc:266:slice$453 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:121.1-131.4
236 ite 1 2 68 10 $flatten\UUT.$procmux$386 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:110.5-118.8|axis_async_fifo.v:110.9-110.18
237 next 1 73 236 $flatten\UUT.$procdff$418 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:121.1-131.4
238 ite 1 2 68 83 $auto$ff.cc:524:unmap_srst$521
239 next 1 81 238 $flatten\UUT.$auto$ff.cc:266:slice$455 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:109.1-119.4
240 or 1 85 73 $flatten\UUT.$or$axis_async_fifo.v:116$102 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:116.28-116.62
241 ite 1 2 68 240 $auto$ff.cc:524:unmap_srst$523
242 next 1 83 241 $flatten\UUT.$auto$ff.cc:266:slice$454 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:109.1-119.4
243 next 1 85 236 $flatten\UUT.$procdff$421 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:109.1-119.4
244 input 1
245 ite 1 146 139 244 $flatten\axis_reg_inst.$procmux$190 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:178.18-185.12|axis_register.v:178.22-178.47
246 ite 1 152 7 245 $flatten\axis_reg_inst.$procmux$193 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:171.9-185.12|axis_register.v:171.13-171.39
247 concat 180 146 152
248 redor 1 247 $flatten\axis_reg_inst.$auto$opt_dff.cc:195:make_patterns_logic$428
249 ite 1 248 246 89 $auto$ff.cc:504:unmap_ce$547
250 next 1 89 249 $flatten\axis_reg_inst.$auto$ff.cc:266:slice$426 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:159.5-195.8
251 input 1
252 ite 1 146 141 251 $flatten\axis_reg_inst.$procmux$205 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:178.18-185.12|axis_register.v:178.22-178.47
253 ite 1 152 6 252 $flatten\axis_reg_inst.$procmux$208 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:171.9-185.12|axis_register.v:171.13-171.39
254 ite 1 248 253 95 $auto$ff.cc:504:unmap_ce$537
255 next 1 95 254 $flatten\axis_reg_inst.$auto$ff.cc:266:slice$443 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:159.5-195.8
256 input 4
257 ite 4 146 143 256 $flatten\axis_reg_inst.$procmux$215 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:178.18-185.12|axis_register.v:178.22-178.47
258 ite 4 152 5 257 $flatten\axis_reg_inst.$procmux$218 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:171.9-185.12|axis_register.v:171.13-171.39
259 ite 4 248 258 99 $auto$ff.cc:504:unmap_ce$539
260 next 4 99 259 $flatten\axis_reg_inst.$auto$ff.cc:266:slice$436 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:159.5-195.8
261 const 180 11
262 neq 1 190 261 $flatten\axis_reg_inst.$auto$opt_dff.cc:195:make_patterns_logic$488
263 concat 180 262 189
264 redand 1 263 $flatten\axis_reg_inst.$auto$opt_dff.cc:220:make_patterns_logic$490
265 ite 1 264 137 129 $auto$ff.cc:504:unmap_ce$529
266 ite 1 2 10 265 $auto$ff.cc:524:unmap_srst$531
267 next 1 129 266 $flatten\axis_reg_inst.$auto$ff.cc:266:slice$484 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:159.5-195.8
268 ite 1 149 7 139 $auto$ff.cc:504:unmap_ce$549
269 next 1 139 268 $flatten\axis_reg_inst.$auto$ff.cc:266:slice$425 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:159.5-195.8
270 ite 1 149 6 141 $auto$ff.cc:504:unmap_ce$543
271 next 1 141 270 $flatten\axis_reg_inst.$auto$ff.cc:266:slice$432 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:159.5-195.8
272 ite 4 149 5 143 $auto$ff.cc:504:unmap_ce$545
273 next 4 143 272 $flatten\axis_reg_inst.$auto$ff.cc:266:slice$429 ; axis_fifo_wrapper.v:36.1-49.2|axis_register.v:159.5-195.8
274 input 174
275 slice 174 54 4 0
276 ite 174 48 275 274 $flatten\UUT.$procmux$341 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:138.14-143.8|axis_async_fifo.v:138.18-138.23
277 input 174
278 ite 174 81 277 276 $flatten\UUT.$procmux$353 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:135.5-143.8|axis_async_fifo.v:135.9-135.24
279 input 14
280 ite 14 48 106 279 $flatten\UUT.$procmux$335 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:138.14-143.8|axis_async_fifo.v:138.18-138.23
281 input 14
282 ite 14 81 281 280 $flatten\UUT.$procmux$350 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:135.5-143.8|axis_async_fifo.v:135.9-135.24
283 ite 1 48 68 10 $flatten\UUT.$procmux$329 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:138.14-143.8|axis_async_fifo.v:138.18-138.23
284 ite 1 81 10 283 $flatten\UUT.$procmux$347 ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:135.5-143.8|axis_async_fifo.v:135.9-135.24
285 concat 180 284 284
286 sort bitvec 3
287 concat 286 284 285
288 concat 42 284 287
289 concat 174 284 288
290 concat 29 284 289
291 sort bitvec 7
292 concat 291 284 290
293 concat 4 284 292
294 concat 104 284 293
295 concat 14 284 294
296 read 14 176 278
297 not 14 295
298 and 14 296 297
299 and 14 282 295
300 or 14 299 298
301 write 175 176 278 300
302 redor 1 295
303 ite 175 302 301 176
304 next 175 176 303 UUT.mem ; axis_fifo_wrapper.v:55.1-72.2|axis_async_fifo.v:86.24-86.27
; end of yosys output