//--------------------------------------------------------------------------------
// Auto-generated by Migen (811d135) & LiteX (5da0bcbd) on 2019-12-29 19:13:38
//--------------------------------------------------------------------------------
#ifndef __GENERATED_SOC_H
#define __GENERATED_SOC_H
#define SIM
#define ROM_BOOT_ADDRESS 536870912
static inline int rom_boot_address_read(void) {
	return 536870912;
}
#define CONFIG_CLOCK_FREQUENCY 1000000
static inline int config_clock_frequency_read(void) {
	return 1000000;
}
#define CONFIG_CPU_RESET_ADDR 0
static inline int config_cpu_reset_addr_read(void) {
	return 0;
}
#define CONFIG_CPU_TYPE "VEXRISCV"
static inline const char * config_cpu_type_read(void) {
	return "VEXRISCV";
}
#define CONFIG_CPU_TYPE_VEXRISCV
#define CONFIG_CPU_VARIANT "LINUX"
static inline const char * config_cpu_variant_read(void) {
	return "LINUX";
}
#define CONFIG_CPU_VARIANT_LINUX
#define CONFIG_CSR_ALIGNMENT 32
static inline int config_csr_alignment_read(void) {
	return 32;
}
#define CONFIG_CSR_DATA_WIDTH 8
static inline int config_csr_data_width_read(void) {
	return 8;
}
#define CONFIG_SHADOW_BASE 2147483648
static inline int config_shadow_base_read(void) {
	return 2147483648;
}
#define TIMER0_INTERRUPT 1
static inline int timer0_interrupt_read(void) {
	return 1;
}
#define UART_INTERRUPT 0
static inline int uart_interrupt_read(void) {
	return 0;
}

#endif