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0xffffffffULDFII_CONTROL_CKE 0x02__riscv_div 1__LDBL_HAS_QUIET_NAN__ 1__INT8_TYPE__ signed char__WINT_MAX__ 0xffffffffUcsrs(reg,bit) ({ if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) asm volatile ("csrrs x0, " #reg ", %0" :: "i"(bit)); else asm volatile ("csrrs x0, " #reg ", %0" :: "r"(bit)); })CSR_UART_RXTX_SIZE 1CSR_CTRL_RESET_SIZE 1__CHAR_UNSIGNED__ 1__UINT_FAST64_MAX__ 0xffffffffffffffffULL__UINT_FAST32_MAX__ 0xffffffffUrx_produce__INT64_C(c) c ## LL__FLT128_EPSILON__ 1.92592994438723585305597794258492732e-34F128uart_txfull_read__SIZEOF_LONG_LONG__ 8__UINT8_TYPE__ unsigned char__SHRT_WIDTH__ 16DVISAMPLER_DELAY_DEC 0x20uart_isr__INT_LEAST64_TYPE__ long long intrx_consume__UINT32_TYPE__ long unsigned intuart_ev_enable_write__SIZEOF_POINTER__ 4__GENERATED_CSR_H uart_readCONFIG_SHADOW_BASE 2147483648CONFIG_CPU_TYPE "VEXRISCV"__WCHAR_MAX__ 0x7fffffff__FLT_DENORM_MIN__ 1.40129846432481707092372958328991613e-45F__INT_WIDTH__ 32__FLT128_DECIMAL_DIG__ 36__GCC_ATOMIC_POINTER_LOCK_FREE 2__UINT64_C(c) c ## ULL__DECIMAL_DIG__ 36DVISAMPLER_SLOT_EMPTY 0irq_getmaskCSR_TIMER0_UPDATE_VALUE_SIZE 1__riscv_float_abi_soft 1__USER_LABEL_PREFIX__ long unsigned int__GCC_ATOMIC_CHAR32_T_LOCK_FREE 2__STDC_VERSION__ 199901L__UINTMAX_MAX__ 0xffffffffffffffffULLINT32_C(v) vDVISAMPLER_DELAY_SLAVE_RST 0x08__STDC_HOSTED__ 1UART_RINGBUFFER_MASK_RX (UART_RINGBUFFER_SIZE_RX-1)__INTPTR_MAX__ 0x7fffffff__VERSION__ "9.2.0"__has_include(STR) __has_include__(STR)CSR_TIMER0_RELOAD_ADDR 0xf0001810LDVISAMPLER_DELAY_INC 0x10CSR_TIMER0_LOAD_ADDR 0xf0001800L__GCC_ATOMIC_LLONG_LOCK_FREE 1__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1__FLT_MAX_EXP__ 128CSR_UART_TXFULL_SIZE 1__ATOMIC_ACQ_REL 4__UINT_FAST64_TYPE__ long long unsigned intunsigned char__riscv_mul 1__FLT_MIN__ 1.17549435082228750796873653722224568e-38F__INTPTR_TYPE__ int__DEC_EVAL_METHOD__ 2__LDBL_DECIMAL_DIG__ 36__HW_COMMON_H CSR_IRQ_PENDING 0xFC0__INT_LEAST32_WIDTH__ 32__FLT32_HAS_QUIET_NAN__ 1__DEC128_MANT_DIG__ 34tx_produce_next__uint_c(v,suffix) __int_c_join(v ##U, suffix)__DEC32_MIN_EXP__ (-94)addrCSR_UART_EV_STATUS_SIZE 1__GCC_ATOMIC_SHORT_LOCK_FREE 1CLKGEN_STATUS_PROGDONE 0x2__OPTIMIZE_SIZE__ 1__PTRDIFF_WIDTH__ 32csrr(reg) ({ unsigned long __tmp; asm volatile ("csrr %0, " #reg : "=r"(__tmp)); __tmp; })__FLT_EPSILON__ 1.19209289550781250000000000000000000e-7F__FLT64_MIN_EXP__ (-1021)rx_produce_next__FLT_EVAL_METHOD_TS_18661_3__ 0__DBL_HAS_INFINITY__ 1CSR_TIMER0_EV_ENABLE_ADDR 0xf0001840L__INT_FAST32_TYPE__ intCSR_SUPERVISOR_FINISH_ADDR 0xf0002000Loldmask__SIZEOF_INT__ 4ETHMAC_EV_SRAM_WRITER 0x1__INTMAX_TYPE__ long long int__riscv 1__INTMAX_C(c) c ## LLDVISAMPLER_DELAY_MASTER_RST 0x02__UINT64_TYPE__ long long unsigned intCONFIG_CPU_VARIANT "LINUX"__FLT32X_HAS_QUIET_NAN__ 1__DBL_MAX_10_EXP__ 308short unsigned int__UART_H csrc(reg,bit) ({ if (__builtin_constant_p(bit) && (unsigned long)(bit) < 32) asm volatile ("csrrc x0, " #reg ", %0" :: "i"(bit)); else asm volatile ("csrrc x0, " #reg ", %0" :: "r"(bit)); })__SIZEOF_FLOAT__ 4CONFIG_CPU_RESET_ADDR 0__BIGGEST_ALIGNMENT__ 16__tmp__FLT128_DENORM_MIN__ 6.47517511943802511092443895822764655e-4966F128/home/tom/src/rust-litex/build/sim/software/libbaseDFII_CONTROL_SEL 0x01CSR_IRQ_MASK 0xBC0__GCC_ATOMIC_BOOL_LOCK_FREE 1__DEC128_MAX__ 9.999999999999999999999999999999999E6144DL__INT32_C(c) c ## L__FLT64X_DECIMAL_DIG__ 36__FLT32X_MAX_10_EXP__ 308__UINTPTR_MAX__ 0xffffffffU__DBL_HAS_DENORM__ 1CSR_UART_EV_STATUS_ADDR 0xf000100cL__FLT32_MAX_10_EXP__ 38csr_readlCONFIG_CPU_VARIANT_LINUX CSR_CTRL_RESET_ADDR 0xf0000000LCSR_CPU_TIMER_TIME_CMP_SIZE 8__FLT64_DENORM_MIN__ 4.94065645841246544176568792868221372e-324F64GNU C99 9.2.0 -march=rv32imac -mabi=ilp32 -mtune=rocket -g3 -Os -std=gnu99 -fomit-frame-pointer -fno-builtin -fexceptions__INT_LEAST32_MAX__ 0x7fffffffL__LDBL_MAX_10_EXP__ 4932__DEC64_MIN__ 1E-383DD__FLT32_MIN__ 1.17549435082228750796873653722224568e-38F32__DBL_EPSILON__ ((double)2.22044604925031308084726333618164062e-16L)__PRAGMA_REDEFINE_EXTNAME 1__SIG_ATOMIC_TYPE__ int__FLT128_HAS_DENORM__ 1__LDBL_HAS_DENORM__ 1CSR_CTRL_BASE 0xf0000000L__HW_FLAGS_H __DBL_DIG__ 15__DEC64_MANT_DIG__ 16__FLT_HAS_DENORM__ 1__INT_FAST64_WIDTH__ 64__DBL_DECIMAL_DIG__ 17GCC: (GNU) 9.2.0zR| ,@Th|A*riscv rv32i2p0_m2p0_a2p0_c2p0                      " " " " $ $ * * , 0 0 4 8 : > > B B F F F J J N P T T T T T X Z Z Z Z ` d # f . n r v v z                                                                        $ ( ( ( , , , , 0 4 4 8 < < < D D J J X X \ \ ` b b f j l l l l p r r r r r z z                                    9 C J  )+ Q* U0 YZ ]T a" e i mv q v { b  J l j ( \  Q3++B1+  )+r+ +!/+*++3+<v#+E +N+W+`d&+ib'+r+{ +$+.+  #+r          +C # +V3 ; CjK S [ cs{+ r .+,+    ( , , < D < D \ b $,l 4r <l Dp LT(\+e l s'+|  ;    6'+  e+N#.+v       ! (/ 6=DF KF RJ Y`Z hoZ w%~=n n Q i  f+o+(+!+0+O)+'+ F++ +(+1&+:+C+L2+U,+^-#+g n u |     , b l 0 4 < D \ ` p    , 0 Z >  " $ $T *X 1F 7J =v Df K R Y ` g n u " $ " T Z " T X J P T ` d f ` d f r    ' / 7, ?0 G4 O W _ gv/++|+'+!#%'A+ *+$+ +'+.)+5+<8 +C)+J+Q+X-+_O*+fQ +m+u!+}l+X+++K-+++.++&++0++}+0+ +0++ + C"+ k+ +% '+- (+5 += +E b+M /+U !+] D+e /!+m 4+u $+} + + R+ &+ 1+ m'+ b/+ P+ + d + ?'+ + + j!+ + + + .+ J + + n+% #+- k++5 ++= +E c*+M +U +] +e +m "+u U+} + + (+  + %+ + + + + '+ f(+ !+ R+ + "+ _-+ + + +/+ )+ +% +- +5 | += !+F +O +X "+a +j S+s r+| + + 8+ 7+ <+ J + + + 3+ 1+ Q,+ + o&+ L+ + C+ + + $+' |+0 +9 (+B +K +T +] d+f j+o 2+x g + _5+ + N+ D&+ &+ 5*+ t+ ?2+ + + Y+ 3.+ ++ (+ + + E+ +# -++, +5 y"+> +G ++P -+Y ((+b J5+k +t +} + %5+ :+ + + /+ w5+ + 2+ V4+ + [2+ T.+ + +b+ "++7+(3+1(+:,+CT+L+U-+^ +g4+p+y$+g++5+++2+&++4+8#+! + +g+j,+p+ 1 + .++$+-+6+?+H+QI +Z3+cB+l+u+~}++ +++9+w(+)+T+&+0+4++l ++z+d$+#+ L+)%2+2+;+Dg+Mi+V8+_+h +q/+zJ+R++ +++&+ 2+j+"+++d+1$++ +,+ |+3 ++%+.C+745+@c +I#+R4+[h+d+m6+v,++t+K$+1++ + +8)++&+++1++i+a)++-++!\+**+3+<(+E+N4+Wx+`h+i+r!/+{+++++$+ ++)+"+]++++1+;,++t-+ +%+/+&+/+8 +A +J0+S'+\M+e/+n2+w + +'+7 ++A+#+ +,+N+'"+)+f+,,+ ++4+2+%+"++ +4A+=+F+O!+X+a>+j!+s+|2++g+%++A++e ++p2+,+}+'+++]"+*+  +*++'3+0 +9+B)+K+T+]+f +o!+x#+k.+0+ +.++5++B +v1+$+ ++o++++Q!+"+#.+,+5+>0-+G(+P +Y+b +kA/+tG +})+*+'+(+ ++ <i!#%',-/& /D 9 Ln Wr> a uart.c.L0 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