Maxim Integrated Maxim max3263x ARMCM4 1.1 The MAX32630/1 device family is designed for wearable and portable medical and fitness applications. The devices contain an ARM Cortex-M4 processor with FPU, execute up to 96MHz and include a 10-bit ADC and a versatile set of on-chip peripherals. Copyright (C) 2017 Maxim Integrated Products, Inc., All Rights Reserved.\n \n Permission is hereby granted, free of charge, to any person obtaining a\n copy of this software and associated documentation files (the "Software"),\n to deal in the Software without restriction, including without limitation\n the rights to use, copy, modify, merge, publish, distribute, sublicense,\n and/or sell copies of the Software, and to permit persons to whom the\n Software is furnished to do so, subject to the following conditions:\n \n The above copyright notice and this permission notice shall be included\n in all copies or substantial portions of the Software.\n \n THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS\n OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF\n MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.\n IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES\n \n OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,\n ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR\n OTHER DEALINGS IN THE SOFTWARE.\n \n Except as contained in this notice, the name of Maxim Integrated\n Products, Inc. shall not be used except as stated in the Maxim Integrated\n Products, Inc. Branding Policy.\n \n The mere transfer of this software does not imply any licenses\n of trade secrets, proprietary technology, copyrights, patents,\n trademarks, maskwork rights, or any other form of intellectual\n property whatsoever. Maxim Integrated Products, Inc. retains all\n ownership rights. CM4 r1p0 little false true 3 false 8 32 32 read-write 0x00000000 0xFFFFFFFF CLKMAN 1.0 System Clock Manager System Clock Manager 0x40000400 32 read-write 0 0x0400 registers CLKMAN 0 Clock Management IRQ CLK_CONFIG System Clock Configuration 0x0000 read-write crypto_enable Cryptographic (TPU) Relaxation Oscillator Enable [0:0] read-write crypto_stability_count Crypto Oscillator Stability Select [7:4] read-write CLK_CTRL System Clock Controls 0x0004 read-write system_source_select System Clock Source Select [1:0] read-write usb_clock_enable USB Clock Enable [4:4] read-write usb_clock_select USB Clock Select [5:5] read-write crypto_clock_enable Crypto Clock Enable [8:8] read-write rtos_mode Enable RTOS Mode for SysTick Timers [12:12] read-write cpu_dynamic_clock Enable CPU Dynamic Clock Gating [13:13] read-write wdt0_clock_enable Watchdog 0 Clock Enable [16:16] read-write wdt0_clock_select Watchdog 0 Clock Source Select [18:17] read-write wdt1_clock_enable Watchdog 1 Clock Enable [20:20] read-write wdt1_clock_select Watchdog 1 Clock Source Select [22:21] read-write adc_clock_enable ADC Clock Enable [24:24] read-write INTFL Interrupt Flags 0x0008 read-write crypto_stable Crypto Oscillator Stable Interrupt Flag [0:0] read-write oneToClear sys_ro_stable System Oscillator Stable Interrupt Flag [1:1] read-write oneToClear INTEN Interrupt Enable/Disable Controls 0x000C read-write crypto_stable Crypto Oscillator Stable Interrupt Enable [0:0] read-write sys_ro_stable System Oscillator Stable Interrupt Enable [1:1] read-write TRIM_CALC Trim Calculation Controls 0x0010 read-write trim_clk_sel Trim Clock Select [0:0] read-write trim_calc_start Start Trim Calculation [1:1] read-write trim_calc_completed Trim Calculation Completed [2:2] read-only trim_enable Trim Logic Enable [3:3] read-write trim_calc_results Trim Calculation Results [25:16] read-only I2C_TIMER_CTRL I2C Timer Control 0x0014 read-write i2c_1ms_timer_en I2C 1ms Timer Enable [0:0] read-write CM4_START_CLK_EN0 CM4 Start Clock on Interrupt Enable 0 0x0018 read-write ints Interrupt Sources 0-31 [31:0] read-write CM4_START_CLK_EN1 CM4 Start Clock on Interrupt Enable 1 0x001C read-write ints Interrupt Sources 32-63 [31:0] read-write CM4_START_CLK_EN2 CM4 Start Clock on Interrupt Enable 2 0x0020 read-write ints Interrupt Sources 95-64 [31:0] read-write SYS_CLK_CTRL_0_CM4 Control Settings for CLK0 - Cortex M4 Clock 0x0040 read-write cm4_clk_scale Control Settings for CLK0 - Cortex M4 Clock [3:0] read-write SYS_CLK_CTRL_1_SYNC Control Settings for CLK1 - Synchronizer Clock 0x0044 read-write sync_clk_scale Control Settings for CLK1 - Synchronizer Clock [3:0] read-write SYS_CLK_CTRL_2_SPIX Control Settings for CLK2 - SPI XIP Clock 0x0048 read-write spix_clk_scale Control Settings for CLK2 - SPI XIP Clock [3:0] read-write SYS_CLK_CTRL_3_PRNG Control Settings for CLK3 - PRNG Clock 0x004C read-write prng_clk_scale Control Settings for CLK3 - PRNG Clock [3:0] read-write SYS_CLK_CTRL_4_WDT0 Control Settings for CLK4 - Watchdog Timer 0 0x0050 read-write watchdog0_clk_scale Control Settings for CLK4 - Watchdog Timer 0 [3:0] read-write SYS_CLK_CTRL_5_WDT1 Control Settings for CLK5 - Watchdog Timer 1 0x0054 read-write watchdog1_clk_scale Control Settings for CLK5 - Watchdog Timer 1 [3:0] read-write SYS_CLK_CTRL_6_GPIO Control Settings for CLK6 - Clock for GPIO Ports 0x0058 read-write gpio_clk_scale Control Settings for CLK6 - Clock for GPIO Ports [3:0] read-write SYS_CLK_CTRL_7_PT Control Settings for CLK7 - Source Clock for All Pulse Trains 0x005C read-write pulse_train_clk_scale Control Settings for CLK7 - Source Clock for All Pulse Trains [3:0] read-write SYS_CLK_CTRL_8_UART Control Settings for CLK8 - Source Clock for All UARTs 0x0060 read-write uart_clk_scale Control Settings for CLK8 - Source Clock for All UARTs [3:0] read-write SYS_CLK_CTRL_9_I2CM Control Settings for CLK9 - Source Clock for All I2C Masters 0x0064 read-write i2cm_clk_scale Control Settings for CLK9 - Source Clock for All I2C Masters [3:0] read-write SYS_CLK_CTRL_10_I2CS Control Settings for CLK10 - Source Clock for I2C Slave 0x0068 read-write i2cs_clk_scale Control Settings for CLK10 - Source Clock for I2C Slave [3:0] read-write SYS_CLK_CTRL_11_SPI0 Control Settings for CLK11 - SPI Master 0 0x006C read-write spi0_clk_scale Control Settings for CLK11 - SPI Master 0 [3:0] read-write SYS_CLK_CTRL_12_SPI1 Control Settings for CLK12 - SPI Master 1 0x0070 read-write spi1_clk_scale Control Settings for CLK12 - SPI Master 1 [3:0] read-write SYS_CLK_CTRL_13_SPI2 Control Settings for CLK13 - SPI Master 2 0x0074 read-write spi2_clk_scale Control Settings for CLK13 - SPI Master 2 [3:0] read-write SYS_CLK_CTRL_14_SPIB Control Settings for CLK14 - SPI Bridge Clock 0x0078 read-write spib_clk_scale Control Settings for CLK14 - SPI Bridge Clock [3:0] read-write SYS_CLK_CTRL_15_OWM Control Settings for CLK15 - 1-Wire Master Clock 0x007C read-write owm_clk_scale Control Settings for CLK15 - 1-Wire Master Clock [3:0] read-write SYS_CLK_CTRL_16_SPIS Control Settings for CLK16 - SPI Slave Clock 0x0080 read-write spis_clk_scale Control Settings for CLK16 - SPI Slave Clock [3:0] read-write CRYPT_CLK_CTRL_0_AES Control Settings for Crypto Clock 0 - AES 0x0100 read-write aes_clk_scale Control Settings for Crypto Clock 0 - AES [3:0] read-write CRYPT_CLK_CTRL_1_MAA Control Settings for Crypto Clock 1 - MAA 0x0104 read-write maa_clk_scale Control Settings for Crypto Clock 1 - MAA [3:0] read-write CRYPT_CLK_CTRL_2_PRNG Control Settings for Crypto Clock 2 - PRNG 0x0108 read-write prng_clk_scale Control Settings for Crypto Clock 2 - PRNG [3:0] read-write CLK_GATE_CTRL0 Dynamic Clock Gating Control Register 0 0x0140 read-write cm4_clk_gater Clock Gating Control for CM4 CPU [1:0] read-write ahb32_clk_gater Clock Gating Control for AHB32 [3:2] read-write icache_clk_gater Clock Gating Control for Instruction Cache [5:4] read-write flash_clk_gater Clock Gating Control for Flash Memory [7:6] read-write sram_clk_gater Clock Gating Control for SRAM [9:8] read-write apb_bridge_clk_gater Clock Gating Control for AHB-to-APB Bridge [11:10] read-write sysman_clk_gater Clock Gating Control for CLKMAN, PWRMAN, and IOMAN [13:12] read-write ptp_clk_gater Clock Gating Control for PTP Logic [15:14] read-write ssb_mux_clk_gater Clock Gating Control for SSB Mux [17:16] read-write pad_clk_gater Clock Gating Control for Pad Mode Filter [19:18] read-write spix_clk_gater Clock Gating Control for SPI XIP [21:20] read-write pmu_clk_gater Clock Gating Control for PMU [23:22] read-write usb_clk_gater Clock Gating Control for USB [25:24] read-write crc_clk_gater Clock Gating Control for CRC [27:26] read-write tpu_clk_gater Clock Gating Control for TPU [29:28] read-write watchdog0_clk_gater Clock Gating Control for Watchdog Timer 0 [31:30] read-write CLK_GATE_CTRL1 Dynamic Clock Gating Control Register 1 0x0144 read-write watchdog1_clk_gater Clock Gating Control for Watchdog Timer 1 [1:0] read-write gpio_clk_gater Clock Gating Control for GPIO Ports [3:2] read-write timer0_clk_gater Clock Gating Control for Timer/Counter Module 0 [5:4] read-write timer1_clk_gater Clock Gating Control for Timer/Counter Module 1 [7:6] read-write timer2_clk_gater Clock Gating Control for Timer/Counter Module 2 [9:8] read-write timer3_clk_gater Clock Gating Control for Timer/Counter Module 3 [11:10] read-write timer4_clk_gater Clock Gating Control for Timer/Counter Module 4 [13:12] read-write timer5_clk_gater Clock Gating Control for Timer/Counter Module 5 [15:14] read-write pulsetrain_clk_gater Clock Gating Control for Pulse Train Generators [17:16] read-write uart0_clk_gater Clock Gating Control for UART 0 [19:18] read-write uart1_clk_gater Clock Gating Control for UART 1 [21:20] read-write uart2_clk_gater Clock Gating Control for UART 2 [23:22] read-write uart3_clk_gater Clock Gating Control for UART 3 [25:24] read-write i2cm0_clk_gater Clock Gating Control for I2C Master 0 [27:26] read-write i2cm1_clk_gater Clock Gating Control for I2C Master 1 [29:28] read-write i2cm2_clk_gater Clock Gating Control for I2C Master 2 [31:30] read-write CLK_GATE_CTRL2 Dynamic Clock Gating Control Register 2 0x0148 read-write i2cs_clk_gater Clock Gating Control for I2C Slave [1:0] read-write spi0_clk_gater Clock Gating Control for SPI Master 0 [3:2] read-write spi1_clk_gater Clock Gating Control for SPI Master 1 [5:4] read-write spi2_clk_gater Clock Gating Control for SPI Master 2 [7:6] read-write spi_bridge_clk_gater Clock Gating Control for SPI Bridge [9:8] read-write owm_clk_gater Clock Gating Control for 1-Wire Master (OWM) [11:10] read-write adc_clk_gater Clock Gating Control for ADC [13:12] read-write spis_clk_gater Clock Gating Control for SPI Slave [15:14] read-write PWRMAN 1.0 System Power Manager Power Manager 0x40000800 32 read-write 0 0x0200 registers PowerManager 1 Power Manager IRQ PWR_RST_CTRL Power Reset Control and Status 0x0000 read-write afe_powered AFE Powered [2:2] read-write io_active I/O Active [3:3] read-write usb_powered USB Powered [4:4] read-write pullups_enabled Static Pullups Enabled [5:5] read-write firmware_reset Firmware Initiated Reset [8:8] read-write arm_lockup_reset ARM Lockup Reset [9:9] read-write tamper_detect Reset Caused By - Tamper Detect [16:16] read-only fw_command_sysman Reset Caused By - Firmware Commanded Reset (SysMan) [17:17] read-only watchdog_timeout Reset Caused By - Watchdog Timeout [18:18] read-only fw_command_arm Reset Caused By - Firmware Commanded Reset (ARM Core) [19:19] read-only arm_lockup Reset Caused By - ARM Lockup [20:20] read-only srstn_assertion Reset Caused By - External System Reset [21:21] read-only por Reset Caused By - Power On Reset (POR) [22:22] read-only low_power_mode Power Manager Dynamic Clock Gating Enable [31:31] read-write INTFL Interrupt Flags 0x0004 read-write v1_2_warning 1.2V Warning Monitor Int Flag [0:0] read-write oneToClear v1_8_warning 1.8V Warning Monitor Int Flag [1:1] read-write oneToClear rtc_warning RTC Warning Monitor Int Flag [2:2] read-write oneToClear vdda_warning VDDA Warning Monitor Int Flag [3:3] read-write oneToClear vddb_warning VDDB Warning Monitor Int Flag [4:4] read-write oneToClear INTEN Interrupt Enable/Disable Controls 0x0008 read-write v1_2_warning 1.2V Warning Monitor Int Enable [0:0] read-write v1_8_warning 1.8V Warning Monitor Int Enable [1:1] read-write rtc_warning RTC Warning Monitor Int Enable [2:2] read-write vdda_warning VDDA Warning Monitor Int Enable [3:3] read-write vddb_warning VDDB Warning Monitor Int Enable [4:4] read-write SVM_EVENTS SVM Event Status Flags (read-only) 0x000C read-write v1_2_warning 1.2V Warning Monitor Event Input [0:0] read-only v1_8_warning 1.8V Warning Monitor Event Input [1:1] read-only rtc_warning RTC Warning Monitor Event Input [2:2] read-only vdda_warning VDDA Warning Monitor Event Input [3:3] read-only vddb_warning VDDB Warning Monitor Event Input [4:4] read-only WUD_CTRL Wake-Up Detect Control 0x0010 read-write pad_select Wake-Up Pad Select [5:0] read-write pad_mode Wake-Up Pad Signal Mode [9:8] read-write clear_all Clear All WUD Pad States [12:12] read-write ctrl_enable Enable WUD Control Modification [16:16] read-write WUD_PULSE0 WUD Pulse To Mode Bit 0 0x0014 read-write WUD_PULSE1 WUD Pulse To Mode Bit 1 0x0018 read-write WUD_SEEN0 Wake-up Detect Status for P0/P1/P2/P3 0x001C read-write gpio0 Wake-Up Detect Status for P0.0 [0:0] read-only gpio1 Wake-Up Detect Status for P0.1 [1:1] read-only gpio2 Wake-Up Detect Status for P0.2 [2:2] read-only gpio3 Wake-Up Detect Status for P0.3 [3:3] read-only gpio4 Wake-Up Detect Status for P0.4 [4:4] read-only gpio5 Wake-Up Detect Status for P0.5 [5:5] read-only gpio6 Wake-Up Detect Status for P0.6 [6:6] read-only gpio7 Wake-Up Detect Status for P0.7 [7:7] read-only gpio8 Wake-Up Detect Status for P1.0 [8:8] read-only gpio9 Wake-Up Detect Status for P1.1 [9:9] read-only gpio10 Wake-Up Detect Status for P1.2 [10:10] read-only gpio11 Wake-Up Detect Status for P1.3 [11:11] read-only gpio12 Wake-Up Detect Status for P1.4 [12:12] read-only gpio13 Wake-Up Detect Status for P1.5 [13:13] read-only gpio14 Wake-Up Detect Status for P1.6 [14:14] read-only gpio15 Wake-Up Detect Status for P1.7 [15:15] read-only gpio16 Wake-Up Detect Status for P2.0 [16:16] read-only gpio17 Wake-Up Detect Status for P2.1 [17:17] read-only gpio18 Wake-Up Detect Status for P2.2 [18:18] read-only gpio19 Wake-Up Detect Status for P2.3 [19:19] read-only gpio20 Wake-Up Detect Status for P2.4 [20:20] read-only gpio21 Wake-Up Detect Status for P2.5 [21:21] read-only gpio22 Wake-Up Detect Status for P2.6 [22:22] read-only gpio23 Wake-Up Detect Status for P2.7 [23:23] read-only gpio24 Wake-Up Detect Status for P3.0 [24:24] read-only gpio25 Wake-Up Detect Status for P3.1 [25:25] read-only gpio26 Wake-Up Detect Status for P3.2 [26:26] read-only gpio27 Wake-Up Detect Status for P3.3 [27:27] read-only gpio28 Wake-Up Detect Status for P3.4 [28:28] read-only gpio29 Wake-Up Detect Status for P3.5 [29:29] read-only gpio30 Wake-Up Detect Status for P3.6 [30:30] read-only gpio31 Wake-Up Detect Status for P3.7 [31:31] read-only WUD_SEEN1 Wake-up Detect Status for P4/P5/P6/P7 0x0020 read-write gpio32 Wake-Up Detect Status for P4.0 [0:0] read-only gpio33 Wake-Up Detect Status for P4.1 [1:1] read-only gpio34 Wake-Up Detect Status for P4.2 [2:2] read-only gpio35 Wake-Up Detect Status for P4.3 [3:3] read-only gpio36 Wake-Up Detect Status for P4.4 [4:4] read-only gpio37 Wake-Up Detect Status for P4.5 [5:5] read-only gpio38 Wake-Up Detect Status for P4.6 [6:6] read-only gpio39 Wake-Up Detect Status for P4.7 [7:7] read-only gpio40 Wake-Up Detect Status for P5.0 [8:8] read-only gpio41 Wake-Up Detect Status for P5.1 [9:9] read-only gpio42 Wake-Up Detect Status for P5.2 [10:10] read-only gpio43 Wake-Up Detect Status for P5.3 [11:11] read-only gpio44 Wake-Up Detect Status for P5.4 [12:12] read-only gpio45 Wake-Up Detect Status for P5.5 [13:13] read-only gpio46 Wake-Up Detect Status for P5.6 [14:14] read-only gpio47 Wake-Up Detect Status for P5.7 [15:15] read-only gpio48 Wake-Up Detect Status for P6.0 [16:16] read-only MARGIN_CTRL SRAM Margin Adjustment 0x0034 read-write extra_margin Extra Margin Adjustment [2:0] read-write extra_write_margin Extra Write Margin Adjustment [4:3] read-write write_assist_en Write Assist Enable [5:5] read-write write_assist_margin Write Assist Margin Adjustment [7:6] read-write DIE_TYPE Die Type ID Register 0x0038 read-write BASE_PART_NUM Base Part Number 0x003C read-write base_part_number Base Part Number [15:0] read-only MASK_ID0 Mask ID Register 0 0x0040 read-write revision_id Revision ID [3:0] read-only mask_id Mask ID[27:0] [31:4] read-only MASK_ID1 Mask ID Register 1 0x0044 read-write mask_id Mask ID[58:28] [30:0] read-only mask_id_enable Enable Mask ID [31:31] read-write PERIPHERAL_RESET Peripheral Reset Control Register 0x0048 read-write ssb Reset SSB [0:0] read-write spix Reset SPI XIP [1:1] read-write pmu Reset PMU [2:2] read-write usb Reset USB [3:3] read-write crc Reset CRC [4:4] read-write tpu Reset TPU [5:5] read-write watchdog0 Reset Watchdog Timer 0 [6:6] read-write gpio Reset GPIO [7:7] read-write timer0 Reset Timer/Counter Module 0 [8:8] read-write timer1 Reset Timer/Counter Module 1 [9:9] read-write timer2 Reset Timer/Counter Module 2 [10:10] read-write timer3 Reset Timer/Counter Module 3 [11:11] read-write timer4 Reset Timer/Counter Module 4 [12:12] read-write timer5 Reset Timer/Counter Module 5 [13:13] read-write pulse_train Reset All Pulse Trains [14:14] read-write uart0 Reset UART 0 [15:15] read-write uart1 Reset UART 1 [16:16] read-write uart2 Reset UART 2 [17:17] read-write uart3 Reset UART 3 [18:18] read-write i2cm0 Reset I2C Master 0 [19:19] read-write i2cm1 Reset I2C Master 1 [20:20] read-write i2cm2 Reset I2C Master 2 [21:21] read-write i2cs Reset I2C Slave [22:22] read-write spim0 Reset SPI Master 0 [23:23] read-write spim1 Reset SPI Master 1 [24:24] read-write spim2 Reset SPI Master 2 [25:25] read-write spib Reset SPI Bridge [26:26] read-write owm Reset 1-Wire Master [27:27] read-write adc Reset ADC [28:28] read-write RTCTMR Real Time Clock Real-Time Clock 0x40000A00 32 read-write 0 0x0030 registers RTC_COMP0 3 RTC Compare 0 IRQ RTC_COMP1 4 RTC Compare 1 IRQ RTC_PRESCALE_COMP 5 RTC Prescale Compare IRQ RTC_OVERFLOW 6 RTC Overflow IRQ CTRL RTC Timer Control 0x0000 read-write enable RTC Timer Enable [0:0] read-write clear RTC Timer Clear Bit [1:1] write-only pending RTC Transaction Pending [2:2] read-only use_async_flags Use Async RTC Flags [3:3] read-write aggressive_rst Use Aggressive Reset Mode [4:4] read-write en_active Enable RTC in Active Modes [16:16] read-only osc_goto_low_active osc_goto_low_r transaction is pending [17:17] read-only osc_frce_sm_en_active osc_force_mode transaction is pending [18:18] read-only osc_frce_st_active osc_force_state transaction is pending [19:19] read-only set_active timer_set_active [20:20] read-only clr_active RTC clear is pending [21:21] read-only rollover_clr_active rollover clr is pending [22:22] read-only prescale_cmpr0_active prescale cmpr0 is pending [23:23] read-only prescale_update_active prescale update transaction is pending [24:24] read-only cmpr1_clr_active cmpr1 clear transaction is pending [25:25] read-only cmpr0_clr_active cmpr0 clear transaction is pending [26:26] read-only TIMER RTC Timer Count Value 0x0004 read-write COMP0 RTC Time of Day Alarm 0 Compare Register 0x0008 read-write COMP1 RTC Time of Day Alarm 1 Compare Register 0x000C read-write FLAGS CPU Interrupt and RTC Domain Flags 0x0010 read-write comp0 RTC Compare 0 Interrupt Status [0:0] read-write oneToClear comp1 RTC Compare 1 Interrupt Status [1:1] read-write oneToClear prescale_comp RTC Prescale Compare Int Status [2:2] read-write oneToClear overflow RTC Overflow Interrupt Status [3:3] read-write oneToClear trim RTC Trim Interrupt Status [4:4] read-write oneToClear comp0_flag_a RTC Compare 0 4kHz Flag [8:8] read-only comp1_flag_a RTC Compare 1 4kHz Flag [9:9] read-only prescl_flag_a RTC Prescale Compare 4kHz Flag [10:10] read-only overflow_flag_a RTC Overflow 4kHz Flag [11:11] read-only trim_flag_a RTC Trim Event 4kHz Flag [12:12] read-only async_clr_flags Asynchronous RTC Flag Clear [31:31] write-only SNZ_VALUE RTC Timer Alarm Snooze Value 0x0014 read-write INTEN Interrupt Enable Controls 0x0018 read-write comp0 RTC Time of Day Alarm (Compare 0) Interrupt Enable [0:0] read-write comp1 RTC Time of Day Alarm (Compare 1) Interrupt Enable [1:1] read-write prescale_comp RTC Prescale Compare Int Enable [2:2] read-write overflow RTC Overflow Interrupt Enable [3:3] read-write trim RTC Trim Adjust Event Interrupt Enable [4:4] read-write PRESCALE RTC Timer Prescale Setting 0x001C read-write width_selection RTC Timer Prescale Setting [3:0] read-write PRESCALE_MASK RTC Timer Prescale Compare Mask 0x0024 read-write comp_mask RTC Timer Prescale Compare Mask [3:0] read-write TRIM_CTRL RTC Timer Trim Controls 0x0028 read-write trim_enable_r Enable RTL Trim of RTC Timer [0:0] read-write trim_faster_ovr_r Force RTC Trim to Faster [1:1] read-write trim_slower_r RTC Trim Direction Status [2:2] read-only TRIM_VALUE RTC Timer Trim Adjustment Interval 0x002C read-write trim_value Trim PPM Value [17:0] read-write trim_control Trim Direction [18:18] read-write RTCCFG RTC Configuration Register Real-Time Clock 0x40000A70 32 read-write 0 0x0090 registers NANO_CNTR Nano Oscillator Counter Read Register 0x0000 read-write nanoring_counter Nano Oscillator Counter [15:0] read-only CLK_CTRL RTC Clock Control Settings 0x0004 nano_en Enable nanoring oscillator output [2:2] read-write OSC_CTRL RTC Oscillator Control 0x000C read-write osc_bypass Bypass RTC oscillator [0:0] read-write osc_disable_r if osc_disable_sel = 1, this will hold the RTC in reset. [1:1] read-write osc_disable_sel Select RTC Oscillator Disable Control Source PwrSeq_Control PowerSequencer controls the reset state of the RTC 0 RTC_Domain_Control RTC reset controlled by osc_disable_r bit 1 [2:2] read-write osc_disable_o Reset RTC Oscillator [3:3] read-only PWRSEQ Power Sequencer Power Manager 0x40000A30 32 read-write 0 0x0040 registers REG0 Power Sequencer Control Register 0 0x0000 read-write pwr_lp1 Shutdown Power Mode Select [0:0] read-write pwr_first_boot Wake on First Boot [1:1] read-write pwr_sys_reboot Firmware System Reboot Request [2:2] write-only pwr_flashen_run Enable Flash Operation during Run Mode [3:3] read-write pwr_flashen_slp Enable Flash Operation during Sleep Mode [4:4] read-write pwr_retregen_run Enable Retention Regulator Operation during Run Mode [5:5] read-write pwr_retregen_slp Enable Retention Regulator Operation during Sleep Mode [6:6] read-write pwr_roen_run Enable 96MHz System Relaxation Oscillator in Run Mode [7:7] read-write pwr_roen_slp Enable 96MHz System Relaxation Oscillator in Sleep Mode [8:8] read-write pwr_nren_run Enable Nano Oscillator in Run Mode [9:9] read-write pwr_nren_slp Enable Nano Oscillator in Sleep Mode [10:10] read-write pwr_rtcen_run Enable Real Time Clock Operation during Run Mode [11:11] read-write pwr_rtcen_slp Enable Real Time Clock Operation during Sleep Mode [12:12] read-write pwr_svm12en_run Enable VDD12_SW SVM operation during Run Mode [13:13] read-write pwr_svm18en_run Enable VDD18_SW SVM operation during Run Mode [15:15] read-write pwr_svmrtcen_run Enable VRTC SVM operation during Run Mode [17:17] read-write pwr_svm_vddb_run Enable VDDB SVM operation during Run Mode [19:19] read-write pwr_svmtvdd12en_run Enable TVDD12 SVM operation during Run Mode [21:21] read-write pwr_vdd12_swen_run Enable VDD12 switching during Run Mode [23:23] read-write pwr_vdd12_swen_slp Enable VDD12 switching during Sleep Mode [24:24] read-write pwr_vdd18_swen_run Enable VDD18 switching during Run Mode [25:25] read-write pwr_vdd18_swen_slp Enable VDD18 switching during Sleep Mode [26:26] read-write pwr_tvdd12_swen_run Enable TVDD12 switching during Run Mode [27:27] read-write pwr_tvdd12_swen_slp Enable TVDD12 switching during Sleep Mode [28:28] read-write REG1 Power Sequencer Control Register 1 0x0004 read-write pwr_clr_io_event_latch Clear all GPIO Event Seen Latches [0:0] read-write pwr_clr_io_cfg_latch Clear all GPIO Configuration Latches [1:1] read-write pwr_mbus_gate Freeze GPIO MBus State [2:2] read-write pwr_discharge_en Enable Flash Discharge During Powerfail Event [3:3] read-write pwr_tvdd12_well TVDD12 Well Switch [4:4] read-write REG2 Power Sequencer Control Register 2 0x0008 read-write pwr_vdd12_hyst VDD12_SW Comparator Hysteresis Setting [1:0] read-write pwr_vdd18_hyst VDD18_SW Comparator Hysteresis Setting [3:2] read-write pwr_vrtc_hyst VRTC Comparator Hysteresis Setting [5:4] read-write pwr_vddb_hyst VDDB Comparator Hysteresis Setting [7:6] read-write pwr_tvdd12_hyst TVDD12 Comparator Hysteresis Setting [9:8] read-write REG3 Power Sequencer Control Register 3 0x000C read-write pwr_rosel Relaxation Oscillator Stable Timeout [2:0] read-write pwr_fltrrosel Window of time power must be valid before entering Run mode. [5:3] read-write pwr_svm_clk_mux SVM Clock Mux [7:6] read-write pwr_ro_clk_mux Relaxation Clock Mux [9:8] read-write pwr_failsel Timeout before rebooting during PowerFail/BootFail events. [12:10] read-write REG4 Power Sequencer Control Register 4 (Internal Test Only) 0x0010 read-write pwr_tm_ps_2_gpio Internal Use Only [0:0] read-write pwr_tm_fast_timers Internal Use Only [1:1] read-write pwr_usb_dis_comp Internal Use Only [3:3] read-write pwr_ro_tstclk_en Internal Use Only [4:4] read-write pwr_nr_clk_gate_en Internal Use Only [5:5] read-write pwr_ext_clk_in_en Internal Use Only [6:6] read-write pwr_pseq_32k_en Internal Use Only [7:7] read-write REG5 Power Sequencer Control Register 5 (Trim 0) 0x0014 read-write pwr_trim_svm_bg Power Manager Bandgap trim setting [8:0] read-write pwr_trim_bias Power Manager Bias Current trim setting [14:9] read-write pwr_trim_retreg Retention Regulator trim setting [20:15] read-write pwr_rtc_trim Real Time Clock trim setting [24:21] read-write REG6 Power Sequencer Control Register 6 (Trim 1) 0x0018 read-write pwr_trim_usb_bias USB Bias Current trim setting [2:0] read-write pwr_trim_usb_pm_res USB Data Plus Slew Rate trim setting [6:3] read-write pwr_trim_usb_dm_res USB Data Minus Slew Rate trim setting [10:7] read-write pwr_trim_osc_vref Relaxation Oscillator trim setting [19:11] read-write pwr_trim_crypto_osc Crypto Oscillator trim setting [28:20] read-write REG7 Power Sequencer Control Register 7 0x001C read-write pwr_flash_pd_lookahead Flash Powerdown Lookahead Flag [0:0] read-only FLAGS Power Sequencer Flags 0x0020 read-write pwr_first_boot Initial Boot event detected flag [0:0] read-only pwr_sys_reboot Firmware Reset event detected flag [1:1] read-only pwr_power_fail Power Fail event detected flag [2:2] read-write oneToClear pwr_boot_fail Boot Fail event detected flag [3:3] read-write oneToClear pwr_flash_discharge Flash Discharged During Powerfail event detected flag [4:4] read-write oneToClear pwr_iowakeup GPIO Wakeup event detected flag [5:5] read-write oneToClear pwr_vdd12_rst_bad VDD12_SW Comparator Tripped event detected flag [6:6] read-write oneToClear pwr_vdd18_rst_bad VDD18_SW Comparator Tripped event detected flag [7:7] read-write oneToClear pwr_vrtc_rst_bad VRTC Comparator Tripped event detected flag [8:8] read-write oneToClear pwr_vddb_rst_bad VDDB Comparator Tripped event detected flag [9:9] read-write oneToClear pwr_tvdd12_rst_bad TVDD12 Comparator Tripped event detected flag [10:10] read-write oneToClear pwr_por18z_fail_latch POR18 and POR18_bg have been tripped [11:11] read-write oneToClear rtc_cmpr0 RTC Comparator 0 Match event detected flag [12:12] read-only rtc_cmpr1 RTC Comparator 1 Match event detected flag [13:13] read-only rtc_prescale_cmp RTC Prescale Comparator Match event detected flag [14:14] read-only rtc_rollover RTC Rollover event detected flag [15:15] read-only pwr_usb_plug_wakeup USB Power Connect Wakeup event detected flag [16:16] read-write oneToClear pwr_usb_remove_wakeup USB Power Remove Wakeup event detected flag [17:17] read-write oneToClear pwr_tvdd12_bad Retention Regulator POR Tripped event detected flag [18:18] read-write oneToClear MSK_FLAGS Power Sequencer Flags Mask Register 0x0024 read-write pwr_sys_reboot Mask for system reboot detect [1:1] read-write pwr_power_fail Mask for previous power fail detect [2:2] read-write pwr_boot_fail Mask for previous boot fail detect [3:3] read-write pwr_flash_discharge Mask for flash discharge event [4:4] read-write pwr_iowakeup Mask for GPIO wakeup event detect [5:5] read-write pwr_vdd12_rst_bad Mask for VDD12 rst event [6:6] read-write pwr_vdd18_rst_bad Mask for VDD18 rst event [7:7] read-write pwr_vrtc_rst_bad Mask for VRTC rst event [8:8] read-write pwr_vddb_rst_bad Mask for VDDB rst event [9:9] read-write pwr_tvdd12_rst_bad Mask for TVDD12 rst event [10:10] read-write pwr_por18z_fail_latch Mask for POR18 powerfail event [11:11] read-write rtc_cmpr0 Mask for RTC compare 0 event [12:12] read-write rtc_cmpr1 Mask for RTC compare 1 event [13:13] read-write rtc_prescale_cmp Mask for RTC prescale compare event [14:14] read-write rtc_rollover Mask for RTC rollover event [15:15] read-write pwr_usb_plug_wakeup Mask for USB plug connect event [16:16] read-write pwr_usb_remove_wakeup Mask for USB plug disconnect event [17:17] read-write pwr_tvdd12_bad Mask for TVDD12 power fail event [18:18] read-write IOMAN System I/O Manager IO 0x40000C00 32 read-write 0 0x0400 registers WUD_REQ0 Wakeup Detect Mode Request Register 0 (P0/P1/P2/P3) 0x0000 read-write wud_req_p0 Wakeup Detect Request Mode: P0[7:0] [7:0] read-write wud_req_p1 Wakeup Detect Request Mode: P1[7:0] [15:8] read-write wud_req_p2 Wakeup Detect Request Mode: P2[7:0] [23:16] read-write wud_req_p3 Wakeup Detect Request Mode: P3[7:0] [31:24] read-write WUD_REQ1 Wakeup Detect Mode Request Register 1 (P4/P5/P6) 0x0004 read-write wud_req_p4 Wakeup Detect Request Mode: P4[7:0] [7:0] read-write wud_req_p5 Wakeup Detect Request Mode: P5[7:0] [15:8] read-write wud_req_p6 Wakeup Detect Request Mode: P6[0] [16:16] read-write WUD_ACK0 Wakeup Detect Mode Acknowledge Register 0 (P0/P1/P2/P3) 0x0008 read-write wud_ack_p0 WUD Mode Acknowledge: P0[7:0] [7:0] read-only wud_ack_p1 WUD Mode Acknowledge: P1[7:0] [15:8] read-only wud_ack_p2 WUD Mode Acknowledge: P2[7:0] [23:16] read-only wud_ack_p3 WUD Mode Acknowledge: P3[7:0] [31:24] read-only WUD_ACK1 Wakeup Detect Mode Acknowledge Register 1 (P4/P5/P6) 0x000C read-write wud_ack_p4 WUD Mode Acknowledge: P4[7:0] [7:0] read-only wud_ack_p5 WUD Mode Acknowledge: P5[7:0] [15:8] read-only wud_ack_p6 WUD Mode Acknowledge: P6[7:0] [16:16] read-only ALI_REQ0 Analog Input Request Register 0 (P0/P1/P2/P3) 0x0010 read-write ali_req_p0 Analog Input Mode Request: P0[7:0] [7:0] read-write ali_req_p1 Analog Input Mode Request: P1[7:0] [15:8] read-write ali_req_p2 Analog Input Mode Request: P2[7:0] [23:16] read-write ali_req_p3 Analog Input Mode Request: P3[7:0] [31:24] read-write ALI_REQ1 Analog Input Request Register 1 (P4/P5/P6) 0x0014 read-write ali_req_p4 Analog Input Mode Request: P4[7:0] [7:0] read-write ali_req_p5 Analog Input Mode Request: P5[7:0] [15:8] read-write ali_req_p6 Analog Input Mode Request: P6[0] [16:16] read-write ALI_ACK0 Analog Input Acknowledge Register 0 (P0/P1/P2/P3) 0x0018 read-write ali_ack_p0 Analog In Mode Acknowledge: P0[7:0] [7:0] read-only ali_ack_p1 Analog In Mode Acknowledge: P1[7:0] [15:8] read-only ali_ack_p2 Analog In Mode Acknowledge: P2[7:0] [23:16] read-only ali_ack_p3 Analog In Mode Acknowledge: P3[7:0] [31:24] read-only ALI_ACK1 Analog Input Acknowledge Register 1 (P4/P5/P6) 0x001C read-write ali_ack_p4 Analog In Mode Acknowledge: P4[7:0] [7:0] read-only ali_ack_p5 Analog In Mode Acknowledge: P5[7:0] [15:8] read-only ali_ack_p6 Analog In Mode Acknowledge: P6[0] [16:16] read-only ALI_CONNECT0 Analog I/O Connection Control Register 0 0x0020 read-write ALI_CONNECT1 Analog I/O Connection Control Register 1 0x0024 read-write SPIX_REQ SPIX I/O Mode Request 0x0028 read-write core_io_req SPIX Core I/O Request [4:4] read-write ss0_io_req SPIX SS[0] I/O Request [8:8] read-write ss1_io_req SPIX SS[1] I/O Request [9:9] read-write ss2_io_req SPIX SS[2] I/O Request [10:10] read-write quad_io_req SPIX Quad I/O Request [12:12] read-write fast_mode SPIX Fast Mode Request [16:16] read-write SPIX_ACK SPIX I/O Mode Acknowledge 0x002C read-write core_io_ack SPIX Core I/O Acknowledge [4:4] read-only ss0_io_ack SPIX SS[0] I/O Acknowledge [8:8] read-only ss1_io_ack SPIX SS[1] I/O Acknowledge [9:9] read-only ss2_io_ack SPIX SS[2] I/O Acknowledge [10:10] read-only quad_io_ack SPIX Quad I/O Acknowledge [12:12] read-only fast_mode SPIX Fast Mode Acknowledge [16:16] read-only UART0_REQ UART0 I/O Mode Request 0x0030 read-write io_map UART0 TX/RX I/O Mapping Select [0:0] read-write cts_map UART0 CTS I/O Mapping Select [1:1] read-write rts_map UART0 RTS I/O Mapping Select [2:2] read-write io_req UART0 TX/RX I/O Request [4:4] read-write cts_io_req UART0 CTS I/O Request [5:5] read-write rts_io_req UART0 RTS I/O Request [6:6] read-write UART0_ACK UART0 I/O Mode Acknowledge 0x0034 read-write io_map UART0 TX/RX I/O Mapping Acknowledge [0:0] read-only cts_map UART0 CTS I/O Mapping Acknowledge [1:1] read-only rts_map UART0 RTS I/O Mapping Acknowledge [2:2] read-only io_req UART0 TX/RX I/O Acknowledge [4:4] read-only cts_io_req UART0 CTS I/O Acknowledge [5:5] read-only rts_io_req UART0 RTS I/O Acknowledge [6:6] read-only UART1_REQ UART1 I/O Mode Request 0x0038 read-write io_map UART1 TX/RX I/O Mapping Select [0:0] read-write cts_map UART1 CTS I/O Mapping Select [1:1] read-write rts_map UART1 RTS I/O Mapping Select [2:2] read-write io_req UART1 TX/RX I/O Request [4:4] read-write cts_io_req UART1 CTS I/O Request [5:5] read-write rts_io_req UART1 RTS I/O Request [6:6] read-write UART1_ACK UART1 I/O Mode Acknowledge 0x003C read-write io_map UART1 TX/RX I/O Mapping Acknowledge [0:0] read-only cts_map UART1 CTS I/O Mapping Acknowledge [1:1] read-only rts_map UART1 RTS I/O Mapping Acknowledge [2:2] read-only io_req UART1 TX/RX I/O Acknowledge [4:4] read-only cts_io_req UART1 CTS I/O Acknowledge [5:5] read-only rts_io_req UART1 RTS I/O Acknowledge [6:6] read-only UART2_REQ UART2 I/O Mode Request 0x0040 read-write io_map UART2 TX/RX I/O Mapping Select [0:0] read-write cts_map UART2 CTS I/O Mapping Select [1:1] read-write rts_map UART2 RTS I/O Mapping Select [2:2] read-write io_req UART2 TX/RX I/O Request [4:4] read-write cts_io_req UART2 CTS I/O Request [5:5] read-write rts_io_req UART2 RTS I/O Request [6:6] read-write UART2_ACK UART2 I/O Mode Acknowledge 0x0044 read-write io_map UART2 TX/RX I/O Mapping Acknowledge [0:0] read-only cts_map UART2 CTS I/O Mapping Acknowledge [1:1] read-only rts_map UART2 RTS I/O Mapping Acknowledge [2:2] read-only io_req UART2 TX/RX I/O Acknowledge [4:4] read-only cts_io_req UART2 CTS I/O Acknowledge [5:5] read-only rts_io_req UART2 RTS I/O Acknowledge [6:6] read-only UART3_REQ UART3 I/O Mode Request 0x0048 read-write io_map UART3 TX/RX I/O Mapping Select [0:0] read-write cts_map UART3 CTS I/O Mapping Select [1:1] read-write rts_map UART3 RTS I/O Mapping Select [2:2] read-write io_req UART3 TX/RX I/O Request [4:4] read-write cts_io_req UART3 CTS I/O Request [5:5] read-write rts_io_req UART3 RTS I/O Request [6:6] read-write UART3_ACK UART3 I/O Mode Acknowledge 0x004C read-write io_map UART3 TX/RX I/O Mapping Acknowledge [0:0] read-only cts_map UART3 CTS I/O Mapping Acknowledge [1:1] read-only rts_map UART3 RTS I/O Mapping Acknowledge [2:2] read-only io_req UART3 TX/RX I/O Acknowledge [4:4] read-only cts_io_req UART3 CTS I/O Acknowledge [5:5] read-only rts_io_req UART3 RTS I/O Acknowledge [6:6] read-only I2CM0_REQ I2C Master 0 I/O Request 0x0050 read-write mapping_req I2C Master 0 I/O Request [4:4] read-write I2CM0_ACK I2C Master 0 I/O Acknowledge 0x0054 read-write mapping_ack I2C Master 0 I/O Acknowledge [4:4] read-only I2CM1_REQ I2C Master 1 I/O Request 0x0058 read-write mapping_req I2C Master 1 I/O Request [4:4] read-write I2CM1_ACK I2C Master 1 I/O Acknowledge 0x005C read-write mapping_ack I2C Master 1 I/O Acknowledge [4:4] read-only I2CM2_REQ I2C Master 2 I/O Request 0x0060 read-write mapping_req I2C Master 2 I/O Request [4:4] read-write I2CM2_ACK I2C Master 2 I/O Acknowledge 0x0064 read-write mapping_ack I2C Master 2 I/O Acknowledge [4:4] read-only I2CS_REQ I2C Slave I/O Request 0x0068 read-write io_sel I2C Slave I/O Mapping Select [1:0] read-write mapping_req I2C Slave I/O Request [4:4] read-write I2CS_ACK I2C Slave I/O Acknowledge 0x006C read-write io_sel I2C Slave I/O Mapping Acknowledge [1:0] read-only mapping_ack I2C Slave I/O Acknowledge [4:4] read-only SPI0_REQ SPI Master 0 I/O Mode Request 0x0070 read-write core_io_req SPI Master 0 Core I/O Request [4:4] read-write ss0_io_req SPI Master 0 SS[0] I/O Request [8:8] read-write ss1_io_req SPI Master 0 SS[1] I/O Request [9:9] read-write ss2_io_req SPI Master 0 SS[2] I/O Request [10:10] read-write ss3_io_req SPI Master 0 SS[3] I/O Request [11:11] read-write ss4_io_req SPI Master 0 SS[4] I/O Request [12:12] read-write quad_io_req SPI Master 0 Quad I/O Request [20:20] read-write fast_mode SPI Master 0 Fast Mode Request [24:24] read-write SPI0_ACK SPI Master 0 I/O Mode Acknowledge 0x0074 read-write core_io_ack SPI Master 0 Core I/O Acknowledge [4:4] read-only ss0_io_ack SPI Master 0 SS[0] I/O Acknowledge [8:8] read-only ss1_io_ack SPI Master 0 SS[1] I/O Acknowledge [9:9] read-only ss2_io_ack SPI Master 0 SS[2] I/O Acknowledge [10:10] read-only ss3_io_ack SPI Master 0 SS[3] I/O Acknowledge [11:11] read-only ss4_io_ack SPI Master 0 SS[4] I/O Acknowledge [12:12] read-only quad_io_ack SPI Master 0 Quad I/O Acknowledge [20:20] read-only fast_mode SPI Master 0 Fast Mode Acknowledge [24:24] read-only SPI1_REQ SPI Master 1 I/O Mode Request 0x0078 read-write core_io_req SPI Master 1 Core I/O Request [4:4] read-write ss0_io_req SPI Master 1 SS[0] I/O Request [8:8] read-write ss1_io_req SPI Master 1 SS[1] I/O Request [9:9] read-write ss2_io_req SPI Master 1 SS[2] I/O Request [10:10] read-write quad_io_req SPI Master 1 Quad I/O Request [20:20] read-write fast_mode SPI Master 1 Fast Mode Request [24:24] read-write SPI1_ACK SPI Master 1 I/O Mode Acknowledge 0x007C read-write core_io_ack SPI Master 1 Core I/O Acknowledge [4:4] read-only ss0_io_ack SPI Master 1 SS[0] I/O Acknowledge [8:8] read-only ss1_io_ack SPI Master 1 SS[1] I/O Acknowledge [9:9] read-only ss2_io_ack SPI Master 1 SS[2] I/O Acknowledge [10:10] read-only quad_io_ack SPI Master 1 Quad I/O Acknowledge [20:20] read-only fast_mode SPI Master 1 Fast Mode Acknowledge [24:24] read-only SPI2_REQ SPI Master 2 I/O Mode Request 0x0080 read-write mapping_req SPI Master 2 I/O Mapping Select [0:0] read-write core_io_req SPI Master 2 Core I/O Request [4:4] read-write ss0_io_req SPI Master 2 SS[0] I/O Request [8:8] read-write ss1_io_req SPI Master 2 SS[1] I/O Request [9:9] read-write ss2_io_req SPI Master 2 SS[2] I/O Request [10:10] read-write sr0_io_req SPI Master 2 SR[0] I/O Request [16:16] read-write sr1_io_req SPI Master 2 SR[1] I/O Request [17:17] read-write quad_io_req SPI Master 2 Quad I/O Request [20:20] read-write fast_mode SPI Master 2 Fast Mode Request [24:24] read-write SPI2_ACK SPI Master 2 I/O Mode Acknowledge 0x0084 read-write mapping_ack SPI Master 2 I/O Mapping Acknowledge [0:0] read-only core_io_ack SPI Master 2 Core I/O Acknowledge [4:4] read-only ss0_io_ack SPI Master 2 SS[0] I/O Acknowledge [8:8] read-only ss1_io_ack SPI Master 2 SS[1] I/O Acknowledge [9:9] read-only ss2_io_ack SPI Master 2 SS[2] I/O Acknowledge [10:10] read-only sr0_io_req SPI Master 2 SR[0] I/O Acknowledge [16:16] read-only sr1_io_req SPI Master 2 SR[1] I/O Acknowledge [17:17] read-only quad_io_ack SPI Master 2 Quad I/O Acknowledge [20:20] read-only fast_mode SPI Master 2 Fast Mode Acknowledge [24:24] read-only SPIB_REQ SPI Bridge I/O Mode Request 0x0088 read-write core_io_req SPI Bridge Core I/O Request [4:4] read-only quad_io_req SPI Bridge Quad I/O Request [8:8] read-only fast_mode SPI Bridge Fast Mode Request [12:12] read-only SPIB_ACK SPI Bridge I/O Mode Acknowledge 0x008C read-write core_io_ack SPI Bridge Core I/O Acknowledge [4:4] read-only quad_io_ack SPI Bridge Quad I/O Acknowledge [8:8] read-only fast_mode SPI Bridge Fast Mode Acknowledge [12:12] read-only OWM_REQ 1-Wire Master I/O Mode Request 0x0090 read-write mapping_req 1-Wire Line I/O Request [4:4] read-write epu_io_req External Pullup Control Line I/O Request [5:5] read-write OWM_ACK 1-Wire Master I/O Mode Acknowledge 0x0094 read-write mapping_ack 1-Wire Line I/O Acknowledge [4:4] read-write epu_io_ack External Pullup Control Line I/O Acknowledge [5:5] read-write FLC Flash Controller 0x40002000 32 read-write 0 0x1000 registers FLC 2 Flash Controller IRQ FADDR Flash Operation Address 0x0000 read-write faddr Flash Operation Address [21:0] read-write FCKDIV Flash Clock Pulse Divisor 0x0004 read-write fckdiv Flash Clock Pulse Divisor [6:0] read-write auto_fckdiv_result Auto FCKDIV Calculation Result [31:16] read-only CTRL Flash Control Register 0x0008 read-write write Start Flash Write Operation [0:0] read-write mass_erase Start Flash Mass Erase Operation [1:1] read-write page_erase Start Flash Page Erase Operation [2:2] read-write erase_code Flash Erase Code [15:8] read-write info_block_unlock Flash Info Block Locked [16:16] read-only write_enable Flash Writes Enabled [17:17] read-only pending Flash Controller Status [24:24] read-only info_block_valid Info Block Valid Status [25:25] read-only auto_incre_mode Address Auto-Increment Mode [27:27] read-write flsh_unlock Flash Write/Erase Enable [31:28] read-write INTR Flash Controller Interrupt Flags and Enable/Disable 0 0x0024 read-write finished_if Flash Write/Erase Operation Finished [0:0] read-write failed_if Flash Operation Failed [1:1] read-write finished_ie Flash Write/Erase Operation Finished Interrupt Enable [8:8] read-write failed_ie Flash Operation Failed Interrupt Enable [9:9] read-write fail_flags Flash Operation Failure Details [31:16] read-only FDATA Flash Operation Data Register 0x0030 read-write PERFORM Flash Performance Settings 0x0050 read-write delay_se_en Delay SE Enable (Deprecated) [0:0] read-write fast_read_mode_en Fast Read Mode Enable (Deprecated) [8:8] read-write en_prevent_fail Prevent Fail Flag Set on FLC Busy [12:12] read-write en_back2back_rds Enable Back To Back Reads [16:16] read-write en_back2back_wrs Enable Back To Back Writes [20:20] read-write en_merge_grab_gnt Enable Merge Grab GNT [24:24] read-write auto_tacc Auto TACC [28:28] read-write auto_clkdiv Auto CLKDIV [29:29] read-write TACC Flash Read Cycle Config 0x0054 read-write TPROG Flash Write Cycle Config 0x0058 read-write STATUS Security Status Flags 0x0080 read-write jtag_lock_window Debug Locked - Hardware Window [0:0] read-only jtag_lock_static Debug Locked - Firmware Lockout [1:1] read-only auto_lock Debug Locked - Auto Lock [3:3] read-only trim_update_done Trim Update Done [29:29] read-only info_block_valid Info Block Valid [30:30] read-only SECURITY Flash Controller Security Settings 0x0088 read-write debug_disable Debug Lockout [7:0] read-write mass_erase_lock Mass Erase Lockout [11:8] read-write disable_ahb_wr Disable AHB Flash Write Operations [19:16] read-write flc_settings_lock FLC Settings Lock [27:24] read-write security_lock Security Lock [31:28] read-write BYPASS Status Flags for DSB Operations 0x009C read-write destruct_bypass_erase Destructive Security Bypass In Progress [0:0] read-only superwipe_erase Superwipe Erase In Progress [1:1] read-only destruct_bypass_complete Destructive Security Bypass Erase Complete [2:2] read-only superwipe_complete Superwipe Erase Complete [3:3] read-only USER_OPTION Used to set DSB Access code and Auto-Lock in info block 0x0100 read-write CTRL2 Flash Control Register 2 0x0140 read-write flash_lve Flash LVE Enable [7:0] read-write bypass_ahb_fail AHB Fail Bypass [15:8] read-write INTFL1 Interrupt Flags Register 1 0x0144 read-write sram_addr_wrapped SRAM Address Wrapped Interrupt Flag [0:0] read-write oneToClear invalid_flash_addr Invalid Flash Address Interrupt Flag [1:1] read-write oneToClear flash_read_locked Flash Read from Locked Area Interrupt Flag [2:2] read-write oneToClear trim_update_done Trim Update Complete Interrupt Flag [3:3] read-write oneToClear flc_state_done FLC State Machine Reached DONE Interrupt Flag [4:4] read-write oneToClear flc_prog_complete Program (Write or Erase) Operation Completed Interrupt Flag [5:5] read-write oneToClear INTEN1 Interrupt Enable/Disable Register 1 0x0148 read-write sram_addr_wrapped SRAM Address Wrapped Interrupt Enable/Disable [0:0] read-write oneToClear invalid_flash_addr Invalid Flash Address Interrupt Enable/Disable [1:1] read-write oneToClear flash_read_locked Flash Read from Locked Area Interrupt Enable/Disable [2:2] read-write oneToClear trim_update_done Trim Update Complete Interrupt Enable/Disable [3:3] read-write oneToClear flc_state_done FLC State Machine Reached DONE Interrupt Enable/Disable [4:4] read-write flc_prog_complete Program (Write or Erase) Op Completed Int Enable/Disable [5:5] read-write BL_CTRL Bootloader Control Register 0x0170 read-write TWK_CYCL_CNT Cycle Count Tweak Register 0x0174 read-write PDM33 PDM33 Register 0x0178 read-write SLM Sleep Mode Register 0x017C read-write DISABLE_XR0 Disable Flash Page Exec/Read Register 0 0x0200 read-write DISABLE_XR1 Disable Flash Page Exec/Read Register 1 0x0204 read-write DISABLE_XR2 Disable Flash Page Exec/Read Register 2 0x0208 read-write DISABLE_XR3 Disable Flash Page Exec/Read Register 3 0x020C read-write DISABLE_XR4 Disable Flash Page Exec/Read Register 4 0x0210 read-write DISABLE_XR5 Disable Flash Page Exec/Read Register 5 0x0214 read-write DISABLE_XR6 Disable Flash Page Exec/Read Register 6 0x0218 read-write DISABLE_XR7 Disable Flash Page Exec/Read Register 7 0x021C read-write DISABLE_WE0 Disable Flash Page Write/Erase Register 0 0x0300 read-write DISABLE_WE1 Disable Flash Page Write/Erase Register 1 0x0304 read-write DISABLE_WE2 Disable Flash Page Write/Erase Register 2 0x0308 read-write DISABLE_WE3 Disable Flash Page Write/Erase Register 3 0x030C read-write DISABLE_WE4 Disable Flash Page Write/Erase Register 4 0x0310 read-write DISABLE_WE5 Disable Flash Page Write/Erase Register 5 0x0314 read-write DISABLE_WE6 Disable Flash Page Write/Erase Register 6 0x0318 read-write DISABLE_WE7 Disable Flash Page Write/Erase Register 7 0x031C read-write ICC Instruction Cache Controller 0x40003000 32 read-write 0 0x1000 registers ID Device ID Register 0x0000 read-write rtl_version RTL Release Version [5:0] read-only part_num Part Number ID [9:6] read-only cache_id Cache ID [15:10] read-only MEM_CFG Memory Configuration Register 0x0004 read-write cache_size Instruction Cache Size [15:0] read-only main_memory_size Internal Flash Memory Size [31:16] read-only CTRL_STAT Control and Status 0x0100 read-write enable Cache Enable [0:0] read-write ready Cache Ready Status [16:16] read-only INVDT_ALL Invalidate (Clear) Cache Control 0x0700 read-write SPIX SPI XIP Interface SPI XIP 0x40004000 32 read-write 0 0x1000 registers MASTER_CFG SPIX Master Configuration 0x0000 read-write spi_mode SPIX Mode SCK_HI_SAMPLE_RISING SCK is active high, data is sampled on clock rising edge. 0 SCK_LO_SAMPLE_FALLING SCK is active low, data is sampled on clock rising edge. 3 [1:0] read-write ss_act_lo SPIX Slave Select Polarity ACTIVE_HIGH Enabled slave select (SS) is active high. 0 ACTIVE_LOW Enabled slave select (SS) is active low. 1 [2:2] read-write alt_timing_en Alternate Timing Mode Enable DISABLED Alternate timing is disabled. 0 ENABLED_AS_NEEDED Alternate timing will be enabled automatically when needed. 1 [3:3] read-write slave_sel SPIX Slave Select [6:4] read-write sck_hi_clk SCK High Clocks [11:8] read-write sck_lo_clk SCK Low Clocks [15:12] read-write act_delay SS Active Timing OFF No SS Active timing delay enabled. 0 FOR_2_MOD_CLK SS Active timing delay of 2 SPIX module clock cycles. 1 FOR_4_MOD_CLK SS Active timing delay of 4 SPIX module clock cycles. 2 FOR_8_MOD_CLK SS Active timing delay of 8 SPIX module clock cycles. 3 [17:16] read-write inact_delay SS Inactive Timing OFF No SS Active timing delay enabled. 0 FOR_2_MOD_CLK SS Active timing delay of 2 SPIX module clock cycles. 1 FOR_4_MOD_CLK SS Active timing delay of 4 SPIX module clock cycles. 2 FOR_8_MOD_CLK SS Active timing delay of 8 SPIX module clock cycles. 3 [19:18] read-write alt_sck_hi_clk Alt SCK High Clocks [23:20] read-write alt_sck_lo_clk Alt SCK Low Clocks [27:24] read-write FETCH_CTRL SPIX Fetch Control 0x0004 read-write cmd_value Command Value [7:0] read-write cmd_width Command Width SINGLE Single I/O used for Tx/Rx. 0 DUAL_IO Dual I/O lines used for Tx/Rx. 1 QUAD_IO Quad I/O lines used for Tx/Rx. 2 [9:8] read-write addr_width Address Width SINGLE Single I/O used for Tx/Rx. 0 DUAL_IO Dual I/O lines used for Tx/Rx. 1 QUAD_IO Quad I/O lines used for Tx/Rx. 2 [11:10] read-write data_width Data Width SINGLE Single I/O used for Tx/Rx. 0 DUAL_IO Dual I/O lines used for Tx/Rx. 1 QUAD_IO Quad I/O lines used for Tx/Rx. 2 [13:12] read-write MODE_CTRL SPIX Mode Control 0x0008 read-write mode_clocks Mode Clocks [3:0] read-write no_cmd_mode No Command Mode [8:8] read-write MODE_DATA SPIX Mode Data 0x000C read-write mode_data_bits Mode Data [15:0] read-write mode_data_oe Mode Output Enable [31:16] read-write PMU0 Peripheral Management Unit PMU 0x40005000 32 read-write 0 0x20 registers PMU 7 Peripheral Manament IRQ DSCADR Starting Descriptor Address 0x0000 read-write CFG Channel Configuration 0x0004 read-write enable PMU Channel Enable [0:0] read-write ll_stopped Linked List Engine Status [2:2] read-write manual Manual Mode Enable [3:3] read-write bus_error AHB Bus Error Interrupt Flag [4:4] read-write oneToClear to_stat AHB Bus Timeout Interrupt Flag [6:6] read-write oneToClear to_sel Time Out Interval Select [13:11] read-write ps_sel Time Out Interval Prescale Select [15:14] read-write interrupt Descriptor Interrupt Flag [16:16] read-write oneToClear int_en PMU Channel Interrupt Enable [17:17] read-write burst_size DMA Maximum Burst Size [28:24] read-write LOOP Channel Loop Counters 0x0008 read-write counter_0 CH1 Loop Counter 1 [15:0] read-write counter_1 CH1 Loop Counter 0 [31:16] read-write OP Current Descriptor DWORD 0 (OP) 0x000C read-write DSC1 Current Descriptor DWORD 1 0x0010 read-write DSC2 Current Descriptor DWORD 2 0x0014 read-write DSC3 Current Descriptor DWORD 3 0x0018 read-write DSC4 Current Descriptor DWORD 4 0x001C read-write PMU1 PMU 0x40005020 PMU2 PMU 0x40005040 PMU3 PMU 0x40005060 PMU4 PMU 0x40005080 PMU5 PMU 0x400050A0 USB USB Device Controller 0x40100000 32 read-write 0 0x1000 registers USB 8 USB IRQ CN USB Control Register 0x0000 read-write usb_en USB Device Interface Enable [0:0] read-write DEV_ADDR USB Device Address Register 0x0200 read-write dev_addr USB Device Address [6:0] read-only DEV_CN USB Device Control Register 0x0204 read-write sigrwu USB Signal Remote Wakeup [2:2] read-write connect Connect to USB [3:3] read-write ulpm USB Low Power Mode [4:4] read-write urst USB Device Controller Reset [5:5] read-write vbgate VBUS Gate [6:6] read-write fifo_mode FIFO Mode [9:9] read-write DEV_INTFL USB Device Interrupt 0x0208 read-write dpact DPLUS Activity Interrupt Flag [0:0] read-write oneToClear rwu_dn Remote Wakeup Done Interrupt Flag [1:1] read-write oneToClear bact USB Bus Activity Interrupt Flag [2:2] read-write oneToClear brst USB Bus Reset In Progress Interrupt Flag [3:3] read-write oneToClear susp USB Suspend Interrupt Flag [4:4] read-write oneToClear no_vbus No VBUS Interrupt Flag [5:5] read-write oneToClear vbus VBUS Detect Interrupt Flag [6:6] read-write oneToClear brst_dn USB Bus Reset Completed Interrupt Flag [7:7] read-write oneToClear setup Setup Packet Interrupt Flag [8:8] read-write oneToClear ep_in Endpoint IN Interrupt Flag [9:9] read-write oneToClear ep_out Endpoint OUT Interrupt Flag [10:10] read-write oneToClear ep_nak Endpoint NAK Interrupt Flag [11:11] read-write oneToClear dma_err DMA Error Interrupt Flag [12:12] read-write oneToClear buf_ovr Buffer Overflow Interrupt Flag [13:13] read-write oneToClear vbus_st VBUS Status [16:16] read-only DEV_INTEN USB Device Interrupt Enable 0x020C read-write dpact DPLUS Activity Interrupt Flag [0:0] read-write rwu_dn Remote Wakeup Done Interrupt Flag [1:1] read-write bact USB Bus Activity Interrupt Flag [2:2] read-write brst USB Bus Reset In Progress Interrupt Flag [3:3] read-write susp USB Suspend Interrupt Flag [4:4] read-write no_vbus No VBUS Interrupt Flag [5:5] read-write vbus VBUS Detect Interrupt Flag [6:6] read-write brst_dn USB Bus Reset Completed Interrupt Flag [7:7] read-write setup Setup Packet Interrupt Flag [8:8] read-write ep_in Endpoint IN Interrupt Flag [9:9] read-write ep_out Endpoint OUT Interrupt Flag [10:10] read-write ep_nak Endpoint NAK Interrupt Flag [11:11] read-write dma_err DMA Error Interrupt Flag [12:12] read-write buf_ovr Buffer Overflow Interrupt Flag [13:13] read-write EP_BASE USB Endpoint Descriptor Table Base Address 0x0220 read-write ep_base USB Endpoint Descriptor Table Base Address [31:9] read-write CUR_BUF USB Current Endpoint Buffer Register 0x0224 read-write out_buf OUT Transfer Current Buffers [7:0] read-only in_buf IN Transfer Current Buffers [23:16] read-only IN_OWNER USB IN Endpoint Buffer Owner Register 0x0228 read-write buf0_owner Owner for IN Buffer 0 for Endpoints [7:0] read-write buf1_owner Owner for IN Buffer 1 for Endpoints [23:16] read-write OUT_OWNER USB OUT Endpoint Buffer Owner Register 0x022C read-write buf0_owner Owner for OUT Buffer 0 for Endpoints [7:0] read-write buf1_owner Owner for OUT Buffer 1 for Endpoints [23:16] read-write IN_INT USB IN Endpoint Buffer Available Interrupt 0x0230 read-write inbav0 Endpoint 0 Buffer Available Interrupt Flag [0:0] read-write oneToClear inbav1 Endpoint 1 Buffer Available Interrupt Flag [1:1] read-write oneToClear inbav2 Endpoint 2 Buffer Available Interrupt Flag [2:2] read-write oneToClear inbav3 Endpoint 3 Buffer Available Interrupt Flag [3:3] read-write oneToClear inbav4 Endpoint 4 Buffer Available Interrupt Flag [4:4] read-write oneToClear inbav5 Endpoint 5 Buffer Available Interrupt Flag [5:5] read-write oneToClear inbav6 Endpoint 6 Buffer Available Interrupt Flag [6:6] read-write oneToClear inbav7 Endpoint 7 Buffer Available Interrupt Flag [7:7] read-write oneToClear OUT_INT USB OUT Endpoint Data Available Interrupt 0x0234 read-write outdav0 Endpoint 0 Data Available Interrupt Flag [0:0] read-write oneToClear outdav1 Endpoint 1 Data Available Interrupt Flag [1:1] read-write oneToClear outdav2 Endpoint 2 Data Available Interrupt Flag [2:2] read-write oneToClear outdav3 Endpoint 3 Data Available Interrupt Flag [3:3] read-write oneToClear outdav4 Endpoint 4 Data Available Interrupt Flag [4:4] read-write oneToClear outdav5 Endpoint 5 Data Available Interrupt Flag [5:5] read-write oneToClear outdav6 Endpoint 6 Data Available Interrupt Flag [6:6] read-write oneToClear outdav7 Endpoint 7 Data Available Interrupt Flag [7:7] read-write oneToClear NAK_INT USB IN Endpoint NAK Interrupt 0x0238 read-write nak0 Endpoint 0 NAK Interrupt Flag [0:0] read-write oneToClear nak1 Endpoint 1 NAK Interrupt Flag [1:1] read-write oneToClear nak2 Endpoint 2 NAK Interrupt Flag [2:2] read-write oneToClear nak3 Endpoint 3 NAK Interrupt Flag [3:3] read-write oneToClear nak4 Endpoint 4 NAK Interrupt Flag [4:4] read-write oneToClear nak5 Endpoint 5 NAK Interrupt Flag [5:5] read-write oneToClear nak6 Endpoint 6 NAK Interrupt Flag [6:6] read-write oneToClear nak7 Endpoint 7 NAK Interrupt Flag [7:7] read-write oneToClear DMA_ERR_INT USB DMA Error Interrupt 0x023C read-write dma_err0 Endpoint 0 DMA Error Interrupt Flag [0:0] read-write oneToClear dma_err1 Endpoint 1 DMA Error Interrupt Flag [1:1] read-write oneToClear dma_err2 Endpoint 2 DMA Error Interrupt Flag [2:2] read-write oneToClear dma_err3 Endpoint 3 DMA Error Interrupt Flag [3:3] read-write oneToClear dma_err4 Endpoint 4 DMA Error Interrupt Flag [4:4] read-write oneToClear dma_err5 Endpoint 5 DMA Error Interrupt Flag [5:5] read-write oneToClear dma_err6 Endpoint 6 DMA Error Interrupt Flag [6:6] read-write oneToClear dma_err7 Endpoint 7 DMA Error Interrupt Flag [7:7] read-write oneToClear BUF_OVR_INT USB Buffer Overflow Interrupt 0x0240 read-write buf_ovr0 Endpoint 0 Buffer Overflow Interrupt Flag [0:0] read-write oneToClear buf_ovr1 Endpoint 1 Buffer Overflow Interrupt Flag [1:1] read-write oneToClear buf_ovr2 Endpoint 2 Buffer Overflow Interrupt Flag [2:2] read-write oneToClear buf_ovr3 Endpoint 3 Buffer Overflow Interrupt Flag [3:3] read-write oneToClear buf_ovr4 Endpoint 4 Buffer Overflow Interrupt Flag [4:4] read-write oneToClear buf_ovr5 Endpoint 5 Buffer Overflow Interrupt Flag [5:5] read-write oneToClear buf_ovr6 Endpoint 6 Buffer Overflow Interrupt Flag [6:6] read-write oneToClear buf_ovr7 Endpoint 7 Buffer Overflow Interrupt Flag [7:7] read-write oneToClear SETUP0 USB SETUP Packet Bytes 0 to 3 0x0260 read-write byte0 SETUP Packet Byte 0 [7:0] read-only byte1 SETUP Packet Byte 1 [15:8] read-only byte2 SETUP Packet Byte 2 [23:16] read-only byte3 SETUP Packet Byte 3 [31:24] read-only SETUP1 USB SETUP Packet Bytes 4 to 7 0x0264 read-write byte4 SETUP Packet Byte 4 [7:0] read-only byte5 SETUP Packet Byte 5 [15:8] read-only byte6 SETUP Packet Byte 6 [23:16] read-only byte7 SETUP Packet Byte 7 [31:24] read-only EP0 USB Endpoint 0 Control Register 0x0280 read-write ep_dir Endpoint Direction [1:0] read-write ep_buf2 Endpoint Double Buffered Enable [3:3] read-write ep_int_en Endpoint Transfer Complete Interrupt Enable [4:4] read-write ep_nak_en Endpoint NAK Interrupt Enable [5:5] read-write ep_dt Endpoint Data Toggle Clear [6:6] read-write ep_stall Endpoint Stall [8:8] read-write ep_st_stall Endpoint Stall Status Stage of Control Transfer [9:9] read-write ep_st_ack Endpoint Acknowledge Status Stage of Control Transfer [10:10] read-write EP1 USB Endpoint 1 Control Register 0x0284 read-write ep_dir Endpoint Direction [1:0] read-write ep_buf2 Endpoint Double Buffered Enable [3:3] read-write ep_int_en Endpoint Transfer Complete Interrupt Enable [4:4] read-write ep_nak_en Endpoint NAK Interrupt Enable [5:5] read-write ep_dt Endpoint Data Toggle Clear [6:6] read-write ep_stall Endpoint Stall [8:8] read-write ep_st_stall Endpoint Stall Status Stage of Control Transfer [9:9] read-write ep_st_ack Endpoint Acknowledge Status Stage of Control Transfer [10:10] read-write EP2 USB Endpoint 2 Control Register 0x0288 read-write ep_dir Endpoint Direction [1:0] read-write ep_buf2 Endpoint Double Buffered Enable [3:3] read-write ep_int_en Endpoint Transfer Complete Interrupt Enable [4:4] read-write ep_nak_en Endpoint NAK Interrupt Enable [5:5] read-write ep_dt Endpoint Data Toggle Clear [6:6] read-write ep_stall Endpoint Stall [8:8] read-write ep_st_stall Endpoint Stall Status Stage of Control Transfer [9:9] read-write ep_st_ack Endpoint Acknowledge Status Stage of Control Transfer [10:10] read-write EP3 USB Endpoint 3 Control Register 0x028C read-write ep_dir Endpoint Direction [1:0] read-write ep_buf2 Endpoint Double Buffered Enable [3:3] read-write ep_int_en Endpoint Transfer Complete Interrupt Enable [4:4] read-write ep_nak_en Endpoint NAK Interrupt Enable [5:5] read-write ep_dt Endpoint Data Toggle Clear [6:6] read-write ep_stall Endpoint Stall [8:8] read-write ep_st_stall Endpoint Stall Status Stage of Control Transfer [9:9] read-write ep_st_ack Endpoint Acknowledge Status Stage of Control Transfer [10:10] read-write EP4 USB Endpoint 4 Control Register 0x0290 read-write ep_dir Endpoint Direction [1:0] read-write ep_buf2 Endpoint Double Buffered Enable [3:3] read-write ep_int_en Endpoint Transfer Complete Interrupt Enable [4:4] read-write ep_nak_en Endpoint NAK Interrupt Enable [5:5] read-write ep_dt Endpoint Data Toggle Clear [6:6] read-write ep_stall Endpoint Stall [8:8] read-write ep_st_stall Endpoint Stall Status Stage of Control Transfer [9:9] read-write ep_st_ack Endpoint Acknowledge Status Stage of Control Transfer [10:10] read-write EP5 USB Endpoint 5 Control Register 0x0294 read-write ep_dir Endpoint Direction [1:0] read-write ep_buf2 Endpoint Double Buffered Enable [3:3] read-write ep_int_en Endpoint Transfer Complete Interrupt Enable [4:4] read-write ep_nak_en Endpoint NAK Interrupt Enable [5:5] read-write ep_dt Endpoint Data Toggle Clear [6:6] read-write ep_stall Endpoint Stall [8:8] read-write ep_st_stall Endpoint Stall Status Stage of Control Transfer [9:9] read-write ep_st_ack Endpoint Acknowledge Status Stage of Control Transfer [10:10] read-write EP6 USB Endpoint 6 Control Register 0x0298 read-write ep_dir Endpoint Direction [1:0] read-write ep_buf2 Endpoint Double Buffered Enable [3:3] read-write ep_int_en Endpoint Transfer Complete Interrupt Enable [4:4] read-write ep_nak_en Endpoint NAK Interrupt Enable [5:5] read-write ep_dt Endpoint Data Toggle Clear [6:6] read-write ep_stall Endpoint Stall [8:8] read-write ep_st_stall Endpoint Stall Status Stage of Control Transfer [9:9] read-write ep_st_ack Endpoint Acknowledge Status Stage of Control Transfer [10:10] read-write EP7 USB Endpoint 7 Control Register 0x029C read-write ep_dir Endpoint Direction [1:0] read-write ep_buf2 Endpoint Double Buffered Enable [3:3] read-write ep_int_en Endpoint Transfer Complete Interrupt Enable [4:4] read-write ep_nak_en Endpoint NAK Interrupt Enable [5:5] read-write ep_dt Endpoint Data Toggle Clear [6:6] read-write ep_stall Endpoint Stall [8:8] read-write ep_st_stall Endpoint Stall Status Stage of Control Transfer [9:9] read-write ep_st_ack Endpoint Acknowledge Status Stage of Control Transfer [10:10] read-write CRC CRC-16/CRC-32 Engine 0x40006000 32 read-write 0 0x1000 registers RESEED CRC-16/CRC-32 Reseed Controls 0x0000 read-write crc16 Reseed CRC16 Generator [0:0] read-write oneToClear crc32 Reseed CRC32 Generator [1:1] read-write oneToClear rev_endian16 Reverse Endianness for CRC16 [4:4] read-write rev_endian32 Reverse Endianness for CRC32 [5:5] read-write ccitt_mode CRC16-CCITT Mode [8:8] read-write SEED16 Reseed Value for CRC-16 Calculations 0x0004 read-write SEED32 Reseed Value for CRC-32 Calculations 0x0008 read-write TPU Trust Protection Unit (TPU) 0x40007000 32 read-write 0 0x0400 registers PRNG_USER_ENTROPY PRNG User Entropy Value 0x0000 read-write PRNG_RND_NUM PRNG Random Number Output 0x0004 read-write TPU_TSR Trust Protection Unit (TPU) 0x40007C00 32 read-write 0 0x0400 registers SKS0 TPU Secure Key Storage Register 0 (Cleared on Tamper Detect) 0x0010 read-write SKS1 TPU Secure Key Storage Register 1 (Cleared on Tamper Detect) 0x0014 read-write SKS2 TPU Secure Key Storage Register 2 (Cleared on Tamper Detect) 0x0018 read-write SKS3 TPU Secure Key Storage Register 3 (Cleared on Tamper Detect) 0x001C read-write AES AES Cryptographic Engine 0x40007400 32 read-write 0 0x0400 registers AES 9 AES IRQ CTRL AES Control and Status 0x0000 read-write start AES Start/Busy [0:0] read-write crypt_mode AES Encrypt/Decrypt Mode ENCRYPT_MODE Perform AES encryption operation. 0 DECRYPT_MODE Perform AES decryption operation. 1 [1:1] read-write exp_key_mode AES Expanded Key Mode CALC_NEW_EXP_KEY Calculate new expanded key for this operation. 0 USE_LAST_EXP_KEY Use expanded key calculated by the last operation. 1 [2:2] read-write key_size AES Key Size Select KEY_SIZE_128 Use 128-bit AES key size. 0 KEY_SIZE_192 Use 192-bit AES key size. 1 KEY_SIZE_256 Use 256-bit AES key size. 2 [4:3] read-write inten AES Interrupt Enable [5:5] read-write intfl AES Interrupt Flag [6:6] read-write oneToClear ERASE_ALL A write to this location triggers an erase of all AES memory locations. 0x0008 write-only MAA MAA Cryptographic Engine 0x40007800 32 read-write 0 0x0400 registers MAA 10 Modular Arithematic Accelerator IRQ CTRL MAA Control, Configuration and Status 0x0000 read-write start Start MAA Calculation [0:0] read-write opsel Select Operation Type EXP Exponentiation. 0 SQR Square operation. 1 MUL Multiply. 2 SQRMUL Square operation followed by multiply. 3 ADD Addition. 4 SUB Subtraction. 5 [3:1] read-write ocalc Optimized Calculation Control [4:4] read-write if_done Interrupt Flag - Calculation Done [5:5] read-write inten MAA Interrupt Enable [6:6] read-write if_error Interrupt Flag - Error [7:7] read-write ofs_a Operand A Memory Offset Select [9:8] read-write ofs_b Operand B Memory Offset Select [11:10] read-write ofs_exp Exponent Memory Offset Select [13:12] read-write ofs_mod Modulus Memory Select [15:14] read-write seg_a Operand A Memory Segment Select [19:16] read-write seg_b Operand B Memory Segment Select [23:20] read-write seg_res Result Memory Segment Select [27:24] read-write seg_tmp Temporary Memory Segment Select [31:28] read-write MAWS MAA Word (Operand) Size, Big/Little Endian Mode Select 0x0004 read-write modlen MAA Word Size [9:0] read-write byteswap Big Endian Byte Mode [15:15] read-write WDT0 Watchdog Timers Watch Dog Timers 0x40008000 32 read-write 0 0x1000 registers WDT0 11 Watch Dog Timer 0 IRQ WDT0_PRE_WIN 12 Watch Dog Timer 0 Pre-Window IRQ CTRL WDT0 - Watchdog Timer Control Register 0x0000 read-write int_period Period from WDT Clear to Interrupt Flag Set 0 4 true 2_31_CLKS 2^31 WDT clocks 0 2_30_CLKS 2^30 WDT clocks 1 2_29_CLKS 2^29 WDT clocks 2 2_28_CLKS 2^28 WDT clocks 3 2_27_CLKS 2^27 WDT clocks 4 2_26_CLKS 2^26 WDT clocks 5 2_25_CLKS 2^25 WDT clocks 6 2_24_CLKS 2^24 WDT clocks 7 2_23_CLKS 2^23 WDT clocks 8 2_22_CLKS 2^22 WDT clocks 9 2_21_CLKS 2^21 WDT clocks 10 2_20_CLKS 2^20 WDT clocks 11 2_19_CLKS 2^19 WDT clocks 12 2_18_CLKS 2^18 WDT clocks 13 2_17_CLKS 2^17 WDT clocks 14 2_16_CLKS 2^16 WDT clocks 15 read-write rst_period Period from WDT Clear to Reset Flag Set 2_31_CLKS 2^31 WDT clocks. 0 2_30_CLKS 2^30 WDT clocks. 1 2_29_CLKS 2^29 WDT clocks. 2 2_28_CLKS 2^28 WDT clocks. 3 2_27_CLKS 2^27 WDT clocks. 4 2_26_CLKS 2^26 WDT clocks. 5 2_25_CLKS 2^25 WDT clocks. 6 2_24_CLKS 2^24 WDT clocks. 7 2_23_CLKS 2^23 WDT clocks. 8 2_22_CLKS 2^22 WDT clocks. 9 2_21_CLKS 2^21 WDT clocks. 10 2_20_CLKS 2^20 WDT clocks. 11 2_19_CLKS 2^19 WDT clocks. 12 2_18_CLKS 2^18 WDT clocks. 13 2_17_CLKS 2^17 WDT clocks. 14 2_16_CLKS 2^16 WDT clocks. 15 [7:4] read-write en_timer Watchdg Timer Enable 8 1 read-write en_clock Watchdog Clock Gate [9:9] read-write DISABLE WDT Clock Gate Control Disable 0 ENABLE WDT Clock Gate Control Enable 1 wait_period Period from WDT Clear to Clear Window Begin 2_31_CLKS 2^31 WDT clocks. 0 2_30_CLKS 2^30 WDT clocks. 1 2_29_CLKS 2^29 WDT clocks. 2 2_28_CLKS 2^28 WDT clocks. 3 2_27_CLKS 2^27 WDT clocks 4 2_26_CLKS 2^26 WDT clocks 5 2_25_CLKS 2^25 WDT clocks 6 2_24_CLKS 2^24 WDT clocks 7 2_23_CLKS 2^23 WDT clocks 8 2_22_CLKS 2^22 WDT clocks. 9 2_21_CLKS 2^21 WDT clocks. 10 2_20_CLKS 2^20 WDT clocks. 11 2_19_CLKS 2^19 WDT clocks. 12 2_18_CLKS 2^18 WDT clocks. 13 2_17_CLKS 2^17 WDT clocks. 14 2_16_CLKS 2^16 WDT clocks. 15 [15:12] read-write CLEAR WDT0 - Watchdog Clear Register (Feed Dog) 0x0004 read-write FLAGS WDT0 - Watchdog Interrupt and Reset Flags 0x0008 read-write timeout Watchdog Timeout Interrupt Flag [0:0] read-write oneToClear pre_win Watchdog Pre-Window Clear Interrupt Flag [1:1] read-write oneToClear reset_out Watchdog Reset Flag [2:2] read-write oneToClear ENABLE WDT0 - Interrupt/Reset Enable/Disable Controls 0x000C read-write timeout Enable Watchdog Interrupt [0:0] read-write pre_win Enable Watchdog Pre-Window Reset Interrupt [1:1] read-write reset_out Enable Watchdog Reset Output [2:2] read-write LOCK_CTRL WDT0 - Register Setting Lock for WDT0_CTRL 0x0014 read-write wdlock Lock for WDT CTRL Register [7:0] read-write WDT1 Watch Dog Timers 0x40009000 WDT1 13 Watch Dog Timer 1 IRQ WDT1_PRE_WIN 14 Watch Dog Timer 1 Pre-Window IRQ GPIO General Purpose I/O Ports (GPIO) IO 0x4000A000 32 read-write 0 0x1000 registers GPIO0 15 GPIO Port 0 IRQ GPIO1 16 GPIO Port 1 IRQ GPIO2 17 GPIO Port 2 IRQ GPIO3 18 GPIO Port 3 IRQ GPIO4 19 GPIO Port 4 IRQ GPIO5 20 GPIO Port 5 IRQ GPIO6 21 GPIO Port 6 IRQ GPIO7 50 GPIO Port 7 IRQ GPIO8 51 GPIO Port 8 IRQ RST_MODE_P0 Port P0 Default (Power-On Reset) Output Drive Mode 0x0000 read-write pin0 P0.0 Default Output Drive Mode [2:0] read-write pin1 P0.1 Default Output Drive Mode [6:4] read-write pin2 P0.2 Default Output Drive Mode [10:8] read-write pin3 P0.3 Default Output Drive Mode [14:12] read-write pin4 P0.4 Default Output Drive Mode [18:16] read-write pin5 P0.5 Default Output Drive Mode [22:20] read-write pin6 P0.6 Default Output Drive Mode [26:24] read-write pin7 P0.7 Default Output Drive Mode [30:28] read-write RST_MODE_P1 Port P1 Default (Power-On Reset) Output Drive Mode 0x0004 read-write pin0 P1.0 Default Output Drive Mode [2:0] read-write pin1 P1.1 Default Output Drive Mode [6:4] read-write pin2 P1.2 Default Output Drive Mode [10:8] read-write pin3 P1.3 Default Output Drive Mode [14:12] read-write pin4 P1.4 Default Output Drive Mode [18:16] read-write pin5 P1.5 Default Output Drive Mode [22:20] read-write pin6 P1.6 Default Output Drive Mode [26:24] read-write pin7 P1.7 Default Output Drive Mode [30:28] read-write RST_MODE_P2 Port P2 Default (Power-On Reset) Output Drive Mode 0x0008 read-write pin0 P2.0 Default Output Drive Mode [2:0] read-write pin1 P2.1 Default Output Drive Mode [6:4] read-write pin2 P2.2 Default Output Drive Mode [10:8] read-write pin3 P2.3 Default Output Drive Mode [14:12] read-write pin4 P2.4 Default Output Drive Mode [18:16] read-write pin5 P2.5 Default Output Drive Mode [22:20] read-write pin6 P2.6 Default Output Drive Mode [26:24] read-write pin7 P2.7 Default Output Drive Mode [30:28] read-write RST_MODE_P3 Port P3 Default (Power-On Reset) Output Drive Mode 0x000C read-write pin0 P3.0 Default Output Drive Mode [2:0] read-write pin1 P3.1 Default Output Drive Mode [6:4] read-write pin2 P3.2 Default Output Drive Mode [10:8] read-write pin3 P3.3 Default Output Drive Mode [14:12] read-write pin4 P3.4 Default Output Drive Mode [18:16] read-write pin5 P3.5 Default Output Drive Mode [22:20] read-write pin6 P3.6 Default Output Drive Mode [26:24] read-write pin7 P3.7 Default Output Drive Mode [30:28] read-write RST_MODE_P4 Port P4 Default (Power-On Reset) Output Drive Mode 0x0010 read-write pin0 P4.0 Default Output Drive Mode [2:0] read-write pin1 P4.1 Default Output Drive Mode [6:4] read-write pin2 P4.2 Default Output Drive Mode [10:8] read-write pin3 P4.3 Default Output Drive Mode [14:12] read-write pin4 P4.4 Default Output Drive Mode [18:16] read-write pin5 P4.5 Default Output Drive Mode [22:20] read-write pin6 P4.6 Default Output Drive Mode [26:24] read-write pin7 P4.7 Default Output Drive Mode [30:28] read-write RST_MODE_P5 Port P5 Default (Power-On Reset) Output Drive Mode 0x0014 read-write pin0 P5.0 Default Output Drive Mode [2:0] read-write pin1 P5.1 Default Output Drive Mode [6:4] read-write pin2 P5.2 Default Output Drive Mode [10:8] read-write pin3 P5.3 Default Output Drive Mode [14:12] read-write pin4 P5.4 Default Output Drive Mode [18:16] read-write pin5 P5.5 Default Output Drive Mode [22:20] read-write pin6 P5.6 Default Output Drive Mode [26:24] read-write pin7 P5.7 Default Output Drive Mode [30:28] read-write RST_MODE_P6 Port P6 Default (Power-On Reset) Output Drive Mode 0x0018 read-write pin0 P6.0 Default Output Drive Mode [2:0] read-write pin1 P6.1 Default Output Drive Mode [6:4] read-write pin2 P6.2 Default Output Drive Mode [10:8] read-write pin3 P6.3 Default Output Drive Mode [14:12] read-write pin4 P6.4 Default Output Drive Mode [18:16] read-write pin5 P6.5 Default Output Drive Mode [22:20] read-write pin6 P6.6 Default Output Drive Mode [26:24] read-write pin7 P6.7 Default Output Drive Mode [30:28] read-write RST_MODE_P7 Port P7 Default (Power-On Reset) Output Drive Mode 0x001C read-write pin0 P7.0 Default Output Drive Mode [2:0] read-write pin1 P7.1 Default Output Drive Mode [6:4] read-write pin2 P7.2 Default Output Drive Mode [10:8] read-write pin3 P7.3 Default Output Drive Mode [14:12] read-write pin4 P7.4 Default Output Drive Mode [18:16] read-write pin5 P7.5 Default Output Drive Mode [22:20] read-write pin6 P7.6 Default Output Drive Mode [26:24] read-write pin7 P7.7 Default Output Drive Mode [30:28] read-write RST_MODE_P8 Port P8 Default (Power-On Reset) Output Drive Mode 0x0020 read-write pin0 P8.0 Default Output Drive Mode [2:0] read-write pin1 P8.1 Default Output Drive Mode [6:4] read-write pin2 P8.2 Default Output Drive Mode [10:8] read-write pin3 P8.3 Default Output Drive Mode [14:12] read-write pin4 P8.4 Default Output Drive Mode [18:16] read-write pin5 P8.5 Default Output Drive Mode [22:20] read-write pin6 P8.6 Default Output Drive Mode [26:24] read-write pin7 P8.7 Default Output Drive Mode [30:28] read-write FREE_P0 Port P0 Free for GPIO Operation Flags 0x0040 read-write pin0 P0.0 GPIO Mode Acknowledge [0:0] read-only pin1 P0.1 GPIO Mode Acknowledge [1:1] read-only pin2 P0.2 GPIO Mode Acknowledge [2:2] read-only pin3 P0.3 GPIO Mode Acknowledge [3:3] read-only pin4 P0.4 GPIO Mode Acknowledge [4:4] read-only pin5 P0.5 GPIO Mode Acknowledge [5:5] read-only pin6 P0.6 GPIO Mode Acknowledge [6:6] read-only pin7 P0.7 GPIO Mode Acknowledge [7:7] read-only FREE_P1 Port P1 Free for GPIO Operation Flags 0x0044 read-write pin0 P1.0 GPIO Mode Acknowledge [0:0] read-only pin1 P1.1 GPIO Mode Acknowledge [1:1] read-only pin2 P1.2 GPIO Mode Acknowledge [2:2] read-only pin3 P1.3 GPIO Mode Acknowledge [3:3] read-only pin4 P1.4 GPIO Mode Acknowledge [4:4] read-only pin5 P1.5 GPIO Mode Acknowledge [5:5] read-only pin6 P1.6 GPIO Mode Acknowledge [6:6] read-only pin7 P1.7 GPIO Mode Acknowledge [7:7] read-only FREE_P2 Port P2 Free for GPIO Operation Flags 0x0048 read-write pin0 P2.0 GPIO Mode Acknowledge [0:0] read-only pin1 P2.1 GPIO Mode Acknowledge [1:1] read-only pin2 P2.2 GPIO Mode Acknowledge [2:2] read-only pin3 P2.3 GPIO Mode Acknowledge [3:3] read-only pin4 P2.4 GPIO Mode Acknowledge [4:4] read-only pin5 P2.5 GPIO Mode Acknowledge [5:5] read-only pin6 P2.6 GPIO Mode Acknowledge [6:6] read-only pin7 P2.7 GPIO Mode Acknowledge [7:7] read-only FREE_P3 Port P3 Free for GPIO Operation Flags 0x004C read-write pin0 P3.0 GPIO Mode Acknowledge [0:0] read-only pin1 P3.1 GPIO Mode Acknowledge [1:1] read-only pin2 P3.2 GPIO Mode Acknowledge [2:2] read-only pin3 P3.3 GPIO Mode Acknowledge [3:3] read-only pin4 P3.4 GPIO Mode Acknowledge [4:4] read-only pin5 P3.5 GPIO Mode Acknowledge [5:5] read-only pin6 P3.6 GPIO Mode Acknowledge [6:6] read-only pin7 P3.7 GPIO Mode Acknowledge [7:7] read-only FREE_P4 Port P4 Free for GPIO Operation Flags 0x0050 read-write pin0 P4.0 GPIO Mode Acknowledge [0:0] read-only pin1 P4.1 GPIO Mode Acknowledge [1:1] read-only pin2 P4.2 GPIO Mode Acknowledge [2:2] read-only pin3 P4.3 GPIO Mode Acknowledge [3:3] read-only pin4 P4.4 GPIO Mode Acknowledge [4:4] read-only pin5 P4.5 GPIO Mode Acknowledge [5:5] read-only pin6 P4.6 GPIO Mode Acknowledge [6:6] read-only pin7 P4.7 GPIO Mode Acknowledge [7:7] read-only FREE_P5 Port P5 Free for GPIO Operation Flags 0x0054 read-write pin0 P5.0 GPIO Mode Acknowledge [0:0] read-only pin1 P5.1 GPIO Mode Acknowledge [1:1] read-only pin2 P5.2 GPIO Mode Acknowledge [2:2] read-only pin3 P5.3 GPIO Mode Acknowledge [3:3] read-only pin4 P5.4 GPIO Mode Acknowledge [4:4] read-only pin5 P5.5 GPIO Mode Acknowledge [5:5] read-only pin6 P5.6 GPIO Mode Acknowledge [6:6] read-only pin7 P5.7 GPIO Mode Acknowledge [7:7] read-only FREE_P6 Port P6 Free for GPIO Operation Flags 0x0058 read-write pin0 P6.0 GPIO Mode Acknowledge [0:0] read-only pin1 P6.1 GPIO Mode Acknowledge [1:1] read-only pin2 P6.2 GPIO Mode Acknowledge [2:2] read-only pin3 P6.3 GPIO Mode Acknowledge [3:3] read-only pin4 P6.4 GPIO Mode Acknowledge [4:4] read-only pin5 P6.5 GPIO Mode Acknowledge [5:5] read-only pin6 P6.6 GPIO Mode Acknowledge [6:6] read-only pin7 P6.7 GPIO Mode Acknowledge [7:7] read-only FREE_P7 Port P7 Free for GPIO Operation Flags 0x005C read-write pin0 P7.0 GPIO Mode Acknowledge [0:0] read-only pin1 P7.1 GPIO Mode Acknowledge [1:1] read-only pin2 P7.2 GPIO Mode Acknowledge [2:2] read-only pin3 P7.3 GPIO Mode Acknowledge [3:3] read-only pin4 P7.4 GPIO Mode Acknowledge [4:4] read-only pin5 P7.5 GPIO Mode Acknowledge [5:5] read-only pin6 P7.6 GPIO Mode Acknowledge [6:6] read-only pin7 P7.7 GPIO Mode Acknowledge [7:7] read-only FREE_P8 Port P8 Free for GPIO Operation Flags 0x0060 read-write pin0 P8.0 GPIO Mode Acknowledge [0:0] read-only pin1 P8.1 GPIO Mode Acknowledge [1:1] read-only pin2 P8.2 GPIO Mode Acknowledge [2:2] read-only pin3 P8.3 GPIO Mode Acknowledge [3:3] read-only pin4 P8.4 GPIO Mode Acknowledge [4:4] read-only pin5 P8.5 GPIO Mode Acknowledge [5:5] read-only pin6 P8.6 GPIO Mode Acknowledge [6:6] read-only pin7 P8.7 GPIO Mode Acknowledge [7:7] read-only OUT_MODE_P0 Port P0 GPIO Output Drive Mode 0x0080 read-write pin0 P0.0 Output Drive Mode [3:0] read-write pin1 P0.1 Output Drive Mode [7:4] read-write pin2 P0.2 Output Drive Mode [11:8] read-write pin3 P0.3 Output Drive Mode [15:12] read-write pin4 P0.4 Output Drive Mode [19:16] read-write pin5 P0.5 Output Drive Mode [23:20] read-write pin6 P0.6 Output Drive Mode [27:24] read-write pin7 P0.7 Output Drive Mode [31:28] read-write OUT_MODE_P1 Port P1 GPIO Output Drive Mode 0x0084 read-write pin0 P1.0 Output Drive Mode [3:0] read-write pin1 P1.1 Output Drive Mode [7:4] read-write pin2 P1.2 Output Drive Mode [11:8] read-write pin3 P1.3 Output Drive Mode [15:12] read-write pin4 P1.4 Output Drive Mode [19:16] read-write pin5 P1.5 Output Drive Mode [23:20] read-write pin6 P1.6 Output Drive Mode [27:24] read-write pin7 P1.7 Output Drive Mode [31:28] read-write OUT_MODE_P2 Port P2 GPIO Output Drive Mode 0x0088 read-write pin0 P2.0 Output Drive Mode [3:0] read-write pin1 P2.1 Output Drive Mode [7:4] read-write pin2 P2.2 Output Drive Mode [11:8] read-write pin3 P2.3 Output Drive Mode [15:12] read-write pin4 P2.4 Output Drive Mode [19:16] read-write pin5 P2.5 Output Drive Mode [23:20] read-write pin6 P2.6 Output Drive Mode [27:24] read-write pin7 P2.7 Output Drive Mode [31:28] read-write OUT_MODE_P3 Port P3 GPIO Output Drive Mode 0x008C read-write pin0 P3.0 Output Drive Mode [3:0] read-write pin1 P3.1 Output Drive Mode [7:4] read-write pin2 P3.2 Output Drive Mode [11:8] read-write pin3 P3.3 Output Drive Mode [15:12] read-write pin4 P3.4 Output Drive Mode [19:16] read-write pin5 P3.5 Output Drive Mode [23:20] read-write pin6 P3.6 Output Drive Mode [27:24] read-write pin7 P3.7 Output Drive Mode [31:28] read-write OUT_MODE_P4 Port P4 GPIO Output Drive Mode 0x0090 read-write pin0 P4.0 Output Drive Mode [3:0] read-write pin1 P4.1 Output Drive Mode [7:4] read-write pin2 P4.2 Output Drive Mode [11:8] read-write pin3 P4.3 Output Drive Mode [15:12] read-write pin4 P4.4 Output Drive Mode [19:16] read-write pin5 P4.5 Output Drive Mode [23:20] read-write pin6 P4.6 Output Drive Mode [27:24] read-write pin7 P4.7 Output Drive Mode [31:28] read-write OUT_MODE_P5 Port P5 GPIO Output Drive Mode 0x0094 read-write pin0 P5.0 Output Drive Mode [3:0] read-write pin1 P5.1 Output Drive Mode [7:4] read-write pin2 P5.2 Output Drive Mode [11:8] read-write pin3 P5.3 Output Drive Mode [15:12] read-write pin4 P5.4 Output Drive Mode [19:16] read-write pin5 P5.5 Output Drive Mode [23:20] read-write pin6 P5.6 Output Drive Mode [27:24] read-write pin7 P5.7 Output Drive Mode [31:28] read-write OUT_MODE_P6 Port P6 GPIO Output Drive Mode 0x0098 read-write pin0 P6.0 Output Drive Mode [3:0] read-write pin1 P6.1 Output Drive Mode [7:4] read-write pin2 P6.2 Output Drive Mode [11:8] read-write pin3 P6.3 Output Drive Mode [15:12] read-write pin4 P6.4 Output Drive Mode [19:16] read-write pin5 P6.5 Output Drive Mode [23:20] read-write pin6 P6.6 Output Drive Mode [27:24] read-write pin7 P6.7 Output Drive Mode [31:28] read-write OUT_MODE_P7 Port P7 GPIO Output Drive Mode 0x009C read-write pin0 P7.0 Output Drive Mode [3:0] read-write pin1 P7.1 Output Drive Mode [7:4] read-write pin2 P7.2 Output Drive Mode [11:8] read-write pin3 P7.3 Output Drive Mode [15:12] read-write pin4 P7.4 Output Drive Mode [19:16] read-write pin5 P7.5 Output Drive Mode [23:20] read-write pin6 P7.6 Output Drive Mode [27:24] read-write pin7 P7.7 Output Drive Mode [31:28] read-write OUT_MODE_P8 Port P8 GPIO Output Drive Mode 0x00A0 read-write pin0 P8.0 Output Drive Mode [3:0] read-write pin1 P8.1 Output Drive Mode [7:4] read-write pin2 P8.2 Output Drive Mode [11:8] read-write pin3 P8.3 Output Drive Mode [15:12] read-write pin4 P8.4 Output Drive Mode [19:16] read-write pin5 P8.5 Output Drive Mode [23:20] read-write pin6 P8.6 Output Drive Mode [27:24] read-write pin7 P8.7 Output Drive Mode [31:28] read-write OUT_VAL_P0 Port P0 GPIO Output Value 0x00C0 read-write pin0 P0.0 GPIO Output Drive Value [0:0] read-write pin1 P0.1 GPIO Output Drive Value [1:1] read-write pin2 P0.2 GPIO Output Drive Value [2:2] read-write pin3 P0.3 GPIO Output Drive Value [3:3] read-write pin4 P0.4 GPIO Output Drive Value [4:4] read-write pin5 P0.5 GPIO Output Drive Value [5:5] read-write pin6 P0.6 GPIO Output Drive Value [6:6] read-write pin7 P0.7 GPIO Output Drive Value [7:7] read-write OUT_VAL_P1 Port P1 GPIO Output Value 0x00C4 read-write pin0 P1.0 GPIO Output Drive Value [0:0] read-write pin1 P1.1 GPIO Output Drive Value [1:1] read-write pin2 P1.2 GPIO Output Drive Value [2:2] read-write pin3 P1.3 GPIO Output Drive Value [3:3] read-write pin4 P1.4 GPIO Output Drive Value [4:4] read-write pin5 P1.5 GPIO Output Drive Value [5:5] read-write pin6 P1.6 GPIO Output Drive Value [6:6] read-write pin7 P1.7 GPIO Output Drive Value [7:7] read-write OUT_VAL_P2 Port P2 GPIO Output Value 0x00C8 read-write pin0 P2.0 GPIO Output Drive Value [0:0] read-write pin1 P2.1 GPIO Output Drive Value [1:1] read-write pin2 P2.2 GPIO Output Drive Value [2:2] read-write pin3 P2.3 GPIO Output Drive Value [3:3] read-write pin4 P2.4 GPIO Output Drive Value [4:4] read-write pin5 P2.5 GPIO Output Drive Value [5:5] read-write pin6 P2.6 GPIO Output Drive Value [6:6] read-write pin7 P2.7 GPIO Output Drive Value [7:7] read-write OUT_VAL_P3 Port P3 GPIO Output Value 0x00CC read-write pin0 P3.0 GPIO Output Drive Value [0:0] read-write pin1 P3.1 GPIO Output Drive Value [1:1] read-write pin2 P3.2 GPIO Output Drive Value [2:2] read-write pin3 P3.3 GPIO Output Drive Value [3:3] read-write pin4 P3.4 GPIO Output Drive Value [4:4] read-write pin5 P3.5 GPIO Output Drive Value [5:5] read-write pin6 P3.6 GPIO Output Drive Value [6:6] read-write pin7 P3.7 GPIO Output Drive Value [7:7] read-write OUT_VAL_P4 Port P4 GPIO Output Value 0x00D0 read-write pin0 P4.0 GPIO Output Drive Value [0:0] read-write pin1 P4.1 GPIO Output Drive Value [1:1] read-write pin2 P4.2 GPIO Output Drive Value [2:2] read-write pin3 P4.3 GPIO Output Drive Value [3:3] read-write pin4 P4.4 GPIO Output Drive Value [4:4] read-write pin5 P4.5 GPIO Output Drive Value [5:5] read-write pin6 P4.6 GPIO Output Drive Value [6:6] read-write pin7 P4.7 GPIO Output Drive Value [7:7] read-write OUT_VAL_P5 Port P5 GPIO Output Value 0x00D4 read-write pin0 P5.0 GPIO Output Drive Value [0:0] read-write pin1 P5.1 GPIO Output Drive Value [1:1] read-write pin2 P5.2 GPIO Output Drive Value [2:2] read-write pin3 P5.3 GPIO Output Drive Value [3:3] read-write pin4 P5.4 GPIO Output Drive Value [4:4] read-write pin5 P5.5 GPIO Output Drive Value [5:5] read-write pin6 P5.6 GPIO Output Drive Value [6:6] read-write pin7 P5.7 GPIO Output Drive Value [7:7] read-write OUT_VAL_P6 Port P6 GPIO Output Value 0x00D8 read-write pin0 P6.0 GPIO Output Drive Value [0:0] read-write pin1 P6.1 GPIO Output Drive Value [1:1] read-write pin2 P6.2 GPIO Output Drive Value [2:2] read-write pin3 P6.3 GPIO Output Drive Value [3:3] read-write pin4 P6.4 GPIO Output Drive Value [4:4] read-write pin5 P6.5 GPIO Output Drive Value [5:5] read-write pin6 P6.6 GPIO Output Drive Value [6:6] read-write pin7 P6.7 GPIO Output Drive Value [7:7] read-write OUT_VAL_P7 Port P7 GPIO Output Value 0x00DC read-write pin0 P7.0 GPIO Output Drive Value [0:0] read-write pin1 P7.1 GPIO Output Drive Value [1:1] read-write pin2 P7.2 GPIO Output Drive Value [2:2] read-write pin3 P7.3 GPIO Output Drive Value [3:3] read-write pin4 P7.4 GPIO Output Drive Value [4:4] read-write pin5 P7.5 GPIO Output Drive Value [5:5] read-write pin6 P7.6 GPIO Output Drive Value [6:6] read-write pin7 P7.7 GPIO Output Drive Value [7:7] read-write OUT_VAL_P8 Port P8 GPIO Output Value 0x00E0 read-write pin0 P8.0 GPIO Output Drive Value [0:0] read-write pin1 P8.1 GPIO Output Drive Value [1:1] read-write pin2 P8.2 GPIO Output Drive Value [2:2] read-write pin3 P8.3 GPIO Output Drive Value [3:3] read-write pin4 P8.4 GPIO Output Drive Value [4:4] read-write pin5 P8.5 GPIO Output Drive Value [5:5] read-write pin6 P8.6 GPIO Output Drive Value [6:6] read-write pin7 P8.7 GPIO Output Drive Value [7:7] read-write FUNC_SEL_P0 Port P0 GPIO Function Select 0x0100 read-write pin0 P0.0 Output Function Select [3:0] read-write pin1 P0.1 Output Function Select [7:4] read-write pin2 P0.2 Output Function Select [11:8] read-write pin3 P0.3 Output Function Select [15:12] read-write pin4 P0.4 Output Function Select [19:16] read-write pin5 P0.5 Output Function Select [23:20] read-write pin6 P0.6 Output Function Select [27:24] read-write pin7 P0.7 Output Function Select [31:28] read-write FUNC_SEL_P1 Port P1 GPIO Function Select 0x0104 read-write pin0 P1.0 Output Function Select [3:0] read-write pin1 P1.1 Output Function Select [7:4] read-write pin2 P1.2 Output Function Select [11:8] read-write pin3 P1.3 Output Function Select [15:12] read-write pin4 P1.4 Output Function Select [19:16] read-write pin5 P1.5 Output Function Select [23:20] read-write pin6 P1.6 Output Function Select [27:24] read-write pin7 P1.7 Output Function Select [31:28] read-write FUNC_SEL_P2 Port P2 GPIO Function Select 0x0108 read-write pin0 P2.0 Output Function Select [3:0] read-write pin1 P2.1 Output Function Select [7:4] read-write pin2 P2.2 Output Function Select [11:8] read-write pin3 P2.3 Output Function Select [15:12] read-write pin4 P2.4 Output Function Select [19:16] read-write pin5 P2.5 Output Function Select [23:20] read-write pin6 P2.6 Output Function Select [27:24] read-write pin7 P2.7 Output Function Select [31:28] read-write FUNC_SEL_P3 Port P3 GPIO Function Select 0x010C read-write pin0 P3.0 Output Function Select [3:0] read-write pin1 P3.1 Output Function Select [7:4] read-write pin2 P3.2 Output Function Select [11:8] read-write pin3 P3.3 Output Function Select [15:12] read-write pin4 P3.4 Output Function Select [19:16] read-write pin5 P3.5 Output Function Select [23:20] read-write pin6 P3.6 Output Function Select [27:24] read-write pin7 P3.7 Output Function Select [31:28] read-write FUNC_SEL_P4 Port P4 GPIO Function Select 0x0110 read-write pin0 P4.0 Output Function Select [3:0] read-write pin1 P4.1 Output Function Select [7:4] read-write pin2 P4.2 Output Function Select [11:8] read-write pin3 P4.3 Output Function Select [15:12] read-write pin4 P4.4 Output Function Select [19:16] read-write pin5 P4.5 Output Function Select [23:20] read-write pin6 P4.6 Output Function Select [27:24] read-write pin7 P4.7 Output Function Select [31:28] read-write FUNC_SEL_P5 Port P5 GPIO Function Select 0x0114 read-write pin0 P5.0 Output Function Select [3:0] read-write pin1 P5.1 Output Function Select [7:4] read-write pin2 P5.2 Output Function Select [11:8] read-write pin3 P5.3 Output Function Select [15:12] read-write pin4 P5.4 Output Function Select [19:16] read-write pin5 P5.5 Output Function Select [23:20] read-write pin6 P5.6 Output Function Select [27:24] read-write pin7 P5.7 Output Function Select [31:28] read-write FUNC_SEL_P6 Port P6 GPIO Function Select 0x0118 read-write pin0 P6.0 Output Function Select [3:0] read-write pin1 P6.1 Output Function Select [7:4] read-write pin2 P6.2 Output Function Select [11:8] read-write pin3 P6.3 Output Function Select [15:12] read-write pin4 P6.4 Output Function Select [19:16] read-write pin5 P6.5 Output Function Select [23:20] read-write pin6 P6.6 Output Function Select [27:24] read-write pin7 P6.7 Output Function Select [31:28] read-write FUNC_SEL_P7 Port P7 GPIO Function Select 0x011C read-write pin0 P7.0 Output Function Select [3:0] read-write pin1 P7.1 Output Function Select [7:4] read-write pin2 P7.2 Output Function Select [11:8] read-write pin3 P7.3 Output Function Select [15:12] read-write pin4 P7.4 Output Function Select [19:16] read-write pin5 P7.5 Output Function Select [23:20] read-write pin6 P7.6 Output Function Select [27:24] read-write pin7 P7.7 Output Function Select [31:28] read-write FUNC_SEL_P8 Port P8 GPIO Function Select 0x0120 read-write pin0 P8.0 Output Function Select [3:0] read-write pin1 P8.1 Output Function Select [7:4] read-write IN_MODE_P0 Port P0 GPIO Input Monitoring Mode 0x0140 read-write pin0 P0.0 Input Monitoring Mode [1:0] read-write pin1 P0.1 Input Monitoring Mode [5:4] read-write pin2 P0.2 Input Monitoring Mode [9:8] read-write pin3 P0.3 Input Monitoring Mode [13:12] read-write pin4 P0.4 Input Monitoring Mode [17:16] read-write pin5 P0.5 Input Monitoring Mode [21:20] read-write pin6 P0.6 Input Monitoring Mode [25:24] read-write pin7 P0.7 Input Monitoring Mode [29:28] read-write IN_MODE_P1 Port P1 GPIO Input Monitoring Mode 0x0144 read-write pin0 P1.0 Input Monitoring Mode [1:0] read-write pin1 P1.1 Input Monitoring Mode [5:4] read-write pin2 P1.2 Input Monitoring Mode [9:8] read-write pin3 P1.3 Input Monitoring Mode [13:12] read-write pin4 P1.4 Input Monitoring Mode [17:16] read-write pin5 P1.5 Input Monitoring Mode [21:20] read-write pin6 P1.6 Input Monitoring Mode [25:24] read-write pin7 P1.7 Input Monitoring Mode [29:28] read-write IN_MODE_P2 Port P2 GPIO Input Monitoring Mode 0x0148 read-write pin0 P2.0 Input Monitoring Mode [1:0] read-write pin1 P2.1 Input Monitoring Mode [5:4] read-write pin2 P2.2 Input Monitoring Mode [9:8] read-write pin3 P2.3 Input Monitoring Mode [13:12] read-write pin4 P2.4 Input Monitoring Mode [17:16] read-write pin5 P2.5 Input Monitoring Mode [21:20] read-write pin6 P2.6 Input Monitoring Mode [25:24] read-write pin7 P2.7 Input Monitoring Mode [29:28] read-write IN_MODE_P3 Port P3 GPIO Input Monitoring Mode 0x014C read-write pin0 P3.0 Input Monitoring Mode [1:0] read-write pin1 P3.1 Input Monitoring Mode [5:4] read-write pin2 P3.2 Input Monitoring Mode [9:8] read-write pin3 P3.3 Input Monitoring Mode [13:12] read-write pin4 P3.4 Input Monitoring Mode [17:16] read-write pin5 P3.5 Input Monitoring Mode [21:20] read-write pin6 P3.6 Input Monitoring Mode [25:24] read-write pin7 P3.7 Input Monitoring Mode [29:28] read-write IN_MODE_P4 Port P4 GPIO Input Monitoring Mode 0x0150 read-write pin0 P4.0 Input Monitoring Mode [1:0] read-write pin1 P4.1 Input Monitoring Mode [5:4] read-write pin2 P4.2 Input Monitoring Mode [9:8] read-write pin3 P4.3 Input Monitoring Mode [13:12] read-write pin4 P4.4 Input Monitoring Mode [17:16] read-write pin5 P4.5 Input Monitoring Mode [21:20] read-write pin6 P4.6 Input Monitoring Mode [25:24] read-write pin7 P4.7 Input Monitoring Mode [29:28] read-write IN_MODE_P5 Port P5 GPIO Input Monitoring Mode 0x0154 read-write pin0 P5.0 Input Monitoring Mode [1:0] read-write pin1 P5.1 Input Monitoring Mode [5:4] read-write pin2 P5.2 Input Monitoring Mode [9:8] read-write pin3 P5.3 Input Monitoring Mode [13:12] read-write pin4 P5.4 Input Monitoring Mode [17:16] read-write pin5 P5.5 Input Monitoring Mode [21:20] read-write pin6 P5.6 Input Monitoring Mode [25:24] read-write pin7 P5.7 Input Monitoring Mode [29:28] read-write IN_MODE_P6 Port P6 GPIO Input Monitoring Mode 0x0158 read-write pin0 P6.0 Input Monitoring Mode [1:0] read-write pin1 P6.1 Input Monitoring Mode [5:4] read-write pin2 P6.2 Input Monitoring Mode [9:8] read-write pin3 P6.3 Input Monitoring Mode [13:12] read-write pin4 P6.4 Input Monitoring Mode [17:16] read-write pin5 P6.5 Input Monitoring Mode [21:20] read-write pin6 P6.6 Input Monitoring Mode [25:24] read-write pin7 P6.7 Input Monitoring Mode [29:28] read-write IN_MODE_P7 Port P7 GPIO Input Monitoring Mode 0x015C read-write pin0 P7.0 Input Monitoring Mode [1:0] read-write pin1 P7.1 Input Monitoring Mode [5:4] read-write pin2 P7.2 Input Monitoring Mode [9:8] read-write pin3 P7.3 Input Monitoring Mode [13:12] read-write pin4 P7.4 Input Monitoring Mode [17:16] read-write pin5 P7.5 Input Monitoring Mode [21:20] read-write pin6 P7.6 Input Monitoring Mode [25:24] read-write pin7 P7.7 Input Monitoring Mode [29:28] read-write IN_MODE_P8 Port P8 GPIO Input Monitoring Mode 0x0160 read-write pin0 P8.0 Input Monitoring Mode [1:0] read-write pin1 P8.1 Input Monitoring Mode [5:4] read-write pin2 P8.2 Input Monitoring Mode [9:8] read-write pin3 P8.3 Input Monitoring Mode [13:12] read-write pin4 P8.4 Input Monitoring Mode [17:16] read-write pin5 P8.5 Input Monitoring Mode [21:20] read-write pin6 P8.6 Input Monitoring Mode [25:24] read-write pin7 P8.7 Input Monitoring Mode [29:28] read-write IN_VAL_P0 Port P0 GPIO Input Value 0x0180 read-write pin0 P0.0 Input Value [0:0] read-only pin1 P0.1 Input Value [1:1] read-only pin2 P0.2 Input Value [2:2] read-only pin3 P0.3 Input Value [3:3] read-only pin4 P0.4 Input Value [4:4] read-only pin5 P0.5 Input Value [5:5] read-only pin6 P0.6 Input Value [6:6] read-only pin7 P0.7 Input Value [7:7] read-only IN_VAL_P1 Port P1 GPIO Input Value 0x0184 read-write pin0 P1.0 Input Value [0:0] read-only pin1 P1.1 Input Value [1:1] read-only pin2 P1.2 Input Value [2:2] read-only pin3 P1.3 Input Value [3:3] read-only pin4 P1.4 Input Value [4:4] read-only pin5 P1.5 Input Value [5:5] read-only pin6 P1.6 Input Value [6:6] read-only pin7 P1.7 Input Value [7:7] read-only IN_VAL_P2 Port P2 GPIO Input Value 0x0188 read-write pin0 P2.0 Input Value [0:0] read-only pin1 P2.1 Input Value [1:1] read-only pin2 P2.2 Input Value [2:2] read-only pin3 P2.3 Input Value [3:3] read-only pin4 P2.4 Input Value [4:4] read-only pin5 P2.5 Input Value [5:5] read-only pin6 P2.6 Input Value [6:6] read-only pin7 P2.7 Input Value [7:7] read-only IN_VAL_P3 Port P3 GPIO Input Value 0x018C read-write pin0 P3.0 Input Value [0:0] read-only pin1 P3.1 Input Value [1:1] read-only pin2 P3.2 Input Value [2:2] read-only pin3 P3.3 Input Value [3:3] read-only pin4 P3.4 Input Value [4:4] read-only pin5 P3.5 Input Value [5:5] read-only pin6 P3.6 Input Value [6:6] read-only pin7 P3.7 Input Value [7:7] read-only IN_VAL_P4 Port P4 GPIO Input Value 0x0190 read-write pin0 P4.0 Input Value [0:0] read-only pin1 P4.1 Input Value [1:1] read-only pin2 P4.2 Input Value [2:2] read-only pin3 P4.3 Input Value [3:3] read-only pin4 P4.4 Input Value [4:4] read-only pin5 P4.5 Input Value [5:5] read-only pin6 P4.6 Input Value [6:6] read-only pin7 P4.7 Input Value [7:7] read-only IN_VAL_P5 Port P5 GPIO Input Value 0x0194 read-write pin0 P5.0 Input Value [0:0] read-only pin1 P5.1 Input Value [1:1] read-only pin2 P5.2 Input Value [2:2] read-only pin3 P5.3 Input Value [3:3] read-only pin4 P5.4 Input Value [4:4] read-only pin5 P5.5 Input Value [5:5] read-only pin6 P5.6 Input Value [6:6] read-only pin7 P5.7 Input Value [7:7] read-only IN_VAL_P6 Port P6 GPIO Input Value 0x0198 read-write pin0 P6.0 Input Value [0:0] read-only pin1 P6.1 Input Value [1:1] read-only pin2 P6.2 Input Value [2:2] read-only pin3 P6.3 Input Value [3:3] read-only pin4 P6.4 Input Value [4:4] read-only pin5 P6.5 Input Value [5:5] read-only pin6 P6.6 Input Value [6:6] read-only pin7 P6.7 Input Value [7:7] read-only IN_VAL_P7 Port P7 GPIO Input Value 0x019C read-write pin0 P7.0 Input Value [0:0] read-only pin1 P7.1 Input Value [1:1] read-only pin2 P7.2 Input Value [2:2] read-only pin3 P7.3 Input Value [3:3] read-only pin4 P7.4 Input Value [4:4] read-only pin5 P7.5 Input Value [5:5] read-only pin6 P7.6 Input Value [6:6] read-only pin7 P7.7 Input Value [7:7] read-only IN_VAL_P8 Port P8 GPIO Input Value 0x01A0 read-write pin0 P8.0 Input Value [0:0] read-only pin1 P8.1 Input Value [1:1] read-only pin2 P8.2 Input Value [2:2] read-only pin3 P8.3 Input Value [3:3] read-only pin4 P8.4 Input Value [4:4] read-only pin5 P8.5 Input Value [5:5] read-only pin6 P8.6 Input Value [6:6] read-only pin7 P8.7 Input Value [7:7] read-only INT_MODE_P0 Port P0 Interrupt Detection Mode 0x01C0 read-write pin0 P0.0 GPIO Interrupt Detection Mode [2:0] read-write pin1 P0.1 GPIO Interrupt Detection Mode [6:4] read-write pin2 P0.2 GPIO Interrupt Detection Mode [10:8] read-write pin3 P0.3 GPIO Interrupt Detection Mode [14:12] read-write pin4 P0.4 GPIO Interrupt Detection Mode [18:16] read-write pin5 P0.5 GPIO Interrupt Detection Mode [22:20] read-write pin6 P0.6 GPIO Interrupt Detection Mode [26:24] read-write pin7 P0.7 GPIO Interrupt Detection Mode [30:28] read-write INT_MODE_P1 Port P1 Interrupt Detection Mode 0x01C4 read-write pin0 P1.0 GPIO Interrupt Detection Mode [2:0] read-write pin1 P1.1 GPIO Interrupt Detection Mode [6:4] read-write pin2 P1.2 GPIO Interrupt Detection Mode [10:8] read-write pin3 P1.3 GPIO Interrupt Detection Mode [14:12] read-write pin4 P1.4 GPIO Interrupt Detection Mode [18:16] read-write pin5 P1.5 GPIO Interrupt Detection Mode [22:20] read-write pin6 P1.6 GPIO Interrupt Detection Mode [26:24] read-write pin7 P1.7 GPIO Interrupt Detection Mode [30:28] read-write INT_MODE_P2 Port P2 Interrupt Detection Mode 0x01C8 read-write pin0 P2.0 GPIO Interrupt Detection Mode [2:0] read-write pin1 P2.1 GPIO Interrupt Detection Mode [6:4] read-write pin2 P2.2 GPIO Interrupt Detection Mode [10:8] read-write pin3 P2.3 GPIO Interrupt Detection Mode [14:12] read-write pin4 P2.4 GPIO Interrupt Detection Mode [18:16] read-write pin5 P2.5 GPIO Interrupt Detection Mode [22:20] read-write pin6 P2.6 GPIO Interrupt Detection Mode [26:24] read-write pin7 P2.7 GPIO Interrupt Detection Mode [30:28] read-write INT_MODE_P3 Port P3 Interrupt Detection Mode 0x01CC read-write pin0 P3.0 GPIO Interrupt Detection Mode [2:0] read-write pin1 P3.1 GPIO Interrupt Detection Mode [6:4] read-write pin2 P3.2 GPIO Interrupt Detection Mode [10:8] read-write pin3 P3.3 GPIO Interrupt Detection Mode [14:12] read-write pin4 P3.4 GPIO Interrupt Detection Mode [18:16] read-write pin5 P3.5 GPIO Interrupt Detection Mode [22:20] read-write pin6 P3.6 GPIO Interrupt Detection Mode [26:24] read-write pin7 P3.7 GPIO Interrupt Detection Mode [30:28] read-write INT_MODE_P4 Port P4 Interrupt Detection Mode 0x01D0 read-write pin0 P4.0 GPIO Interrupt Detection Mode [2:0] read-write pin1 P4.1 GPIO Interrupt Detection Mode [6:4] read-write pin2 P4.2 GPIO Interrupt Detection Mode [10:8] read-write pin3 P4.3 GPIO Interrupt Detection Mode [14:12] read-write pin4 P4.4 GPIO Interrupt Detection Mode [18:16] read-write pin5 P4.5 GPIO Interrupt Detection Mode [22:20] read-write pin6 P4.6 GPIO Interrupt Detection Mode [26:24] read-write pin7 P4.7 GPIO Interrupt Detection Mode [30:28] read-write INT_MODE_P5 Port P5 Interrupt Detection Mode 0x01D4 read-write pin0 P5.0 GPIO Interrupt Detection Mode [2:0] read-write pin1 P5.1 GPIO Interrupt Detection Mode [6:4] read-write pin2 P5.2 GPIO Interrupt Detection Mode [10:8] read-write pin3 P5.3 GPIO Interrupt Detection Mode [14:12] read-write pin4 P5.4 GPIO Interrupt Detection Mode [18:16] read-write pin5 P5.5 GPIO Interrupt Detection Mode [22:20] read-write pin6 P5.6 GPIO Interrupt Detection Mode [26:24] read-write pin7 P5.7 GPIO Interrupt Detection Mode [30:28] read-write INT_MODE_P6 Port P6 Interrupt Detection Mode 0x01D8 read-write pin0 P6.0 GPIO Interrupt Detection Mode [2:0] read-write pin1 P6.1 GPIO Interrupt Detection Mode [6:4] read-write pin2 P6.2 GPIO Interrupt Detection Mode [10:8] read-write pin3 P6.3 GPIO Interrupt Detection Mode [14:12] read-write pin4 P6.4 GPIO Interrupt Detection Mode [18:16] read-write pin5 P6.5 GPIO Interrupt Detection Mode [22:20] read-write pin6 P6.6 GPIO Interrupt Detection Mode [26:24] read-write pin7 P6.7 GPIO Interrupt Detection Mode [30:28] read-write INT_MODE_P7 Port P7 Interrupt Detection Mode 0x01DC read-write pin0 P7.0 GPIO Interrupt Detection Mode [2:0] read-write pin1 P7.1 GPIO Interrupt Detection Mode [6:4] read-write pin2 P7.2 GPIO Interrupt Detection Mode [10:8] read-write pin3 P7.3 GPIO Interrupt Detection Mode [14:12] read-write pin4 P7.4 GPIO Interrupt Detection Mode [18:16] read-write pin5 P7.5 GPIO Interrupt Detection Mode [22:20] read-write pin6 P7.6 GPIO Interrupt Detection Mode [26:24] read-write pin7 P7.7 GPIO Interrupt Detection Mode [30:28] read-write INT_MODE_P8 Port P8 Interrupt Detection Mode 0x01E0 read-write pin0 P8.0 GPIO Interrupt Detection Mode [2:0] read-write pin1 P8.1 GPIO Interrupt Detection Mode [6:4] read-write pin2 P8.2 GPIO Interrupt Detection Mode [10:8] read-write pin3 P8.3 GPIO Interrupt Detection Mode [14:12] read-write pin4 P8.4 GPIO Interrupt Detection Mode [18:16] read-write pin5 P8.5 GPIO Interrupt Detection Mode [22:20] read-write pin6 P8.6 GPIO Interrupt Detection Mode [26:24] read-write pin7 P8.7 GPIO Interrupt Detection Mode [30:28] read-write INTFL_P0 Port P0 Interrupt Flags 0x0200 read-write pin0 P0.0 External Interrupt Flags [0:0] read-write oneToClear pin1 P0.1 External Interrupt Flags [1:1] read-write oneToClear pin2 P0.2 External Interrupt Flags [2:2] read-write oneToClear pin3 P0.3 External Interrupt Flags [3:3] read-write oneToClear pin4 P0.4 External Interrupt Flags [4:4] read-write oneToClear pin5 P0.5 External Interrupt Flags [5:5] read-write oneToClear pin6 P0.6 External Interrupt Flags [6:6] read-write oneToClear pin7 P0.7 External Interrupt Flags [7:7] read-write oneToClear INTFL_P1 Port P1 Interrupt Flags 0x0204 read-write pin0 P1.0 External Interrupt Flags [0:0] read-write oneToClear pin1 P1.1 External Interrupt Flags [1:1] read-write oneToClear pin2 P1.2 External Interrupt Flags [2:2] read-write oneToClear pin3 P1.3 External Interrupt Flags [3:3] read-write oneToClear pin4 P1.4 External Interrupt Flags [4:4] read-write oneToClear pin5 P1.5 External Interrupt Flags [5:5] read-write oneToClear pin6 P1.6 External Interrupt Flags [6:6] read-write oneToClear pin7 P1.7 External Interrupt Flags [7:7] read-write oneToClear INTFL_P2 Port P2 Interrupt Flags 0x0208 read-write pin0 P2.0 External Interrupt Flags [0:0] read-write oneToClear pin1 P2.1 External Interrupt Flags [1:1] read-write oneToClear pin2 P2.2 External Interrupt Flags [2:2] read-write oneToClear pin3 P2.3 External Interrupt Flags [3:3] read-write oneToClear pin4 P2.4 External Interrupt Flags [4:4] read-write oneToClear pin5 P2.5 External Interrupt Flags [5:5] read-write oneToClear pin6 P2.6 External Interrupt Flags [6:6] read-write oneToClear pin7 P2.7 External Interrupt Flags [7:7] read-write oneToClear INTFL_P3 Port P3 Interrupt Flags 0x020C read-write pin0 P3.0 External Interrupt Flags [0:0] read-write oneToClear pin1 P3.1 External Interrupt Flags [1:1] read-write oneToClear pin2 P3.2 External Interrupt Flags [2:2] read-write oneToClear pin3 P3.3 External Interrupt Flags [3:3] read-write oneToClear pin4 P3.4 External Interrupt Flags [4:4] read-write oneToClear pin5 P3.5 External Interrupt Flags [5:5] read-write oneToClear pin6 P3.6 External Interrupt Flags [6:6] read-write oneToClear pin7 P3.7 External Interrupt Flags [7:7] read-write oneToClear INTFL_P4 Port P4 Interrupt Flags 0x0210 read-write pin0 P4.0 External Interrupt Flags [0:0] read-write oneToClear pin1 P4.1 External Interrupt Flags [1:1] read-write oneToClear pin2 P4.2 External Interrupt Flags [2:2] read-write oneToClear pin3 P4.3 External Interrupt Flags [3:3] read-write oneToClear pin4 P4.4 External Interrupt Flags [4:4] read-write oneToClear pin5 P4.5 External Interrupt Flags [5:5] read-write oneToClear pin6 P4.6 External Interrupt Flags [6:6] read-write oneToClear pin7 P4.7 External Interrupt Flags [7:7] read-write oneToClear INTFL_P5 Port P5 Interrupt Flags 0x0214 read-write pin0 P5.0 External Interrupt Flags [0:0] read-write oneToClear pin1 P5.1 External Interrupt Flags [1:1] read-write oneToClear pin2 P5.2 External Interrupt Flags [2:2] read-write oneToClear pin3 P5.3 External Interrupt Flags [3:3] read-write oneToClear pin4 P5.4 External Interrupt Flags [4:4] read-write oneToClear pin5 P5.5 External Interrupt Flags [5:5] read-write oneToClear pin6 P5.6 External Interrupt Flags [6:6] read-write oneToClear pin7 P5.7 External Interrupt Flags [7:7] read-write oneToClear INTFL_P6 Port P6 Interrupt Flags 0x0218 read-write pin0 P6.0 External Interrupt Flags [0:0] read-write oneToClear pin1 P6.1 External Interrupt Flags [1:1] read-write oneToClear pin2 P6.2 External Interrupt Flags [2:2] read-write oneToClear pin3 P6.3 External Interrupt Flags [3:3] read-write oneToClear pin4 P6.4 External Interrupt Flags [4:4] read-write oneToClear pin5 P6.5 External Interrupt Flags [5:5] read-write oneToClear pin6 P6.6 External Interrupt Flags [6:6] read-write oneToClear pin7 P6.7 External Interrupt Flags [7:7] read-write oneToClear INTFL_P7 Port P7 Interrupt Flags 0x021C read-write pin0 P7.0 External Interrupt Flags [0:0] read-write oneToClear pin1 P7.1 External Interrupt Flags [1:1] read-write oneToClear pin2 P7.2 External Interrupt Flags [2:2] read-write oneToClear pin3 P7.3 External Interrupt Flags [3:3] read-write oneToClear pin4 P7.4 External Interrupt Flags [4:4] read-write oneToClear pin5 P7.5 External Interrupt Flags [5:5] read-write oneToClear pin6 P7.6 External Interrupt Flags [6:6] read-write oneToClear pin7 P7.7 External Interrupt Flags [7:7] read-write oneToClear INTFL_P8 Port P8 Interrupt Flags 0x0220 read-write pin0 P8.0 External Interrupt Flags [0:0] read-write oneToClear pin1 P8.1 External Interrupt Flags [1:1] read-write oneToClear pin2 P8.2 External Interrupt Flags [2:2] read-write oneToClear pin3 P8.3 External Interrupt Flags [3:3] read-write oneToClear pin4 P8.4 External Interrupt Flags [4:4] read-write oneToClear pin5 P8.5 External Interrupt Flags [5:5] read-write oneToClear pin6 P8.6 External Interrupt Flags [6:6] read-write oneToClear pin7 P8.7 External Interrupt Flags [7:7] read-write oneToClear INTEN_P0 Port P0 Interrupt Enables 0x0240 read-write pin0 P0.0 External Interrupt Enable [0:0] read-write pin1 P0.1 External Interrupt Enable [1:1] read-write pin2 P0.2 External Interrupt Enable [2:2] read-write pin3 P0.3 External Interrupt Enable [3:3] read-write pin4 P0.4 External Interrupt Enable [4:4] read-write pin5 P0.5 External Interrupt Enable [5:5] read-write pin6 P0.6 External Interrupt Enable [6:6] read-write pin7 P0.7 External Interrupt Enable [7:7] read-write INTEN_P1 Port P1 Interrupt Enables 0x0244 read-write pin0 P1.0 External Interrupt Enable [0:0] read-write pin1 P1.1 External Interrupt Enable [1:1] read-write pin2 P1.2 External Interrupt Enable [2:2] read-write pin3 P1.3 External Interrupt Enable [3:3] read-write pin4 P1.4 External Interrupt Enable [4:4] read-write pin5 P1.5 External Interrupt Enable [5:5] read-write pin6 P1.6 External Interrupt Enable [6:6] read-write pin7 P1.7 External Interrupt Enable [7:7] read-write INTEN_P2 Port P2 Interrupt Enables 0x0248 read-write pin0 P2.0 External Interrupt Enable [0:0] read-write pin1 P2.1 External Interrupt Enable [1:1] read-write pin2 P2.2 External Interrupt Enable [2:2] read-write pin3 P2.3 External Interrupt Enable [3:3] read-write pin4 P2.4 External Interrupt Enable [4:4] read-write pin5 P2.5 External Interrupt Enable [5:5] read-write pin6 P2.6 External Interrupt Enable [6:6] read-write pin7 P2.7 External Interrupt Enable [7:7] read-write INTEN_P3 Port P3 Interrupt Enables 0x024C read-write pin0 P3.0 External Interrupt Enable [0:0] read-write pin1 P3.1 External Interrupt Enable [1:1] read-write pin2 P3.2 External Interrupt Enable [2:2] read-write pin3 P3.3 External Interrupt Enable [3:3] read-write pin4 P3.4 External Interrupt Enable [4:4] read-write pin5 P3.5 External Interrupt Enable [5:5] read-write pin6 P3.6 External Interrupt Enable [6:6] read-write pin7 P3.7 External Interrupt Enable [7:7] read-write INTEN_P4 Port P4 Interrupt Enables 0x0250 read-write pin0 P4.0 External Interrupt Enable [0:0] read-write pin1 P4.1 External Interrupt Enable [1:1] read-write pin2 P4.2 External Interrupt Enable [2:2] read-write pin3 P4.3 External Interrupt Enable [3:3] read-write pin4 P4.4 External Interrupt Enable [4:4] read-write pin5 P4.5 External Interrupt Enable [5:5] read-write pin6 P4.6 External Interrupt Enable [6:6] read-write pin7 P4.7 External Interrupt Enable [7:7] read-write INTEN_P5 Port P5 Interrupt Enables 0x0254 read-write pin0 P5.0 External Interrupt Enable [0:0] read-write pin1 P5.1 External Interrupt Enable [1:1] read-write pin2 P5.2 External Interrupt Enable [2:2] read-write pin3 P5.3 External Interrupt Enable [3:3] read-write pin4 P5.4 External Interrupt Enable [4:4] read-write pin5 P5.5 External Interrupt Enable [5:5] read-write pin6 P5.6 External Interrupt Enable [6:6] read-write pin7 P5.7 External Interrupt Enable [7:7] read-write INTEN_P6 Port P6 Interrupt Enables 0x0258 read-write pin0 P6.0 External Interrupt Enable [0:0] read-write pin1 P6.1 External Interrupt Enable [1:1] read-write pin2 P6.2 External Interrupt Enable [2:2] read-write pin3 P6.3 External Interrupt Enable [3:3] read-write pin4 P6.4 External Interrupt Enable [4:4] read-write pin5 P6.5 External Interrupt Enable [5:5] read-write pin6 P6.6 External Interrupt Enable [6:6] read-write pin7 P6.7 External Interrupt Enable [7:7] read-write INTEN_P7 Port P7 Interrupt Enables 0x025C read-write pin0 P7.0 External Interrupt Enable [0:0] read-write pin1 P7.1 External Interrupt Enable [1:1] read-write pin2 P7.2 External Interrupt Enable [2:2] read-write pin3 P7.3 External Interrupt Enable [3:3] read-write pin4 P7.4 External Interrupt Enable [4:4] read-write pin5 P7.5 External Interrupt Enable [5:5] read-write pin6 P7.6 External Interrupt Enable [6:6] read-write pin7 P7.7 External Interrupt Enable [7:7] read-write INTEN_P8 Port P8 Interrupt Enables 0x0260 read-write pin0 P8.0 External Interrupt Enable [0:0] read-write pin1 P8.1 External Interrupt Enable [1:1] read-write pin2 P8.2 External Interrupt Enable [2:2] read-write pin3 P8.3 External Interrupt Enable [3:3] read-write pin4 P8.4 External Interrupt Enable [4:4] read-write pin5 P8.5 External Interrupt Enable [5:5] read-write pin6 P8.6 External Interrupt Enable [6:6] read-write pin7 P8.7 External Interrupt Enable [7:7] read-write TMR0 16/32 bit Timer/Counters Timers 0x4000B000 32 read-write 0 0x1000 registers TMR0 22 Timer 0 IRQ TMR16_0 23 16-bit Timer 0 IRQ CTRL Timer Control Register 0x0000 read-write mode Operating Modes for 32-bit/16-bit Timers [2:0] read-write tmr2x16 Dual 16-bit Timer Mode [3:3] read-write prescale Timer Clock Prescale Setting [7:4] read-write polarity Timer I/O Polarity [8:8] read-write enable0 Enable 32-bit timer / 16-bit timer 0 [12:12] read-write enable1 Enable 16-bit timer 1 [13:13] read-write COUNT32 [32 bit] Current Count Value 0x0004 read-write TERM_CNT32 [32 bit] Terminal Count Setting 0x0008 read-write PWM_CAP32 [32 bit] PWM Compare Setting or Capture/Measure Value 0x000C read-write COUNT16_0 [16 bit] Current Count Value, 16-bit Timer 0 0x0010 read-write value Count Value [15:0] read-write TERM_CNT16_0 [16 bit] Terminal Count Setting, 16-bit Timer 0 0x0014 read-write term_count Terminal Count Setting [15:0] read-write COUNT16_1 [16 bit] Current Count Value, 16-bit Timer 1 0x0018 read-write value Count Value [15:0] read-write TERM_CNT16_1 [16 bit] Terminal Count Setting, 16-bit Timer 1 0x001C read-write term_count Terminal Count Setting [15:0] read-write INTFL Timer Module Interrupt Flags 0x0020 read-write timer0 Interrupt Flag for 32-bit Timer / 16-bit Timer 0 [0:0] read-write oneToClear timer1 Interrupt Flag for 16-bit Timer 1 [1:1] read-write oneToClear INTEN Timer Module Interrupt Enable/Disable Settings 0x0024 read-write timer0 Interrupt Enable for 32-bit Timer / 16-bit Timer 0 [0:0] read-write timer1 Interrupt Enable for 16-bit Timer 1 [1:1] read-write TMR1 Timers 0x4000C000 TMR1 24 Timer 1 IRQ TMR16_1 25 16-bit Timer 1 IRQ TMR2 Timers 0x4000D000 TMR2 26 Timer 2 IRQ TMR16_2 27 16-bit Timer 2 IRQ TMR3 Timers 0x4000E000 TMR328Timer 3 IRQ TMR16_3 29 16-bit Timer 3 IRQ TMR4 Timers 0x4000F000 TMR4 30 Timer 4 IRQ TMR16_4 31 16-bit Timer 4 IRQ TMR5 Timers 0x40010000 TMR5 32 Timer 5 IRQ TMR16_5 33 16-bit Timer 5 IRQ UART0 UART / Serial Port Interface UARTs 0x40012000 32 read-write 0 0x1000 registers UART0 34 UART 0 IRQ CTRL UART Control Register 0x0000 read-write uart_en UART Enable [0:0] read-write rx_fifo_en RX FIFO Enable [1:1] read-write tx_fifo_en TX FIFO Enable [2:2] read-write data_size Data Size [5:4] read-write extra_stop Extra Stop Enable [8:8] read-write parity Parity Mode [13:12] read-write cts_en CTS Enable [16:16] read-write cts_polarity CTS Polarity [17:17] read-write rts_en RTS Enable [18:18] read-write rts_polarity RTS Polarity [19:19] read-write rts_level RX FIFO LTE Level for RTS Assert [25:20] read-write BAUD UART Baud Control Register 0x0004 read-write baud_divisor Baud Divisor [7:0] read-write TX_FIFO_CTRL UART TX Fifo Control Register 0x0008 read-write fifo_entry TX FIFO Entries [4:0] read-only fifo_ae_lvl TX FIFO AE Level [21:16] read-write RX_FIFO_CTRL UART RX Fifo Control Register 0x000C read-write fifo_entry RX FIFO Entries [4:0] read-only fifo_af_lvl RX FIFO AF Level [21:16] read-write MD_CTRL UART Multidrop Control Register 0x0010 read-write slave_addr Slave Address [7:0] read-write slave_addr_msk Slave Address Mask [15:8] read-write md_mstr Multidrop Master [16:16] read-write tx_addr_mark RX Address Mark [17:17] read-write INTFL UART Interrupt Flags 0x0014 read-write tx_done TX Done Interrupt Flag [0:0] read-write oneToClear tx_unstalled TX Unstalled Interrupt Flag [1:1] read-write oneToClear tx_fifo_ae TX FIFO Almost Empty Interrupt Flag [2:2] read-write oneToClear rx_fifo_not_empty RX FIFO Not Empty Interrupt Flag [3:3] read-write oneToClear rx_stalled RX Stalled Interrupt Flag [4:4] read-write oneToClear rx_fifo_af RX FIFO Almost Full Interrupt Flag [5:5] read-write oneToClear rx_fifo_overflow RX FIFO Overflow Interrupt Flag [6:6] read-write oneToClear rx_framing_err RX Framing Error Interrupt Flag [7:7] read-write oneToClear rx_parity_err RX Parity Error Interrupt Flag [8:8] read-write oneToClear INTEN UART Interrupt Enable/Disable Controls 0x0018 read-write tx_done TX Done Interrupt Enable/Disable [0:0] read-write tx_unstalled TX Unstalled Interrupt Enable/Disable [1:1] read-write tx_fifo_ae TX FIFO Almost Empty Interrupt Enable/Disable [2:2] read-write rx_fifo_not_empty RX FIFO Not Empty Interrupt Enable/Disable [3:3] read-write rx_stalled RX Stalled Interrupt Enable/Disable [4:4] read-write rx_fifo_af RX FIFO Almost Full Interrupt Enable/Disable [5:5] read-write rx_fifo_overflow RX FIFO Overflow Interrupt Enable/Disable [6:6] read-write rx_framing_err RX Framing Error Interrupt Enable/Disable [7:7] read-write rx_parity_err RX Parity Error Interrupt Enable/Disable [8:8] read-write UART1 UARTs UART1 35 UART 1 IRQ 0x40013000 UART2 UARTs UART2 36 UART 2 IRQ 0x40014000 UART3 UARTs UART3 37 UART 3 IRQ 0x40015000 PTG Pulse Train Generation Pulse Train 0x40011000 32 read-write 0 0x0010 registers PT 38 Pulse Train IRQ ENABLE Global Enable/Disable Controls for All Pulse Trains 0x0000 read-write pt0 Enable/Disable control for PT0 [0:0] read-write pt1 Enable/Disable control for PT1 [1:1] read-write pt2 Enable/Disable control for PT2 [2:2] read-write pt3 Enable/Disable control for PT3 [3:3] read-write pt4 Enable/Disable control for PT4 [4:4] read-write pt5 Enable/Disable control for PT5 [5:5] read-write pt6 Enable/Disable control for PT6 [6:6] read-write pt7 Enable/Disable control for PT7 [7:7] read-write pt8 Enable/Disable control for PT8 [8:8] read-write pt9 Enable/Disable control for PT9 [9:9] read-write pt10 Enable/Disable control for PT10 [10:10] read-write pt11 Enable/Disable control for PT11 [11:11] read-write pt12 Enable/Disable control for PT12 [12:12] read-write pt13 Enable/Disable control for PT13 [13:13] read-write pt14 Enable/Disable control for PT14 [14:14] read-write pt15 Enable/Disable control for PT15 [15:15] read-write RESYNC Global Resync (All Pulse Trains) Control 0x0004 read-write pt0 Resync control for PT0 [0:0] read-write pt1 Resync control for PT1 [1:1] read-write pt2 Resync control for PT2 [2:2] read-write pt3 Resync control for PT3 [3:3] read-write pt4 Resync control for PT4 [4:4] read-write pt5 Resync control for PT5 [5:5] read-write pt6 Resync control for PT6 [6:6] read-write pt7 Resync control for PT7 [7:7] read-write pt8 Resync control for PT8 [8:8] read-write pt9 Resync control for PT9 [9:9] read-write pt10 Resync control for PT10 [10:10] read-write pt11 Resync control for PT11 [11:11] read-write pt12 Resync control for PT12 [12:12] read-write pt13 Resync control for PT13 [13:13] read-write pt14 Resync control for PT14 [14:14] read-write pt15 Resync control for PT15 [15:15] read-write INTFL Pulse Train Interrupt Flags 0x0008 read-write pt0 Pulse Train 0 Stopped Interrupt Flag [0:0] read-write pt1 Pulse Train 1 Stopped Interrupt Flag [1:1] read-write pt2 Pulse Train 2 Stopped Interrupt Flag [2:2] read-write pt3 Pulse Train 3 Stopped Interrupt Flag [3:3] read-write pt4 Pulse Train 4 Stopped Interrupt Flag [4:4] read-write pt5 Pulse Train 5 Stopped Interrupt Flag [5:5] read-write pt6 Pulse Train 6 Stopped Interrupt Flag [6:6] read-write pt7 Pulse Train 7 Stopped Interrupt Flag [7:7] read-write pt8 Pulse Train 8 Stopped Interrupt Flag [8:8] read-write pt9 Pulse Train 9 Stopped Interrupt Flag [9:9] read-write pt10 Pulse Train 10 Stopped Interrupt Flag [10:10] read-write pt11 Pulse Train 11 Stopped Interrupt Flag [11:11] read-write pt12 Pulse Train 12 Stopped Interrupt Flag [12:12] read-write pt13 Pulse Train 13 Stopped Interrupt Flag [13:13] read-write pt14 Pulse Train 14 Stopped Interrupt Flag [14:14] read-write pt15 Pulse Train 15 Stopped Interrupt Flag [15:15] read-write INTEN Pulse Train Interrupt Enable/Disable 0x000C read-write pt0 Pulse Train 0 Stopped Interrupt Enable/Disable [0:0] read-write pt1 Pulse Train 1 Stopped Interrupt Enable/Disable [1:1] read-write pt2 Pulse Train 2 Stopped Interrupt Enable/Disable [2:2] read-write pt3 Pulse Train 3 Stopped Interrupt Enable/Disable [3:3] read-write pt4 Pulse Train 4 Stopped Interrupt Enable/Disable [4:4] read-write pt5 Pulse Train 5 Stopped Interrupt Enable/Disable [5:5] read-write pt6 Pulse Train 6 Stopped Interrupt Enable/Disable [6:6] read-write pt7 Pulse Train 7 Stopped Interrupt Enable/Disable [7:7] read-write pt8 Pulse Train 8 Stopped Interrupt Enable/Disable [8:8] read-write pt9 Pulse Train 9 Stopped Interrupt Enable/Disable [9:9] read-write pt10 Pulse Train 10 Stopped Interrupt Enable/Disable [10:10] read-write pt11 Pulse Train 11 Stopped Interrupt Enable/Disable [11:11] read-write pt12 Pulse Train 12 Stopped Interrupt Enable/Disable [12:12] read-write pt13 Pulse Train 13 Stopped Interrupt Enable/Disable [13:13] read-write pt14 Pulse Train 14 Stopped Interrupt Enable/Disable [14:14] read-write pt15 Pulse Train 15 Stopped Interrupt Enable/Disable [15:15] read-write PT0 Pulse Train Generation Pulse Train 0x40011010 32 read-write 0 0x000C registers RATE_LENGTH Pulse Train Configuration 0x0000 read-write rate_control Pulse Train Enable/Rate Control [26:0] read-write mode Pulse Train Output Mode/Train Length 32_BIT Pulse train, 32 bit pattern. 0 SQUARE_WAVE Square wave mode. 1 2_BIT Pulse train, 2 bit pattern. 2 3_BIT Pulse train, 3 bit pattern. 3 4_BIT Pulse train, 4 bit pattern. 4 5_BIT Pulse train, 5 bit pattern. 5 6_BIT Pulse train, 6 bit pattern. 6 7_BIT Pulse train, 7 bit pattern. 7 8_BIT Pulse train, 8 bit pattern. 8 9_BIT Pulse train, 9 bit pattern. 9 10_BIT Pulse train, 10 bit pattern. 10 11_BIT Pulse train, 11 bit pattern. 11 12_BIT Pulse train, 12 bit pattern. 12 13_BIT Pulse train, 13 bit pattern. 13 14_BIT Pulse train, 14 bit pattern. 14 15_BIT Pulse train, 15 bit pattern. 15 16_BIT Pulse train, 16 bit pattern. 16 17_BIT Pulse train, 17 bit pattern. 17 18_BIT Pulse train, 18 bit pattern. 18 19_BIT Pulse train, 19 bit pattern. 19 20_BIT Pulse train, 20 bit pattern. 20 21_BIT Pulse train, 21 bit pattern. 21 22_BIT Pulse train, 22 bit pattern. 22 23_BIT Pulse train, 23 bit pattern. 23 24_BIT Pulse train, 24 bit pattern. 24 25_BIT Pulse train, 25 bit pattern. 25 26_BIT Pulse train, 26 bit pattern. 26 27_BIT Pulse train, 27 bit pattern. 27 28_BIT Pulse train, 28 bit pattern. 28 29_BIT Pulse train, 29 bit pattern. 29 30_BIT Pulse train, 30 bit pattern. 30 31_BIT Pulse train, 31 bit pattern. 31 [31:27] read-write TRAIN Pulse Train Output Pattern 0x0004 read-write LOOP Pulse Train Loop Count 0x0008 read-write PT1 Pulse Train 0x4001101C PT2 Pulse Train 0x40011028 PT3 Pulse Train 0x40011034 PT4 Pulse Train 0x40011040 PT5 Pulse Train 0x4001104C PT6 Pulse Train 0x40011058 PT7 Pulse Train 0x40011064 PT8 Pulse Train 0x40011070 PT9 Pulse Train 0x4001107C PT10 Pulse Train 0x40011088 PT11 Pulse Train 0x40011094 PT12 Pulse Train 0x400110A0 PT13 Pulse Train 0x400110AC PT14 Pulse Train 0x400110B8 PT15 Pulse Train 0x400110C4 I2CM0 I2C Master 0 Interface I2C Master 0x40016000 32 read-write 0 0x1000 registers I2CM0 39 I2C Master 0 IRQ FS_CLK_DIV Full Speed SCL Clock Settings 0x0000 read-write fs_filter_clk_div Full Speed Filter Clock Divisor [7:0] read-write fs_scl_lo_cnt Full Speed SCL Low Count [19:8] read-write fs_scl_hi_cnt Full Speed SCL High Count [31:20] read-write TIMEOUT Timeout and Auto-Stop Settings 0x000C read-write tx_timeout Transaction Timeout Limit [23:16] read-write auto_stop_en Auto-Stop Enable [24:24] read-write CTRL I2C Master Control Register 0x0010 read-write tx_fifo_en Master Transaction FIFO Enable [2:2] read-write rx_fifo_en Master Results FIFO Enable [3:3] read-write mstr_reset_en Master Reset [7:7] read-write TRANS I2C Master Transaction Start and Status Flags 0x0014 read-write tx_start Start Transaction [0:0] read-write tx_in_progress Transaction In Progress [1:1] read-only tx_done Transaction Done [2:2] read-only tx_nacked Transaction Nacked [3:3] read-only tx_lost_arbitr Transaction Lost Arbitration [4:4] read-only tx_timeout Transaction Timed Out [5:5] read-only INTFL Interrupt Flags 0x0018 read-write tx_done Transaction Done Int Status [0:0] read-write oneToClear tx_nacked Transaction NACKed Int Status [1:1] read-write oneToClear tx_lost_arbitr Transaction Lost Arbitration Int Status [2:2] read-write oneToClear tx_timeout Transaction Timed Out Int Status [3:3] read-write oneToClear tx_fifo_empty Transaction FIFO Empty Int Status [4:4] read-write oneToClear tx_fifo_3q_empty Transaction FIFO 3Q Empty Int Status [5:5] read-write oneToClear rx_fifo_not_empty Results FIFO Not Empty Int Status [6:6] read-write oneToClear rx_fifo_2q_full Results FIFO 2Q Full Int Status [7:7] read-write oneToClear rx_fifo_3q_full Results FIFO 3Q Full Int Status [8:8] read-write oneToClear rx_fifo_full Results FIFO Full Int Status [9:9] read-write oneToClear INTEN Interrupt Enable/Disable Controls 0x001C read-write tx_done Transaction Done Int Enable [0:0] read-write tx_nacked Transaction NACKed Int Enable [1:1] read-write tx_lost_arbitr Transaction Lost Arbitration IntEnable [2:2] read-write tx_timeout Transaction Timed Out Int Enable [3:3] read-write tx_fifo_empty Transaction FIFO Empty Int Enable [4:4] read-write tx_fifo_3q_empty Transaction FIFO 3Q Empty Int Enable [5:5] read-write rx_fifo_not_empty Results FIFO Not Empty Int Enable [6:6] read-write rx_fifo_2q_full Results FIFO 2Q Full Int Enable [7:7] read-write rx_fifo_3q_full Results FIFO 3Q Full Int Enable [8:8] read-write rx_fifo_full Results FIFO Full Int Enable [9:9] read-write BB Bit-Bang Control Register 0x0028 read-write bb_scl_out Bit Bang SCL Output [0:0] read-write bb_sda_out Bit Bang SDA Output [1:1] read-write bb_scl_in_val Bit Bang SCL Input Value [2:2] read-only bb_sda_in_val Bit Bang SCL Input Value [3:3] read-only rx_fifo_cnt Results FIFO Data Received Count [20:16] read-only I2CM1 I2C Master I2CM1 40 I2C Master 1 IRQ 0x40017000 I2CM2 I2C Master I2CM2 41 I2C Master 2 IRQ 0x40018000 I2CS I2C Slave Interface I2C Slave I2CS 42 I2C Slave IRQ 0x40019000 32 read-write 0 0x1000 registers CLK_DIV I2C Slave Clock Divisor Control 0x0000 read-write fs_filter_clock_div FS Filter Clock Divisor [7:0] read-write DEV_ID I2C Slave Device ID Register 0x0004 read-write slave_dev_id Slave Device ID [9:0] read-write ten_bit_id_mode 10-bit ID Mode [12:12] read-write slave_reset Slave Reset [14:14] read-write INTFL I2CS Interrupt Flags 0x0008 read-write byte0 Updated Byte 0 [0:0] read-write oneToClear byte1 Updated Byte 1 [1:1] read-write oneToClear byte2 Updated Byte 2 [2:2] read-write oneToClear byte3 Updated Byte 3 [3:3] read-write oneToClear byte4 Updated Byte 4 [4:4] read-write oneToClear byte5 Updated Byte 5 [5:5] read-write oneToClear byte6 Updated Byte 6 [6:6] read-write oneToClear byte7 Updated Byte 7 [7:7] read-write oneToClear byte8 Updated Byte 8 [8:8] read-write oneToClear byte9 Updated Byte 9 [9:9] read-write oneToClear byte10 Updated Byte 10 [10:10] read-write oneToClear byte11 Updated Byte 11 [11:11] read-write oneToClear byte12 Updated Byte 12 [12:12] read-write oneToClear byte13 Updated Byte 13 [13:13] read-write oneToClear byte14 Updated Byte 14 [14:14] read-write oneToClear byte15 Updated Byte 15 [15:15] read-write oneToClear byte16 Updated Byte 16 [16:16] read-write oneToClear byte17 Updated Byte 17 [17:17] read-write oneToClear byte18 Updated Byte 18 [18:18] read-write oneToClear byte19 Updated Byte 19 [19:19] read-write oneToClear byte20 Updated Byte 20 [20:20] read-write oneToClear byte21 Updated Byte 21 [21:21] read-write oneToClear byte22 Updated Byte 22 [22:22] read-write oneToClear byte23 Updated Byte 23 [23:23] read-write oneToClear byte24 Updated Byte 24 [24:24] read-write oneToClear byte25 Updated Byte 25 [25:25] read-write oneToClear byte26 Updated Byte 26 [26:26] read-write oneToClear byte27 Updated Byte 27 [27:27] read-write oneToClear byte28 Updated Byte 28 [28:28] read-write oneToClear byte29 Updated Byte 29 [29:29] read-write oneToClear byte30 Updated Byte 30 [30:30] read-write oneToClear byte31 Updated Byte 31 [31:31] read-write oneToClear INTEN I2CS Interrupt Enable/Disable Controls 0x000C read-write byte0 Updated Byte 0 [0:0] read-write byte1 Updated Byte 1 [1:1] read-write byte2 Updated Byte 2 [2:2] read-write byte3 Updated Byte 3 [3:3] read-write byte4 Updated Byte 4 [4:4] read-write byte5 Updated Byte 5 [5:5] read-write byte6 Updated Byte 6 [6:6] read-write byte7 Updated Byte 7 [7:7] read-write byte8 Updated Byte 8 [8:8] read-write byte9 Updated Byte 9 [9:9] read-write byte10 Updated Byte 10 [10:10] read-write byte11 Updated Byte 11 [11:11] read-write byte12 Updated Byte 12 [12:12] read-write byte13 Updated Byte 13 [13:13] read-write byte14 Updated Byte 14 [14:14] read-write byte15 Updated Byte 15 [15:15] read-write byte16 Updated Byte 16 [16:16] read-write byte17 Updated Byte 17 [17:17] read-write byte18 Updated Byte 18 [18:18] read-write byte19 Updated Byte 19 [19:19] read-write byte20 Updated Byte 20 [20:20] read-write byte21 Updated Byte 21 [21:21] read-write byte22 Updated Byte 22 [22:22] read-write byte23 Updated Byte 23 [23:23] read-write byte24 Updated Byte 24 [24:24] read-write byte25 Updated Byte 25 [25:25] read-write byte26 Updated Byte 26 [26:26] read-write byte27 Updated Byte 27 [27:27] read-write byte28 Updated Byte 28 [28:28] read-write byte29 Updated Byte 29 [29:29] read-write byte30 Updated Byte 30 [30:30] read-write byte31 Updated Byte 31 [31:31] read-write DATA_BYTE I2CS Data Byte 0x0010 read-write data_field Data Field [7:0] read-write read_only_fl Read Only Flag [8:8] read-write data_updated_fl Byte Updated Flag [9:9] read-only SPIM0 SPI Master Interface SPI Master 0x4001A000 32 read-write 0 0x1000 registers SPIM0 43 SPI Master 0 IRQ MSTR_CFG SPI Master Configuration Register 0x0000 read-write slave_sel SPI Slave Select [2:0] read-write three_wire_mode 3-Wire Mode [3:3] read-write spi_mode SPI Mode [5:4] read-write page_size Page Size [7:6] read-write sck_hi_clk SCK High Clocks [11:8] read-write sck_lo_clk SCK Low Clocks [15:12] read-write act_delay SS Active Timing [17:16] read-write inact_delay SS Inactive Timing [19:18] read-write sdio_sample_point SDIO Sample Point [23:20] read-write SS_SR_POLARITY Polarity Control for SS and SR Signals 0x0004 read-write ss_polarity SS Signal Polarity [7:0] read-write fc_polarity SR Signal Polarity [FC Polarity] [15:8] read-write GEN_CTRL SPI Master General Control Register 0x0008 read-write spi_mstr_en Enable/Disable SPI Master [0:0] read-write tx_fifo_en Transaction FIFO Enable [1:1] read-write rx_fifo_en Results FIFO Enable [2:2] read-write bit_bang_mode Bit Bang Mode Enable [3:3] read-write bb_ss_in_out Bit Bang SS Input/Output [4:4] read-write bb_sr_in Bit Bang SR Input [5:5] read-only bb_sck_in_out Bit Bang SCK Input/Output [6:6] read-write bb_sdio_in Bit Bang SDIO Input [11:8] read-only bb_sdio_out Bit Bang SDIO Output [15:12] read-write bb_sdio_dr_en Bit Bang SDIO Drive Enable [19:16] read-write enable_sck_fb_mode Enable SCK_FB Mode [24:24] read-write FIFO_CTRL SPI Master FIFO Control Register 0x000C read-write tx_fifo_ae_lvl Transaction FIFO AE Level [3:0] read-write tx_fifo_used Transaction FIFO Used [12:8] read-only rx_fifo_af_lvl Results FIFO AF Level [20:16] read-write rx_fifo_used Results FIFO Used [29:24] read-only SPCL_CTRL SPI Master Special Mode Controls 0x0010 read-write ss_sample_mode SS Sample Mode [0:0] read-write miso_fc_en SDIO(1) to SR(0) Mode [1:1] read-write ss_sa_sdio_out SDIO Active Output Value [7:4] read-write ss_sa_sdio_dr_en SDIO Active Drive Mode [11:8] read-write INTFL SPI Master Interrupt Flags 0x0014 read-write tx_stalled Transaction Stalled Int Status [0:0] read-write oneToClear rx_stalled Results Stalled Int Status [1:1] read-write oneToClear tx_ready Transaction Ready Int Status [2:2] read-write oneToClear rx_done Results Done Int Status [3:3] read-write oneToClear tx_fifo_ae TXFIFO Almost Empty Int Status [4:4] read-write oneToClear rx_fifo_af RXFIFO Almost Full Int Status [5:5] read-write oneToClear INTEN SPI Master Interrupt Enable/Disable Settings 0x0018 read-write tx_stalled Transaction Stalled Int Enable [0:0] read-write rx_stalled Results Stalled Int Enable [1:1] read-write tx_ready Transaction Ready Int Enable [2:2] read-write rx_done Results Done Int Enable [3:3] read-write tx_fifo_ae TXFIFO Almost Empty Int Enable [4:4] read-write rx_fifo_af RXFIFO Almost Full Int Enable [5:5] read-write SPIM1 SPI Master SPIM1 44 SPI Master 1 IRQ 0x4001B000 SPIM2 SPI Master SPIM2 45 SPI Master 2 IRQ 0x4001C000 OWM 1-Wire Master Interface 1-Wire Master OWM 47 1-Wire Master IRQ 0x4001E000 32 read-write 0 0x1000 registers CFG 1-Wire Master Configuration 0x0000 read-write long_line_mode Long Line Mode [0:0] read-write force_pres_det Force Line During Presence Detect [1:1] read-write bit_bang_en Bit Bang Enable [2:2] read-write ext_pullup_mode Provide an extra output to control an external pullup. [3:3] read-write ext_pullup_enable Enable External Pullup [4:4] read-write single_bit_mode Enable Single Bit TX/RX Mode [5:5] read-write overdrive Enables overdrive speed for 1-Wire operations. [6:6] read-write int_pullup_enable Enable internal pullup. [7:7] read-write CLK_DIV_1US 1-Wire Master Clock Divisor 0x0004 read-write divisor Clock Divisor for 1MHz [7:0] read-write CTRL_STAT 1-Wire Master Control/Status 0x0008 read-write start_ow_reset Start OW Reset [0:0] read-write sra_mode SRA Mode [1:1] read-write bit_bang_oe Bit Bang Output Enable [2:2] read-write ow_input OW Input State [3:3] read-only presence_detect Presence Pulse Detected [7:7] read-write DATA 1-Wire Master Data Buffer 0x000C read-write tx_rx Tx/Rx Buffer [7:0] read-write INTFL 1-Wire Master Interrupt Flags 0x0010 read-write ow_reset_done OW Reset Sequence Completed [0:0] read-write oneToClear tx_data_empty Tx Data Empty Interrupt Flag [1:1] read-write oneToClear rx_data_ready Rx Data Ready Interrupt Flag [2:2] read-write oneToClear line_short OW Line Short Detected Interrupt Flag [3:3] read-write oneToClear line_low OW Line Low Detected Interrupt Flag [4:4] read-write oneToClear INTEN 1-Wire Master Interrupt Enables 0x0014 read-write ow_reset_done OW Reset Sequence Completed [0:0] read-write tx_data_empty Tx Data Empty Interrupt Enable [1:1] read-write rx_data_ready Rx Data Ready Interrupt Enable [2:2] read-write line_short OW Line Short Detected Interrupt Enable [3:3] read-write line_low OW Line Low Detected Interrupt Enable [4:4] read-write ADC 10-bit Analog to Digital Converter ADC 48 ADC IRQ 0x4001F000 32 read-write 0 0x1000 registers CTRL ADC Control 0x0000 read-write cpu_adc_start Start ADC Conversion [0:0] read-write adc_pu ADC Power Up [1:1] read-write buf_pu ADC Input Buffer Power Up [2:2] read-write adc_refbuf_pu ADC Reference Buffer Power Up [3:3] read-write adc_chgpump_pu ADC Charge Pump Power Up [4:4] read-write buf_chop_dis ADC Input Buffer Chop Disable (INTERNAL ONLY) [5:5] read-write buf_pump_dis Disable Use of Charge Pump Output by Input Buffer (INTERNAL) [6:6] read-write buf_bypass Bypass Input Buffer [7:7] read-write adc_refscl ADC Reference Scale [8:8] read-write adc_scale ADC Scale [9:9] read-write adc_refsel ADC Reference (VRef) Select (INTERNAL ONLY) [10:10] read-write adc_clk_en ADC Clock Enable [11:11] read-write adc_chsel ADC Channel Select [15:12] read-write adc_xref Enable Use of ADC External Reference [16:16] read-write adc_dataalign ADC Data Alignment Select [17:17] read-write afe_pwr_up_dly Delay from ADC Powerup Until ADC Ready Asserted [31:24] read-write STATUS ADC Status 0x0004 read-write adc_active ADC Conversion In Progress [0:0] read-only ro_cal_atomic_active RO Frequency Calibration Active (If Atomic) [1:1] read-only afe_pwr_up_active AFE Power Up Delay Active [2:2] read-only adc_overflow ADC Overflow [3:3] read-only DATA ADC Output Data 0x0008 read-write adc_data ADC Converted Sample Data Output [15:0] read-only INTR ADC Interrupt Control Register 0x000C read-write adc_done_ie ADC Done Interrupt Enable [0:0] read-write adc_ref_ready_ie ADC Reference Ready Interrupt Enable [1:1] read-write adc_hi_limit_ie ADC Hi Limit Monitor Interrupt Enable [2:2] read-write adc_lo_limit_ie ADC Lo Limit Monitor Interrupt Enable [3:3] read-write adc_overflow_ie ADC Overflow Interrupt Enable [4:4] read-write ro_cal_done_ie RO Cal Done Interrupt Enable [5:5] read-write adc_done_if ADC Done Interrupt Flag [16:16] read-write oneToClear adc_ref_ready_if ADC Reference Ready Interrupt Flag [17:17] read-write oneToClear adc_hi_limit_if ADC Hi Limit Monitor Interrupt Flag [18:18] read-write oneToClear adc_lo_limit_if ADC Lo Limit Monitor Interrupt Flag [19:19] read-write oneToClear adc_overflow_if ADC Overflow Interrupt Flag [20:20] read-write oneToClear ro_cal_done_if RO Cal Done Interrupt Flag [21:21] read-write oneToClear adc_int_pending ADC Interrupt Pending Status [22:22] read-only LIMIT0 ADC Limit 0x0010 read-write ch_lo_limit Low Limit Threshold [9:0] read-write ch_hi_limit High Limit Threshold [21:12] read-write ch_sel ADC Channel Select [27:24] read-write ch_lo_limit_en Low Limit Monitoring Enable [28:28] read-write ch_hi_limit_en High Limit Monitoring Enable [29:29] read-write LIMIT1 ADC Limit 1 0x0014 read-write ch_lo_limit Low Limit Threshold [9:0] read-write ch_hi_limit High Limit Threshold [21:12] read-write ch_sel ADC Channel Select [27:24] read-write ch_lo_limit_en Low Limit Monitoring Enable [28:28] read-write ch_hi_limit_en High Limit Monitoring Enable [29:29] read-write LIMIT2 ADC Limit 2 0x0018 read-write ch_lo_limit Low Limit Threshold [9:0] read-write ch_hi_limit High Limit Threshold [21:12] read-write ch_sel ADC Channel Select [27:24] read-write ch_lo_limit_en Low Limit Monitoring Enable [28:28] read-write ch_hi_limit_en High Limit Monitoring Enable [29:29] read-write LIMIT3 ADC Limit 3 0x001C read-write ch_lo_limit Low Limit Threshold [9:0] read-write ch_hi_limit High Limit Threshold [21:12] read-write ch_sel ADC Channel Select [27:24] read-write ch_lo_limit_en Low Limit Monitoring Enable [28:28] read-write ch_hi_limit_en High Limit Monitoring Enable [29:29] read-write AFE_CTRL AFE Control Register 0x0020 read-write tmon_intbias_en Enable internal temperature measurement bias generator [8:8] read-write tmon_extbias_en Enable external temperature measurement bias generator [9:9] read-write RO_CAL0 RO Trim Calibration Register 0 0x0024 read-write ro_cal_en RO Calibration Enable [0:0] read-write ro_cal_run RO Calibration Run [1:1] read-write ro_cal_load RO Calibration Load Initial Value [2:2] read-write ro_cal_atomic RO Calibration Run Atomic [4:4] read-write dummy Dummy Write Field [7:5] read-write trm_mu RO Trim Adaptation Gain [19:8] read-write ro_trm RO Trim Calibration Result [31:23] read-write RO_CAL1 RO Trim Calibration Register 1 0x0028 read-write trm_init RO Trim Initial Value [8:0] read-write trm_min RO Trim Maximum Adaptive Limit [18:10] read-write trm_max RO Trim Minimum Adaptive Limit [28:20] read-write RO_CAL2 RO Trim Calibration Register 2 0x002C read-write auto_cal_done_cnt Auto Cal Time Delay for Atomic Calibration (in milliseconds) [7:0] read-write SPIS SPI Slave Interface SPI Slave 0x40020000 32 read-write 0 0x1000 registers SPIS 49 SPI Slave IRQ GEN_CTRL SPI Slave General Control Register 0x0000 read-write spi_slave_en SPI Slave Enable Enable read-write Disabled Disable SPI Slave 0 Enabled Enable SPI Slave 1 [0:0] read-write tx_fifo_en TX FIFO Enable Enable read-write Disabled Disable SPI Slave TX FIFO 0 Enabled Enable SPI Slave TX FIFO 1 [1:1] read-write rx_fifo_en SPI RX FIFO Enable Enable read-write Disabled Disable SPI Slave RX FIFO 0 Enabled Enable SPI Slave RX FIFO 1 [2:2] read-write data_width Width of SPI Slave Data Transfers Enable read-write x1 1-bit Wide 0 x2 2-bit Wide/Dual 1 x4 4-bit Wide/Quad 2 invalid Reserved for future use. Do not use. 3 [5:4] read-write spi_mode Defines Clock Polarity (bit 17) and Clock Phase (bit 16), collectively referred to as SPI Mode. [17:16] read-write tx_clk_invert Invert TX Clock Enable read-write no_effect No Effect 0 Invert Inverts the TX transmit clock such that outgoing data is updated on the opposite clock edge from that specified by spi_mode. Effectively, this inverts the value of the Clock Polarity bit from the value specified in spi_mode. 1 [20:20] read-write disable_parking Disable automatic resetting of SPI Slave on exit from LP Modes [31:31] read-write FIFO_CTRL SPI Master FIFO Control Register 0x0004 read-write tx_fifo_ae_lvl Transaction FIFO Almost Empty Flag Level [4:0] read-write rx_fifo_af_lvl Receive FIFO Almost Full Flag Level [12:8] read-only FIFO_STAT SPI Slave FIFO Status Information 0x0008 read-write tx_fifo_used Number of Bytes in Transmit FIFO [5:0] read-only rx_fifo_used Number of Bytes in Receive FIFO [13:8] read-only INTFL SPI Slave Interrupt Flags 0x000C read-write tx_fifo_ae TX FIFO Almost Empty [0:0] read-write oneToClear rx_fifo_af RX FIFO Almost Full [1:1] read-write oneToClear tx_no_data TX FIFO Empty [2:2] read-write oneToClear rx_lost_data RX FIFO Overflow [3:3] read-write oneToClear ss_asserted Slave Select Asserted [5:5] read-write oneToClear ss_deasserted Slave Select Deasserted [6:6] read-write oneToClear INTEN SPI Slave Interrupt Enable/Disable Settings 0x0010 read-write tx_fifo_ae TX FIFO Almost Empty Int Enable disabled Disable Interrupt 0 enabled Enable Interrupt 1 [0:0] read-write rx_fifo_af RX FIFO Almost Full Int Enable disabled Disable Interrupt 0 enabled Enable Interrupt 1 [1:1] read-write tx_no_data No Data in TX FIFO Int Enable disabled Disable Interrupt 0 enabled Enable Interrupt 1 [2:2] read-write rx_lost_data RX FIFO Overflow Int Enable disabled Disable Interrupt 0 enabled Enable Interrupt 1 [3:3] read-write tx_underflow TX Underflow Int Enable disabled Disable Interrupt 0 enabled Enable Interrupt 1 [4:4] read-write ss_asserted Slave Select Asserted Int Enable disabled Disable Interrupt 0 enabled Enable Interrupt 1 [5:5] read-write ss_deasserted Slave Select Deasserted Int Enable disabled Disable Interrupt 0 enabled Enable Interrupt 1 [6:6] read-write