#[doc = "Register `ENABLE` reader"] pub struct R(crate::R); impl core::ops::Deref for R { type Target = crate::R; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl From> for R { #[inline(always)] fn from(reader: crate::R) -> Self { R(reader) } } #[doc = "Register `ENABLE` writer"] pub struct W(crate::W); impl core::ops::Deref for W { type Target = crate::W; #[inline(always)] fn deref(&self) -> &Self::Target { &self.0 } } impl core::ops::DerefMut for W { #[inline(always)] fn deref_mut(&mut self) -> &mut Self::Target { &mut self.0 } } impl From> for W { #[inline(always)] fn from(writer: crate::W) -> Self { W(writer) } } #[doc = "Field `ENABLE` reader - Enable or disable SPIM"] pub type ENABLE_R = crate::FieldReader; #[doc = "Enable or disable SPIM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] #[repr(u8)] pub enum ENABLE_A { #[doc = "0: Disable SPIM"] DISABLED = 0, #[doc = "7: Enable SPIM"] ENABLED = 7, } impl From for u8 { #[inline(always)] fn from(variant: ENABLE_A) -> Self { variant as _ } } impl ENABLE_R { #[doc = "Get enumerated values variant"] #[inline(always)] pub fn variant(&self) -> Option { match self.bits { 0 => Some(ENABLE_A::DISABLED), 7 => Some(ENABLE_A::ENABLED), _ => None, } } #[doc = "Checks if the value of the field is `DISABLED`"] #[inline(always)] pub fn is_disabled(&self) -> bool { *self == ENABLE_A::DISABLED } #[doc = "Checks if the value of the field is `ENABLED`"] #[inline(always)] pub fn is_enabled(&self) -> bool { *self == ENABLE_A::ENABLED } } #[doc = "Field `ENABLE` writer - Enable or disable SPIM"] pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 4, O>; impl<'a, const O: u8> ENABLE_W<'a, O> { #[doc = "Disable SPIM"] #[inline(always)] pub fn disabled(self) -> &'a mut W { self.variant(ENABLE_A::DISABLED) } #[doc = "Enable SPIM"] #[inline(always)] pub fn enabled(self) -> &'a mut W { self.variant(ENABLE_A::ENABLED) } } impl R { #[doc = "Bits 0:3 - Enable or disable SPIM"] #[inline(always)] pub fn enable(&self) -> ENABLE_R { ENABLE_R::new((self.bits & 0x0f) as u8) } } impl W { #[doc = "Bits 0:3 - Enable or disable SPIM"] #[inline(always)] pub fn enable(&mut self) -> ENABLE_W<0> { ENABLE_W::new(self) } #[doc = "Writes raw bits to the register."] #[inline(always)] pub unsafe fn bits(&mut self, bits: u32) -> &mut Self { self.0.bits(bits); self } } #[doc = "Enable SPIM\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"] pub struct ENABLE_SPEC; impl crate::RegisterSpec for ENABLE_SPEC { type Ux = u32; } #[doc = "`read()` method returns [enable::R](R) reader structure"] impl crate::Readable for ENABLE_SPEC { type Reader = R; } #[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"] impl crate::Writable for ENABLE_SPEC { type Writer = W; } #[doc = "`reset()` method sets ENABLE to value 0"] impl crate::Resettable for ENABLE_SPEC { #[inline(always)] fn reset_value() -> Self::Ux { 0 } }