LOAD IMM WIDE C&D
:label load-offset full message -1

:label save loop
MOVE D X
LOAD IMM BYTE Y
1
ALU ADD
MOVE S D
MOVE C X
LOAD IMM BYTE Y
0
ALU ADDC
MOVE S C
MADR WRITE C&D

LOAD IMM BYTE A
0                ; port number
LOAD IND B
PORT OUT B

MOVE B S
COMP S

LOAD IMM WIDE ADR
:label load full end
JMZG
LOAD IMM WIDE ADR
:label load full loop
JUMP

:label save end
HALT


:label save message  ; 655-byte long section of the ISA at time of writing
:literal "Unless stated otherwise, bits are always represented from MSB to LSB (reading left to right) and multi-bytes sequences are big-endian."
0x0A
:literal "So, a jump instruction followed by a two byte address would have the following sequence of bytes jump, high address byte, low address byte."
0x0A
0x0A
:literal "# Registers"
0x0A
0x0A
:literal "All the registers will start with an initial value of `0x0`."
0x0A
0x0A
:literal "## Special Purpose Registers"
0x0A
0x0A
:literal "There are some special purpose registers that you cannot directly read/write from, these are used by the CPU for its internal state."
0x0A
0x0A
:literal "There are three 16-bit registers for holding significant memory addresses and a single 8-bit register."