[package]
name = "riscv-slic"
version = "0.1.1"
edition = "2021"
description = "RISC-V Software-Level Interrupt Controller"
license = "MIT"
readme = "README.md"
repository = "https://github.com/romancardenas/riscv-slic"
keywords = ["riscv", "software", "interrupts", "embedded"]
categories = ["embedded", "hardware-support"]
documentation = "https://docs.rs/riscv-slic"

[package.metadata.docs.rs]
targets = ["riscv32imc-unknown-none-elf"]
features = ["clint-backend"]

[dependencies]
critical-section = "1.1.2"
heapless = "0.8.0"
riscv = "0.11.1"
riscv-slic-macros = { path = "../riscv-slic-macros", version = "0.1.0" }

[features]
msoft = [] # do not enable this feature directly. Use one of the *-backend features instead
ssoft = ["riscv/s-mode"] # do not enable this feature directly. Use one of the *-backend features instead

clint-backend = ["msoft", "riscv-slic-macros/clint-backend"] # enable this feature to use the CLINT peripheral as SWI backend
ssoft-backend = ["ssoft", "riscv-slic-macros/ssoft-backend"] # enable this feature to use supervisor-level software interrupts as SWI backend