//! A unit test for data handling use netlistdb::NetlistDB; use libertyparse::Liberty; use spefparse::SPEF; use stagraph::*; use stagraph::flatten_liberty::*; use stagraph::flatten_parasitics::*; use ulib::Device; const LIBERTY_SIMPLE: &str = include_str!("simple_Early_simplify.lib"); const VERILOG_SAMPLE: &str = include_str!("sample.v"); const SPEF_SAMPLE: &str = include_str!("sample.spef"); #[test] fn test_inputs() { clilog::init_stderr_color_debug(); let liberty = Liberty::parse_str(LIBERTY_SIMPLE).expect("parse liberty error"); let netlist = NetlistDB::from_sverilog( VERILOG_SAMPLE.into(), None, // do not specify top module here &liberty.to_direction_provider() ).unwrap(); let spef = SPEF::parse_str(SPEF_SAMPLE).expect("parse spef error"); liberty.debug_report_unparsed(); let flattened_liberty = FlattenedLiberty::from( &liberty, MergingStrategy::MAX ); assert_eq!(flattened_liberty.macro_pins.len(), 4); // num cells assert_eq!(flattened_liberty.pin_infos.len(), 12); let flattened_spef = FlattenedParasitics::from_spef( &spef, &netlist, MergingStrategy::MAX ); // clilog::info!("FlattenedParasitics: {:?}", flattened_spef); assert_eq!(flattened_spef.elements.len(), 41); // dump parasitics here // println!("flattened parasitics elements:"); // println!("{}", flattened_spef.elements.len()); // for elem in flattened_spef.elements.as_ref() { // use ParasiticElementType::*; // println!("{} {} {} {}", match elem.typ { // R => 0, C => 1 // }, elem.a, elem.b, elem.value); // } // panic!(); let mut sta = STAGraph::build( &netlist, flattened_liberty, flattened_spef, MergingStrategy::MAX ); assert_eq!( sta.arcs_st.as_ref(), &[0, 0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14]); // clilog::info!("STA: {:#?}", sta); // clilog::info!("Netlist: {:#?}", netlist); sta.levelize(Device::CPU); // clilog::info!("STA level_st: {:?}", sta.levels_st); // clilog::info!("STA level_nd: {:?}", sta.levels_nd); assert_eq!( &sta.levels_st as &[usize], &[0, 4, 8, 12, 13, 14, 15] ); assert_eq!( sta.levels_nd.as_ref(), &[2, 3, 4, 5, 9, 11, 13, 15, 8, 10, 12, 14, 7, 6, 0, 0] ); let rom = STAArnoldiROM::build(&sta, &netlist, 0, Device::CPU); clilog::info!("STAArnoldiROM: {:?}", rom); // -0.12059535 assert!(rom.poles[6][1] < -0.11 && rom.poles[6][1] > -0.13); // 0.3571339 assert!(rom.residues[7][0] < 0.36 && rom.residues[7][0] > 0.34); let slews = sta.get_slew_mut(); slews[0] = [1.01, 1.01]; // PI: i slews[1] = [0., 0.]; // PI: clk sta.prop(&netlist, &rom, &rom, Device::CPU); clilog::info!("arcs_delay: {:?}", sta.arcs_delay); clilog::info!("slew: {:?}", sta.slew); // 57.099625 assert!(sta.arcs_delay[5][1] > 56.5 && sta.arcs_delay[5][1] < 57.5); // 15.532251 assert!(sta.slew[2][0] > 15. && sta.slew[2][0] < 16.) }