use std::collections::HashMap; use std::env; use std::path::PathBuf; use sv_parser::{parse_sv, unwrap_node, Locate, RefNode}; fn main() { let args: Vec = env::args().collect(); // The path of SystemVerilog source file let path = PathBuf::from(&args[1]); // The list of defined macros let defines = HashMap::new(); // The list of include paths let includes: Vec = Vec::new(); // Parse let result = parse_sv(&path, &defines, &includes, false, false); if let Ok((syntax_tree, _)) = result { // &SyntaxTree is iterable for node in &syntax_tree { // The type of each node is RefNode match node { RefNode::ModuleDeclarationNonansi(x) => { // unwrap_node! gets the nearest ModuleIdentifier from x let id = unwrap_node!(x, ModuleIdentifier).unwrap(); let id = get_identifier(id).unwrap(); // Original string can be got by SyntexTree::get_str(self, node: &RefNode) let id = syntax_tree.get_str(&id).unwrap(); println!("module: {}", id); } RefNode::ModuleDeclarationAnsi(x) => { let id = unwrap_node!(x, ModuleIdentifier).unwrap(); let id = get_identifier(id).unwrap(); let id = syntax_tree.get_str(&id).unwrap(); println!("module: {}", id); } _ => (), } } } else { println!("Parse failed"); } } fn get_identifier(node: RefNode) -> Option { // unwrap_node! can take multiple types match unwrap_node!(node, SimpleIdentifier, EscapedIdentifier) { Some(RefNode::SimpleIdentifier(x)) => { return Some(x.nodes.0); } Some(RefNode::EscapedIdentifier(x)) => { return Some(x.nodes.0); } _ => None, } }