# Performance Monitoring Events for Performance Monitoring Events for Intel Xeon Processors Based on the Cascadelake Microarchitecture with Intel Optane DC persistent memory - V1.04
# 4/1/2019 11:14:48 AM
# Copyright (c) 2007 - 2017 Intel Corporation. All rights reserved.
Unit	EventCode	UMask	PortMask	FCMask	UMaskExt	EventName	Description	Counter	MSRValue	ELLC	Filter	Internal	Deprecated	FILTER_VALUE
CHA	0x00	0x00	0x00	0x00	0x00	UNC_C_CLOCKTICKS	This event is deprecated. Refer to new event UNC_CHA_CLOCKTICKS	0,1,2,3	0x00	0	na	0	1	0
CHA	0x33	0x42	0x00	0x00	0x00	UNC_H_CORE_SNP.CORE_GTONE	This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.CORE_GTONE	0,1,2,3	0x00	0	na	0	1	0
CHA	0x33	0x82	0x00	0x00	0x00	UNC_H_CORE_SNP.EVICT_GTONE	This event is deprecated. Refer to new event UNC_CHA_CORE_SNP.EVICT_GTONE	0,1,2,3	0x00	0	na	0	1	0
CHA	0x53	0x1	0x00	0x00	0x00	UNC_H_DIR_LOOKUP.SNP	This event is deprecated. Refer to new event UNC_CHA_DIR_LOOKUP.SNP	0,1,2,3	0x00	0	na	0	1	0
CHA	0x53	0x2	0x00	0x00	0x00	UNC_H_DIR_LOOKUP.NO_SNP	This event is deprecated. Refer to new event UNC_CHA_DIR_LOOKUP.NO_SNP	0,1,2,3	0x00	0	na	0	1	0
CHA	0x54	0x1	0x00	0x00	0x00	UNC_H_DIR_UPDATE.HA	This event is deprecated. Refer to new event UNC_CHA_DIR_UPDATE.HA	0,1,2,3	0x00	0	na	0	1	0
CHA	0x54	0x2	0x00	0x00	0x00	UNC_H_DIR_UPDATE.TOR	This event is deprecated. Refer to new event UNC_CHA_DIR_UPDATE.TOR	0,1,2,3	0x00	0	na	0	1	0
CHA	0x5F	0x1	0x00	0x00	0x00	UNC_H_HITME_HIT.EX_RDS	This event is deprecated. Refer to new event UNC_CHA_HITME_HIT.EX_RDS	0,1,2,3	0x00	0	na	0	1	0
CHA	0x34	0x3	0x00	0x00	0x00	UNC_C_LLC_LOOKUP.DATA_READ	This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.DATA_READ	0,1,2,3	0x00	0	CHAFilter0[26:17]	0	1	0
CHA	0x34	0x9	0x00	0x00	0x00	UNC_C_LLC_LOOKUP.REMOTE_SNOOP	This event is deprecated. Refer to new event UNC_CHA_LLC_LOOKUP.REMOTE_SNOOP	0,1,2,3	0x00	0	CHAFilter0[26:17]	0	1	0
CHA	0x37	0x1	0x00	0x00	0x00	UNC_C_LLC_VICTIMS.M_STATE	This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_M	0,1,2,3	0x00	0	na	0	1	0
CHA	0x37	0x2	0x00	0x00	0x00	UNC_C_LLC_VICTIMS.E_STATE	This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_E	0,1,2,3	0x00	0	na	0	1	0
CHA	0x37	0x4	0x00	0x00	0x00	UNC_C_LLC_VICTIMS.S_STATE	This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_S	0,1,2,3	0x00	0	na	0	1	0
CHA	0x37	0x8	0x00	0x00	0x00	UNC_C_LLC_VICTIMS.F_STATE	This event is deprecated. Refer to new event UNC_CHA_LLC_VICTIMS.TOTAL_F	0,1,2,3	0x00	0	na	0	1	0
CHA	0x39	0x8	0x00	0x00	0x00	UNC_H_MISC.RFO_HIT_S	This event is deprecated. Refer to new event UNC_CHA_MISC.RFO_HIT_S	0,1,2,3	0x00	0	na	0	1	0
CHA	0x50	0x3	0x00	0x00	0x00	UNC_H_REQUESTS.READS	This event is deprecated. Refer to new event UNC_CHA_REQUESTS.READS	0,1,2,3	0x00	0	na	0	1	0
CHA	0x50	0xC	0x00	0x00	0x00	UNC_H_REQUESTS.WRITES	This event is deprecated. Refer to new event UNC_CHA_REQUESTS.WRITES	0,1,2,3	0x00	0	na	0	1	0
CHA	0x50	0x1	0x00	0x00	0x00	UNC_H_REQUESTS.READS_LOCAL	This event is deprecated. Refer to new event UNC_CHA_REQUESTS.READS_LOCAL	0,1,2,3	0x00	0	na	0	1	0
CHA	0x50	0x4	0x00	0x00	0x00	UNC_H_REQUESTS.WRITES_LOCAL	This event is deprecated. Refer to new event UNC_CHA_REQUESTS.WRITES_LOCAL	0,1,2,3	0x00	0	na	0	1	0
CHA	0x50	0x10	0x00	0x00	0x00	UNC_H_REQUESTS.INVITOE_LOCAL	This event is deprecated. Refer to new event UNC_CHA_REQUESTS.INVITOE_LOCAL	0,1,2,3	0x00	0	na	0	1	0
CHA	0x50	0x20	0x00	0x00	0x00	UNC_H_REQUESTS.INVITOE_REMOTE	This event is deprecated. Refer to new event UNC_CHA_REQUESTS.INVITOE_REMOTE	0,1,2,3	0x00	0	na	0	1	0
CHA	0x5C	0x4	0x00	0x00	0x00	UNC_H_SNOOP_RESP.RSPIFWD	This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSPIFWD	0,1,2,3	0x00	0	na	0	1	0
CHA	0x5C	0x8	0x00	0x00	0x00	UNC_H_SNOOP_RESP.RSPSFWD	This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSPSFWD	0,1,2,3	0x00	0	na	0	1	0
CHA	0x5C	0x20	0x00	0x00	0x00	UNC_H_SNOOP_RESP.RSP_FWD_WB	This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSP_FWD_WB	0,1,2,3	0x00	0	na	0	1	0
CHA	0x5C	0x40	0x00	0x00	0x00	UNC_H_SNOOP_RESP.RSPCNFLCT	This event is deprecated. Refer to new event UNC_CHA_SNOOP_RESP.RSPCNFLCTS	0,1,2,3	0x00	0	na	0	1	0
CHA	0x35	0x31	0x00	0x00	0x00	UNC_C_TOR_INSERTS.IRQ	This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA	0,1,2,3	0x00	0	CHAFilter1[31:0]	0	1	0
CHA	0x36	0x31	0x00	0x00	0x00	UNC_C_TOR_OCCUPANCY.IRQ	This event is deprecated. Refer to new event UNC_CHA_TOR_OCCUPANCY.IA	0	0x00	0	CHAFilter1[31:0]	0	1	0
CHA	0x35	0x30	0x00	0x00	0x00	UNC_C_TOR_INSERTS.REM_ALL	This event is deprecated. 	0,1,2,3	0x00	0	CHAfilter1	0	1	0
CHA	0xA5	0x02	0x00	0x00	0x00	UNC_C_FAST_ASSERTED	This event is deprecated. Refer to new event UNC_CHA_FAST_ASSERTED.HORZ	0,1,2,3	0x00	0	na	0	1	0
CHA	0x13	0x1	0x00	0x00	0x00	UNC_H_RxC_INSERTS.IRQ	This event is deprecated. Refer to new event UNC_CHA_RxC_INSERTS.IRQ	0,1,2,3	0x00	0	na	0	1	0
CHA	0x19	0x80	0x00	0x00	0x00	UNC_H_RxC_IRQ1_REJECT.PA_MATCH	This event is deprecated. Refer to new event UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH	0,1,2,3	0x00	0	na	0	1	0
CHA	0x11	0x1	0x00	0x00	0x00	UNC_H_RxC_OCCUPANCY.IRQ	This event is deprecated. Refer to new event UNC_CHA_RxC_OCCUPANCY.IRQ	0	0x00	0	na	0	1	0
CHA	0x35	0x11	0x00	0x00	0x00	UNC_C_TOR_INSERTS.IRQ_HIT	This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_HIT	0,1,2,3	0x00	0	CHAFilter1[31:0]	0	1	0
CHA	0x35	0x21	0x00	0x00	0x00	UNC_C_TOR_INSERTS.IRQ_MISS	This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IA_MISS	0,1,2,3	0x00	0	CHAFilter1[31:0]	0	1	0
CHA	0x35	0x14	0x00	0x00	0x00	UNC_C_TOR_INSERTS.PRQ_HIT	This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IO_HIT	0,1,2,3	0x00	0	CHAFilter1[31:0]	0	1	0
CHA	0x35	0x24	0x00	0x00	0x00	UNC_C_TOR_INSERTS.PRQ_MISS	This event is deprecated. Refer to new event UNC_CHA_TOR_INSERTS.IO_MISS	0,1,2,3	0x00	0	CHAFilter1[31:0]	0	1	0
CHA	0x36	0x11	0x00	0x00	0x00	UNC_C_TOR_OCCUPANCY.IRQ_HIT	This event is deprecated. Refer to new event UNC_CHA_TOR_OCCUPANCY.IA_HIT	0	0x00	0	CHAFilter1[31:0]	0	1	0
CHA	0x36	0x21	0x00	0x00	0x00	UNC_C_TOR_OCCUPANCY.IRQ_MISS	This event is deprecated. Refer to new event UNC_CHA_TOR_OCCUPANCY.IA_MISS	0	0x00	0	CHAFilter1[31:0]	0	1	0
CHA	0x35	0x14	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IO_HIT	TOR Inserts; Hits from Local IO	0,1,2,3	0x00	0	CHAFilter1[31:0]	0	0	0
CHA	0x35	0x24	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IO_MISS	TOR Inserts; Misses from Local IO	0,1,2,3	0x00	0	CHAFilter1[31:0]	0	0	0
CHA	0x35	0x31	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA	TOR Inserts; All from Local iA	0,1,2,3	0x00	0	CHAFilter1[31:0]	0	0	0
CHA	0x35	0x11	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_HIT	TOR Inserts; Hits from Local iA	0,1,2,3	0x00	0	CHAFilter1[31:0]	0	0	0
CHA	0x35	0x21	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_MISS	tbd	0,1,2,3	0x00	0	CHAFilter1[31:0]	0	0	0
CHA	0x36	0x31	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA	TOR Occupancy; All from Local iA	0	0x00	0	CHAFilter1[31:0]	0	0	0
CHA	0x36	0x11	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_HIT	TOR Occupancy; Hits from Local iA	0	0x00	0	CHAFilter1[31:0]	0	0	0
CHA	0x36	0x21	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_MISS	TOR Occupancy; Misses from Local iA	0	0x00	0	CHAFilter1[31:0]	0	0	0
CHA	0x3B	0x80	0x00	0x00	0x00	UNC_CHA_UPI_CREDIT_OCCUPANCY.VN0_BL_NCS	UPI Ingress Credits In Use Cycles; BL NCS VN0 Credits	0	0x00	0	CHAFilter0[12:0]	0	0	0
CHA	0x5F	0x01	0x00	0x00	0x00	UNC_CHA_HITME_HIT.EX_RDS	Read request from a remote socket which hit in the HitMe Cache to a line In the E state	0,1,2,3	0x00	0	na	0	0	0
CHA	0xA5	0x02	0x00	0x00	0x00	UNC_CHA_FAST_ASSERTED.HORZ	FaST wire asserted; Horizontal	0,1,2,3	0x00	0	na	0	0	0
CHA	0x00	0x00	0x00	0x00	0x00	UNC_CHA_CLOCKTICKS	Clockticks of the uncore caching & home agent (CHA)	0,1,2,3	0x00	0	na	0	0	0
CHA	0x33	0x42	0x00	0x00	0x00	UNC_CHA_CORE_SNP.CORE_GTONE	Core Cross Snoops Issued; Multiple Core Requests	0,1,2,3	0x00	0	na	0	0	0
CHA	0x33	0x82	0x00	0x00	0x00	UNC_CHA_CORE_SNP.EVICT_GTONE	Core Cross Snoops Issued; Multiple Eviction	0,1,2,3	0x00	0	na	0	0	0
CHA	0x53	0x01	0x00	0x00	0x00	UNC_CHA_DIR_LOOKUP.SNP	Multi-socket cacheline Directory state lookups; Snoop Needed	0,1,2,3	0x00	0	na	0	0	0
CHA	0x53	0x02	0x00	0x00	0x00	UNC_CHA_DIR_LOOKUP.NO_SNP	Multi-socket cacheline Directory state lookups; Snoop Not Needed	0,1,2,3	0x00	0	na	0	0	0
CHA	0x54	0x01	0x00	0x00	0x00	UNC_CHA_DIR_UPDATE.HA	Multi-socket cacheline Directory state updates; Directory Updated memory write from the HA pipe	0,1,2,3	0x00	0	na	0	0	0
CHA	0x54	0x02	0x00	0x00	0x00	UNC_CHA_DIR_UPDATE.TOR	Multi-socket cacheline Directory state updates; Directory Updated memory write from TOR pipe	0,1,2,3	0x00	0	na	0	0	0
CHA	0x59	0x01	0x00	0x00	0x00	UNC_CHA_IMC_READS_COUNT.NORMAL	Normal priority reads issued to the memory controller from the CHA	0,1,2,3	0x00	0	na	0	0	0
CHA	0x5B	0x01	0x00	0x00	0x00	UNC_CHA_IMC_WRITES_COUNT.FULL	CHA to iMC Full Line Writes Issued; Full Line Non-ISOCH	0,1,2,3	0x00	0	na	0	0	0
CHA	0x39	0x08	0x00	0x00	0x00	UNC_CHA_MISC.RFO_HIT_S	Number of times that an RFO hit in S state.	0,1,2,3	0x00	0	na	0	0	0
CHA	0x50	0x03	0x00	0x00	0x00	UNC_CHA_REQUESTS.READS	Read requests	0,1,2,3	0x00	0	na	0	0	0
CHA	0x50	0x0C	0x00	0x00	0x00	UNC_CHA_REQUESTS.WRITES	Write requests	0,1,2,3	0x00	0	na	0	0	0
CHA	0x50	0x01	0x00	0x00	0x00	UNC_CHA_REQUESTS.READS_LOCAL	Read requests from a unit on this socket	0,1,2,3	0x00	0	na	0	0	0
CHA	0x50	0x02	0x00	0x00	0x00	UNC_CHA_REQUESTS.READS_REMOTE	Read requests from a remote socket	0,1,2,3	0x00	0	na	0	0	0
CHA	0x50	0x04	0x00	0x00	0x00	UNC_CHA_REQUESTS.WRITES_LOCAL	Write Requests from a unit on this socket	0,1,2,3	0x00	0	na	0	0	0
CHA	0x50	0x10	0x00	0x00	0x00	UNC_CHA_REQUESTS.INVITOE_LOCAL	Local requests for exclusive ownership of a cache line  without receiving data	0,1,2,3	0x00	0	na	0	0	0
CHA	0x50	0x20	0x00	0x00	0x00	UNC_CHA_REQUESTS.INVITOE_REMOTE	Local requests for exclusive ownership of a cache line without receiving data	0,1,2,3	0x00	0	na	0	0	0
CHA	0x5C	0x01	0x00	0x00	0x00	UNC_CHA_SNOOP_RESP.RSPI	RspI Snoop Responses Received	0,1,2,3	0x00	0	na	0	0	0
CHA	0x5C	0x04	0x00	0x00	0x00	UNC_CHA_SNOOP_RESP.RSPIFWD	RspIFwd Snoop Responses Received	0,1,2,3	0x00	0	na	0	0	0
CHA	0x5C	0x08	0x00	0x00	0x00	UNC_CHA_SNOOP_RESP.RSPSFWD	RspSFwd Snoop Responses Received	0,1,2,3	0x00	0	na	0	0	0
CHA	0x5C	0x10	0x00	0x00	0x00	UNC_CHA_SNOOP_RESP.RSP_WBWB	Rsp*WB Snoop Responses Received	0,1,2,3	0x00	0	na	0	0	0
CHA	0x5C	0x20	0x00	0x00	0x00	UNC_CHA_SNOOP_RESP.RSP_FWD_WB	Rsp*Fwd*WB Snoop Responses Received	0,1,2,3	0x00	0	na	0	0	0
CHA	0x5C	0x40	0x00	0x00	0x00	UNC_CHA_SNOOP_RESP.RSPCNFLCTS	RspCnflct* Snoop Responses Received	0,1,2,3	0x00	0	na	0	0	0
CHA	0x3D	0x01	0x00	0x00	0x00	UNC_CHA_SF_EVICTION.M_STATE	Snoop filter capacity evictions for M-state entries.	0,1,2,3	0x00	0	na	0	0	0
CHA	0x3D	0x02	0x00	0x00	0x00	UNC_CHA_SF_EVICTION.E_STATE	Snoop filter capacity evictions for E-state entries.	0,1,2,3	0x00	0	na	0	0	0
CHA	0x3D	0x04	0x00	0x00	0x00	UNC_CHA_SF_EVICTION.S_STATE	Snoop filter capacity evictions for S-state entries.	0,1,2,3	0x00	0	na	0	0	0
CHA	0x35	0x30	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.REM_ALL	This event is deprecated. 	0,1,2,3	0x00	0	CHAfilter1	0	1	0
CHA	0x13	0x01	0x00	0x00	0x00	UNC_CHA_RxC_INSERTS.IRQ	Ingress (from CMS) Allocations; IRQ	0,1,2,3	0x00	0	na	0	0	0
CHA	0x19	0x80	0x00	0x00	0x00	UNC_CHA_RxC_IRQ1_REJECT.PA_MATCH	Ingress (from CMS) Request Queue Rejects; PhyAddr Match	0,1,2,3	0x00	0	na	0	0	0
CHA	0x11	0x01	0x00	0x00	0x00	UNC_CHA_RxC_OCCUPANCY.IRQ	Ingress (from CMS) Occupancy; IRQ	0	0x00	0	na	0	0	0
CHA	0x37	0x01	0x00	0x00	0x00	UNC_CHA_LLC_VICTIMS.TOTAL_M	Lines Victimized; Lines in M state	0,1,2,3	0x00	0	na	0	0	0
CHA	0x37	0x02	0x00	0x00	0x00	UNC_CHA_LLC_VICTIMS.TOTAL_E	Lines Victimized; Lines in E state	0,1,2,3	0x00	0	na	0	0	0
CHA	0x37	0x04	0x00	0x00	0x00	UNC_CHA_LLC_VICTIMS.TOTAL_S	Lines Victimized; Lines in S State	0,1,2,3	0x00	0	na	0	0	0
CHA	0x37	0x08	0x00	0x00	0x00	UNC_CHA_LLC_VICTIMS.TOTAL_F	Lines Victimized; Lines in F State	0,1,2,3	0x00	0	na	0	0	0
CHA	0x35	0x11	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_HIT_DRD	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x40433
CHA	0x35	0x11	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_HIT_CRD	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x40233
CHA	0x35	0x11	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_HIT_RFO	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x40033
CHA	0x35	0x11	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefDRD	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x4b433
CHA	0x35	0x11	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefCRD	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x4b233
CHA	0x35	0x11	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_HIT_LlcPrefRFO	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x4b033
CHA	0x35	0x21	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_MISS_DRD	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x40433
CHA	0x35	0x21	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_MISS_CRD	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x40233
CHA	0x35	0x21	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_MISS_RFO	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x40033
CHA	0x35	0x21	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefDRD	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x4b433
CHA	0x35	0x21	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefCRD	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x4b233
CHA	0x35	0x21	0x00	0x00	0x00	UNC_CHA_TOR_INSERTS.IA_MISS_LlcPrefRFO	tbd	0,1,2,3	0x00	0	Filter1	0	0	0x4b033
CHA	0x36	0x11	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_HIT_DRD	tbd	0	0x00	0	Filter1	0	0	0x40433
CHA	0x36	0x11	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_HIT_CRD	tbd	0	0x00	0	Filter1	0	0	0x40233
CHA	0x36	0x11	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_HIT_RFO	tbd	0	0x00	0	Filter1	0	0	0x40033
CHA	0x36	0x11	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefDRD	tbd	0	0x00	0	Filter1	0	0	0x4b433
CHA	0x36	0x11	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefCRD	tbd	0	0x00	0	Filter1	0	0	0x4b233
CHA	0x36	0x11	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_HIT_LlcPrefRFO	tbd	0	0x00	0	Filter1	0	0	0x4b033
CHA	0x36	0x21	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_MISS_DRD	tbd	0	0x00	0	Filter1	0	0	0x40433
CHA	0x36	0x21	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_MISS_CRD	tbd	0	0x00	0	Filter1	0	0	0x40233
CHA	0x36	0x21	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_MISS_RFO	tbd	0	0x00	0	Filter1	0	0	0x40033
CHA	0x36	0x21	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefDRD	tbd	0	0x00	0	Filter1	0	0	0x4b433
CHA	0x36	0x21	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefCRD	tbd	0	0x00	0	Filter1	0	0	0x4b233
CHA	0x36	0x21	0x00	0x00	0x00	UNC_CHA_TOR_OCCUPANCY.IA_MISS_LlcPrefRFO	tbd	0	0x00	0	Filter1	0	0	0x4b033
IIO	0x1	0x0	0x00	0x00	0x00	UNC_IIO_CLOCKTICKS	Clockticks of the IIO Traffic Controller	0,1,2,3	0x00	0	na	0	0	0
IIO	0x83	0x1	0x1	0x7	0x00	UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART0	This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0	0,1	0x00	0	fc, chnl	0	1	0
IIO	0x83	0x1	0x2	0x7	0x00	UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART1	This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1	0,1	0x00	0	fc, chnl	0	1	0
IIO	0x83	0x1	0x4	0x7	0x00	UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART2	This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2	0,1	0x00	0	fc, chnl	0	1	0
IIO	0x83	0x1	0x8	0x7	0x00	UNC_IIO_PAYLOAD_BYTES_IN.MEM_WRITE.PART3	This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3	0,1	0x00	0	fc, chnl	0	1	0
IIO	0x83	0x4	0x1	0x7	0x00	UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART0	This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0	0,1	0x00	0	fc, chnl	0	1	0
IIO	0x83	0x4	0x2	0x7	0x00	UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART1	This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1	0,1	0x00	0	fc, chnl	0	1	0
IIO	0x83	0x4	0x4	0x7	0x00	UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART2	This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2	0,1	0x00	0	fc, chnl	0	1	0
IIO	0x83	0x4	0x8	0x7	0x00	UNC_IIO_PAYLOAD_BYTES_IN.MEM_READ.PART3	This event is deprecated. Refer to new event UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3	0,1	0x00	0	fc, chnl	0	1	0
IIO	0xC0	0x01	0x01	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART0	Write request of 4 bytes made to IIO Part0 by the CPU	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x01	0x02	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART1	Write request of 4 bytes made to IIO Part1 by the CPU	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x01	0x04	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART2	Write request of 4 bytes made to IIO Part2 by the CPU	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x01	0x08	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.MEM_WRITE.PART3	Write request of 4 bytes made to IIO Part3 by the CPU	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x02	0x01	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART0	Peer to peer write request of 4 bytes made to IIO Part0 by a different IIO unit	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x02	0x02	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART1	Peer to peer write request of 4 bytes made to IIO Part1 by a different IIO unit	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x02	0x04	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART2	Peer to peer write request of 4 bytes made to IIO Part2 by a different IIO unit	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x02	0x08	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.PEER_WRITE.PART3	Peer to peer write request of 4 bytes made to IIO Part3 by a different IIO unit	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x04	0x01	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART0	Read request for 4 bytes made by the CPU to IIO Part0	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x04	0x02	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART1	Read request for 4 bytes made by the CPU to IIO Part1	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x04	0x04	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART2	Read request for 4 bytes made by the CPU to IIO Part2	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x04	0x08	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.MEM_READ.PART3	Read request for 4 bytes made by the CPU to IIO Part3	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x08	0x01	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART0	Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part0	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x08	0x02	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART1	Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part1	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x08	0x04	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART2	Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part2	2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC0	0x08	0x08	0x07	0x00	UNC_IIO_DATA_REQ_BY_CPU.PEER_READ.PART3	Peer to peer read request for 4 bytes made by a different IIO unit to IIO Part3	2,3	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x01	0x01	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART0	Write request of 4 bytes made by IIO Part0 to Memory	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x01	0x02	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART1	Write request of 4 bytes made by IIO Part1 to Memory	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x01	0x04	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART2	Write request of 4 bytes made by IIO Part2 to Memory	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x01	0x08	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.PART3	Write request of 4 bytes made by IIO Part3 to Memory	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x02	0x01	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART0	Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x02	0x02	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART1	Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x02	0x04	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART2	Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x02	0x08	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.PEER_WRITE.PART3	Peer to peer write request of 4 bytes made by IIO Part0 to an IIO target	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x04	0x01	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART0	Read request for 4 bytes made by IIO Part0 to Memory	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x04	0x02	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART1	Read request for 4 bytes made by IIO Part1 to Memory	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x04	0x04	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART2	Read request for 4 bytes made by IIO Part2 to Memory	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x04	0x08	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.PART3	Read request for 4 bytes made by IIO Part3 to Memory	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x08	0x01	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART0	Peer to peer read request for 4 bytes made by IIO Part0 to an IIO target	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x08	0x02	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART1	Peer to peer read request for 4 bytes made by IIO Part1 to an IIO target	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x08	0x04	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART2	Peer to peer read request for 4 bytes made by IIO Part2 to an IIO target	0,1	0x00	0	fc, chnl	0	0	0
IIO	0x83	0x08	0x08	0x07	0x00	UNC_IIO_DATA_REQ_OF_CPU.PEER_READ.PART3	Peer to peer read request for 4 bytes made by IIO Part3 to an IIO target	0,1	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x01	0x01	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART0	Write request of up to a 64 byte transaction is made to IIO Part0 by the CPU	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x01	0x02	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART1	Write request of up to a 64 byte transaction is made to IIO Part1 by the CPU	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x01	0x04	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART2	Write request of up to a 64 byte transaction is made to IIO Part2 by the CPU	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x01	0x08	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.MEM_WRITE.PART3	Write request of up to a 64 byte transaction is made to IIO Part3 by the CPU	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x02	0x01	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART0	Peer to peer write request of up to a 64 byte transaction is made to IIO Part0 by a different IIO unit	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x02	0x02	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART1	Peer to peer write request of up to a 64 byte transaction is made to IIO Part1 by a different IIO unit	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x02	0x04	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART2	Peer to peer write request of up to a 64 byte transaction is made to IIO Part2 by a different IIO unit	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x02	0x08	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.PEER_WRITE.PART3	Peer to peer write request of up to a 64 byte transaction is made to IIO Part3 by a different IIO unit	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x04	0x01	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART0	Read request for up to a 64 byte transaction is made by the CPU to IIO Part0	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x04	0x02	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART1	Read request for up to a 64 byte transaction is made by the CPU to IIO Part1	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x04	0x04	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART2	Read request for up to a 64 byte transaction is made by the CPU to IIO Part2	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x04	0x08	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.MEM_READ.PART3	Read request for up to a 64 byte transaction is made by the CPU to IIO Part3	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x08	0x01	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART0	Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part0	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x08	0x02	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART1	Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part1	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x08	0x04	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART2	Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part2	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0xC1	0x08	0x08	0x07	0x00	UNC_IIO_TXN_REQ_BY_CPU.PEER_READ.PART3	Peer to peer read request for up to a 64 byte transaction is made by a different IIO unit to IIO Part3	0,1,2,3	0x00	0	fc, chnl	0	0	0
IIO	0x84	0x01	0x01	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART0	Write request of up to a 64 byte transaction is made by IIO Part0 to Memory	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x01	0x02	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART1	Write request of up to a 64 byte transaction is made by IIO Part1 to Memory	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x01	0x04	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART2	Write request of up to a 64 byte transaction is made by IIO Part2 to Memory	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x01	0x08	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.MEM_WRITE.PART3	Write request of up to a 64 byte transaction is made by IIO Part3 to Memory	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x02	0x01	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART0	Peer to peer write request of up to a 64 byte transaction is made by IIO Part0 to an IIO target	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x02	0x02	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART1	Peer to peer write request of up to a 64 byte transaction is made by IIO Part1 to an IIO target	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x02	0x04	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART2	Peer to peer write request of up to a 64 byte transaction is made by IIO Part2 to an IIO target	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x02	0x08	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.PEER_WRITE.PART3	Peer to peer write request of up to a 64 byte transaction is made by IIO Part3 to an IIO target	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x04	0x01	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART0	Read request for up to a 64 byte transaction is made by IIO Part0 to Memory	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x04	0x02	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART1	Read request for up to a 64 byte transaction is  made by IIO Part1 to Memory	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x04	0x04	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART2	Read request for up to a 64 byte transaction is made by IIO Part2 to Memory	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x04	0x08	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.MEM_READ.PART3	Read request for up to a 64 byte transaction is made by IIO Part3 to Memory	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x08	0x01	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART0	Peer to peer read request of up to a 64 byte transaction is made by IIO Part0 to an IIO target	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x08	0x02	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART1	Peer to peer read request of up to a 64 byte transaction is made by IIO Part1 to an IIO target	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x08	0x04	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART2	Peer to peer read request of up to a 64 byte transaction is made by IIO Part2 to an IIO target	0,1,2,3	0x00	0	chnl	0	0	0
IIO	0x84	0x08	0x08	0x07	0x00	UNC_IIO_TXN_REQ_OF_CPU.PEER_READ.PART3	Peer to peer read request of up to a 64 byte transaction is made by IIO Part3 to an IIO target	0,1,2,3	0x00	0	chnl	0	0	0
UPI LL	0x1	0x0	0x00	0x00	0x00	UNC_UPI_CLOCKTICKS	Clocks of the Intel Ultra Path Interconnect (UPI)	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x12	0x1	0x00	0x00	0x00	UNC_UPI_DIRECT_ATTEMPTS.D2C	Data Response packets that go direct to core	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x12	0x2	0x00	0x00	0x00	UNC_UPI_DIRECT_ATTEMPTS.D2K	This event is deprecated. Refer to new event UNC_UPI_DIRECT_ATTEMPTS.D2U	0,1,2,3	0x00	0	na	0	1	0
UPI LL	0x21	0x0	0x00	0x00	0x00	UNC_UPI_L1_POWER_CYCLES	Cycles Intel UPI is in L1 power mode (shutdown)	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x25	0x0	0x00	0x00	0x00	UNC_UPI_RxL0P_POWER_CYCLES	Cycles the Rx of the Intel UPI is in L0p power mode	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x31	0x1	0x00	0x00	0x00	UNC_UPI_RxL_BYPASSED.SLOT0	FLITs received which bypassed the Slot0 Receive Buffer	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x31	0x2	0x00	0x00	0x00	UNC_UPI_RxL_BYPASSED.SLOT1	FLITs received which bypassed the Slot0 Receive Buffer	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x31	0x4	0x00	0x00	0x00	UNC_UPI_RxL_BYPASSED.SLOT2	FLITs received which bypassed the Slot0 Recieve Buffer	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x3	0x20	0x00	0x00	0x00	UNC_UPI_RxL_FLITS.NULL	This event is deprecated. Refer to new event UNC_UPI_RxL_FLITS.ALL_NULL	0,1,2,3	0x00	0	na	0	1	0
UPI LL	0x27	0x0	0x00	0x00	0x00	UNC_UPI_TxL0P_POWER_CYCLES	Cycles in which the Tx of the Intel Ultra Path Interconnect (UPI) is in L0p power mode	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x41	0x0	0x00	0x00	0x00	UNC_UPI_TxL_BYPASSED	FLITs that bypassed the TxL Buffer	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x2	0x8	0x00	0x00	0x00	UNC_UPI_TxL_FLITS.DATA	Valid Flits Sent; Data	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x2	0x20	0x00	0x00	0x00	UNC_UPI_TxL_FLITS.NULL	This event is deprecated. Refer to new event UNC_UPI_TxL_FLITS.ALL_NULL	0,1,2,3	0x00	0	na	0	1	0
UPI LL	0x3	0x97	0x00	0x00	0x00	UNC_UPI_RxL_FLITS.NON_DATA	Protocol header and credit FLITs received from any slot	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x2	0x97	0x00	0x00	0x00	UNC_UPI_TxL_FLITS.NON_DATA	Protocol header and credit FLITs transmitted across any slot	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x2	0x47	0x00	0x00	0x00	UNC_UPI_TxL_FLITS.IDLE	Idle FLITs transmitted	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x2	0x27	0x00	0x00	0x00	UNC_UPI_TxL_FLITS.ALL_NULL	Null FLITs transmitted from any slot	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x3	0x27	0x00	0x00	0x00	UNC_UPI_RxL_FLITS.ALL_NULL	Null FLITs received from any slot	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x3	0x0F	0x00	0x00	0x00	UNC_UPI_RxL_FLITS.ALL_DATA	Valid data FLITs received from any slot	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x2	0x0F	0x00	0x00	0x00	UNC_UPI_TxL_FLITS.ALL_DATA	Valid data FLITs transmitted via any slot	0,1,2,3	0x00	0	na	0	0	0
UPI LL	0x12	0x2	0x00	0x00	0x00	UNC_UPI_DIRECT_ATTEMPTS.D2U	Data Response packets that go direct to Intel UPI	0,1,2,3	0x00	0	na	0	0	0
M2M	0x22	0x2	0x00	0x00	0x00	UNC_M2M_BYPASS_M2M_Egress.NOT_TAKEN	Traffic in which the M2M to iMC Bypass was not taken	0,1,2,3	0x00	0	na	0	0	0
M2M	0x24	0x0	0x00	0x00	0x00	UNC_M2M_DIRECT2CORE_NOT_TAKEN_DIRSTATE	Cycles when direct to core mode (which bypasses the CHA) was disabled	0,1,2,3	0x00	0	na	0	0	0
M2M	0x23	0x0	0x00	0x00	0x00	UNC_M2M_DIRECT2CORE_TAKEN	Messages sent direct to core (bypassing the CHA)	0,1,2,3	0x00	0	na	0	0	0
M2M	0x25	0x0	0x00	0x00	0x00	UNC_M2M_DIRECT2CORE_TXN_OVERRIDE	Number of reads in which direct to core transaction were overridden	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2D	0x1	0x00	0x00	0x00	UNC_M2M_DIRECTORY_LOOKUP.ANY	Multi-socket cacheline Directory lookups (any state found)	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2D	0x2	0x00	0x00	0x00	UNC_M2M_DIRECTORY_LOOKUP.STATE_I	Multi-socket cacheline Directory lookup (cacheline found in I state)	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2D	0x4	0x00	0x00	0x00	UNC_M2M_DIRECTORY_LOOKUP.STATE_S	Multi-socket cacheline Directory lookup (cacheline found in S state)	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2D	0x8	0x00	0x00	0x00	UNC_M2M_DIRECTORY_LOOKUP.STATE_A	Multi-socket cacheline Directory lookups (cacheline found in A state)	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2E	0x1	0x00	0x00	0x00	UNC_M2M_DIRECTORY_UPDATE.ANY	Multi-socket cacheline Directory update from/to Any state	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2E	0x2	0x00	0x00	0x00	UNC_M2M_DIRECTORY_UPDATE.I2S	Multi-socket cacheline Directory update from I to S	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2E	0x4	0x00	0x00	0x00	UNC_M2M_DIRECTORY_UPDATE.I2A	Multi-socket cacheline Directory update from I to A	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2E	0x8	0x00	0x00	0x00	UNC_M2M_DIRECTORY_UPDATE.S2I	Multi-socket cacheline Directory update from S to I	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2E	0x10	0x00	0x00	0x00	UNC_M2M_DIRECTORY_UPDATE.S2A	Multi-socket cacheline Directory update from S to A	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2E	0x20	0x00	0x00	0x00	UNC_M2M_DIRECTORY_UPDATE.A2I	Multi-socket cacheline Directory update from A to I	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2E	0x40	0x00	0x00	0x00	UNC_M2M_DIRECTORY_UPDATE.A2S	Multi-socket cacheline Directory update from A to S	0,1,2,3	0x00	0	na	0	0	0
M2M	0x37	0x1	0x00	0x00	0x00	UNC_M2M_IMC_READS.NORMAL	Reads to iMC issued at Normal Priority (Non-Isochronous)	0,1,2,3	0x00	0	na	0	0	0
M2M	0x37	0x4	0x00	0x00	0x00	UNC_M2M_IMC_READS.ALL	Reads to iMC issued	0,1,2,3	0x00	0	na	0	0	0
M2M	0x38	0x2	0x00	0x00	0x00	UNC_M2M_IMC_WRITES.PARTIAL	Partial Non-Isochronous writes to the iMC	0,1,2,3	0x00	0	na	0	0	0
M2M	0x38	0x10	0x00	0x00	0x00	UNC_M2M_IMC_WRITES.ALL	Writes to iMC issued	0,1,2,3	0x00	0	na	0	0	0
M2M	0x38	0x80	0x00	0x00	0x00	UNC_M2M_IMC_WRITES.NI	M2M Writes Issued to iMC; All, regardless of priority.	0,1,2,3	0x00	0	na	0	0	0
M2M	0x56	0x0	0x00	0x00	0x00	UNC_M2M_PREFCAM_DEMAND_PROMOTIONS	Prefecth requests that got turn into a demand request	0,1,2,3	0x00	0	na	0	0	0
M2M	0x57	0x0	0x00	0x00	0x00	UNC_M2M_PREFCAM_INSERTS	Inserts into the Memory Controller Prefetch Queue	0,1,2,3	0x00	0	na	0	0	0
M2M	0x1	0x00	0x00	0x00	0x00	UNC_M2M_RxC_AD_INSERTS	AD Ingress (from CMS) Queue Inserts	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2	0x00	0x00	0x00	0x00	UNC_M2M_RxC_AD_OCCUPANCY	AD Ingress (from CMS) Occupancy	0,1,2,3	0x00	0	na	0	0	0
M2M	0x5	0x00	0x00	0x00	0x00	UNC_M2M_RxC_BL_INSERTS	BL Ingress (from CMS) Allocations	0,1,2,3	0x00	0	na	0	0	0
M2M	0x6	0x00	0x00	0x00	0x00	UNC_M2M_RxC_BL_OCCUPANCY	BL Ingress (from CMS) Occupancy	0,1,2,3	0x00	0	na	0	0	0
M2M	0x9	0x00	0x00	0x00	0x00	UNC_M2M_TxC_AD_INSERTS	AD Egress (to CMS) Allocations	0,1,2,3	0x00	0	na	0	0	0
M2M	0xA	0x00	0x00	0x00	0x00	UNC_M2M_TxC_AD_OCCUPANCY	AD Egress (to CMS) Occupancy	0,1,2,3	0x00	0	na	0	0	0
M2M	0x15	0x03	0x00	0x00	0x00	UNC_M2M_TxC_BL_INSERTS.ALL	BL Egress (to CMS) Allocations; All	0,1,2,3	0x00	0	na	0	0	0
M2M	0x16	0x03	0x00	0x00	0x00	UNC_M2M_TxC_BL_OCCUPANCY.ALL	BL Egress (to CMS) Occupancy; All	0,1,2,3	0x00	0	na	0	0	0
M2M	0x28	0x00	0x00	0x00	0x00	UNC_M2M_DIRECT2UPI_NOT_TAKEN_CREDITS	Number of reads in which direct to Intel UPI transactions were overridden	0,1,2,3	0x00	0	na	0	0	0
M2M	0x27	0x00	0x00	0x00	0x00	UNC_M2M_DIRECT2UPI_NOT_TAKEN_DIRSTATE	Cycles when direct to Intel UPI was disabled	0,1,2,3	0x00	0	na	0	0	0
M2M	0x26	0x00	0x00	0x00	0x00	UNC_M2M_DIRECT2UPI_TAKEN	Messages sent direct to the Intel UPI	0,1,2,3	0x00	0	na	0	0	0
M2M	0x29	0x00	0x00	0x00	0x00	UNC_M2M_DIRECT2UPI_TXN_OVERRIDE	Number of reads that a message sent direct2 Intel UPI was overridden	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2C	0x02	0x00	0x00	0x00	UNC_M2M_TAG_HIT.NM_RD_HIT_DIRTY	Dirty line read hits(Regular and RFO) to Near Memory(DRAM cache) in Memory Mode	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2C	0x04	0x00	0x00	0x00	UNC_M2M_TAG_HIT.NM_UFILL_HIT_CLEAN	Clean line underfill read hits to Near Memory(DRAM cache) in Memory Mode	0,1,2,3	0x00	0	na	0	0	0
M2M	0x2C	0x08	0x00	0x00	0x00	UNC_M2M_TAG_HIT.NM_UFILL_HIT_DIRTY	Dirty line underfill read hits to Near Memory(DRAM cache) in Memory Mode	0,1,2,3	0x00	0	na	0	0	0
M2M	0x37	0x8	0x00	0x00	0x00	UNC_M2M_IMC_READS.TO_PMM	Read requests to Intel Optane DC persistent memory issued to the iMC from M2M	0,1,2,3	0x00	0	na	0	0	0
M2M	0x38	0x20	0x00	0x00	0x00	UNC_M2M_IMC_WRITES.TO_PMM	Write requests to Intel Optane DC persistent memory issued to the iMC from M2M	0,1,2,3	0x00	0	na	0	0	0
M3UPI	0x29	0x0	0x00	0x00	0x00	UNC_M3UPI_UPI_PREFETCH_SPAWN	Prefetches generated by the flow control queue of the M3UPI unit.	0,1,2	0x00	0	na	0	0	0
iMC	0x1	0x2	0x00	0x00	0x00	UNC_M_ACT_COUNT.WR	DRAM Page Activate commands sent due to a write request	0,1,2,3	0x00	0	na	0	0	0
iMC	0x4	0x1	0x00	0x00	0x00	UNC_M_CAS_COUNT.RD_REG	All DRAM Read CAS Commands issued (does not include underfills)	0,1,2,3	0x00	0	na	0	0	0
iMC	0x4	0x2	0x00	0x00	0x00	UNC_M_CAS_COUNT.RD_UNDERFILL	DRAM Underfill Read CAS Commands issued	0,1,2,3	0x00	0	na	0	0	0
iMC	0x4	0x3	0x00	0x00	0x00	UNC_M_CAS_COUNT.RD	All DRAM Read CAS Commands issued (including underfills)	0,1,2,3	0x00	0	na	0	0	0
iMC	0x4	0x4	0x00	0x00	0x00	UNC_M_CAS_COUNT.WR_WMM	DRAM CAS (Column Address Strobe) Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Write Major Mode	0,1,2,3	0x00	0	na	0	0	0
iMC	0x4	0xC	0x00	0x00	0x00	UNC_M_CAS_COUNT.WR	All DRAM Write CAS commands issued	0,1,2,3	0x00	0	na	0	0	0
iMC	0x4	0xF	0x00	0x00	0x00	UNC_M_CAS_COUNT.ALL	All DRAM CAS Commands issued	0,1,2,3	0x00	0	na	0	0	0
iMC	0x0	0x0	0x00	0x00	0x00	UNC_M_CLOCKTICKS	Clockticks of the memory controller which uses a programmable counter	0,1,2,3	0x00	0	na	0	0	0
iMC	0x85	0x0	0x00	0x00	0x00	UNC_M_POWER_CHANNEL_PPD	Channel PPD Cycles	0,1,2,3	0x00	0	na	0	0	0
iMC	0x43	0x0	0x00	0x00	0x00	UNC_M_POWER_SELF_REFRESH	Clock-Enabled Self-Refresh	0,1,2,3	0x00	0	na	0	0	0
iMC	0x2	0x1	0x00	0x00	0x00	UNC_M_PRE_COUNT.PAGE_MISS	Precharges due to page miss	0,1,2,3	0x00	0	na	0	0	0
iMC	0x2	0x4	0x00	0x00	0x00	UNC_M_PRE_COUNT.RD	Precharge due to read	0,1,2,3	0x00	0	na	0	0	0
iMC	0x10	0x0	0x00	0x00	0x00	UNC_M_RPQ_INSERTS	Read Pending Queue Allocations	0,1,2,3	0x00	0	na	0	0	0
iMC	0x80	0x0	0x00	0x00	0x00	UNC_M_RPQ_OCCUPANCY	Read Pending Queue Occupancy	0,1,2,3	0x00	0	na	0	0	0
iMC	0xD3	0x1	0x00	0x00	0x00	UNC_M_TAGCHK.HIT	All hits to Near Memory(DRAM cache) in Memory Mode	0,1,2,3	0x00	0	na	0	0	0
iMC	0xD3	0x2	0x00	0x00	0x00	UNC_M_TAGCHK.MISS_CLEAN	All Clean line misses to Near Memory(DRAM cache) in Memory Mode	0,1,2,3	0x00	0	na	0	0	0
iMC	0xD3	0x4	0x00	0x00	0x00	UNC_M_TAGCHK.MISS_DIRTY	All dirty line misses to Near Memory(DRAM cache) in Memory Mode	0,1,2,3	0x00	0	na	0	0	0
iMC	0x20	0x0	0x00	0x00	0x00	UNC_M_WPQ_INSERTS	Write Pending Queue Allocations	0,1,2,3	0x00	0	na	0	0	0
iMC	0x81	0x0	0x00	0x00	0x00	UNC_M_WPQ_OCCUPANCY	Write Pending Queue Occupancy	0,1,2,3	0x00	0	na	0	0	0
iMC	0xE0	0x1	0x00	0x00	0x00	UNC_M_PMM_RPQ_OCCUPANCY.ALL	Read Pending Queue Occupancy of all read requests for Intel Optane DC persistent memory	0,1,2,3	0x00	0	na	0	0	0
iMC	0xE3	0x0	0x00	0x00	0x00	UNC_M_PMM_RPQ_INSERTS	Read requests allocated in the PMM Read Pending Queue for Intel Optane DC persistent memory	0,1,2,3	0x00	0	na	0	0	0
iMC	0xEA	0x1	0x00	0x00	0x00	UNC_M_PMM_CMD1.ALL	All commands for Intel Optane DC persistent memory	0,1,2,3	0x00	0	na	0	0	0
iMC	0xEA	0x2	0x00	0x00	0x00	UNC_M_PMM_CMD1.RD	Regular reads(RPQ) commands for Intel Optane DC persistent memory	0,1,2,3	0x00	0	na	0	0	0
iMC	0xEA	0x4	0x00	0x00	0x00	UNC_M_PMM_CMD1.WR	Write commands for Intel Optane DC persistent memory	0,1,2,3	0x00	0	na	0	0	0
iMC	0xEA	0x8	0x00	0x00	0x00	UNC_M_PMM_CMD1.UFILL_RD	Underfill read commands for Intel Optane DC persistent memory	0,1,2,3	0x00	0	na	0	0	0
iMC	0xE7	0x0	0x00	0x00	0x00	UNC_M_PMM_WPQ_INSERTS	Write requests allocated in the PMM Write Pending Queue for Intel Optane DC persistent memory	0,1,2,3	0x00	0	na	0	0	0
iMC	0xE4	0x1	0x00	0x00	0x00	UNC_M_PMM_WPQ_OCCUPANCY.ALL	Write Pending Queue Occupancy of all write requests for Intel Optane DC persistent memory	0,1,2,3	0x00	0	na	0	0	0