[ { "Unit": "ARB", "EventCode": "0x80", "UMask": "0x01", "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL", "BriefDescription": "Counts cycles weighted by the number of requests waiting for data returning from the memory controller. Accounts for coherent and non-coherent requests initiated by IA cores, processor graphic units, or LLC.", "PublicDescription": "Counts cycles weighted by the number of requests waiting for data returning from the memory controller. Accounts for coherent and non-coherent requests initiated by IA cores, processor graphic units, or LLC.", "Counter": "0", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "ARB", "EventCode": "0x81", "UMask": "0x01", "EventName": "UNC_ARB_TRK_REQUESTS.ALL", "BriefDescription": "Counts the number of coherent and in-coherent requests initiated by IA cores, processor graphic units, or LLC.", "PublicDescription": "Counts the number of coherent and in-coherent requests initiated by IA cores, processor graphic units, or LLC.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "ARB", "EventCode": "0x81", "UMask": "0x20", "EventName": "UNC_ARB_TRK_REQUESTS.WRITES", "BriefDescription": "Counts the number of allocated write entries, include full, partial, and LLC evictions.", "PublicDescription": "Counts the number of allocated write entries, include full, partial, and LLC evictions.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "ARB", "EventCode": "0x81", "UMask": "0x80", "EventName": "UNC_ARB_TRK_REQUESTS.EVICTIONS", "BriefDescription": "Counts the number of LLC evictions allocated.", "PublicDescription": "Counts the number of LLC evictions allocated.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "ARB", "EventCode": "0x83", "UMask": "0x01", "EventName": "UNC_ARB_COH_TRK_OCCUPANCY.ALL", "BriefDescription": "Cycles weighted by number of requests pending in Coherency Tracker.", "PublicDescription": "Cycles weighted by number of requests pending in Coherency Tracker.", "Counter": "0", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "ARB", "EventCode": "0x84", "UMask": "0x01", "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL", "BriefDescription": "Number of requests allocated in Coherency Tracker.", "PublicDescription": "Number of requests allocated in Coherency Tracker.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "ARB", "EventCode": "0x80", "UMask": "0x01", "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST", "BriefDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.", "PublicDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.", "Counter": "0,1", "CounterMask": "1", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "ARB", "EventCode": "0x80", "UMask": "0x01", "EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_OVER_HALF_FULL", "BriefDescription": "Cycles with at least half of the requests outstanding are waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.", "PublicDescription": "Cycles with at least half of the requests outstanding are waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.", "Counter": "0,1", "CounterMask": "10", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "ARB", "EventCode": "0x0", "UMask": "0x01", "EventName": "UNC_CLOCK.SOCKET", "BriefDescription": "This 48-bit fixed counter counts the UCLK cycles.", "PublicDescription": "This 48-bit fixed counter counts the UCLK cycles.", "Counter": "Fixed", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x11", "EventName": "UNC_CBO_CACHE_LOOKUP.READ_M", "BriefDescription": "L3 Lookup read request that access cache and found line in M-state.", "PublicDescription": "L3 Lookup read request that access cache and found line in M-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x21", "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_M", "BriefDescription": "L3 Lookup write request that access cache and found line in M-state.", "PublicDescription": "L3 Lookup write request that access cache and found line in M-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x41", "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_M", "BriefDescription": "L3 Lookup external snoop request that access cache and found line in M-state.", "PublicDescription": "L3 Lookup external snoop request that access cache and found line in M-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x81", "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_M", "BriefDescription": "L3 Lookup any request that access cache and found line in M-state.", "PublicDescription": "L3 Lookup any request that access cache and found line in M-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x18", "EventName": "UNC_CBO_CACHE_LOOKUP.READ_I", "BriefDescription": "L3 Lookup read request that access cache and found line in I-state.", "PublicDescription": "L3 Lookup read request that access cache and found line in I-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x28", "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_I", "BriefDescription": "L3 Lookup write request that access cache and found line in I-state.", "PublicDescription": "L3 Lookup write request that access cache and found line in I-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x48", "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_I", "BriefDescription": "L3 Lookup external snoop request that access cache and found line in I-state.", "PublicDescription": "L3 Lookup external snoop request that access cache and found line in I-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x88", "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_I", "BriefDescription": "L3 Lookup any request that access cache and found line in I-state.", "PublicDescription": "L3 Lookup any request that access cache and found line in I-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x1f", "EventName": "UNC_CBO_CACHE_LOOKUP.READ_MESI", "BriefDescription": "L3 Lookup read request that access cache and found line in any MESI-state.", "PublicDescription": "L3 Lookup read request that access cache and found line in any MESI-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x2f", "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_MESI", "BriefDescription": "L3 Lookup write request that access cache and found line in MESI-state.", "PublicDescription": "L3 Lookup write request that access cache and found line in MESI-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x4f", "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_MESI", "BriefDescription": "L3 Lookup external snoop request that access cache and found line in MESI-state.", "PublicDescription": "L3 Lookup external snoop request that access cache and found line in MESI-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x8f", "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_MESI", "BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state.", "PublicDescription": "L3 Lookup any request that access cache and found line in MESI-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x86", "EventName": "UNC_CBO_CACHE_LOOKUP.ANY_ES", "BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state.", "PublicDescription": "L3 Lookup any request that access cache and found line in E or S-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x46", "EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_ES", "BriefDescription": "L3 Lookup external snoop request that access cache and found line in E or S-state.", "PublicDescription": "L3 Lookup external snoop request that access cache and found line in E or S-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x16", "EventName": "UNC_CBO_CACHE_LOOKUP.READ_ES", "BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state.", "PublicDescription": "L3 Lookup read request that access cache and found line in E or S-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x34", "UMask": "0x26", "EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_ES", "BriefDescription": "L3 Lookup write request that access cache and found line in E or S-state.", "PublicDescription": "L3 Lookup write request that access cache and found line in E or S-state.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x22", "UMask": "0x21", "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EXTERNAL", "BriefDescription": "An external snoop misses in some processor core.", "PublicDescription": "An external snoop misses in some processor core.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x22", "UMask": "0x41", "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_XCORE", "BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which misses in some processor core.", "PublicDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which misses in some processor core.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x22", "UMask": "0x81", "EventName": "UNC_CBO_XSNP_RESPONSE.MISS_EVICTION", "BriefDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor core.", "PublicDescription": "A cross-core snoop resulted from L3 Eviction which misses in some processor core.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x22", "UMask": "0x24", "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_EXTERNAL", "BriefDescription": "An external snoop hits a non-modified line in some processor core.", "PublicDescription": "An external snoop hits a non-modified line in some processor core.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x22", "UMask": "0x44", "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_XCORE", "BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a non-modified line in some processor core.", "PublicDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a non-modified line in some processor core.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x22", "UMask": "0x84", "EventName": "UNC_CBO_XSNP_RESPONSE.HIT_EVICTION", "BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core.", "PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line in some processor core.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x22", "UMask": "0x28", "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_EXTERNAL", "BriefDescription": "An external snoop hits a modified line in some processor core.", "PublicDescription": "An external snoop hits a modified line in some processor core.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x22", "UMask": "0x48", "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_XCORE", "BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a modified line in some processor core.", "PublicDescription": "A cross-core snoop initiated by this Cbox due to processor core memory request which hits a modified line in some processor core.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" }, { "Unit": "CBO", "EventCode": "0x22", "UMask": "0x88", "EventName": "UNC_CBO_XSNP_RESPONSE.HITM_EVICTION", "BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core.", "PublicDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in some processor core.", "Counter": "0,1", "CounterMask": "0", "Invert": "0", "EdgeDetect": "0" } ]