[ { "BitName": "DEMAND_DATA_RD", "BitIndex": "0", "Type": "1", "Description": "Counts demand data reads", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "DEMAND_RFO", "BitIndex": "1", "Type": "1", "Description": "Counts all demand data writes (RFOs)", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "DEMAND_CODE_RD", "BitIndex": "2", "Type": "1", "Description": "Counts demand instruction fetches and L1 instruction cache prefetches that", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "PF_L2_DATA_RD", "BitIndex": "4", "Type": "1", "Description": "Counts prefetch (that bring data to L2) data reads", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "PF_L2_RFO", "BitIndex": "5", "Type": "1", "Description": "Counts all prefetch (that bring data to L2) RFOs", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "PF_L3_DATA_RD", "BitIndex": "7", "Type": "1", "Description": "Counts all prefetch (that bring data to LLC only) data reads", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "PF_L3_RFO", "BitIndex": "8", "Type": "1", "Description": "Counts all prefetch (that bring data to LLC only) RFOs", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "PF_L1D_AND_SW", "BitIndex": "10", "Type": "1", "Description": "Counts L1 data cache hardware prefetch requests and software prefetch requests", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "OTHER", "BitIndex": "15", "Type": "1", "Description": "Counts any other requests", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "ALL_PF_DATA_RD", "BitIndex": "4,7,10", "Type": "1", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "ALL_PF_RFO", "BitIndex": "5,8", "Type": "1", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "ALL_DATA_RD", "BitIndex": "0,4,7,10", "Type": "1", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "ALL_RFO", "BitIndex": "1,5,8", "Type": "1", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "ALL_READS", "BitIndex": "0,1,2,4,5,6,7,8,9,10", "Type": "1", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "ANY_RESPONSE", "BitIndex": "16", "Type": "2", "Description": "have any response type.", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "SUPPLIER_NONE", "BitIndex": "17", "Type": "3", "Description": null, "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT_M", "BitIndex": "18", "Type": "3", "Description": null, "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT_E", "BitIndex": "19", "Type": "3", "Description": null, "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT_S", "BitIndex": "20", "Type": "3", "Description": null, "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT_F", "BitIndex": "21", "Type": "3", "Description": null, "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT", "BitIndex": "18,19,20,21", "Type": "3", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_MISS_LOCAL_DRAM", "BitIndex": "26", "Type": "3", "Description": null, "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_MISS_REMOTE_HOP1_DRAM", "BitIndex": "28", "Type": "3", "Description": null, "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_MISS", "BitIndex": "26,27,28,29", "Type": "3", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "SNOOP_NONE", "BitIndex": "31", "Type": "4", "Description": null, "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "NO_SNOOP_NEEDED", "BitIndex": "32", "Type": "4", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "SNOOP_MISS", "BitIndex": "33", "Type": "4", "Description": null, "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "HIT_OTHER_CORE_NO_FWD", "BitIndex": "34", "Type": "4", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "HIT_OTHER_CORE_FWD", "BitIndex": "35", "Type": "4", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "18,19,20,21", "Errata": "na" }, { "BitName": "HITM_OTHER_CORE", "BitIndex": "36", "Type": "4", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "ANY_SNOOP", "BitIndex": "31,32,33,34,35,36,37", "Type": "4", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_MISS_REMOTE_DRAM.SNOOP_MISS_OR_NO_FWD", "BitIndex": "23,24,25,27,28,29,33,34", "Type": "2", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_MISS_LOCAL_DRAM.SNOOP_MISS_OR_NO_FWD", "BitIndex": "26,33,34", "Type": "2", "Description": "TBD", "MATRIX_REG": "0,1", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT.NO_SNOOP_NEEDED", "BitIndex": "18,19,20,21,32", "Type": "2", "Description": "hit in the L3 and sibling core snoops are not needed as either the core-valid bit is not set or the shared line is present in multiple cores.", "MATRIX_REG": "tbd", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT.HIT_OTHER_CORE_NO_FWD", "BitIndex": "18,19,20,21,34", "Type": "2", "Description": "hit in the L3 and the snoops to sibling cores hit in either E/S state and the line is not forwarded.", "MATRIX_REG": "tbd", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT.HIT_OTHER_CORE_FWD", "BitIndex": "18,19,20,21,35", "Type": "2", "Description": "hit in the L3 and the snoop to one of the sibling cores hits the line in E/S/F state and the line is forwarded.", "MATRIX_REG": "tbd", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT.HITM_OTHER_CORE", "BitIndex": "18,19,20,21,36", "Type": "2", "Description": "hit in the L3 and the snoop to one of the sibling cores hits the line in M state and the line is forwarded.", "MATRIX_REG": "tbd", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT.ANY_SNOOP", "BitIndex": "18,19,20,21,31,32,33,34,35,36,37", "Type": "2", "Description": "hit in the L3.", "MATRIX_REG": "tbd", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_MISS.ANY_SNOOP", "BitIndex": "26,27,28,29,31,32,33,34,35,36,37", "Type": "2", "Description": "miss in the L3.", "MATRIX_REG": "tbd", "BitsNotCombinedWith": "na", "Errata": "na" }, { "BitName": "L3_HIT.SNOOP_HIT_WITH_FWD", "BitIndex": "18, 19, 20, 21, 22, 35", "Type": "2", "Description": null, "MATRIX_REG": "0,1", "BitsNotCombinedWith": "18,19,20,21", "Errata": "na" } ]