#BEGIN_LEGAL
#
#Copyright (c) 2023 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#  
#END_LEGAL
#
#
#
#    ***** GENERATED FILE -- DO NOT EDIT! *****
#    ***** GENERATED FILE -- DO NOT EDIT! *****
#    ***** GENERATED FILE -- DO NOT EDIT! *****
#
#
#
EVEX_INSTRUCTIONS()::
# EMITTING ADC (ADC-128-1)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x10 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       ADC_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x10 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       ADC_MEMi8_GPR8i8_APX
}


# EMITTING ADC (ADC-128-10)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       ADC_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       ADC_GPRv_MEMv_IMM8_APX
}


# EMITTING ADC (ADC-128-11)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x10 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       ADC_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x10 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       ADC_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING ADC (ADC-128-12)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x11 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       ADC_GPRv_GPRv_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x11 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       ADC_MEMv_GPRv_APX
}


# EMITTING ADC (ADC-128-13)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x11 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       ADC_GPRv_GPRv_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x11 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       ADC_MEMv_GPRv_APX
}


# EMITTING ADC (ADC-128-14)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x11 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       ADC_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x11 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       ADC_GPRv_MEMv_GPRv_APX
}


# EMITTING ADC (ADC-128-15)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x11 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       ADC_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x11 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       ADC_GPRv_MEMv_GPRv_APX
}


# EMITTING ADC (ADC-128-16)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x12 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       ADC_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x12 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       ADC_GPR8i8_MEMi8_APX
}


# EMITTING ADC (ADC-128-17)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x12 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       ADC_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x12 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       ADC_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING ADC (ADC-128-18)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x13 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       ADC_GPRv_GPRv_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x13 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       ADC_GPRv_MEMv_APX
}


# EMITTING ADC (ADC-128-19)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x13 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       ADC_GPRv_GPRv_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x13 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       ADC_GPRv_MEMv_APX
}


# EMITTING ADC (ADC-128-2)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       ADC_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       ADC_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING ADC (ADC-128-20)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x13 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       ADC_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x13 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       ADC_GPRv_GPRv_MEMv_APX
}


# EMITTING ADC (ADC-128-21)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x13 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       ADC_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x13 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       ADC_GPRv_GPRv_MEMv_APX
}


# EMITTING ADC (ADC-128-22)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       ADC_GPR8i8_IMM8_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       ADC_MEMi8_IMM8_APX
}


# EMITTING ADC (ADC-128-3)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       ADC_GPRv_IMMz_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       ADC_MEMv_IMMz_APX
}


# EMITTING ADC (ADC-128-4)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       ADC_GPRv_IMMz_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       ADC_MEMv_IMMz_APX
}


# EMITTING ADC (ADC-128-5)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       ADC_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       ADC_GPRv_MEMv_IMMz_APX
}


# EMITTING ADC (ADC-128-6)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       ADC_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       ADC_GPRv_MEMv_IMMz_APX
}


# EMITTING ADC (ADC-128-7)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       ADC_GPRv_IMM8_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       ADC_MEMv_IMM8_APX
}


# EMITTING ADC (ADC-128-8)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       ADC_GPRv_IMM8_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       ADC_MEMv_IMM8_APX
}


# EMITTING ADC (ADC-128-9)
{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       ADC_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ADC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       ADC_GPRv_MEMv_IMM8_APX
}


# EMITTING ADCX (ADCX-128-1)
{
ICLASS:      ADCX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-TST CF-MOD ]
PATTERN:     EVV 0x66 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():rw:d:i32 REG1=GPR32_B():r:d:i32
IFORM:       ADCX_GPR32i32_GPR32i32_APX
}

{
ICLASS:      ADCX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x66 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():rw:d:i32 MEM0:r:d:i32
IFORM:       ADCX_GPR32i32_MEMi32_APX
}


# EMITTING ADCX (ADCX-128-2)
{
ICLASS:      ADCX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-TST CF-MOD ]
PATTERN:     EVV 0x66 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():rw:q:i64 REG1=GPR64_B():r:q:i64
IFORM:       ADCX_GPR64i64_GPR64i64_APX
}

{
ICLASS:      ADCX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x66 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():rw:q:i64 MEM0:r:q:i64
IFORM:       ADCX_GPR64i64_MEMi64_APX
}


# EMITTING ADCX (ADCX-128-3)
{
ICLASS:      ADCX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x66 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 REG1=GPR32_R():r:d:i32 REG2=GPR32_B():r:d:i32
IFORM:       ADCX_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      ADCX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x66 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 REG1=GPR32_R():r:d:i32 MEM0:r:d:i32
IFORM:       ADCX_GPR32i32_GPR32i32_MEMi32_APX
}


# EMITTING ADCX (ADCX-128-4)
{
ICLASS:      ADCX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x66 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 REG1=GPR64_R():r:q:i64 REG2=GPR64_B():r:q:i64
IFORM:       ADCX_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      ADCX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x66 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 REG1=GPR64_R():r:q:i64 MEM0:r:q:i64
IFORM:       ADCX_GPR64i64_GPR64i64_MEMi64_APX
}


# EMITTING ADD (ADD-128-1-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x00 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x00 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       ADD_MEMi8_GPR8i8_APX
}


# EMITTING ADD (ADD-128-1-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x00 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x00 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       ADD_MEMi8_GPR8i8_APX
}


# EMITTING ADD (ADD-128-10-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       ADD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       ADD_GPRv_MEMv_IMM8_APX
}


# EMITTING ADD (ADD-128-10-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       ADD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       ADD_GPRv_MEMv_IMM8_APX
}


# EMITTING ADD (ADD-128-11-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x00 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x00 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       ADD_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING ADD (ADD-128-11-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x00 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x00 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       ADD_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING ADD (ADD-128-12-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x01 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       ADD_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x01 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       ADD_MEMv_GPRv_APX
}


# EMITTING ADD (ADD-128-12-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x01 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       ADD_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x01 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       ADD_MEMv_GPRv_APX
}


# EMITTING ADD (ADD-128-13-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x01 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       ADD_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x01 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       ADD_MEMv_GPRv_APX
}


# EMITTING ADD (ADD-128-13-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x01 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       ADD_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x01 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       ADD_MEMv_GPRv_APX
}


# EMITTING ADD (ADD-128-14-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x01 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       ADD_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x01 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       ADD_GPRv_MEMv_GPRv_APX
}


# EMITTING ADD (ADD-128-14-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x01 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       ADD_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x01 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       ADD_GPRv_MEMv_GPRv_APX
}


# EMITTING ADD (ADD-128-15-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x01 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       ADD_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x01 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       ADD_GPRv_MEMv_GPRv_APX
}


# EMITTING ADD (ADD-128-15-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x01 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       ADD_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x01 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       ADD_GPRv_MEMv_GPRv_APX
}


# EMITTING ADD (ADD-128-16-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x02 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x02 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       ADD_GPR8i8_MEMi8_APX
}


# EMITTING ADD (ADD-128-16-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x02 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x02 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       ADD_GPR8i8_MEMi8_APX
}


# EMITTING ADD (ADD-128-17-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x02 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x02 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING ADD (ADD-128-17-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x02 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x02 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING ADD (ADD-128-18-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x03 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       ADD_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x03 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       ADD_GPRv_MEMv_APX
}


# EMITTING ADD (ADD-128-18-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x03 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       ADD_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x03 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       ADD_GPRv_MEMv_APX
}


# EMITTING ADD (ADD-128-19-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x03 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       ADD_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x03 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       ADD_GPRv_MEMv_APX
}


# EMITTING ADD (ADD-128-19-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x03 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       ADD_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x03 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       ADD_GPRv_MEMv_APX
}


# EMITTING ADD (ADD-128-2-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       ADD_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING ADD (ADD-128-2-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       ADD_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       ADD_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING ADD (ADD-128-20-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x03 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       ADD_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x03 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       ADD_GPRv_GPRv_MEMv_APX
}


# EMITTING ADD (ADD-128-20-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x03 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       ADD_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x03 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       ADD_GPRv_GPRv_MEMv_APX
}


# EMITTING ADD (ADD-128-21-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x03 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       ADD_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x03 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       ADD_GPRv_GPRv_MEMv_APX
}


# EMITTING ADD (ADD-128-21-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x03 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       ADD_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x03 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       ADD_GPRv_GPRv_MEMv_APX
}


# EMITTING ADD (ADD-128-22-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       ADD_GPR8i8_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       ADD_MEMi8_IMM8_APX
}


# EMITTING ADD (ADD-128-22-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       ADD_GPR8i8_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       ADD_MEMi8_IMM8_APX
}


# EMITTING ADD (ADD-128-3-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       ADD_GPRv_IMMz_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       ADD_MEMv_IMMz_APX
}


# EMITTING ADD (ADD-128-3-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       ADD_GPRv_IMMz_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       ADD_MEMv_IMMz_APX
}


# EMITTING ADD (ADD-128-4-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       ADD_GPRv_IMMz_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       ADD_MEMv_IMMz_APX
}


# EMITTING ADD (ADD-128-4-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       ADD_GPRv_IMMz_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       ADD_MEMv_IMMz_APX
}


# EMITTING ADD (ADD-128-5-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       ADD_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       ADD_GPRv_MEMv_IMMz_APX
}


# EMITTING ADD (ADD-128-5-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       ADD_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       ADD_GPRv_MEMv_IMMz_APX
}


# EMITTING ADD (ADD-128-6-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       ADD_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       ADD_GPRv_MEMv_IMMz_APX
}


# EMITTING ADD (ADD-128-6-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       ADD_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       ADD_GPRv_MEMv_IMMz_APX
}


# EMITTING ADD (ADD-128-7-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       ADD_GPRv_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       ADD_MEMv_IMM8_APX
}


# EMITTING ADD (ADD-128-7-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       ADD_GPRv_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       ADD_MEMv_IMM8_APX
}


# EMITTING ADD (ADD-128-8-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       ADD_GPRv_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       ADD_MEMv_IMM8_APX
}


# EMITTING ADD (ADD-128-8-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       ADD_GPRv_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       ADD_MEMv_IMM8_APX
}


# EMITTING ADD (ADD-128-9-nf0)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       ADD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       ADD_GPRv_MEMv_IMM8_APX
}


# EMITTING ADD (ADD-128-9-nf1)
{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       ADD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ADD
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       ADD_GPRv_MEMv_IMM8_APX
}


# EMITTING ADOX (ADOX-128-1)
{
ICLASS:      ADOX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-TST OF-MOD ]
PATTERN:     EVV 0x66 VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():rw:d:i32 REG1=GPR32_B():r:d:i32
IFORM:       ADOX_GPR32i32_GPR32i32_APX
}

{
ICLASS:      ADOX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-TST OF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x66 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():rw:d:i32 MEM0:r:d:i32
IFORM:       ADOX_GPR32i32_MEMi32_APX
}


# EMITTING ADOX (ADOX-128-2)
{
ICLASS:      ADOX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-TST OF-MOD ]
PATTERN:     EVV 0x66 VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():rw:q:i64 REG1=GPR64_B():r:q:i64
IFORM:       ADOX_GPR64i64_GPR64i64_APX
}

{
ICLASS:      ADOX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-TST OF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x66 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():rw:q:i64 MEM0:r:q:i64
IFORM:       ADOX_GPR64i64_MEMi64_APX
}


# EMITTING ADOX (ADOX-128-3)
{
ICLASS:      ADOX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-TST OF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x66 VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 REG1=GPR32_R():r:d:i32 REG2=GPR32_B():r:d:i32
IFORM:       ADOX_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      ADOX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-TST OF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x66 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 REG1=GPR32_R():r:d:i32 MEM0:r:d:i32
IFORM:       ADOX_GPR32i32_GPR32i32_MEMi32_APX
}


# EMITTING ADOX (ADOX-128-4)
{
ICLASS:      ADOX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-TST OF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x66 VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 REG1=GPR64_R():r:q:i64 REG2=GPR64_B():r:q:i64
IFORM:       ADOX_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      ADOX
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-TST OF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x66 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 REG1=GPR64_R():r:q:i64 MEM0:r:q:i64
IFORM:       ADOX_GPR64i64_GPR64i64_MEMi64_APX
}


# EMITTING AESDEC128KL (AESDEC128KL-128-1)
{
ICLASS:      AESDEC128KL
CPL:         3
CATEGORY:    KEYLOCKER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-KEYLOCKER
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod of-0 sf-0 af-0 pf-0 cf-0  ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xDD VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:u8 MEM0:r:m384:u8
IFORM:       AESDEC128KL_XMMu8_MEMu8_APX
}


# EMITTING AESDEC256KL (AESDEC256KL-128-1)
{
ICLASS:      AESDEC256KL
CPL:         3
CATEGORY:    KEYLOCKER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-KEYLOCKER
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod of-0 sf-0 af-0 pf-0 cf-0  ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xDF VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:u8 MEM0:r:zd0:u8
IFORM:       AESDEC256KL_XMMu8_MEMu8_APX
}


# EMITTING AESDECWIDE128KL (AESDECWIDE128KL-128-1)
{
ICLASS:      AESDECWIDE128KL
CPL:         3
CATEGORY:    KEYLOCKER_WIDE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-KEYLOCKER
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod of-0 sf-0 af-0 pf-0 cf-0  ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD8 VF3 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:m384:u8 REG0=XED_REG_XMM0:rw:SUPP:dq:u8 REG1=XED_REG_XMM1:rw:SUPP:dq:u8 REG2=XED_REG_XMM2:rw:SUPP:dq:u8 REG3=XED_REG_XMM3:rw:SUPP:dq:u8 REG4=XED_REG_XMM4:rw:SUPP:dq:u8 REG5=XED_REG_XMM5:rw:SUPP:dq:u8 REG6=XED_REG_XMM6:rw:SUPP:dq:u8 REG7=XED_REG_XMM7:rw:SUPP:dq:u8
IFORM:       AESDECWIDE128KL_MEMu8_APX
}


# EMITTING AESDECWIDE256KL (AESDECWIDE256KL-128-1)
{
ICLASS:      AESDECWIDE256KL
CPL:         3
CATEGORY:    KEYLOCKER_WIDE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-KEYLOCKER
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod of-0 sf-0 af-0 pf-0 cf-0  ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD8 VF3 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:zd0:u8 REG0=XED_REG_XMM0:rw:SUPP:dq:u8 REG1=XED_REG_XMM1:rw:SUPP:dq:u8 REG2=XED_REG_XMM2:rw:SUPP:dq:u8 REG3=XED_REG_XMM3:rw:SUPP:dq:u8 REG4=XED_REG_XMM4:rw:SUPP:dq:u8 REG5=XED_REG_XMM5:rw:SUPP:dq:u8 REG6=XED_REG_XMM6:rw:SUPP:dq:u8 REG7=XED_REG_XMM7:rw:SUPP:dq:u8
IFORM:       AESDECWIDE256KL_MEMu8_APX
}


# EMITTING AESENC128KL (AESENC128KL-128-1)
{
ICLASS:      AESENC128KL
CPL:         3
CATEGORY:    KEYLOCKER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-KEYLOCKER
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod of-0 sf-0 af-0 pf-0 cf-0  ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xDC VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:u8 MEM0:r:m384:u8
IFORM:       AESENC128KL_XMMu8_MEMu8_APX
}


# EMITTING AESENC256KL (AESENC256KL-128-1)
{
ICLASS:      AESENC256KL
CPL:         3
CATEGORY:    KEYLOCKER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-KEYLOCKER
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod of-0 sf-0 af-0 pf-0 cf-0  ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xDE VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:u8 MEM0:r:zd0:u8
IFORM:       AESENC256KL_XMMu8_MEMu8_APX
}


# EMITTING AESENCWIDE128KL (AESENCWIDE128KL-128-1)
{
ICLASS:      AESENCWIDE128KL
CPL:         3
CATEGORY:    KEYLOCKER_WIDE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-KEYLOCKER
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod of-0 sf-0 af-0 pf-0 cf-0  ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD8 VF3 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:m384:u8 REG0=XED_REG_XMM0:rw:SUPP:dq:u8 REG1=XED_REG_XMM1:rw:SUPP:dq:u8 REG2=XED_REG_XMM2:rw:SUPP:dq:u8 REG3=XED_REG_XMM3:rw:SUPP:dq:u8 REG4=XED_REG_XMM4:rw:SUPP:dq:u8 REG5=XED_REG_XMM5:rw:SUPP:dq:u8 REG6=XED_REG_XMM6:rw:SUPP:dq:u8 REG7=XED_REG_XMM7:rw:SUPP:dq:u8
IFORM:       AESENCWIDE128KL_MEMu8_APX
}


# EMITTING AESENCWIDE256KL (AESENCWIDE256KL-128-1)
{
ICLASS:      AESENCWIDE256KL
CPL:         3
CATEGORY:    KEYLOCKER_WIDE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-KEYLOCKER
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod of-0 sf-0 af-0 pf-0 cf-0  ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD8 VF3 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:zd0:u8 REG0=XED_REG_XMM0:rw:SUPP:dq:u8 REG1=XED_REG_XMM1:rw:SUPP:dq:u8 REG2=XED_REG_XMM2:rw:SUPP:dq:u8 REG3=XED_REG_XMM3:rw:SUPP:dq:u8 REG4=XED_REG_XMM4:rw:SUPP:dq:u8 REG5=XED_REG_XMM5:rw:SUPP:dq:u8 REG6=XED_REG_XMM6:rw:SUPP:dq:u8 REG7=XED_REG_XMM7:rw:SUPP:dq:u8
IFORM:       AESENCWIDE256KL_MEMu8_APX
}


# EMITTING AND (AND-128-1-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x20 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x20 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       AND_MEMi8_GPR8i8_APX
}


# EMITTING AND (AND-128-1-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x20 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x20 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       AND_MEMi8_GPR8i8_APX
}


# EMITTING AND (AND-128-10-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       AND_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       AND_GPRv_MEMv_IMM8_APX
}


# EMITTING AND (AND-128-10-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       AND_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       AND_GPRv_MEMv_IMM8_APX
}


# EMITTING AND (AND-128-11-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x20 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x20 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       AND_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING AND (AND-128-11-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x20 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x20 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       AND_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING AND (AND-128-12-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x21 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       AND_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x21 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       AND_MEMv_GPRv_APX
}


# EMITTING AND (AND-128-12-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x21 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       AND_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x21 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       AND_MEMv_GPRv_APX
}


# EMITTING AND (AND-128-13-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x21 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       AND_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x21 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       AND_MEMv_GPRv_APX
}


# EMITTING AND (AND-128-13-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x21 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       AND_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x21 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       AND_MEMv_GPRv_APX
}


# EMITTING AND (AND-128-14-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x21 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       AND_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x21 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       AND_GPRv_MEMv_GPRv_APX
}


# EMITTING AND (AND-128-14-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x21 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       AND_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x21 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       AND_GPRv_MEMv_GPRv_APX
}


# EMITTING AND (AND-128-15-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x21 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       AND_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x21 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       AND_GPRv_MEMv_GPRv_APX
}


# EMITTING AND (AND-128-15-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x21 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       AND_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x21 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       AND_GPRv_MEMv_GPRv_APX
}


# EMITTING AND (AND-128-16-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x22 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x22 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       AND_GPR8i8_MEMi8_APX
}


# EMITTING AND (AND-128-16-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x22 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x22 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       AND_GPR8i8_MEMi8_APX
}


# EMITTING AND (AND-128-17-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x22 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x22 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING AND (AND-128-17-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x22 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x22 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING AND (AND-128-18-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x23 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       AND_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x23 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       AND_GPRv_MEMv_APX
}


# EMITTING AND (AND-128-18-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x23 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       AND_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x23 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       AND_GPRv_MEMv_APX
}


# EMITTING AND (AND-128-19-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x23 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       AND_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x23 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       AND_GPRv_MEMv_APX
}


# EMITTING AND (AND-128-19-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x23 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       AND_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x23 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       AND_GPRv_MEMv_APX
}


# EMITTING AND (AND-128-2-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       AND_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING AND (AND-128-2-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       AND_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       AND_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING AND (AND-128-20-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x23 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       AND_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x23 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       AND_GPRv_GPRv_MEMv_APX
}


# EMITTING AND (AND-128-20-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x23 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       AND_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x23 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       AND_GPRv_GPRv_MEMv_APX
}


# EMITTING AND (AND-128-21-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x23 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       AND_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x23 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       AND_GPRv_GPRv_MEMv_APX
}


# EMITTING AND (AND-128-21-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x23 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       AND_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x23 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       AND_GPRv_GPRv_MEMv_APX
}


# EMITTING AND (AND-128-22-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       AND_GPR8i8_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       AND_MEMi8_IMM8_APX
}


# EMITTING AND (AND-128-22-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       AND_GPR8i8_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       AND_MEMi8_IMM8_APX
}


# EMITTING AND (AND-128-3-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       AND_GPRv_IMMz_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       AND_MEMv_IMMz_APX
}


# EMITTING AND (AND-128-3-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       AND_GPRv_IMMz_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       AND_MEMv_IMMz_APX
}


# EMITTING AND (AND-128-4-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       AND_GPRv_IMMz_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       AND_MEMv_IMMz_APX
}


# EMITTING AND (AND-128-4-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       AND_GPRv_IMMz_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       AND_MEMv_IMMz_APX
}


# EMITTING AND (AND-128-5-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       AND_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       AND_GPRv_MEMv_IMMz_APX
}


# EMITTING AND (AND-128-5-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       AND_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       AND_GPRv_MEMv_IMMz_APX
}


# EMITTING AND (AND-128-6-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       AND_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       AND_GPRv_MEMv_IMMz_APX
}


# EMITTING AND (AND-128-6-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       AND_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       AND_GPRv_MEMv_IMMz_APX
}


# EMITTING AND (AND-128-7-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       AND_GPRv_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       AND_MEMv_IMM8_APX
}


# EMITTING AND (AND-128-7-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       AND_GPRv_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       AND_MEMv_IMM8_APX
}


# EMITTING AND (AND-128-8-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       AND_GPRv_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       AND_MEMv_IMM8_APX
}


# EMITTING AND (AND-128-8-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       AND_GPRv_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       AND_MEMv_IMM8_APX
}


# EMITTING AND (AND-128-9-nf0)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       AND_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       AND_GPRv_MEMv_IMM8_APX
}


# EMITTING AND (AND-128-9-nf1)
{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       AND_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      AND
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       AND_GPRv_MEMv_IMM8_APX
}


# EMITTING ANDN (ANDN-128-1-nf0)
{
ICLASS:      ANDN
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ]
PATTERN:     EVV 0xF2 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 REG2=GPR32_B():r:d:i32
IFORM:       ANDN_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      ANDN
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF2 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 MEM0:r:d:i32
IFORM:       ANDN_GPR32i32_GPR32i32_MEMi32_APX
}


# EMITTING ANDN (ANDN-128-1-nf1)
{
ICLASS:      ANDN
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF2 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 REG2=GPR32_B():r:d:i32
IFORM:       ANDN_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      ANDN
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF2 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 MEM0:r:d:i32
IFORM:       ANDN_GPR32i32_GPR32i32_MEMi32_APX
}


# EMITTING ANDN (ANDN-128-2-nf0)
{
ICLASS:      ANDN
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ]
PATTERN:     EVV 0xF2 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 REG2=GPR64_B():r:q:i64
IFORM:       ANDN_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      ANDN
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF2 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 MEM0:r:q:i64
IFORM:       ANDN_GPR64i64_GPR64i64_MEMi64_APX
}


# EMITTING ANDN (ANDN-128-2-nf1)
{
ICLASS:      ANDN
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF2 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 REG2=GPR64_B():r:q:i64
IFORM:       ANDN_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      ANDN
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF2 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 MEM0:r:q:i64
IFORM:       ANDN_GPR64i64_GPR64i64_MEMi64_APX
}


# EMITTING BEXTR (BEXTR-128-1-nf0)
{
ICLASS:      BEXTR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-U ]
PATTERN:     EVV 0xF7 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32
IFORM:       BEXTR_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      BEXTR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-U ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32
IFORM:       BEXTR_GPR32i32_MEMi32_GPR32i32_APX
}


# EMITTING BEXTR (BEXTR-128-1-nf1)
{
ICLASS:      BEXTR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32
IFORM:       BEXTR_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      BEXTR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32
IFORM:       BEXTR_GPR32i32_MEMi32_GPR32i32_APX
}


# EMITTING BEXTR (BEXTR-128-2-nf0)
{
ICLASS:      BEXTR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-U ]
PATTERN:     EVV 0xF7 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64
IFORM:       BEXTR_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      BEXTR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-U ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64
IFORM:       BEXTR_GPR64i64_MEMi64_GPR64i64_APX
}


# EMITTING BEXTR (BEXTR-128-2-nf1)
{
ICLASS:      BEXTR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64
IFORM:       BEXTR_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      BEXTR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64
IFORM:       BEXTR_GPR64i64_MEMi64_GPR64i64_APX
}


# EMITTING BLSI (BLSI-128-1-nf0)
{
ICLASS:      BLSI
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ]
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32
IFORM:       BLSI_GPR32i32_GPR32i32_APX
}

{
ICLASS:      BLSI
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32
IFORM:       BLSI_GPR32i32_MEMi32_APX
}


# EMITTING BLSI (BLSI-128-1-nf1)
{
ICLASS:      BLSI
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32
IFORM:       BLSI_GPR32i32_GPR32i32_APX
}

{
ICLASS:      BLSI
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32
IFORM:       BLSI_GPR32i32_MEMi32_APX
}


# EMITTING BLSI (BLSI-128-2-nf0)
{
ICLASS:      BLSI
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ]
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64
IFORM:       BLSI_GPR64i64_GPR64i64_APX
}

{
ICLASS:      BLSI
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64
IFORM:       BLSI_GPR64i64_MEMi64_APX
}


# EMITTING BLSI (BLSI-128-2-nf1)
{
ICLASS:      BLSI
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64
IFORM:       BLSI_GPR64i64_GPR64i64_APX
}

{
ICLASS:      BLSI
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64
IFORM:       BLSI_GPR64i64_MEMi64_APX
}


# EMITTING BLSMSK (BLSMSK-128-1-nf0)
{
ICLASS:      BLSMSK
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-0 AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32
IFORM:       BLSMSK_GPR32i32_GPR32i32_APX
}

{
ICLASS:      BLSMSK
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-0 AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32
IFORM:       BLSMSK_GPR32i32_MEMi32_APX
}


# EMITTING BLSMSK (BLSMSK-128-1-nf1)
{
ICLASS:      BLSMSK
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32
IFORM:       BLSMSK_GPR32i32_GPR32i32_APX
}

{
ICLASS:      BLSMSK
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32
IFORM:       BLSMSK_GPR32i32_MEMi32_APX
}


# EMITTING BLSMSK (BLSMSK-128-2-nf0)
{
ICLASS:      BLSMSK
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-0 AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64
IFORM:       BLSMSK_GPR64i64_GPR64i64_APX
}

{
ICLASS:      BLSMSK
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-0 AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64
IFORM:       BLSMSK_GPR64i64_MEMi64_APX
}


# EMITTING BLSMSK (BLSMSK-128-2-nf1)
{
ICLASS:      BLSMSK
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64
IFORM:       BLSMSK_GPR64i64_GPR64i64_APX
}

{
ICLASS:      BLSMSK
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64
IFORM:       BLSMSK_GPR64i64_MEMi64_APX
}


# EMITTING BLSR (BLSR-128-1-nf0)
{
ICLASS:      BLSR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32
IFORM:       BLSR_GPR32i32_GPR32i32_APX
}

{
ICLASS:      BLSR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32
IFORM:       BLSR_GPR32i32_MEMi32_APX
}


# EMITTING BLSR (BLSR-128-1-nf1)
{
ICLASS:      BLSR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32
IFORM:       BLSR_GPR32i32_GPR32i32_APX
}

{
ICLASS:      BLSR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32
IFORM:       BLSR_GPR32i32_MEMi32_APX
}


# EMITTING BLSR (BLSR-128-2-nf0)
{
ICLASS:      BLSR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64
IFORM:       BLSR_GPR64i64_GPR64i64_APX
}

{
ICLASS:      BLSR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64
IFORM:       BLSR_GPR64i64_MEMi64_APX
}


# EMITTING BLSR (BLSR-128-2-nf1)
{
ICLASS:      BLSR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64
IFORM:       BLSR_GPR64i64_GPR64i64_APX
}

{
ICLASS:      BLSR
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64
IFORM:       BLSR_GPR64i64_MEMi64_APX
}


# EMITTING BZHI (BZHI-128-1-nf0)
{
ICLASS:      BZHI
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF5 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32
IFORM:       BZHI_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      BZHI
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32
IFORM:       BZHI_GPR32i32_MEMi32_GPR32i32_APX
}


# EMITTING BZHI (BZHI-128-1-nf1)
{
ICLASS:      BZHI
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF5 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32
IFORM:       BZHI_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      BZHI
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32
IFORM:       BZHI_GPR32i32_MEMi32_GPR32i32_APX
}


# EMITTING BZHI (BZHI-128-2-nf0)
{
ICLASS:      BZHI
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF5 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64
IFORM:       BZHI_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      BZHI
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64
IFORM:       BZHI_GPR64i64_MEMi64_GPR64i64_APX
}


# EMITTING BZHI (BZHI-128-2-nf1)
{
ICLASS:      BZHI
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF5 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64
IFORM:       BZHI_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      BZHI
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64
IFORM:       BZHI_GPR64i64_MEMi64_GPR64i64_APX
}


# EMITTING CCMPB (CCMPB-128-1)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPB_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPB_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPB (CCMPB-128-10)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPB_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPB_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPB (CCMPB-128-11)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPB_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPB_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPB (CCMPB-128-2)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPB_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPB (CCMPB-128-3)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPB_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPB (CCMPB-128-4)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPB_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPB_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPB (CCMPB-128-5)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPB_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPB (CCMPB-128-6)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPB_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPB (CCMPB-128-7)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPB_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPB_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPB (CCMPB-128-8)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPB_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPB (CCMPB-128-9)
{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPB_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-1)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPBE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPBE_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-10)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPBE_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPBE_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-11)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPBE_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPBE_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-2)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPBE_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-3)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPBE_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-4)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPBE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPBE_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-5)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPBE_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-6)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPBE_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-7)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPBE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPBE_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-8)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPBE_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPBE (CCMPBE-128-9)
{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPBE_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-1)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPF_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPF_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-10)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPF_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPF_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-11)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPF_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPF_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-2)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPF_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPF_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-3)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPF_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPF_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-4)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPF_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPF_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-5)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPF_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPF_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-6)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPF_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPF_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-7)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPF_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPF_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-8)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPF_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPF_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPF (CCMPF-128-9)
{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPF_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPF_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-1)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPL_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPL_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-10)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPL_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPL_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-11)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPL_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPL_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-2)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPL_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-3)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPL_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-4)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPL_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPL_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-5)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPL_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-6)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPL_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-7)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPL_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPL_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-8)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPL_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPL (CCMPL-128-9)
{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPL_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-1)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPLE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPLE_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-10)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPLE_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPLE_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-11)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPLE_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPLE_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-2)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPLE_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-3)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPLE_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-4)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPLE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPLE_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-5)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPLE_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-6)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPLE_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-7)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPLE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPLE_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-8)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPLE_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPLE (CCMPLE-128-9)
{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPLE_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-1)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPNB_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPNB_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-10)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNB_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNB_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-11)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNB_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNB_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-2)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNB_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-3)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNB_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-4)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPNB_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNB_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-5)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNB_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-6)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNB_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-7)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNB_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNB_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-8)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNB_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNB (CCMPNB-128-9)
{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNB_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-1)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPNBE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPNBE_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-10)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNBE_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNBE_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-11)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNBE_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNBE_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-2)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNBE_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-3)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNBE_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-4)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPNBE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNBE_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-5)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNBE_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-6)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNBE_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-7)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNBE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNBE_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-8)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNBE_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNBE (CCMPNBE-128-9)
{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNBE_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-1)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPNL_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPNL_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-10)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNL_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNL_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-11)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNL_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNL_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-2)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNL_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-3)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNL_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-4)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPNL_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNL_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-5)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNL_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-6)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNL_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-7)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNL_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNL_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-8)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNL_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNL (CCMPNL-128-9)
{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNL_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-1)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPNLE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPNLE_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-10)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNLE_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNLE_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-11)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNLE_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNLE_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-2)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNLE_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-3)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNLE_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-4)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPNLE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNLE_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-5)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNLE_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-6)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNLE_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-7)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNLE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNLE_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-8)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNLE_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNLE (CCMPNLE-128-9)
{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNLE_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-1)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPNO_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPNO_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-10)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNO_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNO_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-11)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNO_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNO_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-2)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNO_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-3)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNO_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-4)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPNO_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNO_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-5)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNO_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-6)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNO_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-7)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNO_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNO_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-8)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNO_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNO (CCMPNO-128-9)
{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNO_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-1)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPNS_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPNS_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-10)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNS_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNS_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-11)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNS_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNS_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-2)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNS_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-3)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNS_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-4)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPNS_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNS_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-5)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNS_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-6)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNS_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-7)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNS_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNS_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-8)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNS_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNS (CCMPNS-128-9)
{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNS_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-1)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPNZ_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPNZ_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-10)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNZ_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNZ_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-11)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNZ_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNZ_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-2)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNZ_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-3)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPNZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPNZ_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-4)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPNZ_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNZ_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-5)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNZ_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-6)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPNZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPNZ_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-7)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPNZ_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPNZ_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-8)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNZ_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPNZ (CCMPNZ-128-9)
{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPNZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPNZ_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-1)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPO_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPO_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-10)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPO_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPO_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-11)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPO_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPO_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-2)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPO_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-3)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPO_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-4)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPO_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPO_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-5)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPO_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-6)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPO_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-7)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPO_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPO_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-8)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPO_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPO (CCMPO-128-9)
{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPO_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-1)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPS_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPS_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-10)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPS_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPS_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-11)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPS_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPS_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-2)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPS_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-3)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPS_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-4)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPS_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPS_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-5)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPS_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-6)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPS_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-7)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPS_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPS_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-8)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPS_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPS (CCMPS-128-9)
{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPS_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-1)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPT_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPT_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-10)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPT_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPT_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-11)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPT_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPT_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-2)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPT_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPT_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-3)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPT_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPT_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-4)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPT_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPT_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-5)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPT_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPT_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-6)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPT_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPT_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-7)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPT_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPT_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-8)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPT_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPT_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPT (CCMPT-128-9)
{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPT_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPT_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-1)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CCMPZ_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CCMPZ_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-10)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPZ_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPZ_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-11)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPZ_GPRv_IMM8_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:v IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPZ_MEMv_IMM8_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-2)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPZ_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-3)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CCMPZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CCMPZ_MEMv_GPRv_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-4)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r
IFORM:       CCMPZ_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPZ_GPR8i8_MEMi8_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-5)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPZ_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-6)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r
IFORM:       CCMPZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r
IFORM:       CCMPZ_GPRv_MEMv_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-7)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CCMPZ_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CCMPZ_MEMi8_IMM8_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-8)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPZ_MEMv_IMMz_DFV_APX
}


# EMITTING CCMPZ (CCMPZ-128-9)
{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CCMPZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CCMPZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CCMPZ_MEMv_IMMz_DFV_APX
}


# EMITTING CFCMOVB (CFCMOVB-128-1)
{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
PATTERN:     EVV 0x42 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVB_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x42 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVB_GPRv_MEMv_APX
}


# EMITTING CFCMOVB (CFCMOVB-128-2)
{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
PATTERN:     EVV 0x42 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVB_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x42 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVB_GPRv_MEMv_APX
}


# EMITTING CFCMOVB (CFCMOVB-128-3)
{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
PATTERN:     EVV 0x42 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVB_GPRv_GPRv_APX
}


# EMITTING CFCMOVB (CFCMOVB-128-4)
{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
PATTERN:     EVV 0x42 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVB_GPRv_GPRv_APX
}


# EMITTING CFCMOVB (CFCMOVB-128-5)
{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x42 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVB_MEMv_GPRv_APX
}


# EMITTING CFCMOVB (CFCMOVB-128-6)
{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x42 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVB_MEMv_GPRv_APX
}


# EMITTING CFCMOVB (CFCMOVB-128-7)
{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x42 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x42 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVB_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVB (CFCMOVB-128-8)
{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x42 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x42 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVB_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVBE (CFCMOVBE-128-1)
{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
PATTERN:     EVV 0x46 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVBE_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x46 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVBE_GPRv_MEMv_APX
}


# EMITTING CFCMOVBE (CFCMOVBE-128-2)
{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
PATTERN:     EVV 0x46 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVBE_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x46 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVBE_GPRv_MEMv_APX
}


# EMITTING CFCMOVBE (CFCMOVBE-128-3)
{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
PATTERN:     EVV 0x46 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVBE_GPRv_GPRv_APX
}


# EMITTING CFCMOVBE (CFCMOVBE-128-4)
{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
PATTERN:     EVV 0x46 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVBE_GPRv_GPRv_APX
}


# EMITTING CFCMOVBE (CFCMOVBE-128-5)
{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x46 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVBE_MEMv_GPRv_APX
}


# EMITTING CFCMOVBE (CFCMOVBE-128-6)
{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x46 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVBE_MEMv_GPRv_APX
}


# EMITTING CFCMOVBE (CFCMOVBE-128-7)
{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x46 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVBE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x46 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVBE_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVBE (CFCMOVBE-128-8)
{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x46 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVBE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x46 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVBE_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVL (CFCMOVL-128-1)
{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
PATTERN:     EVV 0x4C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVL_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVL_GPRv_MEMv_APX
}


# EMITTING CFCMOVL (CFCMOVL-128-2)
{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
PATTERN:     EVV 0x4C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVL_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVL_GPRv_MEMv_APX
}


# EMITTING CFCMOVL (CFCMOVL-128-3)
{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
PATTERN:     EVV 0x4C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVL_GPRv_GPRv_APX
}


# EMITTING CFCMOVL (CFCMOVL-128-4)
{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
PATTERN:     EVV 0x4C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVL_GPRv_GPRv_APX
}


# EMITTING CFCMOVL (CFCMOVL-128-5)
{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVL_MEMv_GPRv_APX
}


# EMITTING CFCMOVL (CFCMOVL-128-6)
{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVL_MEMv_GPRv_APX
}


# EMITTING CFCMOVL (CFCMOVL-128-7)
{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVL_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVL (CFCMOVL-128-8)
{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVL_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVLE (CFCMOVLE-128-1)
{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
PATTERN:     EVV 0x4E VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVLE_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4E VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVLE_GPRv_MEMv_APX
}


# EMITTING CFCMOVLE (CFCMOVLE-128-2)
{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
PATTERN:     EVV 0x4E V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVLE_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4E V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVLE_GPRv_MEMv_APX
}


# EMITTING CFCMOVLE (CFCMOVLE-128-3)
{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
PATTERN:     EVV 0x4E VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVLE_GPRv_GPRv_APX
}


# EMITTING CFCMOVLE (CFCMOVLE-128-4)
{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
PATTERN:     EVV 0x4E V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVLE_GPRv_GPRv_APX
}


# EMITTING CFCMOVLE (CFCMOVLE-128-5)
{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4E VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVLE_MEMv_GPRv_APX
}


# EMITTING CFCMOVLE (CFCMOVLE-128-6)
{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4E V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVLE_MEMv_GPRv_APX
}


# EMITTING CFCMOVLE (CFCMOVLE-128-7)
{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4E VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVLE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4E VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVLE_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVLE (CFCMOVLE-128-8)
{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4E V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVLE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4E V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVLE_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNB (CFCMOVNB-128-1)
{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
PATTERN:     EVV 0x43 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNB_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x43 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNB_GPRv_MEMv_APX
}


# EMITTING CFCMOVNB (CFCMOVNB-128-2)
{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
PATTERN:     EVV 0x43 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNB_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x43 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNB_GPRv_MEMv_APX
}


# EMITTING CFCMOVNB (CFCMOVNB-128-3)
{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
PATTERN:     EVV 0x43 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNB_GPRv_GPRv_APX
}


# EMITTING CFCMOVNB (CFCMOVNB-128-4)
{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
PATTERN:     EVV 0x43 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNB_GPRv_GPRv_APX
}


# EMITTING CFCMOVNB (CFCMOVNB-128-5)
{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x43 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNB_MEMv_GPRv_APX
}


# EMITTING CFCMOVNB (CFCMOVNB-128-6)
{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x43 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNB_MEMv_GPRv_APX
}


# EMITTING CFCMOVNB (CFCMOVNB-128-7)
{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x43 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x43 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNB_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNB (CFCMOVNB-128-8)
{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x43 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x43 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNB_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNBE (CFCMOVNBE-128-1)
{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
PATTERN:     EVV 0x47 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNBE_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x47 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNBE_GPRv_MEMv_APX
}


# EMITTING CFCMOVNBE (CFCMOVNBE-128-2)
{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
PATTERN:     EVV 0x47 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNBE_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x47 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNBE_GPRv_MEMv_APX
}


# EMITTING CFCMOVNBE (CFCMOVNBE-128-3)
{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
PATTERN:     EVV 0x47 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNBE_GPRv_GPRv_APX
}


# EMITTING CFCMOVNBE (CFCMOVNBE-128-4)
{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
PATTERN:     EVV 0x47 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNBE_GPRv_GPRv_APX
}


# EMITTING CFCMOVNBE (CFCMOVNBE-128-5)
{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x47 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNBE_MEMv_GPRv_APX
}


# EMITTING CFCMOVNBE (CFCMOVNBE-128-6)
{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x47 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNBE_MEMv_GPRv_APX
}


# EMITTING CFCMOVNBE (CFCMOVNBE-128-7)
{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x47 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNBE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x47 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNBE_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNBE (CFCMOVNBE-128-8)
{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x47 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNBE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x47 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNBE_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNL (CFCMOVNL-128-1)
{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
PATTERN:     EVV 0x4D VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNL_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4D VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNL_GPRv_MEMv_APX
}


# EMITTING CFCMOVNL (CFCMOVNL-128-2)
{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
PATTERN:     EVV 0x4D V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNL_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4D V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNL_GPRv_MEMv_APX
}


# EMITTING CFCMOVNL (CFCMOVNL-128-3)
{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
PATTERN:     EVV 0x4D VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNL_GPRv_GPRv_APX
}


# EMITTING CFCMOVNL (CFCMOVNL-128-4)
{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
PATTERN:     EVV 0x4D V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNL_GPRv_GPRv_APX
}


# EMITTING CFCMOVNL (CFCMOVNL-128-5)
{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4D VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNL_MEMv_GPRv_APX
}


# EMITTING CFCMOVNL (CFCMOVNL-128-6)
{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4D V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNL_MEMv_GPRv_APX
}


# EMITTING CFCMOVNL (CFCMOVNL-128-7)
{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4D VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4D VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNL_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNL (CFCMOVNL-128-8)
{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4D V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4D V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNL_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNLE (CFCMOVNLE-128-1)
{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
PATTERN:     EVV 0x4F VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNLE_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4F VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNLE_GPRv_MEMv_APX
}


# EMITTING CFCMOVNLE (CFCMOVNLE-128-2)
{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
PATTERN:     EVV 0x4F V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNLE_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4F V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNLE_GPRv_MEMv_APX
}


# EMITTING CFCMOVNLE (CFCMOVNLE-128-3)
{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
PATTERN:     EVV 0x4F VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNLE_GPRv_GPRv_APX
}


# EMITTING CFCMOVNLE (CFCMOVNLE-128-4)
{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
PATTERN:     EVV 0x4F V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNLE_GPRv_GPRv_APX
}


# EMITTING CFCMOVNLE (CFCMOVNLE-128-5)
{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4F VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNLE_MEMv_GPRv_APX
}


# EMITTING CFCMOVNLE (CFCMOVNLE-128-6)
{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4F V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNLE_MEMv_GPRv_APX
}


# EMITTING CFCMOVNLE (CFCMOVNLE-128-7)
{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4F VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNLE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4F VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNLE_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNLE (CFCMOVNLE-128-8)
{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4F V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNLE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4F V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNLE_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNO (CFCMOVNO-128-1)
{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
PATTERN:     EVV 0x41 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNO_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x41 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNO_GPRv_MEMv_APX
}


# EMITTING CFCMOVNO (CFCMOVNO-128-2)
{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
PATTERN:     EVV 0x41 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNO_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x41 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNO_GPRv_MEMv_APX
}


# EMITTING CFCMOVNO (CFCMOVNO-128-3)
{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
PATTERN:     EVV 0x41 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNO_GPRv_GPRv_APX
}


# EMITTING CFCMOVNO (CFCMOVNO-128-4)
{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
PATTERN:     EVV 0x41 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNO_GPRv_GPRv_APX
}


# EMITTING CFCMOVNO (CFCMOVNO-128-5)
{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x41 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNO_MEMv_GPRv_APX
}


# EMITTING CFCMOVNO (CFCMOVNO-128-6)
{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x41 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNO_MEMv_GPRv_APX
}


# EMITTING CFCMOVNO (CFCMOVNO-128-7)
{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x41 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNO_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x41 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNO_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNO (CFCMOVNO-128-8)
{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x41 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNO_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x41 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNO_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNP (CFCMOVNP-128-1)
{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
PATTERN:     EVV 0x4B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNP_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNP_GPRv_MEMv_APX
}


# EMITTING CFCMOVNP (CFCMOVNP-128-2)
{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
PATTERN:     EVV 0x4B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNP_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNP_GPRv_MEMv_APX
}


# EMITTING CFCMOVNP (CFCMOVNP-128-3)
{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
PATTERN:     EVV 0x4B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNP_GPRv_GPRv_APX
}


# EMITTING CFCMOVNP (CFCMOVNP-128-4)
{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
PATTERN:     EVV 0x4B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNP_GPRv_GPRv_APX
}


# EMITTING CFCMOVNP (CFCMOVNP-128-5)
{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNP_MEMv_GPRv_APX
}


# EMITTING CFCMOVNP (CFCMOVNP-128-6)
{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNP_MEMv_GPRv_APX
}


# EMITTING CFCMOVNP (CFCMOVNP-128-7)
{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNP_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNP_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNP (CFCMOVNP-128-8)
{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNP_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNP_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNS (CFCMOVNS-128-1)
{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
PATTERN:     EVV 0x49 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNS_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x49 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNS_GPRv_MEMv_APX
}


# EMITTING CFCMOVNS (CFCMOVNS-128-2)
{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
PATTERN:     EVV 0x49 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNS_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x49 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNS_GPRv_MEMv_APX
}


# EMITTING CFCMOVNS (CFCMOVNS-128-3)
{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
PATTERN:     EVV 0x49 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNS_GPRv_GPRv_APX
}


# EMITTING CFCMOVNS (CFCMOVNS-128-4)
{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
PATTERN:     EVV 0x49 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNS_GPRv_GPRv_APX
}


# EMITTING CFCMOVNS (CFCMOVNS-128-5)
{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x49 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNS_MEMv_GPRv_APX
}


# EMITTING CFCMOVNS (CFCMOVNS-128-6)
{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x49 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNS_MEMv_GPRv_APX
}


# EMITTING CFCMOVNS (CFCMOVNS-128-7)
{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x49 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNS_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x49 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNS_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNS (CFCMOVNS-128-8)
{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x49 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNS_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x49 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNS_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNZ (CFCMOVNZ-128-1)
{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
PATTERN:     EVV 0x45 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNZ_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x45 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNZ_GPRv_MEMv_APX
}


# EMITTING CFCMOVNZ (CFCMOVNZ-128-2)
{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
PATTERN:     EVV 0x45 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVNZ_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x45 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVNZ_GPRv_MEMv_APX
}


# EMITTING CFCMOVNZ (CFCMOVNZ-128-3)
{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
PATTERN:     EVV 0x45 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNZ_GPRv_GPRv_APX
}


# EMITTING CFCMOVNZ (CFCMOVNZ-128-4)
{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
PATTERN:     EVV 0x45 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVNZ_GPRv_GPRv_APX
}


# EMITTING CFCMOVNZ (CFCMOVNZ-128-5)
{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x45 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNZ_MEMv_GPRv_APX
}


# EMITTING CFCMOVNZ (CFCMOVNZ-128-6)
{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x45 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVNZ_MEMv_GPRv_APX
}


# EMITTING CFCMOVNZ (CFCMOVNZ-128-7)
{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x45 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNZ_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x45 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNZ_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVNZ (CFCMOVNZ-128-8)
{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x45 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVNZ_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x45 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVNZ_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVO (CFCMOVO-128-1)
{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
PATTERN:     EVV 0x40 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVO_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x40 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVO_GPRv_MEMv_APX
}


# EMITTING CFCMOVO (CFCMOVO-128-2)
{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
PATTERN:     EVV 0x40 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVO_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x40 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVO_GPRv_MEMv_APX
}


# EMITTING CFCMOVO (CFCMOVO-128-3)
{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
PATTERN:     EVV 0x40 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVO_GPRv_GPRv_APX
}


# EMITTING CFCMOVO (CFCMOVO-128-4)
{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
PATTERN:     EVV 0x40 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVO_GPRv_GPRv_APX
}


# EMITTING CFCMOVO (CFCMOVO-128-5)
{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x40 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVO_MEMv_GPRv_APX
}


# EMITTING CFCMOVO (CFCMOVO-128-6)
{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x40 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVO_MEMv_GPRv_APX
}


# EMITTING CFCMOVO (CFCMOVO-128-7)
{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x40 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVO_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x40 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVO_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVO (CFCMOVO-128-8)
{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x40 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVO_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x40 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVO_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVP (CFCMOVP-128-1)
{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
PATTERN:     EVV 0x4A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVP_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVP_GPRv_MEMv_APX
}


# EMITTING CFCMOVP (CFCMOVP-128-2)
{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
PATTERN:     EVV 0x4A V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVP_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4A V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVP_GPRv_MEMv_APX
}


# EMITTING CFCMOVP (CFCMOVP-128-3)
{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
PATTERN:     EVV 0x4A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVP_GPRv_GPRv_APX
}


# EMITTING CFCMOVP (CFCMOVP-128-4)
{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
PATTERN:     EVV 0x4A V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVP_GPRv_GPRv_APX
}


# EMITTING CFCMOVP (CFCMOVP-128-5)
{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVP_MEMv_GPRv_APX
}


# EMITTING CFCMOVP (CFCMOVP-128-6)
{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4A V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVP_MEMv_GPRv_APX
}


# EMITTING CFCMOVP (CFCMOVP-128-7)
{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVP_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVP_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVP (CFCMOVP-128-8)
{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4A V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVP_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x4A V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVP_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVS (CFCMOVS-128-1)
{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
PATTERN:     EVV 0x48 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVS_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x48 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVS_GPRv_MEMv_APX
}


# EMITTING CFCMOVS (CFCMOVS-128-2)
{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
PATTERN:     EVV 0x48 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVS_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x48 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVS_GPRv_MEMv_APX
}


# EMITTING CFCMOVS (CFCMOVS-128-3)
{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
PATTERN:     EVV 0x48 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVS_GPRv_GPRv_APX
}


# EMITTING CFCMOVS (CFCMOVS-128-4)
{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
PATTERN:     EVV 0x48 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVS_GPRv_GPRv_APX
}


# EMITTING CFCMOVS (CFCMOVS-128-5)
{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x48 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVS_MEMv_GPRv_APX
}


# EMITTING CFCMOVS (CFCMOVS-128-6)
{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x48 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVS_MEMv_GPRv_APX
}


# EMITTING CFCMOVS (CFCMOVS-128-7)
{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x48 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVS_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x48 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVS_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVS (CFCMOVS-128-8)
{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x48 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVS_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x48 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVS_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVZ (CFCMOVZ-128-1)
{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
PATTERN:     EVV 0x44 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVZ_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x44 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVZ_GPRv_MEMv_APX
}


# EMITTING CFCMOVZ (CFCMOVZ-128-2)
{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
PATTERN:     EVV 0x44 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       CFCMOVZ_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x44 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       CFCMOVZ_GPRv_MEMv_APX
}


# EMITTING CFCMOVZ (CFCMOVZ-128-3)
{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
PATTERN:     EVV 0x44 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVZ_GPRv_GPRv_APX
}


# EMITTING CFCMOVZ (CFCMOVZ-128-4)
{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
PATTERN:     EVV 0x44 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       CFCMOVZ_GPRv_GPRv_APX
}


# EMITTING CFCMOVZ (CFCMOVZ-128-5)
{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x44 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVZ_MEMv_GPRv_APX
}


# EMITTING CFCMOVZ (CFCMOVZ-128-6)
{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x44 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:cw:v REG0=GPRv_R():r:v
IFORM:       CFCMOVZ_MEMv_GPRv_APX
}


# EMITTING CFCMOVZ (CFCMOVZ-128-7)
{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x44 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVZ_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x44 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVZ_GPRv_GPRv_MEMv_APX
}


# EMITTING CFCMOVZ (CFCMOVZ-128-8)
{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x44 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CFCMOVZ_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CFCMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CFCMOV
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION 
PATTERN:     EVV 0x44 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CFCMOVZ_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVB (CMOVB-128-1)
{
ICLASS:      CMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x42 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x42 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVB_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVB (CMOVB-128-2)
{
ICLASS:      CMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x42 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x42 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVB_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVBE (CMOVBE-128-1)
{
ICLASS:      CMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x46 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVBE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x46 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVBE_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVBE (CMOVBE-128-2)
{
ICLASS:      CMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x46 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVBE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x46 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVBE_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVL (CMOVL-128-1)
{
ICLASS:      CMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVL_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVL (CMOVL-128-2)
{
ICLASS:      CMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVL_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVLE (CMOVLE-128-1)
{
ICLASS:      CMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4E VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVLE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4E VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVLE_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVLE (CMOVLE-128-2)
{
ICLASS:      CMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4E V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVLE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4E V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVLE_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNB (CMOVNB-128-1)
{
ICLASS:      CMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x43 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x43 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNB_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNB (CMOVNB-128-2)
{
ICLASS:      CMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x43 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x43 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNB_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNBE (CMOVNBE-128-1)
{
ICLASS:      CMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x47 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNBE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x47 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNBE_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNBE (CMOVNBE-128-2)
{
ICLASS:      CMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x47 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNBE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x47 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNBE_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNL (CMOVNL-128-1)
{
ICLASS:      CMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4D VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4D VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNL_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNL (CMOVNL-128-2)
{
ICLASS:      CMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4D V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4D V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNL_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNLE (CMOVNLE-128-1)
{
ICLASS:      CMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4F VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNLE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4F VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNLE_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNLE (CMOVNLE-128-2)
{
ICLASS:      CMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4F V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNLE_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4F V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNLE_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNO (CMOVNO-128-1)
{
ICLASS:      CMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x41 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNO_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x41 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNO_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNO (CMOVNO-128-2)
{
ICLASS:      CMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x41 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNO_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x41 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNO_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNP (CMOVNP-128-1)
{
ICLASS:      CMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNP_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNP_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNP (CMOVNP-128-2)
{
ICLASS:      CMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNP_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNP_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNS (CMOVNS-128-1)
{
ICLASS:      CMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x49 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNS_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x49 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNS_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNS (CMOVNS-128-2)
{
ICLASS:      CMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x49 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNS_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x49 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNS_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNZ (CMOVNZ-128-1)
{
ICLASS:      CMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x45 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNZ_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x45 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNZ_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVNZ (CMOVNZ-128-2)
{
ICLASS:      CMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x45 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVNZ_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x45 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVNZ_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVO (CMOVO-128-1)
{
ICLASS:      CMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x40 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVO_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x40 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVO_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVO (CMOVO-128-2)
{
ICLASS:      CMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x40 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVO_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x40 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVO_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVP (CMOVP-128-1)
{
ICLASS:      CMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVP_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVP_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVP (CMOVP-128-2)
{
ICLASS:      CMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x4A V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVP_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVP
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x4A V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVP_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVS (CMOVS-128-1)
{
ICLASS:      CMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x48 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVS_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x48 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVS_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVS (CMOVS-128-2)
{
ICLASS:      CMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x48 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVS_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x48 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVS_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVZ (CMOVZ-128-1)
{
ICLASS:      CMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x44 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVZ_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x44 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVZ_GPRv_GPRv_MEMv_APX
}


# EMITTING CMOVZ (CMOVZ-128-2)
{
ICLASS:      CMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x44 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       CMOVZ_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      CMOVZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x44 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       CMOVZ_GPRv_GPRv_MEMv_APX
}


# EMITTING CMPBEXADD (CMPBEXADD-128-3)
{
ICLASS:      CMPBEXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xE6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPBEXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPBEXADD (CMPBEXADD-128-4)
{
ICLASS:      CMPBEXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xE6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPBEXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPBXADD (CMPBXADD-128-3)
{
ICLASS:      CMPBXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xE2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPBXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPBXADD (CMPBXADD-128-4)
{
ICLASS:      CMPBXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xE2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPBXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPLEXADD (CMPLEXADD-128-3)
{
ICLASS:      CMPLEXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xEE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPLEXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPLEXADD (CMPLEXADD-128-4)
{
ICLASS:      CMPLEXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xEE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPLEXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPLXADD (CMPLXADD-128-3)
{
ICLASS:      CMPLXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xEC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPLXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPLXADD (CMPLXADD-128-4)
{
ICLASS:      CMPLXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xEC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPLXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPNBEXADD (CMPNBEXADD-128-3)
{
ICLASS:      CMPNBEXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xE7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPNBEXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPNBEXADD (CMPNBEXADD-128-4)
{
ICLASS:      CMPNBEXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xE7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPNBEXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPNBXADD (CMPNBXADD-128-3)
{
ICLASS:      CMPNBXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xE3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPNBXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPNBXADD (CMPNBXADD-128-4)
{
ICLASS:      CMPNBXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xE3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPNBXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPNLEXADD (CMPNLEXADD-128-3)
{
ICLASS:      CMPNLEXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xEF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPNLEXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPNLEXADD (CMPNLEXADD-128-4)
{
ICLASS:      CMPNLEXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xEF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPNLEXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPNLXADD (CMPNLXADD-128-3)
{
ICLASS:      CMPNLXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xED V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPNLXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPNLXADD (CMPNLXADD-128-4)
{
ICLASS:      CMPNLXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xED V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPNLXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPNOXADD (CMPNOXADD-128-3)
{
ICLASS:      CMPNOXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xE1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPNOXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPNOXADD (CMPNOXADD-128-4)
{
ICLASS:      CMPNOXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xE1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPNOXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPNPXADD (CMPNPXADD-128-3)
{
ICLASS:      CMPNPXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xEB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPNPXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPNPXADD (CMPNPXADD-128-4)
{
ICLASS:      CMPNPXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xEB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPNPXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPNSXADD (CMPNSXADD-128-3)
{
ICLASS:      CMPNSXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xE9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPNSXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPNSXADD (CMPNSXADD-128-4)
{
ICLASS:      CMPNSXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xE9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPNSXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPNZXADD (CMPNZXADD-128-3)
{
ICLASS:      CMPNZXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xE5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPNZXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPNZXADD (CMPNZXADD-128-4)
{
ICLASS:      CMPNZXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xE5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPNZXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPOXADD (CMPOXADD-128-3)
{
ICLASS:      CMPOXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xE0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPOXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPOXADD (CMPOXADD-128-4)
{
ICLASS:      CMPOXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xE0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPOXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPPXADD (CMPPXADD-128-3)
{
ICLASS:      CMPPXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xEA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPPXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPPXADD (CMPPXADD-128-4)
{
ICLASS:      CMPPXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xEA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPPXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPSXADD (CMPSXADD-128-3)
{
ICLASS:      CMPSXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xE8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPSXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPSXADD (CMPSXADD-128-4)
{
ICLASS:      CMPSXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xE8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPSXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CMPZXADD (CMPZXADD-128-3)
{
ICLASS:      CMPZXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B 
PATTERN:     EVV 0xE4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32
IFORM:       CMPZXADD_MEMu32_GPR32u32_GPR32u32_APX
}


# EMITTING CMPZXADD (CMPZXADD-128-4)
{
ICLASS:      CMPZXADD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CMPCCXADD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-mod  pf-mod  of-mod  sf-mod  af-mod  ]
ATTRIBUTES:  ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B 
PATTERN:     EVV 0xE4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64
IFORM:       CMPZXADD_MEMu64_GPR64u64_GPR64u64_APX
}


# EMITTING CRC32 (CRC32-128-1)
{
ICLASS:      CRC32
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
PATTERN:     EVV 0xF0 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRy_R():rw:y REG1=GPR8_B():r:b:i8
IFORM:       CRC32_GPRy_GPR8i8_APX
}

{
ICLASS:      CRC32
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF0 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRy_R():rw:y MEM0:r:b:i8
IFORM:       CRC32_GPRy_MEMi8_APX
}


# EMITTING CRC32 (CRC32-128-2)
{
ICLASS:      CRC32
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
PATTERN:     EVV 0xF1 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRy_R():rw:y REG1=GPRv_B():r:v
IFORM:       CRC32_GPRy_GPRv_APX
}

{
ICLASS:      CRC32
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF1 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRy_R():rw:y MEM0:r:v
IFORM:       CRC32_GPRy_MEMv_APX
}


# EMITTING CRC32 (CRC32-128-3)
{
ICLASS:      CRC32
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
PATTERN:     EVV 0xF1 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRy_R():rw:y REG1=GPRv_B():r:v
IFORM:       CRC32_GPRy_GPRv_APX
}

{
ICLASS:      CRC32
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF1 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRy_R():rw:y MEM0:r:v
IFORM:       CRC32_GPRy_MEMv_APX
}


# EMITTING CTESTB (CTESTB-128-1)
{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTB_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTB_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTB (CTESTB-128-2)
{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTB_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTB (CTESTB-128-3)
{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTB_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTB (CTESTB-128-4)
{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTB_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTB_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTB (CTESTB-128-5)
{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTB_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTB_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTB (CTESTB-128-6)
{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTB_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTB (CTESTB-128-7)
{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTB_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTB (CTESTB-128-8)
{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTB_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTB (CTESTB-128-9)
{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTB_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTBE (CTESTBE-128-1)
{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTBE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTBE_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTBE (CTESTBE-128-2)
{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTBE_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTBE (CTESTBE-128-3)
{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTBE_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTBE (CTESTBE-128-4)
{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTBE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTBE_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTBE (CTESTBE-128-5)
{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTBE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTBE_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTBE (CTESTBE-128-6)
{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTBE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTBE (CTESTBE-128-7)
{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTBE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTBE (CTESTBE-128-8)
{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTBE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTBE (CTESTBE-128-9)
{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTBE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTF (CTESTF-128-1)
{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTF_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTF_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTF (CTESTF-128-2)
{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTF_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTF_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTF (CTESTF-128-3)
{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTF_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTF_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTF (CTESTF-128-4)
{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTF_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTF_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTF (CTESTF-128-5)
{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTF_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTF_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTF (CTESTF-128-6)
{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTF_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTF_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTF (CTESTF-128-7)
{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTF_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTF_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTF (CTESTF-128-8)
{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTF_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTF_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTF (CTESTF-128-9)
{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTF_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTF
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTF_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTL (CTESTL-128-1)
{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTL_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTL_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTL (CTESTL-128-2)
{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTL_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTL (CTESTL-128-3)
{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTL_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTL (CTESTL-128-4)
{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTL_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTL_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTL (CTESTL-128-5)
{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTL_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTL_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTL (CTESTL-128-6)
{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTL_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTL (CTESTL-128-7)
{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTL_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTL (CTESTL-128-8)
{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTL_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTL (CTESTL-128-9)
{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTL_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTLE (CTESTLE-128-1)
{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTLE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTLE_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTLE (CTESTLE-128-2)
{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTLE_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTLE (CTESTLE-128-3)
{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTLE_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTLE (CTESTLE-128-4)
{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTLE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTLE_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTLE (CTESTLE-128-5)
{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTLE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTLE_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTLE (CTESTLE-128-6)
{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTLE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTLE (CTESTLE-128-7)
{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTLE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTLE (CTESTLE-128-8)
{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTLE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTLE (CTESTLE-128-9)
{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTLE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNB (CTESTNB-128-1)
{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTNB_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTNB_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTNB (CTESTNB-128-2)
{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNB_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNB (CTESTNB-128-3)
{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNB_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNB_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNB (CTESTNB-128-4)
{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNB_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNB_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNB (CTESTNB-128-5)
{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNB_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNB_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNB (CTESTNB-128-6)
{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNB_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNB (CTESTNB-128-7)
{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNB_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNB (CTESTNB-128-8)
{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNB_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNB (CTESTNB-128-9)
{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNB_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNB
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNB_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNBE (CTESTNBE-128-1)
{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTNBE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTNBE_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTNBE (CTESTNBE-128-2)
{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNBE_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNBE (CTESTNBE-128-3)
{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNBE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNBE_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNBE (CTESTNBE-128-4)
{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNBE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNBE_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNBE (CTESTNBE-128-5)
{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNBE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNBE_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNBE (CTESTNBE-128-6)
{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNBE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNBE (CTESTNBE-128-7)
{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNBE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNBE (CTESTNBE-128-8)
{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNBE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNBE (CTESTNBE-128-9)
{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNBE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNBE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNBE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNL (CTESTNL-128-1)
{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTNL_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTNL_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTNL (CTESTNL-128-2)
{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNL_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNL (CTESTNL-128-3)
{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNL_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNL_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNL (CTESTNL-128-4)
{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNL_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNL_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNL (CTESTNL-128-5)
{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNL_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNL_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNL (CTESTNL-128-6)
{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNL_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNL (CTESTNL-128-7)
{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNL_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNL (CTESTNL-128-8)
{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNL_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNL (CTESTNL-128-9)
{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNL_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNL
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNL_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNLE (CTESTNLE-128-1)
{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTNLE_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTNLE_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTNLE (CTESTNLE-128-2)
{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNLE_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNLE (CTESTNLE-128-3)
{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNLE_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNLE_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNLE (CTESTNLE-128-4)
{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNLE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNLE_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNLE (CTESTNLE-128-5)
{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNLE_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNLE_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNLE (CTESTNLE-128-6)
{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNLE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNLE (CTESTNLE-128-7)
{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNLE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNLE (CTESTNLE-128-8)
{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNLE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNLE (CTESTNLE-128-9)
{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNLE_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNLE
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNLE_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNO (CTESTNO-128-1)
{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTNO_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTNO_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTNO (CTESTNO-128-2)
{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNO_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNO (CTESTNO-128-3)
{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNO_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNO (CTESTNO-128-4)
{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNO_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNO_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNO (CTESTNO-128-5)
{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNO_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNO_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNO (CTESTNO-128-6)
{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNO_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNO (CTESTNO-128-7)
{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNO_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNO (CTESTNO-128-8)
{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNO_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNO (CTESTNO-128-9)
{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNO_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNS (CTESTNS-128-1)
{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTNS_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTNS_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTNS (CTESTNS-128-2)
{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNS_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNS (CTESTNS-128-3)
{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNS_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNS (CTESTNS-128-4)
{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNS_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNS_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNS (CTESTNS-128-5)
{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNS_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNS_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNS (CTESTNS-128-6)
{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNS_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNS (CTESTNS-128-7)
{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNS_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNS (CTESTNS-128-8)
{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNS_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNS (CTESTNS-128-9)
{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNS_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNZ (CTESTNZ-128-1)
{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTNZ_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTNZ_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTNZ (CTESTNZ-128-2)
{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNZ_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNZ (CTESTNZ-128-3)
{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTNZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTNZ_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTNZ (CTESTNZ-128-4)
{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNZ_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNZ_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNZ (CTESTNZ-128-5)
{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTNZ_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTNZ_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTNZ (CTESTNZ-128-6)
{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNZ_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNZ (CTESTNZ-128-7)
{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNZ_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNZ (CTESTNZ-128-8)
{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNZ_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTNZ (CTESTNZ-128-9)
{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTNZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTNZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTNZ_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTO (CTESTO-128-1)
{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTO_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTO_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTO (CTESTO-128-2)
{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTO_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTO (CTESTO-128-3)
{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTO_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTO_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTO (CTESTO-128-4)
{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTO_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTO_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTO (CTESTO-128-5)
{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTO_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTO_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTO (CTESTO-128-6)
{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTO_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTO (CTESTO-128-7)
{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTO_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTO (CTESTO-128-8)
{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTO_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTO (CTESTO-128-9)
{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTO_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTO
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTO_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTS (CTESTS-128-1)
{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTS_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTS_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTS (CTESTS-128-2)
{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTS_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTS (CTESTS-128-3)
{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTS_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTS_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTS (CTESTS-128-4)
{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTS_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTS_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTS (CTESTS-128-5)
{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTS_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTS_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTS (CTESTS-128-6)
{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTS_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTS (CTESTS-128-7)
{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTS_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTS (CTESTS-128-8)
{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTS_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTS (CTESTS-128-9)
{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTS_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTS_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTT (CTESTT-128-1)
{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTT_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTT_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTT (CTESTT-128-2)
{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTT_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTT_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTT (CTESTT-128-3)
{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTT_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTT_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTT (CTESTT-128-4)
{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTT_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTT_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTT (CTESTT-128-5)
{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTT_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTT_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTT (CTESTT-128-6)
{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTT_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTT_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTT (CTESTT-128-7)
{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTT_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTT_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTT (CTESTT-128-8)
{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTT_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTT_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTT (CTESTT-128-9)
{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTT_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTT_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTZ (CTESTZ-128-1)
{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r
IFORM:       CTESTZ_GPR8i8_GPR8i8_DFV_APX
}

{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r
IFORM:       CTESTZ_MEMi8_GPR8i8_DFV_APX
}


# EMITTING CTESTZ (CTESTZ-128-2)
{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTZ_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTZ (CTESTZ-128-3)
{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r
IFORM:       CTESTZ_GPRv_GPRv_DFV_APX
}

{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC()
OPERANDS:    MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r
IFORM:       CTESTZ_MEMv_GPRv_DFV_APX
}


# EMITTING CTESTZ (CTESTZ-128-4)
{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTZ_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTZ_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTZ (CTESTZ-128-5)
{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r
IFORM:       CTESTZ_GPR8i8_IMM8_DFV_APX
}

{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8()
OPERANDS:    MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r
IFORM:       CTESTZ_MEMi8_IMM8_DFV_APX
}


# EMITTING CTESTZ (CTESTZ-128-6)
{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTZ_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTZ (CTESTZ-128-7)
{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTZ_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTZ (CTESTZ-128-8)
{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTZ_MEMv_IMMz_DFV_APX
}


# EMITTING CTESTZ (CTESTZ-128-9)
{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r
IFORM:       CTESTZ_GPRv_IMMz_DFV_APX
}

{
ICLASS:      CTESTZ
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CCMP
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz()
OPERANDS:    MEM0:r:v IMM0:r:z REG0=DFV():r
IFORM:       CTESTZ_MEMv_IMMz_DFV_APX
}


# EMITTING DEC (DEC-128-1-nf0)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8
IFORM:       DEC_GPR8i8_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8
IFORM:       DEC_MEMi8_APX
}


# EMITTING DEC (DEC-128-1-nf1)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8
IFORM:       DEC_GPR8i8_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8
IFORM:       DEC_MEMi8_APX
}


# EMITTING DEC (DEC-128-2-nf0)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       DEC_GPR8i8_GPR8i8_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8
IFORM:       DEC_GPR8i8_MEMi8_APX
}


# EMITTING DEC (DEC-128-2-nf1)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       DEC_GPR8i8_GPR8i8_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8
IFORM:       DEC_GPR8i8_MEMi8_APX
}


# EMITTING DEC (DEC-128-3-nf0)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
PATTERN:     EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       DEC_GPRv_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       DEC_MEMv_APX
}


# EMITTING DEC (DEC-128-3-nf1)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       DEC_GPRv_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       DEC_MEMv_APX
}


# EMITTING DEC (DEC-128-4-nf0)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
PATTERN:     EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       DEC_GPRv_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       DEC_MEMv_APX
}


# EMITTING DEC (DEC-128-4-nf1)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       DEC_GPRv_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       DEC_MEMv_APX
}


# EMITTING DEC (DEC-128-5-nf0)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       DEC_GPRv_GPRv_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       DEC_GPRv_MEMv_APX
}


# EMITTING DEC (DEC-128-5-nf1)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       DEC_GPRv_GPRv_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       DEC_GPRv_MEMv_APX
}


# EMITTING DEC (DEC-128-6-nf0)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       DEC_GPRv_GPRv_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       DEC_GPRv_MEMv_APX
}


# EMITTING DEC (DEC-128-6-nf1)
{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       DEC_GPRv_GPRv_APX
}

{
ICLASS:      DEC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       DEC_GPRv_MEMv_APX
}


# EMITTING DIV (DIV-128-1-nf0)
{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=XED_REG_AX:rw:SUPP
IFORM:       DIV_GPR8i8_APX
}

{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:b:i8 REG0=XED_REG_AX:rw:SUPP
IFORM:       DIV_MEMi8_APX
}


# EMITTING DIV (DIV-128-1-nf1)
{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=XED_REG_AX:rw:SUPP
IFORM:       DIV_GPR8i8_APX
}

{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:b:i8 REG0=XED_REG_AX:rw:SUPP
IFORM:       DIV_MEMi8_APX
}


# EMITTING DIV (DIV-128-2-nf0)
{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP
IFORM:       DIV_GPRv_APX
}

{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP
IFORM:       DIV_MEMv_APX
}


# EMITTING DIV (DIV-128-2-nf1)
{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP
IFORM:       DIV_GPRv_APX
}

{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP
IFORM:       DIV_MEMv_APX
}


# EMITTING DIV (DIV-128-3-nf0)
{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP
IFORM:       DIV_GPRv_APX
}

{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP
IFORM:       DIV_MEMv_APX
}


# EMITTING DIV (DIV-128-3-nf1)
{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP
IFORM:       DIV_GPRv_APX
}

{
ICLASS:      DIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP
IFORM:       DIV_MEMv_APX
}


# EMITTING ENCODEKEY128 (ENCODEKEY128-128-1)
{
ICLASS:      ENCODEKEY128
CPL:         3
CATEGORY:    KEYLOCKER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-KEYLOCKER
REAL_OPCODE: Y
FLAGS:       MUST [  zf-0 of-0 sf-0 af-0 pf-0 cf-0  ]
PATTERN:     EVV 0xDA VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:u8 REG1=GPR32_B():r:d:u8 REG2=XED_REG_XMM0:rw:SUPP:dq:u8 REG3=XED_REG_XMM1:w:SUPP:dq:u8 REG4=XED_REG_XMM2:w:SUPP:dq:u8 REG5=XED_REG_XMM4:w:SUPP:dq:u8 REG6=XED_REG_XMM5:w:SUPP:dq:u8 REG7=XED_REG_XMM6:w:SUPP:dq:u8
IFORM:       ENCODEKEY128_GPR32u8_GPR32u8_APX
}


# EMITTING ENCODEKEY256 (ENCODEKEY256-128-1)
{
ICLASS:      ENCODEKEY256
CPL:         3
CATEGORY:    KEYLOCKER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-KEYLOCKER
REAL_OPCODE: Y
FLAGS:       MUST [  zf-0 of-0 sf-0 af-0 pf-0 cf-0  ]
PATTERN:     EVV 0xDB VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:u8 REG1=GPR32_B():r:d:u8 REG2=XED_REG_XMM0:rw:SUPP:dq:u8 REG3=XED_REG_XMM1:rw:SUPP:dq:u8 REG4=XED_REG_XMM2:w:SUPP:dq:u8 REG5=XED_REG_XMM3:w:SUPP:dq:u8 REG6=XED_REG_XMM4:w:SUPP:dq:u8 REG7=XED_REG_XMM5:w:SUPP:dq:u8 REG8=XED_REG_XMM6:w:SUPP:dq:u8
IFORM:       ENCODEKEY256_GPR32u8_GPR32u8_APX
}


# EMITTING ENQCMD (ENQCMD-128-1)
{
ICLASS:      ENQCMD
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-ENQCMD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-0 pf-0 of-0 sf-0 af-0  ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF8 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=A_GPR_R():r MEM0:r:zd:u32
IFORM:       ENQCMD_GPRav_MEMu32_APX
}


# EMITTING ENQCMDS (ENQCMDS-128-1)
{
ICLASS:      ENQCMDS
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-ENQCMD
REAL_OPCODE: Y
FLAGS:       MUST [  zf-mod  cf-0 pf-0 of-0 sf-0 af-0  ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF8 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=A_GPR_R():r MEM0:r:zd:u32
IFORM:       ENQCMDS_GPRav_MEMu32_APX
}


# EMITTING IDIV (IDIV-128-1-nf0)
{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=XED_REG_AX:rw:SUPP
IFORM:       IDIV_GPR8i8_APX
}

{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:b:i8 REG0=XED_REG_AX:rw:SUPP
IFORM:       IDIV_MEMi8_APX
}


# EMITTING IDIV (IDIV-128-1-nf1)
{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=XED_REG_AX:rw:SUPP
IFORM:       IDIV_GPR8i8_APX
}

{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:b:i8 REG0=XED_REG_AX:rw:SUPP
IFORM:       IDIV_MEMi8_APX
}


# EMITTING IDIV (IDIV-128-2-nf0)
{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP
IFORM:       IDIV_GPRv_APX
}

{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP
IFORM:       IDIV_MEMv_APX
}


# EMITTING IDIV (IDIV-128-2-nf1)
{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP
IFORM:       IDIV_GPRv_APX
}

{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP
IFORM:       IDIV_MEMv_APX
}


# EMITTING IDIV (IDIV-128-3-nf0)
{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP
IFORM:       IDIV_GPRv_APX
}

{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP
IFORM:       IDIV_MEMv_APX
}


# EMITTING IDIV (IDIV-128-3-nf1)
{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP
IFORM:       IDIV_GPRv_APX
}

{
ICLASS:      IDIV
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP
IFORM:       IDIV_MEMv_APX
}


# EMITTING IMUL (IMUL-128-1-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
PATTERN:     EVV 0x69 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       IMUL_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x69 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v IMM0:r:z
IFORM:       IMUL_GPRv_MEMv_IMMz_APX
}


# EMITTING IMUL (IMUL-128-1-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x69 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       IMUL_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x69 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v IMM0:r:z
IFORM:       IMUL_GPRv_MEMv_IMMz_APX
}


# EMITTING IMUL (IMUL-128-10-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
IFORM:       IMUL_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP
IFORM:       IMUL_MEMv_APX
}


# EMITTING IMUL (IMUL-128-10-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
IFORM:       IMUL_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP
IFORM:       IMUL_MEMv_APX
}


# EMITTING IMUL (IMUL-128-11-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
IFORM:       IMUL_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP
IFORM:       IMUL_MEMv_APX
}


# EMITTING IMUL (IMUL-128-11-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
IFORM:       IMUL_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP
IFORM:       IMUL_MEMv_APX
}


# EMITTING IMUL (IMUL-128-2-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
PATTERN:     EVV 0x69 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       IMUL_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x69 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v IMM0:r:z
IFORM:       IMUL_GPRv_MEMv_IMMz_APX
}


# EMITTING IMUL (IMUL-128-2-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x69 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       IMUL_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x69 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v IMM0:r:z
IFORM:       IMUL_GPRv_MEMv_IMMz_APX
}


# EMITTING IMUL (IMUL-128-3-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
PATTERN:     EVV 0x6B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       IMUL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x6B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       IMUL_GPRv_MEMv_IMM8_APX
}


# EMITTING IMUL (IMUL-128-3-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x6B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       IMUL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x6B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       IMUL_GPRv_MEMv_IMM8_APX
}


# EMITTING IMUL (IMUL-128-4-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
PATTERN:     EVV 0x6B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       IMUL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x6B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       IMUL_GPRv_MEMv_IMM8_APX
}


# EMITTING IMUL (IMUL-128-4-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x6B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       IMUL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x6B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       IMUL_GPRv_MEMv_IMM8_APX
}


# EMITTING IMUL (IMUL-128-5-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xAF VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       IMUL_GPRv_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xAF VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       IMUL_GPRv_MEMv_APX
}


# EMITTING IMUL (IMUL-128-5-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xAF VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       IMUL_GPRv_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xAF VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       IMUL_GPRv_MEMv_APX
}


# EMITTING IMUL (IMUL-128-6-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xAF V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       IMUL_GPRv_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xAF V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       IMUL_GPRv_MEMv_APX
}


# EMITTING IMUL (IMUL-128-6-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xAF V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       IMUL_GPRv_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xAF V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       IMUL_GPRv_MEMv_APX
}


# EMITTING IMUL (IMUL-128-7-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xAF VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       IMUL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xAF VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       IMUL_GPRv_GPRv_MEMv_APX
}


# EMITTING IMUL (IMUL-128-7-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xAF VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       IMUL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xAF VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       IMUL_GPRv_GPRv_MEMv_APX
}


# EMITTING IMUL (IMUL-128-8-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xAF V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       IMUL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xAF V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       IMUL_GPRv_GPRv_MEMv_APX
}


# EMITTING IMUL (IMUL-128-8-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xAF V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       IMUL_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xAF V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       IMUL_GPRv_GPRv_MEMv_APX
}


# EMITTING IMUL (IMUL-128-9-nf0)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=XED_REG_AL:r:SUPP REG2=XED_REG_AX:w:SUPP
IFORM:       IMUL_GPR8i8_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:b:i8 REG0=XED_REG_AL:r:SUPP REG1=XED_REG_AX:w:SUPP
IFORM:       IMUL_MEMi8_APX
}


# EMITTING IMUL (IMUL-128-9-nf1)
{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=XED_REG_AL:r:SUPP REG2=XED_REG_AX:w:SUPP
IFORM:       IMUL_GPR8i8_APX
}

{
ICLASS:      IMUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:b:i8 REG0=XED_REG_AL:r:SUPP REG1=XED_REG_AX:w:SUPP
IFORM:       IMUL_MEMi8_APX
}


# EMITTING INC (INC-128-1-nf0)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8
IFORM:       INC_GPR8i8_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8
IFORM:       INC_MEMi8_APX
}


# EMITTING INC (INC-128-1-nf1)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8
IFORM:       INC_GPR8i8_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8
IFORM:       INC_MEMi8_APX
}


# EMITTING INC (INC-128-2-nf0)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       INC_GPR8i8_GPR8i8_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8
IFORM:       INC_GPR8i8_MEMi8_APX
}


# EMITTING INC (INC-128-2-nf1)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       INC_GPR8i8_GPR8i8_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8
IFORM:       INC_GPR8i8_MEMi8_APX
}


# EMITTING INC (INC-128-3-nf0)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
PATTERN:     EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       INC_GPRv_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       INC_MEMv_APX
}


# EMITTING INC (INC-128-3-nf1)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       INC_GPRv_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       INC_MEMv_APX
}


# EMITTING INC (INC-128-4-nf0)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
PATTERN:     EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       INC_GPRv_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       INC_MEMv_APX
}


# EMITTING INC (INC-128-4-nf1)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       INC_GPRv_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       INC_MEMv_APX
}


# EMITTING INC (INC-128-5-nf0)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       INC_GPRv_GPRv_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       INC_GPRv_MEMv_APX
}


# EMITTING INC (INC-128-5-nf1)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       INC_GPRv_GPRv_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       INC_GPRv_MEMv_APX
}


# EMITTING INC (INC-128-6-nf0)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       INC_GPRv_GPRv_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       INC_GPRv_MEMv_APX
}


# EMITTING INC (INC-128-6-nf1)
{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       INC_GPRv_GPRv_APX
}

{
ICLASS:      INC
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       INC_GPRv_MEMv_APX
}


# EMITTING INVEPT (INVEPT-128-1)
{
ICLASS:      INVEPT
CPL:         0
CATEGORY:    VTX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INVEPT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-MOD ZF-MOD SF-0 OF-0 AF-0 PF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE NOTSX 
PATTERN:     EVV 0xF0 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():r:q:i64 MEM0:r:dq:i128
IFORM:       INVEPT_GPR64i64_MEMi128_APX
}


# EMITTING INVPCID (INVPCID-128-1)
{
ICLASS:      INVPCID
CPL:         0
CATEGORY:    MISC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INVPCID
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE NOTSX 
PATTERN:     EVV 0xF2 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():r:q:i64 MEM0:r:dq:i128
IFORM:       INVPCID_GPR64i64_MEMi128_APX
}


# EMITTING INVVPID (INVVPID-128-1)
{
ICLASS:      INVVPID
CPL:         0
CATEGORY:    VTX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INVVPID
REAL_OPCODE: Y
FLAGS:       MUST [ CF-MOD ZF-MOD SF-0 OF-0 AF-0 PF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE NOTSX 
PATTERN:     EVV 0xF1 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():r:q:i64 MEM0:r:dq:i128
IFORM:       INVVPID_GPR64i64_MEMi128_APX
}


# EMITTING KMOVB (KMOVB-128-5)
{
ICLASS:      KMOVB
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPB
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x90 V66 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw REG1=MASK_B():r:mskw:u8
IFORM:       KMOVB_MASKmskw_MASKu8_APX
}

{
ICLASS:      KMOVB
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPB
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE KMASK 
PATTERN:     EVV 0x90 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw MEM0:r:b:u8
IFORM:       KMOVB_MASKmskw_MEMu8_APX
}


# EMITTING KMOVB (KMOVB-128-6)
{
ICLASS:      KMOVB
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPB
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x92 V66 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw REG1=GPR32_B():r:d:u32
IFORM:       KMOVB_MASKmskw_GPR32u32_APX
}


# EMITTING KMOVB (KMOVB-128-7)
{
ICLASS:      KMOVB
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPB
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x93 V66 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:u32 REG1=MASK_B():r:mskw
IFORM:       KMOVB_GPR32u32_MASKmskw_APX
}


# EMITTING KMOVB (KMOVB-128-8)
{
ICLASS:      KMOVB
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPB
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE KMASK 
PATTERN:     EVV 0x91 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:u8 REG0=MASK_R():r:mskw
IFORM:       KMOVB_MEMu8_MASKmskw_APX
}


# EMITTING KMOVD (KMOVD-128-2)
{
ICLASS:      KMOVD
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPD
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x93 VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:u32 REG1=MASK_B():r:mskw
IFORM:       KMOVD_GPR32u32_MASKmskw_APX
}


# EMITTING KMOVD (KMOVD-128-3)
{
ICLASS:      KMOVD
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPD
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE KMASK 
PATTERN:     EVV 0x91 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:d:u32 REG0=MASK_R():r:mskw
IFORM:       KMOVD_MEMu32_MASKmskw_APX
}


# EMITTING KMOVD (KMOVD-128-7)
{
ICLASS:      KMOVD
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPD
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x90 V66 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw REG1=MASK_B():r:mskw:u32
IFORM:       KMOVD_MASKmskw_MASKu32_APX
}

{
ICLASS:      KMOVD
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPD
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE KMASK 
PATTERN:     EVV 0x90 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw MEM0:r:d:u32
IFORM:       KMOVD_MASKmskw_MEMu32_APX
}


# EMITTING KMOVD (KMOVD-128-8)
{
ICLASS:      KMOVD
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPD
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x92 VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw REG1=GPR32_B():r:d:u32
IFORM:       KMOVD_MASKmskw_GPR32u32_APX
}


# EMITTING KMOVQ (KMOVQ-128-2)
{
ICLASS:      KMOVQ
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPQ
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x90 VNP V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw REG1=MASK_B():r:mskw:u64
IFORM:       KMOVQ_MASKmskw_MASKu64_APX
}

{
ICLASS:      KMOVQ
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPQ
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE KMASK 
PATTERN:     EVV 0x90 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw MEM0:r:q:u64
IFORM:       KMOVQ_MASKmskw_MEMu64_APX
}


# EMITTING KMOVQ (KMOVQ-128-3)
{
ICLASS:      KMOVQ
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPQ
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x92 VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw REG1=GPR64_B():r:q:u64
IFORM:       KMOVQ_MASKmskw_GPR64u64_APX
}


# EMITTING KMOVQ (KMOVQ-128-4)
{
ICLASS:      KMOVQ
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPQ
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x93 VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:u64 REG1=MASK_B():r:mskw
IFORM:       KMOVQ_GPR64u64_MASKmskw_APX
}


# EMITTING KMOVQ (KMOVQ-128-5)
{
ICLASS:      KMOVQ
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPQ
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE KMASK 
PATTERN:     EVV 0x91 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:q:u64 REG0=MASK_R():r:mskw
IFORM:       KMOVQ_MEMu64_MASKmskw_APX
}


# EMITTING KMOVW (KMOVW-128-5)
{
ICLASS:      KMOVW
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPW
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x90 VNP V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw REG1=MASK_B():r:mskw:u16
IFORM:       KMOVW_MASKmskw_MASKu16_APX
}

{
ICLASS:      KMOVW
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPW
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE KMASK 
PATTERN:     EVV 0x90 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw MEM0:r:wrd:u16
IFORM:       KMOVW_MASKmskw_MEMu16_APX
}


# EMITTING KMOVW (KMOVW-128-6)
{
ICLASS:      KMOVW
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPW
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x92 VNP V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=MASK_R():w:mskw REG1=GPR32_B():r:d:u32
IFORM:       KMOVW_MASKmskw_GPR32u32_APX
}


# EMITTING KMOVW (KMOVW-128-7)
{
ICLASS:      KMOVW
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPW
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  KMASK 
PATTERN:     EVV 0x93 VNP V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:u32 REG1=MASK_B():r:mskw
IFORM:       KMOVW_GPR32u32_MASKmskw_APX
}


# EMITTING KMOVW (KMOVW-128-8)
{
ICLASS:      KMOVW
CPL:         3
CATEGORY:    KMASK
EXTENSION:   APXEVEX
ISA_SET:     APX_F_KOPW
EXCEPTIONS:  APX-EVEX-KMOV
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE KMASK 
PATTERN:     EVV 0x91 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:wrd:u16 REG0=MASK_R():r:mskw
IFORM:       KMOVW_MEMu16_MASKmskw_APX
}


# EMITTING LZCNT (LZCNT-128-1-nf0)
{
ICLASS:      LZCNT
CPL:         3
CATEGORY:    LZCNT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-MOD ZF-MOD OF-U AF-U PF-U SF-U ]
PATTERN:     EVV 0xF5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       LZCNT_GPRv_GPRv_APX
}

{
ICLASS:      LZCNT
CPL:         3
CATEGORY:    LZCNT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-MOD ZF-MOD OF-U AF-U PF-U SF-U ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       LZCNT_GPRv_MEMv_APX
}


# EMITTING LZCNT (LZCNT-128-1-nf1)
{
ICLASS:      LZCNT
CPL:         3
CATEGORY:    LZCNT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       LZCNT_GPRv_GPRv_APX
}

{
ICLASS:      LZCNT
CPL:         3
CATEGORY:    LZCNT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       LZCNT_GPRv_MEMv_APX
}


# EMITTING LZCNT (LZCNT-128-2-nf0)
{
ICLASS:      LZCNT
CPL:         3
CATEGORY:    LZCNT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-MOD ZF-MOD OF-U AF-U PF-U SF-U ]
PATTERN:     EVV 0xF5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       LZCNT_GPRv_GPRv_APX
}

{
ICLASS:      LZCNT
CPL:         3
CATEGORY:    LZCNT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-MOD ZF-MOD OF-U AF-U PF-U SF-U ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       LZCNT_GPRv_MEMv_APX
}


# EMITTING LZCNT (LZCNT-128-2-nf1)
{
ICLASS:      LZCNT
CPL:         3
CATEGORY:    LZCNT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       LZCNT_GPRv_GPRv_APX
}

{
ICLASS:      LZCNT
CPL:         3
CATEGORY:    LZCNT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       LZCNT_GPRv_MEMv_APX
}


# EMITTING MOVBE (MOVBE-128-1)
{
ICLASS:      MOVBE
CPL:         3
CATEGORY:    DATAXFER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
PATTERN:     EVV 0x60 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       MOVBE_GPRv_GPRv_APX
}

{
ICLASS:      MOVBE
CPL:         3
CATEGORY:    DATAXFER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x60 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       MOVBE_GPRv_MEMv_APX
}


# EMITTING MOVBE (MOVBE-128-2)
{
ICLASS:      MOVBE
CPL:         3
CATEGORY:    DATAXFER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
PATTERN:     EVV 0x60 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       MOVBE_GPRv_GPRv_APX
}

{
ICLASS:      MOVBE
CPL:         3
CATEGORY:    DATAXFER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x60 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       MOVBE_GPRv_MEMv_APX
}


# EMITTING MOVBE (MOVBE-128-3)
{
ICLASS:      MOVBE
CPL:         3
CATEGORY:    DATAXFER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
PATTERN:     EVV 0x61 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       MOVBE_GPRv_GPRv_APX
}

{
ICLASS:      MOVBE
CPL:         3
CATEGORY:    DATAXFER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x61 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:v REG0=GPRv_R():r:v
IFORM:       MOVBE_MEMv_GPRv_APX
}


# EMITTING MOVBE (MOVBE-128-4)
{
ICLASS:      MOVBE
CPL:         3
CATEGORY:    DATAXFER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
PATTERN:     EVV 0x61 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():w:v REG1=GPRv_R():r:v
IFORM:       MOVBE_GPRv_GPRv_APX
}

{
ICLASS:      MOVBE
CPL:         3
CATEGORY:    DATAXFER
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x61 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:v REG0=GPRv_R():r:v
IFORM:       MOVBE_MEMv_GPRv_APX
}


# EMITTING MOVDIR64B (MOVDIR64B-128-1)
{
ICLASS:      MOVDIR64B
CPL:         3
CATEGORY:    MOVDIR
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE REQUIRES_ALIGNMENT 
PATTERN:     EVV 0xF8 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=A_GPR_R():r MEM0:r:zd:u32
IFORM:       MOVDIR64B_GPRav_MEMu32_APX
}


# EMITTING MOVDIRI (MOVDIRI-128-1)
{
ICLASS:      MOVDIRI
CPL:         3
CATEGORY:    MOVDIR
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF9 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:yu REG0=GPRy_R():r:yu
IFORM:       MOVDIRI_MEMyu_GPRyu_APX
}


# EMITTING MUL (MUL-128-1-nf0)
{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=XED_REG_AL:r:SUPP REG2=XED_REG_AX:w:SUPP
IFORM:       MUL_GPR8i8_APX
}

{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:b:i8 REG0=XED_REG_AL:r:SUPP REG1=XED_REG_AX:w:SUPP
IFORM:       MUL_MEMi8_APX
}


# EMITTING MUL (MUL-128-1-nf1)
{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():r:b:i8 REG1=XED_REG_AL:r:SUPP REG2=XED_REG_AX:w:SUPP
IFORM:       MUL_GPR8i8_APX
}

{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:b:i8 REG0=XED_REG_AL:r:SUPP REG1=XED_REG_AX:w:SUPP
IFORM:       MUL_MEMi8_APX
}


# EMITTING MUL (MUL-128-2-nf0)
{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
IFORM:       MUL_GPRv_APX
}

{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP
IFORM:       MUL_MEMv_APX
}


# EMITTING MUL (MUL-128-2-nf1)
{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
IFORM:       MUL_GPRv_APX
}

{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP
IFORM:       MUL_MEMv_APX
}


# EMITTING MUL (MUL-128-3-nf0)
{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
IFORM:       MUL_GPRv_APX
}

{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP
IFORM:       MUL_MEMv_APX
}


# EMITTING MUL (MUL-128-3-nf1)
{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP
IFORM:       MUL_GPRv_APX
}

{
ICLASS:      MUL
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP
IFORM:       MUL_MEMv_APX
}


# EMITTING MULX (MULX-128-1)
{
ICLASS:      MULX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF6 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():w:d:i32 REG2=GPR32_B():r:d:i32 REG3=XED_REG_EDX:r:SUPP:d:u32
IFORM:       MULX_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      MULX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():w:d:i32 MEM0:r:d:i32 REG2=XED_REG_EDX:r:SUPP:d:u32
IFORM:       MULX_GPR32i32_GPR32i32_MEMi32_APX
}


# EMITTING MULX (MULX-128-2)
{
ICLASS:      MULX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF6 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():w:q:i64 REG2=GPR64_B():r:q:i64 REG3=XED_REG_RDX:r:SUPP:q:i64
IFORM:       MULX_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      MULX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():w:q:i64 MEM0:r:q:i64 REG2=XED_REG_RDX:r:SUPP:q:i64
IFORM:       MULX_GPR64i64_GPR64i64_MEMi64_APX
}


# EMITTING NEG (NEG-128-1-nf0)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8
IFORM:       NEG_GPR8i8_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8
IFORM:       NEG_MEMi8_APX
}


# EMITTING NEG (NEG-128-1-nf1)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8
IFORM:       NEG_GPR8i8_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8
IFORM:       NEG_MEMi8_APX
}


# EMITTING NEG (NEG-128-2-nf0)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       NEG_GPR8i8_GPR8i8_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8
IFORM:       NEG_GPR8i8_MEMi8_APX
}


# EMITTING NEG (NEG-128-2-nf1)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       NEG_GPR8i8_GPR8i8_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8
IFORM:       NEG_GPR8i8_MEMi8_APX
}


# EMITTING NEG (NEG-128-3-nf0)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       NEG_GPRv_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       NEG_MEMv_APX
}


# EMITTING NEG (NEG-128-3-nf1)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       NEG_GPRv_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       NEG_MEMv_APX
}


# EMITTING NEG (NEG-128-4-nf0)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       NEG_GPRv_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       NEG_MEMv_APX
}


# EMITTING NEG (NEG-128-4-nf1)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       NEG_GPRv_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       NEG_MEMv_APX
}


# EMITTING NEG (NEG-128-5-nf0)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       NEG_GPRv_GPRv_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       NEG_GPRv_MEMv_APX
}


# EMITTING NEG (NEG-128-5-nf1)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       NEG_GPRv_GPRv_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       NEG_GPRv_MEMv_APX
}


# EMITTING NEG (NEG-128-6-nf0)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       NEG_GPRv_GPRv_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       NEG_GPRv_MEMv_APX
}


# EMITTING NEG (NEG-128-6-nf1)
{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       NEG_GPRv_GPRv_APX
}

{
ICLASS:      NEG
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       NEG_GPRv_MEMv_APX
}


# EMITTING NOT (NOT-128-1)
{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8
IFORM:       NOT_GPR8i8_APX
}

{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8
IFORM:       NOT_MEMi8_APX
}


# EMITTING NOT (NOT-128-2)
{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       NOT_GPR8i8_GPR8i8_APX
}

{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8
IFORM:       NOT_GPR8i8_MEMi8_APX
}


# EMITTING NOT (NOT-128-3)
{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       NOT_GPRv_APX
}

{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       NOT_MEMv_APX
}


# EMITTING NOT (NOT-128-4)
{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v
IFORM:       NOT_GPRv_APX
}

{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v
IFORM:       NOT_MEMv_APX
}


# EMITTING NOT (NOT-128-5)
{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       NOT_GPRv_GPRv_APX
}

{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       NOT_GPRv_MEMv_APX
}


# EMITTING NOT (NOT-128-6)
{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v
IFORM:       NOT_GPRv_GPRv_APX
}

{
ICLASS:      NOT
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v
IFORM:       NOT_GPRv_MEMv_APX
}


# EMITTING OR (OR-128-1-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x08 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x08 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       OR_MEMi8_GPR8i8_APX
}


# EMITTING OR (OR-128-1-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x08 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x08 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       OR_MEMi8_GPR8i8_APX
}


# EMITTING OR (OR-128-10-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       OR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       OR_GPRv_MEMv_IMM8_APX
}


# EMITTING OR (OR-128-10-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       OR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       OR_GPRv_MEMv_IMM8_APX
}


# EMITTING OR (OR-128-11-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x08 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x08 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       OR_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING OR (OR-128-11-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x08 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x08 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       OR_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING OR (OR-128-12-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x09 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       OR_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x09 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       OR_MEMv_GPRv_APX
}


# EMITTING OR (OR-128-12-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x09 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       OR_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x09 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       OR_MEMv_GPRv_APX
}


# EMITTING OR (OR-128-13-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x09 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       OR_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x09 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       OR_MEMv_GPRv_APX
}


# EMITTING OR (OR-128-13-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x09 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       OR_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x09 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       OR_MEMv_GPRv_APX
}


# EMITTING OR (OR-128-14-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x09 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       OR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x09 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       OR_GPRv_MEMv_GPRv_APX
}


# EMITTING OR (OR-128-14-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x09 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       OR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x09 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       OR_GPRv_MEMv_GPRv_APX
}


# EMITTING OR (OR-128-15-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x09 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       OR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x09 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       OR_GPRv_MEMv_GPRv_APX
}


# EMITTING OR (OR-128-15-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x09 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       OR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x09 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       OR_GPRv_MEMv_GPRv_APX
}


# EMITTING OR (OR-128-16-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x0A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x0A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       OR_GPR8i8_MEMi8_APX
}


# EMITTING OR (OR-128-16-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x0A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x0A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       OR_GPR8i8_MEMi8_APX
}


# EMITTING OR (OR-128-17-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x0A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x0A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING OR (OR-128-17-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x0A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x0A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING OR (OR-128-18-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x0B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       OR_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x0B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       OR_GPRv_MEMv_APX
}


# EMITTING OR (OR-128-18-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x0B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       OR_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x0B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       OR_GPRv_MEMv_APX
}


# EMITTING OR (OR-128-19-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x0B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       OR_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x0B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       OR_GPRv_MEMv_APX
}


# EMITTING OR (OR-128-19-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x0B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       OR_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x0B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       OR_GPRv_MEMv_APX
}


# EMITTING OR (OR-128-2-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       OR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING OR (OR-128-2-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       OR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       OR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING OR (OR-128-20-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x0B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       OR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x0B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       OR_GPRv_GPRv_MEMv_APX
}


# EMITTING OR (OR-128-20-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x0B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       OR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x0B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       OR_GPRv_GPRv_MEMv_APX
}


# EMITTING OR (OR-128-21-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x0B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       OR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x0B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       OR_GPRv_GPRv_MEMv_APX
}


# EMITTING OR (OR-128-21-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x0B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       OR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x0B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       OR_GPRv_GPRv_MEMv_APX
}


# EMITTING OR (OR-128-22-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       OR_GPR8i8_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       OR_MEMi8_IMM8_APX
}


# EMITTING OR (OR-128-22-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       OR_GPR8i8_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       OR_MEMi8_IMM8_APX
}


# EMITTING OR (OR-128-3-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       OR_GPRv_IMMz_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       OR_MEMv_IMMz_APX
}


# EMITTING OR (OR-128-3-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       OR_GPRv_IMMz_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       OR_MEMv_IMMz_APX
}


# EMITTING OR (OR-128-4-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       OR_GPRv_IMMz_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       OR_MEMv_IMMz_APX
}


# EMITTING OR (OR-128-4-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       OR_GPRv_IMMz_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       OR_MEMv_IMMz_APX
}


# EMITTING OR (OR-128-5-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       OR_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       OR_GPRv_MEMv_IMMz_APX
}


# EMITTING OR (OR-128-5-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       OR_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       OR_GPRv_MEMv_IMMz_APX
}


# EMITTING OR (OR-128-6-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       OR_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       OR_GPRv_MEMv_IMMz_APX
}


# EMITTING OR (OR-128-6-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       OR_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       OR_GPRv_MEMv_IMMz_APX
}


# EMITTING OR (OR-128-7-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       OR_GPRv_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       OR_MEMv_IMM8_APX
}


# EMITTING OR (OR-128-7-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       OR_GPRv_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       OR_MEMv_IMM8_APX
}


# EMITTING OR (OR-128-8-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       OR_GPRv_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       OR_MEMv_IMM8_APX
}


# EMITTING OR (OR-128-8-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       OR_GPRv_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       OR_MEMv_IMM8_APX
}


# EMITTING OR (OR-128-9-nf0)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       OR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       OR_GPRv_MEMv_IMM8_APX
}


# EMITTING OR (OR-128-9-nf1)
{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       OR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      OR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       OR_GPRv_MEMv_IMM8_APX
}


# EMITTING PDEP (PDEP-128-1)
{
ICLASS:      PDEP
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF5 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 REG2=GPR32_B():r:d:i32
IFORM:       PDEP_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      PDEP
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 MEM0:r:d:i32
IFORM:       PDEP_GPR32i32_GPR32i32_MEMi32_APX
}


# EMITTING PDEP (PDEP-128-2)
{
ICLASS:      PDEP
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF5 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 REG2=GPR64_B():r:q:i64
IFORM:       PDEP_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      PDEP
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 MEM0:r:q:i64
IFORM:       PDEP_GPR64i64_GPR64i64_MEMi64_APX
}


# EMITTING PEXT (PEXT-128-1)
{
ICLASS:      PEXT
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF5 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 REG2=GPR32_B():r:d:i32
IFORM:       PEXT_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      PEXT
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 MEM0:r:d:i32
IFORM:       PEXT_GPR32i32_GPR32i32_MEMi32_APX
}


# EMITTING PEXT (PEXT-128-2)
{
ICLASS:      PEXT
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF5 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 REG2=GPR64_B():r:q:i64
IFORM:       PEXT_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      PEXT
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF5 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 MEM0:r:q:i64
IFORM:       PEXT_GPR64i64_GPR64i64_MEMi64_APX
}


# EMITTING POP2 (POP2-128-1)
{
ICLASS:      POP2
CPL:         3
CATEGORY:    POP
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-PP2
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x8F VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3_NORSP():w:q:u64 REG1=GPR64_B_NORSP():w:q:u64 REG2=XED_REG_STACKPOP:rw:SUPP:spw2
IFORM:       POP2_GPR64u64_GPR64u64_APX
}


# EMITTING POP2P (POP2P-128-1)
{
ICLASS:      POP2P
CPL:         3
CATEGORY:    POP
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-PP2
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x8F VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3_NORSP():w:q:u64 REG1=GPR64_B_NORSP():w:q:u64 REG2=XED_REG_STACKPOP:rw:SUPP:spw2
IFORM:       POP2P_GPR64u64_GPR64u64_APX
}


# EMITTING POPCNT (POPCNT-128-1-nf0)
{
ICLASS:      POPCNT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-0 ZF-MOD OF-0 AF-0 PF-0 SF-0 ]
PATTERN:     EVV 0x88 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       POPCNT_GPRv_GPRv_APX
}

{
ICLASS:      POPCNT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-0 ZF-MOD OF-0 AF-0 PF-0 SF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x88 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       POPCNT_GPRv_MEMv_APX
}


# EMITTING POPCNT (POPCNT-128-1-nf1)
{
ICLASS:      POPCNT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x88 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       POPCNT_GPRv_GPRv_APX
}

{
ICLASS:      POPCNT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x88 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       POPCNT_GPRv_MEMv_APX
}


# EMITTING POPCNT (POPCNT-128-2-nf0)
{
ICLASS:      POPCNT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-0 ZF-MOD OF-0 AF-0 PF-0 SF-0 ]
PATTERN:     EVV 0x88 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       POPCNT_GPRv_GPRv_APX
}

{
ICLASS:      POPCNT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ CF-0 ZF-MOD OF-0 AF-0 PF-0 SF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x88 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       POPCNT_GPRv_MEMv_APX
}


# EMITTING POPCNT (POPCNT-128-2-nf1)
{
ICLASS:      POPCNT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x88 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       POPCNT_GPRv_GPRv_APX
}

{
ICLASS:      POPCNT
CPL:         3
CATEGORY:    APX
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x88 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       POPCNT_GPRv_MEMv_APX
}


# EMITTING PUSH2 (PUSH2-128-1)
{
ICLASS:      PUSH2
CPL:         3
CATEGORY:    PUSH
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-PP2
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3_NORSP():r:q:u64 REG1=GPR64_B_NORSP():r:q:u64 REG2=XED_REG_STACKPUSH:rw:SUPP:spw2
IFORM:       PUSH2_GPR64u64_GPR64u64_APX
}


# EMITTING PUSH2P (PUSH2P-128-1)
{
ICLASS:      PUSH2P
CPL:         3
CATEGORY:    PUSH
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-PP2
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR64_N3_NORSP():r:q:u64 REG1=GPR64_B_NORSP():r:q:u64 REG2=XED_REG_STACKPUSH:rw:SUPP:spw2
IFORM:       PUSH2P_GPR64u64_GPR64u64_APX
}


# EMITTING RCL (RCL-128-1)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       RCL_GPR8i8_IMM8_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       RCL_MEMi8_IMM8_APX
}


# EMITTING RCL (RCL-128-10)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       RCL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       RCL_GPRv_MEMv_IMM8_APX
}


# EMITTING RCL (RCL-128-11)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       RCL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       RCL_GPRv_MEMv_IMM8_APX
}


# EMITTING RCL (RCL-128-12)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       RCL_GPR8i8_ONE_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       RCL_MEMi8_ONE_APX
}


# EMITTING RCL (RCL-128-13)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       RCL_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       RCL_GPR8i8_MEMi8_ONE_APX
}


# EMITTING RCL (RCL-128-14)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       RCL_GPRv_ONE_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       RCL_MEMv_ONE_APX
}


# EMITTING RCL (RCL-128-15)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       RCL_GPRv_ONE_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       RCL_MEMv_ONE_APX
}


# EMITTING RCL (RCL-128-16)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       RCL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       RCL_GPRv_MEMv_ONE_APX
}


# EMITTING RCL (RCL-128-17)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       RCL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       RCL_GPRv_MEMv_ONE_APX
}


# EMITTING RCL (RCL-128-18)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       RCL_GPR8i8_CL_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       RCL_MEMi8_CL_APX
}


# EMITTING RCL (RCL-128-2)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       RCL_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       RCL_GPR8i8_MEMi8_CL_APX
}


# EMITTING RCL (RCL-128-3)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       RCL_GPRv_CL_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       RCL_MEMv_CL_APX
}


# EMITTING RCL (RCL-128-4)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       RCL_GPRv_CL_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       RCL_MEMv_CL_APX
}


# EMITTING RCL (RCL-128-5)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       RCL_GPRv_GPRv_CL_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       RCL_GPRv_MEMv_CL_APX
}


# EMITTING RCL (RCL-128-6)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       RCL_GPRv_GPRv_CL_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       RCL_GPRv_MEMv_CL_APX
}


# EMITTING RCL (RCL-128-7)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       RCL_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       RCL_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING RCL (RCL-128-8)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       RCL_GPRv_IMM8_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       RCL_MEMv_IMM8_APX
}


# EMITTING RCL (RCL-128-9)
{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       RCL_GPRv_IMM8_APX
}

{
ICLASS:      RCL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       RCL_MEMv_IMM8_APX
}


# EMITTING RCR (RCR-128-1)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       RCR_GPR8i8_IMM8_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       RCR_MEMi8_IMM8_APX
}


# EMITTING RCR (RCR-128-10)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       RCR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       RCR_GPRv_MEMv_IMM8_APX
}


# EMITTING RCR (RCR-128-11)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       RCR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       RCR_GPRv_MEMv_IMM8_APX
}


# EMITTING RCR (RCR-128-12)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       RCR_GPR8i8_ONE_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       RCR_MEMi8_ONE_APX
}


# EMITTING RCR (RCR-128-13)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       RCR_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       RCR_GPR8i8_MEMi8_ONE_APX
}


# EMITTING RCR (RCR-128-14)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       RCR_GPRv_ONE_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       RCR_MEMv_ONE_APX
}


# EMITTING RCR (RCR-128-15)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       RCR_GPRv_ONE_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       RCR_MEMv_ONE_APX
}


# EMITTING RCR (RCR-128-16)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       RCR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       RCR_GPRv_MEMv_ONE_APX
}


# EMITTING RCR (RCR-128-17)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       RCR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       RCR_GPRv_MEMv_ONE_APX
}


# EMITTING RCR (RCR-128-18)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       RCR_GPR8i8_CL_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       RCR_MEMi8_CL_APX
}


# EMITTING RCR (RCR-128-2)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       RCR_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       RCR_GPR8i8_MEMi8_CL_APX
}


# EMITTING RCR (RCR-128-3)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       RCR_GPRv_CL_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       RCR_MEMv_CL_APX
}


# EMITTING RCR (RCR-128-4)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       RCR_GPRv_CL_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       RCR_MEMv_CL_APX
}


# EMITTING RCR (RCR-128-5)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       RCR_GPRv_GPRv_CL_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       RCR_GPRv_MEMv_CL_APX
}


# EMITTING RCR (RCR-128-6)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       RCR_GPRv_GPRv_CL_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       RCR_GPRv_MEMv_CL_APX
}


# EMITTING RCR (RCR-128-7)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       RCR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       RCR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING RCR (RCR-128-8)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       RCR_GPRv_IMM8_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       RCR_MEMv_IMM8_APX
}


# EMITTING RCR (RCR-128-9)
{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       RCR_GPRv_IMM8_APX
}

{
ICLASS:      RCR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       RCR_MEMv_IMM8_APX
}


# EMITTING ROL (ROL-128-1-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       ROL_GPR8i8_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       ROL_MEMi8_IMM8_APX
}


# EMITTING ROL (ROL-128-1-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       ROL_GPR8i8_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       ROL_MEMi8_IMM8_APX
}


# EMITTING ROL (ROL-128-10-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       ROL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       ROL_GPRv_MEMv_IMM8_APX
}


# EMITTING ROL (ROL-128-10-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       ROL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       ROL_GPRv_MEMv_IMM8_APX
}


# EMITTING ROL (ROL-128-11-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       ROL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       ROL_GPRv_MEMv_IMM8_APX
}


# EMITTING ROL (ROL-128-11-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       ROL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       ROL_GPRv_MEMv_IMM8_APX
}


# EMITTING ROL (ROL-128-12-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       ROL_GPR8i8_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       ROL_MEMi8_ONE_APX
}


# EMITTING ROL (ROL-128-12-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       ROL_GPR8i8_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       ROL_MEMi8_ONE_APX
}


# EMITTING ROL (ROL-128-13-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       ROL_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       ROL_GPR8i8_MEMi8_ONE_APX
}


# EMITTING ROL (ROL-128-13-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       ROL_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       ROL_GPR8i8_MEMi8_ONE_APX
}


# EMITTING ROL (ROL-128-14-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       ROL_MEMv_ONE_APX
}


# EMITTING ROL (ROL-128-14-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       ROL_MEMv_ONE_APX
}


# EMITTING ROL (ROL-128-15-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       ROL_MEMv_ONE_APX
}


# EMITTING ROL (ROL-128-15-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       ROL_MEMv_ONE_APX
}


# EMITTING ROL (ROL-128-16-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_MEMv_ONE_APX
}


# EMITTING ROL (ROL-128-16-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_MEMv_ONE_APX
}


# EMITTING ROL (ROL-128-17-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_MEMv_ONE_APX
}


# EMITTING ROL (ROL-128-17-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       ROL_GPRv_MEMv_ONE_APX
}


# EMITTING ROL (ROL-128-18-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPR8i8_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       ROL_MEMi8_CL_APX
}


# EMITTING ROL (ROL-128-18-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPR8i8_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       ROL_MEMi8_CL_APX
}


# EMITTING ROL (ROL-128-2-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       ROL_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPR8i8_MEMi8_CL_APX
}


# EMITTING ROL (ROL-128-2-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       ROL_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPR8i8_MEMi8_CL_APX
}


# EMITTING ROL (ROL-128-3-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       ROL_MEMv_CL_APX
}


# EMITTING ROL (ROL-128-3-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       ROL_MEMv_CL_APX
}


# EMITTING ROL (ROL-128-4-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       ROL_MEMv_CL_APX
}


# EMITTING ROL (ROL-128-4-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       ROL_MEMv_CL_APX
}


# EMITTING ROL (ROL-128-5-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_GPRv_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_MEMv_CL_APX
}


# EMITTING ROL (ROL-128-5-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_GPRv_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_MEMv_CL_APX
}


# EMITTING ROL (ROL-128-6-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_GPRv_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_MEMv_CL_APX
}


# EMITTING ROL (ROL-128-6-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_GPRv_CL_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROL_GPRv_MEMv_CL_APX
}


# EMITTING ROL (ROL-128-7-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       ROL_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       ROL_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING ROL (ROL-128-7-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       ROL_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       ROL_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING ROL (ROL-128-8-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       ROL_GPRv_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       ROL_MEMv_IMM8_APX
}


# EMITTING ROL (ROL-128-8-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       ROL_GPRv_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       ROL_MEMv_IMM8_APX
}


# EMITTING ROL (ROL-128-9-nf0)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       ROL_GPRv_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       ROL_MEMv_IMM8_APX
}


# EMITTING ROL (ROL-128-9-nf1)
{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       ROL_GPRv_IMM8_APX
}

{
ICLASS:      ROL
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       ROL_MEMv_IMM8_APX
}


# EMITTING ROR (ROR-128-1-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       ROR_GPR8i8_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       ROR_MEMi8_IMM8_APX
}


# EMITTING ROR (ROR-128-1-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       ROR_GPR8i8_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       ROR_MEMi8_IMM8_APX
}


# EMITTING ROR (ROR-128-10-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       ROR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       ROR_GPRv_MEMv_IMM8_APX
}


# EMITTING ROR (ROR-128-10-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       ROR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       ROR_GPRv_MEMv_IMM8_APX
}


# EMITTING ROR (ROR-128-11-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       ROR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       ROR_GPRv_MEMv_IMM8_APX
}


# EMITTING ROR (ROR-128-11-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       ROR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       ROR_GPRv_MEMv_IMM8_APX
}


# EMITTING ROR (ROR-128-12-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       ROR_GPR8i8_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       ROR_MEMi8_ONE_APX
}


# EMITTING ROR (ROR-128-12-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       ROR_GPR8i8_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       ROR_MEMi8_ONE_APX
}


# EMITTING ROR (ROR-128-13-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       ROR_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       ROR_GPR8i8_MEMi8_ONE_APX
}


# EMITTING ROR (ROR-128-13-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       ROR_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       ROR_GPR8i8_MEMi8_ONE_APX
}


# EMITTING ROR (ROR-128-14-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       ROR_MEMv_ONE_APX
}


# EMITTING ROR (ROR-128-14-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       ROR_MEMv_ONE_APX
}


# EMITTING ROR (ROR-128-15-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       ROR_MEMv_ONE_APX
}


# EMITTING ROR (ROR-128-15-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       ROR_MEMv_ONE_APX
}


# EMITTING ROR (ROR-128-16-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_MEMv_ONE_APX
}


# EMITTING ROR (ROR-128-16-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_MEMv_ONE_APX
}


# EMITTING ROR (ROR-128-17-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_MEMv_ONE_APX
}


# EMITTING ROR (ROR-128-17-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       ROR_GPRv_MEMv_ONE_APX
}


# EMITTING ROR (ROR-128-18-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPR8i8_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       ROR_MEMi8_CL_APX
}


# EMITTING ROR (ROR-128-18-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPR8i8_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       ROR_MEMi8_CL_APX
}


# EMITTING ROR (ROR-128-2-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       ROR_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPR8i8_MEMi8_CL_APX
}


# EMITTING ROR (ROR-128-2-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       ROR_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPR8i8_MEMi8_CL_APX
}


# EMITTING ROR (ROR-128-3-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       ROR_MEMv_CL_APX
}


# EMITTING ROR (ROR-128-3-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       ROR_MEMv_CL_APX
}


# EMITTING ROR (ROR-128-4-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       ROR_MEMv_CL_APX
}


# EMITTING ROR (ROR-128-4-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       ROR_MEMv_CL_APX
}


# EMITTING ROR (ROR-128-5-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_GPRv_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_MEMv_CL_APX
}


# EMITTING ROR (ROR-128-5-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_GPRv_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_MEMv_CL_APX
}


# EMITTING ROR (ROR-128-6-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_GPRv_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_MEMv_CL_APX
}


# EMITTING ROR (ROR-128-6-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_GPRv_CL_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       ROR_GPRv_MEMv_CL_APX
}


# EMITTING ROR (ROR-128-7-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       ROR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       ROR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING ROR (ROR-128-7-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       ROR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       ROR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING ROR (ROR-128-8-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       ROR_GPRv_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       ROR_MEMv_IMM8_APX
}


# EMITTING ROR (ROR-128-8-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       ROR_GPRv_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       ROR_MEMv_IMM8_APX
}


# EMITTING ROR (ROR-128-9-nf0)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       ROR_GPRv_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       ROR_MEMv_IMM8_APX
}


# EMITTING ROR (ROR-128-9-nf1)
{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       ROR_GPRv_IMM8_APX
}

{
ICLASS:      ROR
CPL:         3
CATEGORY:    ROTATE
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       ROR_MEMv_IMM8_APX
}


# EMITTING RORX (RORX-128-1)
{
ICLASS:      RORX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF0 VF2 V0F3A MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 IMM0:r:b:i8
IFORM:       RORX_GPR32i32_GPR32i32_IMM8_APX
}

{
ICLASS:      RORX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF0 VF2 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 IMM0:r:b:i8
IFORM:       RORX_GPR32i32_MEMi32_IMM8_APX
}


# EMITTING RORX (RORX-128-2)
{
ICLASS:      RORX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF0 VF2 V0F3A MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 IMM0:r:b:i8
IFORM:       RORX_GPR64i64_GPR64i64_IMM8_APX
}

{
ICLASS:      RORX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF0 VF2 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 IMM0:r:b:i8
IFORM:       RORX_GPR64i64_MEMi64_IMM8_APX
}


# EMITTING SAR (SAR-128-1-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       SAR_GPR8i8_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       SAR_MEMi8_IMM8_APX
}


# EMITTING SAR (SAR-128-1-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       SAR_GPR8i8_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       SAR_MEMi8_IMM8_APX
}


# EMITTING SAR (SAR-128-10-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SAR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SAR_GPRv_MEMv_IMM8_APX
}


# EMITTING SAR (SAR-128-10-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SAR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SAR_GPRv_MEMv_IMM8_APX
}


# EMITTING SAR (SAR-128-11-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SAR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SAR_GPRv_MEMv_IMM8_APX
}


# EMITTING SAR (SAR-128-11-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SAR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SAR_GPRv_MEMv_IMM8_APX
}


# EMITTING SAR (SAR-128-12-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       SAR_GPR8i8_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       SAR_MEMi8_ONE_APX
}


# EMITTING SAR (SAR-128-12-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       SAR_GPR8i8_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       SAR_MEMi8_ONE_APX
}


# EMITTING SAR (SAR-128-13-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       SAR_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       SAR_GPR8i8_MEMi8_ONE_APX
}


# EMITTING SAR (SAR-128-13-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       SAR_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       SAR_GPR8i8_MEMi8_ONE_APX
}


# EMITTING SAR (SAR-128-14-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SAR_MEMv_ONE_APX
}


# EMITTING SAR (SAR-128-14-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SAR_MEMv_ONE_APX
}


# EMITTING SAR (SAR-128-15-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SAR_MEMv_ONE_APX
}


# EMITTING SAR (SAR-128-15-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SAR_MEMv_ONE_APX
}


# EMITTING SAR (SAR-128-16-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_MEMv_ONE_APX
}


# EMITTING SAR (SAR-128-16-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_MEMv_ONE_APX
}


# EMITTING SAR (SAR-128-17-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_MEMv_ONE_APX
}


# EMITTING SAR (SAR-128-17-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SAR_GPRv_MEMv_ONE_APX
}


# EMITTING SAR (SAR-128-18-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPR8i8_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       SAR_MEMi8_CL_APX
}


# EMITTING SAR (SAR-128-18-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPR8i8_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       SAR_MEMi8_CL_APX
}


# EMITTING SAR (SAR-128-2-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       SAR_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPR8i8_MEMi8_CL_APX
}


# EMITTING SAR (SAR-128-2-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       SAR_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPR8i8_MEMi8_CL_APX
}


# EMITTING SAR (SAR-128-3-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SAR_MEMv_CL_APX
}


# EMITTING SAR (SAR-128-3-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SAR_MEMv_CL_APX
}


# EMITTING SAR (SAR-128-4-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SAR_MEMv_CL_APX
}


# EMITTING SAR (SAR-128-4-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SAR_MEMv_CL_APX
}


# EMITTING SAR (SAR-128-5-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_GPRv_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_MEMv_CL_APX
}


# EMITTING SAR (SAR-128-5-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_GPRv_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_MEMv_CL_APX
}


# EMITTING SAR (SAR-128-6-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_GPRv_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_MEMv_CL_APX
}


# EMITTING SAR (SAR-128-6-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_GPRv_CL_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SAR_GPRv_MEMv_CL_APX
}


# EMITTING SAR (SAR-128-7-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       SAR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       SAR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SAR (SAR-128-7-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       SAR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       SAR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SAR (SAR-128-8-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SAR_GPRv_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SAR_MEMv_IMM8_APX
}


# EMITTING SAR (SAR-128-8-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SAR_GPRv_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SAR_MEMv_IMM8_APX
}


# EMITTING SAR (SAR-128-9-nf0)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SAR_GPRv_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SAR_MEMv_IMM8_APX
}


# EMITTING SAR (SAR-128-9-nf1)
{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SAR_GPRv_IMM8_APX
}

{
ICLASS:      SAR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SAR_MEMv_IMM8_APX
}


# EMITTING SARX (SARX-128-1)
{
ICLASS:      SARX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF7 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32
IFORM:       SARX_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      SARX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32
IFORM:       SARX_GPR32i32_MEMi32_GPR32i32_APX
}


# EMITTING SARX (SARX-128-2)
{
ICLASS:      SARX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF7 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64
IFORM:       SARX_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      SARX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64
IFORM:       SARX_GPR64i64_MEMi64_GPR64i64_APX
}


# EMITTING SBB (SBB-128-1)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x18 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       SBB_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x18 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       SBB_MEMi8_GPR8i8_APX
}


# EMITTING SBB (SBB-128-10)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       SBB_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       SBB_GPRv_MEMv_IMM8_APX
}


# EMITTING SBB (SBB-128-11)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x18 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       SBB_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x18 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       SBB_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING SBB (SBB-128-12)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x19 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       SBB_GPRv_GPRv_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x19 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       SBB_MEMv_GPRv_APX
}


# EMITTING SBB (SBB-128-13)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x19 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       SBB_GPRv_GPRv_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x19 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       SBB_MEMv_GPRv_APX
}


# EMITTING SBB (SBB-128-14)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x19 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       SBB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x19 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       SBB_GPRv_MEMv_GPRv_APX
}


# EMITTING SBB (SBB-128-15)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x19 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       SBB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x19 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       SBB_GPRv_MEMv_GPRv_APX
}


# EMITTING SBB (SBB-128-16)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x1A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       SBB_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x1A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       SBB_GPR8i8_MEMi8_APX
}


# EMITTING SBB (SBB-128-17)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x1A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       SBB_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x1A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       SBB_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING SBB (SBB-128-18)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x1B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       SBB_GPRv_GPRv_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x1B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       SBB_GPRv_MEMv_APX
}


# EMITTING SBB (SBB-128-19)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x1B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       SBB_GPRv_GPRv_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x1B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       SBB_GPRv_MEMv_APX
}


# EMITTING SBB (SBB-128-2)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       SBB_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       SBB_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SBB (SBB-128-20)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x1B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       SBB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x1B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       SBB_GPRv_GPRv_MEMv_APX
}


# EMITTING SBB (SBB-128-21)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x1B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       SBB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x1B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       SBB_GPRv_GPRv_MEMv_APX
}


# EMITTING SBB (SBB-128-22)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       SBB_GPR8i8_IMM8_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       SBB_MEMi8_IMM8_APX
}


# EMITTING SBB (SBB-128-3)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       SBB_GPRv_IMMz_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       SBB_MEMv_IMMz_APX
}


# EMITTING SBB (SBB-128-4)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       SBB_GPRv_IMMz_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       SBB_MEMv_IMMz_APX
}


# EMITTING SBB (SBB-128-5)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       SBB_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       SBB_GPRv_MEMv_IMMz_APX
}


# EMITTING SBB (SBB-128-6)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       SBB_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       SBB_GPRv_MEMv_IMMz_APX
}


# EMITTING SBB (SBB-128-7)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       SBB_GPRv_IMM8_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       SBB_MEMv_IMM8_APX
}


# EMITTING SBB (SBB-128-8)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       SBB_GPRv_IMM8_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       SBB_MEMv_IMM8_APX
}


# EMITTING SBB (SBB-128-9)
{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       SBB_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SBB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       SBB_GPRv_MEMv_IMM8_APX
}


# EMITTING SETB (SETB-128-1)
{
ICLASS:      SETB
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x42 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETB_GPR8i8_APX
}

{
ICLASS:      SETB
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x42 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETB_MEMi8_APX
}


# EMITTING SETBE (SETBE-128-1)
{
ICLASS:      SETBE
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x46 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETBE_GPR8i8_APX
}

{
ICLASS:      SETBE
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x46 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETBE_MEMi8_APX
}


# EMITTING SETL (SETL-128-1)
{
ICLASS:      SETL
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x4C VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETL_GPR8i8_APX
}

{
ICLASS:      SETL
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x4C VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETL_MEMi8_APX
}


# EMITTING SETLE (SETLE-128-1)
{
ICLASS:      SETLE
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x4E VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETLE_GPR8i8_APX
}

{
ICLASS:      SETLE
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x4E VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETLE_MEMi8_APX
}


# EMITTING SETNB (SETNB-128-1)
{
ICLASS:      SETNB
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x43 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETNB_GPR8i8_APX
}

{
ICLASS:      SETNB
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x43 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETNB_MEMi8_APX
}


# EMITTING SETNBE (SETNBE-128-1)
{
ICLASS:      SETNBE
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x47 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETNBE_GPR8i8_APX
}

{
ICLASS:      SETNBE
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ CF-TST ZF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x47 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETNBE_MEMi8_APX
}


# EMITTING SETNL (SETNL-128-1)
{
ICLASS:      SETNL
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x4D VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETNL_GPR8i8_APX
}

{
ICLASS:      SETNL
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x4D VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETNL_MEMi8_APX
}


# EMITTING SETNLE (SETNLE-128-1)
{
ICLASS:      SETNLE
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x4F VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETNLE_GPR8i8_APX
}

{
ICLASS:      SETNLE
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST OF-TST ZF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x4F VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETNLE_MEMi8_APX
}


# EMITTING SETNO (SETNO-128-1)
{
ICLASS:      SETNO
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x41 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETNO_GPR8i8_APX
}

{
ICLASS:      SETNO
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x41 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETNO_MEMi8_APX
}


# EMITTING SETNP (SETNP-128-1)
{
ICLASS:      SETNP
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x4B VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETNP_GPR8i8_APX
}

{
ICLASS:      SETNP
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x4B VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETNP_MEMi8_APX
}


# EMITTING SETNS (SETNS-128-1)
{
ICLASS:      SETNS
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x49 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETNS_GPR8i8_APX
}

{
ICLASS:      SETNS
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x49 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETNS_MEMi8_APX
}


# EMITTING SETNZ (SETNZ-128-1)
{
ICLASS:      SETNZ
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x45 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETNZ_GPR8i8_APX
}

{
ICLASS:      SETNZ
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x45 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETNZ_MEMi8_APX
}


# EMITTING SETO (SETO-128-1)
{
ICLASS:      SETO
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x40 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETO_GPR8i8_APX
}

{
ICLASS:      SETO
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ OF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x40 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETO_MEMi8_APX
}


# EMITTING SETP (SETP-128-1)
{
ICLASS:      SETP
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x4A VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETP_GPR8i8_APX
}

{
ICLASS:      SETP
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ PF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x4A VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETP_MEMi8_APX
}


# EMITTING SETS (SETS-128-1)
{
ICLASS:      SETS
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x48 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETS_GPR8i8_APX
}

{
ICLASS:      SETS
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ SF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x48 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETS_MEMi8_APX
}


# EMITTING SETZ (SETZ-128-1)
{
ICLASS:      SETZ
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x44 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():w:b:i8
IFORM:       SETZ_GPR8i8_APX
}

{
ICLASS:      SETZ
CPL:         3
CATEGORY:    SETCC
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       READONLY [ ZF-TST ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x44 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:b:i8
IFORM:       SETZ_MEMi8_APX
}


# EMITTING SHA1MSG1 (SHA1MSG1-128-1)
{
ICLASS:      SHA1MSG1
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
PATTERN:     EVV 0xD9 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32
IFORM:       SHA1MSG1_XMMi32_XMMi32_APX
}

{
ICLASS:      SHA1MSG1
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE REQUIRES_ALIGNMENT 
PATTERN:     EVV 0xD9 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32
IFORM:       SHA1MSG1_XMMi32_MEMi32_APX
}


# EMITTING SHA1MSG2 (SHA1MSG2-128-1)
{
ICLASS:      SHA1MSG2
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
PATTERN:     EVV 0xDA VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32
IFORM:       SHA1MSG2_XMMi32_XMMi32_APX
}

{
ICLASS:      SHA1MSG2
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE REQUIRES_ALIGNMENT 
PATTERN:     EVV 0xDA VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32
IFORM:       SHA1MSG2_XMMi32_MEMi32_APX
}


# EMITTING SHA1NEXTE (SHA1NEXTE-128-1)
{
ICLASS:      SHA1NEXTE
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
PATTERN:     EVV 0xD8 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32
IFORM:       SHA1NEXTE_XMMi32_XMMi32_APX
}

{
ICLASS:      SHA1NEXTE
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE REQUIRES_ALIGNMENT 
PATTERN:     EVV 0xD8 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32
IFORM:       SHA1NEXTE_XMMi32_MEMi32_APX
}


# EMITTING SHA1RNDS4 (SHA1RNDS4-128-1)
{
ICLASS:      SHA1RNDS4
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
PATTERN:     EVV 0xD4 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32 IMM0:r:b:i8
IFORM:       SHA1RNDS4_XMMi32_XMMi32_IMM8_APX
}

{
ICLASS:      SHA1RNDS4
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE REQUIRES_ALIGNMENT 
PATTERN:     EVV 0xD4 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32 IMM0:r:b:i8
IFORM:       SHA1RNDS4_XMMi32_MEMi32_IMM8_APX
}


# EMITTING SHA256MSG1 (SHA256MSG1-128-1)
{
ICLASS:      SHA256MSG1
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
PATTERN:     EVV 0xDC VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32
IFORM:       SHA256MSG1_XMMi32_XMMi32_APX
}

{
ICLASS:      SHA256MSG1
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE REQUIRES_ALIGNMENT 
PATTERN:     EVV 0xDC VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32
IFORM:       SHA256MSG1_XMMi32_MEMi32_APX
}


# EMITTING SHA256MSG2 (SHA256MSG2-128-1)
{
ICLASS:      SHA256MSG2
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
PATTERN:     EVV 0xDD VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32
IFORM:       SHA256MSG2_XMMi32_XMMi32_APX
}

{
ICLASS:      SHA256MSG2
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE REQUIRES_ALIGNMENT 
PATTERN:     EVV 0xDD VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32
IFORM:       SHA256MSG2_XMMi32_MEMi32_APX
}


# EMITTING SHA256RNDS2 (SHA256RNDS2-128-1)
{
ICLASS:      SHA256RNDS2
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
PATTERN:     EVV 0xDB VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32 REG2=XED_REG_XMM0:r:SUPP:dq:u8
IFORM:       SHA256RNDS2_XMMi32_XMMi32_APX
}

{
ICLASS:      SHA256RNDS2
CPL:         3
CATEGORY:    SHA
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-SHA
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE REQUIRES_ALIGNMENT 
PATTERN:     EVV 0xDB VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32 REG1=XED_REG_XMM0:r:SUPP:dq:u8
IFORM:       SHA256RNDS2_XMMi32_MEMi32_APX
}


# EMITTING SHL (SHL-128-1-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       SHL_MEMi8_IMM8_APX
}


# EMITTING SHL (SHL-128-1-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       SHL_MEMi8_IMM8_APX
}


# EMITTING SHL (SHL-128-10-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-10-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-11-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-11-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-12-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-12-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-13-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMi8_CL_APX
}


# EMITTING SHL (SHL-128-13-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMi8_CL_APX
}


# EMITTING SHL (SHL-128-14-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMi8_CL_APX
}


# EMITTING SHL (SHL-128-14-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMi8_CL_APX
}


# EMITTING SHL (SHL-128-15-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_MEMi8_CL_APX
}


# EMITTING SHL (SHL-128-15-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_MEMi8_CL_APX
}


# EMITTING SHL (SHL-128-16-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       SHL_MEMi8_IMM8_APX
}


# EMITTING SHL (SHL-128-16-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       SHL_MEMi8_IMM8_APX
}


# EMITTING SHL (SHL-128-17-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_MEMi8_CL_APX
}


# EMITTING SHL (SHL-128-17-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPR8i8_MEMi8_CL_APX
}


# EMITTING SHL (SHL-128-18-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-18-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-19-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-19-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-2-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_MEMi8_ONE_APX
}


# EMITTING SHL (SHL-128-2-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_MEMi8_ONE_APX
}


# EMITTING SHL (SHL-128-20-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-20-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-21-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-21-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHL_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-22-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-22-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-23-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-23-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-24-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-24-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-25-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-25-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHL_GPRv_MEMv_CL_APX
}


# EMITTING SHL (SHL-128-26-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SHL (SHL-128-26-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SHL (SHL-128-27-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SHL (SHL-128-27-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       SHL_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SHL (SHL-128-28-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHL_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHL_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-28-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHL_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHL_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-29-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHL_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHL_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-29-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHL_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHL_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-3-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_MEMi8_ONE_APX
}


# EMITTING SHL (SHL-128-3-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_MEMi8_ONE_APX
}


# EMITTING SHL (SHL-128-30-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHL_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHL_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-30-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHL_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHL_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-31-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHL_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHL_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-31-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHL_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHL_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-32-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHL_GPRv_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-32-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHL_GPRv_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-33-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHL_GPRv_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-33-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHL_GPRv_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-34-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHL_GPRv_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-34-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHL_GPRv_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-35-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHL_GPRv_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-35-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHL_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHL_GPRv_MEMv_IMM8_APX
}


# EMITTING SHL (SHL-128-36-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_MEMi8_ONE_APX
}


# EMITTING SHL (SHL-128-36-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_MEMi8_ONE_APX
}


# EMITTING SHL (SHL-128-4-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_MEMi8_ONE_APX
}


# EMITTING SHL (SHL-128-4-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       SHL_GPR8i8_MEMi8_ONE_APX
}


# EMITTING SHL (SHL-128-5-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHL_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-5-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHL_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-6-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHL_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-6-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHL_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-7-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHL_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-7-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHL_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-8-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHL_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-8-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHL_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-9-nf0)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_MEMv_ONE_APX
}


# EMITTING SHL (SHL-128-9-nf1)
{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHL
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHL_GPRv_MEMv_ONE_APX
}


# EMITTING SHLD (SHLD-128-1-nf0)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0x24 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x24 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_MEMv_GPRv_IMM8_APX
}


# EMITTING SHLD (SHLD-128-1-nf1)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x24 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x24 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_MEMv_GPRv_IMM8_APX
}


# EMITTING SHLD (SHLD-128-2-nf0)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0x24 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x24 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_MEMv_GPRv_IMM8_APX
}


# EMITTING SHLD (SHLD-128-2-nf1)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x24 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x24 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_MEMv_GPRv_IMM8_APX
}


# EMITTING SHLD (SHLD-128-3-nf0)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x24 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x24 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_MEMv_GPRv_IMM8_APX
}


# EMITTING SHLD (SHLD-128-3-nf1)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x24 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x24 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_MEMv_GPRv_IMM8_APX
}


# EMITTING SHLD (SHLD-128-4-nf0)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x24 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x24 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_MEMv_GPRv_IMM8_APX
}


# EMITTING SHLD (SHLD-128-4-nf1)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x24 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x24 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHLD_GPRv_MEMv_GPRv_IMM8_APX
}


# EMITTING SHLD (SHLD-128-5-nf0)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xA5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xA5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHLD_MEMv_GPRv_CL_APX
}


# EMITTING SHLD (SHLD-128-5-nf1)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xA5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xA5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHLD_MEMv_GPRv_CL_APX
}


# EMITTING SHLD (SHLD-128-6-nf0)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xA5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xA5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHLD_MEMv_GPRv_CL_APX
}


# EMITTING SHLD (SHLD-128-6-nf1)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xA5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xA5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHLD_MEMv_GPRv_CL_APX
}


# EMITTING SHLD (SHLD-128-7-nf0)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xA5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xA5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_MEMv_GPRv_CL_APX
}


# EMITTING SHLD (SHLD-128-7-nf1)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xA5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xA5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_MEMv_GPRv_CL_APX
}


# EMITTING SHLD (SHLD-128-8-nf0)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xA5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xA5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_MEMv_GPRv_CL_APX
}


# EMITTING SHLD (SHLD-128-8-nf1)
{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xA5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHLD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xA5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHLD_GPRv_MEMv_GPRv_CL_APX
}


# EMITTING SHLX (SHLX-128-1)
{
ICLASS:      SHLX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF7 V66 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32
IFORM:       SHLX_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      SHLX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32
IFORM:       SHLX_GPR32i32_MEMi32_GPR32i32_APX
}


# EMITTING SHLX (SHLX-128-2)
{
ICLASS:      SHLX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF7 V66 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64
IFORM:       SHLX_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      SHLX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64
IFORM:       SHLX_GPR64i64_MEMi64_GPR64i64_APX
}


# EMITTING SHR (SHR-128-1-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       SHR_GPR8i8_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       SHR_MEMi8_IMM8_APX
}


# EMITTING SHR (SHR-128-1-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b
IFORM:       SHR_GPR8i8_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b
IFORM:       SHR_MEMi8_IMM8_APX
}


# EMITTING SHR (SHR-128-10-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHR_GPRv_MEMv_IMM8_APX
}


# EMITTING SHR (SHR-128-10-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHR_GPRv_MEMv_IMM8_APX
}


# EMITTING SHR (SHR-128-11-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHR_GPRv_MEMv_IMM8_APX
}


# EMITTING SHR (SHR-128-11-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b
IFORM:       SHR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b
IFORM:       SHR_GPRv_MEMv_IMM8_APX
}


# EMITTING SHR (SHR-128-12-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHR_GPR8i8_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHR_MEMi8_ONE_APX
}


# EMITTING SHR (SHR-128-12-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHR_GPR8i8_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:IMPL:b
IFORM:       SHR_MEMi8_ONE_APX
}


# EMITTING SHR (SHR-128-13-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       SHR_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       SHR_GPR8i8_MEMi8_ONE_APX
}


# EMITTING SHR (SHR-128-13-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b
IFORM:       SHR_GPR8i8_GPR8i8_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b
IFORM:       SHR_GPR8i8_MEMi8_ONE_APX
}


# EMITTING SHR (SHR-128-14-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHR_MEMv_ONE_APX
}


# EMITTING SHR (SHR-128-14-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHR_MEMv_ONE_APX
}


# EMITTING SHR (SHR-128-15-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHR_MEMv_ONE_APX
}


# EMITTING SHR (SHR-128-15-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE()
OPERANDS:    MEM0:rw:v IMM0:r:IMPL:b
IFORM:       SHR_MEMv_ONE_APX
}


# EMITTING SHR (SHR-128-16-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_MEMv_ONE_APX
}


# EMITTING SHR (SHR-128-16-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_MEMv_ONE_APX
}


# EMITTING SHR (SHR-128-17-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_MEMv_ONE_APX
}


# EMITTING SHR (SHR-128-17-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_GPRv_ONE_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE 
PATTERN:     EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b
IFORM:       SHR_GPRv_MEMv_ONE_APX
}


# EMITTING SHR (SHR-128-18-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPR8i8_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       SHR_MEMi8_CL_APX
}


# EMITTING SHR (SHR-128-18-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPR8i8_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL
IFORM:       SHR_MEMi8_CL_APX
}


# EMITTING SHR (SHR-128-2-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       SHR_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPR8i8_MEMi8_CL_APX
}


# EMITTING SHR (SHR-128-2-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL
IFORM:       SHR_GPR8i8_GPR8i8_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPR8i8_MEMi8_CL_APX
}


# EMITTING SHR (SHR-128-3-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHR_MEMv_CL_APX
}


# EMITTING SHR (SHR-128-3-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHR_MEMv_CL_APX
}


# EMITTING SHR (SHR-128-4-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHR_MEMv_CL_APX
}


# EMITTING SHR (SHR-128-4-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=XED_REG_CL:r:IMPL
IFORM:       SHR_MEMv_CL_APX
}


# EMITTING SHR (SHR-128-5-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_MEMv_CL_APX
}


# EMITTING SHR (SHR-128-5-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_MEMv_CL_APX
}


# EMITTING SHR (SHR-128-6-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_MEMv_CL_APX
}


# EMITTING SHR (SHR-128-6-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHR_GPRv_MEMv_CL_APX
}


# EMITTING SHR (SHR-128-7-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       SHR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       SHR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SHR (SHR-128-7-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b
IFORM:       SHR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b
IFORM:       SHR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SHR (SHR-128-8-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHR_GPRv_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHR_MEMv_IMM8_APX
}


# EMITTING SHR (SHR-128-8-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHR_GPRv_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHR_MEMv_IMM8_APX
}


# EMITTING SHR (SHR-128-9-nf0)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHR_GPRv_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHR_MEMv_IMM8_APX
}


# EMITTING SHR (SHR-128-9-nf1)
{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b
IFORM:       SHR_GPRv_IMM8_APX
}

{
ICLASS:      SHR
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b
IFORM:       SHR_MEMv_IMM8_APX
}


# EMITTING SHRD (SHRD-128-1-nf0)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0x2C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x2C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_MEMv_GPRv_IMM8_APX
}


# EMITTING SHRD (SHRD-128-1-nf1)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x2C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x2C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_MEMv_GPRv_IMM8_APX
}


# EMITTING SHRD (SHRD-128-2-nf0)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0x2C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x2C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_MEMv_GPRv_IMM8_APX
}


# EMITTING SHRD (SHRD-128-2-nf1)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x2C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x2C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_MEMv_GPRv_IMM8_APX
}


# EMITTING SHRD (SHRD-128-3-nf0)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x2C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x2C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_MEMv_GPRv_IMM8_APX
}


# EMITTING SHRD (SHRD-128-3-nf1)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x2C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x2C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_MEMv_GPRv_IMM8_APX
}


# EMITTING SHRD (SHRD-128-4-nf0)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x2C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x2C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_MEMv_GPRv_IMM8_APX
}


# EMITTING SHRD (SHRD-128-4-nf1)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x2C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x2C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b
IFORM:       SHRD_GPRv_MEMv_GPRv_IMM8_APX
}


# EMITTING SHRD (SHRD-128-5-nf0)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xAD VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xAD VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHRD_MEMv_GPRv_CL_APX
}


# EMITTING SHRD (SHRD-128-5-nf1)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xAD VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xAD VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHRD_MEMv_GPRv_CL_APX
}


# EMITTING SHRD (SHRD-128-6-nf0)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
PATTERN:     EVV 0xAD V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xAD V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHRD_MEMv_GPRv_CL_APX
}


# EMITTING SHRD (SHRD-128-6-nf1)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xAD V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xAD V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL
IFORM:       SHRD_MEMv_GPRv_CL_APX
}


# EMITTING SHRD (SHRD-128-7-nf0)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xAD VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xAD VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_MEMv_GPRv_CL_APX
}


# EMITTING SHRD (SHRD-128-7-nf1)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xAD VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xAD VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_MEMv_GPRv_CL_APX
}


# EMITTING SHRD (SHRD-128-8-nf0)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0xAD V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0xAD V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_MEMv_GPRv_CL_APX
}


# EMITTING SHRD (SHRD-128-8-nf1)
{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0xAD V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_GPRv_GPRv_CL_APX
}

{
ICLASS:      SHRD
CPL:         3
CATEGORY:    SHIFT
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xAD V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL
IFORM:       SHRD_GPRv_MEMv_GPRv_CL_APX
}


# EMITTING SHRX (SHRX-128-1)
{
ICLASS:      SHRX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF7 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32
IFORM:       SHRX_GPR32i32_GPR32i32_GPR32i32_APX
}

{
ICLASS:      SHRX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32
IFORM:       SHRX_GPR32i32_MEMi32_GPR32i32_APX
}


# EMITTING SHRX (SHRX-128-2)
{
ICLASS:      SHRX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
PATTERN:     EVV 0xF7 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64
IFORM:       SHRX_GPR64i64_GPR64i64_GPR64i64_APX
}

{
ICLASS:      SHRX
CPL:         3
CATEGORY:    BMI2
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-BMI
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF7 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64
IFORM:       SHRX_GPR64i64_MEMi64_GPR64i64_APX
}


# EMITTING SUB (SUB-128-1-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x28 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x28 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       SUB_MEMi8_GPR8i8_APX
}


# EMITTING SUB (SUB-128-1-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x28 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x28 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       SUB_MEMi8_GPR8i8_APX
}


# EMITTING SUB (SUB-128-10-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       SUB_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       SUB_GPRv_MEMv_IMM8_APX
}


# EMITTING SUB (SUB-128-10-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       SUB_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       SUB_GPRv_MEMv_IMM8_APX
}


# EMITTING SUB (SUB-128-11-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x28 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x28 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       SUB_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING SUB (SUB-128-11-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x28 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x28 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       SUB_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING SUB (SUB-128-12-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x29 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       SUB_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x29 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       SUB_MEMv_GPRv_APX
}


# EMITTING SUB (SUB-128-12-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x29 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       SUB_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x29 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       SUB_MEMv_GPRv_APX
}


# EMITTING SUB (SUB-128-13-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x29 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       SUB_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x29 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       SUB_MEMv_GPRv_APX
}


# EMITTING SUB (SUB-128-13-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x29 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       SUB_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x29 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       SUB_MEMv_GPRv_APX
}


# EMITTING SUB (SUB-128-14-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x29 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       SUB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x29 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       SUB_GPRv_MEMv_GPRv_APX
}


# EMITTING SUB (SUB-128-14-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x29 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       SUB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x29 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       SUB_GPRv_MEMv_GPRv_APX
}


# EMITTING SUB (SUB-128-15-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x29 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       SUB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x29 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       SUB_GPRv_MEMv_GPRv_APX
}


# EMITTING SUB (SUB-128-15-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x29 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       SUB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x29 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       SUB_GPRv_MEMv_GPRv_APX
}


# EMITTING SUB (SUB-128-16-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x2A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x2A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       SUB_GPR8i8_MEMi8_APX
}


# EMITTING SUB (SUB-128-16-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x2A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x2A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       SUB_GPR8i8_MEMi8_APX
}


# EMITTING SUB (SUB-128-17-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x2A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x2A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING SUB (SUB-128-17-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x2A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x2A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING SUB (SUB-128-18-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x2B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       SUB_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x2B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       SUB_GPRv_MEMv_APX
}


# EMITTING SUB (SUB-128-18-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x2B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       SUB_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x2B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       SUB_GPRv_MEMv_APX
}


# EMITTING SUB (SUB-128-19-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x2B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       SUB_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x2B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       SUB_GPRv_MEMv_APX
}


# EMITTING SUB (SUB-128-19-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x2B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       SUB_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x2B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       SUB_GPRv_MEMv_APX
}


# EMITTING SUB (SUB-128-2-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       SUB_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SUB (SUB-128-2-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       SUB_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       SUB_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING SUB (SUB-128-20-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x2B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       SUB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x2B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       SUB_GPRv_GPRv_MEMv_APX
}


# EMITTING SUB (SUB-128-20-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x2B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       SUB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x2B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       SUB_GPRv_GPRv_MEMv_APX
}


# EMITTING SUB (SUB-128-21-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x2B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       SUB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x2B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       SUB_GPRv_GPRv_MEMv_APX
}


# EMITTING SUB (SUB-128-21-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x2B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       SUB_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x2B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       SUB_GPRv_GPRv_MEMv_APX
}


# EMITTING SUB (SUB-128-22-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       SUB_GPR8i8_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       SUB_MEMi8_IMM8_APX
}


# EMITTING SUB (SUB-128-22-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       SUB_GPR8i8_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       SUB_MEMi8_IMM8_APX
}


# EMITTING SUB (SUB-128-3-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       SUB_GPRv_IMMz_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       SUB_MEMv_IMMz_APX
}


# EMITTING SUB (SUB-128-3-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       SUB_GPRv_IMMz_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       SUB_MEMv_IMMz_APX
}


# EMITTING SUB (SUB-128-4-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       SUB_GPRv_IMMz_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       SUB_MEMv_IMMz_APX
}


# EMITTING SUB (SUB-128-4-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       SUB_GPRv_IMMz_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       SUB_MEMv_IMMz_APX
}


# EMITTING SUB (SUB-128-5-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       SUB_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       SUB_GPRv_MEMv_IMMz_APX
}


# EMITTING SUB (SUB-128-5-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       SUB_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       SUB_GPRv_MEMv_IMMz_APX
}


# EMITTING SUB (SUB-128-6-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       SUB_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       SUB_GPRv_MEMv_IMMz_APX
}


# EMITTING SUB (SUB-128-6-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       SUB_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       SUB_GPRv_MEMv_IMMz_APX
}


# EMITTING SUB (SUB-128-7-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       SUB_GPRv_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       SUB_MEMv_IMM8_APX
}


# EMITTING SUB (SUB-128-7-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       SUB_GPRv_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       SUB_MEMv_IMM8_APX
}


# EMITTING SUB (SUB-128-8-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       SUB_GPRv_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       SUB_MEMv_IMM8_APX
}


# EMITTING SUB (SUB-128-8-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       SUB_GPRv_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       SUB_MEMv_IMM8_APX
}


# EMITTING SUB (SUB-128-9-nf0)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       SUB_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       SUB_GPRv_MEMv_IMM8_APX
}


# EMITTING SUB (SUB-128-9-nf1)
{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       SUB_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      SUB
CPL:         3
CATEGORY:    BINARY
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       SUB_GPRv_MEMv_IMM8_APX
}


# EMITTING TZCNT (TZCNT-128-1-nf0)
{
ICLASS:      TZCNT
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF4 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       TZCNT_GPRv_GPRv_APX
}

{
ICLASS:      TZCNT
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF4 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       TZCNT_GPRv_MEMv_APX
}


# EMITTING TZCNT (TZCNT-128-1-nf1)
{
ICLASS:      TZCNT
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF4 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       TZCNT_GPRv_GPRv_APX
}

{
ICLASS:      TZCNT
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF4 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       TZCNT_GPRv_MEMv_APX
}


# EMITTING TZCNT (TZCNT-128-2-nf0)
{
ICLASS:      TZCNT
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-MOD ]
PATTERN:     EVV 0xF4 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       TZCNT_GPRv_GPRv_APX
}

{
ICLASS:      TZCNT
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-MOD ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0xF4 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       TZCNT_GPRv_MEMv_APX
}


# EMITTING TZCNT (TZCNT-128-2-nf1)
{
ICLASS:      TZCNT
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0xF4 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v REG1=GPRv_B():r:v
IFORM:       TZCNT_GPRv_GPRv_APX
}

{
ICLASS:      TZCNT
CPL:         3
CATEGORY:    BMI1
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0xF4 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():w:v MEM0:r:v
IFORM:       TZCNT_GPRv_MEMv_APX
}


# EMITTING WRSSD (WRSSD-128-1)
{
ICLASS:      WRSSD
CPL:         3
CATEGORY:    CET
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CET-WRSS
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x66 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:d:u32 REG0=GPR32_R():r:d:u32
IFORM:       WRSSD_MEMu32_GPR32u32_APX
}


# EMITTING WRSSQ (WRSSQ-128-1)
{
ICLASS:      WRSSQ
CPL:         3
CATEGORY:    CET
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CET-WRSS
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x66 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:q:u64 REG0=GPR64_R():r:q:u64
IFORM:       WRSSQ_MEMu64_GPR64u64_APX
}


# EMITTING WRUSSD (WRUSSD-128-1)
{
ICLASS:      WRUSSD
CPL:         0
CATEGORY:    CET
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CET-WRUSS
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x65 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:d:u32 REG0=GPR32_R():r:d:u32
IFORM:       WRUSSD_MEMu32_GPR32u32_APX
}


# EMITTING WRUSSQ (WRUSSQ-128-1)
{
ICLASS:      WRUSSQ
CPL:         0
CATEGORY:    CET
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-CET-WRUSS
REAL_OPCODE: Y
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x65 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:w:q:u64 REG0=GPR64_R():r:q:u64
IFORM:       WRUSSQ_MEMu64_GPR64u64_APX
}


# EMITTING XOR (XOR-128-1-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x30 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x30 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       XOR_MEMi8_GPR8i8_APX
}


# EMITTING XOR (XOR-128-1-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x30 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x30 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8
IFORM:       XOR_MEMi8_GPR8i8_APX
}


# EMITTING XOR (XOR-128-10-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       XOR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       XOR_GPRv_MEMv_IMM8_APX
}


# EMITTING XOR (XOR-128-10-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       XOR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       XOR_GPRv_MEMv_IMM8_APX
}


# EMITTING XOR (XOR-128-11-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x30 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x30 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       XOR_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING XOR (XOR-128-11-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x30 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x30 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8
IFORM:       XOR_GPR8i8_MEMi8_GPR8i8_APX
}


# EMITTING XOR (XOR-128-12-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x31 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       XOR_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x31 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       XOR_MEMv_GPRv_APX
}


# EMITTING XOR (XOR-128-12-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x31 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       XOR_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x31 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       XOR_MEMv_GPRv_APX
}


# EMITTING XOR (XOR-128-13-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x31 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       XOR_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x31 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       XOR_MEMv_GPRv_APX
}


# EMITTING XOR (XOR-128-13-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x31 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_B():rw:v REG1=GPRv_R():r:v
IFORM:       XOR_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x31 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    MEM0:rw:v REG0=GPRv_R():r:v
IFORM:       XOR_MEMv_GPRv_APX
}


# EMITTING XOR (XOR-128-14-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x31 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       XOR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x31 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       XOR_GPRv_MEMv_GPRv_APX
}


# EMITTING XOR (XOR-128-14-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x31 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       XOR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x31 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       XOR_GPRv_MEMv_GPRv_APX
}


# EMITTING XOR (XOR-128-15-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x31 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       XOR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x31 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       XOR_GPRv_MEMv_GPRv_APX
}


# EMITTING XOR (XOR-128-15-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x31 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v
IFORM:       XOR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x31 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v
IFORM:       XOR_GPRv_MEMv_GPRv_APX
}


# EMITTING XOR (XOR-128-16-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x32 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x32 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       XOR_GPR8i8_MEMi8_APX
}


# EMITTING XOR (XOR-128-16-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x32 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x32 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8
IFORM:       XOR_GPR8i8_MEMi8_APX
}


# EMITTING XOR (XOR-128-17-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x32 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x32 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING XOR (XOR-128-17-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x32 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_GPR8i8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x32 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_MEMi8_APX
}


# EMITTING XOR (XOR-128-18-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x33 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       XOR_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x33 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       XOR_GPRv_MEMv_APX
}


# EMITTING XOR (XOR-128-18-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x33 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       XOR_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x33 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       XOR_GPRv_MEMv_APX
}


# EMITTING XOR (XOR-128-19-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x33 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       XOR_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x33 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       XOR_GPRv_MEMv_APX
}


# EMITTING XOR (XOR-128-19-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x33 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v REG1=GPRv_B():r:v
IFORM:       XOR_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x33 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX()
OPERANDS:    REG0=GPRv_R():rw:v MEM0:r:v
IFORM:       XOR_GPRv_MEMv_APX
}


# EMITTING XOR (XOR-128-2-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       XOR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING XOR (XOR-128-2-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8
IFORM:       XOR_GPR8i8_GPR8i8_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8
IFORM:       XOR_GPR8i8_MEMi8_IMM8_APX
}


# EMITTING XOR (XOR-128-20-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x33 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       XOR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x33 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       XOR_GPRv_GPRv_MEMv_APX
}


# EMITTING XOR (XOR-128-20-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x33 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       XOR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x33 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       XOR_GPRv_GPRv_MEMv_APX
}


# EMITTING XOR (XOR-128-21-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x33 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       XOR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x33 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       XOR_GPRv_GPRv_MEMv_APX
}


# EMITTING XOR (XOR-128-21-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x33 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v
IFORM:       XOR_GPRv_GPRv_GPRv_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x33 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v
IFORM:       XOR_GPRv_GPRv_MEMv_APX
}


# EMITTING XOR (XOR-128-22-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       XOR_GPR8i8_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       XOR_MEMi8_IMM8_APX
}


# EMITTING XOR (XOR-128-22-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP 
PATTERN:     EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8
IFORM:       XOR_GPR8i8_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF BYTEOP DISP8_NO_SCALE 
PATTERN:     EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:b:i8 IMM0:r:b:i8
IFORM:       XOR_MEMi8_IMM8_APX
}


# EMITTING XOR (XOR-128-3-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       XOR_GPRv_IMMz_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       XOR_MEMv_IMMz_APX
}


# EMITTING XOR (XOR-128-3-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       XOR_GPRv_IMMz_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       XOR_MEMv_IMMz_APX
}


# EMITTING XOR (XOR-128-4-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       XOR_GPRv_IMMz_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       XOR_MEMv_IMMz_APX
}


# EMITTING XOR (XOR-128-4-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:z
IFORM:       XOR_GPRv_IMMz_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz()
OPERANDS:    MEM0:rw:v IMM0:r:z
IFORM:       XOR_MEMv_IMMz_APX
}


# EMITTING XOR (XOR-128-5-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       XOR_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       XOR_GPRv_MEMv_IMMz_APX
}


# EMITTING XOR (XOR-128-5-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       XOR_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       XOR_GPRv_MEMv_IMMz_APX
}


# EMITTING XOR (XOR-128-6-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       XOR_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       XOR_GPRv_MEMv_IMMz_APX
}


# EMITTING XOR (XOR-128-6-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z
IFORM:       XOR_GPRv_GPRv_IMMz_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z
IFORM:       XOR_GPRv_MEMv_IMMz_APX
}


# EMITTING XOR (XOR-128-7-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       XOR_GPRv_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       XOR_MEMv_IMM8_APX
}


# EMITTING XOR (XOR-128-7-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       XOR_GPRv_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       XOR_MEMv_IMM8_APX
}


# EMITTING XOR (XOR-128-8-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       XOR_GPRv_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       XOR_MEMv_IMM8_APX
}


# EMITTING XOR (XOR-128-8-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF 
PATTERN:     EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=GPRv_B():rw:v IMM0:r:b:i8
IFORM:       XOR_GPRv_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8()
OPERANDS:    MEM0:rw:v IMM0:r:b:i8
IFORM:       XOR_MEMv_IMM8_APX
}


# EMITTING XOR (XOR-128-9-nf0)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       XOR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
FLAGS:       MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ]
ATTRIBUTES:  APX_NDD DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       XOR_GPRv_MEMv_IMM8_APX
}


# EMITTING XOR (XOR-128-9-nf1)
{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF 
PATTERN:     EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8
IFORM:       XOR_GPRv_GPRv_IMM8_APX
}

{
ICLASS:      XOR
CPL:         3
CATEGORY:    LOGICAL
EXTENSION:   APXEVEX
ISA_SET:     APX_F
EXCEPTIONS:  APX-EVEX-INT
REAL_OPCODE: Y
ATTRIBUTES:  APX_NDD APX_NF DISP8_NO_SCALE 
PATTERN:     EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8()
OPERANDS:    REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8
IFORM:       XOR_GPRv_MEMv_IMM8_APX
}


INSTRUCTIONS()::
# EMITTING JMPABS (JMPABS-N/A-1)
{
ICLASS:      JMPABS
CPL:         3
CATEGORY:    UNCOND_BR
EXTENSION:   APX_F
ISA_SET:     APX_F
EXCEPTIONS:  APX-LEGACY-JMPABS
REAL_OPCODE: Y
PATTERN:     0xA1 norexw_prefix no66_prefix no67_prefix norep rex2_refining_prefix mode64 BRDISP64()
OPERANDS:    ABSBR:r:u64
IFORM:       JMPABS_ABSBRu64_APX
}