#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#  
#END_LEGAL

INSTRUCTIONS()::

# Both read EAX
# Both may read or write or r/w  RBX, RCX, RDX
# ENCLU 0f 01 D7  
# D7 =  1101 0111

# ENCLS 0f 01 CF
# CF = 1100_1111



{
ICLASS: ENCLU
CPL: 3
CATEGORY:  SGX
EXTENSION: SGX
ISA_SET:   SGX
COMMENT:   May set flags
PATTERN: 0x0F 0x01 MOD[0b11] MOD=3 REG[0b010] RM[0b111] no_refining_prefix
OPERANDS: REG0=XED_REG_EAX:r:SUPP    \
          REG1=XED_REG_RBX:crw:SUPP  \ 
          REG2=XED_REG_RCX:crw:SUPP  \
          REG3=XED_REG_RDX:crw:SUPP 
}

{

ICLASS: ENCLS
CPL: 0
CATEGORY:  SGX
EXTENSION: SGX
ISA_SET:   SGX
COMMENT:   May set flags
PATTERN: 0x0F 0x01 MOD[0b11] MOD=3 REG[0b001] RM[0b111] no_refining_prefix
OPERANDS: REG0=XED_REG_EAX:r:SUPP    \
          REG1=XED_REG_RBX:crw:SUPP  \ 
          REG2=XED_REG_RCX:crw:SUPP  \
          REG3=XED_REG_RDX:crw:SUPP 

}