cortex-ar
| Crates.io | cortex-ar |
| lib.rs | cortex-ar |
| version | |
| source | src |
| created_at | 2025-02-25 14:25:51.870141+00 |
| updated_at | 2025-02-25 14:25:51.870141+00 |
| description | CPU support for AArch32 Arm Cortex-R and Arm Cortex-A |
| homepage | |
| repository | https://github.com/rust-embedded/cortex-r.git |
| max_upload_size | |
| id | 1569191 |
| Cargo.toml error: | TOML parse error at line 22, column 1 | 22 | autolib = false | ^^^^^^^ unknown field `autolib`, expected one of `name`, `version`, `edition`, `authors`, `description`, `readme`, `license`, `repository`, `homepage`, `documentation`, `build`, `resolver`, `links`, `default-run`, `default_dash_run`, `rust-version`, `rust_dash_version`, `rust_version`, `license-file`, `license_dash_file`, `license_file`, `licenseFile`, `license_capital_file`, `forced-target`, `forced_dash_target`, `autobins`, `autotests`, `autoexamples`, `autobenches`, `publish`, `metadata`, `keywords`, `categories`, `exclude`, `include` |
| size | 0 |
Arm (github:rust-embedded:arm)
documentation
README
Support for Arm Cortex-R (AArch32) and Arm Corex-A (AArch32)
This crate provides access to CPU registers and common peripherals for:
- Armv7-R Processors, like the Arm Cortex-R5
- Armv8-R AArch32 Processors, like the Arm Cortex-R52
- Armv7-A Processors, like the Arm Cortex-A5
- Armv8-A AArch32 Processors, like the Arm Cortex-A53 running in 32-bit mode
It does not support processors running in AArch64 mode - A64 machine code uses different instructions for reading/writing system registers.
This crate contains:
- Raw register access to many Armv7-R and Armv8-R AArch32 system registers
- A driver for the PMSAv7 Memory Protection Unit (MPU)
- A driver for the PMSAv8-R Memory Protection Unit (MPU)
- A driver for the Arm Generic Timer
If you need a driver for the Arm Generic Interrupt Controller, see https://github.com/google/arm-gic.
Minimum Supported Rust Version (MSRV)
This crate is guaranteed to compile on stable Rust 1.82.0 and up. It might compile with older versions but that may change in any new patch release.
Licence
Copyright (c) Ferrous Systems, 2025
Licensed under either MIT or Apache-2.0 at your option.
Contribution
Unless you explicitly state otherwise, any contribution intentionally submitted for inclusion in the work by you shall be licensed as above, without any additional terms or conditions.