Crates.io | embassy-nrf |
lib.rs | embassy-nrf |
version | 0.2.0 |
source | src |
created_at | 2020-10-31 20:49:52.276667 |
updated_at | 2024-08-05 10:12:57.510607 |
description | Embassy Hardware Abstraction Layer (HAL) for nRF series microcontrollers |
homepage | |
repository | https://github.com/embassy-rs/embassy |
max_upload_size | |
id | 307311 |
size | 596,190 |
HALs implement safe, idiomatic Rust APIs to use the hardware capabilities, so raw register manipulation is not needed.
The Embassy nRF HAL targets the Nordic Semiconductor nRF family of hardware. The HAL implements both blocking and async APIs for many peripherals. The benefit of using the async APIs is that the HAL takes care of waiting for peripherals to complete operations in low power mode and handling interrupts, so that applications can focus on more important matters.
NOTE: The Embassy HALs can be used both for non-async and async operations. For async, you can choose which runtime you want to use.
For a complete list of available peripherals and features, see the embassy-nrf documentation.
The embassy-nrf
HAL supports most variants of the nRF family:
Most peripherals are supported, but can vary between chip families. To check what's available, make sure to pick the MCU you're targeting in the top menu in the documentation.
For MCUs with TrustZone support, both Secure (S) and Non-Secure (NS) modes are supported. Running in Secure mode allows running Rust code without a SPM or TF-M binary, saving flash space and simplifying development.
If the time-driver-rtc1
feature is enabled, the HAL uses the RTC peripheral as a global time driver for embassy-time, with a tick rate of 32768 Hz.
The embassy-nrf
HAL implements the traits from embedded-hal (v0.2 and 1.0) and embedded-hal-async, as well as embedded-io and embedded-io-async.
This crate can run on any executor.
Optionally, some features requiring embassy-time
can be activated with the time
feature. If you enable it,
you must link an embassy-time
driver in your project.
On nRF chips, peripherals can use the so called EasyDMA feature to offload the task of interacting with peripherals. It takes care of sending/receiving data over a variety of bus protocols (TWI/I2C, UART, SPI). However, EasyDMA requires the buffers used to transmit and receive data to reside in RAM. Unfortunately, Rust slices will not always do so. The following example using the SPI peripheral shows a common situation where this might happen:
// As we pass a slice to the function whose contents will not ever change,
// the compiler writes it into the flash and thus the pointer to it will
// reference static memory. Since EasyDMA requires slices to reside in RAM,
// this function call will fail.
let result = spim.write_from_ram(&[1, 2, 3]);
assert_eq!(result, Err(Error::BufferNotInRAM));
// The data is still static and located in flash. However, since we are assigning
// it to a variable, the compiler will load it into memory. Passing a reference to the
// variable will yield a pointer that references dynamic memory, thus making EasyDMA happy.
// This function call succeeds.
let data = [1, 2, 3];
let result = spim.write_from_ram(&data);
assert!(result.is_ok());
Each peripheral struct which uses EasyDMA (Spim
, Uarte
, Twim
) has two variants of their mutating functions:
write_from_ram
, transfer_from_ram
) will return an error if the passed slice does not reside in RAM.write
, transfer
) will check whether the data is in RAM and copy it into memory prior to transmission.Since copying incurs a overhead, you are given the option to choose from _from_ram
variants which will
fail and notify you, or the more convenient versions without the suffix which are potentially a little bit
more inefficient. Be aware that this overhead is not only in terms of instruction count but also in terms of memory usage
as the methods without the suffix will be allocating a statically sized buffer (up to 512 bytes for the nRF52840).
Note that the methods that read data like read
and transfer_in_place
do not have the corresponding _from_ram
variants as
mutable slices always reside in RAM.