hpm-riscv-rt
| Crates.io | hpm-riscv-rt |
| lib.rs | hpm-riscv-rt |
| version | 0.1.2 |
| created_at | 2024-06-07 10:28:04.207653+00 |
| updated_at | 2024-12-11 13:47:10.773402+00 |
| description | Low level access to HPMicro's RISC-V processors |
| homepage | https://github.com/hpmicro-rs/hpm-riscv-rt |
| repository | https://github.com/hpmicro-rs/hpm-riscv-rt |
| max_upload_size | |
| id | 1264625 |
| size | 35,731 |
Andelf (andelf)
documentation
https://docs.rs/hpm-riscv
README
hpm-riscv-rt
Minimal startup/runtime for RISC-V CPUs from HPMicro.
Much of the code in this package originated in the rust-embedded/riscv repository.
How to use
Create the memory.x linker script file, then add link args.
MEMORY
{
XPI0_HEADER : ORIGIN = 0x80000000, LENGTH = 0x3000 /* bootheader */
XPI0_APP : ORIGIN = 0x80003000, LENGTH = 1024K - 0x3000 /* app firmware */
ILM : ORIGIN = 0x00000000, LENGTH = 256K /* instruction local memory */
DLM : ORIGIN = 0x00080000, LENGTH = 256K /* data local memory */
AXI_SRAM : ORIGIN = 0x01080000, LENGTH = 1M
AHB_SRAM : ORIGIN = 0xF0300000, LENGTH = 32K
APB_SRAM : ORIGIN = 0xF40F0000, LENGTH = 8K
SDRAM : ORIGIN = 0x40000000, LENGTH = 32M
}
REGION_ALIAS("REGION_TEXT", XPI0_APP);
REGION_ALIAS("REGION_FASTTEXT", ILM);
REGION_ALIAS("REGION_FASTDATA", DLM);
REGION_ALIAS("REGION_RODATA", XPI0_APP);
REGION_ALIAS("REGION_DATA", DLM);
REGION_ALIAS("REGION_BSS", DLM);
REGION_ALIAS("REGION_HEAP", DLM);
REGION_ALIAS("REGION_STACK", DLM);
REGION_ALIAS("REGION_NONCACHEABLE_RAM", DLM);