Crates.io | hpm-riscv-rt |
lib.rs | hpm-riscv-rt |
version | |
source | src |
created_at | 2024-06-07 10:28:04.207653 |
updated_at | 2024-11-24 05:15:45.18198 |
description | Low level access to HPMicro's RISC-V processors |
homepage | https://github.com/hpmicro-rs/hpm-riscv-rt |
repository | https://github.com/hpmicro-rs/hpm-riscv-rt |
max_upload_size | |
id | 1264625 |
Cargo.toml error: | TOML parse error at line 18, column 1 | 18 | autolib = false | ^^^^^^^ unknown field `autolib`, expected one of `name`, `version`, `edition`, `authors`, `description`, `readme`, `license`, `repository`, `homepage`, `documentation`, `build`, `resolver`, `links`, `default-run`, `default_dash_run`, `rust-version`, `rust_dash_version`, `rust_version`, `license-file`, `license_dash_file`, `license_file`, `licenseFile`, `license_capital_file`, `forced-target`, `forced_dash_target`, `autobins`, `autotests`, `autoexamples`, `autobenches`, `publish`, `metadata`, `keywords`, `categories`, `exclude`, `include` |
size | 0 |
Minimal startup/runtime for RISC-V CPUs from HPMicro.
Much of the code in this package originated in the rust-embedded/riscv repository.
Create the memory.x
linker script file, then add link args.
MEMORY
{
XPI0_HEADER : ORIGIN = 0x80000000, LENGTH = 0x3000 /* bootheader */
XPI0_APP : ORIGIN = 0x80003000, LENGTH = 1024K - 0x3000 /* app firmware */
ILM : ORIGIN = 0x00000000, LENGTH = 256K /* instruction local memory */
DLM : ORIGIN = 0x00080000, LENGTH = 256K /* data local memory */
AXI_SRAM : ORIGIN = 0x01080000, LENGTH = 1M
AHB_SRAM : ORIGIN = 0xF0300000, LENGTH = 32K
APB_SRAM : ORIGIN = 0xF40F0000, LENGTH = 8K
SDRAM : ORIGIN = 0x40000000, LENGTH = 32M
}
REGION_ALIAS("REGION_TEXT", XPI0_APP);
REGION_ALIAS("REGION_FASTTEXT", ILM);
REGION_ALIAS("REGION_FASTDATA", DLM);
REGION_ALIAS("REGION_RODATA", XPI0_APP);
REGION_ALIAS("REGION_DATA", DLM);
REGION_ALIAS("REGION_BSS", DLM);
REGION_ALIAS("REGION_HEAP", DLM);
REGION_ALIAS("REGION_STACK", DLM);
REGION_ALIAS("REGION_NONCACHEABLE_RAM", DLM);