| Crates.io | intel82599_hal |
| lib.rs | intel82599_hal |
| version | 0.1.0 |
| created_at | 2024-12-13 16:53:17.023613+00 |
| updated_at | 2024-12-13 16:53:17.023613+00 |
| description | An intralingual Hardware Abstraction Layer for the 10 GbE Intel 82599 NIC. |
| homepage | |
| repository | https://github.com/Ramla-I/intel82599-hal |
| max_upload_size | |
| id | 1482351 |
| size | 53,861 |
An intralingual Hardware Abstraction Layer (HAL) for the Intel 82599 Ethernet Adapter. By intralingual we mean that all communication rules are conveyed to the compiler using the type system. To learn more about intralingual design refer to this paper.
The key features of the i-HAL are:
struct to represent the layout of memory-mapped I/O (MMIO) registers and packet descriptors, which can then be overlaid atop a region of memory.struct fields enforce volatile access and read-only or write-only restrictions.struct. The former are inaccessible outside the HAL, and the latter are only accessible through methods.enum or bitflag struct encodes the set of valid values for register writes, forbidding arbitrary raw values at compile time.The i-HAL can be used in no-std crates, and is independent of the OS.