Crates.io | libreda-structural-verilog |
lib.rs | libreda-structural-verilog |
version | 0.0.5 |
source | src |
created_at | 2021-12-10 10:37:12.290993 |
updated_at | 2024-06-07 07:48:55.496277 |
description | Parser for structural verilog as it is created by Yosys. |
homepage | https://libreda.org |
repository | https://codeberg.org/libreda/libreda-structural-verilog |
max_upload_size | |
id | 495656 |
size | 207,939 |
This crate implements a NetlistReader
and NetlistWriter
of the LibrEDA framework for the Verilog netlist format used by Yosys.
Only a subset of Verilog is supported, namely 'structural' or 'netlist' Verilog. Which consists only of modules, module instantiations and port connections.