logicgate
| Crates.io | logicgate |
| lib.rs | logicgate |
| version | 0.3.2 |
| source | src |
| created_at | 2024-02-17 05:52:14.662021 |
| updated_at | 2024-02-21 07:59:45.092771 |
| description | Implementation of logic gates with NAND gates as the underlying layer Turing Complete |
| homepage | |
| repository | https://github.com/donjuanplatinum/logicgate |
| max_upload_size | |
| id | 1143033 |
| size | 20,914 |
donjuanplatinum (donjuanplatinum)
documentation
https://docs.rs/logicgate
README
LogicGate
Gates
- Nand 与非门
- Not 非门
- Or 或门
- Nor 或非门
- And 与门
- HighLevel 高电平
- LowLeval 低电平
- Xor 异或门
- ThreeAnd 三路与门
- ThreeOr 三路或门
- Xnor 同或门
- DelayLine 延迟线
- HalfAdder 半加器
- FullAdder 全加器
- Switch 一位开关
- EightSwitch 八位开关
- EightBitSplitter 八位分线器
- EightBitMux 八位集线器
- EightBitAdder 八位加法器
- EightBixNot 八位非
- EightBitOr 八位或
- DataSelector 八位数据选择器