| Crates.io | mano |
| lib.rs | mano |
| version | 0.1.1 |
| created_at | 2025-10-28 19:05:13.921831+00 |
| updated_at | 2025-10-28 19:15:41.897315+00 |
| description | An assembler and emulator library for the Mano Machine RISC CPU |
| homepage | https://github.com/husmus00/mano-lib |
| repository | https://github.com/husmus00/mano-lib |
| max_upload_size | |
| id | 1905511 |
| size | 50,033 |
An assembler and emulator for the Mano Machine RISC CPU, as described in "Computer System Architecture" by M. Morris Mano.
See github.com/husmus00/mano-rs for examples of CLI, TUI, and web-based applications built using this library.
Add this to your Cargo.toml:
[dependencies]
mano = "0.1"
Building a basic emulator requires only three methods: prime(), tick(), and get_state().
use mano::{Machine, Messages};
fn main() {
let program = vec![
"ORG 0".to_string(),
"LDA A".to_string(),
"ADD B".to_string(),
"STA C".to_string(),
"HLT".to_string(),
"A, DEC 5".to_string(),
"B, DEC 10".to_string(),
"C, DEC 0".to_string(),
"END".to_string(),
];
let mut machine = Machine::new();
// prime() - Assemble and load the program
let messages = machine.prime(program);
if messages.has_errors() {
eprintln!("Assembly failed");
return;
}
// tick() - Execute one instruction at a time
let mut run_messages = Messages::new();
while !machine.is_halted() {
machine.tick(&mut run_messages);
}
// get_state() - Inspect CPU registers and memory
let state = machine.get_state();
println!("Program Counter: {:04X}", state.program_counter);
println!("Accumulator: {:04X}", state.accumulator);
println!("First 8 memory words: {:04X?}", &state.memory_snapshot[..8]);
}
Machine::new() - Create a new machineprime(program: Vec<String>) -> Messages - Assemble and load programtick(messages: &mut Messages) - Execute one instruction cycleis_halted() -> bool - Check if CPU is haltedget_state() -> MachineState - Get current CPU and memory stateget_assembled_program() -> &[String] - Get assembled hex codeMessages::new() - Create message containerhas_errors() -> bool - Check for error messagesinfo(message: &str) - Add info messagedebug(message: &str) - Add debug messageerror(message: &str) - Add error messageContains CPU registers and memory snapshot:
program_counter, accumulator, instruction_registeraddress_register, data_register, extend_registersequence_counter, is_halted, is_runningmemory_snapshot - First 32 words of memoryMemory-Reference: AND, ADD, LDA, STA, BUN, BSA, ISZ
Register-Reference: CLA, CLE, CMA, CME, CIR, CIL, INC, SPA, SNA, SZA, SZE, HLT
Input-Output: INP, OUT, SKI, SKO, ION, IOF
Pseudo-Instructions: ORG, DEC, HEX, END
Input functionality is planned but not yet provided.
Licensed under the MIT License.
"Computer System Architecture" by M. Morris Mano (3rd Edition).