| Crates.io | powerpc |
| lib.rs | powerpc |
| version | 0.4.1 |
| created_at | 2025-07-07 04:26:18.510092+00 |
| updated_at | 2025-07-07 05:56:55.34515+00 |
| description | PowerPC disassembler |
| homepage | |
| repository | https://github.com/encounter/powerpc-rs.git |
| max_upload_size | |
| id | 1740709 |
| size | 503,550 |
(Previously ppc750cl)
Rust disassembler and assembler for the PowerPC ISA.
If you need support for other extensions, please open an issue.
In Cargo.toml:
[dependencies]
powerpc = "0.4" # disassembler
powerpc-asm = "0.4" # assembler
Disassembling and printing instructions:
use powerpc::{Argument, Extensions, Ins, Opcode, Simm, GPR};
let ins = Ins::new(0x38A00000, Extensions::none());
assert_eq!(ins.op, Opcode::Addi);
// Basic form
let parsed = ins.basic();
assert_eq!(parsed.args[0], Argument::GPR(GPR(5)));
assert_eq!(parsed.args[1], Argument::GPR(GPR(0)));
assert_eq!(parsed.args[2], Argument::Simm(Simm(0)));
assert_eq!(parsed.to_string(), "addi r5, r0, 0x0");
// Simplified form
let parsed = ins.simplified();
assert_eq!(parsed.to_string(), "li r5, 0x0");
Assembling instructions:
use powerpc_asm::{assemble, Argument, Arguments};
let args: Arguments = [
Argument::Unsigned(5),
Argument::Unsigned(0),
Argument::Signed(0),
Argument::None,
Argument::None,
];
let code = assemble("addi", &args).expect("Invalid arguments");
assert_eq!(code, 0x38A00000); // addi r5, r0, 0x0
cargo run --package powerpc-genisa
cargo test
The file isa.yaml contains a definition of the PowerPC instruction set.
Similarly to LLVM TableGen, the program powerpc-genisa generates Rust files implementing core functionality
for the disassembler and assembler.
powerpc-fuzz).With a single thread on Ryzen 9 3900X: