Crates.io | qingke-rt |
lib.rs | qingke-rt |
version | 0.2.1 |
source | src |
created_at | 2024-01-01 15:57:27.770632 |
updated_at | 2024-05-14 08:41:57.005786 |
description | Minimal runtime / startup for WCH's RISC-V MCUs, managed by the ch32-rs team |
homepage | https://github.com/ch32-rs/qingke |
repository | https://github.com/ch32-rs/qingke |
max_upload_size | |
id | 1085398 |
size | 19,516 |
Replaces ch32v-rt
as the name is not suitable for publishing.
QingKe is the name of the RISC-V core.
#[qingke_rt::entry]
fn main() -> ! {
loop {}
}
// Or if you are using the embassy framework
#[embassy_executor::main(entry = "qingke_rt::entry")]
async fn main(spawner: Spawner) -> ! { ... }
#[qingke_rt::interrupt]
fn UART0() {
// ...
}
// Interrupt provided by the IP core (not peripherals)
#[qingke_rt::interrupt(core)]
fn SysTick() {
// ...
}
#[qingke_rt::highcode]
fn some_highcode_fn() {
// ...
// This fn will be loaded into the highcode(SRAM) section.
// This is required for BLE, recommended for interrupt handles.
}