riscv-asm

Crates.ioriscv-asm
lib.rsriscv-asm
version0.0.2-wip
sourcesrc
created_at2020-07-31 16:38:50.306068
updated_at2020-07-31 16:50:39.544514
descriptionA WIP, simple-to-use assembler and disassembler for `riscv32i-unknown-none-elf` targets
homepage
repositoryhttps://github.com/Chris--B/riscv-asm/
max_upload_size
id271697
size595,917
Chris (Chris--B)

documentation

https://docs.rs/riscv-asm/

README

RISC-V Assembler and Disassembler

A WIP, simple-to-use assembler and disassembler for riscv32i-unknown-none-elf targets.

Build Status Badge Test Status Badge

Building

The binary target dis will disassemble an Elf file passed to it.

$ cargo run --bin dis ./path/to/riscv32i/bin.elf

See the full --help output for more options

$ cargo run --bin dis -- --help
Usage: target/debug/dis [OPTIONS]

Positional arguments:
  input                Path to a RISC-V elf to disassemble

Optional arguments:
  -h, --help           Print the help message and exit
  -a, --allow-pseudo   "Use equivalent pseudo instructions when possible" (default: true)
  -o, --output OUTPUT  Path to write disassembled output into
Commit count: 60

cargo fmt