rslogicsim
| Crates.io | rslogicsim |
| lib.rs | rslogicsim |
| version | 0.1.3 |
| source | src |
| created_at | 2024-06-15 23:48:22.046184 |
| updated_at | 2024-06-16 00:32:51.496029 |
| description | A logic gate/circuit simulator written in Rust |
| homepage | |
| repository | |
| max_upload_size | |
| id | 1273197 |
| size | 28,346 |
Drew Walton (drewwalton19216801)
documentation
README
rsLogicSim - Logic Simulator
What is this?
rsLogicSim is a library designed to simulate various logic gates and circuits. It could be used for any number of applications, such as simulating a TTL based computer.
Building
cargo build
Testing
cargo test