sifli-hal
| Crates.io | sifli-hal |
| lib.rs | sifli-hal |
| version | 0.1.1 |
| created_at | 2025-01-23 06:59:14.055481+00 |
| updated_at | 2025-09-16 05:01:12.908143+00 |
| description | Hardware Abstraction Layer (HAL) for SiFli MCUs |
| homepage | https://github.com/OpenSiFli/sifli-rs |
| repository | https://github.com/OpenSiFli/sifli-rs |
| max_upload_size | |
| id | 1527562 |
| size | 456,176 |
Decaday (decaday)
documentation
README
SiFli HAL
δΈζ | English
Rust Hardware Abstraction Layer (HAL) and Embassy driver for SiFli MCUs.
[!WARNING]
This project is working-in-progress and not ready for production use.
Let's GO!
Status
HAL Implementation Status (Click to expand/collapse)
- β : Supported & Tested
- π: Partially Supported & Tested
- β: Written, needs example/test
- π: Planned & WIP
- β: Not supported by Hardware (N/A)
- β: Async Feature
| Peripheral | Feature | sf32lb52x | 56x | 58x |
|---|---|---|---|---|
| hcpu | ||||
| PAC (Peripheral Access Crate) | π | |||
| Startup & Interrupt | β | |||
| Flash Table | π | |||
| embassy | GPTIM Time Driver | β | ||
| ATIM Time Driver | (#5) | |||
| Embassy Peripheral Singleton | β | |||
| RCC | Peripheral RCC Codegen (enable, freq...) | β | ||
| Read current RCC tree | β | |||
| RCC tree Configure | π | |||
| Modify frequency in same DVFS mode | β | |||
| GPIO | Blinky | β | ||
| PinMux Codegen & AF Config | β | |||
| IO Mode & AonPE Config | π | |||
| EXTI β | β | |||
| USART | Blocking | β | ||
| Buffered(Interrupt) β | β | |||
| DMA β | β | |||
| RingBuffered(DMA) β | β | |||
| DMA | Transfer(P2M, M2P) | β | ||
| RingBuffer | β | |||
| ExtDMA | ||||
| USB (see also:musb) |
embassy-usb β | β | ||
| Device: HID, CDC_ACM ... | β | |||
| HOST / OTG | ||||
| GPADC | Blocking | β | ||
| Interrupt β | β | |||
| Timer Trigger | ||||
| VBAT & External Channel | β | |||
| Multi Channel & Slot | ||||
| Differential Input | ||||
| DMA β | ||||
| Calibration | ||||
| PMU | DVFS Upscale | β | ||
| DVFS Downscale | ||||
| Charge Modoule | ||||
| Buck & LDO | π | |||
| Audio | AudCodec/ADC, DAC | |||
| AudPrc/Channel, Mixer, Volume | ||||
| I2S/DMA, Master, Slave | ||||
| PDM | ||||
| I2C | ||||
| SPI | ||||
| Mailbox | ||||
| BT | ||||
| BLE | ||||
| LCDC/Layer, SPI, DBI | ||||
| ePicasso | ||||
Features
-
defmt,log: Debug log output. -
sf32lb52x: Target chip selection. Currently, onlysf32lb52xis supported. -
set-msplim: Set the MSPLIM register in__pre_init. This register must be set before the main functionβs stack setup (since the bootloader may have already configured it to a different value), otherwise, it will cause a HardFault SiFli-SDK #32.This feature will be removed after cortex-m-rt #580 is released.
-
time-driver-xxx: Timer configuration fortime-driver. It requires at least two capture/compare channels. For thesf32lb52x hcpu, onlyatim1(TODO: #5),gptim1, andgptim2are available. -
unchecked-overclocking: Enable this feature to disable the overclocking check. DO NOT ENABLE THIS FEATURE UNLESS YOU KNOW WHAT YOU'RE DOING.
License
This project is under Apache License, Version 2.0 (LICENSE or http://www.apache.org/licenses/LICENSE-2.0).