Crates.io | sram23x |
lib.rs | sram23x |
version | 0.3.1 |
source | src |
created_at | 2021-01-11 14:03:52.005066 |
updated_at | 2021-02-11 14:42:00.975835 |
description | Platform-agnostic Rust driver for the 23xx series serial SPI SRAMs. |
homepage | https://github.com/aw/sram23x |
repository | https://github.com/aw/sram23x |
max_upload_size | |
id | 340419 |
size | 23,261 |
This is a platform agnostic Rust driver for the 23x series serial SRAM/NVSRAM SPI memory chips,
based on the embedded-hal
traits.
See the Intro post.
This driver allows you to:
read_byte()
.read_page()
.read_sequential()
.write_byte()
.write_page()
.write_sequential()
.Read the API Documentation for more information.
Device | Memory bytes | Memory bits | HOLD pin | Datasheet |
---|---|---|---|---|
M23x640 | 8 KB | 64 Kbit | yes | 23A640/23K640 |
M23x256 | 32 KB | 256 Kbit | yes | 23A256/23K256 |
M23x512 | 64 KB | 512 Kbit | yes | 23A512/23LC512 |
M23xv512 | 64 KB | 512 Kbit | no | 23LCV512 |
M23x1024 | 128 KB | 1 Mbit | yes | 23A1024/23LC1024 |
M23xv1024 | 128 KB | 1 Mbit | no | 23LCV1024 |
Include library as a dependency in your Cargo.toml
[dependencies]
sram23x = "0.3.1"
Some example usage:
extern crate sram23x;
use sram23x::*;
fn main() {
// 1. Ensure spi, cs, and hold pins are defined. hold pin is required (any unused output pin will do)
// (device specific)
// 2. Instantiate memory device 23LCV1024
let mut sram = Sram23x::new(spi, cs, hold, device_type::M23xv1024).unwrap();
// 3. Check the operating mode register
println!("Operating mode register: {:?}", sram.mode);
// 4. Change the operating mode to sequential
sram.set_mode(OperatingMode::Sequential as u8).unwrap();
assert_eq!(sram.mode, 0b01);
// 5. Write 4 bytes of data starting at address 0x00 from a buffer
let mut data: [u8; 4] = ['t' as u8, 'e' as u8, 's' as u8, 't' as u8];
sram.write_sequential(0x00_u32, &mut data).unwrap();
// 6. Read 4 bytes of data starting at address 0x00 into a buffer
sram.read_sequential(0x00_u32, &mut data).unwrap();
println!("Read data: {:?}", data);
assert_eq!(data[0], 't' as u8);
assert_eq!(data[1], 'e' as u8);
assert_eq!(data[2], 's' as u8);
assert_eq!(data[3], 't' as u8);
// 7. Write and read 1 byte to/from address 0x04
sram.set_mode(OperatingMode::Byte as u8).unwrap();
assert_eq!(sram.mode, 0b00);
sram.write_byte(0x04_u32, 'a' as u8).unwrap();
let byte = sram.read_byte(0x04_u32).unwrap();
println!("Read 1 byte: {:?}", byte);
assert_eq!(byte, 'a' as u8);
// 8. Write and read a 32-byte page starting at address 0x00
sram.set_mode(OperatingMode::Page as u8).unwrap();
assert_eq!(sram.mode, 0b10);
let mut data = "Microchip\n1Mbit serial\nsram test".as_bytes();
sram.write_page(0x00_u32, data).unwrap();
let page = sram.read_page(0x00_u32).unwrap();
println!("Read a 32-byte page: {:?}", page);
assert_eq!(page[0], 'M' as u8);
assert_eq!(page[31], 't' as u8);
}
If you find any bugs or issues, please create an issue.
Copyright (c) 2021 Alexander Williams, On-Prem license@on-premises.com