sverilogparse
| Crates.io | sverilogparse |
| lib.rs | sverilogparse |
| version | 0.3.3 |
| source | src |
| created_at | 2022-07-30 05:12:11.956982 |
| updated_at | 2022-09-10 16:28:13.140279 |
| description | Verilog netlist (structural verilog) parser |
| homepage | |
| repository | |
| max_upload_size | |
| id | 635355 |
| size | 25,700 |
Zizheng Guo (gzz2000)
documentation
README
sverilogparse: Structural Verilog Parser in Rust
This is a structural verilog parser written in Rust.
Similar project: https://github.com/OpenTimer/Parser-Verilog