Crates.io | synopsys-usb-otg |
lib.rs | synopsys-usb-otg |
version | 0.4.0 |
source | src |
created_at | 2020-02-12 21:31:06.767868 |
updated_at | 2023-11-19 16:19:26.118114 |
description | 'usb-device' implementation for Synopsys USB OTG IP cores |
homepage | |
repository | https://github.com/stm32-rs/synopsys-usb-otg |
max_upload_size | |
id | 207803 |
size | 428,411 |
synopsys-usb-otg
usb-device implementation for Synopsys USB OTG IP cores.
This project is a successor to the great work started by @mvirkkunen.
STM32F429xx
(OTG_FS and OTG_HS in FS mode)
STM32F401xx
STM32F446xx
(OTG_FS and OTG_HS in FS mode)
STM32F723xx
(OTG_FS and OTG_HS with internal HS PHY)
STM32H7xxxx
(OTG1_HS and OTG2_HS in FS mode, and OTG1_HS with external HS PHY)
And others...
This driver is intended for use through a device hal library.
Such hal library should implement UsbPeripheral
for the corresponding USB peripheral object.
This trait declares all the peripheral properties that may vary from one device family to the other.
Additionally, hal should pass fs
of hs
feature to the synopsys-usb-otg
library to
define a peripheral type:
fs
- for FullSpeed peripheralshs
- for HighSpeed peripheralsOnly one peripheral type can be selected at the moment.
Some ULPI PHYs like the Microchip USB334x series require a delay between the ULPI register write that initiates
the HS Chirp and the subsequent transmit command, otherwise the HS Chirp does not get executed and the deivce
enumerates in FS mode. Some USB Link IP like those in the STM32H7 series support adding this delay to work with the
affected PHYs. Enable the xcvrdly
feature to add this delay.
See the usb-otg-workspace repo for different device-specific examples.