vexide-devices

Crates.iovexide-devices
lib.rsvexide-devices
version0.2.0
sourcesrc
created_at2024-05-10 00:01:33.462965
updated_at2024-05-17 21:44:28.288941
descriptionHigh level device bindings for vexide
homepage
repositoryhttps://github.com/vexide/vexide
max_upload_size
id1235569
size227,059
Gavin (Gavin-Niederman)

documentation

README

vexide-devices

Functionality for accessing hardware connected to the V5 brain.

Overview

The V5 brain features 21 RJ9 4p4c connector ports (known as "Smart ports") for communicating with newer V5 peripherals, as well as six 3-wire ports with log-to-digital conversion capability for compatibility with legacy Cortex devices. This module provides access to both smart devices and ADI devices.

Organization

  • [smart] contains abstractions and types for smart port connected devices.
  • [adi] contains abstractions for three wire ADI connected devices.
  • [battery] provides functions for getting information about the currently connected battery.
  • [controller] provides types for interacting with the V5 controller.
Commit count: 1249

cargo fmt