| Crates.io | yep-cache-line-size |
| lib.rs | yep-cache-line-size |
| version | 0.9.3 |
| created_at | 2025-10-15 00:50:31.16261+00 |
| updated_at | 2025-11-29 01:18:59.953557+00 |
| description | A small library for retrieving cache line sizes. Forked from lovesegfault/cache-size. |
| homepage | |
| repository | https://github.com/richkcho/cache-line-size |
| max_upload_size | |
| id | 1883465 |
| size | 38,301 |
A library to quickly get the cache line size of your CPU caches. Forked from lovesegfault/cache-size.
Currently this crate supports x86 CPUs via the CPUID instruction, using the [raw_cpuid][raw_cpuid] crate. ARM (64-bit) is supported via the corresponding assembly instructions for ARM and AArch64 (if the OS allows).
The crate exposes two enums, [CacheType] and [CacheLevel], to describe the type of cache (data, instruction, unified, or trace) and its hierarchy level.
The cache line size is retrieved via get_cache_line_size.
We also supply APIs to retrieve the cache line size for cache types and levels. These functions now return a Result with a
[CacheInfoError] describing whether the
hardware does not expose the requested information, the cache is not present, or the reported values are invalid.
MacOS traps the CTR_EL0 access and kills the process (illegal instruction). We have to take a dependency on libc to issue a sysctl as a result. It's also worth noting that the retrieved cache line size value appears to be an overestimate on emperical testing and comparing with the CTR_EL0 value.