zynq7000-rt
| Crates.io | zynq7000-rt |
| lib.rs | zynq7000-rt |
| version | 0.1.1 |
| created_at | 2025-10-08 22:48:13.285375+00 |
| updated_at | 2025-10-09 09:10:13.005414+00 |
| description | Run-time support for the Zynq7000 family of SoCs for running bare-metal applications |
| homepage | https://egit.irs.uni-stuttgart.de/rust/zynq7000-rs |
| repository | https://egit.irs.uni-stuttgart.de/rust/zynq7000-rs |
| max_upload_size | |
| id | 1874693 |
| size | 370,687 |
Robin Mueller (robamu)
documentation
README
Zynq7000 Rust Run-Time Support
Startup code and minimal runtime for the AMD Zynq7000 SoC to write bare metal Rust code. This run-time crate is strongly based on the startup code provided by AMD.
Some major differences:
- No L2 cache initialization is performed.
- MMU table is specified as Rust code.
- Modification to the stack setup code, because a different linker script is used.
This crate pulls in the cortex-a-rt crate to provide ARM vectors and the linker script.
Features
rtis a default feature which activates the run-time.
Re-Generating the MMU table
The MMU table is a static flat map of 4096 entries for each 1 MB in the memory map.
It was generated using the mmu-table-gen
tool.